From 26a4bc66a6f57299027e04d90b14fe56a44c6d2b Mon Sep 17 00:00:00 2001 From: John Adamson Date: Fri, 22 Aug 2008 16:43:49 +1000 Subject: [PATCH] m68knommu: fix ColdFire 5272 serial baud rates in mcf.c I noticed (the hard way) that the mcf.c driver doesn't support the fractional precision register on the MCF5272. This makes the console dicey at 115200 baud and a system clock of 66.0 MHz. On the other hand, if your hardware is running at 66.666 MHz, it probably isn't a problem. Patch submitted by John Adamson Signed-off-by: Greg Ungerer --- drivers/serial/mcf.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/serial/mcf.c b/drivers/serial/mcf.c index b2001c5b145..56841fe5f48 100644 --- a/drivers/serial/mcf.c +++ b/drivers/serial/mcf.c @@ -212,10 +212,18 @@ static void mcf_set_termios(struct uart_port *port, struct ktermios *termios, { unsigned long flags; unsigned int baud, baudclk; +#if defined(CONFIG_M5272) + unsigned int baudfr; +#endif unsigned char mr1, mr2; baud = uart_get_baud_rate(port, termios, old, 0, 230400); +#if defined(CONFIG_M5272) + baudclk = (MCF_BUSCLK / baud) / 32; + baudfr = (((MCF_BUSCLK / baud) + 1) / 2) % 16; +#else baudclk = ((MCF_BUSCLK / baud) + 16) / 32; +#endif mr1 = MCFUART_MR1_RXIRQRDY | MCFUART_MR1_RXERRCHAR; mr2 = 0; @@ -262,6 +270,9 @@ static void mcf_set_termios(struct uart_port *port, struct ktermios *termios, writeb(mr2, port->membase + MCFUART_UMR); writeb((baudclk & 0xff00) >> 8, port->membase + MCFUART_UBG1); writeb((baudclk & 0xff), port->membase + MCFUART_UBG2); +#if defined(CONFIG_M5272) + writeb((baudfr & 0x0f), port->membase + MCFUART_UFPD); +#endif writeb(MCFUART_UCSR_RXCLKTIMER | MCFUART_UCSR_TXCLKTIMER, port->membase + MCFUART_UCSR); writeb(MCFUART_UCR_RXENABLE | MCFUART_UCR_TXENABLE, -- 2.41.0