From 1bf8d6366435958b15a4091e7d4fdd1fa8ebc9e2 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Tue, 7 Apr 2009 16:33:35 -0700 Subject: [PATCH] omap_hsmmc: Flush posted write to IRQ Spurious IRQs seen on MMC after 2.6.29. Flush posted write in IRQ handler. The interrupt line is released by clearing the error status bits in the MMCHS_STAT register, which must occur before the interrupt handler returns to avoid unwanted irqs. Hence the need to flush the posted write. Signed-off-by: Kevin Hilman Signed-off-by: Adrian Hunter Acked-by: Tony Lindgen Signed-off-by: Tony Lindgren --- drivers/mmc/host/omap_hsmmc.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index d183be6f2a5..a752788fa4e 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -434,6 +434,8 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id) if (host->mrq == NULL) { OMAP_HSMMC_WRITE(host->base, STAT, OMAP_HSMMC_READ(host->base, STAT)); + /* Flush posted write */ + OMAP_HSMMC_READ(host->base, STAT); return IRQ_HANDLED; } @@ -489,6 +491,8 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id) } OMAP_HSMMC_WRITE(host->base, STAT, status); + /* Flush posted write */ + OMAP_HSMMC_READ(host->base, STAT); if (end_cmd || (status & CC)) mmc_omap_cmd_done(host, host->cmd); -- 2.41.0