]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commit
[POWERPC] Cleanup and fix breakage in tlbflush.h
authorDavid Gibson <david@gibson.dropbear.id.au>
Tue, 24 Apr 2007 03:09:12 +0000 (13:09 +1000)
committerPaul Mackerras <paulus@samba.org>
Tue, 24 Apr 2007 12:08:56 +0000 (22:08 +1000)
commit621023072524fc0155ed16490255e1ea3aa11585
tree77fec16321fe72ef75532c4f07ffee004b57bbfe
parent687304014f7ca8e2fbb3feaefef356b4a0da65ad
[POWERPC] Cleanup and fix breakage in tlbflush.h

BenH's commit a741e67969577163a4cfc78d7fd2753219087ef1 in powerpc.git,
although (AFAICT) only intended to affect ppc64, also has side-effects
which break 44x.  I think 40x, 8xx and Freescale Book E are also
affected, though I haven't tested them.

The problem lies in unconditionally removing flush_tlb_pending() from
the versions of flush_tlb_mm(), flush_tlb_range() and
flush_tlb_kernel_range() used on ppc64 - which are also used the
embedded platforms mentioned above.

The patch below cleans up the convoluted #ifdef logic in tlbflush.h,
in the process restoring the necessary flushes for the software TLB
platforms.  There are three sets of definitions for the flushing
hooks: the software TLB versions (revised to avoid using names which
appear to related to TLB batching), the 32-bit hash based versions
(external functions) amd the 64-bit hash based versions (which
implement batching).

It also moves the declaration of update_mmu_cache() to always be in
tlbflush.h (previously it was in tlbflush.h except for PPC64, where it
was in pgtable.h).

Booted on Ebony (440GP) and compiled for 64-bit and 32-bit
multiplatform.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
arch/powerpc/mm/mmu_decl.h
include/asm-powerpc/pgtable.h
include/asm-powerpc/tlbflush.h