REMOVE OMAP LEGACY CODE: Reset clocks and PM code to mainline

[linux-2.6-omap-h63xx.git] / arch / arm / plat-omap / include / mach / control.h

diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h
index df7cb4b29e849dd55da808fc9a4d3051a41f3358..269147f3836f50985809c3ab5b9a3f81a944e2f4 100644 (file)
--- a/arch/arm/plat-omap/include/mach/control.h
+++ b/arch/arm/plat-omap/include/mach/control.h
@@ -139,15 +139,6 @@
 #define OMAP343X_CONTROL_TEST_KEY_11   (OMAP2_CONTROL_GENERAL + 0x00f4)
 #define OMAP343X_CONTROL_TEST_KEY_12   (OMAP2_CONTROL_GENERAL + 0x00f8)
 #define OMAP343X_CONTROL_TEST_KEY_13   (OMAP2_CONTROL_GENERAL + 0x00fc)
-#define OMAP343X_CONTROL_FUSE_OPP1_VDD1        (OMAP2_CONTROL_GENERAL + 0x0110)
-#define OMAP343X_CONTROL_FUSE_OPP2_VDD1        (OMAP2_CONTROL_GENERAL + 0x0114)
-#define OMAP343X_CONTROL_FUSE_OPP3_VDD1        (OMAP2_CONTROL_GENERAL + 0x0118)
-#define OMAP343X_CONTROL_FUSE_OPP4_VDD1        (OMAP2_CONTROL_GENERAL + 0x011c)
-#define OMAP343X_CONTROL_FUSE_OPP5_VDD1        (OMAP2_CONTROL_GENERAL + 0x0120)
-#define OMAP343X_CONTROL_FUSE_OPP1_VDD2        (OMAP2_CONTROL_GENERAL + 0x0124)
-#define OMAP343X_CONTROL_FUSE_OPP2_VDD2        (OMAP2_CONTROL_GENERAL + 0x0128)
-#define OMAP343X_CONTROL_FUSE_OPP3_VDD2        (OMAP2_CONTROL_GENERAL + 0x012c)
-#define OMAP343X_CONTROL_FUSE_SR       (OMAP2_CONTROL_GENERAL + 0x0130)
 #define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190)
 #define OMAP343X_CONTROL_IVA2_BOOTMOD  (OMAP2_CONTROL_GENERAL + 0x0194)
 #define OMAP343X_CONTROL_PBIAS_LITE    (OMAP2_CONTROL_GENERAL + 0x02b0)
@@ -186,16 +177,6 @@
 #define OMAP2_SYSBOOT_1_MASK           (1 << 1)
 #define OMAP2_SYSBOOT_0_MASK           (1 << 0)
 
-/* CONTROL_FUSE_SR bits */
-#define OMAP343X_SR2_SENNENABLE_MASK   (0x3 << 10)
-#define OMAP343X_SR2_SENNENABLE_SHIFT  10
-#define OMAP343X_SR2_SENPENABLE_MASK   (0x3 << 8)
-#define OMAP343X_SR2_SENPENABLE_SHIFT  8
-#define OMAP343X_SR1_SENNENABLE_MASK   (0x3 << 2)
-#define OMAP343X_SR1_SENNENABLE_SHIFT  2
-#define OMAP343X_SR1_SENPENABLE_MASK   (0x3 << 0)
-#define OMAP343X_SR1_SENPENABLE_SHIFT  0
-
 /* CONTROL_PBIAS_LITE bits */
 #define OMAP343X_PBIASLITESUPPLY_HIGH1 (1 << 15)
 #define OMAP343X_PBIASLITEVMODEERROR1  (1 << 11)
@@ -208,19 +189,6 @@
 #define OMAP2_PBIASLITEPWRDNZ0         (1 << 1)
 #define OMAP2_PBIASLITEVMODE0          (1 << 0)
 
-/* CONTROL_PADCONF_X bits */
-#define OMAP3_PADCONF_WAKEUPEVENT0     (1 << 15)
-#define OMAP3_PADCONF_WAKEUPENABLE0    (1 << 14)
-
-/* CONTROL_IVA2_BOOTMOD bits */
-#define OMAP3_IVA2_BOOTMOD_SHIFT       0
-#define OMAP3_IVA2_BOOTMOD_MASK                (0xf << 0)
-#define OMAP3_IVA2_BOOTMOD_IDLE                (0x1 << 0)
-
-#define OMAP343X_SCRATCHPAD_ROM                (OMAP343X_CTRL_BASE + 0x860)
-#define OMAP343X_SCRATCHPAD            (OMAP343X_CTRL_BASE + 0x910)
-#define OMAP343X_SCRATCHPAD_ROM_OFFSET 0x19C
-
 #ifndef __ASSEMBLY__
 #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
 extern void __iomem *omap_ctrl_base_get(void);