OMAP3 clock: avoid invalid FREQSEL values during DPLL rate rounding

[linux-2.6-omap-h63xx.git] / arch / arm / mach-omap2 / clock34xx.h

diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 08789c8997fcf2f7eb1681599e960d41934fe989..0b95fcbb51f1987d7087f739efc51f1158310c0e 100644 (file)
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -292,6 +292,7 @@ static struct dpll_data dpll1_dd = {
        .idlest_mask    = OMAP3430_ST_MPU_CLK_MASK,
        .bypass_clk     = &dpll1_fck,
        .max_multiplier = OMAP3_MAX_DPLL_MULT,
+       .min_divider    = 1,
        .max_divider    = OMAP3_MAX_DPLL_DIV,
        .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
 };
@@ -367,6 +368,7 @@ static struct dpll_data dpll2_dd = {
        .idlest_mask    = OMAP3430_ST_IVA2_CLK_MASK,
        .bypass_clk     = &dpll2_fck,
        .max_multiplier = OMAP3_MAX_DPLL_MULT,
+       .min_divider    = 1,
        .max_divider    = OMAP3_MAX_DPLL_DIV,
        .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
 };
@@ -429,6 +431,7 @@ static struct dpll_data dpll3_dd = {
        .idlest_mask    = OMAP3430_ST_CORE_CLK_MASK,
        .bypass_clk     = &sys_ck,
        .max_multiplier = OMAP3_MAX_DPLL_MULT,
+       .min_divider    = 1,
        .max_divider    = OMAP3_MAX_DPLL_DIV,
        .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
 };
@@ -594,6 +597,7 @@ static struct dpll_data dpll4_dd = {
        .idlest_mask    = OMAP3430_ST_PERIPH_CLK_MASK,
        .bypass_clk     = &sys_ck,
        .max_multiplier = OMAP3_MAX_DPLL_MULT,
+       .min_divider    = 1,
        .max_divider    = OMAP3_MAX_DPLL_DIV,
        .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
 };
@@ -920,6 +924,7 @@ static struct dpll_data dpll5_dd = {
        .idlest_mask    = OMAP3430ES2_ST_PERIPH2_CLK_MASK,
        .bypass_clk     = &sys_ck,
        .max_multiplier = OMAP3_MAX_DPLL_MULT,
+       .min_divider    = 1,
        .max_divider    = OMAP3_MAX_DPLL_DIV,
        .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
 };