.parent = &core_l3_ck,
.prcm_mod = CORE_MOD,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
- DELAYED_APP | CONFIG_PARTICIPANT,
+ DELAYED_APP | CONFIG_PARTICIPANT | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN2,
.enable_bit = OMAP24XX_EN_USB_SHIFT,
+ .idlest_bit = OMAP24XX_ST_USB_SHIFT,
.clksel_reg = CM_CLKSEL1,
.clksel_mask = OMAP24XX_CLKSEL_USB_MASK,
.clksel = usb_l4_ick_clksel,
.name = "ssi_fck",
.parent = &core_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY |
DELAYED_APP,
.clkdm = { .name = "core_l3_clkdm" },
.enable_reg = OMAP24XX_CM_FCLKEN2,
.enable_bit = OMAP24XX_EN_SSI_SHIFT,
+ .idlest_bit = OMAP24XX_ST_SSI_SHIFT,
.clksel_reg = CM_CLKSEL1,
.clksel_mask = OMAP24XX_CLKSEL_SSI_MASK,
.clksel = ssi_ssr_sst_fck_clksel,
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
.clkdm = { .name = "core_l4_clkdm" },
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.enable_reg = CM_ICLKEN2,
.enable_bit = OMAP24XX_EN_SSI_SHIFT,
+ .idlest_bit = OMAP24XX_ST_SSI_SHIFT,
.recalc = &followparent_recalc,
};
.name = "gpt1_ick",
.parent = &l4_ck,
.prcm_mod = WKUP_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN,
.enable_bit = OMAP24XX_EN_GPT1_SHIFT,
+ .idlest_bit = OMAP24XX_ST_GPT1_SHIFT,
.recalc = &followparent_recalc,
};
.name = "gpt2_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP24XX_EN_GPT2_SHIFT,
+ .idlest_bit = OMAP24XX_ST_GPT2_SHIFT,
.recalc = &followparent_recalc,
};
.name = "gpt3_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP24XX_EN_GPT3_SHIFT,
+ .idlest_bit = OMAP24XX_ST_GPT3_SHIFT,
.recalc = &followparent_recalc,
};
.name = "gpt4_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP24XX_EN_GPT4_SHIFT,
+ .idlest_bit = OMAP24XX_ST_GPT4_SHIFT,
.recalc = &followparent_recalc,
};
.name = "gpt5_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP24XX_EN_GPT5_SHIFT,
+ .idlest_bit = OMAP24XX_ST_GPT5_SHIFT,
.recalc = &followparent_recalc,
};
.name = "gpt6_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP24XX_EN_GPT6_SHIFT,
+ .idlest_bit = OMAP24XX_ST_GPT6_SHIFT,
.recalc = &followparent_recalc,
};
.name = "gpt7_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP24XX_EN_GPT7_SHIFT,
+ .idlest_bit = OMAP24XX_ST_GPT7_SHIFT,
.recalc = &followparent_recalc,
};
.name = "gpt8_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP24XX_EN_GPT8_SHIFT,
+ .idlest_bit = OMAP24XX_ST_GPT8_SHIFT,
.recalc = &followparent_recalc,
};
.name = "gpt9_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP24XX_EN_GPT9_SHIFT,
+ .idlest_bit = OMAP24XX_ST_GPT9_SHIFT,
.recalc = &followparent_recalc,
};
.name = "gpt10_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP24XX_EN_GPT10_SHIFT,
+ .idlest_bit = OMAP24XX_ST_GPT10_SHIFT,
.recalc = &followparent_recalc,
};
.name = "gpt11_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP24XX_EN_GPT11_SHIFT,
+ .idlest_bit = OMAP24XX_ST_GPT11_SHIFT,
.recalc = &followparent_recalc,
};
.name = "gpt12_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP24XX_EN_GPT12_SHIFT,
+ .idlest_bit = OMAP24XX_ST_GPT12_SHIFT,
.recalc = &followparent_recalc,
};
.id = 1,
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP24XX_EN_MCBSP1_SHIFT,
+ .idlest_bit = OMAP24XX_ST_MCBSP1_SHIFT,
.recalc = &followparent_recalc,
};
.id = 2,
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP24XX_EN_MCBSP2_SHIFT,
+ .idlest_bit = OMAP24XX_ST_MCBSP2_SHIFT,
.recalc = &followparent_recalc,
};
.id = 3,
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN2,
.enable_bit = OMAP2430_EN_MCBSP3_SHIFT,
+ .idlest_bit = OMAP2430_ST_MCBSP3_SHIFT,
.recalc = &followparent_recalc,
};
.id = 4,
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN2,
.enable_bit = OMAP2430_EN_MCBSP4_SHIFT,
+ .idlest_bit = OMAP2430_ST_MCBSP4_SHIFT,
.recalc = &followparent_recalc,
};
.id = 5,
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN2,
.enable_bit = OMAP2430_EN_MCBSP5_SHIFT,
+ .idlest_bit = OMAP2430_ST_MCBSP5_SHIFT,
.recalc = &followparent_recalc,
};
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
.clkdm = { .name = "core_l4_clkdm" },
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP24XX_EN_MCSPI1_SHIFT,
+ .idlest_bit = OMAP24XX_ST_MCSPI1_SHIFT,
.recalc = &followparent_recalc,
};
.id = 2,
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP24XX_EN_MCSPI2_SHIFT,
+ .idlest_bit = OMAP24XX_ST_MCSPI2_SHIFT,
.recalc = &followparent_recalc,
};
.id = 3,
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN2,
.enable_bit = OMAP2430_EN_MCSPI3_SHIFT,
+ .idlest_bit = OMAP2430_ST_MCSPI3_SHIFT,
.recalc = &followparent_recalc,
};
.name = "uart1_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP24XX_EN_UART1_SHIFT,
+ .idlest_bit = OMAP24XX_ST_UART1_SHIFT,
.recalc = &followparent_recalc,
};
.name = "uart2_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP24XX_EN_UART2_SHIFT,
+ .idlest_bit = OMAP24XX_ST_UART2_SHIFT,
.recalc = &followparent_recalc,
};
.name = "uart3_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN2,
.enable_bit = OMAP24XX_EN_UART3_SHIFT,
+ .idlest_bit = OMAP24XX_ST_UART3_SHIFT,
.recalc = &followparent_recalc,
};
.name = "gpios_ick",
.parent = &l4_ck,
.prcm_mod = WKUP_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN,
.enable_bit = OMAP24XX_EN_GPIOS_SHIFT,
+ .idlest_bit = OMAP24XX_ST_GPIOS_SHIFT,
.recalc = &followparent_recalc,
};
.name = "gpios_fck",
.parent = &func_32k_ck,
.prcm_mod = WKUP_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "prm_clkdm" },
.enable_reg = CM_FCLKEN,
.enable_bit = OMAP24XX_EN_GPIOS_SHIFT,
+ .idlest_bit = OMAP24XX_ST_GPIOS_SHIFT,
.recalc = &followparent_recalc,
};
.name = "mpu_wdt_ick",
.parent = &l4_ck,
.prcm_mod = WKUP_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "prm_clkdm" },
.enable_reg = CM_ICLKEN,
.enable_bit = OMAP24XX_EN_MPU_WDT_SHIFT,
+ .idlest_bit = OMAP24XX_ST_MPU_WDT_SHIFT,
.recalc = &followparent_recalc,
};
.name = "mpu_wdt_fck",
.parent = &func_32k_ck,
.prcm_mod = WKUP_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "prm_clkdm" },
.enable_reg = CM_FCLKEN,
.enable_bit = OMAP24XX_EN_MPU_WDT_SHIFT,
+ .idlest_bit = OMAP24XX_ST_MPU_WDT_SHIFT,
.recalc = &followparent_recalc,
};
.parent = &l4_ck,
.prcm_mod = WKUP_MOD,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
- ENABLE_ON_INIT,
+ ENABLE_ON_INIT | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN,
.enable_bit = OMAP24XX_EN_32KSYNC_SHIFT,
+ .idlest_bit = OMAP24XX_ST_32KSYNC_SHIFT,
.recalc = &followparent_recalc,
};
.clkdm = { .name = "prm_clkdm" },
.enable_reg = CM_ICLKEN,
.enable_bit = OMAP24XX_EN_WDT1_SHIFT,
+ .idlest_bit = OMAP24XX_ST_WDT1_SHIFT,
.recalc = &followparent_recalc,
};
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN,
.enable_bit = OMAP24XX_EN_OMAPCTRL_SHIFT,
+ .idlest_bit = OMAP24XX_ST_OMAPCTRL_SHIFT,
.recalc = &followparent_recalc,
};
.name = "icr_ick",
.parent = &l4_ck,
.prcm_mod = WKUP_MOD,
- .flags = CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN,
.enable_bit = OMAP2430_EN_ICR_SHIFT,
+ .idlest_bit = OMAP2430_ST_ICR_SHIFT,
.recalc = &followparent_recalc,
};
.name = "mailboxes_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP24XX_EN_MAILBOXES_SHIFT,
+ .idlest_bit = OMAP24XX_ST_MAILBOXES_SHIFT,
.recalc = &followparent_recalc,
};
.name = "wdt4_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP24XX_EN_WDT4_SHIFT,
+ .idlest_bit = OMAP24XX_ST_WDT4_SHIFT,
.recalc = &followparent_recalc,
};
.name = "wdt3_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X,
+ .flags = CLOCK_IN_OMAP242X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP2420_EN_WDT3_SHIFT,
+ .idlest_bit = OMAP2420_ST_WDT3_SHIFT,
.recalc = &followparent_recalc,
};
.name = "wdt3_fck",
.parent = &func_32k_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X,
+ .flags = CLOCK_IN_OMAP242X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_FCLKEN1,
.enable_bit = OMAP2420_EN_WDT3_SHIFT,
+ .enable_bit = OMAP2420_ST_WDT3_SHIFT,
.recalc = &followparent_recalc,
};
.name = "mspro_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP24XX_EN_MSPRO_SHIFT,
+ .idlest_bit = OMAP24XX_ST_MSPRO_SHIFT,
.recalc = &followparent_recalc,
};
.name = "mspro_fck",
.parent = &func_96m_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_FCLKEN1,
.enable_bit = OMAP24XX_EN_MSPRO_SHIFT,
+ .idlest_bit = OMAP24XX_ST_MSPRO_SHIFT,
.recalc = &followparent_recalc,
};
.name = "mmc_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X,
+ .flags = CLOCK_IN_OMAP242X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP2420_EN_MMC_SHIFT,
+ .idlest_bit = OMAP2420_ST_MMC_SHIFT,
.recalc = &followparent_recalc,
};
.name = "mmc_fck",
.parent = &func_96m_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X,
+ .flags = CLOCK_IN_OMAP242X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_FCLKEN1,
.enable_bit = OMAP2420_EN_MMC_SHIFT,
+ .idlest_bit = OMAP2420_ST_MMC_SHIFT,
.recalc = &followparent_recalc,
};
.name = "fac_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP24XX_EN_FAC_SHIFT,
+ .idlest_bit = OMAP24XX_ST_FAC_SHIFT,
.recalc = &followparent_recalc,
};
.name = "fac_fck",
.parent = &func_12m_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_FCLKEN1,
.enable_bit = OMAP24XX_EN_FAC_SHIFT,
+ .idlest_bit = OMAP24XX_ST_FAC_SHIFT,
.recalc = &followparent_recalc,
};
.name = "eac_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X,
+ .flags = CLOCK_IN_OMAP242X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP2420_EN_EAC_SHIFT,
+ .idlest_bit = OMAP2420_ST_EAC_SHIFT,
.recalc = &followparent_recalc,
};
.name = "eac_fck",
.parent = &func_96m_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X,
+ .flags = CLOCK_IN_OMAP242X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_FCLKEN1,
.enable_bit = OMAP2420_EN_EAC_SHIFT,
+ .idlest_bit = OMAP2420_ST_EAC_SHIFT,
.recalc = &followparent_recalc,
};
.name = "hdq_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP24XX_EN_HDQ_SHIFT,
+ .idlest_bit = OMAP24XX_ST_HDQ_SHIFT,
.recalc = &followparent_recalc,
};
.name = "hdq_fck",
.parent = &func_12m_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_FCLKEN1,
.enable_bit = OMAP24XX_EN_HDQ_SHIFT,
+ .idlest_bit = OMAP24XX_ST_HDQ_SHIFT,
.recalc = &followparent_recalc,
};
.id = 2,
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP2420_EN_I2C2_SHIFT,
+ .idlest_bit = OMAP2420_ST_I2C2_SHIFT,
.recalc = &followparent_recalc,
};
.id = 2,
.parent = &func_12m_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X,
+ .flags = CLOCK_IN_OMAP242X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_FCLKEN1,
.enable_bit = OMAP2420_EN_I2C2_SHIFT,
+ .idlest_bit = OMAP2420_ST_I2C2_SHIFT,
.recalc = &followparent_recalc,
};
.id = 1,
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP2420_EN_I2C1_SHIFT,
+ .idlest_bit = OMAP2420_ST_I2C1_SHIFT,
.recalc = &followparent_recalc,
};
.id = 1,
.parent = &func_12m_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X,
+ .flags = CLOCK_IN_OMAP242X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_FCLKEN1,
.enable_bit = OMAP2420_EN_I2C1_SHIFT,
+ .idlest_bit = OMAP2420_ST_I2C1_SHIFT,
.recalc = &followparent_recalc,
};
.name = "vlynq_ick",
.parent = &core_l3_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X,
+ .flags = CLOCK_IN_OMAP242X | WAIT_READY,
.clkdm = { .name = "core_l3_clkdm" },
.enable_reg = CM_ICLKEN1,
.enable_bit = OMAP2420_EN_VLYNQ_SHIFT,
+ .idlest_bit = OMAP2420_ST_VLYNQ_SHIFT,
.recalc = &followparent_recalc,
};
.name = "vlynq_fck",
.parent = &func_96m_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP242X | DELAYED_APP,
+ .flags = CLOCK_IN_OMAP242X | DELAYED_APP | WAIT_READY,
.clkdm = { .name = "core_l3_clkdm" },
.enable_reg = CM_FCLKEN1,
.enable_bit = OMAP2420_EN_VLYNQ_SHIFT,
+ .idlest_bit = OMAP2420_ST_VLYNQ_SHIFT,
.init = &omap2_init_clksel_parent,
.clksel_reg = CM_CLKSEL1,
.clksel_mask = OMAP2420_CLKSEL_VLYNQ_MASK,
.name = "sdrc_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP243X | ENABLE_ON_INIT,
+ .flags = CLOCK_IN_OMAP243X | WAIT_READY | ENABLE_ON_INIT,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN3,
.enable_bit = OMAP2430_EN_SDRC_SHIFT,
+ .idlest_bit = OMAP2430_ST_SDRC_SHIFT,
.recalc = &followparent_recalc,
};
.name = "des_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
+ .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = OMAP24XX_CM_ICLKEN4,
.enable_bit = OMAP24XX_EN_DES_SHIFT,
+ .idlest_bit = OMAP24XX_ST_DES_SHIFT,
.recalc = &followparent_recalc,
};
.name = "sha_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
+ .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = OMAP24XX_CM_ICLKEN4,
.enable_bit = OMAP24XX_EN_SHA_SHIFT,
+ .idlest_bit = OMAP24XX_ST_SHA_SHIFT,
.recalc = &followparent_recalc,
};
.name = "rng_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
+ .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = OMAP24XX_CM_ICLKEN4,
.enable_bit = OMAP24XX_EN_RNG_SHIFT,
+ .idlest_bit = OMAP24XX_ST_RNG_SHIFT,
.recalc = &followparent_recalc,
};
.name = "aes_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
+ .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = OMAP24XX_CM_ICLKEN4,
.enable_bit = OMAP24XX_EN_AES_SHIFT,
+ .idlest_bit = OMAP24XX_ST_AES_SHIFT,
.recalc = &followparent_recalc,
};
.name = "pka_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
+ .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = OMAP24XX_CM_ICLKEN4,
.enable_bit = OMAP24XX_EN_PKA_SHIFT,
+ .idlest_bit = OMAP24XX_ST_PKA_SHIFT,
.recalc = &followparent_recalc,
};
.name = "usb_fck",
.parent = &func_48m_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X,
+ .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X | WAIT_READY,
.clkdm = { .name = "core_l3_clkdm" },
.enable_reg = OMAP24XX_CM_FCLKEN2,
.enable_bit = OMAP24XX_EN_USB_SHIFT,
+ .idlest_bit = OMAP24XX_ST_USB_SHIFT,
.recalc = &followparent_recalc,
};
.name = "usbhs_ick",
.parent = &core_l3_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l3_clkdm" },
.enable_reg = CM_ICLKEN2,
.enable_bit = OMAP2430_EN_USBHS_SHIFT,
+ .idlest_bit = OMAP2430_ST_USBHS_SHIFT,
.recalc = &followparent_recalc,
};
.id = 1,
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN2,
.enable_bit = OMAP2430_EN_MMCHS1_SHIFT,
+ .idlest_bit = OMAP2430_ST_MMCHS1_SHIFT,
.recalc = &followparent_recalc,
};
.id = 2,
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN2,
.enable_bit = OMAP2430_EN_MMCHS2_SHIFT,
+ .idlest_bit = OMAP2430_ST_MMCHS2_SHIFT,
.recalc = &followparent_recalc,
};
.name = "gpio5_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN2,
.enable_bit = OMAP2430_EN_GPIO5_SHIFT,
+ .idlest_bit = OMAP2430_ST_GPIO5_SHIFT,
.recalc = &followparent_recalc,
};
.name = "mdm_intc_ick",
.parent = &l4_ck,
.prcm_mod = CORE_MOD,
- .flags = CLOCK_IN_OMAP243X,
+ .flags = CLOCK_IN_OMAP243X | WAIT_READY,
.clkdm = { .name = "core_l4_clkdm" },
.enable_reg = CM_ICLKEN2,
.enable_bit = OMAP2430_EN_MDM_INTC_SHIFT,
+ .idlest_bit = OMAP2430_ST_MDM_INTC_SHIFT,
.recalc = &followparent_recalc,
};