]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - arch/arm/mach-omap2/clock24xx.c
[ARM] OMAP2 SDRC: separate common OMAP2/3 code from OMAP2xxx code
[linux-2.6-omap-h63xx.git] / arch / arm / mach-omap2 / clock24xx.c
index 83911ad48733bfc3e1293b64854b4c242dfbd95a..a11e7c71177c50d4cdab907ab9929480ca86531d 100644 (file)
@@ -389,9 +389,9 @@ static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
        mult &= OMAP24XX_CORE_CLK_SRC_MASK;
 
        if ((rate == (cur_rate / 2)) && (mult == 2)) {
-               omap2_reprogram_sdrc(CORE_CLK_SRC_DPLL, 1);
+               omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1);
        } else if ((rate == (cur_rate * 2)) && (mult == 1)) {
-               omap2_reprogram_sdrc(CORE_CLK_SRC_DPLL_X2, 1);
+               omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1);
        } else if (rate != cur_rate) {
                valid_rate = omap2_dpllcore_round_rate(rate);
                if (valid_rate != rate)
@@ -430,15 +430,16 @@ static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
                if (rate == curr_prcm_set->xtal_speed)  /* If asking for 1-1 */
                        bypass = 1;
 
-               omap2_reprogram_sdrc(CORE_CLK_SRC_DPLL_X2, 1); /* For init_mem */
+               /* For omap2xxx_sdrc_init_params() */
+               omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1);
 
                /* Force dll lock mode */
                omap2_set_prcm(tmpset.cm_clksel1_pll, tmpset.base_sdrc_rfr,
                               bypass);
 
                /* Errata: ret dll entry state */
-               omap2_init_memory_params(omap2_dll_force_needed());
-               omap2_reprogram_sdrc(done_rate, 0);
+               omap2xxx_sdrc_init_params(omap2xxx_sdrc_dll_is_unlocked());
+               omap2xxx_sdrc_reprogram(done_rate, 0);
        }
        omap2_dpllcore_recalc(&dpll_ck);
        ret = 0;
@@ -525,9 +526,9 @@ static int omap2_select_table_rate(struct clk *clk, unsigned long rate)
        cur_rate = omap2_get_dpll_rate_24xx(&dpll_ck);
 
        if (prcm->dpll_speed == cur_rate / 2) {
-               omap2_reprogram_sdrc(CORE_CLK_SRC_DPLL, 1);
+               omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1);
        } else if (prcm->dpll_speed == cur_rate * 2) {
-               omap2_reprogram_sdrc(CORE_CLK_SRC_DPLL_X2, 1);
+               omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1);
        } else if (prcm->dpll_speed != cur_rate) {
                local_irq_save(flags);
 
@@ -558,14 +559,14 @@ static int omap2_select_table_rate(struct clk *clk, unsigned long rate)
                        cm_write_mod_reg(prcm->cm_clksel_mdm,
                                         OMAP2430_MDM_MOD, CM_CLKSEL);
 
-               /* x2 to enter init_mem */
-               omap2_reprogram_sdrc(CORE_CLK_SRC_DPLL_X2, 1);
+               /* x2 to enter omap2xxx_sdrc_init_params() */
+               omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1);
 
                omap2_set_prcm(prcm->cm_clksel1_pll, prcm->base_sdrc_rfr,
                               bypass);
 
-               omap2_init_memory_params(omap2_dll_force_needed());
-               omap2_reprogram_sdrc(done_rate, 0);
+               omap2xxx_sdrc_init_params(omap2xxx_sdrc_dll_is_unlocked());
+               omap2xxx_sdrc_reprogram(done_rate, 0);
 
                local_irq_restore(flags);
        }