From 5bf725d99f4688a8418a689a263a494190a98060 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 28 Feb 2007 04:34:11 -0800 Subject: [PATCH] serial: 8250 changes for omap 8250 changes for omap Signed-off-by: Tony Lindgren --- drivers/serial/8250.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c index 90621c3312b..e4d5d4584dc 100644 --- a/drivers/serial/8250.c +++ b/drivers/serial/8250.c @@ -1406,7 +1406,11 @@ static irqreturn_t serial8250_interrupt(int irq, void *dev_id) DEBUG_INTR("end.\n"); +#ifdef CONFIG_ARCH_OMAP15XX + return IRQ_HANDLED; /* FIXME: iir status not ready on 1510 */ +#else return IRQ_RETVAL(handled); +#endif } /* @@ -2057,6 +2061,19 @@ serial8250_set_termios(struct uart_port *port, struct ktermios *termios, /* emulated UARTs (Lucent Venus 167x) need two steps */ serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); } + + /* Note that we need to set ECB to access write water mark + * bits. First allow FCR tx fifo write, then set fcr with + * possible TX fifo settings. */ + if (uart_config[up->port.type].flags & UART_CAP_EFR) { + serial_outp(up, UART_LCR, 0xbf); /* Access EFR */ + serial_outp(up, UART_EFR, UART_EFR_ECB); + serial_outp(up, UART_LCR, 0x0); /* Access FCR */ + serial_outp(up, UART_FCR, fcr); + serial_outp(up, UART_LCR, 0xbf); /* Access EFR */ + serial_outp(up, UART_EFR, 0); + serial_outp(up, UART_LCR, cval); /* Access FCR */ + } else serial_outp(up, UART_FCR, fcr); /* set fcr */ } serial8250_set_mctrl(&up->port, up->port.mctrl); @@ -2083,6 +2100,11 @@ static int serial8250_request_std_resource(struct uart_8250_port *up) unsigned int size = 8 << up->port.regshift; int ret = 0; +#ifdef CONFIG_ARCH_OMAP + if (is_omap_port((unsigned int)up->port.membase)) + size = 0x16 << up->port.regshift; +#endif + switch (up->port.iotype) { case UPIO_AU: size = 0x100000; -- 2.41.0