From 44d494417278e49f5b42bd3ded1801b6d2254db8 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Tue, 14 Oct 2008 17:18:45 -0700 Subject: [PATCH] agp/intel: Reduce extraneous PCI posting reads during init Instead of doing a posting read after each GTT entry update, do a single one at the end of the writes. This should reduce boot time a tiny amount by avoiding a lot of extra uncached reads. Signed-off-by: Keith Packard Signed-off-by: Eric Anholt Signed-off-by: Dave Airlie --- drivers/char/agp/intel-agp.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c index f1fe7490131..81f09424447 100644 --- a/drivers/char/agp/intel-agp.c +++ b/drivers/char/agp/intel-agp.c @@ -214,8 +214,8 @@ static int intel_i810_configure(void) if (agp_bridge->driver->needs_scratch_page) { for (i = 0; i < current_size->num_entries; i++) { writel(agp_bridge->scratch_page, intel_private.registers+I810_PTE_BASE+(i*4)); - readl(intel_private.registers+I810_PTE_BASE+(i*4)); /* PCI posting. */ } + readl(intel_private.registers+I810_PTE_BASE+((i-1)*4)); /* PCI posting. */ } global_cache_flush(); return 0; @@ -775,8 +775,8 @@ static int intel_i830_configure(void) if (agp_bridge->driver->needs_scratch_page) { for (i = intel_private.gtt_entries; i < current_size->num_entries; i++) { writel(agp_bridge->scratch_page, intel_private.registers+I810_PTE_BASE+(i*4)); - readl(intel_private.registers+I810_PTE_BASE+(i*4)); /* PCI Posting. */ } + readl(intel_private.registers+I810_PTE_BASE+((i-1)*4)); /* PCI Posting. */ } global_cache_flush(); @@ -991,8 +991,8 @@ static int intel_i915_configure(void) if (agp_bridge->driver->needs_scratch_page) { for (i = intel_private.gtt_entries; i < current_size->num_entries; i++) { writel(agp_bridge->scratch_page, intel_private.gtt+i); - readl(intel_private.gtt+i); /* PCI Posting. */ } + readl(intel_private.gtt+i-1); /* PCI Posting. */ } global_cache_flush(); -- 2.41.0