From: Jesper Nilsson <jesper.nilsson@axis.com>
Date: Fri, 25 Jan 2008 16:31:38 +0000 (+0100)
Subject: CRIS v32: Add precise delay loops for ETRAX FS and ARTPEC-3.
X-Git-Tag: v2.6.25-rc1~40^2~52
X-Git-Url: http://www.pilppa.org/gitweb/gitweb.cgi?a=commitdiff_plain;h=48c87a4483d9146d9f23198163d6ee621535702d;p=linux-2.6-omap-h63xx.git

CRIS v32: Add precise delay loops for ETRAX FS and ARTPEC-3.

Implements cris_delay10ns.
---

diff --git a/arch/cris/arch-v32/lib/delay.c b/arch/cris/arch-v32/lib/delay.c
new file mode 100644
index 00000000000..39f1ac9995b
--- /dev/null
+++ b/arch/cris/arch-v32/lib/delay.c
@@ -0,0 +1,28 @@
+/*
+ * Precise Delay Loops for ETRAX FS
+ *
+ * Copyright (C) 2006 Axis Communications AB.
+ *
+ */
+
+#include <hwregs/reg_map.h>
+#include <hwregs/reg_rdwr.h>
+#include <hwregs/timer_defs.h>
+#include <linux/types.h>
+#include <linux/delay.h>
+#include <linux/module.h>
+
+/*
+ * On ETRAX FS, we can check the free-running read-only 100MHz timer
+ * getting 32-bit 10ns precision, theoretically good for 42.94967295
+ * seconds.  Unsigned arithmetic and careful expression handles
+ * wrapping.
+ */
+
+void cris_delay10ns(u32 n10ns)
+{
+	u32 t0 = REG_RD(timer, regi_timer0, r_time);
+	while (REG_RD(timer, regi_timer0, r_time) - t0 < n10ns)
+		;
+}
+EXPORT_SYMBOL(cris_delay10ns);