From: Jeff Garzik Date: Sat, 24 Nov 2007 02:59:45 +0000 (-0500) Subject: drivers/net/cxgb3: trim trailing whitespace X-Git-Tag: v2.6.25-rc1~1162^2~586 X-Git-Url: http://www.pilppa.org/gitweb/gitweb.cgi?a=commitdiff_plain;h=2eab17ab880ad8d570d27517e6c9d9fe74adc214;p=linux-2.6-omap-h63xx.git drivers/net/cxgb3: trim trailing whitespace Signed-off-by: Jeff Garzik --- diff --git a/drivers/net/cxgb3/cxgb3_main.c b/drivers/net/cxgb3/cxgb3_main.c index f24a27bbd30..944423c497d 100644 --- a/drivers/net/cxgb3/cxgb3_main.c +++ b/drivers/net/cxgb3/cxgb3_main.c @@ -719,7 +719,7 @@ static int upgrade_fw(struct adapter *adap) else dev_err(dev, "failed to upgrade to firmware %d.%d.%d\n", FW_VERSION_MAJOR, FW_VERSION_MINOR, FW_VERSION_MICRO); - + return ret; } @@ -746,7 +746,7 @@ static int update_tpsram(struct adapter *adap) struct device *dev = &adap->pdev->dev; int ret; char rev; - + rev = t3rev2char(adap); if (!rev) return 0; @@ -760,10 +760,10 @@ static int update_tpsram(struct adapter *adap) buf); return ret; } - + ret = t3_check_tpsram(adap, tpsram->data, tpsram->size); if (ret) - goto release_tpsram; + goto release_tpsram; ret = t3_set_proto_sram(adap, tpsram->data); if (ret == 0) @@ -779,7 +779,7 @@ static int update_tpsram(struct adapter *adap) release_tpsram: release_firmware(tpsram); - + return ret; } @@ -2144,7 +2144,7 @@ static void cxgb_netpoll(struct net_device *dev) for (qidx = pi->first_qset; qidx < pi->first_qset + pi->nqsets; qidx++) { struct sge_qset *qs = &adapter->sge.qs[qidx]; void *source; - + if (adapter->flags & USING_MSIX) source = qs; else @@ -2339,7 +2339,7 @@ static pci_ers_result_t t3_io_error_detected(struct pci_dev *pdev, cxgb_close(netdev); } - if (is_offload(adapter) && + if (is_offload(adapter) && test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map)) offload_close(&adapter->tdev); @@ -2613,7 +2613,7 @@ static int __devinit init_one(struct pci_dev *pdev, err = -ENODEV; goto out_free_dev; } - + /* * The card is now ready to go. If any errors occur during device * registration we do not fail the whole card but rather proceed only diff --git a/drivers/net/cxgb3/cxgb3_offload.c b/drivers/net/cxgb3/cxgb3_offload.c index 7086f763dd9..7e5892f1a9d 100644 --- a/drivers/net/cxgb3/cxgb3_offload.c +++ b/drivers/net/cxgb3/cxgb3_offload.c @@ -488,7 +488,7 @@ static void t3_process_tid_release_list(struct work_struct *work) tid_release_task); struct sk_buff *skb; struct t3cdev *tdev = td->dev; - + spin_lock_bh(&td->tid_release_lock); while (td->tid_release_list) { diff --git a/drivers/net/cxgb3/firmware_exports.h b/drivers/net/cxgb3/firmware_exports.h index 6a835f6a262..b75ddd8777f 100644 --- a/drivers/net/cxgb3/firmware_exports.h +++ b/drivers/net/cxgb3/firmware_exports.h @@ -76,14 +76,14 @@ #define FW_WROPCODE_MNGT 0x1D #define FW_MNGTOPCODE_PKTSCHED_SET 0x00 -/* Maximum size of a WR sent from the host, limited by the SGE. +/* Maximum size of a WR sent from the host, limited by the SGE. * - * Note: WR coming from ULP or TP are only limited by CIM. + * Note: WR coming from ULP or TP are only limited by CIM. */ #define FW_WR_SIZE 128 /* Maximum number of outstanding WRs sent from the host. Value must be - * programmed in the CTRL/TUNNEL/QP SGE Egress Context and used by + * programmed in the CTRL/TUNNEL/QP SGE Egress Context and used by * offload modules to limit the number of WRs per connection. */ #define FW_T3_WR_NUM 16 @@ -99,7 +99,7 @@ * queues must start at SGE Egress Context FW_TUNNEL_SGEEC_START and must * start at 'TID' (or 'uP Token') FW_TUNNEL_TID_START. * - * Ingress Traffic (e.g. DMA completion credit) for TUNNEL Queue[i] is sent + * Ingress Traffic (e.g. DMA completion credit) for TUNNEL Queue[i] is sent * to RESP Queue[i]. */ #define FW_TUNNEL_NUM 8 @@ -116,10 +116,10 @@ #define FW_CTRL_SGEEC_START 65528 #define FW_CTRL_TID_START 65536 -/* FW_OFLD_NUM corresponds to the number of supported OFFLOAD Queues. These - * queues must start at SGE Egress Context FW_OFLD_SGEEC_START. - * - * Note: the 'uP Token' in the SGE Egress Context fields is irrelevant for +/* FW_OFLD_NUM corresponds to the number of supported OFFLOAD Queues. These + * queues must start at SGE Egress Context FW_OFLD_SGEEC_START. + * + * Note: the 'uP Token' in the SGE Egress Context fields is irrelevant for * OFFLOAD Queues, as the host is responsible for providing the correct TID in * every WR. * @@ -129,14 +129,14 @@ #define FW_OFLD_SGEEC_START 0 /* - * + * */ #define FW_RI_NUM 1 #define FW_RI_SGEEC_START 65527 #define FW_RI_TID_START 65552 /* - * The RX_PKT_TID + * The RX_PKT_TID */ #define FW_RX_PKT_NUM 1 #define FW_RX_PKT_TID_START 65553 diff --git a/drivers/net/cxgb3/t3_hw.c b/drivers/net/cxgb3/t3_hw.c index fab138100df..dfdda4735bd 100644 --- a/drivers/net/cxgb3/t3_hw.c +++ b/drivers/net/cxgb3/t3_hw.c @@ -865,7 +865,7 @@ int t3_get_tp_version(struct adapter *adapter, u32 *vers) 1, 1, 5, 1); if (ret) return ret; - + *vers = t3_read_reg(adapter, A_TP_EMBED_OP_FIELD1); return 0; @@ -896,7 +896,7 @@ int t3_check_tpsram_version(struct adapter *adapter, int *must_load) major = G_TP_VERSION_MAJOR(vers); minor = G_TP_VERSION_MINOR(vers); - if (major == TP_VERSION_MAJOR && minor == TP_VERSION_MINOR) + if (major == TP_VERSION_MAJOR && minor == TP_VERSION_MINOR) return 0; if (major != TP_VERSION_MAJOR) @@ -913,7 +913,7 @@ int t3_check_tpsram_version(struct adapter *adapter, int *must_load) } /** - * t3_check_tpsram - check if provided protocol SRAM + * t3_check_tpsram - check if provided protocol SRAM * is compatible with this driver * @adapter: the adapter * @tp_sram: the firmware image to write @@ -2508,7 +2508,7 @@ static void tp_config(struct adapter *adap, const struct tp_params *p) t3_set_reg_field(adap, A_TP_PC_CONFIG2, F_CHDRAFULL, 0); t3_write_reg(adap, A_TP_PROXY_FLOW_CNTL, 1080); t3_write_reg(adap, A_TP_PROXY_FLOW_CNTL, 1000); - + if (adap->params.rev > 0) { tp_wr_indirect(adap, A_TP_EGRESS_CONFIG, F_REWRITEFORCETOSIZE); t3_set_reg_field(adap, A_TP_PARA_REG3, F_TXPACEAUTO, @@ -2835,7 +2835,7 @@ int t3_set_proto_sram(struct adapter *adap, u8 *data) t3_write_reg(adap, A_TP_EMBED_OP_FIELD3, cpu_to_be32(*buf++)); t3_write_reg(adap, A_TP_EMBED_OP_FIELD2, cpu_to_be32(*buf++)); t3_write_reg(adap, A_TP_EMBED_OP_FIELD1, cpu_to_be32(*buf++)); - + t3_write_reg(adap, A_TP_EMBED_OP_FIELD0, i << 1 | 1 << 31); if (t3_wait_op_done(adap, A_TP_EMBED_OP_FIELD0, 1, 1, 5, 1)) return -EIO; @@ -3425,13 +3425,13 @@ void early_hw_init(struct adapter *adapter, const struct adapter_info *ai) } /* - * Reset the adapter. + * Reset the adapter. * Older PCIe cards lose their config space during reset, PCI-X * ones don't. */ static int t3_reset_adapter(struct adapter *adapter) { - int i, save_and_restore_pcie = + int i, save_and_restore_pcie = adapter->params.rev < T3_REV_B2 && is_pcie(adapter); uint16_t devid = 0; diff --git a/drivers/net/cxgb3/xgmac.c b/drivers/net/cxgb3/xgmac.c index efcf09a709c..ffdc0a1892b 100644 --- a/drivers/net/cxgb3/xgmac.c +++ b/drivers/net/cxgb3/xgmac.c @@ -153,7 +153,7 @@ static int t3b2_mac_reset(struct cmac *mac) unsigned int oft = mac->offset; u32 val; - if (!macidx(mac)) + if (!macidx(mac)) t3_set_reg_field(adap, A_MPS_CFG, F_PORT0ACTIVE, 0); else t3_set_reg_field(adap, A_MPS_CFG, F_PORT1ACTIVE, 0); @@ -187,11 +187,11 @@ static int t3b2_mac_reset(struct cmac *mac) msleep(1); t3b_pcs_reset(mac); } - t3_write_reg(adap, A_XGM_RX_CFG + oft, + t3_write_reg(adap, A_XGM_RX_CFG + oft, F_DISPAUSEFRAMES | F_EN1536BFRAMES | F_RMFCS | F_ENJUMBO | F_ENHASHMCAST); - if (!macidx(mac)) + if (!macidx(mac)) t3_set_reg_field(adap, A_MPS_CFG, 0, F_PORT0ACTIVE); else t3_set_reg_field(adap, A_MPS_CFG, 0, F_PORT1ACTIVE); @@ -336,7 +336,7 @@ int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu) * Adjust the PAUSE frame watermarks. We always set the LWM, and the * HWM only if flow-control is enabled. */ - hwm = max_t(unsigned int, MAC_RXFIFO_SIZE - 3 * mtu, + hwm = max_t(unsigned int, MAC_RXFIFO_SIZE - 3 * mtu, MAC_RXFIFO_SIZE * 38 / 100); hwm = min(hwm, MAC_RXFIFO_SIZE - 8192); lwm = min(3 * (int)mtu, MAC_RXFIFO_SIZE / 4); @@ -449,7 +449,7 @@ int t3_mac_enable(struct cmac *mac, int which) struct adapter *adap = mac->adapter; unsigned int oft = mac->offset; struct mac_stats *s = &mac->stats; - + if (which & MAC_DIRECTION_TX) { t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CFG_CH0 + idx); t3_write_reg(adap, A_TP_PIO_DATA, 0xc0ede401);