From: Kumar Gala Date: Wed, 22 Feb 2006 15:46:02 +0000 (-0600) Subject: [PATCH] powerpc: Enable coherency for all pages on 83xx to fix PCI data corruption X-Git-Tag: v2.6.16-rc5~55^2~8 X-Git-Url: http://www.pilppa.org/gitweb/gitweb.cgi?a=commitdiff_plain;h=1775dbbcd02cab0c41329dd2cec5b69c7fafd13f;p=linux-2.6-omap-h63xx.git [PATCH] powerpc: Enable coherency for all pages on 83xx to fix PCI data corruption On the 83xx platform to ensure the PCI inbound memory is handled properly we have to turn on coherency for all pages in the MMU. Otherwise we see corruption if inbound "prefetching/streaming" is enabled on the PCI controller. Signed-off-by: Randy Vinson Signed-off-by: Kumar Gala Signed-off-by: Paul Mackerras --- diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h index 64210549f56..90d005bb4d1 100644 --- a/include/asm-powerpc/cputable.h +++ b/include/asm-powerpc/cputable.h @@ -159,9 +159,11 @@ extern void do_cpu_ftr_fixups(unsigned long offset); #endif /* We need to mark all pages as being coherent if we're SMP or we - * have a 74[45]x and an MPC107 host bridge. + * have a 74[45]x and an MPC107 host bridge. Also 83xx requires + * it for PCI "streaming/prefetch" to work properly. */ -#if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE) +#if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE) \ + || defined(CONFIG_PPC_83xx) #define CPU_FTR_COMMON CPU_FTR_NEED_COHERENT #else #define CPU_FTR_COMMON 0 @@ -277,7 +279,8 @@ enum { CPU_FTRS_G2_LE = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS, CPU_FTRS_E300 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | - CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS, + CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS | + CPU_FTR_COMMON, CPU_FTRS_CLASSIC32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE, CPU_FTRS_POWER3_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |