From: Ingo Molnar <mingo@elte.hu>
Date: Fri, 25 Jul 2008 09:37:07 +0000 (+0200)
Subject: Merge branch 'linus' into x86/pebs
X-Git-Tag: v2.6.28-rc1~734^2~3^2~3
X-Git-Url: http://www.pilppa.org/gitweb/gitweb.cgi?a=commitdiff_plain;h=0e2f65ee30eee2db054f7fd73f462c5da33ec963;p=linux-2.6-omap-h63xx.git

Merge branch 'linus' into x86/pebs

Conflicts:

	arch/x86/Kconfig.cpu
	arch/x86/kernel/cpu/intel.c
	arch/x86/kernel/setup_64.c

Signed-off-by: Ingo Molnar <mingo@elte.hu>
---

0e2f65ee30eee2db054f7fd73f462c5da33ec963
diff --cc arch/x86/Kconfig.cpu
index 13f3f8bebfd,2c518fbc52e..468ffc2df0e
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@@ -414,22 -414,4 +414,22 @@@ config X86_MINIMUM_CPU_FAMIL
  
  config X86_DEBUGCTLMSR
  	def_bool y
- 	depends on !(M586MMX || M586TSC || M586 || M486 || M386)
+ 	depends on !(MK6 || MWINCHIPC6 || MWINCHIP2 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486 || M386)
 +
 +config X86_DS
 +	bool "Debug Store support"
 +	default y
 +	help
 +	  Add support for Debug Store.
 +	  This allows the kernel to provide a memory buffer to the hardware
 +	  to store various profiling and tracing events.
 +
 +config X86_PTRACE_BTS
 +	bool "ptrace interface to Branch Trace Store"
 +	default y
 +	depends on (X86_DS && X86_DEBUGCTLMSR)
 +	help
 +	  Add a ptrace interface to allow collecting an execution trace
 +	  of the traced task.
 +	  This collects control flow changes in a (cyclic) buffer and allows
 +	  debuggers to fill in the gaps and show an execution trace of the debuggee.
diff --cc arch/x86/kernel/cpu/intel.c
index cbffa2a25a1,b75f2569b8f..f113ef4595f
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@@ -226,7 -225,21 +226,21 @@@ static void __cpuinit init_intel(struc
  	}
  
  	if (cpu_has_bts)
 -		ds_init_intel(c);
 +		ptrace_bts_init_intel(c);
+ 
+ 	/*
+ 	 * See if we have a good local APIC by checking for buggy Pentia,
+ 	 * i.e. all B steppings and the C2 stepping of P54C when using their
+ 	 * integrated APIC (see 11AP erratum in "Pentium Processor
+ 	 * Specification Update").
+ 	 */
+ 	if (cpu_has_apic && (c->x86<<8 | c->x86_model<<4) == 0x520 &&
+ 	    (c->x86_mask < 0x6 || c->x86_mask == 0xb))
+ 		set_cpu_cap(c, X86_FEATURE_11AP);
+ 
+ #ifdef CONFIG_X86_NUMAQ
+ 	numaq_tsc_disable();
+ #endif
  }
  
  static unsigned int __cpuinit intel_size_cache(struct cpuinfo_x86 *c, unsigned int size)
diff --cc include/asm-x86/ptrace-abi.h
index 9bcaa75cbca,72e7b9db29b..3397817eded
--- a/include/asm-x86/ptrace-abi.h
+++ b/include/asm-x86/ptrace-abi.h
@@@ -73,16 -73,15 +73,16 @@@
  
  #ifdef __x86_64__
  # define PTRACE_ARCH_PRCTL	  30
- #else
- # define PTRACE_SYSEMU		  31
- # define PTRACE_SYSEMU_SINGLESTEP 32
  #endif
  
+ #define PTRACE_SYSEMU		  31
+ #define PTRACE_SYSEMU_SINGLESTEP  32
+ 
  #define PTRACE_SINGLEBLOCK	33	/* resume execution until next branch */
  
 -#ifndef __ASSEMBLY__
 +#ifdef CONFIG_X86_PTRACE_BTS
  
 +#ifndef __ASSEMBLY__
  #include <asm/types.h>
  
  /* configuration/status structure used in PTRACE_BTS_CONFIG and