2.14 /proc/<pid>/io - Display the IO accounting fields
2.15 /proc/<pid>/coredump_filter - Core dump filtering settings
2.16 /proc/<pid>/mountinfo - Information about mounts
++++ + ++ ++ ++ + ++ 2.17 /proc/sys/fs/epoll - Configuration options for the epoll interface
------------------------------------------------------------------------------
Preface
Enables/Disables the NMI watchdog on x86 systems. When the value is non-zero
the NMI watchdog is enabled and will continuously test all online cpus to
------------------ -----------determine whether or not they are still functioning properly.
++++++++++++++++++ +++++++++++determine whether or not they are still functioning properly. Currently,
++++++++++++++++++ +++++++++++passing "nmi_watchdog=" parameter at boot time is required for this function
++++++++++++++++++ +++++++++++to work.
------------------ -----------Because the NMI watchdog shares registers with oprofile, by disabling the NMI
------------------ -----------watchdog, oprofile may have more registers to utilize.
++++++++++++++++++ +++++++++++If LAPIC NMI watchdog method is in use (nmi_watchdog=2 kernel parameter), the
++++++++++++++++++ +++++++++++NMI watchdog shares registers with oprofile. By disabling the NMI watchdog,
++++++++++++++++++ +++++++++++oprofile may have more registers to utilize.
msgmni
------
Documentation/filesystems/sharedsubtree.txt
++++ + ++ ++ ++ + ++ 2.17 /proc/sys/fs/epoll - Configuration options for the epoll interface
++++ + ++ ++ ++ + ++ --------------------------------------------------------
++++ + ++ ++ ++ + ++
++++ + ++ ++ ++ + ++ This directory contains configuration options for the epoll(7) interface.
++++ + ++ ++ ++ + ++
++++ + ++ ++ ++ + ++ max_user_instances
++++ + ++ ++ ++ + ++ ------------------
++++ + ++ ++ ++ + ++
++++ + ++ ++ ++ + ++ This is the maximum number of epoll file descriptors that a single user can
++++ + ++ ++ ++ + ++ have open at a given time. The default value is 128, and should be enough
++++ + ++ ++ ++ + ++ for normal users.
++++ + ++ ++ ++ + ++
++++ + ++ ++ ++ + ++ max_user_watches
++++ + ++ ++ ++ + ++ ----------------
++++ + ++ ++ ++ + ++
++++ + ++ ++ ++ + ++ Every epoll file descriptor can store a number of files to be monitored
++++ + ++ ++ ++ + ++ for event readiness. Each one of these monitored files constitutes a "watch".
++++ + ++ ++ ++ + ++ This configuration option sets the maximum number of "watches" that are
++++ + ++ ++ ++ + ++ allowed for each user.
++++ + ++ ++ ++ + ++ Each "watch" costs roughly 90 bytes on a 32bit kernel, and roughly 160 bytes
++++ + ++ ++ ++ + ++ on a 64bit one.
++++ + ++ ++ ++ + ++ The current default value for max_user_watches is the 1/32 of the available
++++ + ++ ++ ++ + ++ low memory, divided for the "watch" cost in bytes.
++++ + ++ ++ ++ + ++
++++ + ++ ++ ++ + ++
------------------------------------------------------------------------------
++++ + ++ ++ ++ + ++
X86-32 X86-32, aka i386 architecture is enabled.
X86-64 X86-64 architecture is enabled.
More X86-64 boot options can be found in
- -- - - Documentation/x86_64/boot-options.txt .
+ ++ + + Documentation/x86/x86_64/boot-options.txt .
X86 Either 32bit or 64bit x86 (same as X86-32+X86-64)
In addition, the following text indicates that the option:
Parameters denoted with BOOT are actually interpreted by the boot
loader, and have no meaning to the kernel directly.
Do not modify the syntax of boot loader parameters without extreme
- -- - - need or coordination with <Documentation/i386/boot.txt>.
+ ++ + + need or coordination with <Documentation/x86/i386/boot.txt>.
There are also arch-specific kernel-parameters not documented here.
- -- - - See for example <Documentation/x86_64/boot-options.txt>.
+ ++ + + See for example <Documentation/x86/x86_64/boot-options.txt>.
Note that ALL kernel parameters listed below are CASE SENSITIVE, and that
a trailing = on the name of any parameter states that that parameter will
that require a timer override, but don't have
HPET
- - - -- -- - - acpi.debug_layer= [HW,ACPI]
- -- - - Format: <int>
- -- - - Each bit of the <int> indicates an ACPI debug layer,
- -- - - 1: enable, 0: disable. It is useful for boot time
- -- - - debugging. After system has booted up, it can be set
- -- - - via /sys/module/acpi/parameters/debug_layer.
- -- - - CONFIG_ACPI_DEBUG must be enabled for this to produce any output.
- -- - - Available bits (add the numbers together) to enable debug output
- -- - - for specific parts of the ACPI subsystem:
- -- - - 0x01 utilities 0x02 hardware 0x04 events 0x08 tables
- -- - - 0x10 namespace 0x20 parser 0x40 dispatcher
- -- - - 0x80 executer 0x100 resources 0x200 acpica debugger
- -- - - 0x400 os services 0x800 acpica disassembler.
- -- - - The number can be in decimal or prefixed with 0x in hex.
- -- - - Warning: Many of these options can produce a lot of
- -- - - output and make your system unusable. Be very careful.
- -- - -
- -- - - acpi.debug_level= [HW,ACPI]
+ + + ++ ++ + + acpi_backlight= [HW,ACPI]
+ + + ++ ++ + + acpi_backlight=vendor
+ + + ++ ++ + + acpi_backlight=video
+ + + ++ ++ + + If set to vendor, prefer vendor specific driver
+ + + ++ ++ + + (e.g. thinkpad_acpi, sony_acpi, etc.) instead
+ + + ++ ++ + + of the ACPI video.ko driver.
+ + + ++ ++ + +
+ + + ++ ++ + + acpi_display_output= [HW,ACPI]
+ + + ++ ++ + + acpi_display_output=vendor
+ + + ++ ++ + + acpi_display_output=video
+ + + ++ ++ + + See above.
+ + + ++ ++ + +
+ + + ++ ++ + + acpi.debug_layer= [HW,ACPI,ACPI_DEBUG]
+ + + ++ ++ + + acpi.debug_level= [HW,ACPI,ACPI_DEBUG]
Format: <int>
- - - - Each bit of the <int> indicates an ACPI debug layer,
- Each bit of the <int> indicates an ACPI debug level,
- - - - - 1: enable, 0: disable. It is useful for boot time
- - - - - debugging. After system has booted up, it can be set
- - - - via /sys/module/acpi/parameters/debug_layer.
- via /sys/module/acpi/parameters/debug_level.
- - - - - CONFIG_ACPI_DEBUG must be enabled for this to produce any output.
- - - - Available bits (add the numbers together) to enable debug output
- - - - for specific parts of the ACPI subsystem:
- - - - 0x01 utilities 0x02 hardware 0x04 events 0x08 tables
- - - - 0x10 namespace 0x20 parser 0x40 dispatcher
- - - - 0x80 executer 0x100 resources 0x200 acpica debugger
- - - - 0x400 os services 0x800 acpica disassembler.
- Available bits (add the numbers together) to enable different
- debug output levels of the ACPI subsystem:
- 0x01 error 0x02 warn 0x04 init 0x08 debug object
- 0x10 info 0x20 init names 0x40 parse 0x80 load
- 0x100 dispatch 0x200 execute 0x400 names 0x800 operation region
- 0x1000 bfield 0x2000 tables 0x4000 values 0x8000 objects
- 0x10000 resources 0x20000 user requests 0x40000 package.
- - - - - The number can be in decimal or prefixed with 0x in hex.
- - - - - Warning: Many of these options can produce a lot of
- - - - - output and make your system unusable. Be very careful.
- - - -
- - - - acpi.debug_level= [HW,ACPI]
- - - - Format: <int>
- - -- -- - - Each bit of the <int> indicates an ACPI debug level,
- - -- -- - - which corresponds to the level in an ACPI_DEBUG_PRINT
- - -- -- - - statement. After system has booted up, this mask
- - -- -- - - can be set via /sys/module/acpi/parameters/debug_level.
- - -- -- - -
- - -- -- - - CONFIG_ACPI_DEBUG must be enabled for this to produce
- - -- -- - - any output. The number can be in decimal or prefixed
- - -- -- - - with 0x in hex. Some of these options produce so much
- - -- -- - - output that the system is unusable.
- - -- -- - -
- - -- -- - - The following global components are defined by the
- - -- -- - - ACPI CA:
- - -- -- - - 0x01 error
- - -- -- - - 0x02 warn
- - -- -- - - 0x04 init
- - -- -- - - 0x08 debug object
- - -- -- - - 0x10 info
- - -- -- - - 0x20 init names
- - -- -- - - 0x40 parse
- - -- -- - - 0x80 load
- - -- -- - - 0x100 dispatch
- - -- -- - - 0x200 execute
- - -- -- - - 0x400 names
- - -- -- - - 0x800 operation region
- - -- -- - - 0x1000 bfield
- - -- -- - - 0x2000 tables
- - -- -- - - 0x4000 values
- - -- -- - - 0x8000 objects
- - -- -- - - 0x10000 resources
- - -- -- - - 0x20000 user requests
- - -- -- - - 0x40000 package
- - -- -- - - The number can be in decimal or prefixed with 0x in hex.
- - -- -- - - Warning: Many of these options can produce a lot of
- - -- -- - - output and make your system unusable. Be very careful.
+ + + ++ ++ + + CONFIG_ACPI_DEBUG must be enabled to produce any ACPI
+ + + ++ ++ + + debug output. Bits in debug_layer correspond to a
+ + + ++ ++ + + _COMPONENT in an ACPI source file, e.g.,
+ + + ++ ++ + + #define _COMPONENT ACPI_PCI_COMPONENT
+ + + ++ ++ + + Bits in debug_level correspond to a level in
+ + + ++ ++ + + ACPI_DEBUG_PRINT statements, e.g.,
+ + + ++ ++ + + ACPI_DEBUG_PRINT((ACPI_DB_INFO, ...
+ + + ++ ++ + + See Documentation/acpi/debug.txt for more information
+ + + ++ ++ + + about debug layers and levels.
+ + + ++ ++ + +
+ + + ++ ++ + + Enable AML "Debug" output, i.e., stores to the Debug
+ + + ++ ++ + + object while interpreting AML:
+ + + ++ ++ + + acpi.debug_layer=0xffffffff acpi.debug_level=0x2
+ + + ++ ++ + + Enable PCI/PCI interrupt routing info messages:
+ + + ++ ++ + + acpi.debug_layer=0x400000 acpi.debug_level=0x4
+ + + ++ ++ + + Enable all messages related to ACPI hardware:
+ + + ++ ++ + + acpi.debug_layer=0x2 acpi.debug_level=0xffffffff
+ + + ++ ++ + +
+ + + ++ ++ + + Some values produce so much output that the system is
+ + + ++ ++ + + unusable. The "log_buf_len" parameter may be useful
+ + + ++ ++ + + if you need to capture more output.
+
+ acpi.power_nocheck= [HW,ACPI]
+ Format: 1/0 enable/disable the check of power state.
+ On some bogus BIOS the _PSC object/_STA object of
+ power resource can't return the correct device power
+ state. In such case it is unneccessary to check its
+ power state again in power transition.
+ 1 : disable the power state check
acpi_pm_good [X86-32,X86-64]
Override the pmtimer bug detection: force the kernel
Possible values are:
isolate - enable device isolation (each device, as far
as possible, will get its own protection
- - - -- -- - - domain)
+ + + ++ ++ + + domain) [default]
+ + + ++ ++ + + share - put every device behind one IOMMU into the
+ + + ++ ++ + + same protection domain
fullflush - enable flushing of IO/TLB entries when
they are unmapped. Otherwise they are
flushed before they will be reused, which
digiepca= [HW,SERIAL]
See drivers/char/README.epca and
- - - -- -- - - Documentation/digiepca.txt.
+ + + ++ ++ + + Documentation/serial/digiepca.txt.
disable_mtrr_cleanup [X86]
enable_mtrr_cleanup [X86]
See header of drivers/scsi/fdomain.c.
floppy= [HW]
- - - -- -- - - See Documentation/floppy.txt.
+ + + ++ ++ + + See Documentation/blockdev/floppy.txt.
force_pal_cache_flush
[IA-64] Avoid check_sal_cache_flush which may hang on
Format:
<cpu number>,...,<cpu number>
or
- - -- - - <cpu number>-<cpu number> (must be a positive range in ascending order)
+ + ++ + + <cpu number>-<cpu number>
+ + ++ + + (must be a positive range in ascending order)
or a mixture
<cpu number>,...,<cpu number>-<cpu number>
+ + ++ + +
This option can be used to specify one or more CPUs
to isolate from the general SMP balancing and scheduling
- - -- - - algorithms. The only way to move a process onto or off
- - -- - - an "isolated" CPU is via the CPU affinity syscalls.
+ + ++ + + algorithms. You can move a process onto or off an
+ + ++ + + "isolated" CPU via the CPU affinity syscalls or cpuset.
<cpu number> begins at 0 and the maximum value is
"number of CPUs in system - 1".
the same attribute, the last one is used.
load_ramdisk= [RAM] List of ramdisks to load from floppy
- - - -- -- - - See Documentation/ramdisk.txt.
+ + + ++ ++ + + See Documentation/blockdev/ramdisk.txt.
lockd.nlm_grace_period=P [NFS] Assign grace period.
Format: <integer>
it is equivalent to "nosmp", which also disables
the IO APIC.
- - - -- -- - - max_addr=[KMG] [KNL,BOOT,ia64] All physical memory greater than or
- - - -- -- - - equal to this physical address is ignored.
+ + + ++ ++ + + max_addr=nn[KMG] [KNL,BOOT,ia64] All physical memory greater than
+ + + ++ ++ + + or equal to this physical address is ignored.
max_luns= [SCSI] Maximum number of LUNs to probe.
Should be between 1 and 2^32-1.
mce [X86-32] Machine Check Exception
- -- - - mce=option [X86-64] See Documentation/x86_64/boot-options.txt
+ ++ + + mce=option [X86-64] See Documentation/x86/x86_64/boot-options.txt
md= [HW] RAID subsystems devices and level
See Documentation/md.txt.
mga= [HW,DRM]
+ + + ++ ++ + + min_addr=nn[KMG] [KNL,BOOT,ia64] All physical memory below this
+ + + ++ ++ + + physical address is ignored.
+ + + ++ ++ + +
mminit_loglevel=
[KNL] When CONFIG_DEBUG_MEMORY_INIT is set, this
parameter allows control of the logging verbosity for
when a NMI is triggered.
Format: [state][,regs][,debounce][,die]
------------------ ----------- nmi_watchdog= [KNL,BUGS=X86-32] Debugging features for SMP kernels
++++++++++++++++++ +++++++++++ nmi_watchdog= [KNL,BUGS=X86-32,X86-64] Debugging features for SMP kernels
++++++++++++++++++ +++++++++++ Format: [panic,][num]
++++++++++++++++++ +++++++++++ Valid num: 0,1,2
++++++++++++++++++ +++++++++++ 0 - turn nmi_watchdog off
++++++++++++++++++ +++++++++++ 1 - use the IO-APIC timer for the NMI watchdog
++++++++++++++++++ +++++++++++ 2 - use the local APIC for the NMI watchdog using
++++++++++++++++++ +++++++++++ a performance counter. Note: This will use one performance
++++++++++++++++++ +++++++++++ counter and the local APIC's performance vector.
++++++++++++++++++ +++++++++++ When panic is specified panic when an NMI watchdog timeout occurs.
++++++++++++++++++ +++++++++++ This is useful when you use a panic=... timeout and need the box
++++++++++++++++++ +++++++++++ quickly up again.
++++++++++++++++++ +++++++++++ Instead of 1 and 2 it is possible to use the following
++++++++++++++++++ +++++++++++ symbolic names: lapic and ioapic
++++++++++++++++++ +++++++++++ Example: nmi_watchdog=2 or nmi_watchdog=panic,lapic
no387 [BUGS=X86-32] Tells the kernel to use the 387 maths
emulation library even if a 387 maths coprocessor
Valid arguments: on, off
Default: on
- - -- - - noirqbalance [X86-32,SMP,KNL] Disable kernel irq balancing
- - -- - -
noirqdebug [X86-32] Disables the code which attempts to detect and
disable unhandled interrupt sources.
pcd. [PARIDE]
See header of drivers/block/paride/pcd.c.
- - - -- -- - - See also Documentation/paride.txt.
+ + + ++ ++ + + See also Documentation/blockdev/paride.txt.
pci=option[,option...] [PCI] various PCI subsystem options:
off [X86] don't probe for the PCI bus
nomsi [MSI] If the PCI_MSI kernel config parameter is
enabled, this kernel boot option can be used to
disable the use of MSI interrupts system-wide.
++++++++++++++++++++ +++++++++ noioapicquirk [APIC] Disable all boot interrupt quirks.
++++++++++++++++++++ +++++++++ Safety option to keep boot IRQs enabled. This
++++++++++++++++++++ +++++++++ should never be necessary.
++++++++++++++++++++ +++++++++ ioapicreroute [APIC] Enable rerouting of boot IRQs to the
++++++++++++++++++++ +++++++++ primary IO-APIC for bridges that cannot disable
++++++++++++++++++++ +++++++++ boot IRQs. This fixes a source of spurious IRQs
++++++++++++++++++++ +++++++++ when the system masks IRQs.
++++++++++++++++++++ +++++++++ noioapicreroute [APIC] Disable workaround that uses the
++++++++++++++++++++ +++++++++ boot IRQ equivalent of an IRQ that connects to
++++++++++++++++++++ +++++++++ a chipset where boot IRQs cannot be disabled.
++++++++++++++++++++ +++++++++ The opposite of ioapicreroute.
biosirq [X86-32] Use PCI BIOS calls to get the interrupt
routing table. These calls are known to be buggy
on several machines and they hang the machine
pcmv= [HW,PCMCIA] BadgePAD 4
pd. [PARIDE]
- - - -- -- - - See Documentation/paride.txt.
+ + + ++ ++ + + See Documentation/blockdev/paride.txt.
pdcchassis= [PARISC,HW] Disable/Enable PDC Chassis Status codes at
boot time.
See arch/parisc/kernel/pdc_chassis.c
pf. [PARIDE]
- - - -- -- - - See Documentation/paride.txt.
+ + + ++ ++ + + See Documentation/blockdev/paride.txt.
pg. [PARIDE]
- - - -- -- - - See Documentation/paride.txt.
+ + + ++ ++ + + See Documentation/blockdev/paride.txt.
pirq= [SMP,APIC] Manual mp-table setup
- -- - - See Documentation/i386/IO-APIC.txt.
+ ++ + + See Documentation/x86/i386/IO-APIC.txt.
plip= [PPT,NET] Parallel port network link
Format: { parport<nr> | timid | 0 }
Override pmtimer IOPort with a hex value.
e.g. pmtmr=0x508
+ pnp.debug [PNP]
+ Enable PNP debug messages. This depends on the
+ CONFIG_PNP_DEBUG_MESSAGES option.
+
pnpacpi= [ACPI]
{ off }
prompt_ramdisk= [RAM] List of RAM disks to prompt for floppy disk
before loading.
- - - -- -- - - See Documentation/ramdisk.txt.
+ + + ++ ++ + + See Documentation/blockdev/ramdisk.txt.
psmouse.proto= [HW,MOUSE] Highest PS2 mouse protocol extension to
probe for; one of (bare|imps|exps|lifebook|any).
<io>,<mss_io>,<mss_irq>,<mss_dma>,<mpu_io>,<mpu_irq>
pt. [PARIDE]
- - - -- -- - - See Documentation/paride.txt.
+ + + ++ ++ + + See Documentation/blockdev/paride.txt.
pty.legacy_count=
[KNL] Number of legacy pty's. Overwrites compiled-in
See Documentation/md.txt.
ramdisk_blocksize= [RAM]
- - - -- -- - - See Documentation/ramdisk.txt.
+ + + ++ ++ + + See Documentation/blockdev/ramdisk.txt.
ramdisk_size= [RAM] Sizes of RAM disks in kilobytes
- - - -- -- - - See Documentation/ramdisk.txt.
+ + + ++ ++ + + See Documentation/blockdev/ramdisk.txt.
rcupdate.blimit= [KNL,BOOT]
Set maximum number of finished RCU callbacks to process
See Documentation/sonypi.txt
specialix= [HW,SERIAL] Specialix multi-serial port adapter
- - - -- -- - - See Documentation/specialix.txt.
+ + + ++ ++ + + See Documentation/serial/specialix.txt.
spia_io_base= [HW,MTD]
spia_fio_base=
thermal.crt= [HW,ACPI]
-1: disable all critical trip points in all thermal zones
- <degrees C>: lower all critical trip points
+ <degrees C>: override all critical trip points
thermal.nocrt= [HW,ACPI]
Set to disable actions on ACPI thermal zone
Format:
<io>,<irq>,<dma>,<dma2>,<sb_io>,<sb_irq>,<sb_dma>,<mpu_io>,<mpu_irq>
+++++++ ++++++++++++++++++++++ tsc= Disable clocksource-must-verify flag for TSC.
+++++++ ++++++++++++++++++++++ Format: <string>
+++++++ ++++++++++++++++++++++ [x86] reliable: mark tsc clocksource as reliable, this
+++++++ ++++++++++++++++++++++ disables clocksource verification at runtime.
+++++++ ++++++++++++++++++++++ Used to enable high-resolution timer mode on older
+++++++ ++++++++++++++++++++++ hardware, and in virtualized environment.
+++++++ ++++++++++++++++++++++
turbografx.map[2|3]= [HW,JOY]
TurboGraFX parallel port interface
Format:
See Documentation/fb/modedb.txt.
vga= [BOOT,X86-32] Select a particular video mode
- -- - - See Documentation/i386/boot.txt and
+ ++ + + See Documentation/x86/i386/boot.txt and
Documentation/svga.txt.
Use vga=ask for menu.
This is actually a boot loader parameter; the value is
nolapic Don't use the local APIC (alias for i386 compatibility)
- -- - - pirq=... See Documentation/i386/IO-APIC.txt
+ ++ + + pirq=... See Documentation/x86/i386/IO-APIC.txt
noapictimer Don't set up the APIC timer
Report when timer interrupts are lost because some code turned off
interrupts for too long.
------------------ ----------- nmi_watchdog=NUMBER[,panic]
------------------ ----------- NUMBER can be:
------------------ ----------- 0 don't use an NMI watchdog
------------------ ----------- 1 use the IO-APIC timer for the NMI watchdog
------------------ ----------- 2 use the local APIC for the NMI watchdog using a performance counter. Note
------------------ ----------- This will use one performance counter and the local APIC's performance
------------------ ----------- vector.
------------------ ----------- When panic is specified panic when an NMI watchdog timeout occurs.
------------------ ----------- This is useful when you use a panic=... timeout and need the box
------------------ ----------- quickly up again.
------------------ -----------
nohpet
Don't use the HPET timer.
SMP
additional_cpus=NUM Allow NUM more CPUs for hotplug
- -- - - (defaults are specified by the BIOS, see Documentation/x86_64/cpu-hotplug-spec)
+ ++ + + (defaults are specified by the BIOS, see Documentation/x86/x86_64/cpu-hotplug-spec)
NUMA
config X86
def_bool y
select HAVE_AOUT if X86_32
+++++++++++++ ++++++++++++++++ select HAVE_READQ
+++++++++++++ ++++++++++++++++ select HAVE_WRITEQ
select HAVE_UNSTABLE_SCHED_CLOCK
select HAVE_IDE
select HAVE_OPROFILE
select HAVE_KRETPROBES
select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_DYNAMIC_FTRACE
- - - - select HAVE_FTRACE
+ + + + select HAVE_FUNCTION_TRACER
select HAVE_KVM if ((X86_32 && !X86_VOYAGER && !X86_VISWS && !X86_NUMAQ) || X86_64)
select HAVE_ARCH_KGDB if !X86_VOYAGER
select HAVE_ARCH_TRACEHOOK
config GENERIC_BUG
def_bool y
depends on BUG
+++++ ++++++++++++++++++++++++ select GENERIC_BUG_RELATIVE_POINTERS if X86_64
+++++ ++++++++++++++++++++++++
+++++ ++++++++++++++++++++++++config GENERIC_BUG_RELATIVE_POINTERS
+++++ ++++++++++++++++++++++++ bool
config GENERIC_HWEIGHT
def_bool y
config ARCH_HAS_CPU_RELAX
def_bool y
+ config ARCH_HAS_DEFAULT_IDLE
+ def_bool y
+
config ARCH_HAS_CACHE_LINE_SIZE
def_bool y
config X86_SMP
bool
depends on SMP && ((X86_32 && !X86_VOYAGER) || X86_64)
- - - -- -- - - select USE_GENERIC_SMP_HELPERS
default y
+ + + ++ ++ + + config USE_GENERIC_SMP_HELPERS
+ + + ++ ++ + + def_bool y
+ + + ++ ++ + + depends on SMP
+ + + ++ ++ + +
config X86_32_SMP
def_bool y
depends on X86_32 && SMP
If you don't know what to do here, say N.
+ ++ + + config X86_HAS_BOOT_CPU_ID
+ ++ + + def_bool y
+ ++ + + depends on X86_VOYAGER
+ ++ + +
config X86_FIND_SMP_CONFIG
def_bool y
depends on X86_MPPARSE || X86_VOYAGER
-- ---------------------------if ACPI
config X86_MPPARSE
-- --------------------------- def_bool y
-- --------------------------- bool "Enable MPS table"
++ +++++++++++++++++++++++++++ bool "Enable MPS table" if ACPI
++ +++++++++++++++++++++++++++ default y
depends on X86_LOCAL_APIC
help
For old smp systems that do not have proper acpi support. Newer systems
(esp with 64bit cpus) with acpi support, MADT and DSDT will override it
-- ---------------------------endif
-- ---------------------------
-- ---------------------------if !ACPI
-- ---------------------------config X86_MPPARSE
-- --------------------------- def_bool y
-- --------------------------- depends on X86_LOCAL_APIC
-- ---------------------------endif
choice
prompt "Subarchitecture Type"
def_bool y
depends on X86_GENERICARCH
---------------------- -------config ES7000_CLUSTERED_APIC
---------------------- ------- def_bool y
---------------------- ------- depends on SMP && X86_ES7000 && MPENTIUMIII
---------------------- -------
source "arch/x86/Kconfig.cpu"
config HPET_TIMER
def_bool y
depends on X86_32 && X86_VISWS
++++++++++++++++++++ +++++++++config X86_REROUTE_FOR_BROKEN_BOOT_IRQS
++++++++++++++++++++ +++++++++ bool "Reroute for broken boot IRQs"
++++++++++++++++++++ +++++++++ default n
++++++++++++++++++++ +++++++++ depends on X86_IO_APIC
++++++++++++++++++++ +++++++++ help
++++++++++++++++++++ +++++++++ This option enables a workaround that fixes a source of
++++++++++++++++++++ +++++++++ spurious interrupts. This is recommended when threaded
++++++++++++++++++++ +++++++++ interrupt handling is used on systems where the generation of
++++++++++++++++++++ +++++++++ superfluous "boot interrupts" cannot be disabled.
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++ Some chipsets generate a legacy INTx "boot IRQ" when the IRQ
++++++++++++++++++++ +++++++++ entry in the chipset's IO-APIC is masked (as, e.g. the RT
++++++++++++++++++++ +++++++++ kernel does during interrupt handling). On chipsets where this
++++++++++++++++++++ +++++++++ boot IRQ generation cannot be disabled, this workaround keeps
++++++++++++++++++++ +++++++++ the original IRQ line masked so that only the equivalent "boot
++++++++++++++++++++ +++++++++ IRQ" is delivered to the CPUs. The workaround also tells the
++++++++++++++++++++ +++++++++ kernel to set up the IRQ handler on the boot IRQ line. In this
++++++++++++++++++++ +++++++++ way only one interrupt is delivered to the kernel. Otherwise
++++++++++++++++++++ +++++++++ the spurious second interrupt may cause the kernel to bring
++++++++++++++++++++ +++++++++ down (vital) interrupt lines.
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++ Only affects "broken" chipsets. Interrupt sharing may be
++++++++++++++++++++ +++++++++ increased on these systems.
++++++++++++++++++++ +++++++++
config X86_MCE
bool "Machine Check Exception"
depends on !X86_VOYAGER
config ARCH_PHYS_ADDR_T_64BIT
def_bool X86_64 || X86_PAE
++++++++++++++++ +++++++++++++config DIRECT_GBPAGES
++++++++++++++++ +++++++++++++ bool "Enable 1GB pages for kernel pagetables" if EMBEDDED
++++++++++++++++ +++++++++++++ default y
++++++++++++++++ +++++++++++++ depends on X86_64
++++++++++++++++ +++++++++++++ help
++++++++++++++++ +++++++++++++ Allow the kernel linear mapping to use 1GB pages on CPUs that
++++++++++++++++ +++++++++++++ support it. This can improve the kernel's performance a tiny bit by
++++++++++++++++ +++++++++++++ reducing TLB pressure. If in doubt, say "Y".
++++++++++++++++ +++++++++++++
# Common NUMA Features
config NUMA
-------- --------------------- bool "Numa Memory Allocation and Scheduler Support (EXPERIMENTAL)"
++++++++ +++++++++++++++++++++ bool "Numa Memory Allocation and Scheduler Support"
depends on SMP
- depends on X86_64 || (X86_32 && HIGHMEM64G && (X86_NUMAQ || X86_BIGSMP || X86_SUMMIT && ACPI) && BROKEN)
+ depends on X86_64 || (X86_32 && HIGHMEM64G && (X86_NUMAQ || X86_BIGSMP || X86_SUMMIT && ACPI) && EXPERIMENTAL)
default n if X86_PC
default y if (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP)
help
Enable NUMA (Non Uniform Memory Access) support.
++++++++ +++++++++++++++++++++
The kernel will try to allocate memory used by a CPU on the
local memory controller of the CPU and add some more
NUMA awareness to the kernel.
-------- --------------------- For 32-bit this is currently highly experimental and should be only
-------- --------------------- used for kernel development. It might also cause boot failures.
-------- --------------------- For 64-bit this is recommended on all multiprocessor Opteron systems.
-------- --------------------- If the system is EM64T, you should say N unless your system is
-------- --------------------- EM64T NUMA.
++++++++ +++++++++++++++++++++ For 64-bit this is recommended if the system is Intel Core i7
++++++++ +++++++++++++++++++++ (or later), AMD Opteron, or EM64T NUMA.
++++++++ +++++++++++++++++++++
++++++++ +++++++++++++++++++++ For 32-bit this is only needed on (rare) 32-bit-only platforms
++++++++ +++++++++++++++++++++ that support NUMA topologies, such as NUMAQ / Summit, or if you
++++++++ +++++++++++++++++++++ boot a 32-bit kernel on a 64-bit NUMA platform.
++++++++ +++++++++++++++++++++
++++++++ +++++++++++++++++++++ Otherwise, you should say N.
comment "NUMA (Summit) requires SMP, 64GB highmem support, ACPI"
depends on X86_32 && X86_SUMMIT && (!HIGHMEM64G || !ACPI)
def_bool y
depends on X86_64 || (X86_32 && HIGHMEM)
++++++++++++++++ +++++++++++++config ARCH_ENABLE_MEMORY_HOTREMOVE
++++++++++++++++ +++++++++++++ def_bool y
++++++++++++++++ +++++++++++++ depends on MEMORY_HOTPLUG
++++++++++++++++ +++++++++++++
config HAVE_ARCH_EARLY_PFN_TO_NID
def_bool X86_64
depends on NUMA
- - -- - - menu "Power management options"
+ + ++ + + menu "Power management and ACPI options"
depends on !X86_VOYAGER
config ARCH_HIBERNATION_HEADER
many of the newer IBM Thinkpads. If you experience hangs when you
suspend, try setting this to Y. Otherwise, say N.
----------------------- ------config APM_REAL_MODE_POWER_OFF
----------------------- ------ bool "Use real mode APM BIOS call to power off"
----------------------- ------ help
----------------------- ------ Use real mode APM BIOS calls to switch off the computer. This is
----------------------- ------ a work-around for a number of buggy BIOSes. Switch this option on if
----------------------- ------ your computer crashes instead of powering off properly.
----------------------- ------
endif # APM
source "arch/x86/kernel/cpu/cpufreq/Kconfig"
source "drivers/cpuidle/Kconfig"
+ source "drivers/idle/Kconfig"
+
endmenu
endmenu
+ + ++ + + config HAVE_ATOMIC_IOMAP
+ + ++ + + def_bool y
+ + ++ + + depends on X86_32
+ + ++ + +
source "net/Kconfig"
source "drivers/Kconfig"
data. This is recommended so that we can catch kernel bugs sooner.
If in doubt, say "Y".
---------------- -------------config DIRECT_GBPAGES
---------------- ------------- bool "Enable gbpages-mapped kernel pagetables"
---------------- ------------- depends on DEBUG_KERNEL && EXPERIMENTAL && X86_64
---------------- ------------- help
---------------- ------------- Enable gigabyte pages support (if the CPU supports it). This can
---------------- ------------- improve the kernel's performance a tiny bit by reducing TLB
---------------- ------------- pressure.
---------------- -------------
---------------- ------------- This is experimental code.
---------------- -------------
---------------- ------------- If in doubt, say "N".
---------------- -------------
config DEBUG_RODATA_TEST
bool "Testcase for the DEBUG_RODATA feature"
depends on DEBUG_RODATA
developers have marked 'inline'. Doing so takes away freedom from gcc to
do what it thinks is best, which is desirable for the gcc 3.x series of
compilers. The gcc 4.x series have a rewritten inlining algorithm and
-------- --------------------- disabling this option will generate a smaller kernel there. Hopefully
-------- --------------------- this algorithm is so good that allowing gcc4 to make the decision can
-------- --------------------- become the default in the future, until then this option is there to
-------- --------------------- test gcc for this.
++++++++ +++++++++++++++++++++ enabling this option will generate a smaller kernel there. Hopefully
++++++++ +++++++++++++++++++++ this algorithm is so good that allowing gcc 4.x and above to make the
++++++++ +++++++++++++++++++++ decision will become the default in the future. Until then this option
++++++++ +++++++++++++++++++++ is there to test gcc for this.
If unsure, say N.
#include <asm/proto.h>
#include <asm/vdso.h>
+++++++++++++++++++++++++ ++++#include <asm/sigframe.h>
+++++++++++++++++++++++++ ++++
#define DEBUG_SIG 0
#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
X86_EFLAGS_ZF | X86_EFLAGS_AF | X86_EFLAGS_PF | \
X86_EFLAGS_CF)
------------------------- ----asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset);
void signal_fault(struct pt_regs *regs, void __user *frame, char *where);
int copy_siginfo_to_user32(compat_siginfo_t __user *to, siginfo_t *from)
/*
* Do a signal return; undo the signal stack.
*/
+++++++++++++++++++++++++ ++++#define COPY(x) { \
+++++++++++++++++++++++++ ++++ err |= __get_user(regs->x, &sc->x); \
+++++++++++++++++++++++++ ++++}
------------------------- ----struct sigframe
------------------------- ----{
------------------------- ---- u32 pretcode;
------------------------- ---- int sig;
------------------------- ---- struct sigcontext_ia32 sc;
------------------------- ---- struct _fpstate_ia32 fpstate_unused; /* look at kernel/sigframe.h */
------------------------- ---- unsigned int extramask[_COMPAT_NSIG_WORDS-1];
------------------------- ---- char retcode[8];
------------------------- ---- /* fp state follows here */
------------------------- ----};
------------------------- ----
------------------------- ----struct rt_sigframe
------------------------- ----{
------------------------- ---- u32 pretcode;
------------------------- ---- int sig;
------------------------- ---- u32 pinfo;
------------------------- ---- u32 puc;
------------------------- ---- compat_siginfo_t info;
------------------------- ---- struct ucontext_ia32 uc;
------------------------- ---- char retcode[8];
------------------------- ---- /* fp state follows here */
------------------------- ----};
------------------------- ----
------------------------- ----#define COPY(x) { \
------------------------- ---- unsigned int reg; \
------------------------- ---- err |= __get_user(reg, &sc->x); \
------------------------- ---- regs->x = reg; \
+++++++++++++++++++++++++ ++++#define COPY_SEG_CPL3(seg) { \
+++++++++++++++++++++++++ ++++ unsigned short tmp; \
+++++++++++++++++++++++++ ++++ err |= __get_user(tmp, &sc->seg); \
+++++++++++++++++++++++++ ++++ regs->seg = tmp | 3; \
}
------------------------- ----#define RELOAD_SEG(seg,mask) \
------------------------- ---- { unsigned int cur; \
------------------------- ---- unsigned short pre; \
------------------------- ---- err |= __get_user(pre, &sc->seg); \
------------------------- ---- savesegment(seg, cur); \
------------------------- ---- pre |= mask; \
------------------------- ---- if (pre != cur) loadsegment(seg, pre); }
+++++++++++++++++++++++++ ++++#define RELOAD_SEG(seg) { \
+++++++++++++++++++++++++ ++++ unsigned int cur, pre; \
+++++++++++++++++++++++++ ++++ err |= __get_user(pre, &sc->seg); \
+++++++++++++++++++++++++ ++++ savesegment(seg, cur); \
+++++++++++++++++++++++++ ++++ pre |= 3; \
+++++++++++++++++++++++++ ++++ if (pre != cur) \
+++++++++++++++++++++++++ ++++ loadsegment(seg, pre); \
+++++++++++++++++++++++++ ++++}
static int ia32_restore_sigcontext(struct pt_regs *regs,
struct sigcontext_ia32 __user *sc,
------------------------- ---- unsigned int *peax)
+++++++++++++++++++++++++ ++++ unsigned int *pax)
{
unsigned int tmpflags, gs, oldgs, err = 0;
void __user *buf;
if (gs != oldgs)
load_gs_index(gs);
------------------------- ---- RELOAD_SEG(fs, 3);
------------------------- ---- RELOAD_SEG(ds, 3);
------------------------- ---- RELOAD_SEG(es, 3);
+++++++++++++++++++++++++ ++++ RELOAD_SEG(fs);
+++++++++++++++++++++++++ ++++ RELOAD_SEG(ds);
+++++++++++++++++++++++++ ++++ RELOAD_SEG(es);
COPY(di); COPY(si); COPY(bp); COPY(sp); COPY(bx);
COPY(dx); COPY(cx); COPY(ip);
/* Don't touch extended registers */
------------------------- ---- err |= __get_user(regs->cs, &sc->cs);
------------------------- ---- regs->cs |= 3;
------------------------- ---- err |= __get_user(regs->ss, &sc->ss);
------------------------- ---- regs->ss |= 3;
+++++++++++++++++++++++++ ++++ COPY_SEG_CPL3(cs);
+++++++++++++++++++++++++ ++++ COPY_SEG_CPL3(ss);
err |= __get_user(tmpflags, &sc->flags);
regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS);
buf = compat_ptr(tmp);
err |= restore_i387_xstate_ia32(buf);
------------------------- ---- err |= __get_user(tmp, &sc->ax);
------------------------- ---- *peax = tmp;
------------------------- ----
+++++++++++++++++++++++++ ++++ err |= __get_user(*pax, &sc->ax);
return err;
}
asmlinkage long sys32_sigreturn(struct pt_regs *regs)
{
------------------------- ---- struct sigframe __user *frame = (struct sigframe __user *)(regs->sp-8);
+++++++++++++++++++++++++ ++++ struct sigframe_ia32 __user *frame = (struct sigframe_ia32 __user *)(regs->sp-8);
sigset_t set;
unsigned int ax;
asmlinkage long sys32_rt_sigreturn(struct pt_regs *regs)
{
------------------------- ---- struct rt_sigframe __user *frame;
+++++++++++++++++++++++++ ++++ struct rt_sigframe_ia32 __user *frame;
sigset_t set;
unsigned int ax;
struct pt_regs tregs;
------------------------- ---- frame = (struct rt_sigframe __user *)(regs->sp - 4);
+++++++++++++++++++++++++ ++++ frame = (struct rt_sigframe_ia32 __user *)(regs->sp - 4);
if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
goto badframe;
err |= __put_user(regs->dx, &sc->dx);
err |= __put_user(regs->cx, &sc->cx);
err |= __put_user(regs->ax, &sc->ax);
------------------------- ---- err |= __put_user(regs->cs, &sc->cs);
------------------------- ---- err |= __put_user(regs->ss, &sc->ss);
err |= __put_user(current->thread.trap_no, &sc->trapno);
err |= __put_user(current->thread.error_code, &sc->err);
err |= __put_user(regs->ip, &sc->ip);
+++++++++++++++++++++++++ ++++ err |= __put_user(regs->cs, (unsigned int __user *)&sc->cs);
err |= __put_user(regs->flags, &sc->flags);
err |= __put_user(regs->sp, &sc->sp_at_signal);
+++++++++++++++++++++++++ ++++ err |= __put_user(regs->ss, (unsigned int __user *)&sc->ss);
------------------------- ---- tmp = save_i387_xstate_ia32(fpstate);
------------------------- ---- if (tmp < 0)
------------------------- ---- err = -EFAULT;
------------------------- ---- else
------------------------- ---- err |= __put_user(ptr_to_compat(tmp ? fpstate : NULL),
------------------------- ---- &sc->fpstate);
+++++++++++++++++++++++++ ++++ err |= __put_user(ptr_to_compat(fpstate), &sc->fpstate);
/* non-iBCS2 extensions.. */
err |= __put_user(mask, &sc->oldmask);
}
/* This is the legacy signal stack switching. */
------------------------- ---- else if ((regs->ss & 0xffff) != __USER_DS &&
+++++++++++++++++++++++++ ++++ else if ((regs->ss & 0xffff) != __USER32_DS &&
!(ka->sa.sa_flags & SA_RESTORER) &&
ka->sa.sa_restorer)
sp = (unsigned long) ka->sa.sa_restorer;
if (used_math()) {
sp = sp - sig_xstate_ia32_size;
*fpstate = (struct _fpstate_ia32 *) sp;
+++++++++++++++++++++++++ ++++ if (save_i387_xstate_ia32(*fpstate) < 0)
+++++++++++++++++++++++++ ++++ return (void __user *) -1L;
}
sp -= frame_size;
int ia32_setup_frame(int sig, struct k_sigaction *ka,
compat_sigset_t *set, struct pt_regs *regs)
{
------------------------- ---- struct sigframe __user *frame;
+++++++++++++++++++++++++ ++++ struct sigframe_ia32 __user *frame;
void __user *restorer;
int err = 0;
void __user *fpstate = NULL;
u16 poplmovl;
u32 val;
u16 int80;
------------------------- ---- u16 pad;
} __attribute__((packed)) code = {
0xb858, /* popl %eax ; movl $...,%eax */
__NR_ia32_sigreturn,
0x80cd, /* int $0x80 */
------------------------- ---- 0,
};
frame = get_sigframe(ka, regs, sizeof(*frame), &fpstate);
* These are actually not used anymore, but left because some
* gdb versions depend on them as a marker.
*/
------------------------- ---- err |= __copy_to_user(frame->retcode, &code, 8);
+++++++++++++++++++++++++ ++++ err |= __put_user(*((u64 *)&code), (u64 *)frame->retcode);
if (err)
return -EFAULT;
int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
compat_sigset_t *set, struct pt_regs *regs)
{
------------------------- ---- struct rt_sigframe __user *frame;
+++++++++++++++++++++++++ ++++ struct rt_sigframe_ia32 __user *frame;
void __user *restorer;
int err = 0;
void __user *fpstate = NULL;
u8 movl;
u32 val;
u16 int80;
------------------------- ---- u16 pad;
------------------------- ---- u8 pad2;
+++++++++++++++++++++++++ ++++ u8 pad;
} __attribute__((packed)) code = {
0xb8,
__NR_ia32_rt_sigreturn,
* Not actually used anymore, but left because some gdb
* versions need it.
*/
------------------------- ---- err |= __copy_to_user(frame->retcode, &code, 8);
+++++++++++++++++++++++++ ++++ err |= __put_user(*((u64 *)&code), (u64 *)frame->retcode);
if (err)
return -EFAULT;
regs->dx = (unsigned long) &frame->info;
regs->cx = (unsigned long) &frame->uc;
-- --------------------------- /* Make -mregparm=3 work */
-- --------------------------- regs->ax = sig;
-- --------------------------- regs->dx = (unsigned long) &frame->info;
-- --------------------------- regs->cx = (unsigned long) &frame->uc;
-- ---------------------------
loadsegment(ds, __USER32_DS);
loadsegment(es, __USER32_DS);
- #ifndef ASM_X86__MSR_H
- #define ASM_X86__MSR_H
+ #ifndef _ASM_X86_MSR_H
+ #define _ASM_X86_MSR_H
#include <asm/msr-index.h>
}
/*
-------- --------------------- * i386 calling convention returns 64-bit value in edx:eax, while
-------- --------------------- * x86_64 returns at rax. Also, the "A" constraint does not really
-------- --------------------- * mean rdx:rax in x86_64, so we need specialized behaviour for each
-------- --------------------- * architecture
++++++++ +++++++++++++++++++++ * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A"
++++++++ +++++++++++++++++++++ * constraint has different meanings. For i386, "A" means exactly
++++++++ +++++++++++++++++++++ * edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead,
++++++++ +++++++++++++++++++++ * it means rax *or* rdx.
*/
#ifdef CONFIG_X86_64
#define DECLARE_ARGS(val, low, high) unsigned low, high
{
DECLARE_ARGS(val, low, high);
- - -- - - rdtsc_barrier();
asm volatile("rdtsc" : EAX_EDX_RET(val, low, high));
- - -- - - rdtsc_barrier();
return EAX_EDX_VAL(val, low, high);
}
}
#define rdtscl(low) \
--------------------------- -- ((low) = (u32)native_read_tsc())
+++++++++++++++++++++++++++ ++ ((low) = (u32)__native_read_tsc())
#define rdtscll(val) \
--------------------------- -- ((val) = native_read_tsc())
+++++++++++++++++++++++++++ ++ ((val) = __native_read_tsc())
#define rdpmc(counter, low, high) \
do { \
#endif /* __KERNEL__ */
- #endif /* ASM_X86__MSR_H */
+ #endif /* _ASM_X86_MSR_H */
- #ifndef ASM_X86__PGTABLE_H
- #define ASM_X86__PGTABLE_H
+ #ifndef _ASM_X86_PGTABLE_H
+ #define _ASM_X86_PGTABLE_H
#define FIRST_USER_ADDRESS 0
#define _PAGE_BIT_PCD 4 /* page cache disabled */
#define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */
#define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */
---------------- -------------#define _PAGE_BIT_FILE 6
#define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
#define _PAGE_BIT_PAT 7 /* on 4KB pages */
#define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
#define _PAGE_BIT_CPA_TEST _PAGE_BIT_UNUSED1
#define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
++++++++++++++++ +++++++++++++/* If _PAGE_BIT_PRESENT is clear, we use these: */
++++++++++++++++ +++++++++++++/* - if the user mapped it with PROT_NONE; pte_present gives true */
++++++++++++++++ +++++++++++++#define _PAGE_BIT_PROTNONE _PAGE_BIT_GLOBAL
++++++++++++++++ +++++++++++++/* - set: nonlinear file mapping, saved PTE; unset:swap */
++++++++++++++++ +++++++++++++#define _PAGE_BIT_FILE _PAGE_BIT_DIRTY
++++++++++++++++ +++++++++++++
#define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
#define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW)
#define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER)
#define _PAGE_NX (_AT(pteval_t, 0))
#endif
---------------- -------------/* If _PAGE_PRESENT is clear, we use these: */
---------------- -------------#define _PAGE_FILE _PAGE_DIRTY /* nonlinear file mapping,
---------------- ------------- * saved PTE; unset:swap */
---------------- -------------#define _PAGE_PROTNONE _PAGE_PSE /* if the user mapped it with PROT_NONE;
---------------- ------------- pte_present gives true */
++++++++++++++++ +++++++++++++#define _PAGE_FILE (_AT(pteval_t, 1) << _PAGE_BIT_FILE)
++++++++++++++++ +++++++++++++#define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE)
#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
_PAGE_ACCESSED | _PAGE_DIRTY)
#define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */
#endif
+++++++++++++++++++ ++++++++++/*
+++++++++++++++++++ ++++++++++ * Macro to mark a page protection value as UC-
+++++++++++++++++++ ++++++++++ */
+++++++++++++++++++ ++++++++++#define pgprot_noncached(prot) \
+++++++++++++++++++ ++++++++++ ((boot_cpu_data.x86 > 3) \
+++++++++++++++++++ ++++++++++ ? (__pgprot(pgprot_val(prot) | _PAGE_CACHE_UC_MINUS)) \
+++++++++++++++++++ ++++++++++ : (prot))
+++++++++++++++++++ ++++++++++
#ifndef __ASSEMBLY__
+++++++++++++++++++ ++++++++++#define pgprot_writecombine pgprot_writecombine
+++++++++++++++++++ ++++++++++extern pgprot_t pgprot_writecombine(pgprot_t prot);
+++++++++++++++++++ ++++++++++
/*
* ZERO_PAGE is a global shared page that is always zero: used
* for zero-mapped memory areas etc..
#define canon_pgprot(p) __pgprot(pgprot_val(p) & __supported_pte_mask)
#ifndef __ASSEMBLY__
+++++++++++++++++++ ++++++++++/* Indicate that x86 has its own track and untrack pfn vma functions */
+++++++++++++++++++ ++++++++++#define __HAVE_PFNMAP_TRACKING
+++++++++++++++++++ ++++++++++
#define __HAVE_PHYS_MEM_ACCESS_PROT
struct file;
pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
static inline void native_pagetable_setup_done(pgd_t *base) {}
#endif
- extern int arch_report_meminfo(char *page);
+ struct seq_file;
+ extern void arch_report_meminfo(struct seq_file *m);
#ifdef CONFIG_PARAVIRT
#include <asm/paravirt.h>
#include <asm-generic/pgtable.h>
#endif /* __ASSEMBLY__ */
- #endif /* ASM_X86__PGTABLE_H */
+ #endif /* _ASM_X86_PGTABLE_H */
- #ifndef ASM_X86__PGTABLE_64_H
- #define ASM_X86__PGTABLE_64_H
+ #ifndef _ASM_X86_PGTABLE_64_H
+ #define _ASM_X86_PGTABLE_64_H
#include <linux/const.h>
#ifndef __ASSEMBLY__
#define PGDIR_MASK (~(PGDIR_SIZE - 1))
---------------- -------------#define MAXMEM _AC(0x00003fffffffffff, UL)
++++++++++++++++ +++++++++++++#define MAXMEM _AC(__AC(1, UL) << MAX_PHYSMEM_BITS, UL)
#define VMALLOC_START _AC(0xffffc20000000000, UL)
#define VMALLOC_END _AC(0xffffe1ffffffffff, UL)
#define VMEMMAP_START _AC(0xffffe20000000000, UL)
#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT)) /* FIXME: is this right? */
------------------- ----------/*
------------------- ---------- * Macro to mark a page protection value as "uncacheable".
------------------- ---------- */
------------------- ----------#define pgprot_noncached(prot) \
------------------- ---------- (__pgprot(pgprot_val((prot)) | _PAGE_PCD | _PAGE_PWT))
------------------- ----------
/*
* Conversion functions: convert a page and protection to a page entry,
* and a page entry and page directory to the page they refer to.
extern int direct_gbpages;
/* Encode and de-code a swap entry */
---------------- -------------#define __swp_type(x) (((x).val >> 1) & 0x3f)
---------------- -------------#define __swp_offset(x) ((x).val >> 8)
---------------- -------------#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 1) | \
---------------- ------------- ((offset) << 8) })
++++++++++++++++ +++++++++++++#if _PAGE_BIT_FILE < _PAGE_BIT_PROTNONE
++++++++++++++++ +++++++++++++#define SWP_TYPE_BITS (_PAGE_BIT_FILE - _PAGE_BIT_PRESENT - 1)
++++++++++++++++ +++++++++++++#define SWP_OFFSET_SHIFT (_PAGE_BIT_PROTNONE + 1)
++++++++++++++++ +++++++++++++#else
++++++++++++++++ +++++++++++++#define SWP_TYPE_BITS (_PAGE_BIT_PROTNONE - _PAGE_BIT_PRESENT - 1)
++++++++++++++++ +++++++++++++#define SWP_OFFSET_SHIFT (_PAGE_BIT_FILE + 1)
++++++++++++++++ +++++++++++++#endif
++++++++++++++++ +++++++++++++
++++++++++++++++ +++++++++++++#define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS)
++++++++++++++++ +++++++++++++
++++++++++++++++ +++++++++++++#define __swp_type(x) (((x).val >> (_PAGE_BIT_PRESENT + 1)) \
++++++++++++++++ +++++++++++++ & ((1U << SWP_TYPE_BITS) - 1))
++++++++++++++++ +++++++++++++#define __swp_offset(x) ((x).val >> SWP_OFFSET_SHIFT)
++++++++++++++++ +++++++++++++#define __swp_entry(type, offset) ((swp_entry_t) { \
++++++++++++++++ +++++++++++++ ((type) << (_PAGE_BIT_PRESENT + 1)) \
++++++++++++++++ +++++++++++++ | ((offset) << SWP_OFFSET_SHIFT) })
#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) })
#define __swp_entry_to_pte(x) ((pte_t) { .pte = (x).val })
#define __HAVE_ARCH_PTE_SAME
#endif /* !__ASSEMBLY__ */
- #endif /* ASM_X86__PGTABLE_64_H */
+ #endif /* _ASM_X86_PGTABLE_64_H */
- #ifndef ASM_X86__SETUP_H
- #define ASM_X86__SETUP_H
+ #ifndef _ASM_X86_SETUP_H
+ #define _ASM_X86_SETUP_H
#define COMMAND_LINE_SIZE 2048
/* Interrupt control for vSMPowered x86_64 systems */
void vsmp_init(void);
++++++++++++++ +++++++++++++++
++++++++++++++ +++++++++++++++void setup_bios_corruption_check(void);
++++++++++++++ +++++++++++++++
++++++++++++++ +++++++++++++++
#ifdef CONFIG_X86_VISWS
extern void visws_early_detect(void);
extern int is_visws_box(void);
static inline int is_visws_box(void) { return 0; }
#endif
++++++++++++++++++++++ +++++++extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip);
++++++++++++++++++++++ +++++++extern int wakeup_secondary_cpu_via_init(int apicid, unsigned long start_eip);
/*
* Any setup quirks to be performed?
*/
void (*smp_read_mpc_oem)(struct mp_config_oemtable *oemtable,
unsigned short oemsize);
int (*setup_ioapic_ids)(void);
++++++++++++++++++++++ +++++++ int (*update_genapic)(void);
};
extern struct x86_quirks *x86_quirks;
#endif /* __ASSEMBLY__ */
#endif /* __KERNEL__ */
- #endif /* ASM_X86__SETUP_H */
+ #endif /* _ASM_X86_SETUP_H */
/* kernel/ioport.c */
asmlinkage long sys_ioperm(unsigned long, unsigned long, int);
++ +++++++++++++++++++++++++++/* kernel/ldt.c */
++ +++++++++++++++++++++++++++asmlinkage int sys_modify_ldt(int, void __user *, unsigned long);
++ +++++++++++++++++++++++++++
++ +++++++++++++++++++++++++++/* kernel/tls.c */
++ +++++++++++++++++++++++++++asmlinkage int sys_set_thread_area(struct user_desc __user *);
++ +++++++++++++++++++++++++++asmlinkage int sys_get_thread_area(struct user_desc __user *);
++ +++++++++++++++++++++++++++
/* X86_32 only */
#ifdef CONFIG_X86_32
/* kernel/process_32.c */
struct old_sigaction __user *);
asmlinkage int sys_sigaltstack(unsigned long);
asmlinkage unsigned long sys_sigreturn(unsigned long);
------------------------- ----asmlinkage int sys_rt_sigreturn(unsigned long);
+++++++++++++++++++++++++ ++++asmlinkage int sys_rt_sigreturn(struct pt_regs);
/* kernel/ioport.c */
asmlinkage long sys_iopl(unsigned long);
-- ---------------------------/* kernel/ldt.c */
-- ---------------------------asmlinkage int sys_modify_ldt(int, void __user *, unsigned long);
-- ---------------------------
/* kernel/sys_i386_32.c */
asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long,
unsigned long, unsigned long, unsigned long);
struct oldold_utsname;
asmlinkage int sys_olduname(struct oldold_utsname __user *);
-- ---------------------------/* kernel/tls.c */
-- ---------------------------asmlinkage int sys_set_thread_area(struct user_desc __user *);
-- ---------------------------asmlinkage int sys_get_thread_area(struct user_desc __user *);
-- ---------------------------
/* kernel/vm86_32.c */
asmlinkage int sys_vm86old(struct pt_regs);
asmlinkage int sys_vm86(struct pt_regs);
- #ifndef ASM_X86__SYSTEM_H
- #define ASM_X86__SYSTEM_H
+ #ifndef _ASM_X86_SYSTEM_H
+ #define _ASM_X86_SYSTEM_H
#include <asm/asm.h>
#include <asm/segment.h>
# define AT_VECTOR_SIZE_ARCH 1
#endif
-- ---------------------------#ifdef CONFIG_X86_32
-- ---------------------------
struct task_struct; /* one of the stranger aspects of C forward declarations */
struct task_struct *__switch_to(struct task_struct *prev,
struct task_struct *next);
++ +++++++++++++++++++++++++++#ifdef CONFIG_X86_32
++ +++++++++++++++++++++++++++
/*
* Saving eflags is important. It switches not only IOPL between tasks,
* it also protects other tasks from NT leaking through sysenter etc.
void default_idle(void);
+++++++++++++++++++++++ ++++++void stop_this_cpu(void *dummy);
+++++++++++++++++++++++ ++++++
/*
* Force strict CPU ordering.
* And yes, this is required on UP too when we're talking
alternative(ASM_NOP3, "lfence", X86_FEATURE_LFENCE_RDTSC);
}
- #endif /* ASM_X86__SYSTEM_H */
+ #endif /* _ASM_X86_SYSTEM_H */
CPPFLAGS_vmlinux.lds += -U$(UTS_MACHINE)
- - - - ifdef CONFIG_FTRACE
+ + + + ifdef CONFIG_FUNCTION_TRACER
# Do not profile debug and lowlevel utilities
CFLAGS_REMOVE_tsc.o = -pg
CFLAGS_REMOVE_rtc.o = -pg
CFLAGS_REMOVE_paravirt-spinlocks.o = -pg
+ + + + CFLAGS_REMOVE_ftrace.o = -pg
+++++ ++++++++++++++++++++++++CFLAGS_REMOVE_early_printk.o = -pg
endif
#
CFLAGS_hpet.o := $(nostackp)
CFLAGS_tsc.o := $(nostackp)
------------------------- ----obj-y := process_$(BITS).o signal_$(BITS).o entry_$(BITS).o
+++++++++++++++++++++++++ ++++obj-y := process_$(BITS).o signal.o entry_$(BITS).o
obj-y += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o
--------- --------------------obj-y += time_$(BITS).o ioport.o ldt.o
+++++++++ ++++++++++++++++++++obj-y += time_$(BITS).o ioport.o ldt.o dumpstack.o
obj-y += setup.o i8259.o irqinit_$(BITS).o setup_percpu.o
obj-$(CONFIG_X86_VISWS) += visws_quirks.o
obj-$(CONFIG_X86_32) += probe_roms_32.o
obj-y += process.o
obj-y += i387.o xsave.o
obj-y += ptrace.o
---- - -- -- -- - -- obj-y += ds.o
++++ + ++ ++ ++ + ++ obj-$(CONFIG_X86_DS) += ds.o
obj-$(CONFIG_X86_32) += tls.o
obj-$(CONFIG_IA32_EMULATION) += tls.o
obj-y += step.o
microcode-$(CONFIG_MICROCODE_AMD) += microcode_amd.o
obj-$(CONFIG_MICROCODE) += microcode.o
++++++++++++++ +++++++++++++++obj-$(CONFIG_X86_CHECK_BIOS_CORRUPTION) += check.o
++++++++++++++ +++++++++++++++
###
# 64 bit specific files
ifeq ($(CONFIG_X86_64),y)
v = apic_read(APIC_LVTT);
v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR);
apic_write(APIC_LVTT, v);
+ ++++++++++++++++++++++++++++ apic_write(APIC_TMICT, 0xffffffff);
break;
case CLOCK_EVT_MODE_RESUME:
/* Nothing to do here */
} else {
res = (((u64)deltapm) * mult) >> 22;
do_div(res, 1000000);
- ---------------------------- printk(KERN_WARNING "APIC calibration not consistent "
+ ++++++++++++++++++++++++++++ pr_warning("APIC calibration not consistent "
"with PM Timer: %ldms instead of 100ms\n",
(long)res);
/* Correct the lapic counter value */
res = (((u64)(*delta)) * pm_100ms);
do_div(res, deltapm);
- ---------------------------- printk(KERN_INFO "APIC delta adjusted to PM-Timer: "
+ ++++++++++++++++++++++++++++ pr_info("APIC delta adjusted to PM-Timer: "
"%lu (%ld)\n", (unsigned long)res, *delta);
*delta = (long)res;
}
*/
if (calibration_result < (1000000 / HZ)) {
local_irq_enable();
- ---------------------------- printk(KERN_WARNING
- ---------------------------- "APIC frequency too slow, disabling apic timer\n");
+ ++++++++++++++++++++++++++++ pr_warning("APIC frequency too slow, disabling apic timer\n");
return -1;
}
while (lapic_cal_loops <= LAPIC_CAL_LOOPS)
cpu_relax();
- ---------------------------- local_irq_disable();
- ----------------------------
/* Stop the lapic timer */
lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, levt);
- ---------------------------- local_irq_enable();
- ----------------------------
/* Jiffies delta */
deltaj = lapic_cal_j2 - lapic_cal_j1;
apic_printk(APIC_VERBOSE, "... jiffies delta = %lu\n", deltaj);
local_irq_enable();
if (levt->features & CLOCK_EVT_FEAT_DUMMY) {
- ---------------------------- printk(KERN_WARNING
- ---------------------------- "APIC timer disabled due to verification failure.\n");
+ ++++++++++++++++++++++++++++ pr_warning("APIC timer disabled due to verification failure.\n");
return -1;
}
* broadcast mechanism is used. On UP systems simply ignore it.
*/
if (disable_apic_timer) {
- ---------------------------- printk(KERN_INFO "Disabling APIC timer\n");
+ ++++++++++++++++++++++++++++ pr_info("Disabling APIC timer\n");
/* No broadcast on UP ! */
if (num_possible_cpus() > 1) {
lapic_clockevent.mult = 1;
if (nmi_watchdog != NMI_IO_APIC)
lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY;
else
- ---------------------------- printk(KERN_WARNING "APIC timer registered as dummy,"
+ ++++++++++++++++++++++++++++ pr_warning("APIC timer registered as dummy,"
" due to nmi_watchdog=%d!\n", nmi_watchdog);
/* Setup the lapic or request the broadcast */
* spurious.
*/
if (!evt->event_handler) {
- ---------------------------- printk(KERN_WARNING
- ---------------------------- "Spurious LAPIC timer interrupt on cpu %d\n", cpu);
+ ++++++++++++++++++++++++++++ pr_warning("Spurious LAPIC timer interrupt on cpu %d\n", cpu);
/* Switch it off */
lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, evt);
return;
* Besides, if we don't timer interrupts ignore the global
* interrupt lock, which is the WrongThing (tm) to do.
*/
------------ -----------------#ifdef CONFIG_X86_64
exit_idle();
------------ -----------------#endif
irq_enter();
local_apic_timer_interrupt();
irq_exit();
unsigned int oldvalue, value, maxlvt;
if (!lapic_is_integrated()) {
- ---------------------------- printk(KERN_INFO "No ESR for 82489DX.\n");
+ ++++++++++++++++++++++++++++ pr_info("No ESR for 82489DX.\n");
return;
}
* ESR disabled - we can't do anything useful with the
* errors anyway - mbligh
*/
- ---------------------------- printk(KERN_INFO "Leaving ESR disabled.\n");
+ ++++++++++++++++++++++++++++ pr_info("Leaving ESR disabled.\n");
return;
}
rdmsr(MSR_IA32_APICBASE, msr, msr2);
if (msr & X2APIC_ENABLE) {
- ---------------------------- printk("x2apic enabled by BIOS, switching to x2apic ops\n");
+ ++++++++++++++++++++++++++++ pr_info("x2apic enabled by BIOS, switching to x2apic ops\n");
x2apic_preenabled = x2apic = 1;
apic_ops = &x2apic_ops;
}
rdmsr(MSR_IA32_APICBASE, msr, msr2);
if (!(msr & X2APIC_ENABLE)) {
- ---------------------------- printk("Enabling x2apic\n");
+ ++++++++++++++++++++++++++++ pr_info("Enabling x2apic\n");
wrmsr(MSR_IA32_APICBASE, msr | X2APIC_ENABLE, 0);
}
}
---- - -- -- -- - -- void enable_IR_x2apic(void)
++++ + ++ ++ ++ + ++ void __init enable_IR_x2apic(void)
{
#ifdef CONFIG_INTR_REMAP
int ret;
return;
if (!x2apic_preenabled && disable_x2apic) {
- ---------------------------- printk(KERN_INFO
- ---------------------------- "Skipped enabling x2apic and Interrupt-remapping "
- ---------------------------- "because of nox2apic\n");
+ ++++++++++++++++++++++++++++ pr_info("Skipped enabling x2apic and Interrupt-remapping "
+ ++++++++++++++++++++++++++++ "because of nox2apic\n");
return;
}
panic("Bios already enabled x2apic, can't enforce nox2apic");
if (!x2apic_preenabled && skip_ioapic_setup) {
- ---------------------------- printk(KERN_INFO
- ---------------------------- "Skipped enabling x2apic and Interrupt-remapping "
- ---------------------------- "because of skipping io-apic setup\n");
+ ++++++++++++++++++++++++++++ pr_info("Skipped enabling x2apic and Interrupt-remapping "
+ ++++++++++++++++++++++++++++ "because of skipping io-apic setup\n");
return;
}
ret = dmar_table_init();
if (ret) {
- ---------------------------- printk(KERN_INFO
- ---------------------------- "dmar_table_init() failed with %d:\n", ret);
+ ++++++++++++++++++++++++++++ pr_info("dmar_table_init() failed with %d:\n", ret);
if (x2apic_preenabled)
panic("x2apic enabled by bios. But IR enabling failed");
else
- ---------------------------- printk(KERN_INFO
- ---------------------------- "Not enabling x2apic,Intr-remapping\n");
+ ++++++++++++++++++++++++++++ pr_info("Not enabling x2apic,Intr-remapping\n");
return;
}
ret = save_mask_IO_APIC_setup();
if (ret) {
- ---------------------------- printk(KERN_INFO "Saving IO-APIC state failed: %d\n", ret);
+ ++++++++++++++++++++++++++++ pr_info("Saving IO-APIC state failed: %d\n", ret);
goto end;
}
if (!ret) {
if (!x2apic_preenabled)
- ---------------------------- printk(KERN_INFO
- ---------------------------- "Enabled x2apic and interrupt-remapping\n");
+ ++++++++++++++++++++++++++++ pr_info("Enabled x2apic and interrupt-remapping\n");
else
- ---------------------------- printk(KERN_INFO
- ---------------------------- "Enabled Interrupt-remapping\n");
+ ++++++++++++++++++++++++++++ pr_info("Enabled Interrupt-remapping\n");
} else
- ---------------------------- printk(KERN_ERR
- ---------------------------- "Failed to enable Interrupt-remapping and x2apic\n");
+ ++++++++++++++++++++++++++++ pr_err("Failed to enable Interrupt-remapping and x2apic\n");
#else
if (!cpu_has_x2apic)
return;
panic("x2apic enabled prior OS handover,"
" enable CONFIG_INTR_REMAP");
- ---------------------------- printk(KERN_INFO "Enable CONFIG_INTR_REMAP for enabling intr-remapping "
- ---------------------------- " and x2apic\n");
+ ++++++++++++++++++++++++++++ pr_info("Enable CONFIG_INTR_REMAP for enabling intr-remapping "
+ ++++++++++++++++++++++++++++ " and x2apic\n");
#endif
return;
static int __init detect_init_APIC(void)
{
if (!cpu_has_apic) {
- ---------------------------- printk(KERN_INFO "No local APIC present\n");
+ ++++++++++++++++++++++++++++ pr_info("No local APIC present\n");
return -1;
}
* "lapic" specified.
*/
if (!force_enable_local_apic) {
- ---------------------------- printk(KERN_INFO "Local APIC disabled by BIOS -- "
- ---------------------------- "you can enable it with \"lapic\"\n");
+ ++++++++++++++++++++++++++++ pr_info("Local APIC disabled by BIOS -- "
+ ++++++++++++++++++++++++++++ "you can enable it with \"lapic\"\n");
return -1;
}
/*
*/
rdmsr(MSR_IA32_APICBASE, l, h);
if (!(l & MSR_IA32_APICBASE_ENABLE)) {
- ---------------------------- printk(KERN_INFO
- ---------------------------- "Local APIC disabled by BIOS -- reenabling.\n");
+ ++++++++++++++++++++++++++++ pr_info("Local APIC disabled by BIOS -- reenabling.\n");
l &= ~MSR_IA32_APICBASE_BASE;
l |= MSR_IA32_APICBASE_ENABLE | APIC_DEFAULT_PHYS_BASE;
wrmsr(MSR_IA32_APICBASE, l, h);
*/
features = cpuid_edx(1);
if (!(features & (1 << X86_FEATURE_APIC))) {
- ---------------------------- printk(KERN_WARNING "Could not enable APIC!\n");
+ ++++++++++++++++++++++++++++ pr_warning("Could not enable APIC!\n");
return -1;
}
set_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC);
if (l & MSR_IA32_APICBASE_ENABLE)
mp_lapic_addr = l & MSR_IA32_APICBASE_BASE;
- ---------------------------- printk(KERN_INFO "Found and enabled local APIC!\n");
+ ++++++++++++++++++++++++++++ pr_info("Found and enabled local APIC!\n");
apic_pm_activate();
return 0;
no_apic:
- ---------------------------- printk(KERN_INFO "No local APIC present or hardware disabled\n");
+ ++++++++++++++++++++++++++++ pr_info("No local APIC present or hardware disabled\n");
return -1;
}
#endif
{
#ifdef CONFIG_X86_64
if (disable_apic) {
- ---------------------------- printk(KERN_INFO "Apic disabled\n");
+ ++++++++++++++++++++++++++++ pr_info("Apic disabled\n");
return -1;
}
if (!cpu_has_apic) {
disable_apic = 1;
- ---------------------------- printk(KERN_INFO "Apic disabled by BIOS\n");
+ ++++++++++++++++++++++++++++ pr_info("Apic disabled by BIOS\n");
return -1;
}
#else
*/
if (!cpu_has_apic &&
APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
- ---------------------------- printk(KERN_ERR "BIOS bug, local APIC 0x%x not detected!...\n",
- ---------------------------- boot_cpu_physical_apicid);
+ ++++++++++++++++++++++++++++ pr_err("BIOS bug, local APIC 0x%x not detected!...\n",
+ ++++++++++++++++++++++++++++ boot_cpu_physical_apicid);
clear_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC);
return -1;
}
{
u32 v;
------------ -----------------#ifdef CONFIG_X86_64
exit_idle();
------------ -----------------#endif
irq_enter();
/*
* Check if this really is a spurious interrupt and ACK it
add_pda(irq_spurious_count, 1);
#else
/* see sw-dev-man vol 3, chapter 7.4.13.5 */
- ---------------------------- printk(KERN_INFO "spurious APIC interrupt on CPU#%d, "
- ---------------------------- "should never happen.\n", smp_processor_id());
+ ++++++++++++++++++++++++++++ pr_info("spurious APIC interrupt on CPU#%d, "
+ ++++++++++++++++++++++++++++ "should never happen.\n", smp_processor_id());
__get_cpu_var(irq_stat).irq_spurious_count++;
#endif
irq_exit();
{
u32 v, v1;
------------ -----------------#ifdef CONFIG_X86_64
exit_idle();
------------ -----------------#endif
irq_enter();
/* First tickle the hardware, only then report what went on. -- REW */
v = apic_read(APIC_ESR);
ack_APIC_irq();
atomic_inc(&irq_err_count);
- ---------------------------- /* Here is what the APIC error bits mean:
- ---------------------------- 0: Send CS error
- ---------------------------- 1: Receive CS error
- ---------------------------- 2: Send accept error
- ---------------------------- 3: Receive accept error
- ---------------------------- 4: Reserved
- ---------------------------- 5: Send illegal vector
- ---------------------------- 6: Received illegal vector
- ---------------------------- 7: Illegal register address
- ---------------------------- */
- ---------------------------- printk(KERN_DEBUG "APIC error on CPU%d: %02x(%02x)\n",
+ ++++++++++++++++++++++++++++ /*
+ ++++++++++++++++++++++++++++ * Here is what the APIC error bits mean:
+ ++++++++++++++++++++++++++++ * 0: Send CS error
+ ++++++++++++++++++++++++++++ * 1: Receive CS error
+ ++++++++++++++++++++++++++++ * 2: Send accept error
+ ++++++++++++++++++++++++++++ * 3: Receive accept error
+ ++++++++++++++++++++++++++++ * 4: Reserved
+ ++++++++++++++++++++++++++++ * 5: Send illegal vector
+ ++++++++++++++++++++++++++++ * 6: Received illegal vector
+ ++++++++++++++++++++++++++++ * 7: Illegal register address
+ ++++++++++++++++++++++++++++ */
+ ++++++++++++++++++++++++++++ pr_debug("APIC error on CPU%d: %02x(%02x)\n",
smp_processor_id(), v , v1);
irq_exit();
}
* Validate version
*/
if (version == 0x0) {
- ---------------------------- printk(KERN_WARNING "BIOS bug, APIC version is 0 for CPU#%d! "
- ---------------------------- "fixing up to 0x10. (tell your hw vendor)\n",
- ---------------------------- version);
+ ++++++++++++++++++++++++++++ pr_warning("BIOS bug, APIC version is 0 for CPU#%d! "
+ ++++++++++++++++++++++++++++ "fixing up to 0x10. (tell your hw vendor)\n",
+ ++++++++++++++++++++++++++++ version);
version = 0x10;
}
apic_version[apicid] = version;
if (num_processors >= NR_CPUS) {
- ---------------------------- printk(KERN_WARNING "WARNING: NR_CPUS limit of %i reached."
+ ++++++++++++++++++++++++++++ pr_warning("WARNING: NR_CPUS limit of %i reached."
" Processor ignored.\n", NR_CPUS);
return;
}
else if (strcmp("verbose", arg) == 0)
apic_verbosity = APIC_VERBOSE;
else {
- ---------------------------- printk(KERN_WARNING "APIC Verbosity level %s not recognised"
+ ++++++++++++++++++++++++++++ pr_warning("APIC Verbosity level %s not recognised"
" use apic=verbose or apic=debug\n", arg);
return -EINVAL;
}
#include <asm/pat.h>
#include <asm/asm.h>
#include <asm/numa.h>
+ ++ + + #include <asm/smp.h>
#ifdef CONFIG_X86_LOCAL_APIC
#include <asm/mpspec.h>
#include <asm/apic.h>
#include <asm/proto.h>
#include <asm/sections.h>
#include <asm/setup.h>
+++++++ ++++++++++++++++++++++#include <asm/hypervisor.h>
#include "cpu.h"
this_cpu->c_early_init(c);
validate_pat_support(c);
+ ++ + +
+ ++ + + #ifdef CONFIG_SMP
+ ++ + + c->cpu_index = boot_cpu_id;
+ ++ + + #endif
}
void __init early_cpu_init(void)
detect_ht(c);
#endif
+++++++ ++++++++++++++++++++++ init_hypervisor(c);
/*
* On SMP, boot_cpu_data holds the common feature set between
* all CPUs; so make sure that we indicate which features are
struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };
-- ---------------------------char boot_cpu_stack[IRQSTACKSIZE] __page_aligned_bss;
++ +++++++++++++++++++++++++++static char boot_cpu_stack[IRQSTACKSIZE] __page_aligned_bss;
void __cpuinit pda_init(int cpu)
{
}
}
-- ---------------------------char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ +
-- --------------------------- DEBUG_STKSZ] __page_aligned_bss;
++ +++++++++++++++++++++++++++static char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ +
++ +++++++++++++++++++++++++++ DEBUG_STKSZ] __page_aligned_bss;
extern asmlinkage void ignore_sysret(void);
/*
* Boot processor to setup the FP and extended state context info.
*/
- -- - - if (!smp_processor_id())
+ ++ + + if (smp_processor_id() == boot_cpu_id)
init_thread_xstate();
xsave_init();
*/
---- - -- -- -- - -- #ifdef CONFIG_X86_DS
---- - -- -- -- - --
#include <asm/ds.h>
#include <linux/errno.h>
static inline struct ds_context *ds_get_context(struct task_struct *task)
{
struct ds_context *context;
++++ + ++ ++ ++ + ++ unsigned long irq;
---- - -- -- -- - -- spin_lock(&ds_lock);
++++ + ++ ++ ++ + ++ spin_lock_irqsave(&ds_lock, irq);
context = (task ? task->thread.ds_ctx : this_system_context);
if (context)
context->count++;
---- - -- -- -- - -- spin_unlock(&ds_lock);
++++ + ++ ++ ++ + ++ spin_unlock_irqrestore(&ds_lock, irq);
return context;
}
/*
* Same as ds_get_context, but allocates the context and it's DS
* structure, if necessary; returns NULL; if out of memory.
---- - -- -- -- - -- *
---- - -- -- -- - -- * pre: requires ds_lock to be held
*/
static inline struct ds_context *ds_alloc_context(struct task_struct *task)
{
struct ds_context **p_context =
(task ? &task->thread.ds_ctx : &this_system_context);
struct ds_context *context = *p_context;
++++ + ++ ++ ++ + ++ unsigned long irq;
if (!context) {
-- -- - spin_unlock(&ds_lock);
-- -- -
context = kzalloc(sizeof(*context), GFP_KERNEL);
---- - -- -- -- - --
-- -- - if (!context) {
-- -- - spin_lock(&ds_lock);
++ ++ + if (!context)
return NULL;
-- -- - }
context->ds = kzalloc(ds_cfg.sizeof_ds, GFP_KERNEL);
if (!context->ds) {
kfree(context);
-- -- - spin_lock(&ds_lock);
return NULL;
}
- - - -- -- - - *p_context = context;
-- -- - spin_lock(&ds_lock);
-- -- - /*
-- -- - * Check for race - another CPU could have allocated
-- -- - * it meanwhile:
-- -- - */
++++ + ++ ++ ++ + ++ spin_lock_irqsave(&ds_lock, irq);
++ ++ +
- - - -- -- - - context->this = p_context;
- - - -- -- - - context->task = task;
+ + + ++ ++ + + if (*p_context) {
+ + + ++ ++ + + kfree(context->ds);
+ + + ++ ++ + + kfree(context);
-- -- - return *p_context;
-- -- - }
+
- - - -- - - - if (task)
- - - -- - - - set_tsk_thread_flag(task, TIF_DS_AREA_MSR);
-- -- - *p_context = context;
++++ + ++ ++ ++ + ++ context = *p_context;
++++ + ++ ++ ++ + ++ } else {
++++ + ++ ++ ++ + ++ *p_context = context;
- - - -- - - - if (!task || (task == current))
- - - -- - - - wrmsr(MSR_IA32_DS_AREA, (unsigned long)context->ds, 0);
-- -- - context->this = p_context;
-- -- - context->task = task;
- if (task)
- set_tsk_thread_flag(task, TIF_DS_AREA_MSR);
++++ + ++ ++ ++ + ++ context->this = p_context;
++++ + ++ ++ ++ + ++ context->task = task;
- - - -- - - - get_tracer(task);
-- -- - if (task)
-- -- - set_tsk_thread_flag(task, TIF_DS_AREA_MSR);
- if (!task || (task == current))
- wrmsr(MSR_IA32_DS_AREA, (unsigned long)context->ds, 0);
++++ + ++ ++ ++ + ++ if (task)
++++ + ++ ++ ++ + ++ set_tsk_thread_flag(task, TIF_DS_AREA_MSR);
+ + + ++ + + +
-- -- - if (!task || (task == current))
-- -- - wrmsr(MSR_IA32_DS_AREA, (unsigned long)context->ds, 0);
-- -- -
-- -- - - get_tracer(task);
++++ + ++ ++ ++ + ++ if (!task || (task == current))
++++ + ++ ++ ++ + ++ wrmsrl(MSR_IA32_DS_AREA,
++++ + ++ ++ ++ + ++ (unsigned long)context->ds);
++++ + ++ ++ ++ + ++ }
++++ + ++ ++ ++ + ++ spin_unlock_irqrestore(&ds_lock, irq);
}
context->count++;
*/
static inline void ds_put_context(struct ds_context *context)
{
++++ + ++ ++ ++ + ++ unsigned long irq;
++++ + ++ ++ ++ + ++
if (!context)
return;
---- - -- -- -- - -- spin_lock(&ds_lock);
++++ + ++ ++ ++ + ++ spin_lock_irqsave(&ds_lock, irq);
if (--context->count)
goto out;
kfree(context->ds);
kfree(context);
out:
---- - -- -- -- - -- spin_unlock(&ds_lock);
++++ + ++ ++ ++ + ++ spin_unlock_irqrestore(&ds_lock, irq);
}
struct ds_context *context;
unsigned long buffer, adj;
const unsigned long alignment = (1 << 3);
++++ + ++ ++ ++ + ++ unsigned long irq;
int error = 0;
if (!ds_cfg.sizeof_ds)
return -EOPNOTSUPP;
---- - -- -- -- - -- spin_lock(&ds_lock);
- - - -- -- - -
- - - -- -- - - if (!check_tracer(task))
- - - -- -- - - return -EPERM;
---- - -- -- -- - --
---- - -- -- -- - -- error = -ENOMEM;
context = ds_alloc_context(task);
if (!context)
-- -- - goto out_unlock;
++++ + ++ ++ ++ + ++ return -ENOMEM;
++++ + ++ ++ ++ + ++
++++ + ++ ++ ++ + ++ spin_lock_irqsave(&ds_lock, irq);
+ + + ++ ++ + +
+ + + ++ ++ + + error = -EPERM;
+ + + ++ ++ + + if (!check_tracer(task))
goto out_unlock;
++++ + ++ ++ ++ + ++ get_tracer(task);
++++ + ++ ++ ++ + ++
error = -EALREADY;
if (context->owner[qual] == current)
---- - -- -- -- - -- goto out_unlock;
++++ + ++ ++ ++ + ++ goto out_put_tracer;
error = -EPERM;
if (context->owner[qual] != NULL)
---- - -- -- -- - -- goto out_unlock;
++++ + ++ ++ ++ + ++ goto out_put_tracer;
context->owner[qual] = current;
---- - -- -- -- - -- spin_unlock(&ds_lock);
++++ + ++ ++ ++ + ++ spin_unlock_irqrestore(&ds_lock, irq);
error = -ENOMEM;
out_release:
context->owner[qual] = NULL;
ds_put_context(context);
++++ + ++ ++ ++ + ++ put_tracer(task);
++++ + ++ ++ ++ + ++ return error;
++++ + ++ ++ ++ + ++
++++ + ++ ++ ++ + ++ out_put_tracer:
++++ + ++ ++ ++ + ++ spin_unlock_irqrestore(&ds_lock, irq);
++++ + ++ ++ ++ + ++ ds_put_context(context);
++++ + ++ ++ ++ + ++ put_tracer(task);
return error;
out_unlock:
---- - -- -- -- - -- spin_unlock(&ds_lock);
++++ + ++ ++ ++ + ++ spin_unlock_irqrestore(&ds_lock, irq);
ds_put_context(context);
return error;
}
.sizeof_ds = sizeof(long) * 12,
.sizeof_field = sizeof(long),
.sizeof_rec[ds_bts] = sizeof(long) * 3,
++++ + ++ ++ ++ + ++ #ifdef __i386__
.sizeof_rec[ds_pebs] = sizeof(long) * 10
++++ + ++ ++ ++ + ++ #else
++++ + ++ ++ ++ + ++ .sizeof_rec[ds_pebs] = sizeof(long) * 18
++++ + ++ ++ ++ + ++ #endif
};
static const struct ds_configuration ds_cfg_64 = {
.sizeof_ds = 8 * 12,
.sizeof_field = 8,
.sizeof_rec[ds_bts] = 8 * 3,
++++ + ++ ++ ++ + ++ #ifdef __i386__
.sizeof_rec[ds_pebs] = 8 * 10
++++ + ++ ++ ++ + ++ #else
++++ + ++ ++ ++ + ++ .sizeof_rec[ds_pebs] = 8 * 18
++++ + ++ ++ ++ + ++ #endif
};
static inline void
switch (c->x86) {
case 0x6:
switch (c->x86_model) {
+++++++++++++++++++++ ++++++++ case 0 ... 0xC:
+++++++++++++++++++++ ++++++++ /* sorry, don't know about them */
+++++++++++++++++++++ ++++++++ break;
case 0xD:
case 0xE: /* Pentium M */
ds_configure(&ds_cfg_var);
break;
--------------------- -------- case 0xF: /* Core2 */
--------------------- -------- case 0x1C: /* Atom */
+++++++++++++++++++++ ++++++++ default: /* Core2, Atom, ... */
ds_configure(&ds_cfg_64);
break;
--------------------- -------- default:
--------------------- -------- /* sorry, don't know about them */
--------------------- -------- break;
}
break;
case 0xF:
while (leftovers--)
ds_put_context(context);
}
---- - -- -- -- - -- #endif /* CONFIG_X86_DS */
*
* NOTE: This code handles signal-recognition, which happens every time
* after an interrupt and after each system call.
-- --------------------------- *
-- --------------------------- * Normal syscalls and interrupts don't save a full stack frame, this is
++ +++++++++++++++++++++++++++ *
++ +++++++++++++++++++++++++++ * Normal syscalls and interrupts don't save a full stack frame, this is
* only done for syscall tracing, signals or fork/exec et.al.
-- --------------------------- *
-- --------------------------- * A note on terminology:
-- --------------------------- * - top of stack: Architecture defined interrupt frame from SS to RIP
-- --------------------------- * at the top of the kernel process stack.
++ +++++++++++++++++++++++++++ *
++ +++++++++++++++++++++++++++ * A note on terminology:
++ +++++++++++++++++++++++++++ * - top of stack: Architecture defined interrupt frame from SS to RIP
++ +++++++++++++++++++++++++++ * at the top of the kernel process stack.
* - partial stack frame: partially saved registers upto R11.
-- --------------------------- * - full stack frame: Like partial stack frame, but all register saved.
++ +++++++++++++++++++++++++++ * - full stack frame: Like partial stack frame, but all register saved.
*
* Some macro usage:
* - CFI macros are used to generate dwarf2 unwind information for better
.code64
- - - - #ifdef CONFIG_FTRACE
+ + + + #ifdef CONFIG_FUNCTION_TRACER
#ifdef CONFIG_DYNAMIC_FTRACE
ENTRY(mcount)
retq
jmp ftrace_stub
END(mcount)
#endif /* CONFIG_DYNAMIC_FTRACE */
- - - - #endif /* CONFIG_FTRACE */
+ + + + #endif /* CONFIG_FUNCTION_TRACER */
#ifndef CONFIG_PREEMPT
#define retint_kernel retint_restore_args
-- ---------------------------#endif
++ +++++++++++++++++++++++++++#endif
#ifdef CONFIG_PARAVIRT
ENTRY(native_usergs_sysret64)
.endm
/*
-- --------------------------- * C code is not supposed to know about undefined top of stack. Every time
-- --------------------------- * a C function with an pt_regs argument is called from the SYSCALL based
++ +++++++++++++++++++++++++++ * C code is not supposed to know about undefined top of stack. Every time
++ +++++++++++++++++++++++++++ * a C function with an pt_regs argument is called from the SYSCALL based
* fast path FIXUP_TOP_OF_STACK is needed.
* RESTORE_TOP_OF_STACK syncs the syscall state after any possible ptregs
* manipulation.
-- --------------------------- */
-- ---------------------------
-- --------------------------- /* %rsp:at FRAMEEND */
++ +++++++++++++++++++++++++++ */
++ +++++++++++++++++++++++++++
++ +++++++++++++++++++++++++++ /* %rsp:at FRAMEEND */
.macro FIXUP_TOP_OF_STACK tmp
movq %gs:pda_oldrsp,\tmp
movq \tmp,RSP(%rsp)
.endm
/*
* A newly forked process directly context switches into this.
-- --------------------------- */
-- ---------------------------/* rdi: prev */
++ +++++++++++++++++++++++++++ */
++ +++++++++++++++++++++++++++/* rdi: prev */
ENTRY(ret_from_fork)
CFI_DEFAULT_STACK
push kernel_eflags(%rip)
call schedule_tail
GET_THREAD_INFO(%rcx)
testl $(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT),TI_flags(%rcx)
+++++ ++++++++++++++++++++++++ CFI_REMEMBER_STATE
jnz rff_trace
-- ---------------------------rff_action:
++ +++++++++++++++++++++++++++rff_action:
RESTORE_REST
testl $3,CS-ARGOFFSET(%rsp) # from kernel_thread?
je int_ret_from_sys_call
jnz int_ret_from_sys_call
RESTORE_TOP_OF_STACK %rdi,ARGOFFSET
jmp ret_from_sys_call
+++++ ++++++++++++++++++++++++ CFI_RESTORE_STATE
rff_trace:
movq %rsp,%rdi
call syscall_trace_leave
-- --------------------------- GET_THREAD_INFO(%rcx)
++ +++++++++++++++++++++++++++ GET_THREAD_INFO(%rcx)
jmp rff_action
CFI_ENDPROC
END(ret_from_fork)
* SYSCALL does not save anything on the stack and does not change the
* stack pointer.
*/
-- ---------------------------
++ +++++++++++++++++++++++++++
/*
-- --------------------------- * Register setup:
++ +++++++++++++++++++++++++++ * Register setup:
* rax system call number
* rdi arg0
-- --------------------------- * rcx return address for syscall/sysret, C arg3
++ +++++++++++++++++++++++++++ * rcx return address for syscall/sysret, C arg3
* rsi arg1
-- --------------------------- * rdx arg2
++ +++++++++++++++++++++++++++ * rdx arg2
* r10 arg3 (--> moved to rcx for C)
* r8 arg4
* r9 arg5
* r11 eflags for syscall/sysret, temporary for C
-- --------------------------- * r12-r15,rbp,rbx saved by C code, not touched.
-- --------------------------- *
++ +++++++++++++++++++++++++++ * r12-r15,rbp,rbx saved by C code, not touched.
++ +++++++++++++++++++++++++++ *
* Interrupts are off on entry.
* Only called from user space.
*
* When user can change the frames always force IRET. That is because
* it deals with uncanonical addresses better. SYSRET has trouble
* with them due to bugs in both AMD and Intel CPUs.
-- --------------------------- */
++ +++++++++++++++++++++++++++ */
ENTRY(system_call)
CFI_STARTPROC simple
*/
ENTRY(system_call_after_swapgs)
-- --------------------------- movq %rsp,%gs:pda_oldrsp
++ +++++++++++++++++++++++++++ movq %rsp,%gs:pda_oldrsp
movq %gs:pda_kernelstack,%rsp
/*
* No need to follow this irqs off/on section - it's straight
*/
ENABLE_INTERRUPTS(CLBR_NONE)
SAVE_ARGS 8,1
-- --------------------------- movq %rax,ORIG_RAX-ARGOFFSET(%rsp)
++ +++++++++++++++++++++++++++ movq %rax,ORIG_RAX-ARGOFFSET(%rsp)
movq %rcx,RIP-ARGOFFSET(%rsp)
CFI_REL_OFFSET rip,RIP-ARGOFFSET
GET_THREAD_INFO(%rcx)
movq %rax,RAX-ARGOFFSET(%rsp)
/*
* Syscall return path ending with SYSRET (fast path)
-- --------------------------- * Has incomplete stack frame and undefined top of stack.
-- --------------------------- */
++ +++++++++++++++++++++++++++ * Has incomplete stack frame and undefined top of stack.
++ +++++++++++++++++++++++++++ */
ret_from_sys_call:
movl $_TIF_ALLWORK_MASK,%edi
/* edi: flagmask */
-- ---------------------------sysret_check:
++ +++++++++++++++++++++++++++sysret_check:
LOCKDEP_SYS_EXIT
GET_THREAD_INFO(%rcx)
DISABLE_INTERRUPTS(CLBR_NONE)
TRACE_IRQS_OFF
movl TI_flags(%rcx),%edx
andl %edi,%edx
-- --------------------------- jnz sysret_careful
++ +++++++++++++++++++++++++++ jnz sysret_careful
CFI_REMEMBER_STATE
/*
* sysretq will re-enable interrupts:
CFI_RESTORE_STATE
/* Handle reschedules */
-- --------------------------- /* edx: work, edi: workmask */
++ +++++++++++++++++++++++++++ /* edx: work, edi: workmask */
sysret_careful:
bt $TIF_NEED_RESCHED,%edx
jnc sysret_signal
CFI_ADJUST_CFA_OFFSET -8
jmp sysret_check
-- --------------------------- /* Handle a signal */
++ +++++++++++++++++++++++++++ /* Handle a signal */
sysret_signal:
TRACE_IRQS_ON
ENABLE_INTERRUPTS(CLBR_NONE)
DISABLE_INTERRUPTS(CLBR_NONE)
TRACE_IRQS_OFF
jmp int_with_check
-- ---------------------------
++ +++++++++++++++++++++++++++
badsys:
movq $-ENOSYS,RAX-ARGOFFSET(%rsp)
jmp ret_from_sys_call
#endif /* CONFIG_AUDITSYSCALL */
/* Do syscall tracing */
-- ---------------------------tracesys:
++ +++++++++++++++++++++++++++tracesys:
#ifdef CONFIG_AUDITSYSCALL
testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags(%rcx)
jz auditsys
call *sys_call_table(,%rax,8)
movq %rax,RAX-ARGOFFSET(%rsp)
/* Use IRET because user could have changed frame */
-- ---------------------------
-- ---------------------------/*
++ +++++++++++++++++++++++++++
++ +++++++++++++++++++++++++++/*
* Syscall return path ending with IRET.
* Has correct top of stack, but partial stack frame.
*/
TRACE_IRQS_ON
ENABLE_INTERRUPTS(CLBR_NONE)
SAVE_REST
-- --------------------------- /* Check for syscall exit trace */
++ +++++++++++++++++++++++++++ /* Check for syscall exit trace */
testl $_TIF_WORK_SYSCALL_EXIT,%edx
jz int_signal
pushq %rdi
CFI_ADJUST_CFA_OFFSET 8
-- --------------------------- leaq 8(%rsp),%rdi # &ptregs -> arg1
++ +++++++++++++++++++++++++++ leaq 8(%rsp),%rdi # &ptregs -> arg1
call syscall_trace_leave
popq %rdi
CFI_ADJUST_CFA_OFFSET -8
andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi
jmp int_restore_rest
-- ---------------------------
++ +++++++++++++++++++++++++++
int_signal:
testl $_TIF_DO_NOTIFY_MASK,%edx
jz 1f
jmp int_with_check
CFI_ENDPROC
END(system_call)
-- ---------------------------
-- ---------------------------/*
++ +++++++++++++++++++++++++++
++ +++++++++++++++++++++++++++/*
* Certain special system calls that need to save a complete full stack frame.
-- --------------------------- */
-- ---------------------------
++ +++++++++++++++++++++++++++ */
++ +++++++++++++++++++++++++++
.macro PTREGSCALL label,func,arg
.globl \label
\label:
ret
CFI_ENDPROC
END(ptregscall_common)
-- ---------------------------
++ +++++++++++++++++++++++++++
ENTRY(stub_execve)
CFI_STARTPROC
popq %r11
jmp int_ret_from_sys_call
CFI_ENDPROC
END(stub_execve)
-- ---------------------------
++ +++++++++++++++++++++++++++
/*
* sigreturn is special because it needs to restore all registers on return.
* This cannot be done with SYSRET, so use the IRET return path instead.
-- --------------------------- */
++ +++++++++++++++++++++++++++ */
ENTRY(stub_rt_sigreturn)
CFI_STARTPROC
addq $8, %rsp
GET_THREAD_INFO(%rcx)
testl $3,CS-ARGOFFSET(%rsp)
je retint_kernel
-- ---------------------------
++ +++++++++++++++++++++++++++
/* Interrupt came from user space */
/*
* Has a correct top of stack, but a partial stack frame
* %rcx: thread info. Interrupts off.
-- --------------------------- */
++ +++++++++++++++++++++++++++ */
retint_with_reschedule:
movl $_TIF_WORK_MASK,%edi
retint_check:
pushq %rdi
CFI_ADJUST_CFA_OFFSET 8
call schedule
-- --------------------------- popq %rdi
++ +++++++++++++++++++++++++++ popq %rdi
CFI_ADJUST_CFA_OFFSET -8
GET_THREAD_INFO(%rcx)
DISABLE_INTERRUPTS(CLBR_NONE)
TRACE_IRQS_OFF
jmp retint_check
-- ---------------------------
++ +++++++++++++++++++++++++++
retint_signal:
testl $_TIF_DO_NOTIFY_MASK,%edx
jz retint_swapgs
TRACE_IRQS_ON
ENABLE_INTERRUPTS(CLBR_NONE)
SAVE_REST
-- --------------------------- movq $-1,ORIG_RAX(%rsp)
++ +++++++++++++++++++++++++++ movq $-1,ORIG_RAX(%rsp)
xorl %esi,%esi # oldset
movq %rsp,%rdi # &pt_regs
call do_notify_resume
jnc retint_restore_args
call preempt_schedule_irq
jmp exit_intr
-- ---------------------------#endif
++ +++++++++++++++++++++++++++#endif
CFI_ENDPROC
END(common_interrupt)
-- ---------------------------
++ +++++++++++++++++++++++++++
/*
* APIC interrupts.
-- --------------------------- */
++ +++++++++++++++++++++++++++ */
.macro apicinterrupt num,func
INTR_FRAME
pushq $~(\num)
apicinterrupt THRESHOLD_APIC_VECTOR,mce_threshold_interrupt
END(threshold_interrupt)
-- ---------------------------#ifdef CONFIG_SMP
++ +++++++++++++++++++++++++++#ifdef CONFIG_SMP
ENTRY(reschedule_interrupt)
apicinterrupt RESCHEDULE_VECTOR,smp_reschedule_interrupt
END(reschedule_interrupt)
.macro INVALIDATE_ENTRY num
ENTRY(invalidate_interrupt\num)
-- --------------------------- apicinterrupt INVALIDATE_TLB_VECTOR_START+\num,smp_invalidate_interrupt
++ +++++++++++++++++++++++++++ apicinterrupt INVALIDATE_TLB_VECTOR_START+\num,smp_invalidate_interrupt
END(invalidate_interrupt\num)
.endm
ENTRY(spurious_interrupt)
apicinterrupt SPURIOUS_APIC_VECTOR,smp_spurious_interrupt
END(spurious_interrupt)
-- ---------------------------
++ +++++++++++++++++++++++++++
/*
* Exception entry points.
-- --------------------------- */
++ +++++++++++++++++++++++++++ */
.macro zeroentry sym
INTR_FRAME
PARAVIRT_ADJUST_EXCEPTION_FRAME
-- --------------------------- pushq $0 /* push error code/oldrax */
++ +++++++++++++++++++++++++++ pushq $0 /* push error code/oldrax */
CFI_ADJUST_CFA_OFFSET 8
-- --------------------------- pushq %rax /* push real oldrax to the rdi slot */
++ +++++++++++++++++++++++++++ pushq %rax /* push real oldrax to the rdi slot */
CFI_ADJUST_CFA_OFFSET 8
CFI_REL_OFFSET rax,0
leaq \sym(%rip),%rax
jmp error_entry
CFI_ENDPROC
-- --------------------------- .endm
++ +++++++++++++++++++++++++++ .endm
.macro errorentry sym
XCPT_FRAME
/*
* Exception entry point. This expects an error code/orig_rax on the stack
-- --------------------------- * and the exception handler in %rax.
-- --------------------------- */
++ +++++++++++++++++++++++++++ * and the exception handler in %rax.
++ +++++++++++++++++++++++++++ */
KPROBE_ENTRY(error_entry)
_frame RDI
CFI_REL_OFFSET rax,0
/* rdi slot contains rax, oldrax contains error code */
-- --------------------------- cld
++ +++++++++++++++++++++++++++ cld
subq $14*8,%rsp
CFI_ADJUST_CFA_OFFSET (14*8)
movq %rsi,13*8(%rsp)
CFI_REL_OFFSET rdx,RDX
movq %rcx,11*8(%rsp)
CFI_REL_OFFSET rcx,RCX
-- --------------------------- movq %rsi,10*8(%rsp) /* store rax */
++ +++++++++++++++++++++++++++ movq %rsi,10*8(%rsp) /* store rax */
CFI_REL_OFFSET rax,RAX
movq %r8, 9*8(%rsp)
CFI_REL_OFFSET r8,R8
CFI_REL_OFFSET r10,R10
movq %r11,6*8(%rsp)
CFI_REL_OFFSET r11,R11
-- --------------------------- movq %rbx,5*8(%rsp)
++ +++++++++++++++++++++++++++ movq %rbx,5*8(%rsp)
CFI_REL_OFFSET rbx,RBX
-- --------------------------- movq %rbp,4*8(%rsp)
++ +++++++++++++++++++++++++++ movq %rbp,4*8(%rsp)
CFI_REL_OFFSET rbp,RBP
-- --------------------------- movq %r12,3*8(%rsp)
++ +++++++++++++++++++++++++++ movq %r12,3*8(%rsp)
CFI_REL_OFFSET r12,R12
-- --------------------------- movq %r13,2*8(%rsp)
++ +++++++++++++++++++++++++++ movq %r13,2*8(%rsp)
CFI_REL_OFFSET r13,R13
-- --------------------------- movq %r14,1*8(%rsp)
++ +++++++++++++++++++++++++++ movq %r14,1*8(%rsp)
CFI_REL_OFFSET r14,R14
-- --------------------------- movq %r15,(%rsp)
++ +++++++++++++++++++++++++++ movq %r15,(%rsp)
CFI_REL_OFFSET r15,R15
-- --------------------------- xorl %ebx,%ebx
++ +++++++++++++++++++++++++++ xorl %ebx,%ebx
testl $3,CS(%rsp)
je error_kernelspace
-- ---------------------------error_swapgs:
++ +++++++++++++++++++++++++++error_swapgs:
SWAPGS
error_sti:
TRACE_IRQS_OFF
-- --------------------------- movq %rdi,RDI(%rsp)
++ +++++++++++++++++++++++++++ movq %rdi,RDI(%rsp)
CFI_REL_OFFSET rdi,RDI
movq %rsp,%rdi
-- --------------------------- movq ORIG_RAX(%rsp),%rsi /* get error code */
++ +++++++++++++++++++++++++++ movq ORIG_RAX(%rsp),%rsi /* get error code */
movq $-1,ORIG_RAX(%rsp)
call *%rax
/* ebx: no swapgs flag (1: don't need swapgs, 0: need it) */
RESTORE_REST
DISABLE_INTERRUPTS(CLBR_NONE)
TRACE_IRQS_OFF
-- --------------------------- GET_THREAD_INFO(%rcx)
++ +++++++++++++++++++++++++++ GET_THREAD_INFO(%rcx)
testl %eax,%eax
jne retint_kernel
LOCKDEP_SYS_EXIT_IRQ
/* There are two places in the kernel that can potentially fault with
usergs. Handle them here. The exception handlers after
iret run with kernel gs again, so don't set the user space flag.
-- --------------------------- B stepping K8s sometimes report an truncated RIP for IRET
++ +++++++++++++++++++++++++++ B stepping K8s sometimes report an truncated RIP for IRET
exceptions returning to compat mode. Check for these here too. */
leaq irq_return(%rip),%rcx
cmpq %rcx,RIP(%rsp)
je error_swapgs
jmp error_sti
KPROBE_END(error_entry)
-- ---------------------------
++ +++++++++++++++++++++++++++
/* Reload gs selector with exception handling */
-- --------------------------- /* edi: new selector */
++ +++++++++++++++++++++++++++ /* edi: new selector */
ENTRY(native_load_gs_index)
CFI_STARTPROC
pushf
CFI_ADJUST_CFA_OFFSET 8
DISABLE_INTERRUPTS(CLBR_ANY | ~(CLBR_RDI))
SWAPGS
-- ---------------------------gs_change:
-- --------------------------- movl %edi,%gs
++ +++++++++++++++++++++++++++gs_change:
++ +++++++++++++++++++++++++++ movl %edi,%gs
2: mfence /* workaround */
SWAPGS
popf
ret
CFI_ENDPROC
ENDPROC(native_load_gs_index)
-- ---------------------------
++ +++++++++++++++++++++++++++
.section __ex_table,"a"
.align 8
.quad gs_change,bad_gs
.previous
.section .fixup,"ax"
/* running with kernelgs */
-- ---------------------------bad_gs:
++ +++++++++++++++++++++++++++bad_gs:
SWAPGS /* switch back to user gs */
xorl %eax,%eax
movl %eax,%gs
jmp 2b
-- --------------------------- .previous
-- ---------------------------
++ +++++++++++++++++++++++++++ .previous
++ +++++++++++++++++++++++++++
/*
* Create a kernel thread.
*
xorl %r8d,%r8d
xorl %r9d,%r9d
-- ---------------------------
++ +++++++++++++++++++++++++++
# clone now
call do_fork
movq %rax,RAX(%rsp)
* so internally to the x86_64 port you can rely on kernel_thread()
* not to reschedule the child before returning, this avoids the need
* of hacks for example to fork off the per-CPU idle tasks.
-- --------------------------- * [Hopefully no generic code relies on the reschedule -AK]
++ +++++++++++++++++++++++++++ * [Hopefully no generic code relies on the reschedule -AK]
*/
RESTORE_ALL
UNFAKE_STACK_FRAME
ret
CFI_ENDPROC
ENDPROC(kernel_thread)
-- ---------------------------
++ +++++++++++++++++++++++++++
child_rip:
pushq $0 # fake return address
CFI_STARTPROC
# exit
mov %eax, %edi
call do_exit
+++++ ++++++++++++++++++++++++ ud2 # padding for call trace
CFI_ENDPROC
ENDPROC(child_rip)
ENTRY(kernel_execve)
CFI_STARTPROC
FAKE_STACK_FRAME $0
-- --------------------------- SAVE_ALL
++ +++++++++++++++++++++++++++ SAVE_ALL
movq %rsp,%rcx
call sys_execve
-- --------------------------- movq %rax, RAX(%rsp)
++ +++++++++++++++++++++++++++ movq %rax, RAX(%rsp)
RESTORE_REST
testq %rax,%rax
je int_ret_from_sys_call
END(coprocessor_error)
ENTRY(simd_coprocessor_error)
-- --------------------------- zeroentry do_simd_coprocessor_error
++ +++++++++++++++++++++++++++ zeroentry do_simd_coprocessor_error
END(simd_coprocessor_error)
ENTRY(device_not_available)
INTR_FRAME
PARAVIRT_ADJUST_EXCEPTION_FRAME
pushq $0
-- --------------------------- CFI_ADJUST_CFA_OFFSET 8
++ +++++++++++++++++++++++++++ CFI_ADJUST_CFA_OFFSET 8
paranoidentry do_debug, DEBUG_STACK
paranoidexit
KPROBE_END(debug)
-- --------------------------- /* runs on exception stack */
++ +++++++++++++++++++++++++++ /* runs on exception stack */
KPROBE_ENTRY(nmi)
INTR_FRAME
PARAVIRT_ADJUST_EXCEPTION_FRAME
END(bounds)
ENTRY(invalid_op)
-- --------------------------- zeroentry do_invalid_op
++ +++++++++++++++++++++++++++ zeroentry do_invalid_op
END(invalid_op)
ENTRY(coprocessor_segment_overrun)
INTR_FRAME
PARAVIRT_ADJUST_EXCEPTION_FRAME
pushq $0
-- --------------------------- CFI_ADJUST_CFA_OFFSET 8
++ +++++++++++++++++++++++++++ CFI_ADJUST_CFA_OFFSET 8
paranoidentry do_machine_check
jmp paranoid_exit1
CFI_ENDPROC
#define MICROCODE_VERSION "2.00"
-------------------------- ---struct microcode_ops *microcode_ops;
++++++++++++++++++++++++++ +++static struct microcode_ops *microcode_ops;
/* no concurrent ->write()s are allowed on /dev/cpu/microcode */
static DEFINE_MUTEX(microcode_mutex);
#endif
/* fake device for request_firmware */
-------------------------- ---struct platform_device *microcode_pdev;
++++++++++++++++++++++++++ +++static struct platform_device *microcode_pdev;
static ssize_t reload_store(struct sys_device *dev,
struct sysdev_attribute *attr,
.name = "microcode",
};
-----------------------------static void microcode_fini_cpu(int cpu)
+++++++++++++++++++++++++++++static void __microcode_fini_cpu(int cpu)
{
struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
----------------------------- mutex_lock(µcode_mutex);
microcode_ops->microcode_fini_cpu(cpu);
uci->valid = 0;
+++++++++++++++++++++++++++++}
+++++++++++++++++++++++++++++
+++++++++++++++++++++++++++++static void microcode_fini_cpu(int cpu)
+++++++++++++++++++++++++++++{
+++++++++++++++++++++++++++++ mutex_lock(µcode_mutex);
+++++++++++++++++++++++++++++ __microcode_fini_cpu(cpu);
mutex_unlock(µcode_mutex);
}
* to this cpu (a bit of paranoia):
*/
if (microcode_ops->collect_cpu_info(cpu, &nsig)) {
----------------------------- microcode_fini_cpu(cpu);
+++++++++++++++++++++++++++++ __microcode_fini_cpu(cpu);
+++++++++++++++++++++++++++++ printk(KERN_ERR "failed to collect_cpu_info for resuming cpu #%d\n",
+++++++++++++++++++++++++++++ cpu);
return -1;
}
----------------------------- if (memcmp(&nsig, &uci->cpu_sig, sizeof(nsig))) {
----------------------------- microcode_fini_cpu(cpu);
+++++++++++++++++++++++++++++ if ((nsig.sig != uci->cpu_sig.sig) || (nsig.pf != uci->cpu_sig.pf)) {
+++++++++++++++++++++++++++++ __microcode_fini_cpu(cpu);
+++++++++++++++++++++++++++++ printk(KERN_ERR "cached ucode doesn't match the resuming cpu #%d\n",
+++++++++++++++++++++++++++++ cpu);
/* Should we look for a new ucode here? */
return 1;
}
return 0;
}
-------------------------- ---void microcode_update_cpu(int cpu)
++++++++++++++++++++++++++ +++static void microcode_update_cpu(int cpu)
{
struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
int err = 0;
printk(KERN_INFO
"Microcode Update Driver: v" MICROCODE_VERSION
- -- - - " <tigran@aivazian.fsnet.co.uk>"
- -- - - " <peter.oruba@amd.com>\n");
+ ++ + + " <tigran@aivazian.fsnet.co.uk>,"
+ ++ + + " Peter Oruba\n");
return 0;
}
static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
{
struct cpuinfo_x86 *c = &cpu_data(cpu_num);
+++++++++++++++++++++++++++++ unsigned long flags;
unsigned int val[2];
memset(csig, 0, sizeof(*csig));
csig->pf = 1 << ((val[1] >> 18) & 7);
}
+++++++++++++++++++++++++++++ /* serialize access to the physical write to MSR 0x79 */
+++++++++++++++++++++++++++++ spin_lock_irqsave(µcode_update_lock, flags);
+++++++++++++++++++++++++++++
wrmsr(MSR_IA32_UCODE_REV, 0, 0);
/* see notes above for revision 1.07. Apparent chip bug */
sync_core();
/* get the current revision from MSR 0x8B */
rdmsr(MSR_IA32_UCODE_REV, val[0], csig->rev);
+++++++++++++++++++++++++++++ spin_unlock_irqrestore(µcode_update_lock, flags);
+++++++++++++++++++++++++++++
pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n",
csig->sig, csig->pf, csig->rev);
uci->mc = NULL;
}
-------------------------- ---struct microcode_ops microcode_intel_ops = {
++++++++++++++++++++++++++ +++static struct microcode_ops microcode_intel_ops = {
.request_microcode_user = request_microcode_user,
.request_microcode_fw = request_microcode_fw,
.collect_cpu_info = collect_cpu_info,
atomic_dec(&nmi_active);
}
+ ++++++++++++++++++++++++++++static void __acpi_nmi_disable(void *__unused)
+ ++++++++++++++++++++++++++++{
+ ++++++++++++++++++++++++++++ apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED);
+ ++++++++++++++++++++++++++++}
+ ++++++++++++++++++++++++++++
int __init check_nmi_watchdog(void)
{
unsigned int *prev_nmi_count;
kfree(prev_nmi_count);
return 0;
error:
- ---------------------------- if (nmi_watchdog == NMI_IO_APIC && !timer_through_8259)
- ---------------------------- disable_8259A_irq(0);
+ ++++++++++++++++++++++++++++ if (nmi_watchdog == NMI_IO_APIC) {
+ ++++++++++++++++++++++++++++ if (!timer_through_8259)
+ ++++++++++++++++++++++++++++ disable_8259A_irq(0);
+ ++++++++++++++++++++++++++++ on_each_cpu(__acpi_nmi_disable, NULL, 1);
+ ++++++++++++++++++++++++++++ }
+ ++++++++++++++++++++++++++++
#ifdef CONFIG_X86_32
timer_ack = 0;
#endif
++str;
}
------------------ ----------- get_option(&str, &nmi);
------------------ -----------
------------------ ----------- if (nmi >= NMI_INVALID)
------------------ ----------- return 0;
++++++++++++++++++ +++++++++++ if (!strncmp(str, "lapic", 5))
++++++++++++++++++ +++++++++++ nmi_watchdog = NMI_LOCAL_APIC;
++++++++++++++++++ +++++++++++ else if (!strncmp(str, "ioapic", 6))
++++++++++++++++++ +++++++++++ nmi_watchdog = NMI_IO_APIC;
++++++++++++++++++ +++++++++++ else {
++++++++++++++++++ +++++++++++ get_option(&str, &nmi);
++++++++++++++++++ +++++++++++ if (nmi >= NMI_INVALID)
++++++++++++++++++ +++++++++++ return 0;
++++++++++++++++++ +++++++++++ nmi_watchdog = nmi;
++++++++++++++++++ +++++++++++ }
------------------ ----------- nmi_watchdog = nmi;
return 1;
}
__setup("nmi_watchdog=", setup_nmi_watchdog);
on_each_cpu(__acpi_nmi_enable, NULL, 1);
}
- ----------------------------static void __acpi_nmi_disable(void *__unused)
- ----------------------------{
- ---------------------------- apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED);
- ----------------------------}
- ----------------------------
/*
* Disable timer based NMIs on all CPUs:
*/
return;
if (nmi_watchdog == NMI_LOCAL_APIC)
lapic_watchdog_stop();
+ ++++++++++++++++++++++++++++ else
+ ++++++++++++++++++++++++++++ __acpi_nmi_disable(NULL);
__get_cpu_var(wd_enabled) = 0;
atomic_dec(&nmi_active);
}
#ifdef CONFIG_SYSCTL
+ ++++++++++++++++++++++++++++static void enable_ioapic_nmi_watchdog_single(void *unused)
+ ++++++++++++++++++++++++++++{
+ ++++++++++++++++++++++++++++ __get_cpu_var(wd_enabled) = 1;
+ ++++++++++++++++++++++++++++ atomic_inc(&nmi_active);
+ ++++++++++++++++++++++++++++ __acpi_nmi_enable(NULL);
+ ++++++++++++++++++++++++++++}
+ ++++++++++++++++++++++++++++
+ ++++++++++++++++++++++++++++static void enable_ioapic_nmi_watchdog(void)
+ ++++++++++++++++++++++++++++{
+ ++++++++++++++++++++++++++++ on_each_cpu(enable_ioapic_nmi_watchdog_single, NULL, 1);
+ ++++++++++++++++++++++++++++ touch_nmi_watchdog();
+ ++++++++++++++++++++++++++++}
+ ++++++++++++++++++++++++++++
+ ++++++++++++++++++++++++++++static void disable_ioapic_nmi_watchdog(void)
+ ++++++++++++++++++++++++++++{
+ ++++++++++++++++++++++++++++ on_each_cpu(stop_apic_nmi_watchdog, NULL, 1);
+ ++++++++++++++++++++++++++++}
+ ++++++++++++++++++++++++++++
static int __init setup_unknown_nmi_panic(char *str)
{
unknown_nmi_panic = 1;
enable_lapic_nmi_watchdog();
else
disable_lapic_nmi_watchdog();
+ ++++++++++++++++++++++++++++ } else if (nmi_watchdog == NMI_IO_APIC) {
+ ++++++++++++++++++++++++++++ if (nmi_watchdog_enabled)
+ ++++++++++++++++++++++++++++ enable_ioapic_nmi_watchdog();
+ ++++++++++++++++++++++++++++ else
+ ++++++++++++++++++++++++++++ disable_ioapic_nmi_watchdog();
} else {
printk(KERN_WARNING
"NMI watchdog doesn't know what hardware to touch\n");
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/mm.h>
++ +++++++++++++++++++++++++++#include <asm/idle.h>
#include <linux/smp.h>
#include <linux/slab.h>
#include <linux/sched.h>
#include <linux/pm.h>
#include <linux/clockchips.h>
#include <asm/system.h>
+++++++++++++++++++++++ ++++++#include <asm/apic.h>
unsigned long idle_halt;
EXPORT_SYMBOL(idle_halt);
EXPORT_SYMBOL(default_idle);
#endif
+++++++++++++++++++++++ ++++++void stop_this_cpu(void *dummy)
+++++++++++++++++++++++ ++++++{
+++++++++++++++++++++++ ++++++ local_irq_disable();
+++++++++++++++++++++++ ++++++ /*
+++++++++++++++++++++++ ++++++ * Remove this CPU:
+++++++++++++++++++++++ ++++++ */
+++++++++++++++++++++++ ++++++ cpu_clear(smp_processor_id(), cpu_online_map);
+++++++++++++++++++++++ ++++++ disable_local_APIC();
+++++++++++++++++++++++ ++++++
+++++++++++++++++++++++ ++++++ for (;;) {
+++++++++++++++++++++++ ++++++ if (hlt_works(smp_processor_id()))
+++++++++++++++++++++++ ++++++ halt();
+++++++++++++++++++++++ ++++++ }
+++++++++++++++++++++++ ++++++}
+++++++++++++++++++++++ ++++++
static void do_nothing(void *unused)
{
}
# include <asm/iommu.h>
#endif
++++ +++++++++++++++++++++++++#include <mach_ipi.h>
++++ +++++++++++++++++++++++++
++++ +++++++++++++++++++++++++
/*
* Power off function, if any
*/
static const struct desc_ptr no_idt = {};
static int reboot_mode;
- - -- - - /*
- - -- - - * Keyboard reset and triple fault may result in INIT, not RESET, which
- - -- - - * doesn't work when we're in vmx root mode. Try ACPI first.
- - -- - - */
- - -- - - enum reboot_type reboot_type = BOOT_ACPI;
+ + ++ + + enum reboot_type reboot_type = BOOT_KBD;
int reboot_force;
#if defined(CONFIG_X86_32) && defined(CONFIG_SMP)
static int reboot_cpu = -1;
#endif
----------------------- ------/* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old]
+++++++++++++++++++++++ ++++++/* This is set by the PCI code if either type 1 or type 2 PCI is detected */
+++++++++++++++++++++++ ++++++bool port_cf9_safe = false;
+++++++++++++++++++++++ ++++++
+++++++++++++++++++++++ ++++++/* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | p[ci]
warm Don't set the cold reboot flag
cold Set the cold reboot flag
bios Reboot by jumping through the BIOS (only for X86_32)
kbd Use the keyboard controller. cold reset (default)
acpi Use the RESET_REG in the FADT
efi Use efi reset_system runtime service
+++++++++++++++++++++++ ++++++ pci Use the so-called "PCI reset register", CF9
force Avoid anything that could hang.
*/
static int __init reboot_setup(char *str)
case 'k':
case 't':
case 'e':
+++++++++++++++++++++++ ++++++ case 'p':
reboot_type = *str;
break;
DMI_MATCH(DMI_BOARD_NAME, "0KW626"),
},
},
+ + + + ++ ++ + + { /* Handle problems with rebooting on Dell Optiplex 330 with 0KP561 */
+ + + + ++ ++ + + .callback = set_bios_reboot,
+ + + + ++ ++ + + .ident = "Dell OptiPlex 330",
+ + + + ++ ++ + + .matches = {
+ + + + ++ ++ + + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
+ + + + ++ ++ + + DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 330"),
+ + + + ++ ++ + + DMI_MATCH(DMI_BOARD_NAME, "0KP561"),
+ + + + ++ ++ + + },
+ + + + ++ ++ + + },
{ /* Handle problems with rebooting on Dell 2400's */
.callback = set_bios_reboot,
.ident = "Dell PowerEdge 2400",
reboot_type = BOOT_KBD;
break;
----------------------- ------
case BOOT_EFI:
if (efi_enabled)
----------------------- ------ efi.reset_system(reboot_mode ? EFI_RESET_WARM : EFI_RESET_COLD,
+++++++++++++++++++++++ ++++++ efi.reset_system(reboot_mode ?
+++++++++++++++++++++++ ++++++ EFI_RESET_WARM :
+++++++++++++++++++++++ ++++++ EFI_RESET_COLD,
EFI_SUCCESS, 0, NULL);
+++++++++++++++++++++++ ++++++ reboot_type = BOOT_KBD;
+++++++++++++++++++++++ ++++++ break;
+ + ++ + +
+++++++++++++++++++++++ ++++++ case BOOT_CF9:
+++++++++++++++++++++++ ++++++ port_cf9_safe = true;
+++++++++++++++++++++++ ++++++ /* fall through */
+++++++ + +++++++ + ++ + ++++
+++++++++++++++++++++++ ++++++ case BOOT_CF9_COND:
+++++++++++++++++++++++ ++++++ if (port_cf9_safe) {
+++++++++++++++++++++++ ++++++ u8 cf9 = inb(0xcf9) & ~6;
+++++++++++++++++++++++ ++++++ outb(cf9|2, 0xcf9); /* Request hard reset */
+++++++++++++++++++++++ ++++++ udelay(50);
+++++++++++++++++++++++ ++++++ outb(cf9|6, 0xcf9); /* Actually do the reset */
+++++++++++++++++++++++ ++++++ udelay(50);
+++++++++++++++++++++++ ++++++ }
reboot_type = BOOT_KBD;
break;
}
static void native_machine_halt(void)
{
+++++++++++++++++++++++ ++++++ /* stop other cpus and apics */
+++++++++++++++++++++++ ++++++ machine_shutdown();
+++++++++++++++++++++++ ++++++
+++++++++++++++++++++++ ++++++ /* stop this cpu */
+++++++++++++++++++++++ ++++++ stop_this_cpu(NULL);
}
static void native_machine_power_off(void)
machine_ops.crash_shutdown(regs);
}
#endif
++++ +++++++++++++++++++++++++
++++ +++++++++++++++++++++++++
++++ +++++++++++++++++++++++++#if defined(CONFIG_SMP)
++++ +++++++++++++++++++++++++
++++ +++++++++++++++++++++++++/* This keeps a track of which one is crashing cpu. */
++++ +++++++++++++++++++++++++static int crashing_cpu;
++++ +++++++++++++++++++++++++static nmi_shootdown_cb shootdown_callback;
++++ +++++++++++++++++++++++++
++++ +++++++++++++++++++++++++static atomic_t waiting_for_crash_ipi;
++++ +++++++++++++++++++++++++
++++ +++++++++++++++++++++++++static int crash_nmi_callback(struct notifier_block *self,
++++ +++++++++++++++++++++++++ unsigned long val, void *data)
++++ +++++++++++++++++++++++++{
++++ +++++++++++++++++++++++++ int cpu;
++++ +++++++++++++++++++++++++
++++ +++++++++++++++++++++++++ if (val != DIE_NMI_IPI)
++++ +++++++++++++++++++++++++ return NOTIFY_OK;
++++ +++++++++++++++++++++++++
++++ +++++++++++++++++++++++++ cpu = raw_smp_processor_id();
++++ +++++++++++++++++++++++++
++++ +++++++++++++++++++++++++ /* Don't do anything if this handler is invoked on crashing cpu.
++++ +++++++++++++++++++++++++ * Otherwise, system will completely hang. Crashing cpu can get
++++ +++++++++++++++++++++++++ * an NMI if system was initially booted with nmi_watchdog parameter.
++++ +++++++++++++++++++++++++ */
++++ +++++++++++++++++++++++++ if (cpu == crashing_cpu)
++++ +++++++++++++++++++++++++ return NOTIFY_STOP;
++++ +++++++++++++++++++++++++ local_irq_disable();
++++ +++++++++++++++++++++++++
++++ +++++++++++++++++++++++++ shootdown_callback(cpu, (struct die_args *)data);
++++ +++++++++++++++++++++++++
++++ +++++++++++++++++++++++++ atomic_dec(&waiting_for_crash_ipi);
++++ +++++++++++++++++++++++++ /* Assume hlt works */
++++ +++++++++++++++++++++++++ halt();
++++ +++++++++++++++++++++++++ for (;;)
++++ +++++++++++++++++++++++++ cpu_relax();
++++ +++++++++++++++++++++++++
++++ +++++++++++++++++++++++++ return 1;
++++ +++++++++++++++++++++++++}
++++ +++++++++++++++++++++++++
++++ +++++++++++++++++++++++++static void smp_send_nmi_allbutself(void)
++++ +++++++++++++++++++++++++{
++++ +++++++++++++++++++++++++ cpumask_t mask = cpu_online_map;
++++ +++++++++++++++++++++++++ cpu_clear(safe_smp_processor_id(), mask);
++++ +++++++++++++++++++++++++ if (!cpus_empty(mask))
++++ +++++++++++++++++++++++++ send_IPI_mask(mask, NMI_VECTOR);
++++ +++++++++++++++++++++++++}
++++ +++++++++++++++++++++++++
++++ +++++++++++++++++++++++++static struct notifier_block crash_nmi_nb = {
++++ +++++++++++++++++++++++++ .notifier_call = crash_nmi_callback,
++++ +++++++++++++++++++++++++};
++++ +++++++++++++++++++++++++
++++ +++++++++++++++++++++++++/* Halt all other CPUs, calling the specified function on each of them
++++ +++++++++++++++++++++++++ *
++++ +++++++++++++++++++++++++ * This function can be used to halt all other CPUs on crash
++++ +++++++++++++++++++++++++ * or emergency reboot time. The function passed as parameter
++++ +++++++++++++++++++++++++ * will be called inside a NMI handler on all CPUs.
++++ +++++++++++++++++++++++++ */
++++ +++++++++++++++++++++++++void nmi_shootdown_cpus(nmi_shootdown_cb callback)
++++ +++++++++++++++++++++++++{
++++ +++++++++++++++++++++++++ unsigned long msecs;
++++ +++++++++++++++++++++++++ local_irq_disable();
++++ +++++++++++++++++++++++++
++++ +++++++++++++++++++++++++ /* Make a note of crashing cpu. Will be used in NMI callback.*/
++++ +++++++++++++++++++++++++ crashing_cpu = safe_smp_processor_id();
++++ +++++++++++++++++++++++++
++++ +++++++++++++++++++++++++ shootdown_callback = callback;
++++ +++++++++++++++++++++++++
++++ +++++++++++++++++++++++++ atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1);
++++ +++++++++++++++++++++++++ /* Would it be better to replace the trap vector here? */
++++ +++++++++++++++++++++++++ if (register_die_notifier(&crash_nmi_nb))
++++ +++++++++++++++++++++++++ return; /* return what? */
++++ +++++++++++++++++++++++++ /* Ensure the new callback function is set before sending
++++ +++++++++++++++++++++++++ * out the NMI
++++ +++++++++++++++++++++++++ */
++++ +++++++++++++++++++++++++ wmb();
++++ +++++++++++++++++++++++++
++++ +++++++++++++++++++++++++ smp_send_nmi_allbutself();
++++ +++++++++++++++++++++++++
++++ +++++++++++++++++++++++++ msecs = 1000; /* Wait at most a second for the other cpus to stop */
++++ +++++++++++++++++++++++++ while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) {
++++ +++++++++++++++++++++++++ mdelay(1);
++++ +++++++++++++++++++++++++ msecs--;
++++ +++++++++++++++++++++++++ }
++++ +++++++++++++++++++++++++
++++ +++++++++++++++++++++++++ /* Leave the nmi callback set */
++++ +++++++++++++++++++++++++}
++++ +++++++++++++++++++++++++#else /* !CONFIG_SMP */
++++ +++++++++++++++++++++++++void nmi_shootdown_cpus(nmi_shootdown_cb callback)
++++ +++++++++++++++++++++++++{
++++ +++++++++++++++++++++++++ /* No other CPUs to shoot down */
++++ +++++++++++++++++++++++++}
++++ +++++++++++++++++++++++++#endif
#include <mach_apic.h>
#include <asm/paravirt.h>
+++++++ ++++++++++++++++++++++#include <asm/hypervisor.h>
#include <asm/percpu.h>
#include <asm/topology.h>
* @size: Size of the crashkernel memory to reserve.
* Returns the base address on success, and -1ULL on failure.
*/
++ +++++++++++++++++++++++++++static
unsigned long long __init find_and_reserve_crashkernel(unsigned long long size)
{
const unsigned long long alignment = 16<<20; /* 16M */
early_param("elfcorehdr", setup_elfcorehdr);
#endif
---------------------- -------static struct x86_quirks default_x86_quirks __initdata;
-------------- ------- -------
-------------- ------- -------struct x86_quirks *x86_quirks __initdata = &default_x86_quirks;
-------------- ------- -------
-------------- ------- -------/*
-------------- ------- ------- * Some BIOSes seem to corrupt the low 64k of memory during events
-------------- ------- ------- * like suspend/resume and unplugging an HDMI cable. Reserve all
-------------- ------- ------- * remaining free memory in that area and fill it with a distinct
-------------- ------- ------- * pattern.
-------------- ------- ------- */
-------------- ------- -------#ifdef CONFIG_X86_CHECK_BIOS_CORRUPTION
-------------- ------- -------#define MAX_SCAN_AREAS 8
-------------- ------- -------
-------------- ------- -------static int __read_mostly memory_corruption_check = -1;
-------------- ------- -------
-------------- ------- -------static unsigned __read_mostly corruption_check_size = 64*1024;
-------------- ------- -------static unsigned __read_mostly corruption_check_period = 60; /* seconds */
-------------- ------- -------
-------------- ------- -------static struct e820entry scan_areas[MAX_SCAN_AREAS];
-------------- ------- -------static int num_scan_areas;
-------------- ------- -------
-------------- ------- -------
-------------- ------- -------static int set_corruption_check(char *arg)
----- --- -- ---- -- ------ {
----- --- -- ---- -- ------ char *end;
----- --- -- ---- -- ------
----- --- -- ---- -- ------ memory_corruption_check = simple_strtol(arg, &end, 10);
----- --- -- ---- -- ------
----- --- -- ---- -- ------ return (*end == 0) ? 0 : -EINVAL;
----- --- -- ---- -- ------ }
----- --- -- ---- -- ------ early_param("memory_corruption_check", set_corruption_check);
----- --- -- ---- -- ------
----- --- -- ---- -- ------ static int set_corruption_check_period(char *arg)
----- --- -- ---- -- ------ {
----- --- -- ---- -- ------ char *end;
----- --- -- ---- -- ------
----- --- -- ---- -- ------ corruption_check_period = simple_strtoul(arg, &end, 10);
----- --- -- ---- -- ------
----- --- -- ---- -- ------ return (*end == 0) ? 0 : -EINVAL;
----- --- -- ---- -- ------ }
----- --- -- ---- -- ------ early_param("memory_corruption_check_period", set_corruption_check_period);
----- --- -- ---- -- ------
----- --- -- ---- -- ------ static int set_corruption_check_size(char *arg)
----- --- -- ---- -- ------ {
----- --- -- ---- -- ------ char *end;
----- --- -- ---- -- ------ unsigned size;
----- --- -- ---- -- ------
----- --- -- ---- -- ------ size = memparse(arg, &end);
----- --- -- ---- -- ------
----- --- -- ---- -- ------ if (*end == '\0')
----- --- -- ---- -- ------ corruption_check_size = size;
----- --- -- ---- -- ------
----- --- -- ---- -- ------ return (size == corruption_check_size) ? 0 : -EINVAL;
----- --- -- ---- -- ------ }
----- --- -- ---- -- ------ early_param("memory_corruption_check_size", set_corruption_check_size);
----- --- -- ---- -- ------
----- --- -- ---- -- ------
----- --- -- ---- -- ------ static void __init setup_bios_corruption_check(void)
++++++++++++++++++++++ +++++++static int __init default_update_genapic(void)
+ {
-- - - - - char *end;
-- - - - -
-- - - - - memory_corruption_check = simple_strtol(arg, &end, 10);
-- - - - -
-- - - - - return (*end == 0) ? 0 : -EINVAL;
-- - - - -}
-- - - - -early_param("memory_corruption_check", set_corruption_check);
-- - - - -
-- - - - -static int set_corruption_check_period(char *arg)
-- - - - -{
-- - - - - char *end;
-- - - - -
-- - - - - corruption_check_period = simple_strtoul(arg, &end, 10);
-- - - - -
-- - - - - return (*end == 0) ? 0 : -EINVAL;
-- - - - -}
-- - - - -early_param("memory_corruption_check_period", set_corruption_check_period);
-- - - - -
-- - - - -static int set_corruption_check_size(char *arg)
-- - - - -{
-- - - - - char *end;
-- - - - - unsigned size;
-- - - - -
-- - - - - size = memparse(arg, &end);
-- - - - -
-- - - - - if (*end == '\0')
-- - - - - corruption_check_size = size;
-- - - - -
-- - - - - return (size == corruption_check_size) ? 0 : -EINVAL;
-- - - - -}
-- - - - -early_param("memory_corruption_check_size", set_corruption_check_size);
-- - - - -
-- - - - -
-- - - - -static void __init setup_bios_corruption_check(void)
-- - - - -{
-------------- ------- ------- u64 addr = PAGE_SIZE; /* assume first page is reserved anyway */
-------------- ------- -------
-------------- ------- ------- if (memory_corruption_check == -1) {
-------------- ------- ------- memory_corruption_check =
-------------- ------- -------#ifdef CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK
-------------- ------- ------- 1
-------------- ------- -------#else
-------------- ------- ------- 0
++++++++++++++++++++++ +++++++#ifdef CONFIG_X86_SMP
++++++++++++++++++++++ +++++++# if defined(CONFIG_X86_GENERICARCH) || defined(CONFIG_X86_64)
++++++++++++++++++++++ +++++++ genapic->wakeup_cpu = wakeup_secondary_cpu_via_init;
++++++++++++++++++++++ +++++++# endif
+ #endif
-------------- ------- ------- ;
-------------- ------- ------- }
------- ------ ------- -------
------- ------ ------- ------- if (corruption_check_size == 0)
------- ------ ------- ------- memory_corruption_check = 0;
------- ------ ------- -------
------- ------ ------- ------- if (!memory_corruption_check)
------- ------ ------- ------- return;
------- ------ ------- -------
------- ------ ------- ------- corruption_check_size = round_up(corruption_check_size, PAGE_SIZE);
----- --- -- ---- -- ------
----- --- -- ---- -- ------ while(addr < corruption_check_size && num_scan_areas < MAX_SCAN_AREAS) {
----- --- -- ---- -- ------ u64 size;
----- --- -- ---- -- ------ addr = find_e820_area_size(addr, &size, PAGE_SIZE);
----- --- -- ---- -- ------
----- --- -- ---- -- ------ if (addr == 0)
----- --- -- ---- -- ------ break;
+
- if (corruption_check_size == 0)
- memory_corruption_check = 0;
-
- if (!memory_corruption_check)
- return;
-
- corruption_check_size = round_up(corruption_check_size, PAGE_SIZE);
-
-- - - - - while(addr < corruption_check_size && num_scan_areas < MAX_SCAN_AREAS) {
-- - - - - u64 size;
-- - - - - addr = find_e820_area_size(addr, &size, PAGE_SIZE);
-- - - - -
-- - - - - if (addr == 0)
-- - - - - break;
-- - - - -
-------------- ------- ------- if ((addr + size) > corruption_check_size)
-------------- ------- ------- size = corruption_check_size - addr;
-------------- ------- -------
-------------- ------- ------- if (size == 0)
-------------- ------- ------- break;
-------------- ------- -------
-------------- ------- ------- e820_update_range(addr, size, E820_RAM, E820_RESERVED);
-------------- ------- ------- scan_areas[num_scan_areas].addr = addr;
-------------- ------- ------- scan_areas[num_scan_areas].size = size;
-------------- ------- ------- num_scan_areas++;
-------------- ------- -------
-------------- ------- ------- /* Assume we've already mapped this early memory */
-------------- ------- ------- memset(__va(addr), 0, size);
-------------- ------- -------
-------------- ------- ------- addr += size;
-------------- ------- ------- }
-------------- ------- -------
-------------- ------- ------- printk(KERN_INFO "Scanning %d areas for low memory corruption\n",
-------------- ------- ------- num_scan_areas);
-------------- ------- ------- update_e820();
-------------- ------- -------}
-------------- ------- -------
-------------- ------- -------static struct timer_list periodic_check_timer;
-------------- ------- -------
-------------- ------- -------void check_for_bios_corruption(void)
-------------- ------- -------{
-------------- ------- ------- int i;
-------------- ------- ------- int corruption = 0;
-------------- ------- -------
-------------- ------- ------- if (!memory_corruption_check)
-------------- ------- ------- return;
-------------- ------- -------
-------------- ------- ------- for(i = 0; i < num_scan_areas; i++) {
-------------- ------- ------- unsigned long *addr = __va(scan_areas[i].addr);
-------------- ------- ------- unsigned long size = scan_areas[i].size;
-------------- ------- -------
-------------- ------- ------- for(; size; addr++, size -= sizeof(unsigned long)) {
-------------- ------- ------- if (!*addr)
-------------- ------- ------- continue;
-------------- ------- ------- printk(KERN_ERR "Corrupted low memory at %p (%lx phys) = %08lx\n",
-------------- ------- ------- addr, __pa(addr), *addr);
-------------- ------- ------- corruption = 1;
-------------- ------- ------- *addr = 0;
-------------- ------- ------- }
-------------- ------- ------- }
-------------- ------- -------
-------------- ------- ------- WARN(corruption, KERN_ERR "Memory corruption detected in low memory\n");
-------------- ------- -------}
-------------- ------- -------
-------------- ------- -------static void periodic_check_for_corruption(unsigned long data)
-------------- ------- -------{
-------------- ------- ------- check_for_bios_corruption();
-------------- ------- ------- mod_timer(&periodic_check_timer, round_jiffies(jiffies + corruption_check_period*HZ));
++++++++++++++++++++++ +++++++ return 0;
+ }
+
-------------- ------- -------void start_periodic_check_for_corruption(void)
-------------- ------- -------{
-------------- ------- ------- if (!memory_corruption_check || corruption_check_period == 0)
-------------- ------- ------- return;
-------------- ------- -------
-------------- ------- ------- printk(KERN_INFO "Scanning for low memory corruption every %d seconds\n",
-------------- ------- ------- corruption_check_period);
++++++++++++++++++++++ +++++++static struct x86_quirks default_x86_quirks __initdata = {
++++++++++++++++++++++ +++++++ .update_genapic = default_update_genapic,
++++++++++++++++++++++ +++++++};
-------------- ------- ------- init_timer(&periodic_check_timer);
-------------- ------- ------- periodic_check_timer.function = &periodic_check_for_corruption;
-------------- ------- ------- periodic_check_for_corruption(0);
-------------- ------- -------}
-------------- ------- -------#endif
++++++++++++++ +++++++ +++++++struct x86_quirks *x86_quirks __initdata = &default_x86_quirks;
- /*
- * Some BIOSes seem to corrupt the low 64k of memory during events
- * like suspend/resume and unplugging an HDMI cable. Reserve all
- * remaining free memory in that area and fill it with a distinct
- * pattern.
- */
- #ifdef CONFIG_X86_CHECK_BIOS_CORRUPTION
- #define MAX_SCAN_AREAS 8
-
- static int __read_mostly memory_corruption_check = -1;
-
- static unsigned __read_mostly corruption_check_size = 64*1024;
- static unsigned __read_mostly corruption_check_period = 60; /* seconds */
-
- static struct e820entry scan_areas[MAX_SCAN_AREAS];
- static int num_scan_areas;
-
-
- static int set_corruption_check(char *arg)
- {
- char *end;
-
- memory_corruption_check = simple_strtol(arg, &end, 10);
-
- return (*end == 0) ? 0 : -EINVAL;
- }
- early_param("memory_corruption_check", set_corruption_check);
-
- static int set_corruption_check_period(char *arg)
- {
- char *end;
-
- corruption_check_period = simple_strtoul(arg, &end, 10);
-
- return (*end == 0) ? 0 : -EINVAL;
- }
- early_param("memory_corruption_check_period", set_corruption_check_period);
-
- static int set_corruption_check_size(char *arg)
- {
- char *end;
- unsigned size;
-
- size = memparse(arg, &end);
-
- if (*end == '\0')
- corruption_check_size = size;
-
- return (size == corruption_check_size) ? 0 : -EINVAL;
- }
- early_param("memory_corruption_check_size", set_corruption_check_size);
-
-
- static void __init setup_bios_corruption_check(void)
- {
- u64 addr = PAGE_SIZE; /* assume first page is reserved anyway */
-
- if (memory_corruption_check == -1) {
- memory_corruption_check =
- #ifdef CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK
- 1
- #else
- 0
- #endif
- ;
- }
-
- if (corruption_check_size == 0)
- memory_corruption_check = 0;
-
- if (!memory_corruption_check)
- return;
-
- corruption_check_size = round_up(corruption_check_size, PAGE_SIZE);
-
- while(addr < corruption_check_size && num_scan_areas < MAX_SCAN_AREAS) {
- u64 size;
- addr = find_e820_area_size(addr, &size, PAGE_SIZE);
-
- if (addr == 0)
- break;
-
- if ((addr + size) > corruption_check_size)
- size = corruption_check_size - addr;
-
- if (size == 0)
- break;
-
- e820_update_range(addr, size, E820_RAM, E820_RESERVED);
- scan_areas[num_scan_areas].addr = addr;
- scan_areas[num_scan_areas].size = size;
- num_scan_areas++;
-
- /* Assume we've already mapped this early memory */
- memset(__va(addr), 0, size);
-
- addr += size;
- }
-
- printk(KERN_INFO "Scanning %d areas for low memory corruption\n",
- num_scan_areas);
- update_e820();
- }
-
- static struct timer_list periodic_check_timer;
-
- void check_for_bios_corruption(void)
- {
- int i;
- int corruption = 0;
-
- if (!memory_corruption_check)
- return;
-
- for(i = 0; i < num_scan_areas; i++) {
- unsigned long *addr = __va(scan_areas[i].addr);
- unsigned long size = scan_areas[i].size;
-
- for(; size; addr++, size -= sizeof(unsigned long)) {
- if (!*addr)
- continue;
- printk(KERN_ERR "Corrupted low memory at %p (%lx phys) = %08lx\n",
- addr, __pa(addr), *addr);
- corruption = 1;
- *addr = 0;
- }
- }
-
- WARN(corruption, KERN_ERR "Memory corruption detected in low memory\n");
- }
-
- static void periodic_check_for_corruption(unsigned long data)
- {
- check_for_bios_corruption();
- mod_timer(&periodic_check_timer, round_jiffies(jiffies + corruption_check_period*HZ));
- }
-
- void start_periodic_check_for_corruption(void)
- {
- if (!memory_corruption_check || corruption_check_period == 0)
- return;
-
- printk(KERN_INFO "Scanning for low memory corruption every %d seconds\n",
- corruption_check_period);
-
- init_timer(&periodic_check_timer);
- periodic_check_timer.function = &periodic_check_for_corruption;
- periodic_check_for_corruption(0);
- }
- #endif
-
++++++++++++++ +++++++++++++++#ifdef CONFIG_X86_RESERVE_LOW_64K
static int __init dmi_low_memory_corruption(const struct dmi_system_id *d)
{
printk(KERN_NOTICE
return 0;
}
++++++++++++++ +++++++++++++++#endif
/* List of systems that have known low memory corruption BIOS problems */
static struct dmi_system_id __initdata bad_bios_dmi_table[] = {
.callback = dmi_low_memory_corruption,
.ident = "Phoenix BIOS",
.matches = {
- - - -- -- - - DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"),
+ + + ++ ++ + + DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies"),
},
},
#endif
printk(KERN_INFO "Command line: %s\n", boot_command_line);
#endif
+++++++++ +++++++ +++++++++ /* VMI may relocate the fixmap; do this before touching ioremap area */
+++++++++ +++++++ +++++++++ vmi_init();
+++++++++ +++++++ +++++++++
early_cpu_init();
early_ioremap_init();
check_efer();
#endif
--------- ------- --------- #if defined(CONFIG_VMI) && defined(CONFIG_X86_32)
--------- ------- --------- /*
--------- ------- --------- * Must be before kernel pagetables are setup
--------- ------- --------- * or fixmap area is touched.
--------- ------- --------- */
--------- ------- --------- vmi_init();
--------- ------- --------- #endif
+++++++++ +++++++ +++++++++ /* Must be before kernel pagetables are setup */
+++++++++ +++++++ +++++++++ vmi_activate();
/* after early param, so could get panic from serial */
reserve_early_setup_data();
dmi_check_system(bad_bios_dmi_table);
+++++++ ++++++++++++++++++++++ /*
+++++++ ++++++++++++++++++++++ * VMware detection requires dmi to be available, so this
+++++++ ++++++++++++++++++++++ * needs to be done after dmi_scan_machine, for the BP.
+++++++ ++++++++++++++++++++++ */
+++++++ ++++++++++++++++++++++ init_hypervisor(&boot_cpu_data);
+++++++ ++++++++++++++++++++++
#ifdef CONFIG_X86_32
probe_roms();
#endif
#include <asm/mtrr.h>
#include <asm/vmi.h>
#include <asm/genapic.h>
++++++++++++++++++++++ +++++++#include <asm/setup.h>
#include <linux/mc146818rtc.h>
#include <mach_apic.h>
* fragile that we want to limit the things done here to the
* most necessary things.
*/
--------- ------- --------- #ifdef CONFIG_VMI
vmi_bringup();
--------- ------- --------- #endif
cpu_init();
preempt_disable();
smp_callin();
pr_debug("Before bogocount - setting activated=1.\n");
}
---------------------- -------static inline void __inquire_remote_apic(int apicid)
++++++++++++++++++++++ +++++++void __inquire_remote_apic(int apicid)
{
unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
char *names[] = { "ID", "VERSION", "SPIV" };
}
}
---------------------- -------#ifdef WAKE_SECONDARY_VIA_NMI
/*
* Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
* INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
* won't ... remember to clear down the APIC, etc later.
*/
---------------------- -------static int __devinit
---------------------- -------wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
++++++++++++++++++++++ +++++++int __devinit
++++++++++++++++++++++ +++++++wakeup_secondary_cpu_via_nmi(int logical_apicid, unsigned long start_eip)
{
unsigned long send_status, accept_status = 0;
int maxlvt;
* Give the other CPU some time to accept the IPI.
*/
udelay(200);
---------------------- ------- if (APIC_INTEGRATED(apic_version[phys_apicid])) {
++++++++++++++++++++++ +++++++ if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
maxlvt = lapic_get_maxlvt();
if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
apic_write(APIC_ESR, 0);
return (send_status | accept_status);
}
---------------------- -------#endif /* WAKE_SECONDARY_VIA_NMI */
---------------------- -------#ifdef WAKE_SECONDARY_VIA_INIT
---------------------- -------static int __devinit
---------------------- -------wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
++++++++++++++++++++++ +++++++int __devinit
++++++++++++++++++++++ +++++++wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
{
unsigned long send_status, accept_status = 0;
int maxlvt, num_starts, j;
return (send_status | accept_status);
}
---------------------- -------#endif /* WAKE_SECONDARY_VIA_INIT */
struct create_idle {
struct work_struct work;
smpboot_setup_warm_reset_vector(start_ip);
/*
* Be paranoid about clearing APIC errors.
- */
- apic_write(APIC_ESR, 0);
- apic_read(APIC_ESR);
+ */
+ if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
+ apic_write(APIC_ESR, 0);
+ apic_read(APIC_ESR);
+ }
}
/*
#endif
if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
-- --------------------------- printk(KERN_WARNING "weird, boot CPU (#%d) not listed"
-- --------------------------- "by the BIOS.\n", hard_smp_processor_id());
++ +++++++++++++++++++++++++++ printk(KERN_WARNING
++ +++++++++++++++++++++++++++ "weird, boot CPU (#%d) not listed by the BIOS.\n",
++ +++++++++++++++++++++++++++ hard_smp_processor_id());
++ +++++++++++++++++++++++++++
physid_set(hard_smp_processor_id(), phys_cpu_present_map);
}
}
EXPORT_SYMBOL(profile_pc);
-- ---------------------------irqreturn_t timer_interrupt(int irq, void *dev_id)
++ +++++++++++++++++++++++++++static irqreturn_t timer_interrupt(int irq, void *dev_id)
{
add_pda(irq0_irqs, 1);
break;
no_ctr_free = (i == 4);
if (no_ctr_free) {
+++++ ++++++++++++++++++++++++ WARN(1, KERN_WARNING "Warning: AMD perfctrs busy ... "
+++++ ++++++++++++++++++++++++ "cpu_khz value may be incorrect.\n");
i = 3;
rdmsrl(MSR_K7_EVNTSEL3, evntsel3);
wrmsrl(MSR_K7_EVNTSEL3, 0);
#include <asm/vgtod.h>
#include <asm/time.h>
#include <asm/delay.h>
+++++++ ++++++++++++++++++++++#include <asm/hypervisor.h>
unsigned int cpu_khz; /* TSC clocks / usec, not used here */
EXPORT_SYMBOL(cpu_khz);
erroneous rdtsc usage on !cpu_has_tsc processors */
static int tsc_disabled = -1;
+++++++ ++++++++++++++++++++++static int tsc_clocksource_reliable;
/*
* Scheduler clock - returns current time in nanosec units.
*/
rdtscll(this_offset);
/* return the value in ns */
- - -- - - return cycles_2_ns(this_offset);
+ + ++ + + return __cycles_2_ns(this_offset);
}
/* We need to define a real function for sched_clock, to override the
__setup("notsc", notsc_setup);
+++++++ ++++++++++++++++++++++static int __init tsc_setup(char *str)
+++++++ ++++++++++++++++++++++{
+++++++ ++++++++++++++++++++++ if (!strcmp(str, "reliable"))
+++++++ ++++++++++++++++++++++ tsc_clocksource_reliable = 1;
+++++++ ++++++++++++++++++++++ return 1;
+++++++ ++++++++++++++++++++++}
+++++++ ++++++++++++++++++++++
+++++++ ++++++++++++++++++++++__setup("tsc=", tsc_setup);
+++++++ ++++++++++++++++++++++
#define MAX_RETRIES 5
#define SMI_TRESHOLD 50000
{
u64 tsc1, tsc2, delta, ref1, ref2;
unsigned long tsc_pit_min = ULONG_MAX, tsc_ref_min = ULONG_MAX;
------- ---------------------- unsigned long flags, latch, ms, fast_calibrate;
+++++++ ++++++++++++++++++++++ unsigned long flags, latch, ms, fast_calibrate, tsc_khz;
int hpet = is_hpet_enabled(), i, loopmin;
+++++++ ++++++++++++++++++++++ tsc_khz = get_hypervisor_tsc_freq();
+++++++ ++++++++++++++++++++++ if (tsc_khz) {
+++++++ ++++++++++++++++++++++ printk(KERN_INFO "TSC: Frequency read from the hypervisor\n");
+++++++ ++++++++++++++++++++++ return tsc_khz;
+++++++ ++++++++++++++++++++++ }
+++++++ ++++++++++++++++++++++
local_irq_save(flags);
fast_calibrate = quick_pit_calibrate();
local_irq_restore(flags);
{}
};
------- ----------------------/*
------- ---------------------- * Geode_LX - the OLPC CPU has a possibly a very reliable TSC
------- ---------------------- */
+++++++ ++++++++++++++++++++++static void __init check_system_tsc_reliable(void)
+++++++ ++++++++++++++++++++++{
#ifdef CONFIG_MGEODE_LX
------- ----------------------/* RTSC counts during suspend */
+++++++ ++++++++++++++++++++++ /* RTSC counts during suspend */
#define RTSC_SUSP 0x100
------- ----------------------
------- ----------------------static void __init check_geode_tsc_reliable(void)
------- ----------------------{
unsigned long res_low, res_high;
rdmsr_safe(MSR_GEODE_BUSCONT_CONF0, &res_low, &res_high);
+++++++ ++++++++++++++++++++++ /* Geode_LX - the OLPC CPU has a possibly a very reliable TSC */
if (res_low & RTSC_SUSP)
------- ---------------------- clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY;
------- ----------------------}
------- ----------------------#else
------- ----------------------static inline void check_geode_tsc_reliable(void) { }
+++++++ ++++++++++++++++++++++ tsc_clocksource_reliable = 1;
#endif
+++++++ ++++++++++++++++++++++ if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE))
+++++++ ++++++++++++++++++++++ tsc_clocksource_reliable = 1;
+++++++ ++++++++++++++++++++++}
/*
* Make an educated guess if the TSC is trustworthy and synchronized
if (!cpu_has_tsc || tsc_unstable)
return 1;
- -- - - #ifdef CONFIG_SMP
+ ++ + + #ifdef CONFIG_X86_SMP
if (apic_is_clustered_box())
return 1;
#endif
{
clocksource_tsc.mult = clocksource_khz2mult(tsc_khz,
clocksource_tsc.shift);
+++++++ ++++++++++++++++++++++ if (tsc_clocksource_reliable)
+++++++ ++++++++++++++++++++++ clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY;
/* lower the rating if we already know its unstable: */
if (check_tsc_unstable()) {
clocksource_tsc.rating = 0;
cpu_khz = calibrate_cpu();
#endif
- - -- - - lpj = ((u64)tsc_khz * 1000);
- - -- - - do_div(lpj, HZ);
- - -- - - lpj_fine = lpj;
- - -- - -
printk("Detected %lu.%03lu MHz processor.\n",
(unsigned long)cpu_khz / 1000,
(unsigned long)cpu_khz % 1000);
/* now allow native_sched_clock() to use rdtsc */
tsc_disabled = 0;
+ + ++ + + lpj = ((u64)tsc_khz * 1000);
+ + ++ + + do_div(lpj, HZ);
+ + ++ + + lpj_fine = lpj;
+ + ++ + +
use_tsc_delay();
/* Check and install the TSC clocksource */
dmi_check_system(bad_tsc_dmi_table);
if (unsynchronized_tsc())
mark_tsc_unstable("TSCs unsynchronized");
------- ---------------------- check_geode_tsc_reliable();
+++++++ ++++++++++++++++++++++ check_system_tsc_reliable();
init_tsc_clocksource();
}
cycles_t start, now, prev, end;
int i;
+ + + ++ ++ + + rdtsc_barrier();
start = get_cycles();
+ + + ++ ++ + + rdtsc_barrier();
/*
* The measurement runs for 20 msecs:
*/
*/
__raw_spin_lock(&sync_lock);
prev = last_tsc;
+ + + ++ ++ + + rdtsc_barrier();
now = get_cycles();
+ + + ++ ++ + + rdtsc_barrier();
last_tsc = now;
__raw_spin_unlock(&sync_lock);
if (unsynchronized_tsc())
return;
+++++++ ++++++++++++++++++++++ if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE)) {
+++++++ ++++++++++++++++++++++ printk(KERN_INFO
+++++++ ++++++++++++++++++++++ "Skipping synchronization checks as TSC is reliable.\n");
+++++++ ++++++++++++++++++++++ return;
+++++++ ++++++++++++++++++++++ }
+++++++ ++++++++++++++++++++++
printk(KERN_INFO "checking TSC synchronization [CPU#%d -> CPU#%d]:",
smp_processor_id(), cpu);
{
int cpus = 2;
------- ---------------------- if (unsynchronized_tsc())
+++++++ ++++++++++++++++++++++ if (unsynchronized_tsc() || boot_cpu_has(X86_FEATURE_TSC_RELIABLE))
return;
/*
{
}
-- ---------------------------#ifdef CONFIG_DEBUG_PAGE_TYPE
-- ---------------------------
-- ---------------------------#ifdef CONFIG_X86_PAE
-- ---------------------------#define MAX_BOOT_PTS (2048+4+1)
-- ---------------------------#else
-- ---------------------------#define MAX_BOOT_PTS (1024+1)
-- ---------------------------#endif
-- ---------------------------
-- ---------------------------/*
-- --------------------------- * During boot, mem_map is not yet available in paging_init, so stash
-- --------------------------- * all the boot page allocations here.
-- --------------------------- */
-- ---------------------------static struct {
-- --------------------------- u32 pfn;
-- --------------------------- int type;
-- ---------------------------} boot_page_allocations[MAX_BOOT_PTS];
-- ---------------------------static int num_boot_page_allocations;
-- ---------------------------static int boot_allocations_applied;
-- ---------------------------
-- ---------------------------void vmi_apply_boot_page_allocations(void)
-- ---------------------------{
-- --------------------------- int i;
-- --------------------------- BUG_ON(!mem_map);
-- --------------------------- for (i = 0; i < num_boot_page_allocations; i++) {
-- --------------------------- struct page *page = pfn_to_page(boot_page_allocations[i].pfn);
-- --------------------------- page->type = boot_page_allocations[i].type;
-- --------------------------- page->type = boot_page_allocations[i].type &
-- --------------------------- ~(VMI_PAGE_ZEROED | VMI_PAGE_CLONE);
-- --------------------------- }
-- --------------------------- boot_allocations_applied = 1;
-- ---------------------------}
-- ---------------------------
-- ---------------------------static void record_page_type(u32 pfn, int type)
-- ---------------------------{
-- --------------------------- BUG_ON(num_boot_page_allocations >= MAX_BOOT_PTS);
-- --------------------------- boot_page_allocations[num_boot_page_allocations].pfn = pfn;
-- --------------------------- boot_page_allocations[num_boot_page_allocations].type = type;
-- --------------------------- num_boot_page_allocations++;
-- ---------------------------}
-- ---------------------------
-- ---------------------------static void check_zeroed_page(u32 pfn, int type, struct page *page)
-- ---------------------------{
-- --------------------------- u32 *ptr;
-- --------------------------- int i;
-- --------------------------- int limit = PAGE_SIZE / sizeof(int);
-- ---------------------------
-- --------------------------- if (page_address(page))
-- --------------------------- ptr = (u32 *)page_address(page);
-- --------------------------- else
-- --------------------------- ptr = (u32 *)__va(pfn << PAGE_SHIFT);
-- --------------------------- /*
-- --------------------------- * When cloning the root in non-PAE mode, only the userspace
-- --------------------------- * pdes need to be zeroed.
-- --------------------------- */
-- --------------------------- if (type & VMI_PAGE_CLONE)
-- --------------------------- limit = KERNEL_PGD_BOUNDARY;
-- --------------------------- for (i = 0; i < limit; i++)
-- --------------------------- BUG_ON(ptr[i]);
-- ---------------------------}
-- ---------------------------
-- ---------------------------/*
-- --------------------------- * We stash the page type into struct page so we can verify the page
-- --------------------------- * types are used properly.
-- --------------------------- */
-- ---------------------------static void vmi_set_page_type(u32 pfn, int type)
-- ---------------------------{
-- --------------------------- /* PAE can have multiple roots per page - don't track */
-- --------------------------- if (PTRS_PER_PMD > 1 && (type & VMI_PAGE_PDP))
-- --------------------------- return;
-- ---------------------------
-- --------------------------- if (boot_allocations_applied) {
-- --------------------------- struct page *page = pfn_to_page(pfn);
-- --------------------------- if (type != VMI_PAGE_NORMAL)
-- --------------------------- BUG_ON(page->type);
-- --------------------------- else
-- --------------------------- BUG_ON(page->type == VMI_PAGE_NORMAL);
-- --------------------------- page->type = type & ~(VMI_PAGE_ZEROED | VMI_PAGE_CLONE);
-- --------------------------- if (type & VMI_PAGE_ZEROED)
-- --------------------------- check_zeroed_page(pfn, type, page);
-- --------------------------- } else {
-- --------------------------- record_page_type(pfn, type);
-- --------------------------- }
-- ---------------------------}
-- ---------------------------
-- ---------------------------static void vmi_check_page_type(u32 pfn, int type)
-- ---------------------------{
-- --------------------------- /* PAE can have multiple roots per page - skip checks */
-- --------------------------- if (PTRS_PER_PMD > 1 && (type & VMI_PAGE_PDP))
-- --------------------------- return;
-- ---------------------------
-- --------------------------- type &= ~(VMI_PAGE_ZEROED | VMI_PAGE_CLONE);
-- --------------------------- if (boot_allocations_applied) {
-- --------------------------- struct page *page = pfn_to_page(pfn);
-- --------------------------- BUG_ON((page->type ^ type) & VMI_PAGE_PAE);
-- --------------------------- BUG_ON(type == VMI_PAGE_NORMAL && page->type);
-- --------------------------- BUG_ON((type & page->type) == 0);
-- --------------------------- }
-- ---------------------------}
-- ---------------------------#else
-- ---------------------------#define vmi_set_page_type(p,t) do { } while (0)
-- ---------------------------#define vmi_check_page_type(p,t) do { } while (0)
-- ---------------------------#endif
-- ---------------------------
#ifdef CONFIG_HIGHPTE
static void *vmi_kmap_atomic_pte(struct page *page, enum km_type type)
{
static void vmi_allocate_pte(struct mm_struct *mm, unsigned long pfn)
{
-- --------------------------- vmi_set_page_type(pfn, VMI_PAGE_L1);
vmi_ops.allocate_page(pfn, VMI_PAGE_L1, 0, 0, 0);
}
* It is called only for swapper_pg_dir, which already has
* data on it.
*/
-- --------------------------- vmi_set_page_type(pfn, VMI_PAGE_L2);
vmi_ops.allocate_page(pfn, VMI_PAGE_L2, 0, 0, 0);
}
static void vmi_allocate_pmd_clone(unsigned long pfn, unsigned long clonepfn, unsigned long start, unsigned long count)
{
-- --------------------------- vmi_set_page_type(pfn, VMI_PAGE_L2 | VMI_PAGE_CLONE);
-- --------------------------- vmi_check_page_type(clonepfn, VMI_PAGE_L2);
vmi_ops.allocate_page(pfn, VMI_PAGE_L2 | VMI_PAGE_CLONE, clonepfn, start, count);
}
static void vmi_release_pte(unsigned long pfn)
{
vmi_ops.release_page(pfn, VMI_PAGE_L1);
-- --------------------------- vmi_set_page_type(pfn, VMI_PAGE_NORMAL);
}
static void vmi_release_pmd(unsigned long pfn)
{
vmi_ops.release_page(pfn, VMI_PAGE_L2);
-- --------------------------- vmi_set_page_type(pfn, VMI_PAGE_NORMAL);
}
/*
static void vmi_update_pte(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
{
-- --------------------------- vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE);
vmi_ops.update_pte(ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0));
}
static void vmi_update_pte_defer(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
{
-- --------------------------- vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE);
vmi_ops.update_pte(ptep, vmi_flags_addr_defer(mm, addr, VMI_PAGE_PT, 0));
}
static void vmi_set_pte(pte_t *ptep, pte_t pte)
{
/* XXX because of set_pmd_pte, this can be called on PT or PD layers */
-- --------------------------- vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE | VMI_PAGE_PD);
vmi_ops.set_pte(pte, ptep, VMI_PAGE_PT);
}
static void vmi_set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
{
-- --------------------------- vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE);
vmi_ops.set_pte(pte, ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0));
}
{
#ifdef CONFIG_X86_PAE
const pte_t pte = { .pte = pmdval.pmd };
-- --------------------------- vmi_check_page_type(__pa(pmdp) >> PAGE_SHIFT, VMI_PAGE_PMD);
#else
const pte_t pte = { pmdval.pud.pgd.pgd };
-- --------------------------- vmi_check_page_type(__pa(pmdp) >> PAGE_SHIFT, VMI_PAGE_PGD);
#endif
vmi_ops.set_pte(pte, (pte_t *)pmdp, VMI_PAGE_PD);
}
static void vmi_set_pte_present(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
{
-- --------------------------- vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE);
vmi_ops.set_pte(pte, ptep, vmi_flags_addr_defer(mm, addr, VMI_PAGE_PT, 1));
}
{
/* Um, eww */
const pte_t pte = { .pte = pudval.pgd.pgd };
-- --------------------------- vmi_check_page_type(__pa(pudp) >> PAGE_SHIFT, VMI_PAGE_PGD);
vmi_ops.set_pte(pte, (pte_t *)pudp, VMI_PAGE_PDP);
}
static void vmi_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
{
const pte_t pte = { .pte = 0 };
-- --------------------------- vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE);
vmi_ops.set_pte(pte, ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0));
}
static void vmi_pmd_clear(pmd_t *pmd)
{
const pte_t pte = { .pte = 0 };
-- --------------------------- vmi_check_page_type(__pa(pmd) >> PAGE_SHIFT, VMI_PAGE_PMD);
vmi_ops.set_pte(pte, (pte_t *)pmd, VMI_PAGE_PD);
}
#endif
void __init vmi_init(void)
{
--------- ------- --------- unsigned long flags;
--------- ------- ---------
if (!vmi_rom)
probe_vmi_rom();
else
reserve_top_address(-vmi_rom->virtual_top);
--------- ------- --------- local_irq_save(flags);
--------- ------- --------- activate_vmi();
--------- ------- ---------
#ifdef CONFIG_X86_IO_APIC
/* This is virtual hardware; timer routing is wired correctly */
no_timer_check = 1;
#endif
+++++++++ +++++++ +++++++++ }
+++++++++ +++++++ +++++++++
+++++++++ +++++++ +++++++++ void vmi_activate(void)
+++++++++ +++++++ +++++++++ {
+++++++++ +++++++ +++++++++ unsigned long flags;
+++++++++ +++++++ +++++++++
+++++++++ +++++++ +++++++++ if (!vmi_rom)
+++++++++ +++++++ +++++++++ return;
+++++++++ +++++++ +++++++++
+++++++++ +++++++ +++++++++ local_irq_save(flags);
+++++++++ +++++++ +++++++++ activate_vmi();
local_irq_restore(flags & X86_EFLAGS_IF);
}
static int __initdata after_init_bootmem;
-- ---------------------------static __init void *alloc_low_page(unsigned long *phys)
++ +++++++++++++++++++++++++++static __init void *alloc_low_page(void)
{
unsigned long pfn = table_end++;
void *adr;
adr = __va(pfn * PAGE_SIZE);
memset(adr, 0, PAGE_SIZE);
-- --------------------------- *phys = pfn * PAGE_SIZE;
return adr;
}
pmd_t *pmd_table;
#ifdef CONFIG_X86_PAE
-- --------------------------- unsigned long phys;
if (!(pgd_val(*pgd) & _PAGE_PRESENT)) {
if (after_init_bootmem)
pmd_table = (pmd_t *)alloc_bootmem_low_pages(PAGE_SIZE);
else
-- --------------------------- pmd_table = (pmd_t *)alloc_low_page(&phys);
++ +++++++++++++++++++++++++++ pmd_table = (pmd_t *)alloc_low_page();
paravirt_alloc_pmd(&init_mm, __pa(pmd_table) >> PAGE_SHIFT);
set_pgd(pgd, __pgd(__pa(pmd_table) | _PAGE_PRESENT));
pud = pud_offset(pgd, 0);
BUG_ON(pmd_table != pmd_offset(pud, 0));
++ +++++++++++++++++++++++++++
++ +++++++++++++++++++++++++++ return pmd_table;
}
#endif
pud = pud_offset(pgd, 0);
if (!page_table)
page_table =
(pte_t *)alloc_bootmem_low_pages(PAGE_SIZE);
-- --------------------------- } else {
-- --------------------------- unsigned long phys;
-- --------------------------- page_table = (pte_t *)alloc_low_page(&phys);
-- --------------------------- }
++ +++++++++++++++++++++++++++ } else
++ +++++++++++++++++++++++++++ page_table = (pte_t *)alloc_low_page();
paravirt_alloc_pte(&init_mm, __pa(page_table) >> PAGE_SHIFT);
set_pmd(pmd, __pmd(__pa(page_table) | _PAGE_TABLE));
return 0;
}
- - -- - - #ifdef CONFIG_HIGHMEM
pte_t *kmap_pte;
pgprot_t kmap_prot;
kmap_prot = PAGE_KERNEL;
}
+ + ++ + + #ifdef CONFIG_HIGHMEM
static void __init permanent_kmaps_init(pgd_t *pgd_base)
{
unsigned long vaddr;
#endif /* !CONFIG_NUMA */
#else
- - -- - - # define kmap_init() do { } while (0)
# define permanent_kmaps_init(pgd_base) do { } while (0)
# define set_highmem_pages_init() do { } while (0)
#endif /* CONFIG_HIGHMEM */
int codesize, reservedpages, datasize, initsize;
int tmp;
-------------- --------------- start_periodic_check_for_corruption();
-------------- ---------------
#ifdef CONFIG_FLATMEM
BUG_ON(!mem_map);
#endif
(unsigned long)&_text, (unsigned long)&_etext,
((unsigned long)&_etext - (unsigned long)&_text) >> 10);
+++++ ++++++++++++++++++++++++ /*
+++++ ++++++++++++++++++++++++ * Check boundaries twice: Some fundamental inconsistencies can
+++++ ++++++++++++++++++++++++ * be detected at build time already.
+++++ ++++++++++++++++++++++++ */
+++++ ++++++++++++++++++++++++#define __FIXADDR_TOP (-PAGE_SIZE)
+++++ ++++++++++++++++++++++++#ifdef CONFIG_HIGHMEM
+++++ ++++++++++++++++++++++++ BUILD_BUG_ON(PKMAP_BASE + LAST_PKMAP*PAGE_SIZE > FIXADDR_START);
+++++ ++++++++++++++++++++++++ BUILD_BUG_ON(VMALLOC_END > PKMAP_BASE);
+++++ ++++++++++++++++++++++++#endif
+++++ ++++++++++++++++++++++++#define high_memory (-128UL << 20)
+++++ ++++++++++++++++++++++++ BUILD_BUG_ON(VMALLOC_START >= VMALLOC_END);
+++++ ++++++++++++++++++++++++#undef high_memory
+++++ ++++++++++++++++++++++++#undef __FIXADDR_TOP
+++++ ++++++++++++++++++++++++
#ifdef CONFIG_HIGHMEM
BUG_ON(PKMAP_BASE + LAST_PKMAP*PAGE_SIZE > FIXADDR_START);
BUG_ON(VMALLOC_END > PKMAP_BASE);
#endif
----- ------------------------ BUG_ON(VMALLOC_START > VMALLOC_END);
+++++ ++++++++++++++++++++++++ BUG_ON(VMALLOC_START >= VMALLOC_END);
BUG_ON((unsigned long)high_memory > VMALLOC_START);
if (boot_cpu_data.wp_works_ok < 0)
const struct dmi_header *dm = (const struct dmi_header *)data;
/*
- - -- - - * We want to know the total length (formated area and strings)
- - -- - - * before decoding to make sure we won't run off the table in
- - -- - - * dmi_decode or dmi_string
+ + ++ + + * We want to know the total length (formatted area and
+ + ++ + + * strings) before decoding to make sure we won't run off the
+ + ++ + + * table in dmi_decode or dmi_string
*/
data += dm->length;
while ((data - buf < len - 1) && (data[0] || data[1]))
}
EXPORT_SYMBOL(dmi_get_system_info);
+++++++ ++++++++++++++++++++++/**
+++++++ ++++++++++++++++++++++ * dmi_name_in_serial - Check if string is in the DMI product serial
+++++++ ++++++++++++++++++++++ * information.
+++++++ ++++++++++++++++++++++ */
+++++++ ++++++++++++++++++++++int dmi_name_in_serial(const char *str)
+++++++ ++++++++++++++++++++++{
+++++++ ++++++++++++++++++++++ int f = DMI_PRODUCT_SERIAL;
+++++++ ++++++++++++++++++++++ if (dmi_ident[f] && strstr(dmi_ident[f], str))
+++++++ ++++++++++++++++++++++ return 1;
+++++++ ++++++++++++++++++++++ return 0;
+++++++ ++++++++++++++++++++++}
/**
* dmi_name_in_vendors - Check if string is anywhere in the DMI vendor information.
#include <linux/delay.h>
#include <linux/acpi.h>
#include <linux/kallsyms.h>
+ ++++ + ++ ++ ++ + ++ #include <linux/dmi.h>
#include "pci.h"
int isa_dma_bridge_buggy;
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MELLANOX,PCI_DEVICE_ID_MELLANOX_TAVOR,quirk_mellanox_tavor);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MELLANOX,PCI_DEVICE_ID_MELLANOX_TAVOR_BRIDGE,quirk_mellanox_tavor);
-- - - /* Many VIA bridges seem to corrupt data for DAC. Disable it here */
-- - - int forbid_dac __read_mostly;
-- - - EXPORT_SYMBOL(forbid_dac);
-- - -
-- - - static __devinit void via_no_dac(struct pci_dev *dev)
-- - - {
-- - - if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI && forbid_dac == 0) {
-- - - dev_info(&dev->dev,
-- - - "VIA PCI bridge detected. Disabling DAC.\n");
-- - - forbid_dac = 1;
-- - - }
-- - - }
-- - - DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_ANY_ID, via_no_dac);
-- - -
/* Deal with broken BIOS'es that neglect to enable passive release,
which can cause problems in combination with the 82441FX/PPro MTRRs */
static void quirk_passive_release(struct pci_dev *dev)
sis_apic_bug = 1;
}
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI, PCI_ANY_ID, quirk_ioapic_rmw);
-------------------- ---------
-------------------- ---------#define AMD8131_revA0 0x01
-------------------- ---------#define AMD8131_revB0 0x11
-------------------- ---------#define AMD8131_MISC 0x40
-------------------- ---------#define AMD8131_NIOAMODE_BIT 0
-------------------- ---------static void quirk_amd_8131_ioapic(struct pci_dev *dev)
-------------------- ---------{
-------------------- --------- unsigned char tmp;
-------------------- ---------
-------------------- --------- if (nr_ioapics == 0)
-------------------- --------- return;
-------------------- ---------
-------------------- --------- if (dev->revision == AMD8131_revA0 || dev->revision == AMD8131_revB0) {
-------------------- --------- dev_info(&dev->dev, "Fixing up AMD8131 IOAPIC mode\n");
-------------------- --------- pci_read_config_byte( dev, AMD8131_MISC, &tmp);
-------------------- --------- tmp &= ~(1 << AMD8131_NIOAMODE_BIT);
-------------------- --------- pci_write_config_byte( dev, AMD8131_MISC, tmp);
-------------------- --------- }
-------------------- ---------}
-------------------- ---------DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_amd_8131_ioapic);
-------------------- ---------DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_amd_8131_ioapic);
#endif /* CONFIG_X86_IO_APIC */
/*
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x260a, quirk_intel_pcie_pm);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x260b, quirk_intel_pcie_pm);
++++++++++++++++++++ +++++++++#ifdef CONFIG_X86_IO_APIC
++++++++++++++++++++ +++++++++/*
++++++++++++++++++++ +++++++++ * Boot interrupts on some chipsets cannot be turned off. For these chipsets,
++++++++++++++++++++ +++++++++ * remap the original interrupt in the linux kernel to the boot interrupt, so
++++++++++++++++++++ +++++++++ * that a PCI device's interrupt handler is installed on the boot interrupt
++++++++++++++++++++ +++++++++ * line instead.
++++++++++++++++++++ +++++++++ */
++++++++++++++++++++ +++++++++static void quirk_reroute_to_boot_interrupts_intel(struct pci_dev *dev)
++++++++++++++++++++ +++++++++{
++++++++++++++++++++ +++++++++ if (noioapicquirk || noioapicreroute)
++++++++++++++++++++ +++++++++ return;
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++ dev->irq_reroute_variant = INTEL_IRQ_REROUTE_VARIANT;
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++ printk(KERN_INFO "PCI quirk: reroute interrupts for 0x%04x:0x%04x\n",
++++++++++++++++++++ +++++++++ dev->vendor, dev->device);
++++++++++++++++++++ +++++++++ return;
++++++++++++++++++++ +++++++++}
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_80333_0, quirk_reroute_to_boot_interrupts_intel);
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_80333_1, quirk_reroute_to_boot_interrupts_intel);
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_0, quirk_reroute_to_boot_interrupts_intel);
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PXH_0, quirk_reroute_to_boot_interrupts_intel);
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PXH_1, quirk_reroute_to_boot_interrupts_intel);
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PXHV, quirk_reroute_to_boot_interrupts_intel);
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_80332_0, quirk_reroute_to_boot_interrupts_intel);
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_80332_1, quirk_reroute_to_boot_interrupts_intel);
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_80333_0, quirk_reroute_to_boot_interrupts_intel);
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_80333_1, quirk_reroute_to_boot_interrupts_intel);
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_0, quirk_reroute_to_boot_interrupts_intel);
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PXH_0, quirk_reroute_to_boot_interrupts_intel);
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PXH_1, quirk_reroute_to_boot_interrupts_intel);
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PXHV, quirk_reroute_to_boot_interrupts_intel);
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_80332_0, quirk_reroute_to_boot_interrupts_intel);
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_80332_1, quirk_reroute_to_boot_interrupts_intel);
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++/*
++++++++++++++++++++ +++++++++ * On some chipsets we can disable the generation of legacy INTx boot
++++++++++++++++++++ +++++++++ * interrupts.
++++++++++++++++++++ +++++++++ */
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++/*
++++++++++++++++++++ +++++++++ * IO-APIC1 on 6300ESB generates boot interrupts, see intel order no
++++++++++++++++++++ +++++++++ * 300641-004US, section 5.7.3.
++++++++++++++++++++ +++++++++ */
++++++++++++++++++++ +++++++++#define INTEL_6300_IOAPIC_ABAR 0x40
++++++++++++++++++++ +++++++++#define INTEL_6300_DISABLE_BOOT_IRQ (1<<14)
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++static void quirk_disable_intel_boot_interrupt(struct pci_dev *dev)
++++++++++++++++++++ +++++++++{
++++++++++++++++++++ +++++++++ u16 pci_config_word;
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++ if (noioapicquirk)
++++++++++++++++++++ +++++++++ return;
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++ pci_read_config_word(dev, INTEL_6300_IOAPIC_ABAR, &pci_config_word);
++++++++++++++++++++ +++++++++ pci_config_word |= INTEL_6300_DISABLE_BOOT_IRQ;
++++++++++++++++++++ +++++++++ pci_write_config_word(dev, INTEL_6300_IOAPIC_ABAR, pci_config_word);
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++ printk(KERN_INFO "disabled boot interrupt on device 0x%04x:0x%04x\n",
++++++++++++++++++++ +++++++++ dev->vendor, dev->device);
++++++++++++++++++++ +++++++++}
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_10, quirk_disable_intel_boot_interrupt);
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_10, quirk_disable_intel_boot_interrupt);
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++/*
++++++++++++++++++++ +++++++++ * disable boot interrupts on HT-1000
++++++++++++++++++++ +++++++++ */
++++++++++++++++++++ +++++++++#define BC_HT1000_FEATURE_REG 0x64
++++++++++++++++++++ +++++++++#define BC_HT1000_PIC_REGS_ENABLE (1<<0)
++++++++++++++++++++ +++++++++#define BC_HT1000_MAP_IDX 0xC00
++++++++++++++++++++ +++++++++#define BC_HT1000_MAP_DATA 0xC01
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++static void quirk_disable_broadcom_boot_interrupt(struct pci_dev *dev)
++++++++++++++++++++ +++++++++{
++++++++++++++++++++ +++++++++ u32 pci_config_dword;
++++++++++++++++++++ +++++++++ u8 irq;
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++ if (noioapicquirk)
++++++++++++++++++++ +++++++++ return;
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++ pci_read_config_dword(dev, BC_HT1000_FEATURE_REG, &pci_config_dword);
++++++++++++++++++++ +++++++++ pci_write_config_dword(dev, BC_HT1000_FEATURE_REG, pci_config_dword |
++++++++++++++++++++ +++++++++ BC_HT1000_PIC_REGS_ENABLE);
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++ for (irq = 0x10; irq < 0x10 + 32; irq++) {
++++++++++++++++++++ +++++++++ outb(irq, BC_HT1000_MAP_IDX);
++++++++++++++++++++ +++++++++ outb(0x00, BC_HT1000_MAP_DATA);
++++++++++++++++++++ +++++++++ }
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++ pci_write_config_dword(dev, BC_HT1000_FEATURE_REG, pci_config_dword);
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++ printk(KERN_INFO "disabled boot interrupts on PCI device"
++++++++++++++++++++ +++++++++ "0x%04x:0x%04x\n", dev->vendor, dev->device);
++++++++++++++++++++ +++++++++}
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT1000SB, quirk_disable_broadcom_boot_interrupt);
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT1000SB, quirk_disable_broadcom_boot_interrupt);
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++/*
++++++++++++++++++++ +++++++++ * disable boot interrupts on AMD and ATI chipsets
++++++++++++++++++++ +++++++++ */
++++++++++++++++++++ +++++++++/*
++++++++++++++++++++ +++++++++ * NOIOAMODE needs to be disabled to disable "boot interrupts". For AMD 8131
++++++++++++++++++++ +++++++++ * rev. A0 and B0, NOIOAMODE needs to be disabled anyway to fix IO-APIC mode
++++++++++++++++++++ +++++++++ * (due to an erratum).
++++++++++++++++++++ +++++++++ */
++++++++++++++++++++ +++++++++#define AMD_813X_MISC 0x40
++++++++++++++++++++ +++++++++#define AMD_813X_NOIOAMODE (1<<0)
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++static void quirk_disable_amd_813x_boot_interrupt(struct pci_dev *dev)
++++++++++++++++++++ +++++++++{
++++++++++++++++++++ +++++++++ u32 pci_config_dword;
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++ if (noioapicquirk)
++++++++++++++++++++ +++++++++ return;
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++ pci_read_config_dword(dev, AMD_813X_MISC, &pci_config_dword);
++++++++++++++++++++ +++++++++ pci_config_dword &= ~AMD_813X_NOIOAMODE;
++++++++++++++++++++ +++++++++ pci_write_config_dword(dev, AMD_813X_MISC, pci_config_dword);
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++ printk(KERN_INFO "disabled boot interrupts on PCI device "
++++++++++++++++++++ +++++++++ "0x%04x:0x%04x\n", dev->vendor, dev->device);
++++++++++++++++++++ +++++++++}
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_disable_amd_813x_boot_interrupt);
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8132_BRIDGE, quirk_disable_amd_813x_boot_interrupt);
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++#define AMD_8111_PCI_IRQ_ROUTING 0x56
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++static void quirk_disable_amd_8111_boot_interrupt(struct pci_dev *dev)
++++++++++++++++++++ +++++++++{
++++++++++++++++++++ +++++++++ u16 pci_config_word;
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++ if (noioapicquirk)
++++++++++++++++++++ +++++++++ return;
++++++++++++++++++++ +++++++++
++++++++++++++++++++ +++++++++ pci_read_config_word(dev, AMD_8111_PCI_IRQ_ROUTING, &pci_config_word);
++++++++++++++++++++ +++++++++ if (!pci_config_word) {
++++++++++++++++++++ +++++++++ printk(KERN_INFO "boot interrupts on PCI device 0x%04x:0x%04x "
++++++++++++++++++++ +++++++++ "already disabled\n",
++++++++++++++++++++ +++++++++ dev->vendor, dev->device);
++++++++++++++++++++ +++++++++ return;
++++++++++++++++++++ +++++++++ }
++++++++++++++++++++ +++++++++ pci_write_config_word(dev, AMD_8111_PCI_IRQ_ROUTING, 0);
++++++++++++++++++++ +++++++++ printk(KERN_INFO "disabled boot interrupts on PCI device "
++++++++++++++++++++ +++++++++ "0x%04x:0x%04x\n", dev->vendor, dev->device);
++++++++++++++++++++ +++++++++}
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS, quirk_disable_amd_8111_boot_interrupt);
++++++++++++++++++++ +++++++++DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS, quirk_disable_amd_8111_boot_interrupt);
++++++++++++++++++++ +++++++++#endif /* CONFIG_X86_IO_APIC */
++++++++++++++++++++ +++++++++
/*
* Toshiba TC86C001 IDE controller reports the standard 8-byte BAR0 size
* but the PIO transfers won't work if BAR0 falls at the odd 8 bytes.
}
}
- - -- - - DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_BROADCOM,
- - -- - - PCI_DEVICE_ID_NX2_5706,
- - -- - - quirk_brcm_570x_limit_vpd);
- - -- - - DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_BROADCOM,
- - -- - - PCI_DEVICE_ID_NX2_5706S,
- - -- - - quirk_brcm_570x_limit_vpd);
- - -- - - DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_BROADCOM,
- - -- - - PCI_DEVICE_ID_NX2_5708,
- - -- - - quirk_brcm_570x_limit_vpd);
- - -- - - DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_BROADCOM,
- - -- - - PCI_DEVICE_ID_NX2_5708S,
- - -- - - quirk_brcm_570x_limit_vpd);
- - -- - - DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_BROADCOM,
- - -- - - PCI_DEVICE_ID_NX2_5709,
- - -- - - quirk_brcm_570x_limit_vpd);
- - -- - - DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_BROADCOM,
- - -- - - PCI_DEVICE_ID_NX2_5709S,
- - -- - - quirk_brcm_570x_limit_vpd);
+ + ++ + + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM,
+ + ++ + + PCI_DEVICE_ID_NX2_5706,
+ + ++ + + quirk_brcm_570x_limit_vpd);
+ + ++ + + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM,
+ + ++ + + PCI_DEVICE_ID_NX2_5706S,
+ + ++ + + quirk_brcm_570x_limit_vpd);
+ + ++ + + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM,
+ + ++ + + PCI_DEVICE_ID_NX2_5708,
+ + ++ + + quirk_brcm_570x_limit_vpd);
+ + ++ + + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM,
+ + ++ + + PCI_DEVICE_ID_NX2_5708S,
+ + ++ + + quirk_brcm_570x_limit_vpd);
+ + ++ + + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM,
+ + ++ + + PCI_DEVICE_ID_NX2_5709,
+ + ++ + + quirk_brcm_570x_limit_vpd);
+ + ++ + + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM,
+ + ++ + + PCI_DEVICE_ID_NX2_5709S,
+ + ++ + + quirk_brcm_570x_limit_vpd);
#ifdef CONFIG_PCI_MSI
/* Some chipsets do not support MSI. We cannot easily rely on setting
PCI_DEVICE_ID_SERVERWORKS_HT1000_PXB,
ht_enable_msi_mapping);
+ ++++ + ++ ++ ++ + ++ /* The P5N32-SLI Premium motherboard from Asus has a problem with msi
+ ++++ + ++ ++ ++ + ++ * for the MCP55 NIC. It is not yet determined whether the msi problem
+ ++++ + ++ ++ ++ + ++ * also affects other devices. As for now, turn off msi for this device.
+ ++++ + ++ ++ ++ + ++ */
+ ++++ + ++ ++ ++ + ++ static void __devinit nvenet_msi_disable(struct pci_dev *dev)
+ ++++ + ++ ++ ++ + ++ {
+ ++++ + ++ ++ ++ + ++ if (dmi_name_in_vendors("P5N32-SLI PREMIUM")) {
+ ++++ + ++ ++ ++ + ++ dev_info(&dev->dev,
+ ++++ + ++ ++ ++ + ++ "Disabling msi for MCP55 NIC on P5N32-SLI Premium\n");
+ ++++ + ++ ++ ++ + ++ dev->no_msi = 1;
+ ++++ + ++ ++ ++ + ++ }
+ ++++ + ++ ++ ++ + ++ }
+ ++++ + ++ ++ ++ + ++ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NVIDIA,
+ ++++ + ++ ++ ++ + ++ PCI_DEVICE_ID_NVIDIA_NVENET_15,
+ ++++ + ++ ++ ++ + ++ nvenet_msi_disable);
+ ++++ + ++ ++ ++ + ++
static void __devinit nv_msi_ht_cap_quirk(struct pci_dev *dev)
{
struct pci_dev *host_bridge;
#include <linux/kobject.h>
#include <asm/atomic.h>
#include <linux/device.h>
+ #include <linux/io.h>
/* Include the ID list */
#include <linux/pci_ids.h>
struct kobject kobj;
};
+ static inline const char *pci_slot_name(const struct pci_slot *slot)
+ {
+ return kobject_name(&slot->kobj);
+ }
+
/* File state for mmap()s on /proc/bus/pci/X/Y */
enum pci_mmap_state {
pci_mmap_io,
PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) 2,
};
++++++++++++++++++++ +++++++++enum pci_irq_reroute_variant {
++++++++++++++++++++ +++++++++ INTEL_IRQ_REROUTE_VARIANT = 1,
++++++++++++++++++++ +++++++++ MAX_IRQ_REROUTE_VARIANTS = 3
++++++++++++++++++++ +++++++++};
++++++++++++++++++++ +++++++++
typedef unsigned short __bitwise pci_bus_flags_t;
enum pci_bus_flags {
PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
unsigned int no_msi:1; /* device may not use msi */
unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
unsigned int broken_parity_status:1; /* Device generates false positive parity */
++++++++++++++++++++ +++++++++ unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */
unsigned int msi_enabled:1;
unsigned int msix_enabled:1;
unsigned int ari_enabled:1; /* ARI forwarding */
struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
int busnr);
struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
- const char *name);
+ const char *name,
+ struct hotplug_slot *hotplug);
void pci_destroy_slot(struct pci_slot *slot);
- void pci_update_slot_number(struct pci_slot *slot, int slot_nr);
+ void pci_renumber_slot(struct pci_slot *slot, int slot_nr);
int pci_scan_slot(struct pci_bus *bus, int devfn);
struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
unsigned int devfn);
#endif /* CONFIG_PCI_LEGACY */
+ enum pci_lost_interrupt_reason {
+ PCI_LOST_IRQ_NO_INFORMATION = 0,
+ PCI_LOST_IRQ_DISABLE_MSI,
+ PCI_LOST_IRQ_DISABLE_MSIX,
+ PCI_LOST_IRQ_DISABLE_ACPI,
+ };
+ enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev);
int pci_find_capability(struct pci_dev *dev, int cap);
int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
int pci_find_ext_capability(struct pci_dev *dev, int cap);
int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
int pcie_get_readrq(struct pci_dev *dev);
int pcie_set_readrq(struct pci_dev *dev, int rq);
+ int pci_reset_function(struct pci_dev *dev);
+ int pci_execute_reset_function(struct pci_dev *dev);
void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
int __must_check pci_assign_resource(struct pci_dev *dev, int i);
int pci_select_bars(struct pci_dev *dev, unsigned long flags);
#endif
#ifdef CONFIG_HAS_IOMEM
- - -- - - static inline void * pci_ioremap_bar(struct pci_dev *pdev, int bar)
+ + ++ + + static inline void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar)
{
/*
* Make sure the BAR is actually a memory resource, not an IO resource
projects / linux-2.6-omap-h63xx.git / commitdiff