S: Germany
N: Gertjan van Wingerde
-E: gwingerde@home.nl
+E: gwingerde@gmail.com
D: Ralink rt2x00 WLAN driver
D: Minix V2 file-system
D: Misc fixes
kernel-api.xml filesystems.xml lsm.xml usb.xml kgdb.xml \
gadget.xml libata.xml mtdnand.xml librs.xml rapidio.xml \
genericirq.xml s390-drivers.xml uio-howto.xml scsi.xml \
- mac80211.xml debugobjects.xml sh.xml regulator.xml
+ mac80211.xml debugobjects.xml sh.xml regulator.xml \
+ alsa-driver-api.xml writing-an-alsa-driver.xml
###
# The build process is as follows (targets):
-<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook V4.1//EN">
-
-<book>
-<?dbhtml filename="index.html">
+<?xml version="1.0" encoding="UTF-8"?>
+<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
+ "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []>
<!-- ****************************************************** -->
<!-- Header -->
<!-- ****************************************************** -->
+<book id="ALSA-Driver-API">
<bookinfo>
<title>The ALSA Driver API</title>
</bookinfo>
+<toc></toc>
+
<chapter><title>Management of Cards and Devices</title>
<sect1><title>Card Management</title>
!Esound/core/init.c
!Esound/pci/ac97/ac97_codec.c
!Esound/pci/ac97/ac97_pcm.c
</sect1>
+ <sect1><title>Virtual Master Control API</title>
+!Esound/core/vmaster.c
+!Iinclude/sound/control.h
+ </sect1>
</chapter>
<chapter><title>MIDI API</title>
<sect1><title>Raw MIDI API</title>
<chapter><title>Miscellaneous Functions</title>
<sect1><title>Hardware-Dependent Devices API</title>
!Esound/core/hwdep.c
+ </sect1>
+ <sect1><title>Jack Abstraction Layer API</title>
+!Esound/core/jack.c
</sect1>
<sect1><title>ISA DMA Helpers</title>
!Esound/core/isadma.c
-<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook V4.1//EN">
-
-<book>
-<?dbhtml filename="index.html">
+<?xml version="1.0" encoding="UTF-8"?>
+<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
+ "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []>
<!-- ****************************************************** -->
<!-- Header -->
<!-- ****************************************************** -->
+<book id="Writing-an-ALSA-Driver">
<bookinfo>
<title>Writing an ALSA Driver</title>
<author>
}
/* (2) */
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
/* (3) */
err = snd_mychip_create(card, pci, &chip);
<programlisting>
<![CDATA[
struct snd_card *card;
+ int err;
....
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
]]>
</programlisting>
</informalexample>
<para>
As mentioned above, to create a card instance, call
- <function>snd_card_new()</function>.
+ <function>snd_card_create()</function>.
<informalexample>
<programlisting>
<![CDATA[
struct snd_card *card;
- card = snd_card_new(index, id, module, extra_size);
+ int err;
+ err = snd_card_create(index, id, module, extra_size, &card);
]]>
</programlisting>
</informalexample>
</para>
<para>
- The function takes four arguments, the card-index number, the
+ The function takes five arguments, the card-index number, the
id string, the module pointer (usually
<constant>THIS_MODULE</constant>),
- and the size of extra-data space. The last argument is used to
+ the size of extra-data space, and the pointer to return the
+ card instance. The extra_size argument is used to
allocate card->private_data for the
chip-specific data. Note that these data
- are allocated by <function>snd_card_new()</function>.
+ are allocated by <function>snd_card_create()</function>.
</para>
</section>
</para>
<section id="card-management-chip-specific-snd-card-new">
- <title>1. Allocating via <function>snd_card_new()</function>.</title>
+ <title>1. Allocating via <function>snd_card_create()</function>.</title>
<para>
As mentioned above, you can pass the extra-data-length
- to the 4th argument of <function>snd_card_new()</function>, i.e.
+ to the 4th argument of <function>snd_card_create()</function>, i.e.
<informalexample>
<programlisting>
<![CDATA[
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, sizeof(struct mychip));
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct mychip), &card);
]]>
</programlisting>
</informalexample>
<para>
After allocating a card instance via
- <function>snd_card_new()</function> (with
- <constant>NULL</constant> on the 4th arg), call
+ <function>snd_card_create()</function> (with
+ <constant>0</constant> on the 4th arg), call
<function>kzalloc()</function>.
<informalexample>
<![CDATA[
struct snd_card *card;
struct mychip *chip;
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, NULL);
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
.....
chip = kzalloc(sizeof(*chip), GFP_KERNEL);
]]>
....
struct snd_card *card;
struct mychip *chip;
+ int err;
....
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, NULL);
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
....
chip = kzalloc(sizeof(*chip), GFP_KERNEL);
....
</informalexample>
When you created the chip data with
- <function>snd_card_new()</function>, it's anyway accessible
+ <function>snd_card_create()</function>, it's anyway accessible
via <structfield>private_data</structfield> field.
<informalexample>
....
struct snd_card *card;
struct mychip *chip;
+ int err;
....
- card = snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(struct mychip));
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct mychip), &card);
....
chip = card->private_data;
....
Windows 95/98/NT/2000 http://www.chrysocome.net/explore2fs
Windows 95 (*) http://www.yipton.net/content.html#FSDEXT2
DOS client (*) ftp://metalab.unc.edu/pub/Linux/system/filesystems/ext2/
-OS/2 (*) ftp://metalab.unc.edu/pub/Linux/system/filesystems/ext2/
+OS/2 (+) ftp://metalab.unc.edu/pub/Linux/system/filesystems/ext2/
RISC OS client http://www.esw-heim.tu-clausthal.de/~marco/smorbrod/IscaFS/
-(*) no longer actively developed/supported (as of Mar 2009)
+(*) no longer actively developed/supported (as of Apr 2001)
+(+) no longer actively developed/supported (as of Mar 2009)
this should be enabled, but if the problem persists the messages can be
disabled.
+netdev_budget
+-------------
+
+Maximum number of packets taken from all interfaces in one polling cycle (NAPI
+poll). In one polling cycle interfaces which are registered to polling are
+probed in a round-robin manner. The limit of packets in one such probe can be
+set per-device via sysfs class/net/<device>/weight .
netdev_max_backlog
------------------
--- /dev/null
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<!-- Created with Inkscape (http://www.inkscape.org/) -->
+<svg
+ xmlns:dc="http://purl.org/dc/elements/1.1/"
+ xmlns:cc="http://creativecommons.org/ns#"
+ xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
+ xmlns:svg="http://www.w3.org/2000/svg"
+ xmlns="http://www.w3.org/2000/svg"
+ xmlns:xlink="http://www.w3.org/1999/xlink"
+ xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
+ xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape"
+ width="1771.6534"
+ height="1417.3228"
+ id="svg2"
+ sodipodi:version="0.32"
+ inkscape:version="0.46"
+ sodipodi:docname="tuz.svg"
+ inkscape:output_extension="org.inkscape.output.svg.inkscape"
+ version="1.0"
+ style="display:inline;enable-background:new"
+ inkscape:export-filename="/home/cheeseness/Documents/LCA09/mascot/tuz_final.png"
+ inkscape:export-xdpi="100.03588"
+ inkscape:export-ydpi="100.03588">
+ <sodipodi:namedview
+ id="base"
+ pagecolor="#ffffff"
+ bordercolor="#666666"
+ borderopacity="1.0"
+ gridtolerance="10000"
+ guidetolerance="10"
+ objecttolerance="10"
+ inkscape:pageopacity="0.0"
+ inkscape:pageshadow="2"
+ inkscape:zoom="0.25"
+ inkscape:cx="-174.7931"
+ inkscape:cy="784.26325"
+ inkscape:document-units="px"
+ inkscape:current-layer="svg2"
+ showgrid="false"
+ inkscape:window-width="1280"
+ inkscape:window-height="823"
+ inkscape:window-x="-4"
+ inkscape:window-y="25"
+ showguides="true"
+ inkscape:guide-bbox="true"
+ units="mm" />
+ <defs
+ id="defs4">
+ <filter
+ inkscape:collect="always"
+ x="-0.084654994"
+ width="1.16931"
+ y="-0.36592469"
+ height="1.7318494"
+ id="filter11361">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="4.5740586"
+ id="feGaussianBlur11363" />
+ </filter>
+ <inkscape:perspective
+ sodipodi:type="inkscape:persp3d"
+ inkscape:vp_x="0 : 564.0976 : 1"
+ inkscape:vp_y="0 : 1000 : 0"
+ inkscape:vp_z="1445.8591 : 564.0976 : 1"
+ inkscape:persp3d-origin="722.92957 : 376.06506 : 1"
+ id="perspective8145" />
+ <linearGradient
+ id="linearGradient7622">
+ <stop
+ style="stop-color:#ffffff;stop-opacity:1;"
+ offset="0"
+ id="stop7624" />
+ <stop
+ style="stop-color:#ffffff;stop-opacity:0;"
+ offset="1"
+ id="stop7626" />
+ </linearGradient>
+ <linearGradient
+ id="linearGradient4113">
+ <stop
+ style="stop-color:#000000;stop-opacity:0;"
+ offset="0"
+ id="stop4115" />
+ <stop
+ style="stop-color:#000000;stop-opacity:1;"
+ offset="1"
+ id="stop4117" />
+ </linearGradient>
+ <linearGradient
+ inkscape:collect="always"
+ id="linearGradient3660">
+ <stop
+ style="stop-color:#ffffff;stop-opacity:1;"
+ offset="0"
+ id="stop3662" />
+ <stop
+ style="stop-color:#ffffff;stop-opacity:0;"
+ offset="1"
+ id="stop3664" />
+ </linearGradient>
+ <linearGradient
+ id="linearGradient3627">
+ <stop
+ style="stop-color:#ffffff;stop-opacity:1;"
+ offset="0"
+ id="stop3629" />
+ <stop
+ style="stop-color:#000000;stop-opacity:1;"
+ offset="1"
+ id="stop3631" />
+ </linearGradient>
+ <linearGradient
+ id="linearGradient2843">
+ <stop
+ id="stop2845"
+ offset="0"
+ style="stop-color:#000000;stop-opacity:1;" />
+ <stop
+ style="stop-color:#000000;stop-opacity:1;"
+ offset="0.02188784"
+ id="stop2847" />
+ <stop
+ style="stop-color:#000000;stop-opacity:1;"
+ offset="0.75866222"
+ id="stop2849" />
+ <stop
+ id="stop2851"
+ offset="0.88508981"
+ style="stop-color:#232323;stop-opacity:1;" />
+ <stop
+ id="stop2853"
+ offset="1"
+ style="stop-color:#595959;stop-opacity:1;" />
+ </linearGradient>
+ <linearGradient
+ inkscape:collect="always"
+ id="linearGradient8964">
+ <stop
+ style="stop-color:#1a1a1a;stop-opacity:1;"
+ offset="0"
+ id="stop8966" />
+ <stop
+ style="stop-color:#1a1a1a;stop-opacity:0;"
+ offset="1"
+ id="stop8968" />
+ </linearGradient>
+ <linearGradient
+ id="linearGradient8952">
+ <stop
+ style="stop-color:#0a0c0c;stop-opacity:1;"
+ offset="0"
+ id="stop8954" />
+ <stop
+ style="stop-color:#1f2727;stop-opacity:0;"
+ offset="1"
+ id="stop8956" />
+ </linearGradient>
+ <linearGradient
+ id="linearGradient8430">
+ <stop
+ style="stop-color:#1e2323;stop-opacity:1;"
+ offset="0"
+ id="stop8432" />
+ <stop
+ id="stop8438"
+ offset="0.55992389"
+ style="stop-color:#181d1d;stop-opacity:1;" />
+ <stop
+ style="stop-color:#000000;stop-opacity:1;"
+ offset="1"
+ id="stop8434" />
+ </linearGradient>
+ <linearGradient
+ id="linearGradient8398">
+ <stop
+ style="stop-color:#283131;stop-opacity:0;"
+ offset="0"
+ id="stop8400" />
+ <stop
+ id="stop8402"
+ offset="0.5125587"
+ style="stop-color:#1e2424;stop-opacity:0;" />
+ <stop
+ style="stop-color:#000000;stop-opacity:1;"
+ offset="1"
+ id="stop8404" />
+ </linearGradient>
+ <linearGradient
+ inkscape:collect="always"
+ id="linearGradient4870">
+ <stop
+ style="stop-color:#c7bd80;stop-opacity:1;"
+ offset="0"
+ id="stop4872" />
+ <stop
+ style="stop-color:#c7bd80;stop-opacity:0;"
+ offset="1"
+ id="stop4874" />
+ </linearGradient>
+ <linearGradient
+ inkscape:collect="always"
+ id="linearGradient4862">
+ <stop
+ style="stop-color:#e2e2e2;stop-opacity:1;"
+ offset="0"
+ id="stop4864" />
+ <stop
+ style="stop-color:#e2e2e2;stop-opacity:0;"
+ offset="1"
+ id="stop4866" />
+ </linearGradient>
+ <linearGradient
+ id="linearGradient4478">
+ <stop
+ style="stop-color:#f9eed3;stop-opacity:1;"
+ offset="0"
+ id="stop4480" />
+ <stop
+ style="stop-color:#000000;stop-opacity:0;"
+ offset="1"
+ id="stop4482" />
+ </linearGradient>
+ <linearGradient
+ id="linearGradient4106">
+ <stop
+ style="stop-color:#d9e002;stop-opacity:1;"
+ offset="0"
+ id="stop4108" />
+ <stop
+ id="stop4114"
+ offset="0.5"
+ style="stop-color:#a9ae01;stop-opacity:1;" />
+ <stop
+ style="stop-color:#717501;stop-opacity:1;"
+ offset="1"
+ id="stop4110" />
+ </linearGradient>
+ <linearGradient
+ id="linearGradient4084">
+ <stop
+ style="stop-color:#7d7d00;stop-opacity:1;"
+ offset="0"
+ id="stop4086" />
+ <stop
+ id="stop4088"
+ offset="0.3636601"
+ style="stop-color:#c6c700;stop-opacity:1;" />
+ <stop
+ style="stop-color:#f6f800;stop-opacity:1;"
+ offset="1"
+ id="stop4090" />
+ </linearGradient>
+ <linearGradient
+ id="linearGradient4041">
+ <stop
+ id="stop4043"
+ offset="0"
+ style="stop-color:#ffff00;stop-opacity:1;" />
+ <stop
+ id="stop4045"
+ offset="1"
+ style="stop-color:#ffff00;stop-opacity:0;" />
+ </linearGradient>
+ <linearGradient
+ id="linearGradient4025">
+ <stop
+ style="stop-color:#ffffff;stop-opacity:1;"
+ offset="0"
+ id="stop4027" />
+ <stop
+ style="stop-color:#ffffff;stop-opacity:0;"
+ offset="1"
+ id="stop4031" />
+ </linearGradient>
+ <linearGradient
+ id="linearGradient4013">
+ <stop
+ style="stop-color:#ffff00;stop-opacity:1;"
+ offset="0"
+ id="stop4015" />
+ <stop
+ style="stop-color:#b2b200;stop-opacity:1;"
+ offset="1"
+ id="stop4017" />
+ </linearGradient>
+ <linearGradient
+ id="linearGradient3985">
+ <stop
+ style="stop-color:#000000;stop-opacity:1;"
+ offset="0"
+ id="stop3987" />
+ <stop
+ style="stop-color:#1d1d1d;stop-opacity:1;"
+ offset="1"
+ id="stop3989" />
+ </linearGradient>
+ <linearGradient
+ id="linearGradient3961">
+ <stop
+ style="stop-color:#283131;stop-opacity:0;"
+ offset="0"
+ id="stop3963" />
+ <stop
+ id="stop3965"
+ offset="0.5"
+ style="stop-color:#1e2424;stop-opacity:1;" />
+ <stop
+ style="stop-color:#000000;stop-opacity:1;"
+ offset="1"
+ id="stop3967" />
+ </linearGradient>
+ <linearGradient
+ id="linearGradient3951">
+ <stop
+ id="stop3953"
+ offset="0"
+ style="stop-color:#344040;stop-opacity:1;" />
+ <stop
+ style="stop-color:#222929;stop-opacity:1;"
+ offset="0.5"
+ id="stop3955" />
+ <stop
+ id="stop3957"
+ offset="1"
+ style="stop-color:#000000;stop-opacity:1;" />
+ </linearGradient>
+ <linearGradient
+ id="linearGradient3909">
+ <stop
+ style="stop-color:#283131;stop-opacity:1;"
+ offset="0"
+ id="stop3911" />
+ <stop
+ id="stop3917"
+ offset="0.5"
+ style="stop-color:#1e2424;stop-opacity:1;" />
+ <stop
+ style="stop-color:#000000;stop-opacity:1;"
+ offset="1"
+ id="stop3913" />
+ </linearGradient>
+ <linearGradient
+ id="linearGradient3537">
+ <stop
+ style="stop-color:#ada469;stop-opacity:1;"
+ offset="0"
+ id="stop3539" />
+ <stop
+ id="stop3545"
+ offset="0.81132078"
+ style="stop-color:#ada469;stop-opacity:1;" />
+ <stop
+ style="stop-color:#ffffff;stop-opacity:1;"
+ offset="1"
+ id="stop3541" />
+ </linearGradient>
+ <linearGradient
+ id="linearGradient3317">
+ <stop
+ style="stop-color:#cfc690;stop-opacity:1"
+ offset="0"
+ id="stop3319" />
+ <stop
+ id="stop3321"
+ offset="0.21161865"
+ style="stop-color:#afa775;stop-opacity:1;" />
+ <stop
+ id="stop3323"
+ offset="0.53408515"
+ style="stop-color:#615c3a;stop-opacity:1;" />
+ <stop
+ style="stop-color:#000000;stop-opacity:1;"
+ offset="0.76504093"
+ id="stop3325" />
+ <stop
+ id="stop3327"
+ offset="1"
+ style="stop-color:#403518;stop-opacity:1;" />
+ </linearGradient>
+ <linearGradient
+ id="linearGradient3239">
+ <stop
+ id="stop3251"
+ offset="0"
+ style="stop-color:#cfc690;stop-opacity:1;" />
+ <stop
+ style="stop-color:#afa775;stop-opacity:1;"
+ offset="0.21161865"
+ id="stop3267" />
+ <stop
+ style="stop-color:#615c3a;stop-opacity:1;"
+ offset="0.53408515"
+ id="stop3261" />
+ <stop
+ id="stop3265"
+ offset="0.76504093"
+ style="stop-color:#000000;stop-opacity:1;" />
+ <stop
+ style="stop-color:#403518;stop-opacity:1;"
+ offset="1"
+ id="stop3243" />
+ </linearGradient>
+ <radialGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient3239"
+ id="radialGradient3281"
+ gradientUnits="userSpaceOnUse"
+ gradientTransform="matrix(1.5480423,1.7414304,-1.9683515,1.7497638,-1130.5586,-1872.5121)"
+ spreadMethod="pad"
+ cx="806.52582"
+ cy="212.68117"
+ fx="806.52582"
+ fy="212.68117"
+ r="48.363216" />
+ <radialGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient3317"
+ id="radialGradient3315"
+ cx="543.6698"
+ cy="147.3131"
+ fx="543.6698"
+ fy="147.3131"
+ r="47.863216"
+ gradientTransform="matrix(2.1382256,0,0,2.3382884,-77.03847,-101.68704)"
+ gradientUnits="userSpaceOnUse" />
+ <radialGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient3537"
+ id="radialGradient3543"
+ cx="385"
+ cy="237.00504"
+ fx="385"
+ fy="237.00504"
+ r="86.928574"
+ gradientTransform="matrix(1,0,0,0.8562038,0,34.080427)"
+ gradientUnits="userSpaceOnUse" />
+ <radialGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient3909"
+ id="radialGradient3915"
+ cx="418.30365"
+ cy="342.47794"
+ fx="418.30365"
+ fy="342.47794"
+ r="131.4509"
+ gradientTransform="matrix(1.3957347,0.6211056,-0.4244067,0.9537174,-15.061913,-227.96711)"
+ gradientUnits="userSpaceOnUse" />
+ <radialGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient3951"
+ id="radialGradient3933"
+ cx="397.16388"
+ cy="336.95245"
+ fx="397.16388"
+ fy="336.95245"
+ r="36.75"
+ gradientUnits="userSpaceOnUse"
+ gradientTransform="matrix(1.9449972,2.4894837e-7,-2.4894833e-7,1.9449969,-375.31868,-318.41912)" />
+ <linearGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient3961"
+ id="linearGradient3959"
+ x1="398.21429"
+ y1="343.52289"
+ x2="379.28571"
+ y2="265.30862"
+ gradientUnits="userSpaceOnUse"
+ gradientTransform="translate(450.03125,73.843964)" />
+ <filter
+ inkscape:collect="always"
+ id="filter3981"
+ x="-0.30000001"
+ width="1.6"
+ y="-0.30000001"
+ height="1.6">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="2"
+ id="feGaussianBlur3983" />
+ </filter>
+ <radialGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient3985"
+ id="radialGradient3991"
+ cx="402.48898"
+ cy="317.23578"
+ fx="402.48898"
+ fy="317.23578"
+ r="23.714285"
+ gradientUnits="userSpaceOnUse"
+ gradientTransform="matrix(4.3776616,0,0,4.3776616,-1358.3025,-1070.7357)" />
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath3999">
+ <path
+ style="opacity:1;fill:#f5ff04;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:20.79999924;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:none;stroke-opacity:1;display:inline"
+ d="M 179.64286,267.36218 C 157.23242,307.0651 119.02676,383.14247 110.35715,417.00504 C 101.70994,450.78014 101.58516,483.42158 110,503.43362 C 118.3602,523.31575 136.16398,539.06642 150.71428,544.86218 C 150.1179,530.48631 165.08723,501.57635 223.57143,472.36218 C 282.1977,443.07704 301.95306,445.23132 327.14285,425.21932 C 352.77291,404.85756 339.75316,358.17469 330.35714,331.29075 C 320.9229,304.29747 295.38973,272.16627 263.92857,261.6479 C 232.8953,251.27258 198.91081,256.79953 179.64286,267.36218 z"
+ id="path4001"
+ sodipodi:nodetypes="czzczzzzc" />
+ </clipPath>
+ <radialGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient4013"
+ id="radialGradient4056"
+ gradientUnits="userSpaceOnUse"
+ gradientTransform="matrix(1.1323239,0.7659488,-1.4550286,2.1510098,588.75376,-711.79716)"
+ cx="228.81355"
+ cy="440.26971"
+ fx="228.81355"
+ fy="440.26971"
+ r="119.17509" />
+ <radialGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient4041"
+ id="radialGradient4060"
+ gradientUnits="userSpaceOnUse"
+ gradientTransform="matrix(5.911206e-2,2.6869855,-0.7234268,1.5914947e-2,408.72779,-424.56452)"
+ cx="275.4422"
+ cy="335.34866"
+ fx="275.4422"
+ fy="335.34866"
+ r="36.75" />
+ <radialGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient4025"
+ id="radialGradient4062"
+ gradientUnits="userSpaceOnUse"
+ gradientTransform="matrix(5.911206e-2,2.6869855,-0.7234268,1.5914947e-2,408.72779,-424.56452)"
+ cx="275.4422"
+ cy="335.34866"
+ fx="275.4422"
+ fy="335.34866"
+ r="36.75" />
+ <linearGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient4084"
+ id="linearGradient4082"
+ gradientUnits="userSpaceOnUse"
+ x1="182.35046"
+ y1="256.11136"
+ x2="145.53348"
+ y2="542.20502" />
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath4100">
+ <path
+ style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:0.9000755px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ d="M 265.93541,126.68393 L 247.1682,295.54701 L 421.27363,222.42633 L 483.22803,311.08516 L 541.11243,279.09486 L 503.57801,99.035183 L 265.93541,126.68393 z"
+ id="path4102"
+ sodipodi:nodetypes="ccccccc" />
+ </clipPath>
+ <radialGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient4106"
+ id="radialGradient4112"
+ cx="250.22678"
+ cy="475.09763"
+ fx="250.22678"
+ fy="475.09763"
+ r="95.98877"
+ gradientTransform="matrix(1.2259004,-0.7077739,0.1413989,0.2449102,322.22326,608.91815)"
+ gradientUnits="userSpaceOnUse" />
+ <linearGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient4478"
+ id="linearGradient4484"
+ x1="412.08926"
+ y1="404.91574"
+ x2="417.375"
+ y2="401.82648"
+ gradientUnits="userSpaceOnUse" />
+ <linearGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient4478"
+ id="linearGradient4486"
+ x1="411.91071"
+ y1="404.91577"
+ x2="417.375"
+ y2="401.82648"
+ gradientUnits="userSpaceOnUse" />
+ <linearGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient4478"
+ id="linearGradient4488"
+ x1="411.91071"
+ y1="405.54077"
+ x2="417.375"
+ y2="401.82648"
+ gradientUnits="userSpaceOnUse" />
+ <linearGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient4478"
+ id="linearGradient4490"
+ x1="412.08926"
+ y1="405.54077"
+ x2="417.375"
+ y2="401.82648"
+ gradientUnits="userSpaceOnUse" />
+ <linearGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient4478"
+ id="linearGradient4492"
+ x1="411.73212"
+ y1="405.54077"
+ x2="417.375"
+ y2="401.82648"
+ gradientUnits="userSpaceOnUse" />
+ <radialGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient4862"
+ id="radialGradient4868"
+ cx="429.56738"
+ cy="377.42877"
+ fx="429.56738"
+ fy="377.42877"
+ r="72.079735"
+ gradientTransform="matrix(1,0,0,0.618034,0,144.16496)"
+ gradientUnits="userSpaceOnUse" />
+ <radialGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient4870"
+ id="radialGradient4876"
+ cx="437.6991"
+ cy="391.21735"
+ fx="437.6991"
+ fy="391.21735"
+ r="36.611931"
+ gradientTransform="matrix(1,0,0,0.618034,0,149.43174)"
+ gradientUnits="userSpaceOnUse" />
+ <radialGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient4013"
+ id="radialGradient3585"
+ gradientUnits="userSpaceOnUse"
+ gradientTransform="matrix(1.1323239,0.7659488,-1.4550286,2.1510098,588.75376,-711.79716)"
+ cx="228.81355"
+ cy="440.26971"
+ fx="228.81355"
+ fy="440.26971"
+ r="119.17509" />
+ <linearGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient4084"
+ id="linearGradient3587"
+ gradientUnits="userSpaceOnUse"
+ x1="182.35046"
+ y1="256.11136"
+ x2="145.53348"
+ y2="542.20502" />
+ <radialGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient3317"
+ id="radialGradient8410"
+ gradientUnits="userSpaceOnUse"
+ gradientTransform="matrix(1.0036478,-1.0345492e-7,1.7124628e-7,1.6613125,-753.99632,-302.76972)"
+ cx="317.78754"
+ cy="129.65378"
+ fx="317.78754"
+ fy="129.65378"
+ r="47.863216" />
+ <radialGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient8398"
+ id="radialGradient8412"
+ gradientUnits="userSpaceOnUse"
+ gradientTransform="matrix(2.0747661,-0.1577957,0.2382425,3.1325183,-1144.2358,-272.29325)"
+ cx="325.30847"
+ cy="80.909554"
+ fx="325.30847"
+ fy="80.909554"
+ r="26.937988" />
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath8514">
+ <path
+ style="opacity:1;fill:#262f2f;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 352.24553,211.99185 C 348.4411,186.72762 335.43581,161.35383 335.08873,136.46662 C 334.90247,123.1111 338.36158,109.89571 348.84426,96.912574 C 385.19128,31.616739 465.78517,12.217889 534.77892,5.447147 C 621.70131,-5.569654 719.69159,23.387219 768.15026,100.84843 C 822.27428,176.58173 824.82502,273.38755 848.7623,360.37638 C 878.20009,487.50398 903.54144,616.59052 909.15454,747.22673 C 906.09106,825.40858 900.7282,912.41088 848.65133,975.36086 C 800.62479,1025.7183 725.86486,1025.4139 661.58145,1034.3632 C 571.02606,1039.0182 477.22992,1018.2174 399.79755,970.16496 C 335.02191,932.22495 304.06736,856.68633 302.51815,784.14538 C 294.12898,704.27022 328.90967,630.33687 354.13855,556.98577 C 361.60916,474.2247 363.55141,390.73802 363.79189,307.60093 C 362.95507,275.40549 356.70236,243.7836 352.24553,211.99185 z"
+ id="path8516"
+ sodipodi:nodetypes="cscccccccccccc" />
+ </clipPath>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath8604">
+ <path
+ style="opacity:1;fill:#262f2f;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 352.24553,211.99185 C 348.4411,186.72762 335.43581,161.35383 335.08873,136.46662 C 334.90247,123.1111 338.36158,109.89571 348.84426,96.912574 C 385.19128,31.616739 465.78517,12.217889 534.77892,5.447147 C 621.70131,-5.569654 719.69159,23.387219 768.15026,100.84843 C 822.27428,176.58173 824.82502,273.38755 848.7623,360.37638 C 878.20009,487.50398 903.54144,616.59052 909.15454,747.22673 C 906.09106,825.40858 900.7282,912.41088 848.65133,975.36086 C 800.62479,1025.7183 725.86486,1025.4139 661.58145,1034.3632 C 571.02606,1039.0182 477.22992,1018.2174 399.79755,970.16496 C 335.02191,932.22495 304.06736,856.68633 302.51815,784.14538 C 294.12898,704.27022 328.90967,630.33687 354.13855,556.98577 C 361.60916,474.2247 363.55141,390.73802 363.79189,307.60093 C 362.95507,275.40549 356.70236,243.7836 352.24553,211.99185 z"
+ id="path8606"
+ sodipodi:nodetypes="cscccccccccccc" />
+ </clipPath>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath8610">
+ <path
+ style="opacity:1;fill:#262f2f;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 352.24553,211.99185 C 348.4411,186.72762 335.43581,161.35383 335.08873,136.46662 C 334.90247,123.1111 338.36158,109.89571 348.84426,96.912574 C 385.19128,31.616739 465.78517,12.217889 534.77892,5.447147 C 621.70131,-5.569654 719.69159,23.387219 768.15026,100.84843 C 822.27428,176.58173 824.82502,273.38755 848.7623,360.37638 C 878.20009,487.50398 903.54144,616.59052 909.15454,747.22673 C 906.09106,825.40858 900.7282,912.41088 848.65133,975.36086 C 800.62479,1025.7183 725.86486,1025.4139 661.58145,1034.3632 C 571.02606,1039.0182 477.22992,1018.2174 399.79755,970.16496 C 335.02191,932.22495 304.06736,856.68633 302.51815,784.14538 C 294.12898,704.27022 328.90967,630.33687 354.13855,556.98577 C 361.60916,474.2247 363.55141,390.73802 363.79189,307.60093 C 362.95507,275.40549 356.70236,243.7836 352.24553,211.99185 z"
+ id="path8612"
+ sodipodi:nodetypes="cscccccccccccc" />
+ </clipPath>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath8616">
+ <path
+ style="opacity:1;fill:#262f2f;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 352.24553,211.99185 C 348.4411,186.72762 335.43581,161.35383 335.08873,136.46662 C 334.90247,123.1111 338.36158,109.89571 348.84426,96.912574 C 385.19128,31.616739 465.78517,12.217889 534.77892,5.447147 C 621.70131,-5.569654 719.69159,23.387219 768.15026,100.84843 C 822.27428,176.58173 824.82502,273.38755 848.7623,360.37638 C 878.20009,487.50398 903.54144,616.59052 909.15454,747.22673 C 906.09106,825.40858 900.7282,912.41088 848.65133,975.36086 C 800.62479,1025.7183 725.86486,1025.4139 661.58145,1034.3632 C 571.02606,1039.0182 477.22992,1018.2174 399.79755,970.16496 C 335.02191,932.22495 304.06736,856.68633 302.51815,784.14538 C 294.12898,704.27022 328.90967,630.33687 354.13855,556.98577 C 361.60916,474.2247 363.55141,390.73802 363.79189,307.60093 C 362.95507,275.40549 356.70236,243.7836 352.24553,211.99185 z"
+ id="path8618"
+ sodipodi:nodetypes="cscccccccccccc" />
+ </clipPath>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath8622">
+ <path
+ style="opacity:1;fill:#202020;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ d="M 821.64329,477.88997 C 821.64329,477.88997 844.26276,471.38316 857.38604,472.01724 C 870.50932,472.65133 888.02762,473.95586 901.09489,484.20343 C 914.16216,494.45099 926.16263,511.3435 935.20728,542.57308 C 944.25193,573.80266 936.9056,641.82509 929.03125,685.92043 C 921.1569,730.01577 900.76615,792.03341 884.03125,825.92043 C 867.29635,859.80745 834.23354,903.41563 823.46182,915.79659 C 812.0976,928.85856 767.25593,952.22276 744.03125,958.06326 C 749.33455,947.45666 792.93101,907.47442 779.03125,897.349 C 765.01228,887.13674 733.27116,943.33136 694.7381,926.38217 C 716.12041,913.25005 736.5175,875.19611 728.77871,859.78772 C 720.93846,844.17733 698.07378,908.54529 635.24317,896.8006 C 665.29521,869.27394 690.65023,825.89659 676.50587,813.8209 C 662.09071,801.51403 616.04412,868.11405 616.04412,868.11405 C 616.04412,868.11405 613.22222,826.41287 629.81732,799.50673 C 646.45667,772.52886 709.47029,717.89146 729.37045,687.80331 C 749.2706,657.71517 762.98301,621.79429 771.50587,595.28537 C 780.02873,568.77645 787.30681,518.18583 787.30681,518.18583"
+ id="path8624"
+ sodipodi:nodetypes="czzzzzzczczczczzzc" />
+ </clipPath>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath8642">
+ <path
+ style="opacity:1;fill:#0f0f0f;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 366.88839,504.13471 C 366.88839,504.13471 337.33433,544.70776 319.03125,578.42042 C 300.72816,612.13309 260.41016,704.77736 248.67411,749.49185 C 236.91471,794.29529 186.17411,873.06329 186.17411,873.06329 L 262.24554,891.27757 C 262.24554,891.27757 274.05266,878.45422 293.31696,845.20614 C 312.58126,811.95806 353.67411,706.63471 353.67411,706.63471 L 366.88839,504.13471 z"
+ id="path8644"
+ sodipodi:nodetypes="czzcczcc" />
+ </clipPath>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath8658">
+ <path
+ style="opacity:1;fill:#0b0b0b;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 569.03125,1018.7776 C 564.74554,1019.4919 541.4031,1022.3957 511.17411,1028.7776 C 480.94512,1035.1595 411.39918,1054.7395 368.31696,1064.4919 C 325.23474,1074.2443 251.05253,1099.3079 211.40434,1091.7573 C 171.75616,1084.2067 121.88839,1027.349 121.88839,1027.349 L 126.17411,933.06329 C 126.17411,933.06329 212.05962,916.86235 238.31696,899.49186 C 264.57431,882.12137 283.89934,849.82588 297.60268,828.06329 C 311.30602,806.3007 330.45982,756.63471 330.45982,756.63471 L 569.03125,1018.7776 z"
+ id="path8660"
+ sodipodi:nodetypes="czzzcczzcc" />
+ </clipPath>
+ <filter
+ inkscape:collect="always"
+ id="filter8802"
+ x="-0.35311759"
+ width="1.7062352"
+ y="-0.1817714"
+ height="1.3635428">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="48.038491"
+ id="feGaussianBlur8804" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter8806"
+ x="-0.61142862"
+ width="2.2228572"
+ y="-0.14930232"
+ height="1.2986046">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="37.830213"
+ id="feGaussianBlur8808" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter8810"
+ x="-0.23519406"
+ width="1.4703881"
+ y="-0.24500646"
+ height="1.4900129">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="58.328041"
+ id="feGaussianBlur8812" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter8814"
+ x="-0.20466694"
+ width="1.4093339"
+ y="-0.29007819"
+ height="1.5801564">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="22.300169"
+ id="feGaussianBlur8816" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter8818"
+ x="-0.34381232"
+ width="1.6876246"
+ y="-0.18433961"
+ height="1.3686792">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="34.542167"
+ id="feGaussianBlur8820" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter8822"
+ x="-0.2742857"
+ width="1.5485713"
+ y="-0.21333334"
+ height="1.4266667">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="11.313708"
+ id="feGaussianBlur8824" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter8826"
+ x="-0.25894088"
+ width="1.5178818"
+ y="-0.2236412"
+ height="1.4472824">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="19.631544"
+ id="feGaussianBlur8828" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter8856"
+ x="-0.3253231"
+ width="1.6506462"
+ y="-0.19013336"
+ height="1.3802667">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="28.712591"
+ id="feGaussianBlur8858" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter8860"
+ x="-0.38093024"
+ width="1.7618605"
+ y="-0.17518716"
+ height="1.3503743">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="19.304015"
+ id="feGaussianBlur8862" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter8888"
+ x="-0.2112188"
+ width="1.4224375"
+ y="-0.16808605"
+ height="1.3361721">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="8.3693583"
+ id="feGaussianBlur8890" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter8892"
+ x="-0.18692794"
+ width="1.3738559"
+ y="-0.23646873"
+ height="1.4729375">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="31.21228"
+ id="feGaussianBlur8894" />
+ </filter>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath8906">
+ <path
+ style="opacity:1;fill:#262f2f;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 352.24553,211.99185 C 348.4411,186.72762 335.43581,161.35383 335.08873,136.46662 C 334.90247,123.1111 338.36158,109.89571 348.84426,96.912574 C 385.19128,31.616739 465.78517,12.217889 534.77892,5.447147 C 621.70131,-5.569654 719.69159,23.387219 768.15026,100.84843 C 822.27428,176.58173 824.82502,273.38755 848.7623,360.37638 C 878.20009,487.50398 903.54144,616.59052 909.15454,747.22673 C 906.09106,825.40858 900.7282,912.41088 848.65133,975.36086 C 800.62479,1025.7183 725.86486,1025.4139 661.58145,1034.3632 C 571.02606,1039.0182 477.22992,1018.2174 399.79755,970.16496 C 335.02191,932.22495 304.06736,856.68633 302.51815,784.14538 C 294.12898,704.27022 328.90967,630.33687 354.13855,556.98577 C 361.60916,474.2247 363.55141,390.73802 363.79189,307.60093 C 362.95507,275.40549 356.70236,243.7836 352.24553,211.99185 z"
+ id="path8908"
+ sodipodi:nodetypes="cscccccccccccc" />
+ </clipPath>
+ <filter
+ inkscape:collect="always"
+ id="filter8940"
+ x="-0.25152978"
+ width="1.5030596"
+ y="-0.053035267"
+ height="1.1060705">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="13.024603"
+ id="feGaussianBlur8942" />
+ </filter>
+ <linearGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient8952"
+ id="linearGradient8958"
+ x1="609.31244"
+ y1="239.46866"
+ x2="560.83142"
+ y2="262.86206"
+ gradientUnits="userSpaceOnUse"
+ gradientTransform="translate(450.03125,73.843964)" />
+ <linearGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient8964"
+ id="linearGradient8970"
+ x1="603.84064"
+ y1="627.85303"
+ x2="616.24396"
+ y2="585.42664"
+ gradientUnits="userSpaceOnUse"
+ gradientTransform="translate(450.03125,73.843964)" />
+ <filter
+ inkscape:collect="always"
+ id="filter9020"
+ x="-0.32861114"
+ width="1.6572223"
+ y="-0.182"
+ height="1.364">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="20.912684"
+ id="feGaussianBlur9022" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter9024"
+ x="-0.55453134"
+ width="2.1090627"
+ y="-0.51434779"
+ height="2.0286956">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="20.912684"
+ id="feGaussianBlur9026" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter9044"
+ x="-0.32631579"
+ width="1.6526316"
+ y="-0.84545463"
+ height="2.6909094">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="21.92031"
+ id="feGaussianBlur9046" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter9048"
+ x="-0.40879121"
+ width="1.8175824"
+ y="-0.71538466"
+ height="2.4307692">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="21.92031"
+ id="feGaussianBlur9050" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter3587"
+ x="-0.1">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="8.881432"
+ id="feGaussianBlur3589" />
+ </filter>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath3602">
+ <path
+ sodipodi:nodetypes="czzzzzzczczczczzzc"
+ id="path3604"
+ d="M 647.61204,540.04601 C 647.61204,540.04601 670.23151,533.5392 683.35479,534.17328 C 696.47807,534.80737 713.99637,536.1119 727.06364,546.35947 C 740.13091,556.60703 752.13138,573.49954 761.17603,604.72912 C 770.22068,635.9587 762.87435,703.98113 755,748.07647 C 747.12565,792.17181 726.7349,854.18945 710,888.07647 C 693.2651,921.96349 660.20229,965.57167 649.43057,977.95263 C 638.06635,991.0146 593.22468,1014.3788 570,1020.2193 C 575.3033,1009.6127 618.89976,969.63046 605,959.50504 C 590.98103,949.29278 559.23991,1005.4874 520.70685,988.53821 C 542.08916,975.40609 562.48625,937.35215 554.74746,921.94376 C 546.90721,906.33337 524.04253,970.70133 461.21192,958.95664 C 491.26396,931.42998 516.61898,888.05263 502.47462,875.97694 C 488.05946,863.67007 442.01287,930.27009 442.01287,930.27009 C 442.01287,930.27009 439.19097,888.56891 455.78607,861.66277 C 472.42542,834.6849 535.43904,780.0475 555.3392,749.95935 C 575.23935,719.87121 588.95176,683.95033 597.47462,657.44141 C 605.99748,630.93249 613.27556,580.34187 613.27556,580.34187"
+ style="opacity:1;fill:#202020;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ </clipPath>
+ <filter
+ inkscape:collect="always"
+ id="filter4120"
+ x="-0.2770822"
+ width="1.5541644"
+ y="-0.32482043"
+ height="1.6496409">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="19.956289"
+ id="feGaussianBlur4122" />
+ </filter>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath3631">
+ <path
+ style="opacity:1;fill:#ada469;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ d="M 760.16396,935.83377 C 766.95806,954.73656 770.65765,969.13346 772.05426,987.04566 C 773.45088,1004.958 768.27158,1038.8465 769.1538,1057.7018 C 770.03555,1076.547 777.28749,1097.8008 796.49843,1106.6707 C 815.9173,1115.6365 845.81767,1116.882 870.61827,1103.5251 C 895.41887,1090.1681 928.01929,1033.1996 941.59253,1006.2164 C 955.21638,979.13246 980.3536,891.71903 986.25333,856.44781 C 992.15306,821.1766 988.80387,815.14704 981.63585,807.39232 C 984.27615,779.55217 980.13613,752.45689 994.74554,720.20614 C 964.49653,732.03184 957.36325,760.36684 946.42665,785.71122 C 938.42574,734.77829 946.63581,714.43803 949.74554,684.49186 C 920.68078,699.26977 906.88403,731.60588 904.74554,777.349 C 893.82159,776.0448 883.3541,772.91477 871.17411,776.63471 C 870.91007,730.61137 869.71055,699.7453 880.08474,662.42822 C 826.82927,683.45508 817.13746,769.02232 824.03125,775.20614 C 813.14843,775.74114 802.66017,773.90884 791.17411,778.06329 C 791.81303,735.49194 790.91365,693.15468 761.17411,655.20614 C 761.17411,655.20614 730.21605,736.12848 729.74554,758.77757 C 729.27503,781.42666 739.19713,798.94345 739.19713,798.94345 C 739.19713,798.94345 730.62906,835.68396 732.89854,857.17568 C 735.19439,878.91714 753.34144,916.85185 760.16396,935.83377 z"
+ id="path3633"
+ sodipodi:nodetypes="czzzzzzcccccccccczczz" />
+ </clipPath>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath3665">
+ <path
+ sodipodi:nodetypes="czzcczcc"
+ id="path3667"
+ d="M 366.88839,504.13471 C 366.88839,504.13471 337.33433,544.70776 319.03125,578.42042 C 300.72816,612.13309 260.41016,704.77736 248.67411,749.49185 C 236.91471,794.29529 186.17411,873.06329 186.17411,873.06329 L 262.24554,891.27757 C 262.24554,891.27757 274.05266,878.45422 293.31696,845.20614 C 312.58126,811.95806 353.67411,706.63471 353.67411,706.63471 L 366.88839,504.13471 z"
+ style="opacity:1;fill:#0f0f0f;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate" />
+ </clipPath>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath3677">
+ <path
+ style="opacity:1;fill:#ada469;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ d="M 586.13271,997.98981 C 592.92681,1016.8926 596.6264,1031.2895 598.02301,1049.2017 C 599.41963,1067.114 594.24033,1101.0025 595.12255,1119.8578 C 596.0043,1138.703 603.25624,1159.9568 622.46718,1168.8267 C 641.88605,1177.7925 671.78642,1179.038 696.58702,1165.6811 C 721.38762,1152.3241 753.98804,1095.3556 767.56128,1068.3724 C 781.18513,1041.2885 806.32235,953.87507 812.22208,918.60385 C 818.12181,883.33264 814.77262,877.30308 807.6046,869.54836 C 810.2449,841.70821 806.10488,814.61293 820.71429,782.36218 C 790.46528,794.18788 783.332,822.52288 772.3954,847.86726 C 764.39449,796.93433 772.60456,776.59407 775.71429,746.6479 C 746.64953,761.42581 732.85278,793.76192 730.71429,839.50504 C 719.79034,838.20084 709.32285,835.07081 697.14286,838.79075 C 696.87882,792.76741 695.6793,761.90134 706.05349,724.58426 C 652.79802,745.61112 643.10621,831.17836 650,837.36218 C 639.11718,837.89718 628.62892,836.06488 617.14286,840.21933 C 617.78178,797.64798 616.8824,755.31072 587.14286,717.36218 C 587.14286,717.36218 556.1848,798.28452 555.71429,820.93361 C 555.24378,843.5827 565.16588,861.09949 565.16588,861.09949 C 565.16588,861.09949 556.59781,897.84 558.86729,919.33172 C 561.16314,941.07318 579.31019,979.00789 586.13271,997.98981 z"
+ id="path3679"
+ sodipodi:nodetypes="czzzzzzcccccccccczczz" />
+ </clipPath>
+ <filter
+ inkscape:collect="always"
+ id="filter3898">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="10.892985"
+ id="feGaussianBlur3900" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter4130"
+ x="-0.49509686"
+ width="1.9901937"
+ y="-0.26708817"
+ height="1.5341763">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="10.730622"
+ id="feGaussianBlur4132" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter4141"
+ x="-0.40611032"
+ width="1.8122206"
+ y="-0.30260596"
+ height="1.6052119">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="9.8586086"
+ id="feGaussianBlur4143" />
+ </filter>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath4177">
+ <path
+ sodipodi:nodetypes="czzzzzzcccccccccczczz"
+ id="path4179"
+ d="M 586.13271,997.98981 C 592.92681,1016.8926 596.6264,1031.2895 598.02301,1049.2017 C 599.41963,1067.114 594.24033,1101.0025 595.12255,1119.8578 C 596.0043,1138.703 603.25624,1159.9568 622.46718,1168.8267 C 641.88605,1177.7925 671.78642,1179.038 696.58702,1165.6811 C 721.38762,1152.3241 753.98804,1095.3556 767.56128,1068.3724 C 781.18513,1041.2885 806.32235,953.87507 812.22208,918.60385 C 818.12181,883.33264 814.77262,877.30308 807.6046,869.54836 C 810.2449,841.70821 806.10488,814.61293 820.71429,782.36218 C 790.46528,794.18788 783.332,822.52288 772.3954,847.86726 C 764.39449,796.93433 772.60456,776.59407 775.71429,746.6479 C 746.64953,761.42581 732.85278,793.76192 730.71429,839.50504 C 719.79034,838.20084 709.32285,835.07081 697.14286,838.79075 C 696.87882,792.76741 695.6793,761.90134 706.05349,724.58426 C 652.79802,745.61112 643.10621,831.17836 650,837.36218 C 639.11718,837.89718 628.62892,836.06488 617.14286,840.21933 C 617.78178,797.64798 616.8824,755.31072 587.14286,717.36218 C 587.14286,717.36218 556.1848,798.28452 555.71429,820.93361 C 555.24378,843.5827 565.16588,861.09949 565.16588,861.09949 C 565.16588,861.09949 556.59781,897.84 558.86729,919.33172 C 561.16314,941.07318 579.31019,979.00789 586.13271,997.98981 z"
+ style="opacity:1;fill:#ada469;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ </clipPath>
+ <filter
+ inkscape:collect="always"
+ id="filter4185">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="3.6164709"
+ id="feGaussianBlur4187" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter4105">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="3.8640966"
+ id="feGaussianBlur4107" />
+ </filter>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath2833">
+ <path
+ style="opacity:1;fill:#292929;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 569.03125,1018.7776 C 564.74554,1019.4919 541.4031,1022.3957 511.17411,1028.7776 C 480.94512,1035.1595 453.86016,1033.7437 375.38803,1046.1072 C 295.53625,1058.688 281.32367,1088.6495 267.26578,1093.1715 C 252.56564,1097.9001 121.88839,1027.349 121.88839,1027.349 L 126.17411,933.06329 C 126.17411,933.06329 212.05962,916.86235 238.31696,899.49186 C 264.57431,882.12137 283.89934,849.82588 297.60268,828.06329 C 311.30602,806.3007 330.45982,756.63471 330.45982,756.63471 L 569.03125,1018.7776 z"
+ id="path2835"
+ sodipodi:nodetypes="czzzcczzcc" />
+ </clipPath>
+ <linearGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient2843"
+ id="linearGradient2841"
+ gradientUnits="userSpaceOnUse"
+ x1="347.89655"
+ y1="1070.2124"
+ x2="275.58191"
+ y2="867.97992" />
+ <linearGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient3627"
+ id="linearGradient3688"
+ gradientUnits="userSpaceOnUse"
+ x1="699.32867"
+ y1="269.76755"
+ x2="698.97504"
+ y2="346.1351" />
+ <mask
+ maskUnits="userSpaceOnUse"
+ id="mask3684">
+ <path
+ sodipodi:type="arc"
+ style="opacity:1;fill:url(#linearGradient3688);fill-opacity:1;fill-rule:nonzero;stroke:none;stroke-width:0.43724918px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ id="path3686"
+ sodipodi:cx="579.474"
+ sodipodi:cy="260.57516"
+ sodipodi:rx="192.6866"
+ sodipodi:ry="164.04877"
+ d="M 772.1606,260.57516 A 192.6866,164.04877 0 1 1 386.7874,260.57516 A 192.6866,164.04877 0 1 1 772.1606,260.57516 z"
+ transform="translate(-174.03125,62.156036)" />
+ </mask>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath3622">
+ <path
+ style="opacity:1;fill:#ada469;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ d="M 266.27183,924.57186 C 264.86456,943.37307 265.12693,957.32289 268.35357,973.87514 C 271.58022,990.42748 284.75965,1019.7825 288.68797,1037.0589 C 292.61419,1054.326 291.3821,1075.3685 276.22853,1088.2071 C 260.91092,1101.1845 234.17726,1109.806 208.39623,1103.9409 C 182.61517,1098.0756 138.84716,1054.7175 119.80604,1033.7126 C 100.6939,1012.6293 56.045183,939.86194 41.867508,909.43681 C 27.689836,879.01169 29.207903,872.71824 33.747793,863.90708 C 24.381071,839.38658 21.334081,813.84027 0.035335518,788.33044 C 30.360815,791.44488 43.915625,815.28677 60.161025,835.47019 C 54.631129,787.39416 42.10631,771.05369 31.787073,744.74589 C 61.781368,750.82755 82.366433,776.61829 95.766856,817.45839 C 105.32101,813.54048 114.00462,808.08545 125.95427,808.39719 C 114.65677,766.70139 108.00481,738.48135 89.267015,707.32725 C 142.70898,712.99758 172.92404,787.96657 168.23844,795.28805 C 178.21641,793.04406 187.24409,788.75767 198.67497,789.63638 C 187.42601,751.28936 177.62716,712.76848 195.01526,670.9882 C 195.01526,670.9882 243.30204,736.42507 249.40492,756.79397 C 255.50779,777.16288 250.92373,795.49449 250.92373,795.49449 C 250.92373,795.49449 267.8833,826.57978 271.21765,846.58862 C 274.59075,866.82997 267.68496,905.69194 266.27183,924.57186 z"
+ id="path3624"
+ sodipodi:nodetypes="czzzzzzcccccccccczczz" />
+ </clipPath>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath3636">
+ <path
+ style="opacity:1;fill:#ada469;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ d="M 760.16396,935.83377 C 766.95806,954.73656 770.65765,969.13346 772.05426,987.04566 C 773.45088,1004.958 768.27158,1038.8465 769.1538,1057.7018 C 770.03555,1076.547 777.28749,1097.8008 796.49843,1106.6707 C 815.9173,1115.6365 845.81767,1116.882 870.61827,1103.5251 C 895.41887,1090.1681 928.01929,1033.1996 941.59253,1006.2164 C 955.21638,979.13246 980.3536,891.71903 986.25333,856.44781 C 992.15306,821.1766 988.80387,815.14704 981.63585,807.39232 C 984.27615,779.55217 980.13613,752.45689 994.74554,720.20614 C 964.49653,732.03184 957.36325,760.36684 946.42665,785.71122 C 938.42574,734.77829 946.63581,714.43803 949.74554,684.49186 C 920.68078,699.26977 906.88403,731.60588 904.74554,777.349 C 893.82159,776.0448 883.3541,772.91477 871.17411,776.63471 C 870.91007,730.61137 869.71055,699.7453 880.08474,662.42822 C 826.82927,683.45508 817.13746,769.02232 824.03125,775.20614 C 813.14843,775.74114 802.66017,773.90884 791.17411,778.06329 C 791.81303,735.49194 790.91365,693.15468 761.17411,655.20614 C 761.17411,655.20614 730.21605,736.12848 729.74554,758.77757 C 729.27503,781.42666 739.19713,798.94345 739.19713,798.94345 C 739.19713,798.94345 730.62906,835.68396 732.89854,857.17568 C 735.19439,878.91714 753.34144,916.85185 760.16396,935.83377 z"
+ id="path3638"
+ sodipodi:nodetypes="czzzzzzcccccccccczczz" />
+ </clipPath>
+ <linearGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient3660"
+ id="linearGradient3666"
+ x1="1255.7386"
+ y1="667.09216"
+ x2="893.69995"
+ y2="858.01099"
+ gradientUnits="userSpaceOnUse" />
+ <filter
+ inkscape:collect="always"
+ id="filter3779"
+ x="-0.087980822"
+ width="1.1759616"
+ y="-0.17728332"
+ height="1.3545666">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="16.340344"
+ id="feGaussianBlur3781" />
+ </filter>
+ <filter
+ id="filter3785"
+ inkscape:label="White Fur">
+ <feTurbulence
+ id="feTurbulence3787"
+ in="SourceAlpha"
+ type="fractalNoise"
+ baseFrequency="0.24044943820224721"
+ numOctaves="10"
+ seed="655"
+ result="result0" />
+ <feDisplacementMap
+ id="feDisplacementMap3789"
+ in="SourceGraphic"
+ in2="result0"
+ scale="62"
+ xChannelSelector="B"
+ yChannelSelector="G" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter3677">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="2.0397518"
+ id="feGaussianBlur3679" />
+ </filter>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath3722">
+ <path
+ style="opacity:1;fill:#121212;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 709.28572,844.50504 C 763.57143,843.07647 835.32072,829.45305 879.28572,817.71932 C 923.33843,805.96218 1005.172,781.37208 1054.6428,759.86218 C 1103.9821,738.40946 1168.2465,700.58058 1208.9286,667.71933 C 1249.4367,634.99864 1261.3185,611.89952 1269.6429,634.1479 C 1278.012,656.51569 1253.2359,690.47352 1231.7857,715.21933 C 1210.1816,740.14273 1179.0544,767.92466 1132.8571,804.50504 C 1086.6598,841.08542 976.77458,906.08967 920,933.07647 C 862.93394,960.20183 791.79666,991.31489 747.85714,1005.5765 C 703.91762,1019.8381 616.42857,1036.6479 616.42857,1036.6479 L 709.28572,844.50504 z"
+ id="path3724"
+ sodipodi:nodetypes="czzzzzzzzcc" />
+ </clipPath>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath3986">
+ <path
+ style="opacity:1;fill:#121212;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 709.28572,844.50504 C 763.57143,843.07647 835.32072,829.45305 879.28572,817.71932 C 923.33843,805.96218 1005.172,781.37208 1054.6428,759.86218 C 1103.9821,738.40946 1168.2465,700.58058 1208.9286,667.71933 C 1249.4367,634.99864 1261.3185,611.89952 1269.6429,634.1479 C 1278.012,656.51569 1253.2359,690.47352 1231.7857,715.21933 C 1210.1816,740.14273 1179.0544,767.92466 1132.8571,804.50504 C 1086.6598,841.08542 976.77458,906.08967 920,933.07647 C 862.93394,960.20183 791.79666,991.31489 747.85714,1005.5765 C 703.91762,1019.8381 616.42857,1036.6479 616.42857,1036.6479 L 709.28572,844.50504 z"
+ id="path3988"
+ sodipodi:nodetypes="czzzzzzzzcc" />
+ </clipPath>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath3992">
+ <path
+ style="opacity:1;fill:#121212;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 709.28572,844.50504 C 763.57143,843.07647 835.32072,829.45305 879.28572,817.71932 C 923.33843,805.96218 1005.172,781.37208 1054.6428,759.86218 C 1103.9821,738.40946 1168.2465,700.58058 1208.9286,667.71933 C 1249.4367,634.99864 1261.3185,611.89952 1269.6429,634.1479 C 1278.012,656.51569 1253.2359,690.47352 1231.7857,715.21933 C 1210.1816,740.14273 1179.0544,767.92466 1132.8571,804.50504 C 1086.6598,841.08542 976.77458,906.08967 920,933.07647 C 862.93394,960.20183 791.79666,991.31489 747.85714,1005.5765 C 703.91762,1019.8381 616.42857,1036.6479 616.42857,1036.6479 L 709.28572,844.50504 z"
+ id="path3994"
+ sodipodi:nodetypes="czzzzzzzzcc" />
+ </clipPath>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath3998">
+ <path
+ style="opacity:1;fill:#262f2f;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 178.21428,274.14789 C 174.40985,248.88366 161.40456,223.50987 161.05748,198.62266 C 160.87122,185.26714 164.33033,172.05175 174.81301,159.06861 C 211.16003,93.772775 291.75392,74.373925 360.74767,67.603183 C 447.67006,56.586382 545.66034,85.543255 594.11901,163.00447 C 648.24303,238.73777 650.79377,335.54359 674.73105,422.53242 C 704.16884,549.66002 729.51019,678.74656 735.12329,809.38277 C 732.05981,887.56462 726.69695,974.56692 674.62008,1037.5169 C 626.59354,1087.8743 551.83361,1087.5699 487.5502,1096.5192 C 396.99481,1101.1742 303.19867,1080.3734 225.7663,1032.321 C 160.99066,994.38099 130.03611,918.84237 128.4869,846.30142 C 120.09773,766.42626 154.87842,692.49291 180.1073,619.14181 C 187.57791,536.38074 189.52016,452.89406 189.76064,369.75697 C 188.92382,337.56153 182.67111,305.93964 178.21428,274.14789 z"
+ id="path4000"
+ sodipodi:nodetypes="cscccccccccccc" />
+ </clipPath>
+ <filter
+ inkscape:collect="always"
+ id="filter4002"
+ x="-0.24334238"
+ width="1.4866848"
+ y="-0.39104807"
+ height="1.7820961">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="14.589518"
+ id="feGaussianBlur4004" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter4010"
+ x="-0.14577261"
+ width="1.2915452"
+ y="-0.23523259"
+ height="1.4704652">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="4.4442907"
+ id="feGaussianBlur4012" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter4053">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="0.6062947"
+ id="feGaussianBlur4055" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter4079">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="6.5887624"
+ id="feGaussianBlur4081" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter4083">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="1.5052066"
+ id="feGaussianBlur4085" />
+ </filter>
+ <radialGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient4113"
+ id="radialGradient4119"
+ cx="296.33783"
+ cy="427.17749"
+ fx="296.33783"
+ fy="427.17749"
+ r="19.704132"
+ gradientUnits="userSpaceOnUse"
+ gradientTransform="matrix(2.9797125,0,0,2.9797125,-599.28727,-827.0855)" />
+ <filter
+ inkscape:collect="always"
+ id="filter6949"
+ x="-0.10294895"
+ width="1.2058979"
+ y="-0.34224695"
+ height="1.6844939">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="1.1675612"
+ id="feGaussianBlur6951" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter6953"
+ x="-0.098320946"
+ width="1.1966419"
+ y="-0.19750816"
+ height="1.3950163">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="1.1675612"
+ id="feGaussianBlur6955" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter6957"
+ x="-0.098213427"
+ width="1.1964267"
+ y="-0.19838208"
+ height="1.3967642">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="1.1675612"
+ id="feGaussianBlur6959" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter6961"
+ x="-0.09919104"
+ width="1.1983821"
+ y="-0.22643611"
+ height="1.4528722">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="1.1675612"
+ id="feGaussianBlur6963" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter6965"
+ x="-0.099081434"
+ width="1.1981629"
+ y="-0.22529824"
+ height="1.4505965">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="1.1675612"
+ id="feGaussianBlur6967" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter6969"
+ x="-0.10450897"
+ width="1.2090179"
+ y="-0.40468886"
+ height="1.8093777">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="1.1675612"
+ id="feGaussianBlur6971" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter6973"
+ x="-0.10330495"
+ width="1.2066098"
+ y="-0.36439717"
+ height="1.7287945">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="1.1675612"
+ id="feGaussianBlur6975" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter6977"
+ x="-0.10224481"
+ width="1.2044896"
+ y="-0.32371372"
+ height="1.6474274">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="1.1675612"
+ id="feGaussianBlur6979" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter6981"
+ x="-0.10052545"
+ width="1.2010509"
+ y="-0.2742162"
+ height="1.5484324">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="1.1675612"
+ id="feGaussianBlur6983" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter6985"
+ x="-0.098428868"
+ width="1.1968577"
+ y="-0.20853186"
+ height="1.4170637">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="1.1675612"
+ id="feGaussianBlur6987" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter6989"
+ x="-0.098428868"
+ width="1.1968577"
+ y="-0.20287035"
+ height="1.4057407">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="1.1675612"
+ id="feGaussianBlur6991" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter6993"
+ x="-0.098213255"
+ width="1.1964265"
+ y="-0.19838208"
+ height="1.3967642">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="1.1675612"
+ id="feGaussianBlur6995" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter6997">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="1.1675612"
+ id="feGaussianBlur6999" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter7001">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="1.1675612"
+ id="feGaussianBlur7003" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter7285"
+ x="-0.030884685"
+ width="1.0617694"
+ y="-0.10267408"
+ height="1.2053483">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="0.35026836"
+ id="feGaussianBlur7287" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter7289">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="0.35026836"
+ id="feGaussianBlur7291" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter7293">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="0.35026836"
+ id="feGaussianBlur7295" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter7297">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="0.35026836"
+ id="feGaussianBlur7299" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter7301">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="0.35026836"
+ id="feGaussianBlur7303" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter7305">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="0.35026836"
+ id="feGaussianBlur7307" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter7309">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="0.35026836"
+ id="feGaussianBlur7311" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter7313">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="0.35026836"
+ id="feGaussianBlur7315" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter7317">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="0.35026836"
+ id="feGaussianBlur7319" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter7321">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="0.35026836"
+ id="feGaussianBlur7323" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter7325"
+ x="-0.031352691"
+ width="1.0627054"
+ y="-0.12140666"
+ height="1.2428133">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="0.35026836"
+ id="feGaussianBlur7327" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter7329"
+ x="-0.030991485"
+ width="1.061983"
+ y="-0.10931916"
+ height="1.2186383">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="0.35026836"
+ id="feGaussianBlur7331" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter7333">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="0.35026836"
+ id="feGaussianBlur7335" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter7337">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="0.35026836"
+ id="feGaussianBlur7339" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter7345">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="1.7233839"
+ id="feGaussianBlur7347" />
+ </filter>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath7421">
+ <path
+ sodipodi:type="inkscape:offset"
+ inkscape:radius="0"
+ inkscape:original="M 1111.4062 -285.9375 L 1107.4688 -284.0625 C 1107.4283 -284.05228 1107.3692 -284.04201 1107.3438 -284.03125 C 1106.925 -283.8184 1107.1791 -283.93067 1106.6875 -283.71875 C 1106.2014 -283.50919 1104.9499 -283.13456 1102.5938 -282.25 C 1099.2626 -280.99942 1096.7895 -280.10016 1095.5938 -279.1875 C 1094.0576 -279.16623 1091.8733 -278.95419 1089.9375 -278.46875 C 1086.956 -277.72108 1085.0823 -277.29474 1083.1875 -276.875 C 1081.2927 -276.45527 1081.512 -276.23281 1080.3125 -276 C 1079.0159 -275.74833 1078.5911 -276.00899 1074.875 -275.21875 C 1071.3851 -274.4766 1065.9802 -273.28768 1064.7188 -272.53125 C 1063.1348 -272.71203 1060.8513 -272.85303 1058.875 -272.5625 C 1055.8346 -272.11554 1053.9588 -271.88974 1052.0312 -271.65625 C 1051.3758 -271.57687 1050.9902 -271.45547 1050.6875 -271.375 C 1050.2613 -271.24334 1050.0017 -271.11498 1049.3125 -271.03125 C 1048.0009 -270.87188 1047.5503 -271.18808 1043.7812 -270.75 C 1040.2273 -270.33691 1034.7758 -269.47718 1033.5312 -268.8125 C 1031.9322 -269.10979 1029.6735 -269.34669 1027.6875 -269.15625 C 1024.6287 -268.86293 1022.7155 -268.67226 1020.7812 -268.5 C 1018.847 -268.32773 1019.0926 -268.07763 1017.875 -267.96875 C 1016.5588 -267.85105 1016.1152 -268.13238 1012.3438 -267.71875 C 1008.8017 -267.3303 1003.3359 -266.50948 1002.0625 -265.84375 C 1000.4636 -266.13844 998.1753 -266.35076 996.1875 -266.15625 C 993.12921 -265.857 991.2463 -265.67601 989.3125 -265.5 C 988.65501 -265.44015 988.27245 -265.32144 987.96875 -265.25 C 987.54105 -265.13104 987.28525 -265.03193 986.59375 -264.96875 C 985.27775 -264.84849 984.834 -265.16363 981.0625 -264.75 C 977.50631 -264.35998 972.0569 -263.51084 970.8125 -262.84375 C 969.21381 -263.13793 966.95265 -263.36747 964.96875 -263.15625 C 961.91305 -262.83092 959.9947 -262.63001 958.0625 -262.4375 C 956.13031 -262.24499 956.37275 -261.99662 955.15625 -261.875 C 953.84137 -261.74353 953.3932 -262.03954 949.625 -261.59375 C 946.08611 -261.17509 940.6473 -260.30158 939.375 -259.625 C 937.77741 -259.90604 935.51505 -260.04543 933.53125 -259.8125 C 930.47927 -259.45413 928.58625 -259.24464 926.65625 -259.03125 C 926.00007 -258.95869 925.6156 -258.85856 925.3125 -258.78125 C 924.88571 -258.65402 924.6276 -258.51405 923.9375 -258.4375 C 922.62411 -258.29181 922.17015 -258.61152 918.40625 -258.125 C 914.85737 -257.66624 909.4276 -256.70598 908.1875 -256 C 906.59441 -256.24424 904.3537 -256.38135 902.375 -256.125 C 899.32741 -255.73018 897.4243 -255.47655 895.5 -255.21875 C 893.57571 -254.96096 893.7739 -254.72522 892.5625 -254.5625 C 891.25301 -254.3866 890.8153 -254.66688 887.0625 -254.09375 C 883.53821 -253.55551 878.1393 -252.39458 876.875 -251.65625 C 875.28751 -251.85979 873.0295 -251.91098 871.0625 -251.5625 C 868.03631 -251.02638 866.1636 -250.70081 864.25 -250.375 C 863.59941 -250.26423 863.2363 -250.10406 862.9375 -250 C 862.51681 -249.83512 862.27405 -249.6687 861.59375 -249.53125 C 860.29905 -249.26966 859.86665 -249.53745 856.15625 -248.71875 C 852.65777 -247.9468 847.31035 -246.33582 846.09375 -245.5 C 844.53085 -245.57745 842.33625 -245.41472 840.40625 -244.90625 C 837.43387 -244.12312 835.58855 -243.67416 833.71875 -243.15625 C 831.84875 -242.63835 832.0521 -242.38897 830.875 -242.0625 C 829.60251 -241.7096 829.17795 -241.95541 825.53125 -240.875 C 822.10657 -239.86037 816.88185 -237.94183 815.65625 -237.03125 C 814.11747 -237.01851 811.93645 -236.75903 810.03125 -236.15625 C 807.10027 -235.22891 805.2809 -234.69783 803.4375 -234.09375 C 802.81071 -233.88837 802.44585 -233.70117 802.15625 -233.5625 C 801.74867 -233.34889 801.50295 -233.15375 800.84375 -232.9375 C 799.58925 -232.52596 799.1576 -232.74846 795.5625 -231.5 C 792.17261 -230.32283 786.96755 -228.2863 785.78125 -227.34375 C 784.25737 -227.28408 782.1312 -226.94888 780.25 -226.28125 C 777.35261 -225.25296 775.55095 -224.60577 773.71875 -223.96875 C 771.88655 -223.33174 772.0909 -223.12021 770.9375 -222.71875 C 769.69071 -222.28479 769.27395 -222.51903 765.71875 -221.15625 C 762.38005 -219.87645 757.23165 -217.6737 756.03125 -216.6875 C 754.52407 -216.57981 752.39555 -216.1887 750.53125 -215.46875 C 747.66307 -214.36115 745.90735 -213.68719 744.09375 -213 C 743.47705 -212.76637 743.0973 -212.55797 742.8125 -212.40625 C 742.81251 -212.40625 742.8125 -212.37673 742.8125 -212.375 L 734.8125 -209.1875 L 736.625 -194.46875 C 736.36701 -194.52956 742.8125 -191.15625 742.8125 -191.15625 C 743.03891 -191.30093 743.26145 -191.42886 743.53125 -191.53125 C 744.61177 -191.94123 745.70285 -191.74702 749.53125 -193.21875 C 753.35977 -194.69049 754.7553 -195.22373 755.4375 -195.625 C 756.11711 -196.02478 757.04925 -196.50437 757.65625 -197.15625 C 759.48317 -197.294 761.22705 -197.64948 762.59375 -198.15625 C 765.56175 -199.25677 767.4691 -199.96244 769.375 -200.625 C 771.28081 -201.28754 771.72915 -202.03987 772.78125 -202.40625 C 773.87287 -202.78636 774.97635 -202.57163 778.84375 -203.9375 C 782.71115 -205.30336 784.1269 -205.76458 784.8125 -206.15625 C 785.51361 -206.55677 786.5133 -207.08923 787.125 -207.75 C 789.09581 -207.80466 790.94195 -208.13463 792.40625 -208.625 C 795.40777 -209.63008 797.3324 -210.24671 799.25 -210.875 C 800.78861 -211.3791 801.42415 -211.92177 802.15625 -212.3125 C 802.38647 -212.44681 802.63215 -212.56623 802.90625 -212.65625 C 804.00457 -213.01673 805.0877 -212.73762 809 -213.96875 C 812.91231 -215.19988 814.366 -215.6417 815.0625 -216 C 815.75641 -216.35697 816.6926 -216.79261 817.3125 -217.40625 C 819.17771 -217.42891 820.94835 -217.67308 822.34375 -218.09375 C 825.37415 -219.00729 827.33615 -219.52385 829.28125 -220.0625 C 831.22637 -220.60114 831.70745 -221.32702 832.78125 -221.625 C 833.89527 -221.93415 835.00125 -221.61761 838.96875 -222.65625 C 842.93625 -223.69488 844.38625 -224.08898 845.09375 -224.40625 C 845.82855 -224.73584 846.90765 -225.15997 847.53125 -225.78125 C 849.52907 -225.66525 851.3887 -225.80134 852.875 -226.15625 C 855.95311 -226.89125 857.9584 -227.25719 859.9375 -227.65625 C 861.52541 -227.97643 862.1818 -228.4468 862.9375 -228.75 C 863.17501 -228.8568 863.4044 -228.94276 863.6875 -229 C 864.82091 -229.22919 865.99215 -228.79107 870.03125 -229.5 C 874.07067 -230.20893 875.5315 -230.42709 876.25 -230.6875 C 876.96581 -230.94694 877.95435 -231.25474 878.59375 -231.78125 C 880.51795 -231.54176 882.34165 -231.55672 883.78125 -231.78125 C 886.90767 -232.26887 888.9358 -232.48192 890.9375 -232.75 C 892.93921 -233.01807 893.42625 -233.69514 894.53125 -233.84375 C 895.67767 -233.99793 896.8071 -233.54218 900.875 -234.0625 C 904.94281 -234.58282 906.43525 -234.75823 907.15625 -235 C 907.89337 -235.24714 908.95435 -235.58623 909.59375 -236.125 C 911.64375 -235.78947 913.56745 -235.72704 915.09375 -235.90625 C 918.23595 -236.27521 920.27375 -236.46561 922.28125 -236.6875 C 923.89207 -236.86552 924.5459 -237.2957 925.3125 -237.53125 C 925.55341 -237.61677 925.80655 -237.68685 926.09375 -237.71875 C 927.24345 -237.84647 928.39505 -237.3721 932.46875 -237.84375 C 936.54245 -238.3154 938.0278 -238.45435 938.75 -238.6875 C 939.46941 -238.91977 940.45025 -239.16096 941.09375 -239.65625 C 943.03005 -239.32279 944.8638 -239.25201 946.3125 -239.40625 C 949.45851 -239.7412 951.49 -239.92484 953.5 -240.125 C 955.50991 -240.32514 955.98415 -240.95139 957.09375 -241.0625 C 958.24485 -241.17778 959.39025 -240.69744 963.46875 -241.125 C 967.54725 -241.55256 969.05765 -241.68709 969.78125 -241.90625 C 970.52047 -242.13011 971.57685 -242.4195 972.21875 -242.9375 C 974.27575 -242.53883 976.2206 -242.4441 977.75 -242.59375 C 980.89871 -242.90185 982.9258 -243.067 984.9375 -243.25 C 986.55151 -243.39682 987.20055 -243.81055 987.96875 -244.03125 C 988.21005 -244.11211 988.4623 -244.16116 988.75 -244.1875 C 989.90211 -244.29295 991.0429 -243.79475 995.125 -244.1875 C 999.20711 -244.58025 1000.7139 -244.71834 1001.4375 -244.9375 C 1002.1584 -245.15583 1003.1371 -245.3852 1003.7812 -245.875 C 1005.7193 -245.52501 1007.5501 -245.42062 1009 -245.5625 C 1012.1487 -245.8706 1014.1758 -246.03575 1016.1875 -246.21875 C 1018.1991 -246.40174 1018.7017 -247.05677 1019.8125 -247.15625 C 1020.9648 -247.25948 1022.1047 -246.77142 1026.1875 -247.15625 C 1030.2704 -247.54107 1031.7762 -247.65725 1032.5 -247.875 C 1033.2393 -248.09743 1034.2956 -248.38949 1034.9375 -248.90625 C 1036.9949 -248.50448 1038.9404 -248.40292 1040.4688 -248.5625 C 1043.6153 -248.89102 1045.6458 -249.0852 1047.6562 -249.28125 C 1049.2692 -249.43854 1049.9219 -249.91273 1050.6875 -250.15625 C 1050.9282 -250.24429 1051.1507 -250.27762 1051.4375 -250.3125 C 1052.5858 -250.4522 1053.7542 -249.97259 1057.8125 -250.5625 C 1061.8708 -251.15242 1063.3743 -251.33964 1064.0938 -251.59375 C 1064.8104 -251.84691 1065.7684 -252.15182 1066.4062 -252.6875 C 1068.3259 -252.47556 1070.1262 -252.53609 1071.5625 -252.78125 C 1074.6816 -253.31365 1076.6741 -253.70986 1078.6562 -254.09375 C 1080.6383 -254.47762 1081.1305 -255.1334 1082.2188 -255.375 C 1083.3475 -255.62566 1084.489 -255.25871 1088.4688 -256.25 C 1092.4483 -257.24127 1093.8983 -257.6693 1094.5938 -258.03125 C 1095.316 -258.40725 1096.3555 -258.90183 1096.9688 -259.5625 C 1098.9317 -259.57454 1100.7625 -259.85355 1102.1875 -260.40625 C 1105.1387 -261.55085 1107.0607 -262.27567 1108.875 -263.15625 C 1110.3307 -263.86277 1111.1941 -264.85828 1111.4062 -265.15625 C 1111.6185 -265.4542 1111.5051 -265.8848 1111.5312 -265.90625 C 1111.5742 -265.94148 1111.8716 -266.00028 1112.0312 -266.34375 C 1112.8902 -268.19082 1114.3544 -271.97139 1114.4688 -272.65625 C 1114.5825 -273.33839 1114.6368 -274.00902 1114.6875 -274.40625 C 1114.7169 -274.63575 1114.5404 -275.28515 1114.5625 -275.34375 C 1114.5934 -275.42579 1114.8508 -275.59432 1114.9062 -275.84375 C 1115.1725 -277.04206 1114.9953 -278.05111 1114.7812 -279.46875 C 1114.5673 -280.88638 1113.8096 -284.08338 1113.1562 -284.9375 C 1112.4973 -285.79922 1111.9314 -285.94801 1111.4062 -285.9375 z "
+ style="fill:#bcb786;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ id="path7423"
+ d="M 1111.4062,-285.9375 L 1107.4688,-284.0625 C 1107.4283,-284.05228 1107.3692,-284.04201 1107.3438,-284.03125 C 1106.925,-283.8184 1107.1791,-283.93067 1106.6875,-283.71875 C 1106.2014,-283.50919 1104.9499,-283.13456 1102.5938,-282.25 C 1099.2626,-280.99942 1096.7895,-280.10016 1095.5938,-279.1875 C 1094.0576,-279.16623 1091.8733,-278.95419 1089.9375,-278.46875 C 1086.956,-277.72108 1085.0823,-277.29474 1083.1875,-276.875 C 1081.2927,-276.45527 1081.512,-276.23281 1080.3125,-276 C 1079.0159,-275.74833 1078.5911,-276.00899 1074.875,-275.21875 C 1071.3851,-274.4766 1065.9802,-273.28768 1064.7188,-272.53125 C 1063.1348,-272.71203 1060.8513,-272.85303 1058.875,-272.5625 C 1055.8346,-272.11554 1053.9588,-271.88974 1052.0312,-271.65625 C 1051.3758,-271.57687 1050.9902,-271.45547 1050.6875,-271.375 C 1050.2613,-271.24334 1050.0017,-271.11498 1049.3125,-271.03125 C 1048.0009,-270.87188 1047.5503,-271.18808 1043.7812,-270.75 C 1040.2273,-270.33691 1034.7758,-269.47718 1033.5312,-268.8125 C 1031.9322,-269.10979 1029.6735,-269.34669 1027.6875,-269.15625 C 1024.6287,-268.86293 1022.7155,-268.67226 1020.7812,-268.5 C 1018.847,-268.32773 1019.0926,-268.07763 1017.875,-267.96875 C 1016.5588,-267.85105 1016.1152,-268.13238 1012.3438,-267.71875 C 1008.8017,-267.3303 1003.3359,-266.50948 1002.0625,-265.84375 C 1000.4636,-266.13844 998.1753,-266.35076 996.1875,-266.15625 C 993.12921,-265.857 991.2463,-265.67601 989.3125,-265.5 C 988.65501,-265.44015 988.27245,-265.32144 987.96875,-265.25 C 987.54105,-265.13104 987.28525,-265.03193 986.59375,-264.96875 C 985.27775,-264.84849 984.834,-265.16363 981.0625,-264.75 C 977.50631,-264.35998 972.0569,-263.51084 970.8125,-262.84375 C 969.21381,-263.13793 966.95265,-263.36747 964.96875,-263.15625 C 961.91305,-262.83092 959.9947,-262.63001 958.0625,-262.4375 C 956.13031,-262.24499 956.37275,-261.99662 955.15625,-261.875 C 953.84137,-261.74353 953.3932,-262.03954 949.625,-261.59375 C 946.08611,-261.17509 940.6473,-260.30158 939.375,-259.625 C 937.77741,-259.90604 935.51505,-260.04543 933.53125,-259.8125 C 930.47927,-259.45413 928.58625,-259.24464 926.65625,-259.03125 C 926.00007,-258.95869 925.6156,-258.85856 925.3125,-258.78125 C 924.88571,-258.65402 924.6276,-258.51405 923.9375,-258.4375 C 922.62411,-258.29181 922.17015,-258.61152 918.40625,-258.125 C 914.85737,-257.66624 909.4276,-256.70598 908.1875,-256 C 906.59441,-256.24424 904.3537,-256.38135 902.375,-256.125 C 899.32741,-255.73018 897.4243,-255.47655 895.5,-255.21875 C 893.57571,-254.96096 893.7739,-254.72522 892.5625,-254.5625 C 891.25301,-254.3866 890.8153,-254.66688 887.0625,-254.09375 C 883.53821,-253.55551 878.1393,-252.39458 876.875,-251.65625 C 875.28751,-251.85979 873.0295,-251.91098 871.0625,-251.5625 C 868.03631,-251.02638 866.1636,-250.70081 864.25,-250.375 C 863.59941,-250.26423 863.2363,-250.10406 862.9375,-250 C 862.51681,-249.83512 862.27405,-249.6687 861.59375,-249.53125 C 860.29905,-249.26966 859.86665,-249.53745 856.15625,-248.71875 C 852.65777,-247.9468 847.31035,-246.33582 846.09375,-245.5 C 844.53085,-245.57745 842.33625,-245.41472 840.40625,-244.90625 C 837.43387,-244.12312 835.58855,-243.67416 833.71875,-243.15625 C 831.84875,-242.63835 832.0521,-242.38897 830.875,-242.0625 C 829.60251,-241.7096 829.17795,-241.95541 825.53125,-240.875 C 822.10657,-239.86037 816.88185,-237.94183 815.65625,-237.03125 C 814.11747,-237.01851 811.93645,-236.75903 810.03125,-236.15625 C 807.10027,-235.22891 805.2809,-234.69783 803.4375,-234.09375 C 802.81071,-233.88837 802.44585,-233.70117 802.15625,-233.5625 C 801.74867,-233.34889 801.50295,-233.15375 800.84375,-232.9375 C 799.58925,-232.52596 799.1576,-232.74846 795.5625,-231.5 C 792.17261,-230.32283 786.96755,-228.2863 785.78125,-227.34375 C 784.25737,-227.28408 782.1312,-226.94888 780.25,-226.28125 C 777.35261,-225.25296 775.55095,-224.60577 773.71875,-223.96875 C 771.88655,-223.33174 772.0909,-223.12021 770.9375,-222.71875 C 769.69071,-222.28479 769.27395,-222.51903 765.71875,-221.15625 C 762.38005,-219.87645 757.23165,-217.6737 756.03125,-216.6875 C 754.52407,-216.57981 752.39555,-216.1887 750.53125,-215.46875 C 747.66307,-214.36115 745.90735,-213.68719 744.09375,-213 C 743.47705,-212.76637 743.0973,-212.55797 742.8125,-212.40625 C 742.81251,-212.40625 742.8125,-212.37673 742.8125,-212.375 L 734.8125,-209.1875 L 736.625,-194.46875 C 736.36701,-194.52956 742.8125,-191.15625 742.8125,-191.15625 C 743.03891,-191.30093 743.26145,-191.42886 743.53125,-191.53125 C 744.61177,-191.94123 745.70285,-191.74702 749.53125,-193.21875 C 753.35977,-194.69049 754.7553,-195.22373 755.4375,-195.625 C 756.11711,-196.02478 757.04925,-196.50437 757.65625,-197.15625 C 759.48317,-197.294 761.22705,-197.64948 762.59375,-198.15625 C 765.56175,-199.25677 767.4691,-199.96244 769.375,-200.625 C 771.28081,-201.28754 771.72915,-202.03987 772.78125,-202.40625 C 773.87287,-202.78636 774.97635,-202.57163 778.84375,-203.9375 C 782.71115,-205.30336 784.1269,-205.76458 784.8125,-206.15625 C 785.51361,-206.55677 786.5133,-207.08923 787.125,-207.75 C 789.09581,-207.80466 790.94195,-208.13463 792.40625,-208.625 C 795.40777,-209.63008 797.3324,-210.24671 799.25,-210.875 C 800.78861,-211.3791 801.42415,-211.92177 802.15625,-212.3125 C 802.38647,-212.44681 802.63215,-212.56623 802.90625,-212.65625 C 804.00457,-213.01673 805.0877,-212.73762 809,-213.96875 C 812.91231,-215.19988 814.366,-215.6417 815.0625,-216 C 815.75641,-216.35697 816.6926,-216.79261 817.3125,-217.40625 C 819.17771,-217.42891 820.94835,-217.67308 822.34375,-218.09375 C 825.37415,-219.00729 827.33615,-219.52385 829.28125,-220.0625 C 831.22637,-220.60114 831.70745,-221.32702 832.78125,-221.625 C 833.89527,-221.93415 835.00125,-221.61761 838.96875,-222.65625 C 842.93625,-223.69488 844.38625,-224.08898 845.09375,-224.40625 C 845.82855,-224.73584 846.90765,-225.15997 847.53125,-225.78125 C 849.52907,-225.66525 851.3887,-225.80134 852.875,-226.15625 C 855.95311,-226.89125 857.9584,-227.25719 859.9375,-227.65625 C 861.52541,-227.97643 862.1818,-228.4468 862.9375,-228.75 C 863.17501,-228.8568 863.4044,-228.94276 863.6875,-229 C 864.82091,-229.22919 865.99215,-228.79107 870.03125,-229.5 C 874.07067,-230.20893 875.5315,-230.42709 876.25,-230.6875 C 876.96581,-230.94694 877.95435,-231.25474 878.59375,-231.78125 C 880.51795,-231.54176 882.34165,-231.55672 883.78125,-231.78125 C 886.90767,-232.26887 888.9358,-232.48192 890.9375,-232.75 C 892.93921,-233.01807 893.42625,-233.69514 894.53125,-233.84375 C 895.67767,-233.99793 896.8071,-233.54218 900.875,-234.0625 C 904.94281,-234.58282 906.43525,-234.75823 907.15625,-235 C 907.89337,-235.24714 908.95435,-235.58623 909.59375,-236.125 C 911.64375,-235.78947 913.56745,-235.72704 915.09375,-235.90625 C 918.23595,-236.27521 920.27375,-236.46561 922.28125,-236.6875 C 923.89207,-236.86552 924.5459,-237.2957 925.3125,-237.53125 C 925.55341,-237.61677 925.80655,-237.68685 926.09375,-237.71875 C 927.24345,-237.84647 928.39505,-237.3721 932.46875,-237.84375 C 936.54245,-238.3154 938.0278,-238.45435 938.75,-238.6875 C 939.46941,-238.91977 940.45025,-239.16096 941.09375,-239.65625 C 943.03005,-239.32279 944.8638,-239.25201 946.3125,-239.40625 C 949.45851,-239.7412 951.49,-239.92484 953.5,-240.125 C 955.50991,-240.32514 955.98415,-240.95139 957.09375,-241.0625 C 958.24485,-241.17778 959.39025,-240.69744 963.46875,-241.125 C 967.54725,-241.55256 969.05765,-241.68709 969.78125,-241.90625 C 970.52047,-242.13011 971.57685,-242.4195 972.21875,-242.9375 C 974.27575,-242.53883 976.2206,-242.4441 977.75,-242.59375 C 980.89871,-242.90185 982.9258,-243.067 984.9375,-243.25 C 986.55151,-243.39682 987.20055,-243.81055 987.96875,-244.03125 C 988.21005,-244.11211 988.4623,-244.16116 988.75,-244.1875 C 989.90211,-244.29295 991.0429,-243.79475 995.125,-244.1875 C 999.20711,-244.58025 1000.7139,-244.71834 1001.4375,-244.9375 C 1002.1584,-245.15583 1003.1371,-245.3852 1003.7812,-245.875 C 1005.7193,-245.52501 1007.5501,-245.42062 1009,-245.5625 C 1012.1487,-245.8706 1014.1758,-246.03575 1016.1875,-246.21875 C 1018.1991,-246.40174 1018.7017,-247.05677 1019.8125,-247.15625 C 1020.9648,-247.25948 1022.1047,-246.77142 1026.1875,-247.15625 C 1030.2704,-247.54107 1031.7762,-247.65725 1032.5,-247.875 C 1033.2393,-248.09743 1034.2956,-248.38949 1034.9375,-248.90625 C 1036.9949,-248.50448 1038.9404,-248.40292 1040.4688,-248.5625 C 1043.6153,-248.89102 1045.6458,-249.0852 1047.6562,-249.28125 C 1049.2692,-249.43854 1049.9219,-249.91273 1050.6875,-250.15625 C 1050.9282,-250.24429 1051.1507,-250.27762 1051.4375,-250.3125 C 1052.5858,-250.4522 1053.7542,-249.97259 1057.8125,-250.5625 C 1061.8708,-251.15242 1063.3743,-251.33964 1064.0938,-251.59375 C 1064.8104,-251.84691 1065.7684,-252.15182 1066.4062,-252.6875 C 1068.3259,-252.47556 1070.1262,-252.53609 1071.5625,-252.78125 C 1074.6816,-253.31365 1076.6741,-253.70986 1078.6562,-254.09375 C 1080.6383,-254.47762 1081.1305,-255.1334 1082.2188,-255.375 C 1083.3475,-255.62566 1084.489,-255.25871 1088.4688,-256.25 C 1092.4483,-257.24127 1093.8983,-257.6693 1094.5938,-258.03125 C 1095.316,-258.40725 1096.3555,-258.90183 1096.9688,-259.5625 C 1098.9317,-259.57454 1100.7625,-259.85355 1102.1875,-260.40625 C 1105.1387,-261.55085 1107.0607,-262.27567 1108.875,-263.15625 C 1110.3307,-263.86277 1111.1941,-264.85828 1111.4062,-265.15625 C 1111.6185,-265.4542 1111.5051,-265.8848 1111.5312,-265.90625 C 1111.5742,-265.94148 1111.8716,-266.00028 1112.0312,-266.34375 C 1112.8902,-268.19082 1114.3544,-271.97139 1114.4688,-272.65625 C 1114.5825,-273.33839 1114.6368,-274.00902 1114.6875,-274.40625 C 1114.7169,-274.63575 1114.5404,-275.28515 1114.5625,-275.34375 C 1114.5934,-275.42579 1114.8508,-275.59432 1114.9062,-275.84375 C 1115.1725,-277.04206 1114.9953,-278.05111 1114.7812,-279.46875 C 1114.5673,-280.88638 1113.8096,-284.08338 1113.1562,-284.9375 C 1112.4973,-285.79922 1111.9314,-285.94801 1111.4062,-285.9375 z"
+ transform="translate(8.0045714e-2,-3.125e-2)" />
+ </clipPath>
+ <filter
+ inkscape:collect="always"
+ id="filter7578"
+ x="-0.08160872"
+ width="1.1632174"
+ y="-0.22659944"
+ height="1.4531989">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="2.437399"
+ id="feGaussianBlur7580" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter7594"
+ x="-0.040804356"
+ width="1.0816087"
+ y="-0.11329972"
+ height="1.2265995">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="1.2186995"
+ id="feGaussianBlur7596" />
+ </filter>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath7606">
+ <path
+ id="path7608"
+ d="M 1049.205,-282.26672 L 1049.1152,-282.25891 C 1047.7278,-281.37446 1042.5119,-280.65171 1042.4862,-272.73547 C 1042.462,-265.31022 1057.4991,-255.64401 1059.6425,-254.64172 C 1061.3727,-253.83263 1063.2341,-253.23296 1065.0488,-252.92297 L 1066.4862,-252.70422 C 1068.4059,-252.49228 1070.2062,-252.55281 1071.6425,-252.79797 C 1074.7616,-253.33037 1076.7541,-253.72658 1078.7362,-254.11047 C 1080.7183,-254.49434 1081.2105,-255.15012 1082.2988,-255.39172 C 1083.4275,-255.64238 1084.569,-255.27543 1088.5488,-256.26672 C 1092.5283,-257.258 1093.9782,-257.68602 1094.6738,-258.04797 C 1095.396,-258.42398 1096.4355,-258.91855 1097.0488,-259.57922 C 1099.0117,-259.59127 1100.8425,-259.87027 1102.2675,-260.42297 C 1105.2187,-261.56758 1107.1407,-262.29239 1108.955,-263.17297 C 1110.4107,-263.8795 1111.2741,-264.875 1111.4862,-265.17297 C 1111.6985,-265.47093 1111.5852,-265.90152 1111.6112,-265.92297 C 1111.6542,-265.95821 1111.9517,-266.017 1112.1112,-266.36047 C 1112.9702,-268.20755 1114.4344,-271.98811 1114.5488,-272.67297 C 1114.6625,-273.35512 1114.7168,-274.02574 1114.7675,-274.42297 C 1114.7969,-274.65248 1114.6204,-275.30187 1114.6425,-275.36047 C 1114.6734,-275.44252 1114.9308,-275.61104 1114.9862,-275.86047 C 1115.2525,-277.05879 1115.0754,-278.06783 1114.8612,-279.48547 C 1114.6473,-280.90311 1113.8896,-284.1001 1113.2362,-284.95422 C 1112.8168,-285.50279 1112.4369,-285.74672 1112.08,-285.86047 C 1112.0129,-285.87776 1111.9561,-285.90721 1111.8925,-285.92297 C 1111.8715,-285.92695 1111.8508,-285.91983 1111.83,-285.92297 C 1111.5184,-285.99847 1111.2215,-286.08164 1110.6738,-286.14172 C 1109.6883,-286.24984 1108.2491,-286.40112 1106.705,-286.39172 C 1106.1903,-286.38859 1105.6679,-286.34408 1105.1425,-286.29797 C 1101.5836,-285.98569 1096.1327,-285.30689 1094.9238,-284.67297 C 1093.2907,-285.00699 1090.9756,-285.2852 1088.9862,-285.14172 C 1085.9222,-284.92075 1084.0185,-284.79953 1082.08,-284.67297 C 1080.1416,-284.54642 1080.3939,-284.28433 1079.1738,-284.20422 C 1077.8547,-284.11762 1077.3869,-284.42747 1073.6112,-284.11047 C 1070.0655,-283.81275 1064.6306,-283.1173 1063.3925,-282.48547 C 1061.7591,-282.81998 1059.4466,-283.09786 1057.455,-282.95422 C 1054.3908,-282.73324 1052.4872,-282.58078 1050.5488,-282.45422 C 1049.8896,-282.41119 1049.5064,-282.33029 1049.205,-282.26672 z"
+ style="opacity:0.82448976;fill:#bcb786;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ </clipPath>
+ <filter
+ inkscape:collect="always"
+ id="filter7610"
+ x="-0.021942979"
+ width="1.0438859"
+ y="-0.10017137"
+ height="1.2003427">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="0.57530213"
+ id="feGaussianBlur7612" />
+ </filter>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath7616">
+ <path
+ id="path7618"
+ d="M 205.47016,-408.97318 L 205.38003,-408.97164 C 203.9344,-408.18598 198.68082,-407.82829 198.10378,-399.93307 C 197.56244,-392.52754 211.88973,-381.83741 213.95811,-380.68826 C 215.62775,-379.76062 217.44286,-379.03275 219.23156,-378.59711 L 220.65023,-378.27877 C 222.5505,-377.93363 224.35065,-377.86862 225.80054,-378.01314 C 228.94914,-378.32698 230.9644,-378.58345 232.96843,-378.82834 C 234.97245,-379.07322 235.50913,-379.69312 236.61162,-379.85833 C 237.75504,-380.02976 238.86821,-379.58419 242.90739,-380.29586 C 246.94627,-381.00755 248.42246,-381.33354 249.14158,-381.64616 C 249.88822,-381.97095 250.95964,-382.39191 251.61747,-383.00826 C 253.57644,-382.88355 255.42223,-383.03435 256.88227,-383.48645 C 259.90603,-384.42272 261.87384,-385.01189 263.74507,-385.76396 C 265.24645,-386.36738 266.17709,-387.30032 266.40943,-387.58279 C 266.64197,-387.86524 266.55894,-388.30268 266.58637,-388.32227 C 266.63172,-388.35443 266.93259,-388.39235 267.11563,-388.72388 C 268.1012,-390.50664 269.82518,-394.17603 269.987,-394.85126 C 270.14794,-395.52383 270.24882,-396.18904 270.32707,-396.58177 C 270.37238,-396.80868 270.24154,-397.46878 270.26767,-397.5257 C 270.30421,-397.6054 270.57272,-397.75558 270.64536,-398.00055 C 270.99449,-399.17741 270.8881,-400.19633 270.77316,-401.62545 C 270.65853,-403.05454 270.12535,-406.29655 269.53303,-407.1941 C 269.15286,-407.77056 268.79088,-408.04035 268.44277,-408.17869 C 268.37703,-408.20061 268.32242,-408.23394 268.26007,-408.2541 C 268.2394,-408.25953 268.21826,-408.25387 268.19773,-408.25845 C 267.89214,-408.35547 267.60176,-408.45912 267.05957,-408.5572 C 266.084,-408.7337 264.65883,-408.98486 263.11782,-409.08304 C 262.60416,-409.11577 262.07992,-409.10775 261.55259,-409.09835 C 257.98058,-409.03472 252.49564,-408.73725 251.24552,-408.18907 C 249.63965,-408.63604 247.34955,-409.07483 245.35499,-409.07027 C 242.28304,-409.06325 240.37552,-409.07493 238.43292,-409.0837 C 236.49041,-409.09248 236.72384,-408.81345 235.50112,-408.81852 C 234.1792,-408.82401 233.73411,-409.16569 229.9455,-409.11245 C 226.38768,-409.06243 220.91754,-408.74723 219.63844,-408.20318 C 218.0323,-408.65065 215.74477,-409.08893 213.74801,-409.08436 C 210.67586,-409.07735 208.76626,-409.05786 206.82375,-409.06662 C 206.16316,-409.06961 205.77525,-409.0156 205.47016,-408.97318 z"
+ style="opacity:0.82448976;fill:#bcb786;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ </clipPath>
+ <linearGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient7622"
+ id="linearGradient7708"
+ gradientUnits="userSpaceOnUse"
+ gradientTransform="translate(-19.091883,4.2426407)"
+ x1="774.97668"
+ y1="-211.87105"
+ x2="755.11584"
+ y2="-202.67865" />
+ <mask
+ maskUnits="userSpaceOnUse"
+ id="mask7704">
+ <path
+ style="fill:url(#linearGradient7708);fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+ d="M 718.40812,-224.31217 L 751.65812,-168.31217 L 1027.6581,-192.31217 L 1187.1581,-240.56217 L 1120.6581,-323.31217 L 718.40812,-224.31217 z"
+ id="path7706" />
+ </mask>
+ <radialGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient8430"
+ id="radialGradient7904"
+ gradientUnits="userSpaceOnUse"
+ gradientTransform="matrix(-0.3324832,0.9022288,-0.9582407,-0.3531242,305.29227,19.909497)"
+ cx="142.95833"
+ cy="107.09234"
+ fx="142.95833"
+ fy="107.09234"
+ r="66.981766" />
+ <radialGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient3317"
+ id="radialGradient7906"
+ gradientUnits="userSpaceOnUse"
+ gradientTransform="matrix(1.0036478,-1.0345492e-7,1.7124628e-7,1.6613125,-160.53487,-96.205369)"
+ cx="317.78754"
+ cy="129.65378"
+ fx="317.78754"
+ fy="129.65378"
+ r="47.863216" />
+ <radialGradient
+ inkscape:collect="always"
+ xlink:href="#linearGradient8398"
+ id="radialGradient7908"
+ gradientUnits="userSpaceOnUse"
+ gradientTransform="matrix(2.0747661,-0.1577957,0.2382425,3.1325183,-550.77432,-65.728909)"
+ cx="325.30847"
+ cy="80.909554"
+ fx="325.30847"
+ fy="80.909554"
+ r="26.937988" />
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath8209">
+ <path
+ sodipodi:nodetypes="czcc"
+ id="path8211"
+ d="M 734.03125,519.49186 C 734.03125,519.49186 750.78638,556.50992 762.73266,573.44581 C 774.67895,590.3817 815.45982,629.49186 815.45982,629.49186 L 816.05699,490.90211"
+ style="opacity:1;fill:#1a1a1a;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate" />
+ </clipPath>
+ <filter
+ inkscape:collect="always"
+ id="filter8225">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="10.661912"
+ id="feGaussianBlur8227" />
+ </filter>
+ <filter
+ inkscape:collect="always"
+ id="filter8333">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="7.18"
+ id="feGaussianBlur8335" />
+ </filter>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath8338">
+ <path
+ sodipodi:nodetypes="czzzzzzcccccccccczczz"
+ id="path8340"
+ d="M 266.27183,924.57185 C 264.86456,943.37307 265.12693,957.32289 268.35357,973.87513 C 271.58023,990.42751 284.75966,1019.7825 288.68798,1037.0589 C 292.61419,1054.326 291.38211,1075.3686 276.22854,1088.2071 C 260.91093,1101.1846 234.17727,1109.8061 208.39624,1103.9409 C 182.61518,1098.0756 138.84716,1054.7175 119.80605,1033.7126 C 100.6939,1012.6293 56.045182,939.86193 41.867507,909.4368 C 27.689835,879.01168 29.207902,872.71823 33.747792,863.90708 C 24.38107,839.38658 21.33408,813.84026 0.035334479,788.33044 C 30.360814,791.44487 43.915624,815.28676 60.161024,835.47019 C 54.631128,787.39416 42.106309,771.05368 31.787072,744.74589 C 61.781367,750.82754 82.366432,776.61828 95.766855,817.45839 C 105.32101,813.54047 114.00462,808.08545 125.95427,808.39719 C 114.65677,766.70139 108.0048,738.48134 89.267014,707.32725 C 142.70898,712.99757 172.92404,787.96657 168.23844,795.28805 C 178.21641,793.04406 187.24409,788.75767 198.67497,789.63638 C 187.426,751.28935 177.62715,712.76848 195.01526,670.98819 C 195.01526,670.98819 243.30204,736.42507 249.40491,756.79397 C 255.50779,777.16287 250.92373,795.49448 250.92373,795.49448 C 250.92373,795.49448 267.8833,826.57978 271.21765,846.58862 C 274.59075,866.82996 267.68496,905.69193 266.27183,924.57185 z"
+ style="opacity:1;fill:#ada469;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ </clipPath>
+ <filter
+ inkscape:collect="always"
+ id="filter8354">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="6.82"
+ id="feGaussianBlur8356" />
+ </filter>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath8359">
+ <path
+ sodipodi:nodetypes="czzzzzzcccccccccczczz"
+ id="path8361"
+ d="M 266.27183,924.57185 C 264.86456,943.37307 265.12693,957.32289 268.35357,973.87513 C 271.58023,990.42751 284.75966,1019.7825 288.68798,1037.0589 C 292.61419,1054.326 291.38211,1075.3686 276.22854,1088.2071 C 260.91093,1101.1846 234.17727,1109.8061 208.39624,1103.9409 C 182.61518,1098.0756 138.84716,1054.7175 119.80605,1033.7126 C 100.6939,1012.6293 56.045182,939.86193 41.867507,909.4368 C 27.689835,879.01168 29.207902,872.71823 33.747792,863.90708 C 24.38107,839.38658 21.33408,813.84026 0.035334479,788.33044 C 30.360814,791.44487 43.915624,815.28676 60.161024,835.47019 C 54.631128,787.39416 42.106309,771.05368 31.787072,744.74589 C 61.781367,750.82754 82.366432,776.61828 95.766855,817.45839 C 105.32101,813.54047 114.00462,808.08545 125.95427,808.39719 C 114.65677,766.70139 108.0048,738.48134 89.267014,707.32725 C 142.70898,712.99757 172.92404,787.96657 168.23844,795.28805 C 178.21641,793.04406 187.24409,788.75767 198.67497,789.63638 C 187.426,751.28935 177.62715,712.76848 195.01526,670.98819 C 195.01526,670.98819 243.30204,736.42507 249.40491,756.79397 C 255.50779,777.16287 250.92373,795.49448 250.92373,795.49448 C 250.92373,795.49448 267.8833,826.57978 271.21765,846.58862 C 274.59075,866.82996 267.68496,905.69193 266.27183,924.57185 z"
+ style="opacity:1;fill:#ada469;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ </clipPath>
+ <filter
+ inkscape:collect="always"
+ id="filter8379"
+ x="-0.14413793"
+ width="1.288276"
+ y="-0.10278689"
+ height="1.2055738">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="7.389266"
+ id="feGaussianBlur8381" />
+ </filter>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath8392">
+ <path
+ sodipodi:nodetypes="czzzzzzcccccccccczczz"
+ id="path8394"
+ d="M 760.16396,935.83377 C 766.95806,954.73656 770.65765,969.13346 772.05426,987.04566 C 773.45088,1004.958 768.27158,1038.8465 769.1538,1057.7018 C 770.03555,1076.547 777.28749,1097.8008 796.49843,1106.6707 C 815.9173,1115.6365 845.81767,1116.882 870.61827,1103.5251 C 895.41887,1090.1681 928.01929,1033.1996 941.59253,1006.2164 C 955.21638,979.13246 980.3536,891.71903 986.25333,856.44781 C 992.15306,821.1766 988.80387,815.14704 981.63585,807.39232 C 984.27615,779.55217 980.13613,752.45689 994.74554,720.20614 C 964.49653,732.03184 957.36325,760.36684 946.42665,785.71122 C 938.42574,734.77829 946.63581,714.43803 949.74554,684.49186 C 920.68078,699.26977 906.88403,731.60588 904.74554,777.349 C 893.82159,776.0448 883.3541,772.91477 871.17411,776.63471 C 870.91007,730.61137 869.71055,699.7453 880.08474,662.42822 C 826.82927,683.45508 817.13746,769.02232 824.03125,775.20614 C 813.14843,775.74114 802.66017,773.90884 791.17411,778.06329 C 791.81303,735.49194 790.91365,693.15468 761.17411,655.20614 C 761.17411,655.20614 730.21605,736.12848 729.74554,758.77757 C 729.27503,781.42666 739.19713,798.94345 739.19713,798.94345 C 739.19713,798.94345 730.62906,835.68396 732.89854,857.17568 C 735.19439,878.91714 753.34144,916.85185 760.16396,935.83377 z"
+ style="opacity:1;fill:#ada469;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ </clipPath>
+ <filter
+ inkscape:collect="always"
+ id="filter8404"
+ x="-0.090268657"
+ width="1.1805373"
+ y="-0.10250848"
+ height="1.205017">
+ <feGaussianBlur
+ inkscape:collect="always"
+ stdDeviation="5.3457272"
+ id="feGaussianBlur8406" />
+ </filter>
+ <clipPath
+ clipPathUnits="userSpaceOnUse"
+ id="clipPath8417">
+ <path
+ sodipodi:nodetypes="czzzzzzcccccccccczczz"
+ id="path8419"
+ d="M 760.16396,935.83377 C 766.95806,954.73656 770.65765,969.13346 772.05426,987.04566 C 773.45088,1004.958 768.27158,1038.8465 769.1538,1057.7018 C 770.03555,1076.547 777.28749,1097.8008 796.49843,1106.6707 C 815.9173,1115.6365 845.81767,1116.882 870.61827,1103.5251 C 895.41887,1090.1681 928.01929,1033.1996 941.59253,1006.2164 C 955.21638,979.13246 980.3536,891.71903 986.25333,856.44781 C 992.15306,821.1766 988.80387,815.14704 981.63585,807.39232 C 984.27615,779.55217 980.13613,752.45689 994.74554,720.20614 C 964.49653,732.03184 957.36325,760.36684 946.42665,785.71122 C 938.42574,734.77829 946.63581,714.43803 949.74554,684.49186 C 920.68078,699.26977 906.88403,731.60588 904.74554,777.349 C 893.82159,776.0448 883.3541,772.91477 871.17411,776.63471 C 870.91007,730.61137 869.71055,699.7453 880.08474,662.42822 C 826.82927,683.45508 817.13746,769.02232 824.03125,775.20614 C 813.14843,775.74114 802.66017,773.90884 791.17411,778.06329 C 791.81303,735.49194 790.91365,693.15468 761.17411,655.20614 C 761.17411,655.20614 730.21605,736.12848 729.74554,758.77757 C 729.27503,781.42666 739.19713,798.94345 739.19713,798.94345 C 739.19713,798.94345 730.62906,835.68396 732.89854,857.17568 C 735.19439,878.91714 753.34144,916.85185 760.16396,935.83377 z"
+ style="opacity:1;fill:#ada469;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ </clipPath>
+ </defs>
+ <metadata
+ id="metadata7">
+ <rdf:RDF>
+ <cc:Work
+ rdf:about="">
+ <dc:format>image/svg+xml</dc:format>
+ <dc:type
+ rdf:resource="http://purl.org/dc/dcmitype/StillImage" />
+ </cc:Work>
+ </rdf:RDF>
+ </metadata>
+ <g
+ inkscape:groupmode="layer"
+ id="layer1"
+ inkscape:label="Shadow">
+ <path
+ style="opacity:0.5;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter11361);enable-background:new"
+ d="M 304.64285,526.6479 C 294.64285,527.00505 286.42857,529.50504 286.42857,529.50504 L 293.92857,535.57647 L 304.28571,539.1479 L 320.35714,539.50504 L 342.85714,534.1479 L 350.71428,535.21933 L 371.07143,533.07647 L 360.71428,539.86219 C 366.17351,538.83858 378.10757,543.4313 370.35714,545.21933 C 368.61714,545.62075 384.28571,540.57648 384.28571,540.57648 L 386.78571,535.93361 L 390.35714,526.6479 L 401.78571,526.6479 L 419.99999,522.00504 L 423.57143,517.00505 L 407.49999,518.07647 L 395.35714,520.21933 L 380.71428,515.21933 L 310.02218,531.92707 L 304.64285,526.6479 z"
+ id="path10326"
+ sodipodi:nodetypes="cccccccccsccccccccccc"
+ transform="matrix(10.726753,0,0,10.726753,-2882.1235,-4565.4583)"
+ inkscape:export-filename="/home/cheeseness/Documents/LCA09/mascot/tuz_new.png"
+ inkscape:export-xdpi="142.10527"
+ inkscape:export-ydpi="142.10527" />
+ </g>
+ <g
+ inkscape:groupmode="layer"
+ id="layer20"
+ inkscape:label="New Ear">
+ <g
+ style="opacity:1;display:inline;enable-background:new"
+ id="g7882"
+ transform="matrix(0.71084,-0.1937433,0.262963,0.9648058,503.68027,136.48399)">
+ <path
+ sodipodi:nodetypes="czzzzcc"
+ id="path7876"
+ d="M 245.12255,100.05344 C 245.12255,100.05344 197.99444,68.406519 177.9079,64.252501 C 157.86998,60.108538 139.435,60.934923 125.97426,77.859824 C 112.51352,94.784725 113.89687,139.12502 112.43872,164.82937 C 110.98057,190.53372 114.98817,235.00638 130.04332,253.49489 C 145.09848,271.98339 175.92966,267.07991 179.97027,274.90859 C 182.1831,279.19595 245.12255,100.05344 245.12255,100.05344 z"
+ style="opacity:1;fill:url(#radialGradient7904);fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate" />
+ <path
+ sodipodi:nodetypes="czzzzzc"
+ id="path7878"
+ d="M 135.37935,82.017807 C 135.37935,82.017807 161.7229,83.95659 173.01242,95.920995 C 184.42736,108.01833 186.74699,117.25251 188.30828,133.65558 C 189.87165,150.08057 187.45871,162.0737 180.49446,169.69292 C 173.53021,177.31214 179.49017,189.27624 154.57841,181.76399 C 129.66665,174.25174 127.54617,153.98101 128.06318,135.45924 C 128.58039,116.93026 135.37935,82.017807 135.37935,82.017807 z"
+ style="opacity:1;fill:url(#radialGradient7906);fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate" />
+ <path
+ sodipodi:nodetypes="czccssc"
+ id="path7880"
+ d="M 135.648,81.927211 C 135.648,81.927211 131.00335,98.292286 136.23625,110.49031 C 141.72419,123.28285 163.4605,154.75038 163.4605,165.14596 L 186.11675,160.14596 C 188.65893,153.17952 189.32727,144.3939 188.30425,133.64596 C 186.74296,117.24289 184.43795,108.02455 173.023,95.927211 C 163.36812,85.695164 141.42989,82.552354 135.648,81.927211 z"
+ style="opacity:1;fill:url(#radialGradient7908);fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ </g>
+ </g>
+ <g
+ inkscape:groupmode="layer"
+ id="layer21"
+ inkscape:label="Rendered2"
+ style="display:inline">
+ <path
+ style="opacity:1;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 845.03125,1154.7776 C 840.74554,1155.4919 817.4031,1158.3957 787.17411,1164.7776 C 756.94512,1171.1595 729.86016,1169.7437 651.38803,1182.1072 C 571.53625,1194.688 557.32367,1224.6495 543.26578,1229.1715 C 528.56564,1233.9001 397.88839,1163.349 397.88839,1163.349 L 402.17411,1069.0633 C 402.17411,1069.0633 488.05962,1052.8624 514.31696,1035.4919 C 540.57431,1018.1214 559.89934,985.82588 573.60268,964.06329 C 587.30602,942.3007 606.45982,892.63471 606.45982,892.63471 L 845.03125,1154.7776 z"
+ id="path7917"
+ sodipodi:nodetypes="czzzcczzcc" />
+ <path
+ style="opacity:0.5;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter8888);enable-background:accumulate"
+ d="M 332.34019,898.38549 L 299.60838,837.08593 L 261.99104,882.19239 C 264.16779,883.5095 267.76529,861.33636 307.59144,817.77531 L 332.34019,898.38549 z"
+ id="path7919"
+ clip-path="url(#clipPath8658)"
+ sodipodi:nodetypes="ccccc"
+ transform="translate(276,136)" />
+ <path
+ style="opacity:1;fill:url(#linearGradient2841);fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter8892);enable-background:accumulate"
+ d="M 200.81833,863.03015 L 347.18943,811.41136 L 591.14127,1037.6855 L 349.31075,1177.6927 L 168.29141,1090.0114 L 200.81833,863.03015 z"
+ id="path7923"
+ clip-path="url(#clipPath2833)"
+ sodipodi:nodetypes="cccccc"
+ transform="translate(276,136)" />
+ <path
+ style="opacity:1;fill:#0f0f0f;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 642.88839,640.13471 C 642.88839,640.13471 613.33433,680.70776 595.03125,714.42042 C 576.72816,748.13309 536.41016,840.77736 524.67411,885.49185 C 512.91471,930.29529 462.17411,1009.0633 462.17411,1009.0633 L 538.24554,1027.2776 C 538.24554,1027.2776 550.05266,1014.4542 569.31696,981.20614 C 588.58126,947.95806 629.67411,842.63471 629.67411,842.63471 L 642.88839,640.13471 z"
+ id="path7921"
+ sodipodi:nodetypes="czzcczcc" />
+ <path
+ style="opacity:0.4;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter8856);enable-background:accumulate"
+ d="M 430.28131,381.94122 C 423.21025,384.76965 194.10007,414.09303 194.10007,414.09303 L 154.46046,773.92607 L 244.65895,866.56568 L 296.98485,752.01438 L 397.45289,565.62246 L 430.28131,381.94122 z"
+ id="path7925"
+ sodipodi:nodetypes="ccccccc"
+ clip-path="url(#clipPath3665)"
+ transform="translate(276,136)" />
+ <path
+ style="opacity:1;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 969.67051,1164.0346 C 969.67051,1164.0346 992.92679,1175.4283 1005.7383,1184.5107 C 1018.4357,1193.5122 1035.2107,1209.1598 1047.4307,1221.8712 C 1059.7362,1234.6714 1067.5434,1244.4699 1088.9634,1246.032 C 1110.3956,1247.5949 1142.2458,1237.2444 1162.2594,1221.3678 C 1182.2729,1205.4912 1207.9063,1152.135 1207.9063,1152.135 L 1080.7455,1009.0633"
+ id="path7927"
+ sodipodi:nodetypes="czzzzcc" />
+ <path
+ style="opacity:0.75;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter8860);enable-background:accumulate"
+ d="M 331.34019,641.50471 L 216.17367,835.36467 L 260.2153,925.96265 L 357.79603,732.21539 L 331.34019,641.50471 z"
+ id="path7929"
+ clip-path="url(#clipPath8642)"
+ sodipodi:nodetypes="ccccc"
+ transform="translate(276,136)" />
+ <g
+ style="opacity:1;display:inline;enable-background:new"
+ id="g7931"
+ transform="matrix(0.9934486,0.1142802,-0.1142802,0.9934486,-9.24324,588.09054)"
+ inkscape:transform-center-x="-347.89063"
+ inkscape:transform-center-y="-28.255779">
+ <path
+ style="opacity:1;fill:#bcb786;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ d="M 1049.205,-282.26672 L 1049.1152,-282.25891 C 1047.7278,-281.37446 1042.5119,-280.65171 1042.4862,-272.73547 C 1042.462,-265.31022 1057.4991,-255.64401 1059.6425,-254.64172 C 1061.3727,-253.83263 1063.2341,-253.23296 1065.0488,-252.92297 L 1066.4862,-252.70422 C 1068.4059,-252.49228 1070.2062,-252.55281 1071.6425,-252.79797 C 1074.7616,-253.33037 1076.7541,-253.72658 1078.7362,-254.11047 C 1080.7183,-254.49434 1081.2105,-255.15012 1082.2988,-255.39172 C 1083.4275,-255.64238 1084.569,-255.27543 1088.5488,-256.26672 C 1092.5283,-257.258 1093.9782,-257.68602 1094.6738,-258.04797 C 1095.396,-258.42398 1096.4355,-258.91855 1097.0488,-259.57922 C 1099.0117,-259.59127 1100.8425,-259.87027 1102.2675,-260.42297 C 1105.2187,-261.56758 1107.1407,-262.29239 1108.955,-263.17297 C 1110.4107,-263.8795 1111.2741,-264.875 1111.4862,-265.17297 C 1111.6985,-265.47093 1111.5852,-265.90152 1111.6112,-265.92297 C 1111.6542,-265.95821 1111.9517,-266.017 1112.1112,-266.36047 C 1112.9702,-268.20755 1114.4344,-271.98811 1114.5488,-272.67297 C 1114.6625,-273.35512 1114.7168,-274.02574 1114.7675,-274.42297 C 1114.7969,-274.65248 1114.6204,-275.30187 1114.6425,-275.36047 C 1114.6734,-275.44252 1114.9308,-275.61104 1114.9862,-275.86047 C 1115.2525,-277.05879 1115.0754,-278.06783 1114.8612,-279.48547 C 1114.6473,-280.90311 1113.8896,-284.1001 1113.2362,-284.95422 C 1112.8168,-285.50279 1112.4369,-285.74672 1112.08,-285.86047 C 1112.0129,-285.87776 1111.9561,-285.90721 1111.8925,-285.92297 C 1111.8715,-285.92695 1111.8508,-285.91983 1111.83,-285.92297 C 1111.5184,-285.99847 1111.2215,-286.08164 1110.6738,-286.14172 C 1109.6883,-286.24984 1108.2491,-286.40112 1106.705,-286.39172 C 1106.1903,-286.38859 1105.6679,-286.34408 1105.1425,-286.29797 C 1101.5836,-285.98569 1096.1327,-285.30689 1094.9238,-284.67297 C 1093.2907,-285.00699 1090.9756,-285.2852 1088.9862,-285.14172 C 1085.9222,-284.92075 1084.0185,-284.79953 1082.08,-284.67297 C 1080.1416,-284.54642 1080.3939,-284.28433 1079.1738,-284.20422 C 1077.8547,-284.11762 1077.3869,-284.42747 1073.6112,-284.11047 C 1070.0655,-283.81275 1064.6306,-283.1173 1063.3925,-282.48547 C 1061.7591,-282.81998 1059.4466,-283.09786 1057.455,-282.95422 C 1054.3908,-282.73324 1052.4872,-282.58078 1050.5488,-282.45422 C 1049.8896,-282.41119 1049.5064,-282.33029 1049.205,-282.26672 z"
+ id="path7933" />
+ <g
+ clip-path="url(#clipPath7616)"
+ style="display:inline;filter:url(#filter7610);enable-background:new"
+ id="g7935"
+ transform="matrix(0.9975712,-6.9654277e-2,6.9654277e-2,0.9975712,872.72062,140.02502)">
+ <path
+ sodipodi:nodetypes="ccssscsssscscsscsssccscssccsscssscc"
+ id="path7937"
+ d="M 229.94262,-409.12268 C 226.38481,-409.07267 220.91842,-408.76259 219.63928,-408.21854 C 218.03319,-408.66601 215.73612,-409.09985 213.73933,-409.09528 C 210.66734,-409.08826 208.77464,-409.08651 206.83206,-409.09528 C 206.17159,-409.09827 205.78447,-409.02811 205.47939,-408.98569 C 205.47939,-408.98569 205.47939,-407.88976 205.47939,-407.88976 C 205.59911,-408.06923 205.87191,-408.58022 206.42914,-408.65691 C 207.17672,-408.7598 211.59842,-408.80814 213.73933,-408.76651 C 215.51393,-408.73198 218.19456,-408.49224 220.12854,-407.80756 C 220.44994,-407.69378 220.74779,-407.53378 221.02073,-407.39659 C 222.98415,-406.40966 228.96409,-403.09505 228.96409,-403.09505 C 228.96409,-403.09505 222.33134,-407.04273 221.48122,-407.53358 C 221.27791,-407.65097 220.90658,-407.79127 220.44513,-407.94456 C 221.66576,-408.39235 225.5211,-408.56427 228.27336,-408.65691 C 231.29786,-408.75873 231.62112,-408.7465 233.68405,-408.46512 C 235.81336,-408.17469 237.02256,-407.86236 237.02256,-407.86236 C 237.02255,-407.86236 236.9442,-408.50354 238.05865,-408.65691 C 238.80622,-408.7598 243.22794,-408.80814 245.36884,-408.76651 C 247.43834,-408.72625 250.73489,-408.35935 252.65024,-407.39659 C 253.65356,-406.89226 255.68588,-405.82796 257.44559,-404.86088 L 257.5412,-404.88031 C 257.5412,-404.88031 253.96086,-407.04273 253.11073,-407.53358 C 252.90742,-407.65097 252.5361,-407.79127 252.07464,-407.94456 C 253.29526,-408.39235 257.12183,-408.56427 259.87409,-408.65691 C 262.89859,-408.75873 263.22184,-408.7465 265.28478,-408.46512 C 267.23794,-408.19872 268.2977,-407.93506 268.47939,-407.88976 C 268.47939,-407.88976 268.4523,-408.20122 268.4523,-408.20122 C 268.04327,-408.33767 267.73806,-408.43457 267.05192,-408.5587 C 265.75111,-408.79403 263.6528,-409.16026 261.54335,-409.12268 C 257.9714,-409.05904 252.49007,-408.76672 251.24001,-408.21854 C 249.63418,-408.66549 247.36339,-409.09984 245.36884,-409.09528 C 242.29685,-409.08826 240.37536,-409.08651 238.43279,-409.09528 C 236.49023,-409.10406 236.72011,-408.81621 235.49721,-408.8213 C 234.1753,-408.8268 233.73109,-409.17593 229.94262,-409.12268 C 229.94262,-409.12268 229.94262,-409.12268 229.94262,-409.12268"
+ style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ id="path7939"
+ d="M 206.1989,-407.47878 C 208.11911,-406.66172 210.77605,-405.28595 212.35787,-404.08139 C 213.93971,-402.87683 215.26544,-402.30771 217.91246,-400.16344 C 218.79803,-399.44606 219.66111,-398.81359 220.50439,-398.2417 L 221.04496,-398.43181 C 220.33173,-398.9152 219.5772,-399.45212 218.77587,-400.05384 C 215.95364,-402.17305 215.14932,-402.86357 212.7608,-404.32798 C 210.37226,-405.79238 208.66132,-406.69374 206.1989,-407.47878 C 206.1989,-407.47878 206.1989,-407.47878 206.1989,-407.47878"
+ style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ sodipodi:nodetypes="cssccsscc" />
+ <path
+ id="path7941"
+ d="M 237.79963,-407.47878 C 239.71984,-406.66172 242.40557,-405.28595 243.98738,-404.08139 C 244.80045,-403.46223 245.54587,-403.01097 246.43784,-402.42738 L 247.08684,-402.54404 C 246.28853,-403.12041 245.51507,-403.63839 244.39031,-404.32798 C 242.00177,-405.79238 240.26205,-406.69374 237.79963,-407.47878 C 237.79963,-407.47878 237.79963,-407.47878 237.79963,-407.47878"
+ style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ sodipodi:nodetypes="csccscc" />
+ </g>
+ <g
+ clip-path="url(#clipPath7606)"
+ id="g7943">
+ <path
+ style="opacity:0.75;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter7578);enable-background:new"
+ d="M 1056.25,-278.80481 C 1060.3946,-280.28358 1066.25,-275.67981 1066.25,-275.67981 C 1067.149,-275.39889 1068.9751,-276.57428 1068.8743,-277.36595 C 1068.8743,-277.36595 1067.324,-279.22657 1068.5,-280.30481 C 1069.676,-281.38305 1073.796,-278.79743 1076,-278.67981 C 1078.204,-278.56219 1081.5621,-278.90922 1083,-279.42981 C 1084.4379,-279.9504 1084.1129,-280.8544 1085.625,-281.17981 C 1087.1371,-281.50522 1090.7439,-280.14227 1092.6855,-280.01098 C 1094.6271,-279.87969 1097.3336,-279.67671 1098.5,-280.17981 C 1099.6664,-280.68291 1098.6782,-281.33902 1100.375,-282.05481 C 1102.0718,-282.7706 1108.1352,-283.01143 1110,-282.17981 C 1111.8648,-281.34819 1111.8099,-281.66061 1112.625,-279.17981 C 1113.4401,-276.69901 1120.0648,-274.01696 1111.5,-265.80481 C 1102.9352,-257.59266 1052.1221,-252.01887 1045.875,-263.05481 C 1039.6279,-274.09075 1052.1054,-277.32604 1056.25,-278.80481 z"
+ id="path7945"
+ sodipodi:nodetypes="czzzzzzzzzzzzzz" />
+ <path
+ style="opacity:0.75;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter7594);enable-background:new"
+ d="M 1058.5,-275.42981 C 1062.6446,-276.90858 1068.5,-272.30481 1068.5,-272.30481 C 1069.399,-272.02389 1071.2251,-273.19928 1071.1243,-273.99095 C 1071.1243,-273.99095 1069.574,-275.85157 1070.75,-276.92981 C 1071.926,-278.00805 1076.046,-275.42243 1078.25,-275.30481 C 1080.454,-275.18719 1083.8121,-275.53422 1085.25,-276.05481 C 1086.6879,-276.5754 1086.3629,-277.4794 1087.875,-277.80481 C 1089.3871,-278.13022 1092.9939,-276.76727 1094.9355,-276.63598 C 1096.8771,-276.50469 1099.5836,-276.30171 1100.75,-276.80481 C 1101.9164,-277.30791 1100.9282,-277.96402 1102.625,-278.67981 C 1104.3218,-279.3956 1110.3852,-279.63643 1112.25,-278.80481 C 1114.1148,-277.97319 1114.0599,-278.28561 1114.875,-275.80481 C 1115.6901,-273.32401 1122.3148,-270.64196 1113.75,-262.42981 C 1105.1852,-254.21766 1054.3721,-248.64387 1048.125,-259.67981 C 1041.8779,-270.71575 1054.3554,-273.95104 1058.5,-275.42981 z"
+ id="path7947"
+ sodipodi:nodetypes="czzzzzzzzzzzzzz" />
+ </g>
+ </g>
+ <path
+ style="opacity:1;fill:#101414;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 628.24553,347.99185 C 624.4411,322.72762 611.43581,297.35383 611.08873,272.46662 C 610.90247,259.1111 614.36158,245.89571 624.84426,232.91257 C 661.19128,167.61674 741.78517,148.21789 810.77892,141.44715 C 897.70131,130.43035 995.69159,159.38722 1044.1503,236.84843 C 1098.2743,312.58173 1100.825,409.38755 1124.7623,496.37638 C 1154.2001,623.50398 1179.5414,752.59052 1185.1545,883.22673 C 1182.0911,961.40858 1176.7282,1048.4109 1124.6513,1111.3609 C 1076.6248,1161.7183 1001.8649,1161.4139 937.58145,1170.3632 C 847.02606,1175.0182 753.22992,1154.2174 675.79755,1106.165 C 611.02191,1068.225 580.06736,992.68633 578.51815,920.14538 C 570.12898,840.27022 604.90967,766.33687 630.13855,692.98577 C 637.60916,610.2247 639.55141,526.73802 639.79189,443.60093 C 638.95507,411.40549 632.70236,379.7836 628.24553,347.99185 z"
+ id="path7949"
+ sodipodi:nodetypes="cscccccccccccc" />
+ <path
+ style="opacity:0.25;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter8940);enable-background:accumulate"
+ d="M 311.83409,415.43155 L 321.73359,537.05392 L 261.62951,673.52553 L 277.18586,848.1809 C 292.79912,910.0601 309.37131,946.84995 351.56201,965.23473 C 355.88112,928.99475 312.95049,822.27485 312.31937,776.11489 C 311.68792,729.93044 323.14971,667.50703 342.99704,617.81842 C 363.04539,567.62654 379.89378,572.972 385.12193,525.22549 C 390.35008,477.47898 367.69553,375.83357 367.69553,375.83357 L 311.83409,415.43155 z"
+ id="path7951"
+ sodipodi:nodetypes="ccccczzzcc"
+ clip-path="url(#clipPath8616)"
+ transform="translate(276,136)" />
+ <path
+ style="opacity:1;fill:url(#linearGradient8970);fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 1010.0312,655.49186 C 1010.0312,655.49186 1026.7864,692.50992 1038.7327,709.44581 C 1050.6789,726.3817 1091.4598,765.49186 1091.4598,765.49186 L 1144.057,637.90211"
+ id="path7953"
+ sodipodi:nodetypes="czcc" />
+ <path
+ style="opacity:0.07999998;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter8822);enable-background:accumulate"
+ d="M 730.31998,536.56864 C 730.31998,545.05392 772.86772,595.03667 772.86772,595.03667 L 785.47431,566.26713 L 730.31998,536.56864 z"
+ id="path7955"
+ sodipodi:nodetypes="cccc"
+ clip-path="url(#clipPath8209)"
+ transform="translate(276,136)" />
+ <g
+ transform="translate(450.03125,73.843964)"
+ style="opacity:1;display:inline;enable-background:new"
+ id="g7957"
+ clip-path="url(#clipPath3998)">
+ <g
+ transform="translate(-174.03125,62.156036)"
+ style="filter:url(#filter3677)"
+ id="g7959">
+ <g
+ id="g7961"
+ style="filter:url(#filter3785)">
+ <path
+ sodipodi:nodetypes="czzzzzzzzzz"
+ id="path7963"
+ d="M 425.88244,476.99186 C 436.68787,475.5132 450.62645,480.34637 470.5253,480.20614 C 490.42415,480.06591 527.97852,463.29492 552.66815,463.06328 C 577.35778,462.83164 615.41985,475.34734 631.95387,478.06328 C 648.48789,480.77922 654.80219,477.90476 659.45386,485.92043 C 664.10553,493.9361 661.38057,496.66767 649.09672,506.63472 C 636.81287,516.60177 608.30704,519.27104 583.02529,519.49186 C 557.74295,519.71268 512.644,526.57038 487.66815,523.42042 C 462.6923,520.27046 430.73059,515.59775 418.73958,505.56328 C 406.74857,495.52881 398.88874,488.83146 401.23958,481.63471 C 403.59042,474.43796 415.07701,478.47052 425.88244,476.99186 z"
+ style="opacity:1;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <rect
+ y="412.60312"
+ x="343.6539"
+ height="181.01935"
+ width="381.83765"
+ id="rect7965"
+ style="opacity:1;fill:none;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate" />
+ </g>
+ <g
+ id="g7967"
+ style="filter:url(#filter3785)">
+ <path
+ sodipodi:nodetypes="czzzcc"
+ id="path7969"
+ d="M 687.14286,452.36218 C 676.68117,462.07661 600.16326,471.36732 586.42857,481.6479 C 572.69388,491.92848 571.67605,494.53616 574.28571,501.6479 C 576.89537,508.75964 580.83098,511.05362 600,510.21932 C 619.16902,509.38502 698.57143,482.5976 698.57143,488.79075 L 687.14286,452.36218 z"
+ style="opacity:1;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ transform="translate(174.03125,-62.156036)" />
+ <rect
+ y="344.82138"
+ x="702.86414"
+ height="162.63455"
+ width="207.8894"
+ id="rect7971"
+ style="opacity:1;fill:none;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate" />
+ </g>
+ </g>
+ <g
+ transform="translate(-174.03125,62.156036)"
+ style="opacity:0.18000004;display:inline;enable-background:new"
+ id="g7973">
+ <g
+ id="g7975"
+ style="filter:url(#filter3785)">
+ <path
+ sodipodi:nodetypes="czzzzzzzzzz"
+ id="path7977"
+ d="M 425.88244,476.99186 C 436.68787,475.5132 450.62645,480.34637 470.5253,480.20614 C 490.42415,480.06591 527.97852,463.29492 552.66815,463.06328 C 577.35778,462.83164 615.41985,475.34734 631.95387,478.06328 C 648.48789,480.77922 654.80219,477.90476 659.45386,485.92043 C 664.10553,493.9361 661.38057,496.66767 649.09672,506.63472 C 636.81287,516.60177 608.30704,519.27104 583.02529,519.49186 C 557.74295,519.71268 512.644,526.57038 487.66815,523.42042 C 462.6923,520.27046 430.73059,515.59775 418.73958,505.56328 C 406.74857,495.52881 398.88874,488.83146 401.23958,481.63471 C 403.59042,474.43796 415.07701,478.47052 425.88244,476.99186 z"
+ style="opacity:1;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <rect
+ y="412.60312"
+ x="343.6539"
+ height="181.01935"
+ width="381.83765"
+ id="rect7979"
+ style="opacity:1;fill:none;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate" />
+ </g>
+ <g
+ id="g7981"
+ style="filter:url(#filter3785)">
+ <path
+ sodipodi:nodetypes="czzzcc"
+ id="path7983"
+ d="M 687.14286,452.36218 C 676.68117,462.07661 600.16326,471.36732 586.42857,481.6479 C 572.69388,491.92848 571.67605,494.53616 574.28571,501.6479 C 576.89537,508.75964 580.83098,511.05362 600,510.21932 C 619.16902,509.38502 698.57143,482.5976 698.57143,488.79075 L 687.14286,452.36218 z"
+ style="opacity:1;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ transform="translate(174.03125,-62.156036)" />
+ <rect
+ y="344.82138"
+ x="702.86414"
+ height="162.63455"
+ width="207.8894"
+ id="rect7985"
+ style="opacity:1;fill:none;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate" />
+ </g>
+ </g>
+ </g>
+ <path
+ style="opacity:0.75;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter8802);enable-background:accumulate"
+ d="M 582.65599,-7.4183011 L 695.79307,78.848726 L 804.68752,337.64981 L 842.87128,545.5392 L 963.07944,637.46308 C 963.07944,637.46308 950.35151,350.37773 943.28044,323.50767 C 936.20938,296.63761 793.37381,-69.643698 793.37381,-69.643698 L 582.65599,-7.4183011 z"
+ id="path7987"
+ clip-path="url(#clipPath8604)"
+ sodipodi:nodetypes="cccccscc"
+ transform="translate(276,136)" />
+ <path
+ style="opacity:1;fill:url(#linearGradient8958);fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 964.13839,239.599 C 964.13839,239.599 972.81571,250.49562 988.24554,251.56328 C 1003.6754,252.63094 1037.9672,211.61061 1058.4241,199.42043 C 1078.9034,187.2169 1105.4705,172.81818 1122.3527,179.06329 C 1139.2348,185.30839 1144.5105,205.49938 1150.2098,227.099 C 1155.9092,248.69861 1156.9284,288.91289 1147.5313,319.95615 C 1138.1341,350.9994 1097.028,393.0599 1082.1741,423.349 C 1067.3202,453.6381 1070.567,463.17043 1070.567,463.17043"
+ id="path7989"
+ sodipodi:nodetypes="czzzzzzc" />
+ <path
+ style="opacity:1;fill:url(#radialGradient3315);fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ d="M 1124.4955,207.63471 C 1108.6027,206.74185 1074.7767,219.74054 1058.4241,231.92043 C 1041.9855,244.16433 1029.2032,256.03483 1029.1384,284.06328 C 1029.0732,312.26932 1042.2575,323.13969 1058.2455,331.02757 C 1074.2335,338.91546 1091.9317,338.14685 1110.2098,319.24186 C 1128.488,300.33686 1124.4955,207.63471 1124.4955,207.63471 z"
+ id="path7991"
+ sodipodi:nodetypes="czzzzc" />
+ <path
+ sodipodi:type="arc"
+ style="opacity:0.75;fill:url(#radialGradient3543);fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:bevel;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter4120);enable-background:accumulate"
+ id="path7993"
+ sodipodi:cx="385"
+ sodipodi:cy="237.00504"
+ sodipodi:rx="86.428574"
+ sodipodi:ry="73.928574"
+ d="M 471.42857,237.00504 A 86.428574,73.928574 0 1 1 298.57143,237.00504 A 86.428574,73.928574 0 1 1 471.42857,237.00504 z"
+ transform="matrix(0.9434749,-0.1239943,0.1440089,1.0957669,451.94827,134.5988)"
+ clip-path="url(#clipPath4100)" />
+ <path
+ transform="translate(450.03125,73.843964)"
+ style="opacity:1;fill:url(#radialGradient3915);fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 527.60588,407.44884 C 527.60588,407.44884 405.56444,445.85232 340.09154,417.08065 C 274.61865,388.30899 265.71429,292.36218 265.71429,292.36218 C 265.71429,292.36218 339.09587,211.85825 395.63507,208.74742 C 451.46212,205.67578 486.20893,228.89074 510.50508,274.59913 C 534.85708,320.41261 527.60588,407.44884 527.60588,407.44884 z"
+ id="path7995"
+ sodipodi:nodetypes="csczzc"
+ mask="url(#mask3684)" />
+ <path
+ style="opacity:1;fill:url(#linearGradient3959);fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:bevel;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 772.17411,393.349 C 772.17411,393.349 808.39165,365.96653 823.78125,357.45614 C 838.95859,349.06313 849.49553,345.849 859.6741,345.849 L 844.13839,412.81328"
+ id="path7997"
+ sodipodi:nodetypes="czcc" />
+ <path
+ sodipodi:type="arc"
+ style="opacity:1;fill:url(#radialGradient3933);fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:bevel;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ id="path7999"
+ sodipodi:cx="409.28571"
+ sodipodi:cy="306.64789"
+ sodipodi:rx="36.25"
+ sodipodi:ry="36.25"
+ d="M 445.53571,306.64789 A 36.25,36.25 0 1 1 373.03571,306.64789 A 36.25,36.25 0 1 1 445.53571,306.64789 z"
+ transform="translate(449.49554,74.915393)" />
+ <path
+ style="opacity:0.3;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter8806);enable-background:accumulate"
+ d="M 311.83409,415.43155 L 321.73359,537.05392 L 261.62951,673.52553 L 277.18586,848.1809 C 292.79912,910.0601 309.37131,946.84995 351.56201,965.23473 C 355.88112,928.99475 360.24362,892.86709 320.31937,742.11489 L 337.99704,672.81842 L 410.12193,534.22549 L 367.69553,375.83357 L 311.83409,415.43155 z"
+ id="path8001"
+ sodipodi:nodetypes="cccccccccc"
+ clip-path="url(#clipPath8616)"
+ transform="translate(276,136)" />
+ <path
+ style="opacity:0.5;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter8826);enable-background:accumulate"
+ d="M 635.21025,581.13004 C 621.06811,593.85796 674.44372,615.71019 711.57778,605.17167 C 748.71184,594.63315 816.22265,569.6073 814.81537,525.97571 C 813.40809,482.34413 738.44784,397.28228 738.44784,397.28228 L 635.21025,581.13004 z"
+ id="path8003"
+ sodipodi:nodetypes="czzcc" />
+ <path
+ sodipodi:type="arc"
+ style="opacity:1;fill:url(#radialGradient3991);fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:bevel;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ id="path8005"
+ sodipodi:cx="410"
+ sodipodi:cy="306.64789"
+ sodipodi:rx="23.214285"
+ sodipodi:ry="23.214285"
+ d="M 433.21428,306.64789 A 23.214285,23.214285 0 1 1 386.78572,306.64789 A 23.214285,23.214285 0 1 1 433.21428,306.64789 z"
+ transform="translate(449.67411,74.915393)" />
+ <path
+ sodipodi:type="arc"
+ style="opacity:1;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:bevel;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter3981);enable-background:accumulate"
+ id="path8007"
+ sodipodi:cx="414.28571"
+ sodipodi:cy="303.07648"
+ sodipodi:rx="7.5"
+ sodipodi:ry="7.5"
+ d="M 421.78571,303.07648 A 7.5,7.5 0 1 1 406.78571,303.07648 A 7.5,7.5 0 1 1 421.78571,303.07648 z"
+ transform="translate(451.99554,73.486821)" />
+ <path
+ style="opacity:1;fill:url(#radialGradient4112);fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 789.31696,478.349 C 789.31696,478.349 796.33977,497.91759 788.24553,513.349 C 780.15129,528.78041 745.92236,552.33722 720.74554,563.349 C 695.43582,574.41891 635.27254,596.31293 618.95982,605.31328 C 602.49834,614.39571 600.74554,617.99185 600.74554,617.99185 C 600.74554,617.99185 593.59861,598.92744 629.49553,566.20615 C 665.66764,533.23401 771.52265,518.15665 789.31696,478.349 z"
+ id="path8009"
+ sodipodi:nodetypes="czzzczc" />
+ <g
+ style="opacity:1;display:inline;enable-background:new"
+ id="g8011"
+ transform="translate(780.74553,74.55825)">
+ <path
+ transform="translate(-329.81481,0)"
+ clip-path="url(#clipPath3999)"
+ sodipodi:nodetypes="czzczzzszc"
+ id="path8013"
+ d="M 179.64286,267.36218 C 157.23242,307.0651 119.02676,383.14247 110.35715,417.00504 C 101.70994,450.78014 101.58516,483.42158 110,503.43362 C 118.3602,523.31575 136.16398,539.06642 150.71428,544.86218 C 150.1179,530.48631 165.08723,501.57635 223.57143,472.36218 C 282.1977,443.07704 301.95306,445.23132 327.14285,425.21932 C 352.77291,404.85756 335.34872,345.57268 330.35714,331.29075 C 325.36556,317.00882 329.12051,327.91101 328.41112,326.19774 C 317.72184,300.38182 294.1968,271.76744 263.92857,261.6479 C 233.66034,251.52836 198.91081,256.79953 179.64286,267.36218 z"
+ style="opacity:1;fill:url(#radialGradient3585);fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:20.79999924;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:none;stroke-opacity:1;display:inline" />
+ <path
+ transform="matrix(0.8823874,0.4705236,-0.4705236,0.8823874,-166.62245,2.387362)"
+ d="M 248.28731,338.07648 A 64.715881,134.00607 0 1 1 118.85555,338.07648 A 64.715881,134.00607 0 1 1 248.28731,338.07648 z"
+ sodipodi:ry="134.00607"
+ sodipodi:rx="64.715881"
+ sodipodi:cy="338.07648"
+ sodipodi:cx="183.57143"
+ id="path8015"
+ style="opacity:1;fill:url(#radialGradient4060);fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:20.79999924;stroke-linecap:butt;stroke-linejoin:bevel;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ sodipodi:type="arc" />
+ <path
+ transform="matrix(0.8823874,0.4705236,-0.4705236,0.8823874,-162.19388,-18.755495)"
+ d="M 248.28731,338.07648 A 64.715881,134.00607 0 1 1 118.85555,338.07648 A 64.715881,134.00607 0 1 1 248.28731,338.07648 z"
+ sodipodi:ry="134.00607"
+ sodipodi:rx="64.715881"
+ sodipodi:cy="338.07648"
+ sodipodi:cx="183.57143"
+ id="path8017"
+ style="opacity:1;fill:url(#radialGradient4062);fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:20.79999924;stroke-linecap:butt;stroke-linejoin:bevel;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ sodipodi:type="arc" />
+ <path
+ transform="translate(-329.81481,3e-7)"
+ clip-path="url(#clipPath3999)"
+ sodipodi:nodetypes="czzczzzszc"
+ id="path8019"
+ d="M 179.64286,267.36218 C 157.23242,307.0651 119.02676,383.14247 110.35715,417.00504 C 101.70994,450.78014 101.58516,483.42158 110,503.43362 C 118.3602,523.31575 136.16398,539.06642 150.71428,544.86218 C 150.1179,530.48631 165.08723,501.57635 223.57143,472.36218 C 282.1977,443.07704 301.95306,445.23132 327.14285,425.21932 C 352.77291,404.85756 335.34872,345.57268 330.35714,331.29075 C 325.36556,317.00882 329.12051,327.91101 328.41112,326.19774 C 317.72184,300.38182 294.1968,271.76744 263.92857,261.6479 C 233.66034,251.52836 198.91081,256.79953 179.64286,267.36218 z"
+ style="opacity:1;fill:none;fill-opacity:1;fill-rule:evenodd;stroke:url(#linearGradient3587);stroke-width:20.79999924;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:none;stroke-opacity:1;display:inline;filter:url(#filter4079);enable-background:new" />
+ </g>
+ <path
+ sodipodi:type="arc"
+ style="opacity:1;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:bevel;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ id="path8021"
+ sodipodi:cx="310.71429"
+ sodipodi:cy="398.07648"
+ sodipodi:rx="19.704132"
+ sodipodi:ry="19.704132"
+ d="M 330.41843,398.07648 A 19.704132,19.704132 0 1 1 291.01016,398.07648 A 19.704132,19.704132 0 1 1 330.41843,398.07648 z"
+ transform="translate(452.55663,72.581273)" />
+ <path
+ sodipodi:type="arc"
+ style="opacity:1;fill:url(#radialGradient4056);fill-opacity:1;fill-rule:evenodd;stroke:url(#linearGradient4082);stroke-width:20.79999924;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter4083);enable-background:accumulate"
+ id="path8023"
+ sodipodi:cx="310.71429"
+ sodipodi:cy="398.07648"
+ sodipodi:rx="19.704132"
+ sodipodi:ry="19.704132"
+ d="M 330.41843,398.07648 A 19.704132,19.704132 0 1 1 291.01016,398.07648 A 19.704132,19.704132 0 1 1 330.41843,398.07648 z"
+ transform="translate(450.55663,72.581273)" />
+ <path
+ sodipodi:type="arc"
+ style="opacity:1;fill:url(#radialGradient4119);fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:bevel;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ id="path8025"
+ sodipodi:cx="310.71429"
+ sodipodi:cy="398.07648"
+ sodipodi:rx="19.704132"
+ sodipodi:ry="19.704132"
+ d="M 330.41843,398.07648 A 19.704132,19.704132 0 1 1 291.01016,398.07648 A 19.704132,19.704132 0 1 1 330.41843,398.07648 z"
+ transform="translate(450.55663,72.581273)" />
+ <path
+ sodipodi:type="arc"
+ style="opacity:1;fill:url(#radialGradient4868);fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:0.99999994px;stroke-linecap:butt;stroke-linejoin:bevel;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter4002);enable-background:accumulate"
+ id="path8027"
+ sodipodi:cx="429.56738"
+ sodipodi:cy="377.42877"
+ sodipodi:rx="72.079735"
+ sodipodi:ry="44.547726"
+ d="M 501.64712,377.42877 A 72.079735,44.547726 0 1 1 357.48765,377.42877 A 72.079735,44.547726 0 1 1 501.64712,377.42877 z"
+ transform="matrix(0.9969564,-7.7961675e-2,7.7961675e-2,0.9969564,436.61877,125.29509)"
+ inkscape:transform-center-x="-47.231976"
+ inkscape:transform-center-y="-3.6935079" />
+ <path
+ sodipodi:type="arc"
+ style="opacity:1;fill:url(#radialGradient4876);fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:0.99999994px;stroke-linecap:butt;stroke-linejoin:bevel;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter4010);enable-background:accumulate"
+ id="path8029"
+ sodipodi:cx="437.6991"
+ sodipodi:cy="391.21735"
+ sodipodi:rx="36.611931"
+ sodipodi:ry="22.627417"
+ d="M 474.31103,391.21735 A 36.611931,22.627417 0 1 1 401.08717,391.21735 A 36.611931,22.627417 0 1 1 474.31103,391.21735 z"
+ transform="matrix(1.4357951,-6.9991037e-2,6.9991037e-2,1.4357951,235.18065,-63.86546)"
+ inkscape:transform-center-x="-20.955902"
+ inkscape:transform-center-y="-13.056625" />
+ <g
+ transform="translate(450.03125,73.843964)"
+ id="g8031"
+ style="opacity:1;display:inline;filter:url(#filter4053);enable-background:new">
+ <path
+ d="M 416.87499,401.82648 A 3.2142856,3.2142856 0 1 1 410.44642,401.82648 A 3.2142856,3.2142856 0 1 1 416.87499,401.82648 z"
+ sodipodi:ry="3.2142856"
+ sodipodi:rx="3.2142856"
+ sodipodi:cy="401.82648"
+ sodipodi:cx="413.66071"
+ id="path8033"
+ style="opacity:1;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:url(#linearGradient4484);stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ sodipodi:type="arc" />
+ <path
+ transform="translate(13.125009,8.1249913)"
+ d="M 416.87499,401.82648 A 3.2142856,3.2142856 0 1 1 410.44642,401.82648 A 3.2142856,3.2142856 0 1 1 416.87499,401.82648 z"
+ sodipodi:ry="3.2142856"
+ sodipodi:rx="3.2142856"
+ sodipodi:cy="401.82648"
+ sodipodi:cx="413.66071"
+ id="path8035"
+ style="opacity:1;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:url(#linearGradient4486);stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ sodipodi:type="arc" />
+ <path
+ transform="translate(32.946437,7.4999913)"
+ d="M 416.87499,401.82648 A 3.2142856,3.2142856 0 1 1 410.44642,401.82648 A 3.2142856,3.2142856 0 1 1 416.87499,401.82648 z"
+ sodipodi:ry="3.2142856"
+ sodipodi:rx="3.2142856"
+ sodipodi:cy="401.82648"
+ sodipodi:cx="413.66071"
+ id="path8037"
+ style="opacity:1;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:url(#linearGradient4488);stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ sodipodi:type="arc" />
+ <path
+ transform="translate(24.910723,-10.267866)"
+ d="M 416.87499,401.82648 A 3.2142856,3.2142856 0 1 1 410.44642,401.82648 A 3.2142856,3.2142856 0 1 1 416.87499,401.82648 z"
+ sodipodi:ry="3.2142856"
+ sodipodi:rx="3.2142856"
+ sodipodi:cy="401.82648"
+ sodipodi:cx="413.66071"
+ id="path8039"
+ style="opacity:1;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:url(#linearGradient4490);stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ sodipodi:type="arc" />
+ <path
+ transform="translate(47.589294,-0.6250087)"
+ d="M 416.87499,401.82648 A 3.2142856,3.2142856 0 1 1 410.44642,401.82648 A 3.2142856,3.2142856 0 1 1 416.87499,401.82648 z"
+ sodipodi:ry="3.2142856"
+ sodipodi:rx="3.2142856"
+ sodipodi:cy="401.82648"
+ sodipodi:cx="413.66071"
+ id="path8041"
+ style="opacity:1;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:url(#linearGradient4492);stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ sodipodi:type="arc" />
+ </g>
+ <path
+ style="opacity:1;fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ d="M 896.20301,482.92837 C 897.1881,487.27845 900.74008,489.10785 903.58974,490.82019 C 908.05042,493.33311 910.1099,492.3423 912.74425,490.06258 C 914.3462,488.14141 923.42736,485.36393 928.33848,482.99151 C 932.66809,481.5326 937.24178,477.63278 941.723,474.65775 C 945.11814,473.03051 947.06964,475.01239 949.55168,475.6679 C 952.4958,476.38451 953.96285,477.83965 955.6126,479.20344 C 958.00876,480.37863 954.6847,482.34657 958.8956,483.49658 C 960.08651,483.71452 961.31255,484.07303 962.17859,482.99151"
+ id="path8043"
+ sodipodi:nodetypes="ccccccccc" />
+ <path
+ style="opacity:1;fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ d="M 910.85021,475.35223 C 913.16515,475.32025 914.02799,475.99476 916.34292,474.53148 C 919.79856,471.45035 921.74546,471.38671 924.29787,470.11206 C 927.32444,468.79683 930.83357,478.26375 934.3994,479.96105 C 936.79449,479.13963 935.68854,481.75484 935.85149,482.6127 C 935.90862,485.25954 938.65843,486.29076 940.20777,488.04227 C 943.52381,490.29776 947.583,494.33773 951.31945,493.34557 C 957.7647,490.4145 961.59867,492.06411 967.60816,485.95883 C 968.31221,484.77749 967.02391,479.06423 970.70175,478.76149 C 973.22574,479.01487 974.86842,478.81164 976.76267,479.32971 C 982.20367,481.4469 984.50045,485.77971 991.47301,487.28466 C 997.65591,488.25105 999.08565,491.07892 1005.3626,492.33542"
+ id="path8045"
+ sodipodi:nodetypes="cccccccccccc" />
+ <path
+ style="opacity:1;fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ d="M 876.98133,483.52197 C 879.37991,482.72817 883.08746,487.71407 885.15446,490.56765 C 885.74727,493.24717 886.30823,496.0541 885.91207,502.68948 C 886.6972,505.10702 888.59256,505.72043 890.7103,505.97248 C 893.82775,505.4357 896.58699,504.64818 898.0339,502.94202 C 899.9055,501.00035 903.34643,505.33596 906.11512,506.98263 C 909.72521,508.89472 913.8889,508.96149 917.98442,509.25547 C 919.688,509.02483 920.35482,513.77062 921.26741,517.3367 C 921.65155,521.71476 920.38197,524.23239 919.49965,527.18568 C 919.20535,529.68223 922.48815,530.71542 925.8131,531.73137 C 928.99554,532.47261 932.35734,533.39321 934.90447,533.49914 C 940.04633,534.37405 942.99321,536.18966 947.0263,537.53975 C 949.26544,538.3563 950.28649,539.78191 951.57199,541.07528"
+ id="path8047"
+ sodipodi:nodetypes="ccccccccccccc" />
+ <path
+ style="opacity:0.25;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter8814);enable-background:new"
+ d="M 332,187.69519 C 332,187.69519 389.5,162.19519 389.5,159.69519 C 389.5,157.19519 395,107.69519 395,107.69519 C 395,107.69519 486,59.195189 486.5,57.195189 C 487,55.195189 572.5,-4.8048114 572.5,-4.8048114 L 386.5,17.195189 L 311,123.19519 L 332,187.69519 z"
+ id="path8049"
+ clip-path="url(#clipPath8514)"
+ transform="translate(276,136)" />
+ <path
+ style="opacity:0.25;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 1697.2846,722.5514 C 1697.2846,722.5514 1581.3191,796.0905 1574.2481,800.33314 C 1567.177,804.57578 1343.7312,937.51186 1343.7312,937.51186 L 1347.9739,977.10984 L 1564.3486,876.70067 L 1681.7283,774.8773 L 1697.2846,722.5514 z"
+ id="path8051" />
+ <path
+ style="opacity:0.5;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter8810);enable-background:accumulate"
+ d="M 528.91587,556.85291 C 523.25902,555.4387 347.89654,631.80623 347.89654,631.80623 L 313.95541,812.82557 L 365.05087,1006.7738 L 622.25397,1074.4551 C 622.25397,1074.4551 828.72915,1227.1901 834.386,1222.9475 C 840.04286,1218.7049 1002.6774,1029.2002 1002.6774,1029.2002 L 842.87128,845.35248 L 796.20224,667.16157 L 528.91587,556.85291 z"
+ id="path8053"
+ clip-path="url(#clipPath8610)"
+ sodipodi:nodetypes="cccccscccc"
+ transform="translate(276,136)" />
+ <path
+ style="opacity:1;fill:#0c0c0c;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ d="M 1097.6433,613.88997 C 1097.6433,613.88997 1120.2628,607.38316 1133.386,608.01724 C 1146.5093,608.65133 1164.0276,609.95586 1177.0949,620.20343 C 1190.1622,630.45099 1202.1626,647.3435 1211.2073,678.57308 C 1220.2519,709.80266 1212.9056,777.82509 1205.0312,821.92043 C 1197.1569,866.01577 1176.7661,928.03341 1160.0312,961.92043 C 1143.2964,995.80745 1110.2335,1039.4156 1099.4618,1051.7966 C 1088.0976,1064.8586 1043.2559,1088.2228 1020.0312,1094.0633 C 1025.3346,1083.4567 1068.931,1043.4744 1055.0312,1033.349 C 1041.0123,1023.1367 1009.2712,1079.3314 970.7381,1062.3822 C 992.12041,1049.2501 1012.5175,1011.1961 1004.7787,995.78772 C 996.93846,980.17733 974.07378,1044.5453 911.24317,1032.8006 C 941.29521,1005.2739 966.65023,961.89659 952.50587,949.8209 C 938.09071,937.51403 892.04412,1004.1141 892.04412,1004.1141 C 892.04412,1004.1141 889.22222,962.41287 905.81732,935.50673 C 922.45667,908.52886 985.47029,853.89146 1005.3704,823.80331 C 1025.2706,793.71517 1038.983,757.79429 1047.5059,731.28537 C 1056.0287,704.77645 1063.3068,654.18583 1063.3068,654.18583"
+ id="path8055"
+ sodipodi:nodetypes="czzzzzzczczczczzzc" />
+ <path
+ style="opacity:0.25;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter8818);enable-background:accumulate"
+ d="M 770.74639,609.17881 L 719.8347,706.75955 L 639.93163,817.77531 L 674.57987,889.19309 L 717.00628,968.38906 L 789.13117,923.13422 L 803.27331,730.80117 L 824.48651,592.20825 L 810.34437,502.05213 L 770.74639,609.17881 z"
+ id="path8057"
+ clip-path="url(#clipPath8622)"
+ sodipodi:nodetypes="cccccccccc"
+ transform="translate(276,136)" />
+ <path
+ style="opacity:1;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter8810);enable-background:accumulate"
+ d="M 295,846.19519 L 301.64488,777.27234 C 301.64488,777.27234 391.96439,866.27691 464,900.19519 C 536.03561,934.11347 772,962.19519 772,962.19519 L 926,936.19519 L 890,1098.1952 L 604,1124.1952 L 306,1035.1952 L 295,846.19519 z"
+ id="path8059"
+ clip-path="url(#clipPath8906)"
+ sodipodi:nodetypes="cczcccccc"
+ transform="translate(276,136)" />
+ <path
+ transform="translate(450.03125,73.843964)"
+ style="opacity:1;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter3587);enable-background:new"
+ d="M 405.79629,845.99023 L 480.74961,911.04406 L 483.24924,927.92446 L 502.6526,938.08337 L 509.14464,961.13446 L 540.85369,952.76336 L 555.70293,1000.8466 C 567.95945,1013.5745 645.49637,887.7369 611.56436,1039.0304 L 550.75318,1055.2939 L 461.55026,960.60104 L 398.72523,906.80141 L 405.79629,845.99023 z"
+ id="path8061"
+ sodipodi:nodetypes="cccccccccccc"
+ clip-path="url(#clipPath3602)" />
+ <path
+ style="opacity:1;fill:#121212;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate"
+ d="M 1159.317,918.349 C 1213.6027,916.92043 1285.352,903.29701 1329.317,891.56328 C 1373.3697,879.80614 1455.2033,855.21604 1504.674,833.70614 C 1554.0133,812.25342 1618.2778,774.42454 1658.9599,741.56329 C 1699.468,708.8426 1711.3498,685.74348 1719.6741,707.99186 C 1728.0432,730.35965 1703.2672,764.31748 1681.817,789.06329 C 1660.2128,813.98669 1629.0856,841.76862 1582.8883,878.349 C 1536.691,914.92938 1426.8058,979.93363 1370.0312,1006.9204 C 1312.9652,1034.0458 1241.8279,1065.1589 1197.8884,1079.4205 C 1153.9489,1093.6821 1066.4598,1110.4919 1066.4598,1110.4919 L 1159.317,918.349 z"
+ id="path8063"
+ sodipodi:nodetypes="czzzzzzzzcc" />
+ <path
+ transform="translate(450.03125,73.843964)"
+ style="opacity:0.5;fill:url(#linearGradient3666);fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter3779);enable-background:accumulate"
+ d="M 1241.5965,652.95007 C 1241.5965,652.95007 1176.875,707.28713 1095.9326,751.94501 C 1013.9082,797.19985 811.67556,845.28311 811.67556,845.28311 C 811.67556,845.28311 796.57419,866.33507 856.93045,873.56739 C 917.28671,880.79971 1081.0124,820.2667 1135.5306,777.40085 C 1190.0488,734.535 1255.7387,665.67799 1255.7387,665.67799 L 1241.5965,652.95007 z"
+ id="path8065"
+ sodipodi:nodetypes="czczzcc"
+ clip-path="url(#clipPath3992)" />
+ <g
+ transform="translate(450.03125,73.843964)"
+ style="opacity:1;display:inline;enable-background:new"
+ id="g8067"
+ clip-path="url(#clipPath3986)">
+ <g
+ transform="translate(-174.03125,62.156036)"
+ style="filter:url(#filter3677)"
+ id="g8069">
+ <g
+ style="filter:url(#filter3785)"
+ id="g8071">
+ <path
+ sodipodi:nodetypes="czzccccc"
+ id="path8073"
+ d="M 1094.2857,725.93361 C 1094.2857,725.93361 1093.9896,752.09452 1098.9285,763.79076 C 1103.8674,775.487 1118.9666,790.27741 1127.5,795.21933 C 1136.0334,800.16125 1146.4286,803.79075 1146.4286,803.79075 L 1264.2857,688.79075 L 1282.1429,613.07647 L 1185.7143,651.6479 L 1094.2857,725.93361 z"
+ style="opacity:1;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ transform="translate(174.03125,-62.156036)" />
+ <rect
+ y="486.14224"
+ x="1197.8389"
+ height="309.71277"
+ width="333.75412"
+ id="rect8075"
+ style="opacity:1;fill:none;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate" />
+ </g>
+ </g>
+ <g
+ transform="translate(-174.03125,62.156036)"
+ style="opacity:0.18000004;display:inline;enable-background:new"
+ id="g8077">
+ <g
+ style="filter:url(#filter3785)"
+ id="g8079">
+ <path
+ sodipodi:nodetypes="czzccccc"
+ id="path8081"
+ d="M 1094.2857,725.93361 C 1094.2857,725.93361 1093.9896,752.09452 1098.9285,763.79076 C 1103.8674,775.487 1118.9666,790.27741 1127.5,795.21933 C 1136.0334,800.16125 1146.4286,803.79075 1146.4286,803.79075 L 1264.2857,688.79075 L 1282.1429,613.07647 L 1185.7143,651.6479 L 1094.2857,725.93361 z"
+ style="opacity:1;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ transform="translate(174.03125,-62.156036)" />
+ <rect
+ y="486.14224"
+ x="1197.8389"
+ height="309.71277"
+ width="333.75412"
+ id="rect8083"
+ style="opacity:1;fill:none;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate" />
+ </g>
+ </g>
+ </g>
+ <path
+ transform="translate(450.03125,73.843964)"
+ style="opacity:0.83300003;fill:#050505;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:15;stroke-linecap:butt;stroke-linejoin:miter;marker:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter8225);enable-background:accumulate"
+ d="M 1264.1875,605 C 1259.6964,605.73268 1256.0305,608.45509 1252.25,611.40625 C 1242.1687,619.27601 1224.0805,645.83149 1204.2188,661.875 C 1164.3514,694.07816 1100.2228,731.85201 1051.6562,752.96875 C 1003.0422,774.10613 921.11498,798.78676 877.34375,810.46875 C 833.94554,822.05121 762.29972,835.59982 709.09375,837 L 704.53125,837.125 L 702.53125,841.25 L 609.6875,1033.375 L 603.1875,1046.8438 L 617.84375,1044 C 617.84375,1044 705.11343,1027.3486 750.1875,1012.7188 C 794.9127,998.20213 865.97836,967.05197 923.21875,939.84375 C 980.82199,912.46306 1090.1551,847.86412 1137.5,810.375 C 1183.8608,773.66518 1215.3049,745.65818 1237.4375,720.125 C 1248.3386,707.549 1260.1823,692.59356 1268.4688,677.375 C 1276.7552,662.15644 1287.6285,633.15692 1282.1562,618.53125 C 1280.9385,615.27651 1279.6048,612.46995 1277.5625,610.03125 C 1275.5202,607.59255 1269.0878,608.45926 1269,605 C 1268.7902,596.73518 1265.6845,604.75577 1264.1875,605 z M 1266.3438,620.21875 C 1266.7586,620.80449 1267.3749,621.77641 1268.125,623.78125 C 1271.0218,631.52338 1266.6843,655.68 1259.3125,669.21875 C 1251.9407,682.7575 1236.6741,698.14269 1226.125,710.3125 C 1205.0496,734.62606 1174.2213,762.17406 1128.1875,798.625 C 1083.1379,834.29659 972.72717,899.71959 916.78125,926.3125 C 859.88952,953.35499 788.68509,984.4309 745.53125,998.4375 C 709.16634,1010.2406 649.68654,1022.2713 629.8125,1026.2188 L 714.09375,851.75 C 768.80066,849.7007 837.88634,836.53365 881.21875,824.96875 C 925.55297,813.1365 1007.2974,788.63242 1057.625,766.75 C 1107.737,744.96129 1170.1594,705.58184 1211.6562,672.0625 C 1232.3026,655.38529 1253.4011,629.51662 1261.4688,623.21875 C 1263.9058,621.31633 1265.5494,620.58295 1266.3438,620.21875 z"
+ id="path8085"
+ clip-path="url(#clipPath3722)"
+ sodipodi:nodetypes="cssssccccccssssssssccssssssccssssc" />
+ <g
+ style="opacity:1;display:inline;enable-background:new"
+ id="g8087"
+ mask="url(#mask7704)"
+ transform="matrix(0.9934486,0.1142802,-0.1142802,0.9934486,-9.24324,588.09054)"
+ inkscape:transform-center-x="-185.09603"
+ inkscape:transform-center-y="-12.859654">
+ <path
+ transform="translate(8.0045714e-2,-3.125e-2)"
+ style="fill:#bcb786;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ d="M 1111.4062,-285.9375 L 1107.4688,-284.0625 C 1107.4283,-284.05228 1107.3692,-284.04201 1107.3438,-284.03125 C 1106.925,-283.8184 1107.1791,-283.93067 1106.6875,-283.71875 C 1106.2014,-283.50919 1104.9499,-283.13456 1102.5938,-282.25 C 1099.2626,-280.99942 1096.7895,-280.10016 1095.5938,-279.1875 C 1094.0576,-279.16623 1091.8733,-278.95419 1089.9375,-278.46875 C 1086.956,-277.72108 1085.0823,-277.29474 1083.1875,-276.875 C 1081.2927,-276.45527 1081.512,-276.23281 1080.3125,-276 C 1079.0159,-275.74833 1078.5911,-276.00899 1074.875,-275.21875 C 1071.3851,-274.4766 1065.9802,-273.28768 1064.7188,-272.53125 C 1063.1348,-272.71203 1060.8513,-272.85303 1058.875,-272.5625 C 1055.8346,-272.11554 1053.9588,-271.88974 1052.0312,-271.65625 C 1051.3758,-271.57687 1050.9902,-271.45547 1050.6875,-271.375 C 1050.2613,-271.24334 1050.0017,-271.11498 1049.3125,-271.03125 C 1048.0009,-270.87188 1047.5503,-271.18808 1043.7812,-270.75 C 1040.2273,-270.33691 1034.7758,-269.47718 1033.5312,-268.8125 C 1031.9322,-269.10979 1029.6735,-269.34669 1027.6875,-269.15625 C 1024.6287,-268.86293 1022.7155,-268.67226 1020.7812,-268.5 C 1018.847,-268.32773 1019.0926,-268.07763 1017.875,-267.96875 C 1016.5588,-267.85105 1016.1152,-268.13238 1012.3438,-267.71875 C 1008.8017,-267.3303 1003.3359,-266.50948 1002.0625,-265.84375 C 1000.4636,-266.13844 998.1753,-266.35076 996.1875,-266.15625 C 993.12921,-265.857 991.2463,-265.67601 989.3125,-265.5 C 988.65501,-265.44015 988.27245,-265.32144 987.96875,-265.25 C 987.54105,-265.13104 987.28525,-265.03193 986.59375,-264.96875 C 985.27775,-264.84849 984.834,-265.16363 981.0625,-264.75 C 977.50631,-264.35998 972.0569,-263.51084 970.8125,-262.84375 C 969.21381,-263.13793 966.95265,-263.36747 964.96875,-263.15625 C 961.91305,-262.83092 959.9947,-262.63001 958.0625,-262.4375 C 956.13031,-262.24499 956.37275,-261.99662 955.15625,-261.875 C 953.84137,-261.74353 953.3932,-262.03954 949.625,-261.59375 C 946.08611,-261.17509 940.6473,-260.30158 939.375,-259.625 C 937.77741,-259.90604 935.51505,-260.04543 933.53125,-259.8125 C 930.47927,-259.45413 928.58625,-259.24464 926.65625,-259.03125 C 926.00007,-258.95869 925.6156,-258.85856 925.3125,-258.78125 C 924.88571,-258.65402 924.6276,-258.51405 923.9375,-258.4375 C 922.62411,-258.29181 922.17015,-258.61152 918.40625,-258.125 C 914.85737,-257.66624 909.4276,-256.70598 908.1875,-256 C 906.59441,-256.24424 904.3537,-256.38135 902.375,-256.125 C 899.32741,-255.73018 897.4243,-255.47655 895.5,-255.21875 C 893.57571,-254.96096 893.7739,-254.72522 892.5625,-254.5625 C 891.25301,-254.3866 890.8153,-254.66688 887.0625,-254.09375 C 883.53821,-253.55551 878.1393,-252.39458 876.875,-251.65625 C 875.28751,-251.85979 873.0295,-251.91098 871.0625,-251.5625 C 868.03631,-251.02638 866.1636,-250.70081 864.25,-250.375 C 863.59941,-250.26423 863.2363,-250.10406 862.9375,-250 C 862.51681,-249.83512 862.27405,-249.6687 861.59375,-249.53125 C 860.29905,-249.26966 859.86665,-249.53745 856.15625,-248.71875 C 852.65777,-247.9468 847.31035,-246.33582 846.09375,-245.5 C 844.53085,-245.57745 842.33625,-245.41472 840.40625,-244.90625 C 837.43387,-244.12312 835.58855,-243.67416 833.71875,-243.15625 C 831.84875,-242.63835 832.0521,-242.38897 830.875,-242.0625 C 829.60251,-241.7096 829.17795,-241.95541 825.53125,-240.875 C 822.10657,-239.86037 816.88185,-237.94183 815.65625,-237.03125 C 814.11747,-237.01851 811.93645,-236.75903 810.03125,-236.15625 C 807.10027,-235.22891 805.2809,-234.69783 803.4375,-234.09375 C 802.81071,-233.88837 802.44585,-233.70117 802.15625,-233.5625 C 801.74867,-233.34889 801.50295,-233.15375 800.84375,-232.9375 C 799.58925,-232.52596 799.1576,-232.74846 795.5625,-231.5 C 792.17261,-230.32283 786.96755,-228.2863 785.78125,-227.34375 C 784.25737,-227.28408 782.1312,-226.94888 780.25,-226.28125 C 777.35261,-225.25296 775.55095,-224.60577 773.71875,-223.96875 C 771.88655,-223.33174 772.0909,-223.12021 770.9375,-222.71875 C 769.69071,-222.28479 769.27395,-222.51903 765.71875,-221.15625 C 762.38005,-219.87645 757.23165,-217.6737 756.03125,-216.6875 C 754.52407,-216.57981 752.39555,-216.1887 750.53125,-215.46875 C 747.66307,-214.36115 745.90735,-213.68719 744.09375,-213 C 743.47705,-212.76637 743.0973,-212.55797 742.8125,-212.40625 C 742.81251,-212.40625 742.8125,-212.37673 742.8125,-212.375 L 734.8125,-209.1875 L 722.3366,-205.69561 L 730.26626,-186.41789 C 729.67463,-184.44432 742.8125,-191.15625 742.8125,-191.15625 C 743.03891,-191.30093 743.26145,-191.42886 743.53125,-191.53125 C 744.61177,-191.94123 745.70285,-191.74702 749.53125,-193.21875 C 753.35977,-194.69049 754.7553,-195.22373 755.4375,-195.625 C 756.11711,-196.02478 757.04925,-196.50437 757.65625,-197.15625 C 759.48317,-197.294 761.22705,-197.64948 762.59375,-198.15625 C 765.56175,-199.25677 767.4691,-199.96244 769.375,-200.625 C 771.28081,-201.28754 771.72915,-202.03987 772.78125,-202.40625 C 773.87287,-202.78636 774.97635,-202.57163 778.84375,-203.9375 C 782.71115,-205.30336 784.1269,-205.76458 784.8125,-206.15625 C 785.51361,-206.55677 786.5133,-207.08923 787.125,-207.75 C 789.09581,-207.80466 790.94195,-208.13463 792.40625,-208.625 C 795.40777,-209.63008 797.3324,-210.24671 799.25,-210.875 C 800.78861,-211.3791 801.42415,-211.92177 802.15625,-212.3125 C 802.38647,-212.44681 802.63215,-212.56623 802.90625,-212.65625 C 804.00457,-213.01673 805.0877,-212.73762 809,-213.96875 C 812.91231,-215.19988 814.366,-215.6417 815.0625,-216 C 815.75641,-216.35697 816.6926,-216.79261 817.3125,-217.40625 C 819.17771,-217.42891 820.94835,-217.67308 822.34375,-218.09375 C 825.37415,-219.00729 827.33615,-219.52385 829.28125,-220.0625 C 831.22637,-220.60114 831.70745,-221.32702 832.78125,-221.625 C 833.89527,-221.93415 835.00125,-221.61761 838.96875,-222.65625 C 842.93625,-223.69488 844.38625,-224.08898 845.09375,-224.40625 C 845.82855,-224.73584 846.90765,-225.15997 847.53125,-225.78125 C 849.52907,-225.66525 851.3887,-225.80134 852.875,-226.15625 C 855.95311,-226.89125 857.9584,-227.25719 859.9375,-227.65625 C 861.52541,-227.97643 862.1818,-228.4468 862.9375,-228.75 C 863.17501,-228.8568 863.4044,-228.94276 863.6875,-229 C 864.82091,-229.22919 865.99215,-228.79107 870.03125,-229.5 C 874.07067,-230.20893 875.5315,-230.42709 876.25,-230.6875 C 876.96581,-230.94694 877.95435,-231.25474 878.59375,-231.78125 C 880.51795,-231.54176 882.34165,-231.55672 883.78125,-231.78125 C 886.90767,-232.26887 888.9358,-232.48192 890.9375,-232.75 C 892.93921,-233.01807 893.42625,-233.69514 894.53125,-233.84375 C 895.67767,-233.99793 896.8071,-233.54218 900.875,-234.0625 C 904.94281,-234.58282 906.43525,-234.75823 907.15625,-235 C 907.89337,-235.24714 908.95435,-235.58623 909.59375,-236.125 C 911.64375,-235.78947 913.56745,-235.72704 915.09375,-235.90625 C 918.23595,-236.27521 920.27375,-236.46561 922.28125,-236.6875 C 923.89207,-236.86552 924.5459,-237.2957 925.3125,-237.53125 C 925.55341,-237.61677 925.80655,-237.68685 926.09375,-237.71875 C 927.24345,-237.84647 928.39505,-237.3721 932.46875,-237.84375 C 936.54245,-238.3154 938.0278,-238.45435 938.75,-238.6875 C 939.46941,-238.91977 940.45025,-239.16096 941.09375,-239.65625 C 943.03005,-239.32279 944.8638,-239.25201 946.3125,-239.40625 C 949.45851,-239.7412 951.49,-239.92484 953.5,-240.125 C 955.50991,-240.32514 955.98415,-240.95139 957.09375,-241.0625 C 958.24485,-241.17778 959.39025,-240.69744 963.46875,-241.125 C 967.54725,-241.55256 969.05765,-241.68709 969.78125,-241.90625 C 970.52047,-242.13011 971.57685,-242.4195 972.21875,-242.9375 C 974.27575,-242.53883 976.2206,-242.4441 977.75,-242.59375 C 980.89871,-242.90185 982.9258,-243.067 984.9375,-243.25 C 986.55151,-243.39682 987.20055,-243.81055 987.96875,-244.03125 C 988.21005,-244.11211 988.4623,-244.16116 988.75,-244.1875 C 989.90211,-244.29295 991.0429,-243.79475 995.125,-244.1875 C 999.20711,-244.58025 1000.7139,-244.71834 1001.4375,-244.9375 C 1002.1584,-245.15583 1003.1371,-245.3852 1003.7812,-245.875 C 1005.7193,-245.52501 1007.5501,-245.42062 1009,-245.5625 C 1012.1487,-245.8706 1014.1758,-246.03575 1016.1875,-246.21875 C 1018.1991,-246.40174 1018.7017,-247.05677 1019.8125,-247.15625 C 1020.9648,-247.25948 1022.1047,-246.77142 1026.1875,-247.15625 C 1030.2704,-247.54107 1031.7762,-247.65725 1032.5,-247.875 C 1033.2393,-248.09743 1034.2956,-248.38949 1034.9375,-248.90625 C 1036.9949,-248.50448 1038.9404,-248.40292 1040.4688,-248.5625 C 1043.6153,-248.89102 1045.6458,-249.0852 1047.6562,-249.28125 C 1049.2692,-249.43854 1049.9219,-249.91273 1050.6875,-250.15625 C 1050.9282,-250.24429 1051.1507,-250.27762 1051.4375,-250.3125 C 1052.5858,-250.4522 1053.7542,-249.97259 1057.8125,-250.5625 C 1061.8708,-251.15242 1063.3743,-251.33964 1064.0938,-251.59375 C 1064.8104,-251.84691 1065.7684,-252.15182 1066.4062,-252.6875 C 1068.3259,-252.47556 1070.1262,-252.53609 1071.5625,-252.78125 C 1074.6816,-253.31365 1076.6741,-253.70986 1078.6562,-254.09375 C 1080.6383,-254.47762 1081.1305,-255.1334 1082.2188,-255.375 C 1083.3475,-255.62566 1084.489,-255.25871 1088.4688,-256.25 C 1092.4483,-257.24127 1093.8983,-257.6693 1094.5938,-258.03125 C 1095.316,-258.40725 1096.3555,-258.90183 1096.9688,-259.5625 C 1098.9317,-259.57454 1100.7625,-259.85355 1102.1875,-260.40625 C 1105.1387,-261.55085 1107.0607,-262.27567 1108.875,-263.15625 C 1110.3307,-263.86277 1111.1941,-264.85828 1111.4062,-265.15625 C 1111.6185,-265.4542 1111.5051,-265.8848 1111.5312,-265.90625 C 1111.5742,-265.94148 1111.8716,-266.00028 1112.0312,-266.34375 C 1112.8902,-268.19082 1114.3544,-271.97139 1114.4688,-272.65625 C 1114.5825,-273.33839 1114.6368,-274.00902 1114.6875,-274.40625 C 1114.7169,-274.63575 1114.5404,-275.28515 1114.5625,-275.34375 C 1114.5934,-275.42579 1114.8508,-275.59432 1114.9062,-275.84375 C 1115.1725,-277.04206 1114.9953,-278.05111 1114.7812,-279.46875 C 1114.5673,-280.88638 1113.8096,-284.08338 1113.1562,-284.9375 C 1112.4973,-285.79922 1111.9314,-285.94801 1111.4062,-285.9375 z"
+ id="path8089"
+ sodipodi:nodetypes="ccssscsssscssssscsssscssssscsssscssssscsssscssssscsssscssssscsssscssscccccssscssssscsssssscssssscsssssscssssscsssssscssssscsssssscssssscsssssscssssscsssssssssssc" />
+ <g
+ clip-path="url(#clipPath7421)"
+ id="g8091">
+ <path
+ id="path8093"
+ d="M 1107.409,-284.04961 C 1106.9903,-283.83678 1107.2534,-283.95572 1106.7618,-283.7438 C 1106.2757,-283.53426 1105.0384,-283.16941 1102.6822,-282.28485 C 1099.3511,-281.03428 1096.852,-280.13141 1095.6563,-279.21875 C 1094.1202,-279.19749 1091.9358,-278.98544 1090,-278.5 C 1087.0185,-277.75234 1085.1448,-277.32599 1083.25,-276.90625 C 1081.3552,-276.48653 1081.5745,-276.26406 1080.375,-276.03125 C 1079.0784,-275.77959 1078.6536,-276.04024 1074.9375,-275.25 C 1071.4476,-274.50786 1066.0427,-273.31893 1064.7813,-272.5625 C 1063.1974,-272.74329 1060.9138,-272.88428 1058.9375,-272.59375 C 1055.8971,-272.1468 1054.0213,-271.92099 1052.0938,-271.6875 C 1051.4384,-271.60813 1051.0527,-271.48672 1050.75,-271.40625 C 1050.3238,-271.2746 1050.0642,-271.14623 1049.375,-271.0625 C 1048.0634,-270.90314 1047.6128,-271.21933 1043.8438,-270.78125 C 1040.2899,-270.36817 1034.8384,-269.50843 1033.5938,-268.84375 C 1031.9948,-269.14105 1029.736,-269.37794 1027.75,-269.1875 C 1024.6912,-268.89419 1022.778,-268.70351 1020.8438,-268.53125 C 1018.9095,-268.35899 1019.1551,-268.10888 1017.9375,-268 C 1016.6213,-267.88231 1016.1777,-268.16363 1012.4063,-267.75 C 1008.8644,-267.36156 1003.3984,-266.54073 1002.125,-265.875 C 1000.5261,-266.1697 998.23783,-266.38201 996.25,-266.1875 C 993.19176,-265.88826 991.30887,-265.70726 989.375,-265.53125 C 988.71751,-265.47141 988.33496,-265.35269 988.03125,-265.28125 C 987.6036,-265.1623 987.34774,-265.06318 986.65625,-265 C 985.34029,-264.87975 984.89649,-265.19488 981.125,-264.78125 C 977.56886,-264.39124 972.11946,-263.54209 970.875,-262.875 C 969.27637,-263.16919 967.01516,-263.39872 965.03125,-263.1875 C 961.97565,-262.86218 960.05721,-262.66126 958.125,-262.46875 C 956.19279,-262.27625 956.43513,-262.02787 955.21875,-261.90625 C 953.90387,-261.77479 953.45577,-262.07079 949.6875,-261.625 C 946.14863,-261.20635 940.70982,-260.33283 939.4375,-259.65625 C 937.83995,-259.9373 935.57754,-260.07668 933.59375,-259.84375 C 930.54177,-259.48539 928.64867,-259.27589 926.71875,-259.0625 C 926.06255,-258.98995 925.67809,-258.88981 925.375,-258.8125 C 924.94823,-258.68528 924.69009,-258.5453 924,-258.46875 C 922.68667,-258.32307 922.23254,-258.64277 918.46875,-258.15625 C 914.91986,-257.6975 909.49012,-256.73723 908.25,-256.03125 C 906.65695,-256.27549 904.41619,-256.4126 902.4375,-256.15625 C 899.38991,-255.76144 897.48679,-255.5078 895.5625,-255.25 C 893.63822,-254.99221 893.83639,-254.75647 892.625,-254.59375 C 891.31554,-254.41785 890.87781,-254.69813 887.125,-254.125 C 883.60071,-253.58676 878.20185,-252.42583 876.9375,-251.6875 C 875.35,-251.89104 873.092,-251.94223 871.125,-251.59375 C 868.09883,-251.05763 866.22611,-250.73206 864.3125,-250.40625 C 863.66189,-250.29548 863.29879,-250.13531 863,-250.03125 C 862.57933,-249.86637 862.33655,-249.69995 861.65625,-249.5625 C 860.3616,-249.30091 859.92913,-249.5687 856.21875,-248.75 C 852.72022,-247.97805 847.3728,-246.36707 846.15625,-245.53125 C 844.59347,-245.6087 842.39867,-245.44597 840.46875,-244.9375 C 837.49631,-244.15437 835.65114,-243.70541 833.78125,-243.1875 C 831.91137,-242.6696 832.11465,-242.42022 830.9375,-242.09375 C 829.66504,-241.74085 829.24047,-241.98666 825.59375,-240.90625 C 822.16905,-239.89162 816.94431,-237.97308 815.71875,-237.0625 C 814.17992,-237.04976 811.99892,-236.79028 810.09375,-236.1875 C 807.16269,-235.26016 805.34344,-234.72908 803.5,-234.125 C 802.87324,-233.91962 802.50827,-233.73242 802.21875,-233.59375 C 801.81112,-233.38014 801.56541,-233.185 800.90625,-232.96875 C 799.65179,-232.55721 799.22014,-232.77971 795.625,-231.53125 C 792.23515,-230.35408 787.03002,-228.31755 785.84375,-227.375 C 784.31986,-227.31533 782.1937,-226.98013 780.3125,-226.3125 C 777.41511,-225.28421 775.61342,-224.63702 773.78125,-224 C 771.94908,-223.36299 772.1534,-223.15146 771,-222.75 C 769.75322,-222.31604 769.33639,-222.55028 765.78125,-221.1875 C 762.44258,-219.9077 757.2941,-217.70495 756.09375,-216.71875 C 754.58657,-216.61106 752.45806,-216.21995 750.59375,-215.5 C 747.72557,-214.3924 745.96995,-213.71844 744.15625,-213.03125 C 743.53959,-212.79762 743.15984,-212.58922 742.875,-212.4375 C 742.875,-212.4375 742.875,-211.34375 742.875,-211.34375 C 742.98678,-211.56611 743.26099,-212.16118 743.78125,-212.4375 C 744.47922,-212.80822 748.59488,-214.43087 750.59375,-215.15625 C 752.25061,-215.7575 754.74764,-216.48493 756.5625,-216.46875 C 756.86412,-216.46606 757.15012,-216.41785 757.40625,-216.375 C 759.24874,-216.06675 764.875,-214.8125 764.875,-214.8125 C 764.87499,-214.8125 758.64151,-216.45925 757.84375,-216.65625 C 757.65296,-216.70336 757.30803,-216.72497 756.875,-216.71875 C 758.02046,-217.58846 761.636,-219.11226 764.21875,-220.15625 C 767.05697,-221.30352 767.33556,-221.40807 769.28125,-221.8125 C 771.28955,-222.22994 772.4375,-222.3125 772.4375,-222.3125 C 772.4375,-222.31249 772.35514,-222.91364 773.40625,-223.4375 C 774.11135,-223.78891 778.29327,-225.3299 780.3125,-226 C 782.2644,-226.64773 785.3699,-227.3585 787.1875,-227 C 789.05073,-226.6325 794.71875,-225.1875 794.71875,-225.1875 C 794.71876,-225.1875 788.43175,-227.05861 787.625,-227.28125 C 787.43208,-227.3345 787.09416,-227.36729 786.65625,-227.375 C 787.81459,-228.20788 791.45069,-229.57032 794.0625,-230.53125 C 796.93266,-231.58726 797.22984,-231.69305 799.1875,-232.0625 C 801.04099,-232.41229 802.04634,-232.48798 802.21875,-232.5 C 802.33235,-232.71724 802.5962,-233.31002 803.125,-233.5625 C 803.83444,-233.90124 808.05107,-235.27525 810.09375,-235.875 C 811.78692,-236.37211 814.33452,-236.91177 816.1875,-236.78125 C 816.49545,-236.75957 816.80099,-236.68399 817.0625,-236.625 C 818.94368,-236.20068 824.65625,-234.59375 824.65625,-234.59375 C 824.65626,-234.59375 818.31451,-236.659 817.5,-236.90625 C 817.30521,-236.96539 816.94212,-237.01019 816.5,-237.03125 C 817.66949,-237.8288 821.36302,-239.08747 824,-239.96875 C 826.89781,-240.93722 827.23301,-240.97207 829.21875,-241.25 C 831.2684,-241.53689 832.40625,-241.5625 832.40625,-241.5625 C 832.40623,-241.5625 832.3335,-242.16947 833.40625,-242.625 C 834.12585,-242.93057 838.39723,-244.12575 840.46875,-244.625 C 842.47119,-245.10758 845.66724,-245.55329 847.53125,-245.03125 C 849.44203,-244.4961 855.25,-242.53125 855.25,-242.53125 C 855.25,-242.53125 848.82734,-244.95476 848,-245.25 C 847.80216,-245.32061 847.41784,-245.39039 846.96875,-245.4375 C 848.15665,-246.16615 851.88402,-247.21158 854.5625,-247.9375 C 857.50592,-248.73525 857.85458,-248.70833 859.875,-248.84375 C 861.78789,-248.97198 862.82205,-248.91484 863,-248.90625 C 863.11728,-249.10991 863.39176,-249.68573 863.9375,-249.875 C 864.66969,-250.12894 869.01602,-250.92289 871.125,-251.25 C 872.87313,-251.52111 875.52588,-251.7347 877.4375,-251.34375 C 877.75516,-251.27879 878.04272,-251.15824 878.3125,-251.0625 C 880.25324,-250.37377 886.15625,-247.96875 886.15625,-247.96875 C 886.15626,-247.96875 879.62154,-250.91952 878.78125,-251.28125 C 878.58028,-251.36776 878.20612,-251.44804 877.75,-251.53125 C 878.9565,-252.16443 882.77956,-252.92685 885.5,-253.4375 C 888.48953,-253.99869 888.80023,-253.96704 890.84375,-253.96875 C 892.95301,-253.97052 894.15625,-253.84375 894.15625,-253.84375 C 894.15625,-253.84374 894.08354,-254.47494 895.1875,-254.78125 C 895.92802,-254.98672 900.31362,-255.61512 902.4375,-255.84375 C 904.49052,-256.06474 907.75613,-256.09597 909.65625,-255.375 C 911.60404,-254.63593 917.5,-252 917.5,-252 C 917.50002,-252 910.93712,-255.17897 910.09375,-255.5625 C 909.89207,-255.65423 909.55154,-255.74871 909.09375,-255.84375 C 910.30467,-256.44563 914.07817,-257.09259 916.8125,-257.5 C 919.8173,-257.94772 920.13801,-257.9517 922.1875,-257.90625 C 924.12795,-257.86323 925.19449,-257.71202 925.375,-257.6875 C 925.49392,-257.88066 925.7589,-258.45333 926.3125,-258.59375 C 927.05521,-258.78213 931.46679,-259.32803 933.59375,-259.53125 C 935.35678,-259.69967 938.01384,-259.76554 939.9375,-259.28125 C 940.25718,-259.20077 940.54101,-259.07766 940.8125,-258.96875 C 942.76543,-258.18526 948.71875,-255.5 948.71875,-255.5 C 948.71873,-255.5 942.12684,-258.75348 941.28125,-259.15625 C 941.07903,-259.25257 940.70899,-259.36328 940.25,-259.46875 C 941.46414,-260.04302 945.29366,-260.59094 948.03125,-260.96875 C 951.03963,-261.38395 951.35432,-261.41138 953.40625,-261.34375 C 955.52423,-261.27394 956.71875,-261.09375 956.71875,-261.09375 C 956.71873,-261.09375 956.6415,-261.73116 957.75,-262 C 958.49362,-262.18035 962.90176,-262.66355 965.03125,-262.84375 C 967.08972,-263.01792 970.37449,-262.96807 972.28125,-262.1875 C 974.23584,-261.38734 980.15625,-258.65625 980.15625,-258.65625 C 980.15623,-258.65625 973.59632,-261.96501 972.75,-262.375 C 972.54763,-262.47305 972.17814,-262.5781 971.71875,-262.6875 C 972.93392,-263.2514 976.72883,-263.8018 979.46875,-264.15625 C 982.47966,-264.54577 982.79006,-264.5539 984.84375,-264.46875 C 986.78814,-264.38815 987.85038,-264.21551 988.03125,-264.1875 C 988.15041,-264.37836 988.41402,-264.93281 988.96875,-265.0625 C 989.71301,-265.2365 994.11868,-265.71297 996.25,-265.875 C 998.01662,-266.00927 1000.6997,-266.00071 1002.625,-265.5 C 1002.945,-265.41679 1003.2283,-265.29873 1003.5,-265.1875 C 1005.4546,-264.38734 1011.4063,-261.625 1011.4063,-261.625 C 1011.4062,-261.625 1004.8151,-264.96501 1003.9688,-265.375 C 1003.7664,-265.47305 1003.3969,-265.57811 1002.9375,-265.6875 C 1004.1526,-266.2514 1007.9788,-266.77056 1010.7188,-267.125 C 1013.7297,-267.51453 1014.0713,-267.5539 1016.125,-267.46875 C 1018.2447,-267.38087 1019.4375,-267.15625 1019.4375,-267.15625 C 1019.4375,-267.15625 1019.3591,-267.80527 1020.4688,-268.0625 C 1021.2131,-268.23506 1025.6183,-268.68586 1027.75,-268.84375 C 1029.8106,-268.99635 1033.0929,-268.94052 1035,-268.15625 C 1036.955,-267.3523 1042.875,-264.65625 1042.875,-264.65625 C 1042.875,-264.65625 1036.3152,-267.93212 1035.4688,-268.34375 C 1035.2663,-268.44219 1034.897,-268.54597 1034.4375,-268.65625 C 1035.6529,-269.21779 1039.4494,-269.78403 1042.1875,-270.15625 C 1045.1965,-270.5653 1045.5102,-270.57183 1047.5625,-270.5 C 1049.5056,-270.43201 1050.5697,-270.33515 1050.75,-270.3125 C 1050.8688,-270.5069 1051.1346,-271.04131 1051.6875,-271.1875 C 1052.4293,-271.38362 1056.8186,-272.01628 1058.9375,-272.28125 C 1060.6939,-272.50086 1063.3428,-272.61356 1065.25,-272.25 C 1065.5669,-272.18959 1065.8558,-272.06062 1066.125,-271.96875 C 1068.0612,-271.30783 1073.9688,-269.03125 1073.9688,-269.03125 C 1073.9687,-269.03125 1067.4321,-271.8378 1066.5938,-272.1875 C 1066.3933,-272.27113 1066.0176,-272.36083 1065.5625,-272.4375 C 1066.7662,-273.08796 1070.5816,-273.80945 1073.2813,-274.4375 C 1076.248,-275.1277 1076.5702,-275.19257 1078.5938,-275.3125 C 1080.6824,-275.4363 1081.875,-275.34375 1081.875,-275.34375 C 1081.875,-275.34374 1081.788,-275.9758 1082.875,-276.375 C 1083.6042,-276.6428 1087.9222,-277.71297 1090,-278.1875 C 1092.0085,-278.64619 1095.1679,-279.2168 1097,-278.8125 C 1098.8781,-278.39804 1110.5782,-275.79687 1110.5782,-275.79687 C 1110.5782,-275.79687 1098.2507,-278.81953 1097.4375,-279.0625 C 1097.243,-279.12062 1096.8789,-279.16876 1096.4375,-279.1875 C 1097.6051,-279.99119 1099.9517,-280.8748 1102.5469,-281.89062 C 1104.2283,-282.5488 1103.4706,-282.26721 1105.3228,-282.89422 C 1107.0764,-283.48788 1107.8082,-283.90493 1107.9532,-284.00721 C 1108.2993,-284.21372 1107.5972,-284.12909 1107.409,-284.04961 z"
+ style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter7001);enable-background:new"
+ sodipodi:nodetypes="czscsssscssssscsssscssssscsssscssssscsssscssssscsssscssssscsssscssccsssscscsscssscscsscsssscscsscssscscsscsssscscsscssscscsscsssscscsscssscscsscsssscscsscssscscsscsssscscsscssscscsscc" />
+ <path
+ id="path8095"
+ d="M 1082.625,-275.125 C 1084.498,-274.73152 1087.1211,-273.97945 1088.6563,-273.15625 C 1090.1915,-272.33306 1091.4785,-272.10025 1094.0313,-270.65625 C 1096.5579,-269.22699 1098.8271,-268.64929 1101,-268.125 C 1103.3476,-267.55858 1106.4354,-267.40977 1109.8438,-266.9375 C 1108.7549,-267.77725 1103.2364,-268.10995 1101.4375,-268.5 C 1099.6386,-268.89006 1097.5434,-269.51616 1094.8438,-270.8125 C 1092.1441,-272.10884 1091.3494,-272.61146 1089.0313,-273.5 C 1086.7131,-274.38854 1085.0269,-274.88314 1082.625,-275.125 z"
+ style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter6949);enable-background:new" />
+ <path
+ id="path8097"
+ d="M 1051.4688,-270 C 1053.3741,-269.42241 1055.9969,-268.38428 1057.5625,-267.40625 C 1059.1281,-266.42823 1060.4427,-266.04644 1063.0625,-264.28125 C 1065.6555,-262.53409 1068.0484,-261.57198 1070.3125,-260.6875 C 1072.7586,-259.73193 1075.9951,-259.03037 1079.7188,-257.625 C 1078.5292,-258.76284 1072.6557,-260.31175 1070.7813,-261 C 1068.9068,-261.68825 1066.6995,-262.5662 1063.9063,-264.28125 C 1061.113,-265.99629 1060.3327,-266.56515 1057.9688,-267.6875 C 1055.6047,-268.80984 1053.9121,-269.52205 1051.4688,-270 z"
+ style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter6961);enable-background:new" />
+ <path
+ id="path8099"
+ d="M 1020.2188,-266.84375 C 1022.1307,-266.20564 1024.8,-265.08839 1026.375,-264.03125 C 1027.9501,-262.9741 1029.2706,-262.52258 1031.9063,-260.625 C 1034.5149,-258.74679 1036.9347,-257.59497 1039.2188,-256.5625 C 1041.6865,-255.44705 1044.9833,-254.3892 1048.75,-252.71875 C 1047.5467,-253.94128 1041.5472,-256.03298 1039.6563,-256.84375 C 1037.7653,-257.65452 1035.5914,-258.73754 1032.7813,-260.59375 C 1029.9711,-262.44995 1029.1595,-263.07068 1026.7813,-264.3125 C 1024.403,-265.5543 1022.6706,-266.28819 1020.2188,-266.84375 z"
+ style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter6957);enable-background:new" />
+ <path
+ id="path8101"
+ d="M 1110.1719,-266.89063 C 1110.3227,-266.84207 1110.8599,-266.25963 1110.2813,-265.40625 C 1109.4712,-264.21166 1104.5764,-262.08196 1101.7188,-261.28125 C 1098.8739,-260.48413 1095.4287,-260.30351 1091.1563,-261.65625 C 1086.8547,-263.0182 1085.6866,-264.12497 1080.5,-265.96875 C 1085.164,-263.85358 1086.6953,-262.01642 1090.625,-260.625 C 1092.2457,-260.05113 1093.9921,-259.6854 1095.6875,-259.59375 C 1095.2424,-259.26812 1094.1572,-258.61045 1092.125,-258 C 1089.3295,-257.16031 1085.4759,-256.46622 1083.875,-256.375 C 1082.3604,-256.28868 1080.733,-256.88749 1080.4375,-257 C 1080.6042,-256.89692 1080.8107,-256.62266 1080.1875,-255.96875 C 1079.2882,-255.02512 1074.0401,-254.04575 1071.0625,-253.71875 C 1068.0982,-253.3932 1064.5409,-253.73471 1060.1563,-255.625 C 1056.1783,-257.33997 1054.8173,-258.54036 1050.75,-260.375 C 1050.75,-260.375 1050.75,-260.21875 1050.75,-260.21875 C 1054.3931,-258.12346 1056.034,-256.33548 1059.625,-254.65625 C 1061.3552,-253.84716 1063.2167,-253.24749 1065.0313,-252.9375 C 1064.4964,-252.65074 1063.4735,-252.22599 1061.5938,-251.90625 C 1058.7248,-251.41829 1054.7848,-251.09011 1053.1563,-251.15625 C 1052.3056,-251.19079 1051.4277,-251.34062 1050.75,-251.5625 C 1050.0652,-251.77738 1049.5603,-252.00717 1049.4375,-252.0625 C 1049.6069,-251.95529 1049.8686,-251.65962 1049.2188,-251.03125 C 1048.3091,-250.15163 1042.9727,-249.69487 1039.9688,-249.5625 C 1036.9783,-249.43071 1033.3799,-250.01313 1028.9688,-252.125 C 1024.5276,-254.25126 1023.3273,-255.5266 1018.0625,-257.90625 C 1022.7968,-255.30921 1024.349,-253.27715 1028.4063,-251.1875 C 1030.0796,-250.32565 1031.8915,-249.69325 1033.6563,-249.25 C 1033.193,-249.01668 1032.0669,-248.56186 1029.9688,-248.3125 C 1027.0825,-247.96952 1023.1342,-247.81962 1021.5,-247.9375 C 1019.9538,-248.049 1018.2688,-248.79446 1017.9688,-248.9375 C 1018.1379,-248.81721 1018.3826,-248.52702 1017.75,-247.9375 C 1016.8372,-247.08677 1011.5059,-246.67538 1008.5,-246.5625 C 1005.5075,-246.45013 1001.9103,-247.05293 997.5,-249.15625 C 993.49875,-251.06448 992.11197,-252.29408 988.03125,-254.25 C 988.03122,-254.25 988.03125,-254.09375 988.03125,-254.09375 C 991.68631,-251.88983 993.32546,-250.0412 996.9375,-248.1875 C 998.67779,-247.29435 1000.5745,-246.65923 1002.4063,-246.21875 C 1001.8663,-245.97045 1000.8282,-245.60342 998.9375,-245.375 C 996.05182,-245.02642 992.07145,-244.85405 990.4375,-244.96875 C 989.58405,-245.02865 988.71119,-245.22666 988.03125,-245.46875 C 987.34415,-245.70405 986.8419,-245.94101 986.71875,-246 C 986.88873,-245.88773 987.18323,-245.57775 986.53125,-244.96875 C 985.6186,-244.11625 980.25592,-243.67538 977.25,-243.5625 C 974.25754,-243.45013 970.65654,-244.09055 966.25,-246.15625 C 961.81347,-248.23603 960.60312,-249.48796 955.34375,-251.8125 C 960.07313,-249.26501 961.63449,-247.2347 965.6875,-245.1875 C 967.35905,-244.34317 969.17304,-243.72107 970.9375,-243.28125 C 970.47427,-243.04703 969.3478,-242.59718 967.25,-242.34375 C 964.36431,-241.99517 960.4138,-241.77423 958.78125,-241.875 C 957.23669,-241.97032 955.58094,-242.70385 955.28125,-242.84375 C 955.45024,-242.72522 955.66317,-242.4399 955.03125,-241.84375 C 954.11939,-240.98347 948.7846,-240.5135 945.78125,-240.375 C 942.7913,-240.2371 939.2138,-240.82568 934.8125,-242.84375 C 930.81942,-244.67464 929.44739,-245.87295 925.375,-247.75 C 925.37498,-247.75 925.375,-247.59375 925.375,-247.59375 C 929.02261,-245.46048 930.64533,-243.65888 934.25,-241.875 C 935.98675,-241.01549 937.85727,-240.42486 939.6875,-240 C 939.14803,-239.7471 938.13687,-239.35871 936.25,-239.09375 C 933.37022,-238.68939 929.41187,-238.44813 927.78125,-238.53125 C 926.92953,-238.57466 926.05355,-238.7398 925.375,-238.96875 C 924.68931,-239.19076 924.1854,-239.41214 924.0625,-239.46875 C 924.23209,-239.35976 924.4944,-239.0591 923.84375,-238.4375 C 922.93296,-237.56736 917.59354,-237.04598 914.59375,-236.875 C 911.60742,-236.70479 908.01994,-237.19077 903.625,-239.15625 C 899.20011,-241.13513 898.01904,-242.38444 892.78125,-244.53125 C 897.49122,-242.14358 899.05142,-240.14252 903.09375,-238.1875 C 904.7609,-237.38119 906.55418,-236.79092 908.3125,-236.40625 C 907.85087,-236.15755 906.7155,-235.694 904.625,-235.375 C 901.7494,-234.93624 897.8446,-234.6419 896.21875,-234.6875 C 894.68052,-234.73062 892.98595,-235.43272 892.6875,-235.5625 C 892.85583,-235.44968 893.09807,-235.14875 892.46875,-234.53125 C 891.56063,-233.64015 886.2658,-233.003 883.28125,-232.71875 C 880.31007,-232.43577 876.70783,-232.89455 872.34375,-234.65625 C 868.38441,-236.25456 867.0146,-237.45112 863,-238.96875 C 863.00003,-238.96875 863,-238.8125 863,-238.8125 C 866.5959,-237.00115 868.23831,-235.23017 871.8125,-233.65625 C 873.53457,-232.8979 875.39998,-232.3673 877.21875,-232.03125 C 876.68266,-231.75217 875.65217,-231.34362 873.78125,-230.96875 C 870.92586,-230.39665 866.99183,-229.94936 865.375,-229.9375 C 864.53049,-229.93129 863.66892,-230.01844 863,-230.1875 C 862.32409,-230.34901 861.83991,-230.51673 861.71875,-230.5625 C 861.88597,-230.46848 862.14142,-230.17902 861.5,-229.5 C 860.60213,-228.54948 855.31352,-227.58292 852.375,-227.0625 C 849.44966,-226.54441 845.94285,-226.68826 841.65625,-228.09375 C 837.34045,-229.50882 836.18348,-230.62369 831.09375,-232.0625 C 835.6706,-230.31149 837.1823,-228.50244 841.125,-227.0625 C 842.75108,-226.46861 844.49385,-226.10685 846.21875,-225.90625 C 845.7659,-225.60923 844.66397,-225.02286 842.625,-224.4375 C 839.82028,-223.63233 835.98614,-222.86167 834.40625,-222.6875 C 832.9115,-222.5227 831.29002,-223.00431 831,-223.09375 C 831.16356,-223.00368 831.39278,-222.73382 830.78125,-222.03125 C 829.89878,-221.0174 824.73673,-219.6596 821.84375,-218.96875 C 818.96373,-218.28097 815.50815,-218.20873 811.28125,-219.40625 C 807.4464,-220.4927 806.10867,-221.47862 802.21875,-222.53125 C 802.21874,-222.53125 802.21875,-222.375 802.21875,-222.375 C 805.70293,-220.98015 807.28816,-219.4556 810.75,-218.34375 C 812.41793,-217.80803 814.20578,-217.55701 815.96875,-217.46875 C 815.44911,-217.11663 814.46836,-216.55423 812.65625,-215.9375 C 809.89059,-214.99625 806.06601,-214.00213 804.5,-213.78125 C 803.68206,-213.66586 802.8669,-213.65842 802.21875,-213.75 C 801.56379,-213.83321 801.08615,-213.96827 800.96875,-214 C 801.13079,-213.92536 801.40274,-213.65956 800.78125,-212.90625 C 799.91125,-211.85172 794.77162,-210.247 791.90625,-209.46875 C 789.05372,-208.69399 785.64713,-208.51055 781.46875,-209.5625 C 777.26192,-210.62163 776.11206,-211.60416 771.125,-212.71875 C 775.60954,-211.25929 777.09435,-209.58352 780.9375,-208.46875 C 782.52254,-208.00898 784.22429,-207.8305 785.90625,-207.78125 C 785.46468,-207.44449 784.39374,-206.75352 782.40625,-206 C 779.67232,-204.96351 775.95427,-203.83731 774.40625,-203.5625 C 772.94163,-203.30248 771.34667,-203.67904 771.0625,-203.75 C 771.22275,-203.67035 771.44294,-203.42902 770.84375,-202.6875 C 769.97909,-201.61744 764.92723,-199.86935 762.09375,-199 C 759.27295,-198.13453 755.88625,-197.84369 751.75,-198.78125 C 747.99741,-199.63186 746.70215,-200.49772 742.875,-201.375 C 742.875,-201.375 742.875,-201.21875 742.875,-201.21875 C 746.30296,-199.98096 747.86241,-198.58645 751.25,-197.6875 C 752.88216,-197.25436 754.61704,-197.10449 756.34375,-197.125 C 755.83482,-196.74083 754.867,-196.10318 753.09375,-195.375 C 750.38741,-194.26366 746.65742,-193.06719 745.125,-192.75 C 744.3246,-192.58431 743.51269,-192.53138 742.875,-192.59375 C 742.875,-192.59375 742.875,-192.07823 742.875,-191.67146 C 742.875,-191.40639 742.875,-191.1875 742.875,-191.1875 C 743.10145,-191.33218 743.32391,-191.46011 743.59375,-191.5625 C 744.67427,-191.97248 745.76536,-191.77827 749.59375,-193.25 C 753.42218,-194.72174 754.81787,-195.25498 755.5,-195.65625 C 756.1796,-196.05603 757.11165,-196.53562 757.71875,-197.1875 C 759.5456,-197.32525 761.2895,-197.68073 762.65625,-198.1875 C 765.62437,-199.28802 767.53162,-199.99369 769.4375,-200.65625 C 771.34336,-201.31879 771.79159,-202.07112 772.84375,-202.4375 C 773.9353,-202.81761 775.03886,-202.60288 778.90625,-203.96875 C 782.7737,-205.33461 784.18941,-205.79583 784.875,-206.1875 C 785.57609,-206.58802 786.57581,-207.12048 787.1875,-207.78125 C 789.1583,-207.83591 791.00435,-208.16588 792.46875,-208.65625 C 795.47023,-209.66133 797.3949,-210.27796 799.3125,-210.90625 C 800.8511,-211.41035 801.48652,-211.95302 802.21875,-212.34375 C 802.44891,-212.47806 802.69449,-212.59748 802.96875,-212.6875 C 804.06698,-213.04798 805.1502,-212.76887 809.0625,-214 C 812.97483,-215.23113 814.42855,-215.67295 815.125,-216.03125 C 815.81888,-216.38822 816.75515,-216.82386 817.375,-217.4375 C 819.24021,-217.46016 821.01081,-217.70433 822.40625,-218.125 C 825.43668,-219.03854 827.39863,-219.5551 829.34375,-220.09375 C 831.28886,-220.63239 831.76993,-221.35827 832.84375,-221.65625 C 833.95776,-221.9654 835.06369,-221.64886 839.03125,-222.6875 C 842.99886,-223.72613 844.44883,-224.12023 845.15625,-224.4375 C 845.89112,-224.76709 846.97008,-225.19122 847.59375,-225.8125 C 849.59149,-225.6965 851.45118,-225.83259 852.9375,-226.1875 C 856.01561,-226.9225 858.02094,-227.28844 860,-227.6875 C 861.58792,-228.00768 862.24429,-228.47805 863,-228.78125 C 863.23757,-228.88805 863.46695,-228.97401 863.75,-229.03125 C 864.88347,-229.26044 866.05448,-228.82232 870.09375,-229.53125 C 874.13308,-230.24018 875.594,-230.45834 876.3125,-230.71875 C 877.02836,-230.97819 878.01678,-231.28599 878.65625,-231.8125 C 880.58052,-231.57301 882.40413,-231.58797 883.84375,-231.8125 C 886.97008,-232.30012 888.9983,-232.51317 891,-232.78125 C 893.00171,-233.04932 893.48869,-233.72639 894.59375,-233.875 C 895.74014,-234.02918 896.86967,-233.57343 900.9375,-234.09375 C 905.00534,-234.61407 906.49763,-234.78948 907.21875,-235.03125 C 907.95585,-235.27839 909.01684,-235.61748 909.65625,-236.15625 C 911.70632,-235.82072 913.63003,-235.75829 915.15625,-235.9375 C 918.29856,-236.30646 920.33619,-236.49686 922.34375,-236.71875 C 923.95451,-236.89677 924.60842,-237.32695 925.375,-237.5625 C 925.61594,-237.64802 925.86912,-237.7181 926.15625,-237.75 C 927.30603,-237.87772 928.45754,-237.40335 932.53125,-237.875 C 936.60499,-238.34665 938.09034,-238.4856 938.8125,-238.71875 C 939.53196,-238.95102 940.51274,-239.19221 941.15625,-239.6875 C 943.09262,-239.35404 944.92631,-239.28326 946.375,-239.4375 C 949.52102,-239.77245 951.55256,-239.95609 953.5625,-240.15625 C 955.57246,-240.35639 956.04664,-240.98264 957.15625,-241.09375 C 958.30739,-241.20903 959.45268,-240.72869 963.53125,-241.15625 C 967.60986,-241.58381 969.12011,-241.71834 969.84375,-241.9375 C 970.5829,-242.16136 971.63947,-242.45075 972.28125,-242.96875 C 974.33835,-242.57008 976.28312,-242.47535 977.8125,-242.625 C 980.96123,-242.9331 982.98834,-243.09825 985,-243.28125 C 986.61407,-243.42807 987.2631,-243.8418 988.03125,-244.0625 C 988.27267,-244.14336 988.52478,-244.19241 988.8125,-244.21875 C 989.96461,-244.3242 991.10546,-243.826 995.1875,-244.21875 C 999.26958,-244.6115 1000.7764,-244.74959 1001.5,-244.96875 C 1002.2209,-245.18708 1003.1997,-245.41645 1003.8438,-245.90625 C 1005.7818,-245.55626 1007.6126,-245.45187 1009.0625,-245.59375 C 1012.2112,-245.90185 1014.2383,-246.067 1016.25,-246.25 C 1018.2616,-246.43299 1018.7642,-247.08802 1019.875,-247.1875 C 1021.0273,-247.29073 1022.1672,-246.80267 1026.25,-247.1875 C 1030.3329,-247.57232 1031.8387,-247.6885 1032.5625,-247.90625 C 1033.3018,-248.12868 1034.3581,-248.42074 1035,-248.9375 C 1037.0574,-248.53573 1039.0029,-248.43417 1040.5313,-248.59375 C 1043.6779,-248.92227 1045.7084,-249.11645 1047.7188,-249.3125 C 1049.3318,-249.46979 1049.9844,-249.94398 1050.75,-250.1875 C 1050.9907,-250.27554 1051.2132,-250.30887 1051.5,-250.34375 C 1052.6483,-250.48345 1053.8167,-250.00384 1057.875,-250.59375 C 1061.9333,-251.18367 1063.4368,-251.37089 1064.1563,-251.625 C 1064.873,-251.87816 1065.8308,-252.18307 1066.4688,-252.71875 C 1068.3885,-252.50681 1070.1887,-252.56734 1071.625,-252.8125 C 1074.7441,-253.3449 1076.7366,-253.74111 1078.7188,-254.125 C 1080.7009,-254.50887 1081.1931,-255.16465 1082.2813,-255.40625 C 1083.4101,-255.65691 1084.5516,-255.28996 1088.5313,-256.28125 C 1092.5109,-257.27253 1093.9609,-257.70055 1094.6563,-258.0625 C 1095.3786,-258.43851 1096.4182,-258.93308 1097.0313,-259.59375 C 1098.9943,-259.6058 1100.825,-259.8848 1102.25,-260.4375 C 1105.2012,-261.58211 1107.1232,-262.30692 1108.9375,-263.1875 C 1110.3932,-263.89403 1111.2723,-264.87391 1111.4844,-265.17188 C 1111.6966,-265.46984 1111.5962,-265.91718 1111.6223,-265.93863 C 1111.6652,-265.97387 1111.9416,-266.0236 1112.1013,-266.36707 C 1112.9602,-268.21415 1114.4223,-272.01166 1114.5365,-272.69652 C 1114.6502,-273.37868 1114.7003,-274.04426 1114.751,-274.44149 C 1114.7804,-274.67101 1114.6043,-275.30693 1114.6264,-275.36553 C 1114.6573,-275.44759 1114.9309,-275.63081 1114.9863,-275.88024 C 1115.2526,-277.07857 1115.0752,-278.07153 1114.8612,-279.48917 C 1114.6472,-280.90681 1113.8775,-284.11131 1113.2243,-284.96543 C 1112.5654,-285.82715 1112.0014,-285.9766 1111.4764,-285.96609 C 1111.2678,-285.69633 1111.6132,-285.703 1111.639,-285.65348 C 1112.3196,-285.60269 1112.573,-285.28484 1113.0582,-284.75686 C 1113.5434,-284.22888 1114.501,-280.8173 1114.6376,-279.36691 C 1114.7742,-277.91652 1114.8276,-276.50671 1114.5496,-275.89827 C 1114.2715,-275.28982 1113.6054,-275.46963 1113.313,-275.40375 C 1113.844,-275.21786 1114.2038,-275.19053 1114.2654,-274.34607 C 1114.3247,-273.53269 1114.1322,-272.70638 1113.7456,-271.54045 C 1113.3544,-270.36044 1111.9004,-267.19047 1111.4599,-266.94168 C 1111.0076,-266.68617 1110.5075,-266.75969 1110.1719,-266.89063 z"
+ style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter6997);enable-background:new"
+ sodipodi:nodetypes="cssscscsscsssccscssssssscscsscsssscscssssssscscsscsssscscssssssscscsscsssscscssssssscscsscsssscscssssssscscsscsssccscsscscssscssssscsssssscssssscsssssscssssscsssssscssssscsssssscssssscsssssscssssscsszsszssszzcczzzczzzc" />
+ <path
+ id="path8103"
+ d="M 988.75,-263.84375 C 990.66161,-263.20935 993.30027,-262.08534 994.875,-261.03125 C 996.44977,-259.97716 997.7711,-259.54873 1000.4063,-257.65625 C 1003.0145,-255.78311 1005.4332,-254.64103 1007.7188,-253.59375 C 1010.1881,-252.46228 1013.4709,-251.43901 1017.25,-249.65625 C 1016.0428,-250.91465 1010.111,-253.0207 1008.2188,-253.84375 C 1006.3266,-254.66679 1004.0908,-255.77424 1001.2813,-257.625 C 998.47169,-259.47575 997.65906,-260.10654 995.28125,-261.34375 C 992.90343,-262.58094 991.20137,-263.29295 988.75,-263.84375 z"
+ style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter6953);enable-background:new" />
+ <path
+ id="path8105"
+ d="M 957.5,-260.78125 C 959.41,-260.16315 962.08288,-259.07191 963.65625,-258.03125 C 965.22964,-256.99059 966.55233,-256.54873 969.1875,-254.65625 C 971.79573,-252.7831 974.21442,-251.64104 976.5,-250.59375 C 978.96931,-249.46228 982.25213,-248.439 986.03125,-246.65625 C 984.82397,-247.91465 978.82971,-250.05195 976.9375,-250.875 C 975.04533,-251.69804 972.84084,-252.8055 970.03125,-254.65625 C 967.22167,-256.507 966.4383,-257.09557 964.0625,-258.3125 C 961.68672,-259.52941 959.94929,-260.25135 957.5,-260.78125 z"
+ style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter6993);enable-background:new" />
+ <path
+ id="path8107"
+ d="M 926.09375,-257.375 C 928.00147,-256.77755 930.64723,-255.71116 932.21875,-254.6875 C 933.79025,-253.66385 935.08897,-253.24779 937.71875,-251.40625 C 940.32166,-249.58352 942.74762,-248.43405 945.03125,-247.40625 C 947.49845,-246.29584 950.7866,-245.31302 954.5625,-243.5625 C 953.35627,-244.8106 947.3906,-246.88059 945.5,-247.6875 C 943.60942,-248.4944 941.39758,-249.57854 938.59375,-251.375 C 935.7899,-253.17144 934.96671,-253.77751 932.59375,-254.96875 C 930.22078,-256.15999 928.54013,-256.87158 926.09375,-257.375 z"
+ style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter6989);enable-background:new" />
+ <path
+ id="path8109"
+ d="M 894.90625,-253.5625 C 896.80838,-253.00895 899.49326,-251.97363 901.0625,-250.96875 C 902.63173,-249.96388 903.93651,-249.56011 906.5625,-247.75 C 909.16162,-245.95836 911.56284,-244.87811 913.84375,-243.875 C 916.30803,-242.79126 919.60359,-241.83471 923.375,-240.125 C 922.1702,-241.36007 916.20084,-243.36978 914.3125,-244.15625 C 912.42418,-244.94272 910.2373,-245.98705 907.4375,-247.75 C 904.63773,-249.51294 903.83831,-250.11836 901.46875,-251.28125 C 899.09918,-252.44413 897.3455,-253.11537 894.90625,-253.5625 z"
+ style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter6985);enable-background:new" />
+ <path
+ id="path8111"
+ d="M 863.71875,-248.65625 C 865.59937,-248.22716 868.22302,-247.27587 869.78125,-246.34375 C 871.33948,-245.41164 872.63358,-245.08599 875.25,-243.34375 C 877.83971,-241.61931 880.23067,-240.63573 882.5,-239.71875 C 884.95176,-238.72806 888.23959,-237.84168 892,-236.21875 C 890.79869,-237.42609 884.84751,-239.28484 882.96875,-240 C 881.09,-240.71517 878.88335,-241.68442 876.09375,-243.375 C 873.30412,-245.06557 872.50914,-245.60322 870.15625,-246.65625 C 867.80333,-247.70926 866.13041,-248.36873 863.71875,-248.65625 z"
+ style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter6965);enable-background:new" />
+ <path
+ id="path8113"
+ d="M 833.15625,-241.375 C 835.00461,-241.07856 837.6257,-240.39868 839.15625,-239.59375 C 840.68683,-238.78882 841.96999,-238.53802 844.53125,-237.0625 C 847.06629,-235.60204 849.42193,-234.73741 851.65625,-234 C 854.07024,-233.20332 857.31336,-232.53311 861.03125,-231.15625 C 859.84354,-232.28498 853.94353,-233.746 852.09375,-234.3125 C 850.24398,-234.879 848.09033,-235.68642 845.34375,-237.15625 C 842.59718,-238.62608 841.84239,-239.07653 839.53125,-239.9375 C 837.2201,-240.79845 835.52654,-241.25759 833.15625,-241.375 z"
+ style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter6981);enable-background:new" />
+ <path
+ id="path8115"
+ d="M 802.90625,-232.3125 C 804.72845,-232.10123 807.27201,-231.51193 808.78125,-230.78125 C 810.2905,-230.05059 811.53693,-229.85127 814.0625,-228.5 C 816.56226,-227.16254 818.89404,-226.45157 821.09375,-225.84375 C 823.47028,-225.18708 826.65839,-224.77087 830.3125,-223.65625 C 829.14515,-224.70121 823.38362,-225.75954 821.5625,-226.21875 C 819.74139,-226.67796 817.61025,-227.34571 814.90625,-228.65625 C 812.20222,-229.96677 811.43519,-230.37615 809.15625,-231.125 C 806.8773,-231.87383 805.243,-232.30431 802.90625,-232.3125 z"
+ style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter6977);enable-background:new" />
+ <path
+ id="path8117"
+ d="M 773.1875,-222.1875 C 774.99859,-222.0088 777.50809,-221.52244 779,-220.84375 C 780.49194,-220.16506 781.7534,-220.04553 784.25,-218.78125 C 786.72107,-217.52987 789.04005,-216.88511 791.21875,-216.34375 C 793.57262,-215.75887 796.71009,-215.44623 800.3125,-214.5 C 799.16166,-215.49116 793.45999,-216.2833 791.65625,-216.6875 C 789.85253,-217.0917 787.74072,-217.70866 785.0625,-218.9375 C 782.38432,-220.16634 781.65905,-220.54839 779.40625,-221.21875 C 777.15346,-221.88909 775.50998,-222.22107 773.1875,-222.1875 z"
+ style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter6973);enable-background:new" />
+ <path
+ id="path8119"
+ d="M 743.5625,-211.1875 C 745.35531,-211.05839 747.83563,-210.63785 749.3125,-210 C 750.7894,-209.36215 752.0286,-209.25844 754.5,-208.0625 C 756.94618,-206.87878 759.22054,-206.31584 761.375,-205.84375 C 763.70267,-205.33372 766.7946,-205.16311 770.375,-204.28125 C 769.23121,-205.25185 763.62741,-205.8719 761.84375,-206.21875 C 760.06008,-206.56559 757.9609,-207.10631 755.3125,-208.25 C 752.66409,-209.39368 751.91755,-209.76631 749.6875,-210.375 C 747.45742,-210.98368 745.86156,-211.28466 743.5625,-211.1875 z"
+ style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter6969);enable-background:new" />
+ <g
+ id="g8121"
+ style="fill:#ffffff;fill-opacity:1;filter:url(#filter7345)">
+ <path
+ sodipodi:nodetypes="czzzczzc"
+ id="path8123"
+ d="M 744.9375,-212.11731 C 744.9375,-212.11731 752.15979,-215.34049 754,-215.61731 C 755.84021,-215.89413 757.35225,-215.62054 760,-215.05481 C 762.64775,-214.48908 768.7357,-212.83963 771.1875,-211.67981 C 773.6393,-210.51999 776.5,-208.11731 776.5,-208.11731 C 776.5,-208.11731 769.35356,-210.8975 766.3125,-211.67981 C 763.27144,-212.46212 758.66789,-213.76355 755.9375,-213.99231 C 753.20711,-214.22107 744.9375,-212.11731 744.9375,-212.11731 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1" />
+ <path
+ sodipodi:nodetypes="czzzczzc"
+ id="path8125"
+ d="M 735.46875,-206.95416 C 735.46875,-206.95416 739.12854,-209.17734 740.96875,-209.45416 C 742.80896,-209.73098 744.6335,-209.20739 747.28125,-208.64166 C 749.929,-208.07593 756.01695,-206.42648 758.46875,-205.26666 C 760.92055,-204.10684 765.03125,-203.14166 765.03125,-203.14166 C 765.03125,-203.14166 756.63481,-204.48435 753.59375,-205.26666 C 750.55269,-206.04897 745.63664,-207.6004 742.90625,-207.82916 C 740.17586,-208.05792 735.46875,-206.95416 735.46875,-206.95416 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ sodipodi:nodetypes="czzzczzc"
+ id="path8127"
+ d="M 759.85042,-217.61116 C 759.85042,-217.61116 768.39412,-220.90973 770.2482,-221.06902 C 772.10229,-221.22832 773.88986,-220.58982 776.4963,-219.85694 C 779.10274,-219.12406 785.07354,-217.091 787.44666,-215.77769 C 789.81978,-214.46438 793.86083,-213.23987 793.86083,-213.23987 C 793.86083,-213.23987 785.5667,-215.11352 782.58152,-216.08754 C 779.59633,-217.06156 774.78883,-218.92232 772.0785,-219.32416 C 769.36817,-219.726 759.85042,-217.61116 759.85042,-217.61116 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ sodipodi:nodetypes="czzzczzc"
+ id="path8129"
+ d="M 775.19813,-223.2266 C 775.19813,-223.2266 782.96946,-226.00904 784.82644,-226.13009 C 786.68341,-226.25113 788.45744,-225.57592 791.04822,-224.78947 C 793.63899,-224.00302 799.56662,-221.8473 801.91216,-220.48535 C 804.25771,-219.1234 808.27265,-217.81585 808.27265,-217.81585 C 808.27265,-217.81585 800.01892,-219.86008 797.05444,-220.89543 C 794.08997,-221.93078 789.32185,-223.89024 786.62038,-224.34786 C 783.91891,-224.80549 775.19813,-223.2266 775.19813,-223.2266 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ inkscape:transform-center-y="-4.3190906"
+ inkscape:transform-center-x="13.852145"
+ sodipodi:nodetypes="czzzczzc"
+ id="path8131"
+ d="M 789.64298,-227.95417 C 789.64298,-227.95417 798.32554,-231.47448 800.18452,-231.55952 C 802.04349,-231.64455 803.8041,-230.9351 806.37915,-230.09859 C 808.9542,-229.2621 814.83894,-226.99193 817.15766,-225.58479 C 819.47638,-224.17764 823.46523,-222.79255 823.46523,-222.79255 C 823.46523,-222.79255 815.25266,-224.99632 812.3088,-226.08891 C 809.36494,-227.1815 804.63568,-229.23299 801.94358,-229.74288 C 799.25149,-230.25276 789.64298,-227.95417 789.64298,-227.95417 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ inkscape:transform-center-y="-4.3190906"
+ inkscape:transform-center-x="13.852145"
+ sodipodi:nodetypes="czzzczzc"
+ id="path8133"
+ d="M 804.49513,-233.32948 C 804.49513,-233.32948 812.30269,-235.91229 814.16167,-235.99733 C 816.02064,-236.08236 817.78125,-235.37291 820.3563,-234.5364 C 822.93135,-233.69991 828.81609,-231.42974 831.13481,-230.0226 C 833.45353,-228.61545 837.44238,-227.23036 837.44238,-227.23036 C 837.44238,-227.23036 829.22981,-229.43413 826.28595,-230.52672 C 823.34209,-231.61931 818.61283,-233.6708 815.92073,-234.18069 C 813.22864,-234.69057 804.49513,-233.32948 804.49513,-233.32948 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ inkscape:transform-center-y="-4.3190906"
+ inkscape:transform-center-x="13.852145"
+ sodipodi:nodetypes="czzzczzc"
+ id="path8135"
+ d="M 819.55763,-237.57948 C 819.55763,-237.57948 828.11519,-240.16229 829.97417,-240.24733 C 831.83314,-240.33236 833.59375,-239.62291 836.1688,-238.7864 C 838.74385,-237.94991 844.62859,-235.67974 846.94731,-234.2726 C 849.26603,-232.86545 853.25488,-231.48036 853.25488,-231.48036 C 853.25488,-231.48036 845.04231,-233.68413 842.09845,-234.77672 C 839.15459,-235.86931 834.42533,-237.9208 831.73323,-238.43069 C 829.04114,-238.94057 819.55763,-237.57948 819.55763,-237.57948 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ inkscape:transform-center-y="-4.9269042"
+ inkscape:transform-center-x="13.64141"
+ sodipodi:nodetypes="czzzczzc"
+ id="path8137"
+ d="M 836.23395,-242.60125 C 836.23395,-242.60125 843.20097,-244.58848 845.06179,-244.56882 C 846.9226,-244.54915 848.64052,-243.7418 851.16444,-242.76177 C 853.68837,-241.78177 859.4361,-239.18419 861.672,-237.64886 C 863.9079,-236.11351 867.81253,-234.50625 867.81253,-234.50625 C 867.81253,-234.50625 859.73692,-237.16847 856.85917,-238.42491 C 853.98143,-239.68136 849.37505,-241.99561 846.71589,-242.65612 C 844.05674,-243.31661 836.23395,-242.60125 836.23395,-242.60125 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ inkscape:transform-center-y="-5.1542119"
+ inkscape:transform-center-x="13.55068"
+ sodipodi:nodetypes="czzzczzc"
+ id="path8139"
+ d="M 850.73028,-246.00461 C 850.73028,-246.00461 858.41812,-248.03229 860.2781,-247.97315 C 862.13807,-247.914 863.83848,-247.07036 866.34103,-246.03699 C 868.84358,-245.00365 874.5349,-242.28467 876.73771,-240.70224 C 878.94053,-239.11979 882.81016,-237.43004 882.81016,-237.43004 C 882.81016,-237.43004 874.79287,-240.26302 871.94244,-241.58026 C 869.09201,-242.89749 864.53578,-245.30898 861.89124,-246.02576 C 859.2467,-246.74254 850.73028,-246.00461 850.73028,-246.00461 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ inkscape:transform-center-y="-5.4740887"
+ inkscape:transform-center-x="13.41151"
+ sodipodi:nodetypes="czzzczzc"
+ id="path8141"
+ d="M 864.82496,-249.21081 C 864.82496,-249.21081 872.99448,-251.17987 874.85184,-251.06477 C 876.70919,-250.94965 878.38342,-250.05521 880.85374,-248.94698 C 883.32405,-247.83877 888.93094,-244.94971 891.08512,-243.30167 C 893.2393,-241.65363 897.05632,-239.84815 897.05632,-239.84815 C 897.05632,-239.84815 889.12793,-242.92121 886.31845,-244.32365 C 883.50896,-245.72609 879.02739,-248.27364 876.40562,-249.06971 C 873.78386,-249.86577 864.82496,-249.21081 864.82496,-249.21081 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ inkscape:transform-center-y="-5.79376"
+ inkscape:transform-center-x="13.258805"
+ sodipodi:nodetypes="czzzczzc"
+ id="path8143"
+ d="M 881.38485,-251.60282 C 881.38485,-251.60282 889.47021,-253.51091 891.32322,-253.33946 C 893.17622,-253.16799 894.82252,-252.22313 897.25804,-251.04038 C 899.69357,-249.85767 905.21013,-246.79968 907.31327,-245.08699 C 909.41641,-243.37429 913.17684,-241.45373 913.17684,-241.45373 C 913.17684,-241.45373 905.34544,-244.76613 902.57984,-246.25323 C 899.81423,-247.74035 895.41209,-250.42282 892.8157,-251.29814 C 890.21933,-252.17345 881.38485,-251.60282 881.38485,-251.60282 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ inkscape:transform-center-y="-5.7433893"
+ inkscape:transform-center-x="13.28378"
+ sodipodi:nodetypes="czzzczzc"
+ id="path8145"
+ d="M 896.58415,-254.34724 C 896.58415,-254.34724 904.22581,-255.77494 906.07962,-255.61239 C 907.93342,-255.44983 909.58424,-254.51289 912.02541,-253.34186 C 914.46659,-252.17086 919.99779,-249.1394 922.10913,-247.43684 C 924.22047,-245.73426 927.99009,-243.83179 927.99009,-243.83179 C 927.99009,-243.83179 920.14286,-247.10653 917.37014,-248.58034 C 914.59743,-250.05414 910.18245,-252.71543 907.58189,-253.57827 C 904.98134,-254.44109 896.58415,-254.34724 896.58415,-254.34724 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ inkscape:transform-center-y="-5.7433893"
+ inkscape:transform-center-x="13.28378"
+ sodipodi:nodetypes="czzzczzc"
+ id="path8147"
+ d="M 911.45328,-255.98544 C 911.45328,-255.98544 920.09494,-257.53814 921.94875,-257.37559 C 923.80255,-257.21303 925.45337,-256.27609 927.89454,-255.10506 C 930.33572,-253.93406 935.86692,-250.9026 937.97826,-249.20004 C 940.0896,-247.49746 943.85922,-245.59499 943.85922,-245.59499 C 943.85922,-245.59499 936.01199,-248.86973 933.23927,-250.34354 C 930.46656,-251.81734 926.05158,-254.47863 923.45102,-255.34147 C 920.85047,-256.20429 911.45328,-255.98544 911.45328,-255.98544 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ inkscape:transform-center-y="-5.7433893"
+ inkscape:transform-center-x="13.28378"
+ sodipodi:nodetypes="czzzczzc"
+ id="path8149"
+ d="M 927.70328,-258.29794 C 927.70328,-258.29794 935.34494,-259.16314 937.19875,-259.00059 C 939.05255,-258.83803 940.70337,-257.90109 943.14454,-256.73006 C 945.58572,-255.55906 951.11692,-252.5276 953.22826,-250.82504 C 955.3396,-249.12246 959.10922,-247.21999 959.10922,-247.21999 C 959.10922,-247.21999 951.26199,-250.49473 948.48927,-251.96854 C 945.71656,-253.44234 941.30158,-256.10363 938.70102,-256.96647 C 936.10047,-257.82929 927.70328,-258.29794 927.70328,-258.29794 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ inkscape:transform-center-y="-5.7433893"
+ inkscape:transform-center-x="13.28378"
+ sodipodi:nodetypes="czzzczzc"
+ id="path8151"
+ d="M 942.82828,-259.48544 C 942.82828,-259.48544 951.40744,-260.97564 953.26125,-260.81309 C 955.11505,-260.65053 956.76587,-259.71359 959.20704,-258.54256 C 961.64822,-257.37156 967.17942,-254.3401 969.29076,-252.63754 C 971.4021,-250.93496 975.17172,-249.03249 975.17172,-249.03249 C 975.17172,-249.03249 967.32449,-252.30723 964.55177,-253.78104 C 961.77906,-255.25484 957.36408,-257.91613 954.76352,-258.77897 C 952.16297,-259.64179 942.82828,-259.48544 942.82828,-259.48544 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ inkscape:transform-center-y="-5.7433893"
+ inkscape:transform-center-x="13.28378"
+ sodipodi:nodetypes="czzzczzc"
+ id="path8153"
+ d="M 959.07828,-261.54794 C 959.07828,-261.54794 966.90744,-262.35064 968.76125,-262.18809 C 970.61505,-262.02553 972.26587,-261.08859 974.70704,-259.91756 C 977.14822,-258.74656 982.67942,-255.7151 984.79076,-254.01254 C 986.9021,-252.30996 990.67172,-250.40749 990.67172,-250.40749 C 990.67172,-250.40749 982.82449,-253.68223 980.05177,-255.15604 C 977.27906,-256.62984 972.86408,-259.29113 970.26352,-260.15397 C 967.66297,-261.01679 959.07828,-261.54794 959.07828,-261.54794 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ inkscape:transform-center-y="-5.7433893"
+ inkscape:transform-center-x="13.28378"
+ sodipodi:nodetypes="czzzczzc"
+ id="path8155"
+ d="M 974.45328,-262.79794 C 974.45328,-262.79794 982.84494,-263.97564 984.69875,-263.81309 C 986.55255,-263.65053 988.20337,-262.71359 990.64454,-261.54256 C 993.08572,-260.37156 998.61692,-257.3401 1000.7283,-255.63754 C 1002.8396,-253.93496 1006.6092,-252.03249 1006.6092,-252.03249 C 1006.6092,-252.03249 998.76199,-255.30723 995.98927,-256.78104 C 993.21656,-258.25484 988.80158,-260.91613 986.20102,-261.77897 C 983.60047,-262.64179 974.45328,-262.79794 974.45328,-262.79794 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ inkscape:transform-center-y="-5.7433893"
+ inkscape:transform-center-x="13.28378"
+ sodipodi:nodetypes="czzzczzc"
+ id="path8157"
+ d="M 990.64078,-264.86044 C 990.64078,-264.86044 997.53244,-265.85064 999.38625,-265.68809 C 1001.2401,-265.52553 1002.8909,-264.58859 1005.332,-263.41756 C 1007.7732,-262.24656 1013.3044,-259.2151 1015.4158,-257.51254 C 1017.5271,-255.80996 1021.2967,-253.90749 1021.2967,-253.90749 C 1021.2967,-253.90749 1013.4495,-257.18223 1010.6768,-258.65604 C 1007.9041,-260.12984 1003.4891,-262.79113 1000.8885,-263.65397 C 998.28797,-264.51679 990.64078,-264.86044 990.64078,-264.86044 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ inkscape:transform-center-y="-5.7433893"
+ inkscape:transform-center-x="13.28378"
+ sodipodi:nodetypes="czzzczzc"
+ id="path8159"
+ d="M 1007.7658,-265.79794 C 1007.7658,-265.79794 1014.5949,-266.97564 1016.4488,-266.81309 C 1018.3026,-266.65053 1019.9534,-265.71359 1022.3945,-264.54256 C 1024.8357,-263.37156 1030.3669,-260.3401 1032.4783,-258.63754 C 1034.5896,-256.93496 1038.3592,-255.03249 1038.3592,-255.03249 C 1038.3592,-255.03249 1030.512,-258.30723 1027.7393,-259.78104 C 1024.9666,-261.25484 1020.5516,-263.91613 1017.951,-264.77897 C 1015.3505,-265.64179 1007.7658,-265.79794 1007.7658,-265.79794 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ inkscape:transform-center-y="-5.7433893"
+ inkscape:transform-center-x="13.28378"
+ sodipodi:nodetypes="czzzczzc"
+ id="path8161"
+ d="M 1023.8908,-267.79794 C 1023.8908,-267.79794 1029.9699,-268.22564 1031.8238,-268.06309 C 1033.6776,-267.90053 1035.3284,-266.96359 1037.7695,-265.79256 C 1040.2107,-264.62156 1045.7419,-261.5901 1047.8533,-259.88754 C 1049.9646,-258.18496 1053.7342,-256.28249 1053.7342,-256.28249 C 1053.7342,-256.28249 1045.887,-259.55723 1043.1143,-261.03104 C 1040.3416,-262.50484 1035.9266,-265.16613 1033.326,-266.02897 C 1030.7255,-266.89179 1023.8908,-267.79794 1023.8908,-267.79794 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ inkscape:transform-center-y="-5.7433893"
+ inkscape:transform-center-x="13.28378"
+ sodipodi:nodetypes="czzzczzc"
+ id="path8163"
+ d="M 1039.7033,-269.17294 C 1039.7033,-269.17294 1046.1574,-269.85064 1048.0113,-269.68809 C 1049.8651,-269.52553 1051.5159,-268.58859 1053.957,-267.41756 C 1056.3982,-266.24656 1061.9294,-263.2151 1064.0408,-261.51254 C 1066.1521,-259.80996 1069.9217,-257.90749 1069.9217,-257.90749 C 1069.9217,-257.90749 1062.0745,-261.18223 1059.3018,-262.65604 C 1056.5291,-264.12984 1052.1141,-266.79113 1049.5135,-267.65397 C 1046.913,-268.51679 1039.7033,-269.17294 1039.7033,-269.17294 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ inkscape:transform-center-y="-5.1360724"
+ inkscape:transform-center-x="13.55813"
+ sodipodi:nodetypes="czzzczzc"
+ id="path8165"
+ d="M 1055.2718,-271.03319 C 1055.2718,-271.03319 1060.7694,-271.94264 1062.6296,-271.88667 C 1064.4897,-271.83067 1066.1915,-270.98993 1068.6957,-269.96081 C 1071.2001,-268.93171 1076.896,-266.22241 1079.1015,-264.64372 C 1081.307,-263.06501 1085.1795,-261.38182 1085.1795,-261.38182 C 1085.1795,-261.38182 1077.1575,-264.20121 1074.3047,-265.5136 C 1071.4521,-266.82598 1066.8918,-269.22973 1064.246,-269.94203 C 1061.6003,-270.65431 1055.2718,-271.03319 1055.2718,-271.03319 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ inkscape:transform-center-y="-4.6370147"
+ inkscape:transform-center-x="13.74758"
+ sodipodi:nodetypes="czzzczzc"
+ id="path8167"
+ d="M 1072.7007,-273.48537 C 1072.7007,-273.48537 1077.2479,-274.64118 1079.1087,-274.67158 C 1080.9694,-274.70196 1082.7083,-273.94109 1085.2576,-273.02927 C 1087.807,-272.1175 1093.6225,-269.67541 1095.899,-268.20077 C 1098.1753,-266.72609 1102.1217,-265.22441 1102.1217,-265.22441 C 1102.1217,-265.22441 1093.9775,-267.66852 1091.067,-268.84713 C 1088.1565,-270.02573 1083.4896,-272.21528 1080.8136,-272.80404 C 1078.1377,-273.39279 1072.7007,-273.48537 1072.7007,-273.48537 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ inkscape:transform-center-y="-4.4842392"
+ inkscape:transform-center-x="13.79933"
+ sodipodi:nodetypes="czzzczzc"
+ id="path8169"
+ d="M 1087.1585,-276.5244 C 1087.1585,-276.5244 1093.1185,-278.29795 1094.9787,-278.35464 C 1096.8387,-278.41131 1098.5883,-277.67509 1101.1502,-276.79939 C 1103.7122,-275.92373 1103.6728,-275.94226 1106.4837,-275.30924 C 1109.2806,-274.67938 1113.5604,-273.79611 1113.5604,-273.79611 C 1113.5604,-273.79611 1109.9449,-273.81239 1106.7681,-274.26225 C 1103.6526,-274.70344 1099.3938,-275.9605 1096.7097,-276.51138 C 1094.0258,-277.06226 1087.1585,-276.5244 1087.1585,-276.5244 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new" />
+ <path
+ sodipodi:nodetypes="czczc"
+ id="path8171"
+ d="M 1099.25,-279.92981 C 1099.4112,-279.66119 1110.4581,-284.53027 1111.4375,-284.61731 C 1112.4169,-284.70435 1113.4375,-281.49231 1113.4375,-281.49231 C 1113.4375,-281.49231 1112.6624,-282.99665 1110.5625,-282.55481 C 1108.4626,-282.11297 1099.2616,-279.8834 1099.25,-279.92981 z"
+ style="fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1" />
+ </g>
+ <path
+ id="path8173"
+ d="M 1107.4532,-284.0938 C 1107.0345,-283.88097 1107.2976,-283.99991 1106.806,-283.78799 C 1106.3199,-283.57845 1105.0826,-283.2136 1102.7264,-282.32904 C 1099.3953,-281.07847 1096.8962,-280.1756 1095.7005,-279.26294 C 1094.1644,-279.24168 1091.98,-279.02963 1090.0442,-278.54419 C 1087.0627,-277.79653 1085.189,-277.37018 1083.2942,-276.95044 C 1081.3994,-276.53072 1081.6187,-276.30825 1080.4192,-276.07544 C 1079.1226,-275.82378 1078.6978,-276.08443 1074.9817,-275.29419 C 1071.4918,-274.55205 1066.0869,-273.36312 1064.8255,-272.60669 C 1063.2416,-272.78748 1060.958,-272.92847 1058.9817,-272.63794 C 1055.9413,-272.19099 1054.0655,-271.96518 1052.138,-271.73169 C 1051.4826,-271.65232 1051.0969,-271.53091 1050.7942,-271.45044 C 1050.368,-271.31879 1050.1084,-271.19042 1049.4192,-271.10669 C 1048.1076,-270.94733 1047.657,-271.26352 1043.888,-270.82544 C 1040.3341,-270.41236 1034.8826,-269.55262 1033.638,-268.88794 C 1032.039,-269.18524 1029.7802,-269.42213 1027.7942,-269.23169 C 1024.7354,-268.93838 1022.8222,-268.7477 1020.888,-268.57544 C 1018.9537,-268.40318 1019.1993,-268.15307 1017.9817,-268.04419 C 1016.6655,-267.9265 1016.2219,-268.20782 1012.4505,-267.79419 C 1008.9086,-267.40575 1003.4426,-266.58492 1002.1692,-265.91919 C 1000.5703,-266.21389 998.28202,-266.4262 996.29419,-266.23169 C 993.23595,-265.93245 991.35306,-265.75145 989.41919,-265.57544 C 988.7617,-265.5156 988.37915,-265.39688 988.07544,-265.32544 C 987.64779,-265.20649 987.39193,-265.10737 986.70044,-265.04419 C 985.38448,-264.92394 984.94068,-265.23907 981.16919,-264.82544 C 977.61305,-264.43543 972.16365,-263.58628 970.91919,-262.91919 C 969.32056,-263.21338 967.05935,-263.44291 965.07544,-263.23169 C 962.01984,-262.90637 960.1014,-262.70545 958.16919,-262.51294 C 956.23698,-262.32044 956.47932,-262.07206 955.26294,-261.95044 C 953.94806,-261.81898 953.49996,-262.11498 949.73169,-261.66919 C 946.19282,-261.25054 940.75401,-260.37702 939.48169,-259.70044 C 937.88414,-259.98149 935.62173,-260.12087 933.63794,-259.88794 C 930.58596,-259.52958 928.69286,-259.32008 926.76294,-259.10669 C 926.10674,-259.03414 925.72228,-258.934 925.41919,-258.85669 C 924.99242,-258.72947 924.73428,-258.58949 924.04419,-258.51294 C 922.73086,-258.36726 922.27673,-258.68696 918.51294,-258.20044 C 914.96405,-257.74169 909.53431,-256.78142 908.29419,-256.07544 C 906.70114,-256.31968 904.46038,-256.45679 902.48169,-256.20044 C 899.4341,-255.80563 897.53098,-255.55199 895.60669,-255.29419 C 893.68241,-255.0364 893.88058,-254.80066 892.66919,-254.63794 C 891.35973,-254.46204 890.922,-254.74232 887.16919,-254.16919 C 883.6449,-253.63095 878.24604,-252.47002 876.98169,-251.73169 C 875.39419,-251.93523 873.13619,-251.98642 871.16919,-251.63794 C 868.14302,-251.10182 866.2703,-250.77625 864.35669,-250.45044 C 863.70608,-250.33967 863.34298,-250.1795 863.04419,-250.07544 C 862.62352,-249.91056 862.38074,-249.74414 861.70044,-249.60669 C 860.40579,-249.3451 859.97332,-249.61289 856.26294,-248.79419 C 852.76441,-248.02224 847.41699,-246.41126 846.20044,-245.57544 C 844.63766,-245.65289 842.44286,-245.49016 840.51294,-244.98169 C 837.5405,-244.19856 835.69533,-243.7496 833.82544,-243.23169 C 831.95556,-242.71379 832.15884,-242.46441 830.98169,-242.13794 C 829.70923,-241.78504 829.28466,-242.03085 825.63794,-240.95044 C 822.21324,-239.93581 816.9885,-238.01727 815.76294,-237.10669 C 814.22411,-237.09395 812.04311,-236.83447 810.13794,-236.23169 C 807.20688,-235.30435 805.38763,-234.77327 803.54419,-234.16919 C 802.91743,-233.96381 802.55246,-233.77661 802.26294,-233.63794 C 801.85531,-233.42433 801.6096,-233.22919 800.95044,-233.01294 C 799.69598,-232.6014 799.26433,-232.8239 795.66919,-231.57544 C 792.27934,-230.39827 787.07421,-228.36174 785.88794,-227.41919 C 784.36405,-227.35952 782.23789,-227.02432 780.35669,-226.35669 C 777.4593,-225.3284 775.65761,-224.68121 773.82544,-224.04419 C 771.99327,-223.40718 772.19759,-223.19565 771.04419,-222.79419 C 769.79741,-222.36023 769.38058,-222.59447 765.82544,-221.23169 C 762.48677,-219.95189 757.33829,-217.74914 756.13794,-216.76294 C 754.63076,-216.65525 752.50225,-216.26414 750.63794,-215.54419 C 747.76976,-214.43659 746.01414,-213.76263 744.20044,-213.07544 C 743.58378,-212.84181 743.20403,-212.63341 742.91919,-212.48169 C 742.91919,-212.48169 742.91919,-211.38794 742.91919,-211.38794 C 743.03097,-211.6103 743.30518,-212.20537 743.82544,-212.48169 C 744.52341,-212.85241 748.63907,-214.47506 750.63794,-215.20044 C 752.2948,-215.80169 754.79183,-216.52912 756.60669,-216.51294 C 756.90831,-216.51025 757.19431,-216.46204 757.45044,-216.41919 C 759.29293,-216.11094 764.91919,-214.85669 764.91919,-214.85669 C 764.91918,-214.85669 758.6857,-216.50344 757.88794,-216.70044 C 757.69715,-216.74755 757.35222,-216.76916 756.91919,-216.76294 C 758.06465,-217.63265 761.68019,-219.15645 764.26294,-220.20044 C 767.10116,-221.34771 767.37975,-221.45226 769.32544,-221.85669 C 771.33374,-222.27413 772.48169,-222.35669 772.48169,-222.35669 C 772.48169,-222.35668 772.39933,-222.95783 773.45044,-223.48169 C 774.15554,-223.8331 778.33746,-225.37409 780.35669,-226.04419 C 782.30859,-226.69192 785.41409,-227.40269 787.23169,-227.04419 C 789.09492,-226.67669 794.76294,-225.23169 794.76294,-225.23169 C 794.76295,-225.23169 788.47594,-227.1028 787.66919,-227.32544 C 787.47627,-227.37869 787.13835,-227.41148 786.70044,-227.41919 C 787.85878,-228.25207 791.49488,-229.61451 794.10669,-230.57544 C 796.97685,-231.63145 797.27403,-231.73724 799.23169,-232.10669 C 801.08518,-232.45648 802.09053,-232.53217 802.26294,-232.54419 C 802.37654,-232.76143 802.64039,-233.35421 803.16919,-233.60669 C 803.87863,-233.94543 808.09526,-235.31944 810.13794,-235.91919 C 811.83111,-236.4163 814.37871,-236.95596 816.23169,-236.82544 C 816.53964,-236.80376 816.84518,-236.72818 817.10669,-236.66919 C 818.98787,-236.24487 824.70044,-234.63794 824.70044,-234.63794 C 824.70045,-234.63794 818.3587,-236.70319 817.54419,-236.95044 C 817.3494,-237.00958 816.98631,-237.05438 816.54419,-237.07544 C 817.71368,-237.87299 821.40721,-239.13166 824.04419,-240.01294 C 826.942,-240.98141 827.2772,-241.01626 829.26294,-241.29419 C 831.31259,-241.58108 832.45044,-241.60669 832.45044,-241.60669 C 832.45042,-241.60669 832.37769,-242.21366 833.45044,-242.66919 C 834.17004,-242.97476 838.44142,-244.16994 840.51294,-244.66919 C 842.51538,-245.15177 845.71143,-245.59748 847.57544,-245.07544 C 849.48622,-244.54029 855.29419,-242.57544 855.29419,-242.57544 C 855.29419,-242.57544 848.87153,-244.99895 848.04419,-245.29419 C 847.84635,-245.3648 847.46203,-245.43458 847.01294,-245.48169 C 848.20084,-246.21034 851.92821,-247.25577 854.60669,-247.98169 C 857.55011,-248.77944 857.89877,-248.75252 859.91919,-248.88794 C 861.83208,-249.01617 862.86624,-248.95903 863.04419,-248.95044 C 863.16147,-249.1541 863.43595,-249.72992 863.98169,-249.91919 C 864.71388,-250.17313 869.06021,-250.96708 871.16919,-251.29419 C 872.91732,-251.5653 875.57007,-251.77889 877.48169,-251.38794 C 877.79935,-251.32298 878.08691,-251.20243 878.35669,-251.10669 C 880.29743,-250.41796 886.20044,-248.01294 886.20044,-248.01294 C 886.20045,-248.01294 879.66573,-250.96371 878.82544,-251.32544 C 878.62447,-251.41195 878.25031,-251.49223 877.79419,-251.57544 C 879.00069,-252.20862 882.82375,-252.97104 885.54419,-253.48169 C 888.53372,-254.04288 888.84442,-254.01123 890.88794,-254.01294 C 892.9972,-254.01471 894.20044,-253.88794 894.20044,-253.88794 C 894.20044,-253.88793 894.12773,-254.51913 895.23169,-254.82544 C 895.97221,-255.03091 900.35781,-255.65931 902.48169,-255.88794 C 904.53471,-256.10893 907.80032,-256.14016 909.70044,-255.41919 C 911.64823,-254.68012 917.54419,-252.04419 917.54419,-252.04419 C 917.54421,-252.04419 910.98131,-255.22316 910.13794,-255.60669 C 909.93626,-255.69842 909.59573,-255.7929 909.13794,-255.88794 C 910.34886,-256.48982 914.12236,-257.13678 916.85669,-257.54419 C 919.86149,-257.99191 920.1822,-257.99589 922.23169,-257.95044 C 924.17214,-257.90742 925.23868,-257.75621 925.41919,-257.73169 C 925.53811,-257.92485 925.80309,-258.49752 926.35669,-258.63794 C 927.0994,-258.82632 931.51098,-259.37222 933.63794,-259.57544 C 935.40097,-259.74386 938.05803,-259.80973 939.98169,-259.32544 C 940.30137,-259.24496 940.5852,-259.12185 940.85669,-259.01294 C 942.80962,-258.22945 948.76294,-255.54419 948.76294,-255.54419 C 948.76292,-255.54419 942.17103,-258.79767 941.32544,-259.20044 C 941.12322,-259.29676 940.75318,-259.40747 940.29419,-259.51294 C 941.50833,-260.08721 945.33785,-260.63513 948.07544,-261.01294 C 951.08382,-261.42814 951.39851,-261.45557 953.45044,-261.38794 C 955.56842,-261.31813 956.76294,-261.13794 956.76294,-261.13794 C 956.76292,-261.13794 956.68569,-261.77535 957.79419,-262.04419 C 958.53781,-262.22454 962.94595,-262.70774 965.07544,-262.88794 C 967.13391,-263.06211 970.41868,-263.01226 972.32544,-262.23169 C 974.28003,-261.43153 980.20044,-258.70044 980.20044,-258.70044 C 980.20042,-258.70044 973.64051,-262.0092 972.79419,-262.41919 C 972.59182,-262.51724 972.22233,-262.62229 971.76294,-262.73169 C 972.97811,-263.29559 976.77302,-263.84599 979.51294,-264.20044 C 982.52385,-264.58996 982.83425,-264.59809 984.88794,-264.51294 C 986.83233,-264.43234 987.89457,-264.2597 988.07544,-264.23169 C 988.1946,-264.42255 988.45821,-264.977 989.01294,-265.10669 C 989.7572,-265.28069 994.16287,-265.75716 996.29419,-265.91919 C 998.06081,-266.05346 1000.7439,-266.0449 1002.6692,-265.54419 C 1002.9892,-265.46098 1003.2725,-265.34292 1003.5442,-265.23169 C 1005.4988,-264.43153 1011.4505,-261.66919 1011.4505,-261.66919 C 1011.4504,-261.66919 1004.8593,-265.0092 1004.013,-265.41919 C 1003.8106,-265.51724 1003.4411,-265.6223 1002.9817,-265.73169 C 1004.1968,-266.29559 1008.023,-266.81475 1010.763,-267.16919 C 1013.7739,-267.55872 1014.1155,-267.59809 1016.1692,-267.51294 C 1018.2889,-267.42506 1019.4817,-267.20044 1019.4817,-267.20044 C 1019.4817,-267.20044 1019.4033,-267.84946 1020.513,-268.10669 C 1021.2573,-268.27925 1025.6625,-268.73005 1027.7942,-268.88794 C 1029.8548,-269.04054 1033.1371,-268.98471 1035.0442,-268.20044 C 1036.9992,-267.39649 1042.9192,-264.70044 1042.9192,-264.70044 C 1042.9192,-264.70044 1036.3594,-267.97631 1035.513,-268.38794 C 1035.3105,-268.48638 1034.9412,-268.59016 1034.4817,-268.70044 C 1035.6971,-269.26198 1039.4936,-269.82822 1042.2317,-270.20044 C 1045.2407,-270.60949 1045.5544,-270.61602 1047.6067,-270.54419 C 1049.5498,-270.4762 1050.6139,-270.37934 1050.7942,-270.35669 C 1050.913,-270.55109 1051.1788,-271.0855 1051.7317,-271.23169 C 1052.4735,-271.42781 1056.8628,-272.06047 1058.9817,-272.32544 C 1060.7381,-272.54505 1063.387,-272.65775 1065.2942,-272.29419 C 1065.6111,-272.23378 1065.9,-272.10481 1066.1692,-272.01294 C 1068.1054,-271.35202 1074.013,-269.07544 1074.013,-269.07544 C 1074.0129,-269.07544 1067.4763,-271.88199 1066.638,-272.23169 C 1066.4375,-272.31532 1066.0618,-272.40502 1065.6067,-272.48169 C 1066.8104,-273.13215 1070.6258,-273.85364 1073.3255,-274.48169 C 1076.2922,-275.17189 1076.6144,-275.23676 1078.638,-275.35669 C 1080.7266,-275.48049 1081.9192,-275.38794 1081.9192,-275.38794 C 1081.9192,-275.38793 1081.8322,-276.01999 1082.9192,-276.41919 C 1083.6484,-276.68699 1087.9664,-277.75716 1090.0442,-278.23169 C 1092.0527,-278.69038 1095.2121,-279.26099 1097.0442,-278.85669 C 1098.9223,-278.44223 1110.6224,-275.84106 1110.6224,-275.84106 C 1110.6224,-275.84106 1098.2949,-278.86372 1097.4817,-279.10669 C 1097.2872,-279.16481 1096.9231,-279.21295 1096.4817,-279.23169 C 1097.6493,-280.03538 1099.9959,-280.91899 1102.5911,-281.93481 C 1104.2725,-282.59299 1103.5148,-282.3114 1105.367,-282.93841 C 1107.1206,-283.53207 1107.8524,-283.94912 1107.9974,-284.0514 C 1108.3435,-284.25791 1107.6414,-284.17328 1107.4532,-284.0938 z"
+ style="opacity:0.25;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter7333);enable-background:new"
+ sodipodi:nodetypes="czscsssscssssscsssscssssscsssscssssscsssscssssscsssscssssscsssscssccsssscscsscssscscsscsssscscsscssscscsscsssscscsscssscscsscsssscscsscssscscsscsssscscsscssscscsscsssscscsscssscscsscc" />
+ <path
+ id="path8175"
+ d="M 1082.625,-275.125 C 1084.498,-274.73152 1087.1211,-273.97945 1088.6563,-273.15625 C 1090.1915,-272.33306 1091.4785,-272.10025 1094.0313,-270.65625 C 1096.5579,-269.22699 1098.8271,-268.64929 1101,-268.125 C 1103.3476,-267.55858 1106.4354,-267.40977 1109.8438,-266.9375 C 1108.7549,-267.77725 1103.2364,-268.10995 1101.4375,-268.5 C 1099.6386,-268.89006 1097.5434,-269.51616 1094.8438,-270.8125 C 1092.1441,-272.10884 1091.3494,-272.61146 1089.0313,-273.5 C 1086.7131,-274.38854 1085.0269,-274.88314 1082.625,-275.125 z"
+ style="opacity:0.25;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter7285);enable-background:new" />
+ <path
+ id="path8177"
+ d="M 1051.4688,-270 C 1053.3741,-269.42241 1055.9969,-268.38428 1057.5625,-267.40625 C 1059.1281,-266.42823 1060.4427,-266.04644 1063.0625,-264.28125 C 1065.6555,-262.53409 1068.0484,-261.57198 1070.3125,-260.6875 C 1072.7586,-259.73193 1075.9951,-259.03037 1079.7188,-257.625 C 1078.5292,-258.76284 1072.6557,-260.31175 1070.7813,-261 C 1068.9068,-261.68825 1066.6995,-262.5662 1063.9063,-264.28125 C 1061.113,-265.99629 1060.3327,-266.56515 1057.9688,-267.6875 C 1055.6047,-268.80984 1053.9121,-269.52205 1051.4688,-270 z"
+ style="opacity:0.25;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter7289);enable-background:new" />
+ <path
+ id="path8179"
+ d="M 1020.2188,-266.84375 C 1022.1307,-266.20564 1024.8,-265.08839 1026.375,-264.03125 C 1027.9501,-262.9741 1029.2706,-262.52258 1031.9063,-260.625 C 1034.5149,-258.74679 1036.9347,-257.59497 1039.2188,-256.5625 C 1041.6865,-255.44705 1044.9833,-254.3892 1048.75,-252.71875 C 1047.5467,-253.94128 1041.5472,-256.03298 1039.6563,-256.84375 C 1037.7653,-257.65452 1035.5914,-258.73754 1032.7813,-260.59375 C 1029.9711,-262.44995 1029.1595,-263.07068 1026.7813,-264.3125 C 1024.403,-265.5543 1022.6706,-266.28819 1020.2188,-266.84375 z"
+ style="opacity:0.25;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter7293);enable-background:new" />
+ <path
+ id="path8181"
+ d="M 1110.1719,-266.89063 C 1110.3227,-266.84207 1110.8599,-266.25963 1110.2813,-265.40625 C 1109.4712,-264.21166 1104.5764,-262.08196 1101.7188,-261.28125 C 1098.8739,-260.48413 1095.4287,-260.30351 1091.1563,-261.65625 C 1086.8547,-263.0182 1085.6866,-264.12497 1080.5,-265.96875 C 1085.164,-263.85358 1086.6953,-262.01642 1090.625,-260.625 C 1092.2457,-260.05113 1093.9921,-259.6854 1095.6875,-259.59375 C 1095.2424,-259.26812 1094.1572,-258.61045 1092.125,-258 C 1089.3295,-257.16031 1085.4759,-256.46622 1083.875,-256.375 C 1082.3604,-256.28868 1080.733,-256.88749 1080.4375,-257 C 1080.6042,-256.89692 1080.8107,-256.62266 1080.1875,-255.96875 C 1079.2882,-255.02512 1074.0401,-254.04575 1071.0625,-253.71875 C 1068.0982,-253.3932 1064.5409,-253.73471 1060.1563,-255.625 C 1056.1783,-257.33997 1054.8173,-258.54036 1050.75,-260.375 C 1050.75,-260.375 1050.75,-260.21875 1050.75,-260.21875 C 1054.3931,-258.12346 1056.034,-256.33548 1059.625,-254.65625 C 1061.3552,-253.84716 1063.2167,-253.24749 1065.0313,-252.9375 C 1064.4964,-252.65074 1063.4735,-252.22599 1061.5938,-251.90625 C 1058.7248,-251.41829 1054.7848,-251.09011 1053.1563,-251.15625 C 1052.3056,-251.19079 1051.4277,-251.34062 1050.75,-251.5625 C 1050.0652,-251.77738 1049.5603,-252.00717 1049.4375,-252.0625 C 1049.6069,-251.95529 1049.8686,-251.65962 1049.2188,-251.03125 C 1048.3091,-250.15163 1042.9727,-249.69487 1039.9688,-249.5625 C 1036.9783,-249.43071 1033.3799,-250.01313 1028.9688,-252.125 C 1024.5276,-254.25126 1023.3273,-255.5266 1018.0625,-257.90625 C 1022.7968,-255.30921 1024.349,-253.27715 1028.4063,-251.1875 C 1030.0796,-250.32565 1031.8915,-249.69325 1033.6563,-249.25 C 1033.193,-249.01668 1032.0669,-248.56186 1029.9688,-248.3125 C 1027.0825,-247.96952 1023.1342,-247.81962 1021.5,-247.9375 C 1019.9538,-248.049 1018.2688,-248.79446 1017.9688,-248.9375 C 1018.1379,-248.81721 1018.3826,-248.52702 1017.75,-247.9375 C 1016.8372,-247.08677 1011.5059,-246.67538 1008.5,-246.5625 C 1005.5075,-246.45013 1001.9103,-247.05293 997.5,-249.15625 C 993.49875,-251.06448 992.11197,-252.29408 988.03125,-254.25 C 988.03122,-254.25 988.03125,-254.09375 988.03125,-254.09375 C 991.68631,-251.88983 993.32546,-250.0412 996.9375,-248.1875 C 998.67779,-247.29435 1000.5745,-246.65923 1002.4063,-246.21875 C 1001.8663,-245.97045 1000.8282,-245.60342 998.9375,-245.375 C 996.05182,-245.02642 992.07145,-244.85405 990.4375,-244.96875 C 989.58405,-245.02865 988.71119,-245.22666 988.03125,-245.46875 C 987.34415,-245.70405 986.8419,-245.94101 986.71875,-246 C 986.88873,-245.88773 987.18323,-245.57775 986.53125,-244.96875 C 985.6186,-244.11625 980.25592,-243.67538 977.25,-243.5625 C 974.25754,-243.45013 970.65654,-244.09055 966.25,-246.15625 C 961.81347,-248.23603 960.60312,-249.48796 955.34375,-251.8125 C 960.07313,-249.26501 961.63449,-247.2347 965.6875,-245.1875 C 967.35905,-244.34317 969.17304,-243.72107 970.9375,-243.28125 C 970.47427,-243.04703 969.3478,-242.59718 967.25,-242.34375 C 964.36431,-241.99517 960.4138,-241.77423 958.78125,-241.875 C 957.23669,-241.97032 955.58094,-242.70385 955.28125,-242.84375 C 955.45024,-242.72522 955.66317,-242.4399 955.03125,-241.84375 C 954.11939,-240.98347 948.7846,-240.5135 945.78125,-240.375 C 942.7913,-240.2371 939.2138,-240.82568 934.8125,-242.84375 C 930.81942,-244.67464 929.44739,-245.87295 925.375,-247.75 C 925.37498,-247.75 925.375,-247.59375 925.375,-247.59375 C 929.02261,-245.46048 930.64533,-243.65888 934.25,-241.875 C 935.98675,-241.01549 937.85727,-240.42486 939.6875,-240 C 939.14803,-239.7471 938.13687,-239.35871 936.25,-239.09375 C 933.37022,-238.68939 929.41187,-238.44813 927.78125,-238.53125 C 926.92953,-238.57466 926.05355,-238.7398 925.375,-238.96875 C 924.68931,-239.19076 924.1854,-239.41214 924.0625,-239.46875 C 924.23209,-239.35976 924.4944,-239.0591 923.84375,-238.4375 C 922.93296,-237.56736 917.59354,-237.04598 914.59375,-236.875 C 911.60742,-236.70479 908.01994,-237.19077 903.625,-239.15625 C 899.20011,-241.13513 898.01904,-242.38444 892.78125,-244.53125 C 897.49122,-242.14358 899.05142,-240.14252 903.09375,-238.1875 C 904.7609,-237.38119 906.55418,-236.79092 908.3125,-236.40625 C 907.85087,-236.15755 906.7155,-235.694 904.625,-235.375 C 901.7494,-234.93624 897.8446,-234.6419 896.21875,-234.6875 C 894.68052,-234.73062 892.98595,-235.43272 892.6875,-235.5625 C 892.85583,-235.44968 893.09807,-235.14875 892.46875,-234.53125 C 891.56063,-233.64015 886.2658,-233.003 883.28125,-232.71875 C 880.31007,-232.43577 876.70783,-232.89455 872.34375,-234.65625 C 868.38441,-236.25456 867.0146,-237.45112 863,-238.96875 C 863.00003,-238.96875 863,-238.8125 863,-238.8125 C 866.5959,-237.00115 868.23831,-235.23017 871.8125,-233.65625 C 873.53457,-232.8979 875.39998,-232.3673 877.21875,-232.03125 C 876.68266,-231.75217 875.65217,-231.34362 873.78125,-230.96875 C 870.92586,-230.39665 866.99183,-229.94936 865.375,-229.9375 C 864.53049,-229.93129 863.66892,-230.01844 863,-230.1875 C 862.32409,-230.34901 861.83991,-230.51673 861.71875,-230.5625 C 861.88597,-230.46848 862.14142,-230.17902 861.5,-229.5 C 860.60213,-228.54948 855.31352,-227.58292 852.375,-227.0625 C 849.44966,-226.54441 845.94285,-226.68826 841.65625,-228.09375 C 837.34045,-229.50882 836.18348,-230.62369 831.09375,-232.0625 C 835.6706,-230.31149 837.1823,-228.50244 841.125,-227.0625 C 842.75108,-226.46861 844.49385,-226.10685 846.21875,-225.90625 C 845.7659,-225.60923 844.66397,-225.02286 842.625,-224.4375 C 839.82028,-223.63233 835.98614,-222.86167 834.40625,-222.6875 C 832.9115,-222.5227 831.29002,-223.00431 831,-223.09375 C 831.16356,-223.00368 831.39278,-222.73382 830.78125,-222.03125 C 829.89878,-221.0174 824.73673,-219.6596 821.84375,-218.96875 C 818.96373,-218.28097 815.50815,-218.20873 811.28125,-219.40625 C 807.4464,-220.4927 806.10867,-221.47862 802.21875,-222.53125 C 802.21874,-222.53125 802.21875,-222.375 802.21875,-222.375 C 805.70293,-220.98015 807.28816,-219.4556 810.75,-218.34375 C 812.41793,-217.80803 814.20578,-217.55701 815.96875,-217.46875 C 815.44911,-217.11663 814.46836,-216.55423 812.65625,-215.9375 C 809.89059,-214.99625 806.06601,-214.00213 804.5,-213.78125 C 803.68206,-213.66586 802.8669,-213.65842 802.21875,-213.75 C 801.56379,-213.83321 801.08615,-213.96827 800.96875,-214 C 801.13079,-213.92536 801.40274,-213.65956 800.78125,-212.90625 C 799.91125,-211.85172 794.77162,-210.247 791.90625,-209.46875 C 789.05372,-208.69399 785.64713,-208.51055 781.46875,-209.5625 C 777.26192,-210.62163 776.11206,-211.60416 771.125,-212.71875 C 775.60954,-211.25929 777.09435,-209.58352 780.9375,-208.46875 C 782.52254,-208.00898 784.22429,-207.8305 785.90625,-207.78125 C 785.46468,-207.44449 784.39374,-206.75352 782.40625,-206 C 779.67232,-204.96351 775.95427,-203.83731 774.40625,-203.5625 C 772.94163,-203.30248 771.34667,-203.67904 771.0625,-203.75 C 771.22275,-203.67035 771.44294,-203.42902 770.84375,-202.6875 C 769.97909,-201.61744 764.92723,-199.86935 762.09375,-199 C 759.27295,-198.13453 755.88625,-197.84369 751.75,-198.78125 C 747.99741,-199.63186 746.70215,-200.49772 742.875,-201.375 C 742.875,-201.375 742.875,-201.21875 742.875,-201.21875 C 746.30296,-199.98096 747.86241,-198.58645 751.25,-197.6875 C 752.88216,-197.25436 754.61704,-197.10449 756.34375,-197.125 C 755.83482,-196.74083 754.867,-196.10318 753.09375,-195.375 C 750.38741,-194.26366 746.65742,-193.06719 745.125,-192.75 C 744.3246,-192.58431 743.51269,-192.53138 742.875,-192.59375 C 742.875,-192.59375 742.875,-192.07823 742.875,-191.67146 C 742.875,-191.40639 742.875,-191.1875 742.875,-191.1875 C 743.10145,-191.33218 743.32391,-191.46011 743.59375,-191.5625 C 744.67427,-191.97248 745.76536,-191.77827 749.59375,-193.25 C 753.42218,-194.72174 754.81787,-195.25498 755.5,-195.65625 C 756.1796,-196.05603 757.11165,-196.53562 757.71875,-197.1875 C 759.5456,-197.32525 761.2895,-197.68073 762.65625,-198.1875 C 765.62437,-199.28802 767.53162,-199.99369 769.4375,-200.65625 C 771.34336,-201.31879 771.79159,-202.07112 772.84375,-202.4375 C 773.9353,-202.81761 775.03886,-202.60288 778.90625,-203.96875 C 782.7737,-205.33461 784.18941,-205.79583 784.875,-206.1875 C 785.57609,-206.58802 786.57581,-207.12048 787.1875,-207.78125 C 789.1583,-207.83591 791.00435,-208.16588 792.46875,-208.65625 C 795.47023,-209.66133 797.3949,-210.27796 799.3125,-210.90625 C 800.8511,-211.41035 801.48652,-211.95302 802.21875,-212.34375 C 802.44891,-212.47806 802.69449,-212.59748 802.96875,-212.6875 C 804.06698,-213.04798 805.1502,-212.76887 809.0625,-214 C 812.97483,-215.23113 814.42855,-215.67295 815.125,-216.03125 C 815.81888,-216.38822 816.75515,-216.82386 817.375,-217.4375 C 819.24021,-217.46016 821.01081,-217.70433 822.40625,-218.125 C 825.43668,-219.03854 827.39863,-219.5551 829.34375,-220.09375 C 831.28886,-220.63239 831.76993,-221.35827 832.84375,-221.65625 C 833.95776,-221.9654 835.06369,-221.64886 839.03125,-222.6875 C 842.99886,-223.72613 844.44883,-224.12023 845.15625,-224.4375 C 845.89112,-224.76709 846.97008,-225.19122 847.59375,-225.8125 C 849.59149,-225.6965 851.45118,-225.83259 852.9375,-226.1875 C 856.01561,-226.9225 858.02094,-227.28844 860,-227.6875 C 861.58792,-228.00768 862.24429,-228.47805 863,-228.78125 C 863.23757,-228.88805 863.46695,-228.97401 863.75,-229.03125 C 864.88347,-229.26044 866.05448,-228.82232 870.09375,-229.53125 C 874.13308,-230.24018 875.594,-230.45834 876.3125,-230.71875 C 877.02836,-230.97819 878.01678,-231.28599 878.65625,-231.8125 C 880.58052,-231.57301 882.40413,-231.58797 883.84375,-231.8125 C 886.97008,-232.30012 888.9983,-232.51317 891,-232.78125 C 893.00171,-233.04932 893.48869,-233.72639 894.59375,-233.875 C 895.74014,-234.02918 896.86967,-233.57343 900.9375,-234.09375 C 905.00534,-234.61407 906.49763,-234.78948 907.21875,-235.03125 C 907.95585,-235.27839 909.01684,-235.61748 909.65625,-236.15625 C 911.70632,-235.82072 913.63003,-235.75829 915.15625,-235.9375 C 918.29856,-236.30646 920.33619,-236.49686 922.34375,-236.71875 C 923.95451,-236.89677 924.60842,-237.32695 925.375,-237.5625 C 925.61594,-237.64802 925.86912,-237.7181 926.15625,-237.75 C 927.30603,-237.87772 928.45754,-237.40335 932.53125,-237.875 C 936.60499,-238.34665 938.09034,-238.4856 938.8125,-238.71875 C 939.53196,-238.95102 940.51274,-239.19221 941.15625,-239.6875 C 943.09262,-239.35404 944.92631,-239.28326 946.375,-239.4375 C 949.52102,-239.77245 951.55256,-239.95609 953.5625,-240.15625 C 955.57246,-240.35639 956.04664,-240.98264 957.15625,-241.09375 C 958.30739,-241.20903 959.45268,-240.72869 963.53125,-241.15625 C 967.60986,-241.58381 969.12011,-241.71834 969.84375,-241.9375 C 970.5829,-242.16136 971.63947,-242.45075 972.28125,-242.96875 C 974.33835,-242.57008 976.28312,-242.47535 977.8125,-242.625 C 980.96123,-242.9331 982.98834,-243.09825 985,-243.28125 C 986.61407,-243.42807 987.2631,-243.8418 988.03125,-244.0625 C 988.27267,-244.14336 988.52478,-244.19241 988.8125,-244.21875 C 989.96461,-244.3242 991.10546,-243.826 995.1875,-244.21875 C 999.26958,-244.6115 1000.7764,-244.74959 1001.5,-244.96875 C 1002.2209,-245.18708 1003.1997,-245.41645 1003.8438,-245.90625 C 1005.7818,-245.55626 1007.6126,-245.45187 1009.0625,-245.59375 C 1012.2112,-245.90185 1014.2383,-246.067 1016.25,-246.25 C 1018.2616,-246.43299 1018.7642,-247.08802 1019.875,-247.1875 C 1021.0273,-247.29073 1022.1672,-246.80267 1026.25,-247.1875 C 1030.3329,-247.57232 1031.8387,-247.6885 1032.5625,-247.90625 C 1033.3018,-248.12868 1034.3581,-248.42074 1035,-248.9375 C 1037.0574,-248.53573 1039.0029,-248.43417 1040.5313,-248.59375 C 1043.6779,-248.92227 1045.7084,-249.11645 1047.7188,-249.3125 C 1049.3318,-249.46979 1049.9844,-249.94398 1050.75,-250.1875 C 1050.9907,-250.27554 1051.2132,-250.30887 1051.5,-250.34375 C 1052.6483,-250.48345 1053.8167,-250.00384 1057.875,-250.59375 C 1061.9333,-251.18367 1063.4368,-251.37089 1064.1563,-251.625 C 1064.873,-251.87816 1065.8308,-252.18307 1066.4688,-252.71875 C 1068.3885,-252.50681 1070.1887,-252.56734 1071.625,-252.8125 C 1074.7441,-253.3449 1076.7366,-253.74111 1078.7188,-254.125 C 1080.7009,-254.50887 1081.1931,-255.16465 1082.2813,-255.40625 C 1083.4101,-255.65691 1084.5516,-255.28996 1088.5313,-256.28125 C 1092.5109,-257.27253 1093.9609,-257.70055 1094.6563,-258.0625 C 1095.3786,-258.43851 1096.4182,-258.93308 1097.0313,-259.59375 C 1098.9943,-259.6058 1100.825,-259.8848 1102.25,-260.4375 C 1105.2012,-261.58211 1107.1232,-262.30692 1108.9375,-263.1875 C 1110.3932,-263.89403 1111.2723,-264.87391 1111.4844,-265.17188 C 1111.6966,-265.46984 1111.5962,-265.91718 1111.6223,-265.93863 C 1111.6652,-265.97387 1111.9416,-266.0236 1112.1013,-266.36707 C 1112.9602,-268.21415 1114.4223,-272.01166 1114.5365,-272.69652 C 1114.6502,-273.37868 1114.7003,-274.04426 1114.751,-274.44149 C 1114.7804,-274.67101 1114.6043,-275.30693 1114.6264,-275.36553 C 1114.6573,-275.44759 1114.9309,-275.63081 1114.9863,-275.88024 C 1115.2526,-277.07857 1115.0752,-278.07153 1114.8612,-279.48917 C 1114.6472,-280.90681 1113.8775,-284.11131 1113.2243,-284.96543 C 1112.5654,-285.82715 1112.0014,-285.9766 1111.4764,-285.96609 C 1111.2678,-285.69633 1111.6132,-285.703 1111.639,-285.65348 C 1112.3196,-285.60269 1112.573,-285.28484 1113.0582,-284.75686 C 1113.5434,-284.22888 1114.28,-280.90569 1114.4166,-279.4553 C 1114.5532,-278.00491 1114.6066,-276.5951 1114.3286,-275.98666 C 1114.0505,-275.37821 1113.6054,-275.46963 1113.313,-275.40375 C 1113.844,-275.21786 1113.9828,-275.27892 1114.0444,-274.43446 C 1114.1037,-273.62108 1113.9112,-272.79477 1113.5246,-271.62884 C 1113.1334,-270.44883 1111.6794,-267.27886 1111.2389,-267.03007 C 1110.7866,-266.77456 1110.5075,-266.75969 1110.1719,-266.89063 z"
+ style="opacity:0.25;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter7337);enable-background:new"
+ sodipodi:nodetypes="cssscscsscsssccscssssssscscsscsssscscssssssscscsscsssscscssssssscscsscsssscscssssssscscsscsssscscssssssscscsscsssccscsscscssscssssscsssssscssssscsssssscssssscsssssscssssscsssssscssssscsssssscssssscsszsszssszzcczzzczzzc" />
+ <path
+ id="path8183"
+ d="M 988.75,-263.84375 C 990.66161,-263.20935 993.30027,-262.08534 994.875,-261.03125 C 996.44977,-259.97716 997.7711,-259.54873 1000.4063,-257.65625 C 1003.0145,-255.78311 1005.4332,-254.64103 1007.7188,-253.59375 C 1010.1881,-252.46228 1013.4709,-251.43901 1017.25,-249.65625 C 1016.0428,-250.91465 1010.111,-253.0207 1008.2188,-253.84375 C 1006.3266,-254.66679 1004.0908,-255.77424 1001.2813,-257.625 C 998.47169,-259.47575 997.65906,-260.10654 995.28125,-261.34375 C 992.90343,-262.58094 991.20137,-263.29295 988.75,-263.84375 z"
+ style="opacity:0.25;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter7297);enable-background:new" />
+ <path
+ id="path8185"
+ d="M 957.5,-260.78125 C 959.41,-260.16315 962.08288,-259.07191 963.65625,-258.03125 C 965.22964,-256.99059 966.55233,-256.54873 969.1875,-254.65625 C 971.79573,-252.7831 974.21442,-251.64104 976.5,-250.59375 C 978.96931,-249.46228 982.25213,-248.439 986.03125,-246.65625 C 984.82397,-247.91465 978.82971,-250.05195 976.9375,-250.875 C 975.04533,-251.69804 972.84084,-252.8055 970.03125,-254.65625 C 967.22167,-256.507 966.4383,-257.09557 964.0625,-258.3125 C 961.68672,-259.52941 959.94929,-260.25135 957.5,-260.78125 z"
+ style="opacity:0.25;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter7301);enable-background:new" />
+ <path
+ id="path8187"
+ d="M 926.09375,-257.375 C 928.00147,-256.77755 930.64723,-255.71116 932.21875,-254.6875 C 933.79025,-253.66385 935.08897,-253.24779 937.71875,-251.40625 C 940.32166,-249.58352 942.74762,-248.43405 945.03125,-247.40625 C 947.49845,-246.29584 950.7866,-245.31302 954.5625,-243.5625 C 953.35627,-244.8106 947.3906,-246.88059 945.5,-247.6875 C 943.60942,-248.4944 941.39758,-249.57854 938.59375,-251.375 C 935.7899,-253.17144 934.96671,-253.77751 932.59375,-254.96875 C 930.22078,-256.15999 928.54013,-256.87158 926.09375,-257.375 z"
+ style="opacity:0.25;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter7305);enable-background:new" />
+ <path
+ id="path8189"
+ d="M 894.90625,-253.5625 C 896.80838,-253.00895 899.49326,-251.97363 901.0625,-250.96875 C 902.63173,-249.96388 903.93651,-249.56011 906.5625,-247.75 C 909.16162,-245.95836 911.56284,-244.87811 913.84375,-243.875 C 916.30803,-242.79126 919.60359,-241.83471 923.375,-240.125 C 922.1702,-241.36007 916.20084,-243.36978 914.3125,-244.15625 C 912.42418,-244.94272 910.2373,-245.98705 907.4375,-247.75 C 904.63773,-249.51294 903.83831,-250.11836 901.46875,-251.28125 C 899.09918,-252.44413 897.3455,-253.11537 894.90625,-253.5625 z"
+ style="opacity:0.25;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter7309);enable-background:new" />
+ <path
+ id="path8191"
+ d="M 863.71875,-248.65625 C 865.59937,-248.22716 868.22302,-247.27587 869.78125,-246.34375 C 871.33948,-245.41164 872.63358,-245.08599 875.25,-243.34375 C 877.83971,-241.61931 880.23067,-240.63573 882.5,-239.71875 C 884.95176,-238.72806 888.23959,-237.84168 892,-236.21875 C 890.79869,-237.42609 884.84751,-239.28484 882.96875,-240 C 881.09,-240.71517 878.88335,-241.68442 876.09375,-243.375 C 873.30412,-245.06557 872.50914,-245.60322 870.15625,-246.65625 C 867.80333,-247.70926 866.13041,-248.36873 863.71875,-248.65625 z"
+ style="opacity:0.25;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter7313);enable-background:new" />
+ <path
+ id="path8193"
+ d="M 833.15625,-241.375 C 835.00461,-241.07856 837.6257,-240.39868 839.15625,-239.59375 C 840.68683,-238.78882 841.96999,-238.53802 844.53125,-237.0625 C 847.06629,-235.60204 849.42193,-234.73741 851.65625,-234 C 854.07024,-233.20332 857.31336,-232.53311 861.03125,-231.15625 C 859.84354,-232.28498 853.94353,-233.746 852.09375,-234.3125 C 850.24398,-234.879 848.09033,-235.68642 845.34375,-237.15625 C 842.59718,-238.62608 841.84239,-239.07653 839.53125,-239.9375 C 837.2201,-240.79845 835.52654,-241.25759 833.15625,-241.375 z"
+ style="opacity:0.25;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter7317);enable-background:new" />
+ <path
+ id="path8195"
+ d="M 802.90625,-232.3125 C 804.72845,-232.10123 807.27201,-231.51193 808.78125,-230.78125 C 810.2905,-230.05059 811.53693,-229.85127 814.0625,-228.5 C 816.56226,-227.16254 818.89404,-226.45157 821.09375,-225.84375 C 823.47028,-225.18708 826.65839,-224.77087 830.3125,-223.65625 C 829.14515,-224.70121 823.38362,-225.75954 821.5625,-226.21875 C 819.74139,-226.67796 817.61025,-227.34571 814.90625,-228.65625 C 812.20222,-229.96677 811.43519,-230.37615 809.15625,-231.125 C 806.8773,-231.87383 805.243,-232.30431 802.90625,-232.3125 z"
+ style="opacity:0.25;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter7321);enable-background:new" />
+ <path
+ id="path8197"
+ d="M 773.1875,-222.1875 C 774.99859,-222.0088 777.50809,-221.52244 779,-220.84375 C 780.49194,-220.16506 781.7534,-220.04553 784.25,-218.78125 C 786.72107,-217.52987 789.04005,-216.88511 791.21875,-216.34375 C 793.57262,-215.75887 796.71009,-215.44623 800.3125,-214.5 C 799.16166,-215.49116 793.45999,-216.2833 791.65625,-216.6875 C 789.85253,-217.0917 787.74072,-217.70866 785.0625,-218.9375 C 782.38432,-220.16634 781.65905,-220.54839 779.40625,-221.21875 C 777.15346,-221.88909 775.50998,-222.22107 773.1875,-222.1875 z"
+ style="opacity:0.25;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter7329);enable-background:new" />
+ <path
+ id="path8199"
+ d="M 743.5625,-211.1875 C 745.35531,-211.05839 747.83563,-210.63785 749.3125,-210 C 750.7894,-209.36215 752.0286,-209.25844 754.5,-208.0625 C 756.94618,-206.87878 759.22054,-206.31584 761.375,-205.84375 C 763.70267,-205.33372 766.7946,-205.16311 770.375,-204.28125 C 769.23121,-205.25185 763.62741,-205.8719 761.84375,-206.21875 C 760.06008,-206.56559 757.9609,-207.10631 755.3125,-208.25 C 752.66409,-209.39368 751.91755,-209.76631 749.6875,-210.375 C 747.45742,-210.98368 745.86156,-211.28466 743.5625,-211.1875 z"
+ style="opacity:0.25;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;filter:url(#filter7325);enable-background:new" />
+ </g>
+ </g>
+ <path
+ style="opacity:1;fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ d="M 863.87812,475.6679 C 865.52024,472.4499 867.39593,469.93261 868.73948,465.81892 C 869.5382,462.16103 872.05152,463.78819 875.99995,457.42202 C 877.40188,455.18252 881.47648,457.81338 884.96505,455.02291 C 886.23577,454.21972 887.84993,454.6186 889.44761,454.95978 C 893.213,456.27874 895.27337,458.66333 897.78137,460.76815 C 903.92043,466.73838 918.31551,468.71142 921.26741,467.08161 C 922.70146,464.17687 929.14869,461.67273 933.64178,455.96993 C 934.38989,454.84726 945.37114,447.22547 948.28899,449.40394"
+ id="path8201"
+ sodipodi:nodetypes="ccccccccc" />
+ <path
+ style="opacity:1;fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ d="M 888.50059,465.25071 C 895.864,462.01774 902.31149,456.34231 909.20872,451.86619 C 912.51929,449.89665 916.07855,455.0822 920.00472,455.46485 C 922.30245,455.24672 923.71762,456.66744 925.68683,457.10635 C 930.84319,458.42414 928.08476,460.97123 935.66209,463.54607 C 941.8177,465.26647 944.56949,456.7476 950.56184,456.22247 C 955.43923,455.71948 958.66076,455.90644 962.17859,455.96993 C 966.10555,456.10882 966.25714,452.47233 968.23951,450.66663 C 971.22007,447.86141 975.39512,448.81691 978.38436,445.92573 C 979.4019,444.54105 980.33894,442.91488 981.11895,440.81764 C 982.00096,438.8173 984.15901,441.12362 985.91718,442.08033"
+ id="path8203"
+ sodipodi:nodetypes="ccccccccccc" />
+ </g>
+ <g
+ inkscape:groupmode="layer"
+ id="layer15"
+ inkscape:label="Feet"
+ style="display:inline">
+ <path
+ style="opacity:0.25;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter9048);enable-background:accumulate"
+ d="M 403.27922,1056.3058 L 459.84776,1013.8794 L 531.97265,1028.0215 L 485.30361,1080.3474 L 431.56349,1087.4185 L 403.27922,1056.3058 z"
+ id="path8994" />
+ <path
+ style="opacity:1;fill:#ada469;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ d="M 542.27183,1060.5719 C 540.86456,1079.3731 541.12693,1093.3229 544.35357,1109.8752 C 547.58023,1126.4275 560.75966,1155.7825 564.68798,1173.0589 C 568.61419,1190.326 567.38211,1211.3686 552.22854,1224.2072 C 536.91093,1237.1846 510.17726,1245.8061 484.39623,1239.9409 C 458.61518,1234.0757 414.84716,1190.7175 395.80604,1169.7126 C 376.6939,1148.6293 332.04518,1075.862 317.86751,1045.4368 C 303.68984,1015.0117 305.2079,1008.7182 309.74779,999.90708 C 300.38107,975.38658 297.33408,949.84027 276.03534,924.33044 C 306.36081,927.44488 319.91562,951.28677 336.16102,971.47019 C 330.63113,923.39416 318.10631,907.05369 307.78707,880.74589 C 337.78137,886.82754 358.36643,912.61828 371.76686,953.45839 C 381.32101,949.54048 390.00462,944.08545 401.95427,944.39719 C 390.65677,902.70139 384.00481,874.48135 365.26702,843.32725 C 418.70898,848.99758 448.92404,923.96657 444.23844,931.28805 C 454.21641,929.04406 463.24409,924.75767 474.67497,925.63638 C 463.426,887.28936 453.62716,848.76848 471.01526,806.98819 C 471.01526,806.98819 519.30204,872.42507 525.40492,892.79397 C 531.50779,913.16287 526.92373,931.49448 526.92373,931.49448 C 526.92373,931.49448 543.8833,962.57978 547.21765,982.58862 C 550.59075,1002.83 543.68496,1041.6919 542.27183,1060.5719 z"
+ id="path4189"
+ sodipodi:nodetypes="czzzzzzcccccccccczczz" />
+ <path
+ style="opacity:1;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter3587);enable-background:accumulate"
+ d="M 719.5,738.69519 L 737.81177,754.12715 L 782.2228,738.73894 L 805.5,713.19519 L 816.96397,732.41584 L 847.63558,745.19938 L 872.73295,750.92775 L 892,723.19519 L 908.02309,747.02126 L 947,752.19519 L 957.24541,745.99667 L 964.00012,754.69487 L 989.5,765.69519 L 991.5,725.19519 L 955.94866,710.6576 L 923.45591,689.1305 L 883.0038,677.66492 L 861.69668,662.13148 L 840,685.19519 L 755.02878,638.61208 L 722,676.69519 L 719.5,738.69519 z"
+ id="path4191"
+ sodipodi:nodetypes="cccccccccccccccccccccc"
+ clip-path="url(#clipPath3631)"
+ transform="matrix(-0.9045327,0.2506626,0.2506626,0.9045327,995.28646,23.53493)" />
+ <path
+ style="opacity:0.58775509;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:20.79999924;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:none;stroke-opacity:1;display:inline;filter:url(#filter3898);enable-background:new"
+ d="M 584,696.5 L 577.4375,713.65625 C 577.4375,713.65625 569.62598,734.02113 561.75,757.3125 C 557.81201,768.95818 553.86698,781.35395 550.8125,792.4375 C 547.75802,803.52105 545.47664,812.81736 545.3125,820.71875 C 544.91443,839.88071 551.05903,855.60705 554.25,862.46875 C 553.47847,866.02398 552.25863,871.92307 550.90625,880.5625 C 548.98583,892.83071 547.18798,907.71691 548.53125,920.4375 C 549.91334,933.52585 555.34347,948.62515 561.125,963.46875 C 566.90653,978.31235 573.17935,992.69586 576.34375,1001.5 C 582.97581,1019.9519 586.33671,1033.0763 587.65625,1050 C 588.2376,1057.4561 587.41398,1070.336 586.40625,1083.375 C 585.39852,1096.414 584.21964,1109.6764 584.71875,1120.3438 C 585.70786,1141.4836 594.04673,1167.1785 618.09375,1178.2812 C 640.86858,1188.7966 673.42057,1189.9834 701.53125,1174.8438 C 717.69117,1166.1404 731.60759,1147.7462 744.90625,1127.9375 C 758.20491,1108.1288 769.87542,1086.8841 776.84375,1073.0312 C 792.19667,1042.51 816.23728,957.56702 822.46875,920.3125 C 825.48734,902.26597 826.39041,891.24695 825.09375,882.28125 C 824.11522,875.51521 821.26556,870.13385 818.21875,866.0625 C 820.26149,838.55459 817.48668,814.69372 830.1875,786.65625 L 840.75,763.375 L 816.9375,772.6875 C 799.44775,779.52503 788.03586,791.73286 780.34375,804.75 C 780.02124,805.29577 779.78061,805.85776 779.46875,806.40625 C 779.69078,783.89104 783.87659,768.76866 786.0625,747.71875 L 788.03125,728.71875 L 771,737.375 C 740.40551,752.93071 725.30511,785.56821 721.28125,827.59375 C 717.03593,826.96828 712.44985,826.5741 707.46875,826.75 C 707.17726,787.56964 707.07246,759.71315 716.0625,727.375 L 721.65625,707.25 L 702.21875,714.90625 C 671.30938,727.11019 654.35921,756.83698 645.59375,783.28125 C 641.21102,796.50339 638.84793,809.08246 638,819.21875 C 637.76797,821.99248 637.68894,824.53007 637.6875,826.9375 C 634.44563,826.90109 631.26698,827.07339 627.625,827.4375 C 627.66662,788.43277 624.14076,747.68335 595.34375,710.9375 L 584,696.5 z M 589.8125,740.3125 C 606.61941,770.95633 607.28701,804.27978 606.75,840.0625 L 606.53125,855.125 L 618.56618,848.58579 C 627.22823,845.45277 638.12676,848.35827 650.5,847.75 L 665.17465,857.1066 L 658.84375,831.3125 C 658.7541,831.08253 658.62329,830.89581 658.59375,830.59375 C 658.39424,828.55389 658.37143,825.12068 658.71875,820.96875 C 659.41339,812.66489 661.50832,801.38351 665.34375,789.8125 C 670.49907,774.25956 678.83176,758.62002 690.46875,747.28125 C 685.78494,775.91923 687.25316,807.54059 687.45711,843.08639 L 684.69118,856.34803 L 700.1875,848.75 C 709.2169,845.99229 717.37647,848.40004 729.46875,849.84375 L 742.71507,859.28798 L 741.09375,840 C 742.54168,809.02823 749.31524,786.32192 761.8125,771.125 C 758.82562,790.90384 756.38207,812.9098 762.125,849.46875 L 763.19052,855.84193 L 760.25237,867.35878 L 770.86948,859.1906 L 780.05921,869.41258 L 778.51093,858.94898 L 781.9375,852 C 787.63852,838.78851 792.11032,825.78663 798.28125,815.34375 C 799.24111,813.71941 800.31278,812.27939 801.34375,810.78125 C 797.66309,831.9366 798.91659,850.9894 797.25,868.5625 L 792.56986,876.36948 L 799.96875,876.59375 C 803.1888,880.07736 803.83625,880.44443 804.53125,885.25 C 805.22625,890.05557 804.84987,899.65035 801.96875,916.875 C 796.40076,950.16292 770.12313,994.71481 758.22835,1018.3614 C 751.62344,1031.4918 739.70002,1075.8473 727.105,1094.6079 C 714.50998,1113.3684 698.57363,1134.3752 689.93296,1139.0288 C 668.44244,1150.603 645.37702,1164.5347 629.31407,1157.1183 C 614.93921,1150.4813 606.27438,1135.9256 605.5,1119.375 C 605.11689,1111.187 606.11279,1098.0658 607.125,1084.9688 C 608.13721,1071.8717 618.41391,1062.398 622.54839,1048.4062 C 627.92068,1030.2254 621.10152,1011.8118 610.04839,994.46875 C 603.56184,984.29097 586.07159,970.21085 580.5,955.90625 C 574.92841,941.60165 570.13249,926.9031 569.21875,918.25 C 568.29254,909.47887 569.64125,895.22498 571.4375,883.75 C 573.23375,872.27503 575.28125,863.46875 575.28125,863.46875 L 584.70403,859.85355 L 574.21875,855.96875 C 574.21875,855.96875 565.71986,840.65865 566.125,821.15625 C 566.19611,817.73309 567.96126,808.4282 570.84375,797.96875 C 573.72624,787.5093 577.60841,775.41604 581.46875,764 C 584.51314,754.99692 587.24938,747.39655 589.8125,740.3125 z"
+ id="path4193"
+ clip-path="url(#clipPath3677)"
+ sodipodi:nodetypes="ccssscsssssssssssssccccscccccccccsscccccccccccssscccccccccccccccsccccssssssssssssscccsssc"
+ transform="matrix(-0.9045327,0.2506626,0.2506626,0.9045327,822.28931,10.93589)" />
+ <g
+ id="g3617"
+ clip-path="url(#clipPath3622)"
+ transform="translate(276,136)">
+ <path
+ transform="matrix(-0.9045327,0.2506626,0.2506626,0.9045327,-52.200498,74.09707)"
+ id="path4195"
+ d="M -15.66751,843.48852 L -65.16499,827.93217 L -92.03504,880.25807 L -51.02285,925.51291 L -1.52538,887.32914 L -15.66751,843.48852 z"
+ style="opacity:1;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter9024);enable-background:accumulate" />
+ <path
+ sodipodi:nodetypes="ccccccccccccc"
+ transform="matrix(-0.9045327,0.2506626,0.2506626,0.9045327,-46.92842,75.511284)"
+ id="path4197"
+ d="M 118.70648,859.93048 L 63.552152,813.26144 L 19.711532,850.03099 L 53.652662,903.7711 L 40.055848,989.23313 L 0.61048221,1017.5253 L -40.401718,1028.839 L -43.230138,1075.508 L 13.338402,1100.9639 L 32.282389,1031.3139 L 55.738939,972.45727 L 102.08648,899.84236 L 118.70648,859.93048 z"
+ style="opacity:1;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter9020);enable-background:accumulate" />
+ </g>
+ <path
+ style="opacity:0.25;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter9044);enable-background:accumulate"
+ d="M -70.82184,932.58397 L -10.01066,905.71392 L 90.3985,936.82662 L 26.75889,967.93931 L -55.26549,950.96875 L -70.82184,932.58397 z"
+ id="path4199"
+ transform="matrix(-0.9045327,0.2506626,0.2506626,0.9045327,229.07158,211.51128)" />
+ <path
+ style="opacity:0.58775509;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:20.79999924;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:none;stroke-opacity:1;display:inline;filter:url(#filter4105);enable-background:new"
+ d="M 583.0625,715.75 C 570.95641,750.19974 556.348,784.28333 551.3125,820.59375 C 550.48042,835.52242 555.90165,849.75318 560.15625,863.65625 C 554.24001,890.85751 550.01944,920.5562 561.3125,946.78125 C 574.82967,984.9421 596.31397,1022.4634 593.73529,1064.2495 C 592.78699,1093.5437 584.72085,1125.2436 599.125,1152.5312 C 609.32364,1171.866 632.26456,1179.8429 653.09285,1180.1988 C 680.95504,1181.3729 709.55546,1168.5772 725.09375,1144.9375 C 747.68924,1115.5658 766.89426,1083.4402 780.3324,1048.8777 C 797.22293,1003.3717 810.0042,956.31698 818.26642,908.4788 C 820.09082,895.53774 821.3675,881.00895 813.6875,869.65625 C 810.25635,862.31993 813.72957,854.09611 813.00293,846.34648 C 813.67693,821.35182 817.01525,795.68272 829.65625,773.75 C 811.92312,780.1946 794.58357,790.30971 785.65318,807.61425 C 781.7181,814.3238 778.04836,821.18838 774.28125,828 C 770.73126,797.98592 778.00088,768.35172 781.0625,738.71875 C 760.89646,747.77338 744.18578,764.37397 736.88755,785.40075 C 730.58292,800.98078 728.08533,817.71793 726.625,834.4375 C 718.37166,832.91825 709.94053,832.33595 701.5625,832.9375 C 700.59942,794.23963 701.09554,753.53035 712.53125,717.03125 C 693.85012,723.24901 677.36504,735.76676 666.90322,752.41848 C 653.05068,773.29827 645.64182,798.17243 643.84375,823.03125 C 644.42909,827.35579 643.78249,834.87134 637.5,832.90625 C 632.16882,832.9238 626.87092,833.58508 621.5625,834 C 622.71034,794.61852 618.22106,752.3718 594.5,719.78125 C 591.43929,716.14408 588.86315,712.09687 585.875,708.4375 C 584.9375,710.875 584,713.3125 583.0625,715.75 z M 590.8125,729.59375 C 609.37777,758.89004 613.295,794.41387 612.9375,828.46875 C 613.14159,833.64401 612.42094,840.29795 613.0625,844.53125 C 625.38106,838.4285 639.80162,842.09135 652.84375,842.34375 C 655.16087,843.567 656.03585,843.99618 654.75,840.9375 C 650.58545,826.98465 652.90172,812.3245 656.55504,798.52986 C 662.92191,772.23922 677.18332,747.44188 699.375,731.5 C 690.75791,768.73706 693.65842,808.06161 693.28125,845.46875 C 705.53469,838.55885 720.56004,842.02262 733.3125,845.21875 C 736.70472,848.75355 735.60185,844.48927 735.5,841.40625 C 735.01691,820.03567 739.63133,798.33662 749.1875,779.25 C 755.15016,768.56273 763.43088,759.44621 771.625,750.375 C 763.75344,784.2131 762.4221,819.71093 768.90625,853.875 C 770.6311,852.46382 773.51306,853.42086 774.5625,853.5 C 784.24619,832.26318 790.91362,808.11938 809.45266,792.75815 C 811.32595,792.38693 808.00448,801.2831 807.96875,804.65625 C 804.43387,826.50206 800.79359,848.79859 799.18454,870.87536 C 790.40075,873.21707 802.03289,873.1989 802.65329,874.93786 C 810.5764,885.50366 807.31628,899.34258 806.28494,911.2912 C 799.22089,956.32475 784.14263,998.65314 770.33139,1041.971 C 758.25663,1074.9203 742.95719,1100.8235 722.44331,1129.1725 C 711.49074,1142.7239 699.19859,1157.0238 681.59956,1161.6725 C 661.44355,1167.9138 637.3928,1172.5494 619,1161.7188 C 601.71034,1149.3774 597.97607,1126.0099 599.73774,1106.0324 C 599.78653,1090.2062 604.6766,1077.5203 604.14834,1062.5406 C 603.6101,1047.2777 601.85699,1031.9759 597.60573,1015.6743 C 593.35447,999.37268 588.56248,990.75636 581.48667,974.10092 C 574.24556,957.05636 566.41652,937.35229 563.28125,917.8125 C 561.53177,899.18536 566.17296,880.68988 569.0625,862.5625 C 572.35873,859.72554 567.46451,857.36591 566.75,854.375 C 559.14887,837.35992 558.34253,817.6001 564.00766,799.81502 C 571.13786,774.74272 579.76853,750.18261 588.6875,725.6875 C 589.39583,726.98958 590.10417,728.29167 590.8125,729.59375 z"
+ id="path4201"
+ sodipodi:nodetypes="ccccccccccccccccccccccccccccccccccccccccccccccccccczzzcccccc"
+ clip-path="url(#clipPath4177)"
+ transform="matrix(-0.9045327,0.2506626,0.2506626,0.9045327,822.28931,10.93589)" />
+ <path
+ style="opacity:1;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter4130);enable-background:accumulate"
+ d="M 735.05635,733.03834 L 737.81177,754.12715 L 782.2228,738.73894 L 787.07343,716.34919 L 783.13726,694.29697 L 760.68563,657.70396 L 752.40559,688.0089 L 735.05635,733.03834 z"
+ id="path4203"
+ sodipodi:nodetypes="cccccccc"
+ clip-path="url(#clipPath3631)"
+ transform="matrix(-0.9045327,0.2506626,0.2506626,0.9045327,995.28646,23.53493)" />
+ <path
+ style="opacity:1;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter4141);enable-background:accumulate"
+ d="M 831.81321,730.29452 L 847.63558,745.19938 L 868.49031,748.09932 L 866.90002,708.17334 L 875.22563,677.66492 L 868.06064,671.32386 L 846.36395,692.26626 L 831.81321,730.29452 z"
+ id="path4205"
+ sodipodi:nodetypes="cccccccc"
+ clip-path="url(#clipPath3631)"
+ transform="matrix(-0.9045327,0.2506626,0.2506626,0.9045327,995.28646,23.53493)" />
+ <g
+ id="g8317"
+ style="filter:url(#filter8333)"
+ clip-path="url(#clipPath8338)"
+ transform="translate(276,136)">
+ <path
+ transform="matrix(-0.9045327,0.2506626,0.2506626,0.9045327,719.28646,-112.46507)"
+ clip-path="none"
+ sodipodi:nodetypes="ccccc"
+ id="path4209"
+ d="M 964.00012,754.69487 L 982.42893,762.15966 L 991.5,725.19519 L 976.62969,730.03405 L 964.00012,754.69487 z"
+ style="opacity:1;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate" />
+ <rect
+ y="757.19519"
+ x="-55"
+ height="177"
+ width="182"
+ id="rect8315"
+ style="opacity:1;fill:none;fill-opacity:1;fill-rule:nonzero;stroke:none;stroke-width:25;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate" />
+ </g>
+ <g
+ id="g8346"
+ style="filter:url(#filter8354)"
+ clip-path="url(#clipPath8359)"
+ transform="translate(276,136)">
+ <path
+ transform="matrix(-0.9045327,0.2506626,0.2506626,0.9045327,719.28646,-112.46507)"
+ clip-path="none"
+ sodipodi:nodetypes="ccccccc"
+ id="path4207"
+ d="M 910.14441,746.31415 L 942.75736,751.48808 L 942.39617,727.61189 L 949.5847,697.92968 L 941.13358,692.66603 L 919.31164,719.1768 L 910.14441,746.31415 z"
+ style="opacity:1;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate" />
+ <rect
+ y="696.19519"
+ x="-22"
+ height="176"
+ width="165"
+ id="rect8344"
+ style="opacity:1;fill:none;fill-opacity:1;fill-rule:nonzero;stroke:none;stroke-width:25;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate" />
+ </g>
+ </g>
+ <g
+ inkscape:groupmode="layer"
+ id="layer16"
+ inkscape:label="Left Foot"
+ style="display:inline">
+ <path
+ style="opacity:1;fill:#ada469;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;display:inline;enable-background:new"
+ d="M 1036.164,1071.8338 C 1042.9581,1090.7366 1046.6577,1105.1335 1048.0543,1123.0457 C 1049.4509,1140.958 1044.2716,1174.8465 1045.1538,1193.7018 C 1046.0356,1212.547 1053.2875,1233.8008 1072.4984,1242.6707 C 1091.9173,1251.6365 1121.8177,1252.882 1146.6183,1239.5251 C 1171.4189,1226.1681 1204.0193,1169.1996 1217.5925,1142.2164 C 1231.2164,1115.1325 1256.3536,1027.719 1262.2533,992.44781 C 1268.1531,957.1766 1264.8039,951.14704 1257.6359,943.39232 C 1260.2762,915.55217 1256.1361,888.45689 1270.7455,856.20614 C 1240.4965,868.03184 1233.3632,896.36684 1222.4266,921.71122 C 1214.4257,870.77829 1222.6358,850.43803 1225.7455,820.49186 C 1196.6808,835.26977 1182.884,867.60588 1180.7455,913.349 C 1169.8216,912.0448 1159.3541,908.91477 1147.1741,912.63471 C 1146.9101,866.61137 1145.7106,835.7453 1156.0847,798.42822 C 1102.8293,819.45508 1093.1375,905.02232 1100.0312,911.20614 C 1089.1484,911.74114 1078.6602,909.90884 1067.1741,914.06329 C 1067.813,871.49194 1066.9136,829.15468 1037.1741,791.20614 C 1037.1741,791.20614 1006.2161,872.12848 1005.7455,894.77757 C 1005.275,917.42666 1015.1971,934.94345 1015.1971,934.94345 C 1015.1971,934.94345 1006.6291,971.68396 1008.8985,993.17568 C 1011.1944,1014.9171 1029.3414,1052.8519 1036.164,1071.8338 z"
+ id="path8848"
+ sodipodi:nodetypes="czzzzzzcccccccccczczz" />
+ <path
+ style="opacity:1;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter3587);enable-background:accumulate"
+ d="M 719.5,738.69519 L 737.81177,754.12715 L 782.2228,738.73894 L 805.5,713.19519 L 816.96397,732.41584 L 847.63558,745.19938 L 872.73295,750.92775 L 892,723.19519 L 908.02309,747.02126 L 947,752.19519 L 957.24541,745.99667 L 964.00012,754.69487 L 989.5,765.69519 L 991.5,725.19519 L 955.94866,710.6576 L 923.45591,689.1305 L 883.0038,677.66492 L 861.69668,662.13148 L 840,685.19519 L 755.02878,638.61208 L 722,676.69519 L 719.5,738.69519 z"
+ id="path3635"
+ sodipodi:nodetypes="cccccccccccccccccccccc"
+ clip-path="url(#clipPath3631)"
+ transform="translate(276,136)" />
+ <path
+ transform="translate(450.03125,73.843964)"
+ style="opacity:0.58775509;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:20.79999924;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:none;stroke-opacity:1;display:inline;filter:url(#filter3898);enable-background:new"
+ d="M 584,696.5 L 577.4375,713.65625 C 577.4375,713.65625 569.62598,734.02113 561.75,757.3125 C 557.81201,768.95818 553.86698,781.35395 550.8125,792.4375 C 547.75802,803.52105 545.47664,812.81736 545.3125,820.71875 C 544.91443,839.88071 551.05903,855.60705 554.25,862.46875 C 553.47847,866.02398 552.25863,871.92307 550.90625,880.5625 C 548.98583,892.83071 547.18798,907.71691 548.53125,920.4375 C 549.91334,933.52585 555.34347,948.62515 561.125,963.46875 C 566.90653,978.31235 573.17935,992.69586 576.34375,1001.5 C 582.97581,1019.9519 586.33671,1033.0763 587.65625,1050 C 588.2376,1057.4561 587.41398,1070.336 586.40625,1083.375 C 585.39852,1096.414 584.21964,1109.6764 584.71875,1120.3438 C 585.70786,1141.4836 594.04673,1167.1785 618.09375,1178.2812 C 640.86858,1188.7966 673.42057,1189.9834 701.53125,1174.8438 C 717.69117,1166.1404 731.60759,1147.7462 744.90625,1127.9375 C 758.20491,1108.1288 769.87542,1086.8841 776.84375,1073.0312 C 792.19667,1042.51 816.23728,957.56702 822.46875,920.3125 C 825.48734,902.26597 826.39041,891.24695 825.09375,882.28125 C 824.11522,875.51521 821.26556,870.13385 818.21875,866.0625 C 820.26149,838.55459 817.48668,814.69372 830.1875,786.65625 L 840.75,763.375 L 816.9375,772.6875 C 799.44775,779.52503 788.03586,791.73286 780.34375,804.75 C 780.02124,805.29577 779.78061,805.85776 779.46875,806.40625 C 779.69078,783.89104 783.87659,768.76866 786.0625,747.71875 L 788.03125,728.71875 L 771,737.375 C 740.40551,752.93071 725.30511,785.56821 721.28125,827.59375 C 717.03593,826.96828 712.44985,826.5741 707.46875,826.75 C 707.17726,787.56964 707.07246,759.71315 716.0625,727.375 L 721.65625,707.25 L 702.21875,714.90625 C 671.30938,727.11019 654.35921,756.83698 645.59375,783.28125 C 641.21102,796.50339 638.84793,809.08246 638,819.21875 C 637.76797,821.99248 637.68894,824.53007 637.6875,826.9375 C 634.44563,826.90109 631.26698,827.07339 627.625,827.4375 C 627.66662,788.43277 624.14076,747.68335 595.34375,710.9375 L 584,696.5 z M 589.8125,740.3125 C 606.61941,770.95633 607.28701,804.27978 606.75,840.0625 L 606.53125,855.125 L 618.56618,848.58579 C 627.22823,845.45277 638.12676,848.35827 650.5,847.75 L 665.17465,857.1066 L 658.84375,831.3125 C 658.7541,831.08253 658.62329,830.89581 658.59375,830.59375 C 658.39424,828.55389 658.37143,825.12068 658.71875,820.96875 C 659.41339,812.66489 661.50832,801.38351 665.34375,789.8125 C 670.49907,774.25956 678.83176,758.62002 690.46875,747.28125 C 685.78494,775.91923 687.25316,807.54059 687.45711,843.08639 L 684.69118,856.34803 L 700.1875,848.75 C 709.2169,845.99229 717.37647,848.40004 729.46875,849.84375 L 742.71507,859.28798 L 741.09375,840 C 742.54168,809.02823 749.31524,786.32192 761.8125,771.125 C 758.82562,790.90384 756.38207,812.9098 762.125,849.46875 L 763.19052,855.84193 L 760.25237,867.35878 L 770.86948,859.1906 L 780.05921,869.41258 L 778.51093,858.94898 L 781.9375,852 C 787.63852,838.78851 792.11032,825.78663 798.28125,815.34375 C 799.24111,813.71941 800.31278,812.27939 801.34375,810.78125 C 797.66309,831.9366 798.91659,850.9894 797.25,868.5625 L 792.56986,876.36948 L 799.96875,876.59375 C 803.1888,880.07736 803.83625,880.44443 804.53125,885.25 C 805.22625,890.05557 804.84987,899.65035 801.96875,916.875 C 796.40076,950.16292 770.17603,1040.0409 758.28125,1063.6875 C 751.67634,1076.8179 740.25127,1097.5832 727.65625,1116.3438 C 715.06123,1135.1043 700.29692,1151.8776 691.65625,1156.5312 C 670.16573,1168.1054 642.87545,1166.7914 626.8125,1159.375 C 612.43764,1152.738 606.27438,1135.9256 605.5,1119.375 C 605.11689,1111.187 606.11279,1098.0658 607.125,1084.9688 C 608.13721,1071.8717 618.41391,1062.398 622.54839,1048.4062 C 627.92068,1030.2254 621.10152,1011.8118 610.04839,994.46875 C 603.56184,984.29097 586.07159,970.21085 580.5,955.90625 C 574.92841,941.60165 570.13249,926.9031 569.21875,918.25 C 568.29254,909.47887 569.64125,895.22498 571.4375,883.75 C 573.23375,872.27503 575.28125,863.46875 575.28125,863.46875 L 584.70403,859.85355 L 574.21875,855.96875 C 574.21875,855.96875 565.71986,840.65865 566.125,821.15625 C 566.19611,817.73309 567.96126,808.4282 570.84375,797.96875 C 573.72624,787.5093 577.60841,775.41604 581.46875,764 C 584.51314,754.99692 587.24938,747.39655 589.8125,740.3125 z"
+ id="path3669"
+ clip-path="url(#clipPath3677)"
+ sodipodi:nodetypes="ccssscsssssssssssssccccscccccccccsscccccccccccssscccccccccccccccsccccssssssssssssscccsssc" />
+ <g
+ id="g3628"
+ clip-path="url(#clipPath3636)"
+ transform="translate(276,136)">
+ <path
+ id="path8988"
+ d="M 824.48651,818.48242 L 774.98903,802.92607 L 748.11898,855.25197 L 789.13117,900.50681 L 838.62864,862.32304 L 824.48651,818.48242 z"
+ style="opacity:1;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter9024);enable-background:accumulate" />
+ <path
+ id="path8990"
+ d="M 964.49365,855.25197 L 909.33932,808.58293 L 865.4987,845.35248 L 899.43983,899.09259 L 906.51089,965.56063 L 855.59921,1000.916 L 814.58701,1012.2297 L 811.75859,1058.8987 L 868.32713,1084.3546 L 931.96674,1007.987 L 956.00837,913.23473 L 964.49365,855.25197 z"
+ style="opacity:1;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter9020);enable-background:accumulate" />
+ </g>
+ <path
+ style="opacity:0.25;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter9044);enable-background:accumulate"
+ d="M 1045.3322,1043.5779 L 1106.1434,1016.7078 L 1206.5525,1047.8205 L 1142.9129,1078.9332 L 1060.8885,1061.9626 L 1045.3322,1043.5779 z"
+ id="path8992" />
+ <path
+ transform="translate(450.03125,73.843964)"
+ style="opacity:0.58775509;fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:20.79999924;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:none;stroke-opacity:1;display:inline;filter:url(#filter4185);enable-background:new"
+ d="M 583.0625,715.75 C 570.95641,750.19974 556.348,784.28333 551.3125,820.59375 C 550.48042,835.52242 555.90165,849.75318 560.15625,863.65625 C 554.24001,890.85751 550.01944,920.5562 561.3125,946.78125 C 574.82967,984.9421 596.31397,1022.4634 593.73529,1064.2495 C 592.78699,1093.5437 584.72085,1125.2436 599.125,1152.5312 C 609.32364,1171.866 632.26456,1179.8429 653.09285,1180.1988 C 680.95504,1181.3729 709.55546,1168.5772 725.09375,1144.9375 C 747.68924,1115.5658 766.89426,1083.4402 780.3324,1048.8777 C 797.22293,1003.3717 810.0042,956.31698 818.26642,908.4788 C 820.09082,895.53774 821.3675,881.00895 813.6875,869.65625 C 810.25635,862.31993 813.72957,854.09611 813.00293,846.34648 C 813.67693,821.35182 817.01525,795.68272 829.65625,773.75 C 811.92312,780.1946 794.58357,790.30971 785.65318,807.61425 C 781.7181,814.3238 778.04836,821.18838 774.28125,828 C 770.73126,797.98592 778.00088,768.35172 781.0625,738.71875 C 760.89646,747.77338 744.18578,764.37397 736.88755,785.40075 C 730.58292,800.98078 728.08533,817.71793 726.625,834.4375 C 718.37166,832.91825 709.94053,832.33595 701.5625,832.9375 C 700.59942,794.23963 701.09554,753.53035 712.53125,717.03125 C 693.85012,723.24901 677.36504,735.76676 666.90322,752.41848 C 653.05068,773.29827 645.64182,798.17243 643.84375,823.03125 C 644.42909,827.35579 643.78249,834.87134 637.5,832.90625 C 632.16882,832.9238 626.87092,833.58508 621.5625,834 C 622.71034,794.61852 618.22106,752.3718 594.5,719.78125 C 591.43929,716.14408 588.86315,712.09687 585.875,708.4375 C 584.9375,710.875 584,713.3125 583.0625,715.75 z M 590.8125,729.59375 C 609.37777,758.89004 613.295,794.41387 612.9375,828.46875 C 613.14159,833.64401 612.42094,840.29795 613.0625,844.53125 C 625.38106,838.4285 639.80162,842.09135 652.84375,842.34375 C 655.16087,843.567 656.03585,843.99618 654.75,840.9375 C 650.58545,826.98465 652.90172,812.3245 656.55504,798.52986 C 662.92191,772.23922 677.18332,747.44188 699.375,731.5 C 690.75791,768.73706 693.65842,808.06161 693.28125,845.46875 C 705.53469,838.55885 720.56004,842.02262 733.3125,845.21875 C 736.70472,848.75355 735.60185,844.48927 735.5,841.40625 C 735.01691,820.03567 739.63133,798.33662 749.1875,779.25 C 755.15016,768.56273 763.43088,759.44621 771.625,750.375 C 763.75344,784.2131 762.4221,819.71093 768.90625,853.875 C 770.6311,852.46382 773.51306,853.42086 774.5625,853.5 C 784.24619,832.26318 790.91362,808.11938 809.45266,792.75815 C 811.32595,792.38693 808.00448,801.2831 807.96875,804.65625 C 804.43387,826.50206 804.67155,848.82948 803.0625,870.90625 C 801.75012,872.28304 805.91085,873.22979 806.53125,874.96875 C 814.45436,885.53455 809.65419,899.80024 808.62285,911.74886 C 801.5588,956.78241 786.85732,1000.1282 773.04608,1043.446 C 760.97132,1076.3953 742.32638,1106.526 721.8125,1134.875 C 710.85993,1148.4264 698.56778,1162.7263 680.96875,1167.375 C 660.81274,1173.6163 637.3928,1172.5494 619,1161.7188 C 601.71034,1149.3774 597.97607,1126.0099 599.73774,1106.0324 C 599.78653,1090.2062 602.10985,1078.2316 607.65521,1063.2271 C 613.20056,1048.2226 610.12626,1031.8954 605.875,1015.5938 C 601.62374,999.2922 593.69597,989.33378 584.05342,973.38963 C 574.41087,957.44548 566.41652,937.35229 563.28125,917.8125 C 561.53177,899.18536 566.17296,880.68988 569.0625,862.5625 C 572.35873,859.72554 567.46451,857.36591 566.75,854.375 C 559.14887,837.35992 558.34253,817.6001 564.00766,799.81502 C 571.13786,774.74272 579.76853,750.18261 588.6875,725.6875 C 589.39583,726.98958 590.10417,728.29167 590.8125,729.59375 z"
+ id="path4149"
+ sodipodi:nodetypes="ccccccccccccccccccccccccccccccccccccccccccccccccccczzzcccccc"
+ clip-path="url(#clipPath4177)" />
+ <path
+ style="opacity:1;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter4130);enable-background:accumulate"
+ d="M 735.05635,733.03834 L 737.81177,754.12715 L 782.2228,738.73894 L 787.07343,716.34919 L 783.13726,694.29697 L 760.68563,657.70396 L 752.40559,688.0089 L 735.05635,733.03834 z"
+ id="path3902"
+ sodipodi:nodetypes="cccccccc"
+ clip-path="url(#clipPath3631)"
+ transform="translate(276,136)" />
+ <path
+ style="opacity:1;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;filter:url(#filter4141);enable-background:accumulate"
+ d="M 831.81321,730.29452 L 847.63558,745.19938 L 868.49031,748.09932 L 866.90002,708.17334 L 875.22563,677.66492 L 868.06064,671.32386 L 846.36395,692.26626 L 831.81321,730.29452 z"
+ id="path4135"
+ sodipodi:nodetypes="cccccccc"
+ clip-path="url(#clipPath3631)"
+ transform="translate(276,136)" />
+ <g
+ id="g8367"
+ style="filter:url(#filter8379)"
+ clip-path="url(#clipPath8392)"
+ transform="translate(276,136)">
+ <path
+ clip-path="none"
+ sodipodi:nodetypes="ccccccc"
+ id="path4145"
+ d="M 910.14441,746.31415 L 942.75736,751.48808 L 942.39617,727.61189 L 949.5847,697.92968 L 941.13358,692.66603 L 919.31164,719.1768 L 910.14441,746.31415 z"
+ style="opacity:1;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate" />
+ <rect
+ y="650.19098"
+ x="877.51953"
+ height="172.53406"
+ width="123.03658"
+ id="rect8365"
+ style="opacity:1;fill:none;fill-opacity:1;fill-rule:nonzero;stroke:none;stroke-width:25;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate" />
+ </g>
+ <g
+ id="g8400"
+ style="filter:url(#filter8404)"
+ clip-path="url(#clipPath8417)"
+ transform="translate(276,136)">
+ <path
+ clip-path="none"
+ sodipodi:nodetypes="ccccc"
+ id="path4147"
+ d="M 964.00012,754.69487 L 982.42893,762.15966 L 991.5,725.19519 L 976.62969,730.03405 L 964.00012,754.69487 z"
+ style="opacity:1;fill:#ffffff;fill-opacity:1;fill-rule:evenodd;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate" />
+ <rect
+ y="677.06104"
+ x="924.89569"
+ height="125.1579"
+ width="142.12846"
+ id="rect8398"
+ style="opacity:1;fill:none;fill-opacity:1;fill-rule:nonzero;stroke:none;stroke-width:25;stroke-linecap:butt;stroke-linejoin:miter;marker:none;marker-start:none;marker-mid:none;marker-end:none;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0;stroke-opacity:1;visibility:visible;display:inline;overflow:visible;enable-background:accumulate" />
+ </g>
+ </g>
+</svg>
-This is the full-colour version of the currently unofficial Linux logo
-("currently unofficial" just means that there has been no paperwork and
-that I have not really announced it yet). It was created by Larry Ewing,
-and is freely usable as long as you acknowledge Larry as the original
-artist.
-
-Note that there are black-and-white versions of this available that
-scale down to smaller sizes and are better for letterheads or whatever
-you want to use it for: for the full range of logos take a look at
-Larry's web-page:
-
- http://www.isc.tamu.edu/~lewing/linux/
+Tux is taking a three month sabbatical to work as a barber, so Tuz is
+standing in. He's taken pains to ensure you'll hardly notice.
+Image by Andrew McGown and Josh Bush. Image is licensed CC BY-SA.
The power-management is supported.
- Module snd-cs4232
- -----------------
-
- Module for sound cards based on CS4232/CS4232A ISA chips.
-
- isapnp - ISA PnP detection - 0 = disable, 1 = enable (default)
-
- with isapnp=0, the following options are available:
-
- port - port # for CS4232 chip (PnP setup - 0x534)
- cport - control port # for CS4232 chip (PnP setup - 0x120,0x210,0xf00)
- mpu_port - port # for MPU-401 UART (PnP setup - 0x300), -1 = disable
- fm_port - FM port # for CS4232 chip (PnP setup - 0x388), -1 = disable
- irq - IRQ # for CS4232 chip (5,7,9,11,12,15)
- mpu_irq - IRQ # for MPU-401 UART (9,11,12,15)
- dma1 - first DMA # for CS4232 chip (0,1,3)
- dma2 - second DMA # for Yamaha CS4232 chip (0,1,3), -1 = disable
-
- This module supports multiple cards. This module does not support autoprobe
- (if ISA PnP is not used) thus main port must be specified!!! Other ports are
- optional.
-
- The power-management is supported.
-
Module snd-cs4236
-----------------
- Module for sound cards based on CS4235/CS4236/CS4236B/CS4237B/
+ Module for sound cards based on CS4232/CS4232A,
+ CS4235/CS4236/CS4236B/CS4237B/
CS4238B/CS4239 ISA chips.
isapnp - ISA PnP detection - 0 = disable, 1 = enable (default)
The power-management is supported.
+ This module is aliased as snd-cs4232 since it provides the old
+ snd-cs4232 functionality, too.
+
Module snd-cs4281
-----------------
model - force the model name
position_fix - Fix DMA pointer (0 = auto, 1 = use LPIB, 2 = POSBUF)
probe_mask - Bitmask to probe codecs (default = -1, meaning all slots)
+ When the bit 8 (0x100) is set, the lower 8 bits are used
+ as the "fixed" codec slots; i.e. the driver probes the
+ slots regardless what hardware reports back
probe_only - Only probing and no codec initialization (default=off);
Useful to check the initial codec status for debugging
bdl_pos_adj - Specifies the DMA IRQ timing delay in samples.
sony-assamd Sony ASSAMD
toshiba-s06 Toshiba S06
toshiba-rx1 Toshiba RX1
+ tyan Tyan Thunder n6650W (S2915-E)
ultra Samsung Q1 Ultra Vista model
lenovo-3000 Lenovo 3000 y410
nec NEC Versa S9100
=============
laptop Basic Laptop config (default)
hp HP Spartan laptop
+ hp-dv6736 HP dv6736
+ lenovo-x200 Lenovo X200 laptop
STAC9200
========
gateway-m4 Gateway laptops with EAPD control
gateway-m4-2 Gateway laptops with EAPD control
panasonic Panasonic CF-74
+ auto BIOS setup (default)
STAC9205/9254
=============
dell-m42 Dell (unknown)
dell-m43 Dell Precision
dell-m44 Dell Inspiron
+ eapd Keep EAPD on (e.g. Gateway T1616)
+ auto BIOS setup (default)
STAC9220/9221
=============
dell-d82 Dell (unknown)
dell-m81 Dell (unknown)
dell-m82 Dell XPS M1210
+ auto BIOS setup (default)
STAC9202/9250/9251
==================
m3 Some Gateway MX series laptops
m5 Some Gateway MX series laptops (MP6954)
m6 Some Gateway NX series laptops
+ auto BIOS setup (default)
STAC9227/9228/9229/927x
=======================
5stack D965 5stack + SPDIF
dell-3stack Dell Dimension E520
dell-bios Fixes with Dell BIOS setup
+ auto BIOS setup (default)
STAC92HD71B*
============
dell-m4-1 Dell desktops
dell-m4-2 Dell desktops
dell-m4-3 Dell desktops
- hp-m4 HP dv laptops
+ hp-m4 HP mini 1000
+ hp-dv5 HP dv series
+ hp-hdx HP HDX series
+ auto BIOS setup (default)
STAC92HD73*
===========
dell-m6-dmic Dell desktops/laptops with digital mics
dell-m6 Dell desktops/laptops with both type of mics
dell-eq Dell desktops/laptops
+ auto BIOS setup (default)
STAC92HD83*
===========
ref Reference board
mic-ref Reference board with power managment for ports
+ dell-s14 Dell laptop
+ auto BIOS setup (default)
STAC9872
========
- vaio Setup for VAIO FE550G/SZ110
- vaio-ar Setup for VAIO AR
+ vaio VAIO laptop without SPDIF
+ auto BIOS setup (default)
Since 2.6.29 kernel, the driver has a more robust probing method, so
this error might happen rarely, though.
+On a machine with a broken BIOS, sometimes you need to force the
+driver to probe the codec slots the hardware doesn't report for use.
+In such a case, turn the bit 8 (0x100) of `probe_mask` option on.
+Then the rest 8 bits are passed as the codec slots to probe
+unconditionally. For example, `probe_mask=0x103` will force to probe
+the codec slots 0 and 1 no matter what the hardware reports.
+
Interrupt Handling
~~~~~~~~~~~~~~~~~~
to this file.
init_verbs::
The extra verbs to execute at initialization. You can add a verb by
- writing to this file. Pass tree numbers, nid, verb and parameter.
+ writing to this file. Pass three numbers: nid, verb and parameter
+ (separated with a space).
hints::
- Shows hint strings for codec parsers for any use. Right now it's
- not used.
+ Shows / stores hint strings for codec parsers for any use.
+ Its format is `key = value`. For example, passing `hp_detect = yes`
+ to IDT/STAC codec parser will result in the disablement of the
+ headphone detection.
+init_pin_configs::
+ Shows the initial pin default config values set by BIOS.
+driver_pin_configs::
+ Shows the pin default values set by the codec parser explicitly.
+ This doesn't show all pin values but only the changed values by
+ the parser. That is, if the parser doesn't change the pin default
+ config values by itself, this will contain nothing.
+user_pin_configs::
+ Shows the pin default config values to override the BIOS setup.
+ Writing this (with two numbers, NID and value) appends the new
+ value. The given will be used instead of the initial BIOS value at
+ the next reconfiguration time. Note that this config will override
+ even the driver pin configs, too.
reconfig::
Triggers the codec re-configuration. When any value is written to
this file, the driver re-initialize and parses the codec tree
Resets the codec, removes the mixer elements and PCM stuff of the
specified codec, and clear all init verbs and hints.
+For example, when you want to change the pin default configuration
+value of the pin widget 0x14 to 0x9993013f, and let the driver
+re-configure based on that state, run like below:
+------------------------------------------------------------------------
+ # echo 0x14 0x9993013f > /sys/class/sound/hwC0D0/user_pin_configs
+ # echo 1 > /sys/class/sound/hwC0D0/reconfig
+------------------------------------------------------------------------
+
Power-Saving
~~~~~~~~~~~~
There are some other useful options. See `--help` option output for
details.
+When a probe error occurs or when the driver obviously assigns a
+mismatched model, it'd be helpful to load the driver with
+`probe_only=1` option (at best after the cold reboot) and run
+alsa-info at this state. With this option, the driver won't configure
+the mixer and PCM but just tries to probe the codec slot. After
+probing, the proc file is available, so you can get the raw codec
+information before modified by the driver. Of course, the driver
+isn't usable with `probe_only=1`. But you can continue the
+configuration via hwdep sysfs file if hda-reconfig option is enabled.
+
hda-verb
~~~~~~~~
SND_SOC_DAPM_MIXER("Output Mixer", WM8731_PWR, 4, 1, wm8731_output_mixer_controls,
ARRAY_SIZE(wm8731_output_mixer_controls)),
+If you dont want the mixer elements prefixed with the name of the mixer widget,
+you can use SND_SOC_DAPM_MIXER_NAMED_CTL instead. the parameters are the same
+as for SND_SOC_DAPM_MIXER.
2.3 Platform/Machine domain Widgets
-----------------------------------
PARISC ARCHITECTURE
P: Kyle McMartin
M: kyle@mcmartin.ca
-P: Matthew Wilcox
-M: matthew@wil.cx
-P: Grant Grundler
-M: grundler@parisc-linux.org
+P: Helge Deller
+M: deller@gmx.de
L: linux-parisc@vger.kernel.org
W: http://www.parisc-linux.org/
T: git kernel.org:/pub/scm/linux/kernel/git/kyle/parisc-2.6.git
T: git kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev.git
S: Supported
+SERVER ENGINES 10Gbps NIC - BladeEngine 2 DRIVER
+P: Sathya Perla
+M: sathyap@serverengines.com
+P: Subbu Seetharaman
+M: subbus@serverengines.com
+L: netdev@vger.kernel.org
+W: http://www.serverengines.com
+S: Supported
+
SFC NETWORK DRIVER
P: Steve Hodgson
P: Ben Hutchings
VERSION = 2
PATCHLEVEL = 6
SUBLEVEL = 29
-EXTRAVERSION = -rc8
-NAME = Erotic Pickled Herring
+EXTRAVERSION =
+NAME = Temporary Tasmanian Devil
# *DOCUMENTATION*
# To see a list of typical targets execute "make help"
# disable pointer signed / unsigned warnings in gcc 4.0
KBUILD_CFLAGS += $(call cc-option,-Wno-pointer-sign,)
+# disable invalid "can't wrap" optimzations for signed / pointers
+KBUILD_CFLAGS += $(call cc-option,-fwrapv)
+
+# revert to pre-gcc-4.4 behaviour of .eh_frame
+KBUILD_CFLAGS += $(call cc-option,-fno-dwarf2-cfi-asm)
+
# Add user supplied CPPFLAGS, AFLAGS and CFLAGS as the last assignments
# But warn user when we do so
warn-assign = \
.globl mcount_call
mcount_call:
bl ftrace_stub
+ ldr lr, [fp, #-4] @ restore lr
ldmia sp!, {r0-r3, pc}
ENTRY(ftrace_caller)
.globl ftrace_call
ftrace_call:
bl ftrace_stub
+ ldr lr, [fp, #-4] @ restore lr
ldmia sp!, {r0-r3, pc}
#else
adr r0, ftrace_stub
cmp r0, r2
bne trace
+ ldr lr, [fp, #-4] @ restore lr
ldmia sp!, {r0-r3, pc}
trace:
sub r0, r0, #MCOUNT_INSN_SIZE
mov lr, pc
mov pc, r2
+ mov lr, r1 @ restore lr
ldmia sp!, {r0-r3, pc}
#endif /* CONFIG_DYNAMIC_FTRACE */
* disable irqs for the duration. Note - these functions are almost
* entirely coded in assembly.
*/
-void __attribute__((naked)) set_fiq_regs(struct pt_regs *regs)
+void __naked set_fiq_regs(struct pt_regs *regs)
{
register unsigned long tmp;
asm volatile (
: "r" (®s->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE));
}
-void __attribute__((naked)) get_fiq_regs(struct pt_regs *regs)
+void __naked get_fiq_regs(struct pt_regs *regs)
{
register unsigned long tmp;
asm volatile (
#ifndef __ASSEMBLY__
+struct i2c_board_info;
+
struct ep93xx_eth_data
{
unsigned char dev_addr[6];
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
+
+#include <mach/irqs.h>
#include <mach/hardware.h>
static struct resource imx_csi_resources[] = {
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
+#include <mach/irqs.h>
#include <mach/hardware.h>
#include <mach/common.h>
#include <mach/imx-uart.h>
#ifdef CONFIG_I2C2_OMAP_BEAGLE
omap_register_i2c_bus(2, 400, NULL, 0);
#endif
- omap_register_i2c_bus(3, 400, NULL, 0);
+ /* Bus 3 is attached to the DVI port where devices like the pico DLP
+ * projector don't work reliably with 400kHz */
+ omap_register_i2c_bus(3, 100, NULL, 0);
return 0;
}
/*****************************************************************************
* XOR engine
****************************************************************************/
+struct mv_xor_platform_shared_data orion5x_xor_shared_data = {
+ .dram = &orion5x_mbus_dram_info,
+};
+
static struct resource orion5x_xor_shared_resources[] = {
{
.name = "xor low",
static struct platform_device orion5x_xor_shared = {
.name = MV_XOR_SHARED_NAME,
.id = 0,
+ .dev = {
+ .platform_data = &orion5x_xor_shared_data,
+ },
.num_resources = ARRAY_SIZE(orion5x_xor_shared_resources),
.resource = orion5x_xor_shared_resources,
};
/* IrDA */
GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
+ /* Audio power control */
+ GPIO16_GPIO, /* AC97 codec AVDD2 supply (analogue power) */
+ GPIO40_GPIO, /* Mic amp power */
+ GPIO41_GPIO, /* Headphone amp power */
+
/* PC Card */
GPIO8_GPIO, /* CD0 */
GPIO44_GPIO, /* CD1 */
/* IrDA */
GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
+ /* Audio power control */
+ GPIO4_GPIO, /* Headphone amp power */
+ GPIO7_GPIO, /* Speaker amp power */
+ GPIO37_GPIO, /* Headphone detect */
+
/* PC Card */
GPIO8_GPIO, /* CD0 */
GPIO44_GPIO, /* CD1 */
GPIO23_SSP1_SCLK,
GPIO25_SSP1_TXD,
GPIO26_SSP1_RXD,
+
+ /* I2S */
+ GPIO28_I2S_BITCLK_OUT,
+ GPIO29_I2S_SDATA_IN,
+ GPIO30_I2S_SDATA_OUT,
+ GPIO31_I2S_SYNC,
+ GPIO32_I2S_SYSCLK,
};
/*
/* e7xx IrDA power control */
#define GPIO_E7XX_IR_OFF 38
+/* e740 audio control GPIOs */
+#define GPIO_E740_WM9705_nAVDD2 16
+#define GPIO_E740_MIC_ON 40
+#define GPIO_E740_AMP_ON 41
+
+/* e750 audio control GPIOs */
+#define GPIO_E750_HP_AMP_OFF 4
+#define GPIO_E750_SPK_AMP_OFF 7
+#define GPIO_E750_HP_DETECT 37
+
+/* e800 audio control GPIOs */
+#define GPIO_E800_HP_DETECT 81
+#define GPIO_E800_HP_AMP_OFF 82
+#define GPIO_E800_SPK_AMP_ON 83
+
/* ASIC related GPIOs */
#define GPIO_ESERIES_TMIO_IRQ 5
#define GPIO_ESERIES_TMIO_PCLR 19
#define SSCR0_TUM (1 << 23) /* Transmit FIFO underrun interrupt mask */
#define SSCR0_FRDC (0x07000000) /* Frame rate divider control (mask) */
#define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24) /* Time slots per frame [1..8] */
-#define SSCR0_ADC (1 << 30) /* Audio clock select */
+#define SSCR0_ACS (1 << 30) /* Audio clock select */
#define SSCR0_MOD (1 << 31) /* Mode (normal or network) */
#endif
#define SSSR_TINT (1 << 19) /* Receiver Time-out Interrupt */
#define SSSR_PINT (1 << 18) /* Peripheral Trailing Byte Interrupt */
+#if defined(CONFIG_PXA3xx)
+#define SSPSP_EDMYSTOP(x) ((x) << 28) /* Extended Dummy Stop */
+#define SSPSP_EDMYSTRT(x) ((x) << 26) /* Extended Dummy Start */
+#endif
+
#define SSPSP_FSRT (1 << 25) /* Frame Sync Relative Timing */
#define SSPSP_DMYSTOP(x) ((x) << 23) /* Dummy Stop */
#define SSPSP_SFRMWDTH(x) ((x) << 16) /* Serial Frame Width */
GPIO57_nIOIS16,
GPIO104_PSKTSEL,
+ /* I2S */
+ GPIO28_I2S_BITCLK_OUT,
+ GPIO29_I2S_SDATA_IN,
+ GPIO30_I2S_SDATA_OUT,
+ GPIO31_I2S_SYNC,
+
/* MMC */
GPIO32_MMC_CLK,
GPIO112_MMC_CMD,
#include <mach/regs-mem.h>
#include <mach/regs-lcd.h>
#include <mach/regs-sdi.h>
-#include <asm/plat-s3c24xx/regs-iis.h>
+#include <plat/regs-iis.h>
#include <plat/regs-spi.h>
static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
#include <mach/regs-mem.h>
#include <mach/regs-lcd.h>
#include <mach/regs-sdi.h>
-#include <asm/plat-s3c24xx/regs-s3c2412-iis.h>
-#include <asm/plat-s3c24xx/regs-iis.h>
+#include <plat/regs-s3c2412-iis.h>
+#include <plat/regs-iis.h>
#include <plat/regs-spi.h>
#define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }
#include <mach/regs-mem.h>
#include <mach/regs-lcd.h>
#include <mach/regs-sdi.h>
-#include <asm/plat-s3c24xx/regs-iis.h>
+#include <plat/regs-iis.h>
#include <plat/regs-spi.h>
static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = {
#include <mach/regs-mem.h>
#include <mach/regs-lcd.h>
#include <mach/regs-sdi.h>
-#include <asm/plat-s3c24xx/regs-iis.h>
+#include <plat/regs-iis.h>
#include <plat/regs-spi.h>
#define MAP(x) { \
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
};
-struct map_desc smdk6410_iodesc[] = {};
+static struct map_desc smdk6410_iodesc[] = {};
static struct platform_device *smdk6410_devices[] __initdata = {
#ifdef CONFIG_SMDK6410_SD_CH0
static struct i2c_board_info i2c_devs0[] __initdata = {
{ I2C_BOARD_INFO("24c08", 0x50), },
- { I2C_BOARD_INFO("WM8580", 0X1b), },
+ { I2C_BOARD_INFO("wm8580", 0x1b), },
};
static struct i2c_board_info i2c_devs1[] __initdata = {
#include <linux/init.h>
#include <linux/highmem.h>
-static void __attribute__((naked))
+static void __naked
feroceon_copy_user_page(void *kto, const void *kfrom)
{
asm("\
*
* FIXME: do we need to handle cache stuff...
*/
-static void __attribute__((naked))
+static void __naked
v3_copy_user_page(void *kto, const void *kfrom)
{
asm("\n\
* instruction. If your processor does not supply this, you have to write your
* own copy_user_highpage that does the right thing.
*/
-static void __attribute__((naked))
+static void __naked
mc_copy_user_page(void *from, void *to)
{
asm volatile(
* instruction. If your processor does not supply this, you have to write your
* own copy_user_highpage that does the right thing.
*/
-static void __attribute__((naked))
+static void __naked
v4wb_copy_user_page(void *kto, const void *kfrom)
{
asm("\
* dirty data in the cache. However, we do have to ensure that
* subsequent reads are up to date.
*/
-static void __attribute__((naked))
+static void __naked
v4wt_copy_user_page(void *kto, const void *kfrom)
{
asm("\
* if we eventually end up using our copied page.
*
*/
-static void __attribute__((naked))
+static void __naked
xsc3_mc_copy_user_page(void *kto, const void *kfrom)
{
asm("\
* Dcache aliasing issue. The writes will be forwarded to the write buffer,
* and merged as appropriate.
*/
-static void __attribute__((naked))
+static void __naked
mc_copy_user_page(void *from, void *to)
{
/*
*/
void dma_cache_maint(const void *start, size_t size, int direction)
{
- const void *end = start + size;
+ void (*inner_op)(const void *, const void *);
+ void (*outer_op)(unsigned long, unsigned long);
- BUG_ON(!virt_addr_valid(start) || !virt_addr_valid(end - 1));
+ BUG_ON(!virt_addr_valid(start) || !virt_addr_valid(start + size - 1));
switch (direction) {
case DMA_FROM_DEVICE: /* invalidate only */
- dmac_inv_range(start, end);
- outer_inv_range(__pa(start), __pa(end));
+ inner_op = dmac_inv_range;
+ outer_op = outer_inv_range;
break;
case DMA_TO_DEVICE: /* writeback only */
- dmac_clean_range(start, end);
- outer_clean_range(__pa(start), __pa(end));
+ inner_op = dmac_clean_range;
+ outer_op = outer_clean_range;
break;
case DMA_BIDIRECTIONAL: /* writeback and invalidate */
- dmac_flush_range(start, end);
- outer_flush_range(__pa(start), __pa(end));
+ inner_op = dmac_flush_range;
+ outer_op = outer_flush_range;
break;
default:
BUG();
}
+
+ inner_op(start, start + size);
+ outer_op(__pa(start), __pa(start) + size);
}
EXPORT_SYMBOL(dma_cache_maint);
for_each_node(node)
bootmem_free_node(node, mi);
- high_memory = __va(memend_pfn << PAGE_SHIFT);
+ high_memory = __va((memend_pfn << PAGE_SHIFT) - 1) + 1;
/*
* This doesn't seem to be used by the Linux memory manager any
{
if (addr < PHYS_OFFSET)
return 0;
- if (addr + size > __pa(high_memory))
+ if (addr + size >= __pa(high_memory - 1))
return 0;
return 1;
obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o
obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o
-obj-$(CONFIG_I2C_OMAP) += i2c.o
+i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o
+obj-y += $(i2c-omap-m) $(i2c-omap-y)
# OMAP mailbox framework
obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
-/*
- * Rounds down to nearest nsec.
- */
-unsigned long long omap_32k_ticks_to_nsecs(unsigned long ticks_32k)
-{
- return cyc2ns(&clocksource_32k, ticks_32k);
-}
-
/*
* Returns current time from boot in nsecs. It's OK for this to wrap
* around for now, as it's just a relative time stamp.
*/
unsigned long long sched_clock(void)
{
- return omap_32k_ticks_to_nsecs(omap_32k_read());
+ unsigned long long ret;
+
+ ret = (unsigned long long)omap_32k_read();
+ ret = (ret * clocksource_32k.mult_orig) >> clocksource_32k.shift;
+ return ret;
}
static int __init omap_init_clocksource_32k(void)
extern struct sys_timer omap_timer;
extern void omap_serial_init(void);
extern void omap_serial_enable_clocks(int enable);
-#ifdef CONFIG_I2C_OMAP
+#if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
extern int omap_register_i2c_bus(int bus_id, u32 clkrate,
struct i2c_board_info const *info,
unsigned len);
!defined(CONFIG_ARCH_OMAP15XX) && \
!defined(CONFIG_ARCH_OMAP16XX) && \
!defined(CONFIG_ARCH_OMAP24XX)
-#error "Power management for this processor not implemented yet"
+#warning "Power management for this processor not implemented yet"
#endif
#ifndef __ASSEMBLER__
#define S3C2412_IISCON_RXDMA_ACTIVE (1 << 1)
#define S3C2412_IISCON_IIS_ACTIVE (1 << 0)
+#define S3C64XX_IISMOD_IMS_PCLK (0 << 10)
+#define S3C64XX_IISMOD_IMS_SYSMUX (1 << 10)
+
#define S3C2412_IISMOD_MASTER_INTERNAL (0 << 10)
#define S3C2412_IISMOD_MASTER_EXTERNAL (1 << 10)
#define S3C2412_IISMOD_SLAVE (2 << 10)
#define S3C2412_IISMOD_LR_LLOW (0 << 7)
#define S3C2412_IISMOD_LR_RLOW (1 << 7)
#define S3C2412_IISMOD_SDF_IIS (0 << 5)
-#define S3C2412_IISMOD_SDF_MSB (0 << 5)
-#define S3C2412_IISMOD_SDF_LSB (0 << 5)
+#define S3C2412_IISMOD_SDF_MSB (1 << 5)
+#define S3C2412_IISMOD_SDF_LSB (2 << 5)
#define S3C2412_IISMOD_SDF_MASK (3 << 5)
#define S3C2412_IISMOD_RCLK_256FS (0 << 3)
#define S3C2412_IISMOD_RCLK_512FS (1 << 3)
&clk_48m,
};
-void s3c64xx_register_clocks(void)
+void __init s3c64xx_register_clocks(void)
{
struct clk *clkp;
int ret;
return 0;
}
-arch_initcall(s3c64xx_gpiolib_init);
+core_initcall(s3c64xx_gpiolib_init);
#define IRQ_ONENAND1 S3C64XX_IRQ_VIC1(12)
#define IRQ_NFC S3C64XX_IRQ_VIC1(13)
#define IRQ_CFCON S3C64XX_IRQ_VIC1(14)
-#define IRQ_UHOST S3C64XX_IRQ_VIC1(15)
+#define IRQ_USBH S3C64XX_IRQ_VIC1(15)
#define IRQ_SPI0 S3C64XX_IRQ_VIC1(16)
#define IRQ_SPI1 S3C64XX_IRQ_VIC1(17)
#define IRQ_IIC S3C64XX_IRQ_VIC1(18)
#include <linux/kernel.h>
#include <linux/interrupt.h>
+#include <linux/gpio.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <asm/hardware/vic.h>
#include <plat/regs-irqtype.h>
+#include <plat/regs-gpio.h>
+#include <plat/gpio-cfg.h>
#include <mach/map.h>
#include <plat/cpu.h>
static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
{
int offs = eint_offset(irq);
+ int pin;
int shift;
u32 ctrl, mask;
u32 newvalue = 0;
ctrl |= newvalue << shift;
__raw_writel(ctrl, reg);
+ /* set the GPIO pin appropriately */
+
+ if (offs < 23)
+ pin = S3C64XX_GPN(offs);
+ else
+ pin = S3C64XX_GPM(offs - 23);
+
+ s3c_gpio_cfgpin(pin, S3C_GPIO_SFN(2));
+
return 0;
}
s3c_irq_demux_eint(20, 27);
}
-int __init s3c64xx_init_irq_eint(void)
+static int __init s3c64xx_init_irq_eint(void)
{
int irq;
static void __init s3c64xx_uart_irq(struct uart_irq *uirq)
{
- void *reg_base = uirq->regs;
+ void __iomem *reg_base = uirq->regs;
unsigned int irq;
int offs;
* ext_xtal_mux for want of an actual name from the manual.
*/
-struct clk clk_ext_xtal_mux = {
+static struct clk clk_ext_xtal_mux = {
.name = "ext_xtal",
.id = -1,
};
void __iomem *reg_divider;
};
-struct clk clk_fout_apll = {
+static struct clk clk_fout_apll = {
.name = "fout_apll",
.id = -1,
};
.nr_sources = ARRAY_SIZE(clk_src_apll_list),
};
-struct clksrc_clk clk_mout_apll = {
+static struct clksrc_clk clk_mout_apll = {
.clk = {
.name = "mout_apll",
.id = -1,
.sources = &clk_src_apll,
};
-struct clk clk_fout_epll = {
+static struct clk clk_fout_epll = {
.name = "fout_epll",
.id = -1,
};
.nr_sources = ARRAY_SIZE(clk_src_epll_list),
};
-struct clksrc_clk clk_mout_epll = {
+static struct clksrc_clk clk_mout_epll = {
.clk = {
.name = "mout_epll",
.id = -1,
.nr_sources = ARRAY_SIZE(clk_src_mpll_list),
};
-struct clksrc_clk clk_mout_mpll = {
+static struct clksrc_clk clk_mout_mpll = {
.clk = {
.name = "mout_mpll",
.id = -1,
return rate;
}
-struct clk clk_dout_mpll = {
+static struct clk clk_dout_mpll = {
.name = "dout_mpll",
.id = -1,
.parent = &clk_mout_mpll.clk,
};
static struct clk *clkset_uhost_list[] = {
+ &clk_48m,
&clk_mout_epll.clk,
&clk_dout_mpll,
&clk_fin_epll,
- &clk_48m,
};
static struct clk_sources clkset_uhost = {
rate = clk_round_rate(clk, rate);
div = clk_get_rate(clk->parent) / rate;
+ if (div > 16)
+ return -EINVAL;
val = __raw_readl(reg);
- val &= ~sclk->mask;
- val |= (rate - 1) << sclk->shift;
+ val &= ~(0xf << sclk->shift);
+ val |= (div - 1) << sclk->shift;
__raw_writel(val, reg);
return 0;
static struct clksrc_clk clk_usbhost = {
.clk = {
- .name = "usb-host-bus",
+ .name = "usb-bus-host",
.id = -1,
.ctrlbit = S3C_CLKCON_SCLK_UHOST,
.enable = s3c64xx_sclk_ctrl,
#
# http://www.arm.linux.org.uk/developer/machines/?action=new
#
-# Last update: Sun Nov 30 16:39:36 2008
+# Last update: Thu Mar 12 18:01:45 2009
#
# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
#
jade MACH_JADE JADE 1821
ks8695_softplc MACH_KS8695_SOFTPLC KS8695_SOFTPLC 1822
gprisc3 MACH_GPRISC3 GPRISC3 1823
-stamp9260 MACH_STAMP9260 STAMP9260 1824
+stamp9g20 MACH_STAMP9G20 STAMP9G20 1824
smdk6430 MACH_SMDK6430 SMDK6430 1825
smdkc100 MACH_SMDKC100 SMDKC100 1826
tavorevb MACH_TAVOREVB TAVOREVB 1827
benzina MACH_BENZINA BENZINA 2003
blaze MACH_BLAZE BLAZE 2004
linkstation_ls_hgl MACH_LINKSTATION_LS_HGL LINKSTATION_LS_HGL 2005
-htcvenus MACH_HTCVENUS HTCVENUS 2006
+htckovsky MACH_HTCVENUS HTCVENUS 2006
+sony_prs505 MACH_SONY_PRS505 SONY_PRS505 2007
+hanlin_v3 MACH_HANLIN_V3 HANLIN_V3 2008
+sapphira MACH_SAPPHIRA SAPPHIRA 2009
+dack_sda_01 MACH_DACK_SDA_01 DACK_SDA_01 2010
+armbox MACH_ARMBOX ARMBOX 2011
+harris_rvp MACH_HARRIS_RVP HARRIS_RVP 2012
+ribaldo MACH_RIBALDO RIBALDO 2013
+agora MACH_AGORA AGORA 2014
+omap3_mini MACH_OMAP3_MINI OMAP3_MINI 2015
+a9sam6432_b MACH_A9SAM6432_B A9SAM6432_B 2016
+usg2410 MACH_USG2410 USG2410 2017
+pc72052_i10_revb MACH_PC72052_I10_REVB PC72052_I10_REVB 2018
+mx35_exm32 MACH_MX35_EXM32 MX35_EXM32 2019
+topas910 MACH_TOPAS910 TOPAS910 2020
+hyena MACH_HYENA HYENA 2021
+pospax MACH_POSPAX POSPAX 2022
+hdl_gx MACH_HDL_GX HDL_GX 2023
+ctera_4bay MACH_CTERA_4BAY CTERA_4BAY 2024
+ctera_plug_c MACH_CTERA_PLUG_C CTERA_PLUG_C 2025
+crwea_plug_i MACH_CRWEA_PLUG_I CRWEA_PLUG_I 2026
+egauge2 MACH_EGAUGE2 EGAUGE2 2027
+didj MACH_DIDJ DIDJ 2028
+m_s3c2443 MACH_MEISTER MEISTER 2029
+htcblackstone MACH_HTCBLACKSTONE HTCBLACKSTONE 2030
+cpuat9g20 MACH_CPUAT9G20 CPUAT9G20 2031
+smdk6440 MACH_SMDK6440 SMDK6440 2032
+omap_35xx_mvp MACH_OMAP_35XX_MVP OMAP_35XX_MVP 2033
+ctera_plug_i MACH_CTERA_PLUG_I CTERA_PLUG_I 2034
+pvg610_100 MACH_PVG610 PVG610 2035
+hprw6815 MACH_HPRW6815 HPRW6815 2036
+omap3_oswald MACH_OMAP3_OSWALD OMAP3_OSWALD 2037
+nas4220b MACH_NAS4220B NAS4220B 2038
+htcraphael_cdma MACH_HTCRAPHAEL_CDMA HTCRAPHAEL_CDMA 2039
+htcdiamond_cdma MACH_HTCDIAMOND_CDMA HTCDIAMOND_CDMA 2040
+scaler MACH_SCALER SCALER 2041
+zylonite2 MACH_ZYLONITE2 ZYLONITE2 2042
+aspenite MACH_ASPENITE ASPENITE 2043
+teton MACH_TETON TETON 2044
+ttc_dkb MACH_TTC_DKB TTC_DKB 2045
+bishop2 MACH_BISHOP2 BISHOP2 2046
+ippv5 MACH_IPPV5 IPPV5 2047
+farm926 MACH_FARM926 FARM926 2048
+mmccpu MACH_MMCCPU MMCCPU 2049
+sgmsfl MACH_SGMSFL SGMSFL 2050
+tt8000 MACH_TT8000 TT8000 2051
+zrn4300lp MACH_ZRN4300LP ZRN4300LP 2052
+mptc MACH_MPTC MPTC 2053
+h6051 MACH_H6051 H6051 2054
+pvg610_101 MACH_PVG610_101 PVG610_101 2055
+stamp9261_pc_evb MACH_STAMP9261_PC_EVB STAMP9261_PC_EVB 2056
+pelco_odysseus MACH_PELCO_ODYSSEUS PELCO_ODYSSEUS 2057
+tny_a9260 MACH_TNY_A9260 TNY_A9260 2058
+tny_a9g20 MACH_TNY_A9G20 TNY_A9G20 2059
+aesop_mp2530f MACH_AESOP_MP2530F AESOP_MP2530F 2060
+dx900 MACH_DX900 DX900 2061
+cpodc2 MACH_CPODC2 CPODC2 2062
+tilt_8925 MACH_TILT_8925 TILT_8925 2063
+davinci_dm357_evm MACH_DAVINCI_DM357_EVM DAVINCI_DM357_EVM 2064
+swordfish MACH_SWORDFISH SWORDFISH 2065
+corvus MACH_CORVUS CORVUS 2066
+taurus MACH_TAURUS TAURUS 2067
+axm MACH_AXM AXM 2068
+axc MACH_AXC AXC 2069
+baby MACH_BABY BABY 2070
+mp200 MACH_MP200 MP200 2071
+pcm043 MACH_PCM043 PCM043 2072
+hanlin_v3c MACH_HANLIN_V3C HANLIN_V3C 2073
+kbk9g20 MACH_KBK9G20 KBK9G20 2074
+adsturbog5 MACH_ADSTURBOG5 ADSTURBOG5 2075
+avenger_lite1 MACH_AVENGER_LITE1 AVENGER_LITE1 2076
+suc82x MACH_SUC SUC 2077
+at91sam7s256 MACH_AT91SAM7S256 AT91SAM7S256 2078
+mendoza MACH_MENDOZA MENDOZA 2079
+kira MACH_KIRA KIRA 2080
+mx1hbm MACH_MX1HBM MX1HBM 2081
+quatro43xx MACH_QUATRO43XX QUATRO43XX 2082
+quatro4230 MACH_QUATRO4230 QUATRO4230 2083
+nsb400 MACH_NSB400 NSB400 2084
+drp255 MACH_DRP255 DRP255 2085
+thoth MACH_THOTH THOTH 2086
+firestone MACH_FIRESTONE FIRESTONE 2087
+asusp750 MACH_ASUSP750 ASUSP750 2088
+ctera_dl MACH_CTERA_DL CTERA_DL 2089
+socr MACH_SOCR SOCR 2090
+htcoxygen MACH_HTCOXYGEN HTCOXYGEN 2091
+heroc MACH_HEROC HEROC 2092
+zeno6800 MACH_ZENO6800 ZENO6800 2093
+sc2mcs MACH_SC2MCS SC2MCS 2094
+gene100 MACH_GENE100 GENE100 2095
+as353x MACH_AS353X AS353X 2096
+sheevaplug MACH_SHEEVAPLUG SHEEVAPLUG 2097
+at91sam9g20 MACH_AT91SAM9G20 AT91SAM9G20 2098
+mv88f6192gtw_fe MACH_MV88F6192GTW_FE MV88F6192GTW_FE 2099
+cc9200 MACH_CC9200 CC9200 2100
+sm9200 MACH_SM9200 SM9200 2101
+tp9200 MACH_TP9200 TP9200 2102
+snapperdv MACH_SNAPPERDV SNAPPERDV 2103
+avengers_lite MACH_AVENGERS_LITE AVENGERS_LITE 2104
+avengers_lite1 MACH_AVENGERS_LITE1 AVENGERS_LITE1 2105
+omap3axon MACH_OMAP3AXON OMAP3AXON 2106
+ma8xx MACH_MA8XX MA8XX 2107
+mp201ek MACH_MP201EK MP201EK 2108
+davinci_tux MACH_DAVINCI_TUX DAVINCI_TUX 2109
+mpa1600 MACH_MPA1600 MPA1600 2110
+pelco_troy MACH_PELCO_TROY PELCO_TROY 2111
+nsb667 MACH_NSB667 NSB667 2112
+rovers5_4mpix MACH_ROVERS5_4MPIX ROVERS5_4MPIX 2113
+twocom MACH_TWOCOM TWOCOM 2114
+ubisys_p9_rcu3r2 MACH_UBISYS_P9_RCU3R2 UBISYS_P9_RCU3R2 2115
+hero_espresso MACH_HERO_ESPRESSO HERO_ESPRESSO 2116
+afeusb MACH_AFEUSB AFEUSB 2117
+t830 MACH_T830 T830 2118
+spd8020_cc MACH_SPD8020_CC SPD8020_CC 2119
+om_3d7k MACH_OM_3D7K OM_3D7K 2120
+picocom2 MACH_PICOCOM2 PICOCOM2 2121
+uwg4mx27 MACH_UWG4MX27 UWG4MX27 2122
+uwg4mx31 MACH_UWG4MX31 UWG4MX31 2123
+cherry MACH_CHERRY CHERRY 2124
+mx51_babbage MACH_MX51_BABBAGE MX51_BABBAGE 2125
+s3c2440turkiye MACH_S3C2440TURKIYE S3C2440TURKIYE 2126
+tx37 MACH_TX37 TX37 2127
+sbc2800_9g20 MACH_SBC2800_9G20 SBC2800_9G20 2128
+benzglb MACH_BENZGLB BENZGLB 2129
+benztd MACH_BENZTD BENZTD 2130
+cartesio_plus MACH_CARTESIO_PLUS CARTESIO_PLUS 2131
+solrad_g20 MACH_SOLRAD_G20 SOLRAD_G20 2132
+mx27wallace MACH_MX27WALLACE MX27WALLACE 2133
+fmzwebmodul MACH_FMZWEBMODUL FMZWEBMODUL 2134
+rd78x00_masa MACH_RD78X00_MASA RD78X00_MASA 2135
+smallogger MACH_SMALLOGGER SMALLOGGER 2136
+#ifndef _M68K_PARAM_H
+#define _M68K_PARAM_H
+
+#ifdef __KERNEL__
+# define HZ CONFIG_HZ /* Internal kernel timer frequency */
+# define USER_HZ 100 /* .. some user interfaces are in "ticks" */
+# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
+#endif
+
+#ifndef HZ
+#define HZ 100
+#endif
+
#ifdef __uClinux__
-#include "param_no.h"
+#define EXEC_PAGESIZE 4096
#else
-#include "param_mm.h"
+#define EXEC_PAGESIZE 8192
+#endif
+
+#ifndef NOGROUP
+#define NOGROUP (-1)
#endif
+
+#define MAXHOSTNAMELEN 64 /* max length of hostname */
+
+#endif /* _M68K_PARAM_H */
+++ /dev/null
-#ifndef _M68K_PARAM_H
-#define _M68K_PARAM_H
-
-#ifdef __KERNEL__
-# define HZ CONFIG_HZ /* Internal kernel timer frequency */
-# define USER_HZ 100 /* .. some user interfaces are in "ticks" */
-# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
-#endif
-
-#ifndef HZ
-#define HZ 100
-#endif
-
-#define EXEC_PAGESIZE 8192
-
-#ifndef NOGROUP
-#define NOGROUP (-1)
-#endif
-
-#define MAXHOSTNAMELEN 64 /* max length of hostname */
-
-#endif /* _M68K_PARAM_H */
+++ /dev/null
-#ifndef _M68KNOMMU_PARAM_H
-#define _M68KNOMMU_PARAM_H
-
-#ifdef __KERNEL__
-#define HZ CONFIG_HZ
-#define USER_HZ HZ
-#define CLOCKS_PER_SEC (USER_HZ)
-#endif
-
-#ifndef HZ
-#define HZ 100
-#endif
-
-#define EXEC_PAGESIZE 4096
-
-#ifndef NOGROUP
-#define NOGROUP (-1)
-#endif
-
-#define MAXHOSTNAMELEN 64 /* max length of hostname */
-
-#endif /* _M68KNOMMU_PARAM_H */
-#ifdef __uClinux__
-#include "ptrace_no.h"
+#ifndef _M68K_PTRACE_H
+#define _M68K_PTRACE_H
+
+#define PT_D1 0
+#define PT_D2 1
+#define PT_D3 2
+#define PT_D4 3
+#define PT_D5 4
+#define PT_D6 5
+#define PT_D7 6
+#define PT_A0 7
+#define PT_A1 8
+#define PT_A2 9
+#define PT_A3 10
+#define PT_A4 11
+#define PT_A5 12
+#define PT_A6 13
+#define PT_D0 14
+#define PT_USP 15
+#define PT_ORIG_D0 16
+#define PT_SR 17
+#define PT_PC 18
+
+#ifndef __ASSEMBLY__
+
+/* this struct defines the way the registers are stored on the
+ stack during a system call. */
+
+struct pt_regs {
+ long d1;
+ long d2;
+ long d3;
+ long d4;
+ long d5;
+ long a0;
+ long a1;
+ long a2;
+ long d0;
+ long orig_d0;
+ long stkadj;
+#ifdef CONFIG_COLDFIRE
+ unsigned format : 4; /* frame format specifier */
+ unsigned vector : 12; /* vector offset */
+ unsigned short sr;
+ unsigned long pc;
#else
-#include "ptrace_mm.h"
+ unsigned short sr;
+ unsigned long pc;
+ unsigned format : 4; /* frame format specifier */
+ unsigned vector : 12; /* vector offset */
#endif
+};
+
+/*
+ * This is the extended stack used by signal handlers and the context
+ * switcher: it's pushed after the normal "struct pt_regs".
+ */
+struct switch_stack {
+ unsigned long d6;
+ unsigned long d7;
+ unsigned long a3;
+ unsigned long a4;
+ unsigned long a5;
+ unsigned long a6;
+ unsigned long retpc;
+};
+
+/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
+#define PTRACE_GETREGS 12
+#define PTRACE_SETREGS 13
+#define PTRACE_GETFPREGS 14
+#define PTRACE_SETFPREGS 15
+
+#ifdef __KERNEL__
+
+#ifndef PS_S
+#define PS_S (0x2000)
+#define PS_M (0x1000)
+#endif
+
+#define user_mode(regs) (!((regs)->sr & PS_S))
+#define instruction_pointer(regs) ((regs)->pc)
+#define profile_pc(regs) instruction_pointer(regs)
+extern void show_regs(struct pt_regs *);
+#endif /* __KERNEL__ */
+#endif /* __ASSEMBLY__ */
+#endif /* _M68K_PTRACE_H */
+++ /dev/null
-#ifndef _M68K_PTRACE_H
-#define _M68K_PTRACE_H
-
-#define PT_D1 0
-#define PT_D2 1
-#define PT_D3 2
-#define PT_D4 3
-#define PT_D5 4
-#define PT_D6 5
-#define PT_D7 6
-#define PT_A0 7
-#define PT_A1 8
-#define PT_A2 9
-#define PT_A3 10
-#define PT_A4 11
-#define PT_A5 12
-#define PT_A6 13
-#define PT_D0 14
-#define PT_USP 15
-#define PT_ORIG_D0 16
-#define PT_SR 17
-#define PT_PC 18
-
-#ifndef __ASSEMBLY__
-
-/* this struct defines the way the registers are stored on the
- stack during a system call. */
-
-struct pt_regs {
- long d1;
- long d2;
- long d3;
- long d4;
- long d5;
- long a0;
- long a1;
- long a2;
- long d0;
- long orig_d0;
- long stkadj;
- unsigned short sr;
- unsigned long pc;
- unsigned format : 4; /* frame format specifier */
- unsigned vector : 12; /* vector offset */
-};
-
-/*
- * This is the extended stack used by signal handlers and the context
- * switcher: it's pushed after the normal "struct pt_regs".
- */
-struct switch_stack {
- unsigned long d6;
- unsigned long d7;
- unsigned long a3;
- unsigned long a4;
- unsigned long a5;
- unsigned long a6;
- unsigned long retpc;
-};
-
-/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
-#define PTRACE_GETREGS 12
-#define PTRACE_SETREGS 13
-#define PTRACE_GETFPREGS 14
-#define PTRACE_SETFPREGS 15
-
-#ifdef __KERNEL__
-
-#ifndef PS_S
-#define PS_S (0x2000)
-#define PS_M (0x1000)
-#endif
-
-#define user_mode(regs) (!((regs)->sr & PS_S))
-#define instruction_pointer(regs) ((regs)->pc)
-#define profile_pc(regs) instruction_pointer(regs)
-extern void show_regs(struct pt_regs *);
-#endif /* __KERNEL__ */
-#endif /* __ASSEMBLY__ */
-#endif /* _M68K_PTRACE_H */
+++ /dev/null
-#ifndef _M68K_PTRACE_H
-#define _M68K_PTRACE_H
-
-#define PT_D1 0
-#define PT_D2 1
-#define PT_D3 2
-#define PT_D4 3
-#define PT_D5 4
-#define PT_D6 5
-#define PT_D7 6
-#define PT_A0 7
-#define PT_A1 8
-#define PT_A2 9
-#define PT_A3 10
-#define PT_A4 11
-#define PT_A5 12
-#define PT_A6 13
-#define PT_D0 14
-#define PT_USP 15
-#define PT_ORIG_D0 16
-#define PT_SR 17
-#define PT_PC 18
-
-#ifndef __ASSEMBLY__
-
-/* this struct defines the way the registers are stored on the
- stack during a system call. */
-
-struct pt_regs {
- long d1;
- long d2;
- long d3;
- long d4;
- long d5;
- long a0;
- long a1;
- long a2;
- long d0;
- long orig_d0;
- long stkadj;
-#ifdef CONFIG_COLDFIRE
- unsigned format : 4; /* frame format specifier */
- unsigned vector : 12; /* vector offset */
- unsigned short sr;
- unsigned long pc;
-#else
- unsigned short sr;
- unsigned long pc;
- unsigned format : 4; /* frame format specifier */
- unsigned vector : 12; /* vector offset */
-#endif
-};
-
-/*
- * This is the extended stack used by signal handlers and the context
- * switcher: it's pushed after the normal "struct pt_regs".
- */
-struct switch_stack {
- unsigned long d6;
- unsigned long d7;
- unsigned long a3;
- unsigned long a4;
- unsigned long a5;
- unsigned long a6;
- unsigned long retpc;
-};
-
-/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
-#define PTRACE_GETREGS 12
-#define PTRACE_SETREGS 13
-#define PTRACE_GETFPREGS 14
-#define PTRACE_SETFPREGS 15
-
-#ifdef __KERNEL__
-
-#ifndef PS_S
-#define PS_S (0x2000)
-#define PS_M (0x1000)
-#endif
-
-#define user_mode(regs) (!((regs)->sr & PS_S))
-#define instruction_pointer(regs) ((regs)->pc)
-#define profile_pc(regs) instruction_pointer(regs)
-extern void show_regs(struct pt_regs *);
-#endif /* __KERNEL__ */
-#endif /* __ASSEMBLY__ */
-#endif /* _M68K_PTRACE_H */
-#ifdef __uClinux__
-#include "setup_no.h"
+/*
+** asm/setup.h -- Definition of the Linux/m68k setup information
+**
+** Copyright 1992 by Greg Harp
+**
+** This file is subject to the terms and conditions of the GNU General Public
+** License. See the file COPYING in the main directory of this archive
+** for more details.
+**
+** Created 09/29/92 by Greg Harp
+**
+** 5/2/94 Roman Hodek:
+** Added bi_atari part of the machine dependent union bi_un; for now it
+** contains just a model field to distinguish between TT and Falcon.
+** 26/7/96 Roman Zippel:
+** Renamed to setup.h; added some useful macros to allow gcc some
+** optimizations if possible.
+** 5/10/96 Geert Uytterhoeven:
+** Redesign of the boot information structure; moved boot information
+** structure to bootinfo.h
+*/
+
+#ifndef _M68K_SETUP_H
+#define _M68K_SETUP_H
+
+
+
+ /*
+ * Linux/m68k Architectures
+ */
+
+#define MACH_AMIGA 1
+#define MACH_ATARI 2
+#define MACH_MAC 3
+#define MACH_APOLLO 4
+#define MACH_SUN3 5
+#define MACH_MVME147 6
+#define MACH_MVME16x 7
+#define MACH_BVME6000 8
+#define MACH_HP300 9
+#define MACH_Q40 10
+#define MACH_SUN3X 11
+
+#define COMMAND_LINE_SIZE 256
+
+#ifdef __KERNEL__
+
+#define CL_SIZE COMMAND_LINE_SIZE
+
+#ifndef __ASSEMBLY__
+extern unsigned long m68k_machtype;
+#endif /* !__ASSEMBLY__ */
+
+#if !defined(CONFIG_AMIGA)
+# define MACH_IS_AMIGA (0)
+#elif defined(CONFIG_ATARI) || defined(CONFIG_MAC) || defined(CONFIG_APOLLO) \
+ || defined(CONFIG_MVME16x) || defined(CONFIG_BVME6000) \
+ || defined(CONFIG_HP300) || defined(CONFIG_Q40) \
+ || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+# define MACH_IS_AMIGA (m68k_machtype == MACH_AMIGA)
#else
-#include "setup_mm.h"
+# define MACH_AMIGA_ONLY
+# define MACH_IS_AMIGA (1)
+# define MACH_TYPE (MACH_AMIGA)
#endif
+
+#if !defined(CONFIG_ATARI)
+# define MACH_IS_ATARI (0)
+#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_APOLLO) \
+ || defined(CONFIG_MVME16x) || defined(CONFIG_BVME6000) \
+ || defined(CONFIG_HP300) || defined(CONFIG_Q40) \
+ || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+# define MACH_IS_ATARI (m68k_machtype == MACH_ATARI)
+#else
+# define MACH_ATARI_ONLY
+# define MACH_IS_ATARI (1)
+# define MACH_TYPE (MACH_ATARI)
+#endif
+
+#if !defined(CONFIG_MAC)
+# define MACH_IS_MAC (0)
+#elif defined(CONFIG_AMIGA) || defined(CONFIG_ATARI) || defined(CONFIG_APOLLO) \
+ || defined(CONFIG_MVME16x) || defined(CONFIG_BVME6000) \
+ || defined(CONFIG_HP300) || defined(CONFIG_Q40) \
+ || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+# define MACH_IS_MAC (m68k_machtype == MACH_MAC)
+#else
+# define MACH_MAC_ONLY
+# define MACH_IS_MAC (1)
+# define MACH_TYPE (MACH_MAC)
+#endif
+
+#if defined(CONFIG_SUN3)
+#define MACH_IS_SUN3 (1)
+#define MACH_SUN3_ONLY (1)
+#define MACH_TYPE (MACH_SUN3)
+#else
+#define MACH_IS_SUN3 (0)
+#endif
+
+#if !defined (CONFIG_APOLLO)
+# define MACH_IS_APOLLO (0)
+#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
+ || defined(CONFIG_MVME16x) || defined(CONFIG_BVME6000) \
+ || defined(CONFIG_HP300) || defined(CONFIG_Q40) \
+ || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+# define MACH_IS_APOLLO (m68k_machtype == MACH_APOLLO)
+#else
+# define MACH_APOLLO_ONLY
+# define MACH_IS_APOLLO (1)
+# define MACH_TYPE (MACH_APOLLO)
+#endif
+
+#if !defined (CONFIG_MVME147)
+# define MACH_IS_MVME147 (0)
+#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
+ || defined(CONFIG_APOLLO) || defined(CONFIG_BVME6000) \
+ || defined(CONFIG_HP300) || defined(CONFIG_Q40) \
+ || defined(CONFIG_SUN3X) || defined(CONFIG_MVME16x)
+# define MACH_IS_MVME147 (m68k_machtype == MACH_MVME147)
+#else
+# define MACH_MVME147_ONLY
+# define MACH_IS_MVME147 (1)
+# define MACH_TYPE (MACH_MVME147)
+#endif
+
+#if !defined (CONFIG_MVME16x)
+# define MACH_IS_MVME16x (0)
+#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
+ || defined(CONFIG_APOLLO) || defined(CONFIG_BVME6000) \
+ || defined(CONFIG_HP300) || defined(CONFIG_Q40) \
+ || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+# define MACH_IS_MVME16x (m68k_machtype == MACH_MVME16x)
+#else
+# define MACH_MVME16x_ONLY
+# define MACH_IS_MVME16x (1)
+# define MACH_TYPE (MACH_MVME16x)
+#endif
+
+#if !defined (CONFIG_BVME6000)
+# define MACH_IS_BVME6000 (0)
+#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
+ || defined(CONFIG_APOLLO) || defined(CONFIG_MVME16x) \
+ || defined(CONFIG_HP300) || defined(CONFIG_Q40) \
+ || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+# define MACH_IS_BVME6000 (m68k_machtype == MACH_BVME6000)
+#else
+# define MACH_BVME6000_ONLY
+# define MACH_IS_BVME6000 (1)
+# define MACH_TYPE (MACH_BVME6000)
+#endif
+
+#if !defined (CONFIG_HP300)
+# define MACH_IS_HP300 (0)
+#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
+ || defined(CONFIG_APOLLO) || defined(CONFIG_MVME16x) \
+ || defined(CONFIG_BVME6000) || defined(CONFIG_Q40) \
+ || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+# define MACH_IS_HP300 (m68k_machtype == MACH_HP300)
+#else
+# define MACH_HP300_ONLY
+# define MACH_IS_HP300 (1)
+# define MACH_TYPE (MACH_HP300)
+#endif
+
+#if !defined (CONFIG_Q40)
+# define MACH_IS_Q40 (0)
+#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
+ || defined(CONFIG_APOLLO) || defined(CONFIG_MVME16x) \
+ || defined(CONFIG_BVME6000) || defined(CONFIG_HP300) \
+ || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+# define MACH_IS_Q40 (m68k_machtype == MACH_Q40)
+#else
+# define MACH_Q40_ONLY
+# define MACH_IS_Q40 (1)
+# define MACH_TYPE (MACH_Q40)
+#endif
+
+#if !defined (CONFIG_SUN3X)
+# define MACH_IS_SUN3X (0)
+#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
+ || defined(CONFIG_APOLLO) || defined(CONFIG_MVME16x) \
+ || defined(CONFIG_BVME6000) || defined(CONFIG_HP300) \
+ || defined(CONFIG_Q40) || defined(CONFIG_MVME147)
+# define MACH_IS_SUN3X (m68k_machtype == MACH_SUN3X)
+#else
+# define CONFIG_SUN3X_ONLY
+# define MACH_IS_SUN3X (1)
+# define MACH_TYPE (MACH_SUN3X)
+#endif
+
+#ifndef MACH_TYPE
+# define MACH_TYPE (m68k_machtype)
+#endif
+
+#endif /* __KERNEL__ */
+
+
+ /*
+ * CPU, FPU and MMU types
+ *
+ * Note: we may rely on the following equalities:
+ *
+ * CPU_68020 == MMU_68851
+ * CPU_68030 == MMU_68030
+ * CPU_68040 == FPU_68040 == MMU_68040
+ * CPU_68060 == FPU_68060 == MMU_68060
+ */
+
+#define CPUB_68020 0
+#define CPUB_68030 1
+#define CPUB_68040 2
+#define CPUB_68060 3
+
+#define CPU_68020 (1<<CPUB_68020)
+#define CPU_68030 (1<<CPUB_68030)
+#define CPU_68040 (1<<CPUB_68040)
+#define CPU_68060 (1<<CPUB_68060)
+
+#define FPUB_68881 0
+#define FPUB_68882 1
+#define FPUB_68040 2 /* Internal FPU */
+#define FPUB_68060 3 /* Internal FPU */
+#define FPUB_SUNFPA 4 /* Sun-3 FPA */
+
+#define FPU_68881 (1<<FPUB_68881)
+#define FPU_68882 (1<<FPUB_68882)
+#define FPU_68040 (1<<FPUB_68040)
+#define FPU_68060 (1<<FPUB_68060)
+#define FPU_SUNFPA (1<<FPUB_SUNFPA)
+
+#define MMUB_68851 0
+#define MMUB_68030 1 /* Internal MMU */
+#define MMUB_68040 2 /* Internal MMU */
+#define MMUB_68060 3 /* Internal MMU */
+#define MMUB_APOLLO 4 /* Custom Apollo */
+#define MMUB_SUN3 5 /* Custom Sun-3 */
+
+#define MMU_68851 (1<<MMUB_68851)
+#define MMU_68030 (1<<MMUB_68030)
+#define MMU_68040 (1<<MMUB_68040)
+#define MMU_68060 (1<<MMUB_68060)
+#define MMU_SUN3 (1<<MMUB_SUN3)
+#define MMU_APOLLO (1<<MMUB_APOLLO)
+
+#ifdef __KERNEL__
+
+#ifndef __ASSEMBLY__
+extern unsigned long m68k_cputype;
+extern unsigned long m68k_fputype;
+extern unsigned long m68k_mmutype;
+#ifdef CONFIG_VME
+extern unsigned long vme_brdtype;
+#endif
+
+ /*
+ * m68k_is040or060 is != 0 for a '040 or higher;
+ * used numbers are 4 for 68040 and 6 for 68060.
+ */
+
+extern int m68k_is040or060;
+#endif /* !__ASSEMBLY__ */
+
+#if !defined(CONFIG_M68020)
+# define CPU_IS_020 (0)
+# define MMU_IS_851 (0)
+# define MMU_IS_SUN3 (0)
+#elif defined(CONFIG_M68030) || defined(CONFIG_M68040) || defined(CONFIG_M68060)
+# define CPU_IS_020 (m68k_cputype & CPU_68020)
+# define MMU_IS_851 (m68k_mmutype & MMU_68851)
+# define MMU_IS_SUN3 (0) /* Sun3 not supported with other CPU enabled */
+#else
+# define CPU_M68020_ONLY
+# define CPU_IS_020 (1)
+#ifdef MACH_SUN3_ONLY
+# define MMU_IS_SUN3 (1)
+# define MMU_IS_851 (0)
+#else
+# define MMU_IS_SUN3 (0)
+# define MMU_IS_851 (1)
+#endif
+#endif
+
+#if !defined(CONFIG_M68030)
+# define CPU_IS_030 (0)
+# define MMU_IS_030 (0)
+#elif defined(CONFIG_M68020) || defined(CONFIG_M68040) || defined(CONFIG_M68060)
+# define CPU_IS_030 (m68k_cputype & CPU_68030)
+# define MMU_IS_030 (m68k_mmutype & MMU_68030)
+#else
+# define CPU_M68030_ONLY
+# define CPU_IS_030 (1)
+# define MMU_IS_030 (1)
+#endif
+
+#if !defined(CONFIG_M68040)
+# define CPU_IS_040 (0)
+# define MMU_IS_040 (0)
+#elif defined(CONFIG_M68020) || defined(CONFIG_M68030) || defined(CONFIG_M68060)
+# define CPU_IS_040 (m68k_cputype & CPU_68040)
+# define MMU_IS_040 (m68k_mmutype & MMU_68040)
+#else
+# define CPU_M68040_ONLY
+# define CPU_IS_040 (1)
+# define MMU_IS_040 (1)
+#endif
+
+#if !defined(CONFIG_M68060)
+# define CPU_IS_060 (0)
+# define MMU_IS_060 (0)
+#elif defined(CONFIG_M68020) || defined(CONFIG_M68030) || defined(CONFIG_M68040)
+# define CPU_IS_060 (m68k_cputype & CPU_68060)
+# define MMU_IS_060 (m68k_mmutype & MMU_68060)
+#else
+# define CPU_M68060_ONLY
+# define CPU_IS_060 (1)
+# define MMU_IS_060 (1)
+#endif
+
+#if !defined(CONFIG_M68020) && !defined(CONFIG_M68030)
+# define CPU_IS_020_OR_030 (0)
+#else
+# define CPU_M68020_OR_M68030
+# if defined(CONFIG_M68040) || defined(CONFIG_M68060)
+# define CPU_IS_020_OR_030 (!m68k_is040or060)
+# else
+# define CPU_M68020_OR_M68030_ONLY
+# define CPU_IS_020_OR_030 (1)
+# endif
+#endif
+
+#if !defined(CONFIG_M68040) && !defined(CONFIG_M68060)
+# define CPU_IS_040_OR_060 (0)
+#else
+# define CPU_M68040_OR_M68060
+# if defined(CONFIG_M68020) || defined(CONFIG_M68030)
+# define CPU_IS_040_OR_060 (m68k_is040or060)
+# else
+# define CPU_M68040_OR_M68060_ONLY
+# define CPU_IS_040_OR_060 (1)
+# endif
+#endif
+
+#define CPU_TYPE (m68k_cputype)
+
+#ifdef CONFIG_M68KFPU_EMU
+# ifdef CONFIG_M68KFPU_EMU_ONLY
+# define FPU_IS_EMU (1)
+# else
+# define FPU_IS_EMU (!m68k_fputype)
+# endif
+#else
+# define FPU_IS_EMU (0)
+#endif
+
+
+ /*
+ * Miscellaneous
+ */
+
+#define NUM_MEMINFO 4
+
+#ifndef __ASSEMBLY__
+struct mem_info {
+ unsigned long addr; /* physical address of memory chunk */
+ unsigned long size; /* length of memory chunk (in bytes) */
+};
+
+extern int m68k_num_memory; /* # of memory blocks found (and used) */
+extern int m68k_realnum_memory; /* real # of memory blocks found */
+extern struct mem_info m68k_memory[NUM_MEMINFO];/* memory description */
+#endif
+
+#endif /* __KERNEL__ */
+
+#endif /* _M68K_SETUP_H */
+++ /dev/null
-/*
-** asm/setup.h -- Definition of the Linux/m68k setup information
-**
-** Copyright 1992 by Greg Harp
-**
-** This file is subject to the terms and conditions of the GNU General Public
-** License. See the file COPYING in the main directory of this archive
-** for more details.
-**
-** Created 09/29/92 by Greg Harp
-**
-** 5/2/94 Roman Hodek:
-** Added bi_atari part of the machine dependent union bi_un; for now it
-** contains just a model field to distinguish between TT and Falcon.
-** 26/7/96 Roman Zippel:
-** Renamed to setup.h; added some useful macros to allow gcc some
-** optimizations if possible.
-** 5/10/96 Geert Uytterhoeven:
-** Redesign of the boot information structure; moved boot information
-** structure to bootinfo.h
-*/
-
-#ifndef _M68K_SETUP_H
-#define _M68K_SETUP_H
-
-
-
- /*
- * Linux/m68k Architectures
- */
-
-#define MACH_AMIGA 1
-#define MACH_ATARI 2
-#define MACH_MAC 3
-#define MACH_APOLLO 4
-#define MACH_SUN3 5
-#define MACH_MVME147 6
-#define MACH_MVME16x 7
-#define MACH_BVME6000 8
-#define MACH_HP300 9
-#define MACH_Q40 10
-#define MACH_SUN3X 11
-
-#define COMMAND_LINE_SIZE 256
-
-#ifdef __KERNEL__
-
-#define CL_SIZE COMMAND_LINE_SIZE
-
-#ifndef __ASSEMBLY__
-extern unsigned long m68k_machtype;
-#endif /* !__ASSEMBLY__ */
-
-#if !defined(CONFIG_AMIGA)
-# define MACH_IS_AMIGA (0)
-#elif defined(CONFIG_ATARI) || defined(CONFIG_MAC) || defined(CONFIG_APOLLO) \
- || defined(CONFIG_MVME16x) || defined(CONFIG_BVME6000) \
- || defined(CONFIG_HP300) || defined(CONFIG_Q40) \
- || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
-# define MACH_IS_AMIGA (m68k_machtype == MACH_AMIGA)
-#else
-# define MACH_AMIGA_ONLY
-# define MACH_IS_AMIGA (1)
-# define MACH_TYPE (MACH_AMIGA)
-#endif
-
-#if !defined(CONFIG_ATARI)
-# define MACH_IS_ATARI (0)
-#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_APOLLO) \
- || defined(CONFIG_MVME16x) || defined(CONFIG_BVME6000) \
- || defined(CONFIG_HP300) || defined(CONFIG_Q40) \
- || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
-# define MACH_IS_ATARI (m68k_machtype == MACH_ATARI)
-#else
-# define MACH_ATARI_ONLY
-# define MACH_IS_ATARI (1)
-# define MACH_TYPE (MACH_ATARI)
-#endif
-
-#if !defined(CONFIG_MAC)
-# define MACH_IS_MAC (0)
-#elif defined(CONFIG_AMIGA) || defined(CONFIG_ATARI) || defined(CONFIG_APOLLO) \
- || defined(CONFIG_MVME16x) || defined(CONFIG_BVME6000) \
- || defined(CONFIG_HP300) || defined(CONFIG_Q40) \
- || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
-# define MACH_IS_MAC (m68k_machtype == MACH_MAC)
-#else
-# define MACH_MAC_ONLY
-# define MACH_IS_MAC (1)
-# define MACH_TYPE (MACH_MAC)
-#endif
-
-#if defined(CONFIG_SUN3)
-#define MACH_IS_SUN3 (1)
-#define MACH_SUN3_ONLY (1)
-#define MACH_TYPE (MACH_SUN3)
-#else
-#define MACH_IS_SUN3 (0)
-#endif
-
-#if !defined (CONFIG_APOLLO)
-# define MACH_IS_APOLLO (0)
-#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
- || defined(CONFIG_MVME16x) || defined(CONFIG_BVME6000) \
- || defined(CONFIG_HP300) || defined(CONFIG_Q40) \
- || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
-# define MACH_IS_APOLLO (m68k_machtype == MACH_APOLLO)
-#else
-# define MACH_APOLLO_ONLY
-# define MACH_IS_APOLLO (1)
-# define MACH_TYPE (MACH_APOLLO)
-#endif
-
-#if !defined (CONFIG_MVME147)
-# define MACH_IS_MVME147 (0)
-#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
- || defined(CONFIG_APOLLO) || defined(CONFIG_BVME6000) \
- || defined(CONFIG_HP300) || defined(CONFIG_Q40) \
- || defined(CONFIG_SUN3X) || defined(CONFIG_MVME16x)
-# define MACH_IS_MVME147 (m68k_machtype == MACH_MVME147)
-#else
-# define MACH_MVME147_ONLY
-# define MACH_IS_MVME147 (1)
-# define MACH_TYPE (MACH_MVME147)
-#endif
-
-#if !defined (CONFIG_MVME16x)
-# define MACH_IS_MVME16x (0)
-#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
- || defined(CONFIG_APOLLO) || defined(CONFIG_BVME6000) \
- || defined(CONFIG_HP300) || defined(CONFIG_Q40) \
- || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
-# define MACH_IS_MVME16x (m68k_machtype == MACH_MVME16x)
-#else
-# define MACH_MVME16x_ONLY
-# define MACH_IS_MVME16x (1)
-# define MACH_TYPE (MACH_MVME16x)
-#endif
-
-#if !defined (CONFIG_BVME6000)
-# define MACH_IS_BVME6000 (0)
-#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
- || defined(CONFIG_APOLLO) || defined(CONFIG_MVME16x) \
- || defined(CONFIG_HP300) || defined(CONFIG_Q40) \
- || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
-# define MACH_IS_BVME6000 (m68k_machtype == MACH_BVME6000)
-#else
-# define MACH_BVME6000_ONLY
-# define MACH_IS_BVME6000 (1)
-# define MACH_TYPE (MACH_BVME6000)
-#endif
-
-#if !defined (CONFIG_HP300)
-# define MACH_IS_HP300 (0)
-#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
- || defined(CONFIG_APOLLO) || defined(CONFIG_MVME16x) \
- || defined(CONFIG_BVME6000) || defined(CONFIG_Q40) \
- || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
-# define MACH_IS_HP300 (m68k_machtype == MACH_HP300)
-#else
-# define MACH_HP300_ONLY
-# define MACH_IS_HP300 (1)
-# define MACH_TYPE (MACH_HP300)
-#endif
-
-#if !defined (CONFIG_Q40)
-# define MACH_IS_Q40 (0)
-#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
- || defined(CONFIG_APOLLO) || defined(CONFIG_MVME16x) \
- || defined(CONFIG_BVME6000) || defined(CONFIG_HP300) \
- || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
-# define MACH_IS_Q40 (m68k_machtype == MACH_Q40)
-#else
-# define MACH_Q40_ONLY
-# define MACH_IS_Q40 (1)
-# define MACH_TYPE (MACH_Q40)
-#endif
-
-#if !defined (CONFIG_SUN3X)
-# define MACH_IS_SUN3X (0)
-#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
- || defined(CONFIG_APOLLO) || defined(CONFIG_MVME16x) \
- || defined(CONFIG_BVME6000) || defined(CONFIG_HP300) \
- || defined(CONFIG_Q40) || defined(CONFIG_MVME147)
-# define MACH_IS_SUN3X (m68k_machtype == MACH_SUN3X)
-#else
-# define CONFIG_SUN3X_ONLY
-# define MACH_IS_SUN3X (1)
-# define MACH_TYPE (MACH_SUN3X)
-#endif
-
-#ifndef MACH_TYPE
-# define MACH_TYPE (m68k_machtype)
-#endif
-
-#endif /* __KERNEL__ */
-
-
- /*
- * CPU, FPU and MMU types
- *
- * Note: we may rely on the following equalities:
- *
- * CPU_68020 == MMU_68851
- * CPU_68030 == MMU_68030
- * CPU_68040 == FPU_68040 == MMU_68040
- * CPU_68060 == FPU_68060 == MMU_68060
- */
-
-#define CPUB_68020 0
-#define CPUB_68030 1
-#define CPUB_68040 2
-#define CPUB_68060 3
-
-#define CPU_68020 (1<<CPUB_68020)
-#define CPU_68030 (1<<CPUB_68030)
-#define CPU_68040 (1<<CPUB_68040)
-#define CPU_68060 (1<<CPUB_68060)
-
-#define FPUB_68881 0
-#define FPUB_68882 1
-#define FPUB_68040 2 /* Internal FPU */
-#define FPUB_68060 3 /* Internal FPU */
-#define FPUB_SUNFPA 4 /* Sun-3 FPA */
-
-#define FPU_68881 (1<<FPUB_68881)
-#define FPU_68882 (1<<FPUB_68882)
-#define FPU_68040 (1<<FPUB_68040)
-#define FPU_68060 (1<<FPUB_68060)
-#define FPU_SUNFPA (1<<FPUB_SUNFPA)
-
-#define MMUB_68851 0
-#define MMUB_68030 1 /* Internal MMU */
-#define MMUB_68040 2 /* Internal MMU */
-#define MMUB_68060 3 /* Internal MMU */
-#define MMUB_APOLLO 4 /* Custom Apollo */
-#define MMUB_SUN3 5 /* Custom Sun-3 */
-
-#define MMU_68851 (1<<MMUB_68851)
-#define MMU_68030 (1<<MMUB_68030)
-#define MMU_68040 (1<<MMUB_68040)
-#define MMU_68060 (1<<MMUB_68060)
-#define MMU_SUN3 (1<<MMUB_SUN3)
-#define MMU_APOLLO (1<<MMUB_APOLLO)
-
-#ifdef __KERNEL__
-
-#ifndef __ASSEMBLY__
-extern unsigned long m68k_cputype;
-extern unsigned long m68k_fputype;
-extern unsigned long m68k_mmutype;
-#ifdef CONFIG_VME
-extern unsigned long vme_brdtype;
-#endif
-
- /*
- * m68k_is040or060 is != 0 for a '040 or higher;
- * used numbers are 4 for 68040 and 6 for 68060.
- */
-
-extern int m68k_is040or060;
-#endif /* !__ASSEMBLY__ */
-
-#if !defined(CONFIG_M68020)
-# define CPU_IS_020 (0)
-# define MMU_IS_851 (0)
-# define MMU_IS_SUN3 (0)
-#elif defined(CONFIG_M68030) || defined(CONFIG_M68040) || defined(CONFIG_M68060)
-# define CPU_IS_020 (m68k_cputype & CPU_68020)
-# define MMU_IS_851 (m68k_mmutype & MMU_68851)
-# define MMU_IS_SUN3 (0) /* Sun3 not supported with other CPU enabled */
-#else
-# define CPU_M68020_ONLY
-# define CPU_IS_020 (1)
-#ifdef MACH_SUN3_ONLY
-# define MMU_IS_SUN3 (1)
-# define MMU_IS_851 (0)
-#else
-# define MMU_IS_SUN3 (0)
-# define MMU_IS_851 (1)
-#endif
-#endif
-
-#if !defined(CONFIG_M68030)
-# define CPU_IS_030 (0)
-# define MMU_IS_030 (0)
-#elif defined(CONFIG_M68020) || defined(CONFIG_M68040) || defined(CONFIG_M68060)
-# define CPU_IS_030 (m68k_cputype & CPU_68030)
-# define MMU_IS_030 (m68k_mmutype & MMU_68030)
-#else
-# define CPU_M68030_ONLY
-# define CPU_IS_030 (1)
-# define MMU_IS_030 (1)
-#endif
-
-#if !defined(CONFIG_M68040)
-# define CPU_IS_040 (0)
-# define MMU_IS_040 (0)
-#elif defined(CONFIG_M68020) || defined(CONFIG_M68030) || defined(CONFIG_M68060)
-# define CPU_IS_040 (m68k_cputype & CPU_68040)
-# define MMU_IS_040 (m68k_mmutype & MMU_68040)
-#else
-# define CPU_M68040_ONLY
-# define CPU_IS_040 (1)
-# define MMU_IS_040 (1)
-#endif
-
-#if !defined(CONFIG_M68060)
-# define CPU_IS_060 (0)
-# define MMU_IS_060 (0)
-#elif defined(CONFIG_M68020) || defined(CONFIG_M68030) || defined(CONFIG_M68040)
-# define CPU_IS_060 (m68k_cputype & CPU_68060)
-# define MMU_IS_060 (m68k_mmutype & MMU_68060)
-#else
-# define CPU_M68060_ONLY
-# define CPU_IS_060 (1)
-# define MMU_IS_060 (1)
-#endif
-
-#if !defined(CONFIG_M68020) && !defined(CONFIG_M68030)
-# define CPU_IS_020_OR_030 (0)
-#else
-# define CPU_M68020_OR_M68030
-# if defined(CONFIG_M68040) || defined(CONFIG_M68060)
-# define CPU_IS_020_OR_030 (!m68k_is040or060)
-# else
-# define CPU_M68020_OR_M68030_ONLY
-# define CPU_IS_020_OR_030 (1)
-# endif
-#endif
-
-#if !defined(CONFIG_M68040) && !defined(CONFIG_M68060)
-# define CPU_IS_040_OR_060 (0)
-#else
-# define CPU_M68040_OR_M68060
-# if defined(CONFIG_M68020) || defined(CONFIG_M68030)
-# define CPU_IS_040_OR_060 (m68k_is040or060)
-# else
-# define CPU_M68040_OR_M68060_ONLY
-# define CPU_IS_040_OR_060 (1)
-# endif
-#endif
-
-#define CPU_TYPE (m68k_cputype)
-
-#ifdef CONFIG_M68KFPU_EMU
-# ifdef CONFIG_M68KFPU_EMU_ONLY
-# define FPU_IS_EMU (1)
-# else
-# define FPU_IS_EMU (!m68k_fputype)
-# endif
-#else
-# define FPU_IS_EMU (0)
-#endif
-
-
- /*
- * Miscellaneous
- */
-
-#define NUM_MEMINFO 4
-
-#ifndef __ASSEMBLY__
-struct mem_info {
- unsigned long addr; /* physical address of memory chunk */
- unsigned long size; /* length of memory chunk (in bytes) */
-};
-
-extern int m68k_num_memory; /* # of memory blocks found (and used) */
-extern int m68k_realnum_memory; /* real # of memory blocks found */
-extern struct mem_info m68k_memory[NUM_MEMINFO];/* memory description */
-#endif
-
-#endif /* __KERNEL__ */
-
-#endif /* _M68K_SETUP_H */
+++ /dev/null
-#ifdef __KERNEL__
-
-#include <asm/setup_mm.h>
-
-/* We have a bigger command line buffer. */
-#undef COMMAND_LINE_SIZE
-
-#endif /* __KERNEL__ */
-
-#define COMMAND_LINE_SIZE 512
+#ifndef _ASM_M68k_SIGCONTEXT_H
+#define _ASM_M68k_SIGCONTEXT_H
+
+struct sigcontext {
+ unsigned long sc_mask; /* old sigmask */
+ unsigned long sc_usp; /* old user stack pointer */
+ unsigned long sc_d0;
+ unsigned long sc_d1;
+ unsigned long sc_a0;
+ unsigned long sc_a1;
#ifdef __uClinux__
-#include "sigcontext_no.h"
-#else
-#include "sigcontext_mm.h"
+ unsigned long sc_a5;
+#endif
+ unsigned short sc_sr;
+ unsigned long sc_pc;
+ unsigned short sc_formatvec;
+#ifndef __uClinux__
+ unsigned long sc_fpregs[2*3]; /* room for two fp registers */
+ unsigned long sc_fpcntl[3];
+ unsigned char sc_fpstate[216];
+#endif
+};
+
#endif
+++ /dev/null
-#ifndef _ASM_M68k_SIGCONTEXT_H
-#define _ASM_M68k_SIGCONTEXT_H
-
-struct sigcontext {
- unsigned long sc_mask; /* old sigmask */
- unsigned long sc_usp; /* old user stack pointer */
- unsigned long sc_d0;
- unsigned long sc_d1;
- unsigned long sc_a0;
- unsigned long sc_a1;
- unsigned short sc_sr;
- unsigned long sc_pc;
- unsigned short sc_formatvec;
- unsigned long sc_fpregs[2*3]; /* room for two fp registers */
- unsigned long sc_fpcntl[3];
- unsigned char sc_fpstate[216];
-};
-
-#endif
+++ /dev/null
-#ifndef _ASM_M68KNOMMU_SIGCONTEXT_H
-#define _ASM_M68KNOMMU_SIGCONTEXT_H
-
-struct sigcontext {
- unsigned long sc_mask; /* old sigmask */
- unsigned long sc_usp; /* old user stack pointer */
- unsigned long sc_d0;
- unsigned long sc_d1;
- unsigned long sc_a0;
- unsigned long sc_a1;
- unsigned long sc_a5;
- unsigned short sc_sr;
- unsigned long sc_pc;
- unsigned short sc_formatvec;
-};
-
-#endif
-#ifdef __uClinux__
-#include "siginfo_no.h"
+#ifndef _M68K_SIGINFO_H
+#define _M68K_SIGINFO_H
+
+#ifndef __uClinux__
+#define HAVE_ARCH_SIGINFO_T
+#define HAVE_ARCH_COPY_SIGINFO
+#endif
+
+#include <asm-generic/siginfo.h>
+
+#ifndef __uClinux__
+
+typedef struct siginfo {
+ int si_signo;
+ int si_errno;
+ int si_code;
+
+ union {
+ int _pad[SI_PAD_SIZE];
+
+ /* kill() */
+ struct {
+ __kernel_pid_t _pid; /* sender's pid */
+ __kernel_uid_t _uid; /* backwards compatibility */
+ __kernel_uid32_t _uid32; /* sender's uid */
+ } _kill;
+
+ /* POSIX.1b timers */
+ struct {
+ timer_t _tid; /* timer id */
+ int _overrun; /* overrun count */
+ char _pad[sizeof( __ARCH_SI_UID_T) - sizeof(int)];
+ sigval_t _sigval; /* same as below */
+ int _sys_private; /* not to be passed to user */
+ } _timer;
+
+ /* POSIX.1b signals */
+ struct {
+ __kernel_pid_t _pid; /* sender's pid */
+ __kernel_uid_t _uid; /* backwards compatibility */
+ sigval_t _sigval;
+ __kernel_uid32_t _uid32; /* sender's uid */
+ } _rt;
+
+ /* SIGCHLD */
+ struct {
+ __kernel_pid_t _pid; /* which child */
+ __kernel_uid_t _uid; /* backwards compatibility */
+ int _status; /* exit code */
+ clock_t _utime;
+ clock_t _stime;
+ __kernel_uid32_t _uid32; /* sender's uid */
+ } _sigchld;
+
+ /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
+ struct {
+ void *_addr; /* faulting insn/memory ref. */
+ } _sigfault;
+
+ /* SIGPOLL */
+ struct {
+ int _band; /* POLL_IN, POLL_OUT, POLL_MSG */
+ int _fd;
+ } _sigpoll;
+ } _sifields;
+} siginfo_t;
+
+#define UID16_SIGINFO_COMPAT_NEEDED
+
+/*
+ * How these fields are to be accessed.
+ */
+#undef si_uid
+#ifdef __KERNEL__
+#define si_uid _sifields._kill._uid32
+#define si_uid16 _sifields._kill._uid
#else
-#include "siginfo_mm.h"
+#define si_uid _sifields._kill._uid
+#endif
+
+#ifdef __KERNEL__
+
+#include <linux/string.h>
+
+static inline void copy_siginfo(struct siginfo *to, struct siginfo *from)
+{
+ if (from->si_code < 0)
+ memcpy(to, from, sizeof(*to));
+ else
+ /* _sigchld is currently the largest know union member */
+ memcpy(to, from, 3*sizeof(int) + sizeof(from->_sifields._sigchld));
+}
+
+#endif /* __KERNEL__ */
+#endif /* !__uClinux__ */
+
#endif
+++ /dev/null
-#ifndef _M68K_SIGINFO_H
-#define _M68K_SIGINFO_H
-
-#define HAVE_ARCH_SIGINFO_T
-#define HAVE_ARCH_COPY_SIGINFO
-
-#include <asm-generic/siginfo.h>
-
-typedef struct siginfo {
- int si_signo;
- int si_errno;
- int si_code;
-
- union {
- int _pad[SI_PAD_SIZE];
-
- /* kill() */
- struct {
- __kernel_pid_t _pid; /* sender's pid */
- __kernel_uid_t _uid; /* backwards compatibility */
- __kernel_uid32_t _uid32; /* sender's uid */
- } _kill;
-
- /* POSIX.1b timers */
- struct {
- timer_t _tid; /* timer id */
- int _overrun; /* overrun count */
- char _pad[sizeof( __ARCH_SI_UID_T) - sizeof(int)];
- sigval_t _sigval; /* same as below */
- int _sys_private; /* not to be passed to user */
- } _timer;
-
- /* POSIX.1b signals */
- struct {
- __kernel_pid_t _pid; /* sender's pid */
- __kernel_uid_t _uid; /* backwards compatibility */
- sigval_t _sigval;
- __kernel_uid32_t _uid32; /* sender's uid */
- } _rt;
-
- /* SIGCHLD */
- struct {
- __kernel_pid_t _pid; /* which child */
- __kernel_uid_t _uid; /* backwards compatibility */
- int _status; /* exit code */
- clock_t _utime;
- clock_t _stime;
- __kernel_uid32_t _uid32; /* sender's uid */
- } _sigchld;
-
- /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
- struct {
- void *_addr; /* faulting insn/memory ref. */
- } _sigfault;
-
- /* SIGPOLL */
- struct {
- int _band; /* POLL_IN, POLL_OUT, POLL_MSG */
- int _fd;
- } _sigpoll;
- } _sifields;
-} siginfo_t;
-
-#define UID16_SIGINFO_COMPAT_NEEDED
-
-/*
- * How these fields are to be accessed.
- */
-#undef si_uid
-#ifdef __KERNEL__
-#define si_uid _sifields._kill._uid32
-#define si_uid16 _sifields._kill._uid
-#else
-#define si_uid _sifields._kill._uid
-#endif
-
-#ifdef __KERNEL__
-
-#include <linux/string.h>
-
-static inline void copy_siginfo(struct siginfo *to, struct siginfo *from)
-{
- if (from->si_code < 0)
- memcpy(to, from, sizeof(*to));
- else
- /* _sigchld is currently the largest know union member */
- memcpy(to, from, 3*sizeof(int) + sizeof(from->_sifields._sigchld));
-}
-
-#endif /* __KERNEL__ */
-
-#endif
+++ /dev/null
-#ifndef _M68KNOMMU_SIGINFO_H
-#define _M68KNOMMU_SIGINFO_H
-
-#include <asm-generic/siginfo.h>
-
-#endif
-#ifdef __uClinux__
-#include "signal_no.h"
+#ifndef _M68K_SIGNAL_H
+#define _M68K_SIGNAL_H
+
+#include <linux/types.h>
+
+/* Avoid too many header ordering problems. */
+struct siginfo;
+
+#ifdef __KERNEL__
+/* Most things should be clean enough to redefine this at will, if care
+ is taken to make libc match. */
+
+#define _NSIG 64
+#define _NSIG_BPW 32
+#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
+
+typedef unsigned long old_sigset_t; /* at least 32 bits */
+
+typedef struct {
+ unsigned long sig[_NSIG_WORDS];
+} sigset_t;
+
#else
-#include "signal_mm.h"
-#endif
+/* Here we must cater to libcs that poke about in kernel headers. */
+
+#define NSIG 32
+typedef unsigned long sigset_t;
+
+#endif /* __KERNEL__ */
+
+#define SIGHUP 1
+#define SIGINT 2
+#define SIGQUIT 3
+#define SIGILL 4
+#define SIGTRAP 5
+#define SIGABRT 6
+#define SIGIOT 6
+#define SIGBUS 7
+#define SIGFPE 8
+#define SIGKILL 9
+#define SIGUSR1 10
+#define SIGSEGV 11
+#define SIGUSR2 12
+#define SIGPIPE 13
+#define SIGALRM 14
+#define SIGTERM 15
+#define SIGSTKFLT 16
+#define SIGCHLD 17
+#define SIGCONT 18
+#define SIGSTOP 19
+#define SIGTSTP 20
+#define SIGTTIN 21
+#define SIGTTOU 22
+#define SIGURG 23
+#define SIGXCPU 24
+#define SIGXFSZ 25
+#define SIGVTALRM 26
+#define SIGPROF 27
+#define SIGWINCH 28
+#define SIGIO 29
+#define SIGPOLL SIGIO
+/*
+#define SIGLOST 29
+*/
+#define SIGPWR 30
+#define SIGSYS 31
+#define SIGUNUSED 31
+
+/* These should not be considered constants from userland. */
+#define SIGRTMIN 32
+#define SIGRTMAX _NSIG
+
+/*
+ * SA_FLAGS values:
+ *
+ * SA_ONSTACK indicates that a registered stack_t will be used.
+ * SA_RESTART flag to get restarting signals (which were the default long ago)
+ * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
+ * SA_RESETHAND clears the handler when the signal is delivered.
+ * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
+ * SA_NODEFER prevents the current signal from being masked in the handler.
+ *
+ * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
+ * Unix names RESETHAND and NODEFER respectively.
+ */
+#define SA_NOCLDSTOP 0x00000001
+#define SA_NOCLDWAIT 0x00000002
+#define SA_SIGINFO 0x00000004
+#define SA_ONSTACK 0x08000000
+#define SA_RESTART 0x10000000
+#define SA_NODEFER 0x40000000
+#define SA_RESETHAND 0x80000000
+
+#define SA_NOMASK SA_NODEFER
+#define SA_ONESHOT SA_RESETHAND
+
+/*
+ * sigaltstack controls
+ */
+#define SS_ONSTACK 1
+#define SS_DISABLE 2
+
+#define MINSIGSTKSZ 2048
+#define SIGSTKSZ 8192
+
+#include <asm-generic/signal.h>
+
+#ifdef __KERNEL__
+struct old_sigaction {
+ __sighandler_t sa_handler;
+ old_sigset_t sa_mask;
+ unsigned long sa_flags;
+ __sigrestore_t sa_restorer;
+};
+
+struct sigaction {
+ __sighandler_t sa_handler;
+ unsigned long sa_flags;
+ __sigrestore_t sa_restorer;
+ sigset_t sa_mask; /* mask last for extensibility */
+};
+
+struct k_sigaction {
+ struct sigaction sa;
+};
+#else
+/* Here we must cater to libcs that poke about in kernel headers. */
+
+struct sigaction {
+ union {
+ __sighandler_t _sa_handler;
+ void (*_sa_sigaction)(int, struct siginfo *, void *);
+ } _u;
+ sigset_t sa_mask;
+ unsigned long sa_flags;
+ void (*sa_restorer)(void);
+};
+
+#define sa_handler _u._sa_handler
+#define sa_sigaction _u._sa_sigaction
+
+#endif /* __KERNEL__ */
+
+typedef struct sigaltstack {
+ void __user *ss_sp;
+ int ss_flags;
+ size_t ss_size;
+} stack_t;
+
+#ifdef __KERNEL__
+#include <asm/sigcontext.h>
+
+#ifndef __uClinux__
+#define __HAVE_ARCH_SIG_BITOPS
+
+static inline void sigaddset(sigset_t *set, int _sig)
+{
+ asm ("bfset %0{%1,#1}"
+ : "+od" (*set)
+ : "id" ((_sig - 1) ^ 31)
+ : "cc");
+}
+
+static inline void sigdelset(sigset_t *set, int _sig)
+{
+ asm ("bfclr %0{%1,#1}"
+ : "+od" (*set)
+ : "id" ((_sig - 1) ^ 31)
+ : "cc");
+}
+
+static inline int __const_sigismember(sigset_t *set, int _sig)
+{
+ unsigned long sig = _sig - 1;
+ return 1 & (set->sig[sig / _NSIG_BPW] >> (sig % _NSIG_BPW));
+}
+
+static inline int __gen_sigismember(sigset_t *set, int _sig)
+{
+ int ret;
+ asm ("bfextu %1{%2,#1},%0"
+ : "=d" (ret)
+ : "od" (*set), "id" ((_sig-1) ^ 31)
+ : "cc");
+ return ret;
+}
+
+#define sigismember(set,sig) \
+ (__builtin_constant_p(sig) ? \
+ __const_sigismember(set,sig) : \
+ __gen_sigismember(set,sig))
+
+static inline int sigfindinword(unsigned long word)
+{
+ asm ("bfffo %1{#0,#0},%0"
+ : "=d" (word)
+ : "d" (word & -word)
+ : "cc");
+ return word ^ 31;
+}
+
+struct pt_regs;
+extern void ptrace_signal_deliver(struct pt_regs *regs, void *cookie);
+
+#else
+
+#undef __HAVE_ARCH_SIG_BITOPS
+#define ptrace_signal_deliver(regs, cookie) do { } while (0)
+
+#endif /* __uClinux__ */
+#endif /* __KERNEL__ */
+
+#endif /* _M68K_SIGNAL_H */
+++ /dev/null
-#ifndef _M68K_SIGNAL_H
-#define _M68K_SIGNAL_H
-
-#include <linux/types.h>
-
-/* Avoid too many header ordering problems. */
-struct siginfo;
-
-#ifdef __KERNEL__
-/* Most things should be clean enough to redefine this at will, if care
- is taken to make libc match. */
-
-#define _NSIG 64
-#define _NSIG_BPW 32
-#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
-
-typedef unsigned long old_sigset_t; /* at least 32 bits */
-
-typedef struct {
- unsigned long sig[_NSIG_WORDS];
-} sigset_t;
-
-#else
-/* Here we must cater to libcs that poke about in kernel headers. */
-
-#define NSIG 32
-typedef unsigned long sigset_t;
-
-#endif /* __KERNEL__ */
-
-#define SIGHUP 1
-#define SIGINT 2
-#define SIGQUIT 3
-#define SIGILL 4
-#define SIGTRAP 5
-#define SIGABRT 6
-#define SIGIOT 6
-#define SIGBUS 7
-#define SIGFPE 8
-#define SIGKILL 9
-#define SIGUSR1 10
-#define SIGSEGV 11
-#define SIGUSR2 12
-#define SIGPIPE 13
-#define SIGALRM 14
-#define SIGTERM 15
-#define SIGSTKFLT 16
-#define SIGCHLD 17
-#define SIGCONT 18
-#define SIGSTOP 19
-#define SIGTSTP 20
-#define SIGTTIN 21
-#define SIGTTOU 22
-#define SIGURG 23
-#define SIGXCPU 24
-#define SIGXFSZ 25
-#define SIGVTALRM 26
-#define SIGPROF 27
-#define SIGWINCH 28
-#define SIGIO 29
-#define SIGPOLL SIGIO
-/*
-#define SIGLOST 29
-*/
-#define SIGPWR 30
-#define SIGSYS 31
-#define SIGUNUSED 31
-
-/* These should not be considered constants from userland. */
-#define SIGRTMIN 32
-#define SIGRTMAX _NSIG
-
-/*
- * SA_FLAGS values:
- *
- * SA_ONSTACK indicates that a registered stack_t will be used.
- * SA_RESTART flag to get restarting signals (which were the default long ago)
- * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
- * SA_RESETHAND clears the handler when the signal is delivered.
- * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
- * SA_NODEFER prevents the current signal from being masked in the handler.
- *
- * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
- * Unix names RESETHAND and NODEFER respectively.
- */
-#define SA_NOCLDSTOP 0x00000001
-#define SA_NOCLDWAIT 0x00000002
-#define SA_SIGINFO 0x00000004
-#define SA_ONSTACK 0x08000000
-#define SA_RESTART 0x10000000
-#define SA_NODEFER 0x40000000
-#define SA_RESETHAND 0x80000000
-
-#define SA_NOMASK SA_NODEFER
-#define SA_ONESHOT SA_RESETHAND
-
-/*
- * sigaltstack controls
- */
-#define SS_ONSTACK 1
-#define SS_DISABLE 2
-
-#define MINSIGSTKSZ 2048
-#define SIGSTKSZ 8192
-
-#include <asm-generic/signal.h>
-
-#ifdef __KERNEL__
-struct old_sigaction {
- __sighandler_t sa_handler;
- old_sigset_t sa_mask;
- unsigned long sa_flags;
- __sigrestore_t sa_restorer;
-};
-
-struct sigaction {
- __sighandler_t sa_handler;
- unsigned long sa_flags;
- __sigrestore_t sa_restorer;
- sigset_t sa_mask; /* mask last for extensibility */
-};
-
-struct k_sigaction {
- struct sigaction sa;
-};
-#else
-/* Here we must cater to libcs that poke about in kernel headers. */
-
-struct sigaction {
- union {
- __sighandler_t _sa_handler;
- void (*_sa_sigaction)(int, struct siginfo *, void *);
- } _u;
- sigset_t sa_mask;
- unsigned long sa_flags;
- void (*sa_restorer)(void);
-};
-
-#define sa_handler _u._sa_handler
-#define sa_sigaction _u._sa_sigaction
-
-#endif /* __KERNEL__ */
-
-typedef struct sigaltstack {
- void __user *ss_sp;
- int ss_flags;
- size_t ss_size;
-} stack_t;
-
-#ifdef __KERNEL__
-#include <asm/sigcontext.h>
-
-#define __HAVE_ARCH_SIG_BITOPS
-
-static inline void sigaddset(sigset_t *set, int _sig)
-{
- asm ("bfset %0{%1,#1}"
- : "+od" (*set)
- : "id" ((_sig - 1) ^ 31)
- : "cc");
-}
-
-static inline void sigdelset(sigset_t *set, int _sig)
-{
- asm ("bfclr %0{%1,#1}"
- : "+od" (*set)
- : "id" ((_sig - 1) ^ 31)
- : "cc");
-}
-
-static inline int __const_sigismember(sigset_t *set, int _sig)
-{
- unsigned long sig = _sig - 1;
- return 1 & (set->sig[sig / _NSIG_BPW] >> (sig % _NSIG_BPW));
-}
-
-static inline int __gen_sigismember(sigset_t *set, int _sig)
-{
- int ret;
- asm ("bfextu %1{%2,#1},%0"
- : "=d" (ret)
- : "od" (*set), "id" ((_sig-1) ^ 31)
- : "cc");
- return ret;
-}
-
-#define sigismember(set,sig) \
- (__builtin_constant_p(sig) ? \
- __const_sigismember(set,sig) : \
- __gen_sigismember(set,sig))
-
-static inline int sigfindinword(unsigned long word)
-{
- asm ("bfffo %1{#0,#0},%0"
- : "=d" (word)
- : "d" (word & -word)
- : "cc");
- return word ^ 31;
-}
-
-struct pt_regs;
-extern void ptrace_signal_deliver(struct pt_regs *regs, void *cookie);
-
-#endif /* __KERNEL__ */
-
-#endif /* _M68K_SIGNAL_H */
+++ /dev/null
-#ifndef _M68KNOMMU_SIGNAL_H
-#define _M68KNOMMU_SIGNAL_H
-
-#include <linux/types.h>
-
-/* Avoid too many header ordering problems. */
-struct siginfo;
-
-#ifdef __KERNEL__
-/* Most things should be clean enough to redefine this at will, if care
- is taken to make libc match. */
-
-#define _NSIG 64
-#define _NSIG_BPW 32
-#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
-
-typedef unsigned long old_sigset_t; /* at least 32 bits */
-
-typedef struct {
- unsigned long sig[_NSIG_WORDS];
-} sigset_t;
-
-#else
-/* Here we must cater to libcs that poke about in kernel headers. */
-
-#define NSIG 32
-typedef unsigned long sigset_t;
-
-#endif /* __KERNEL__ */
-
-#define SIGHUP 1
-#define SIGINT 2
-#define SIGQUIT 3
-#define SIGILL 4
-#define SIGTRAP 5
-#define SIGABRT 6
-#define SIGIOT 6
-#define SIGBUS 7
-#define SIGFPE 8
-#define SIGKILL 9
-#define SIGUSR1 10
-#define SIGSEGV 11
-#define SIGUSR2 12
-#define SIGPIPE 13
-#define SIGALRM 14
-#define SIGTERM 15
-#define SIGSTKFLT 16
-#define SIGCHLD 17
-#define SIGCONT 18
-#define SIGSTOP 19
-#define SIGTSTP 20
-#define SIGTTIN 21
-#define SIGTTOU 22
-#define SIGURG 23
-#define SIGXCPU 24
-#define SIGXFSZ 25
-#define SIGVTALRM 26
-#define SIGPROF 27
-#define SIGWINCH 28
-#define SIGIO 29
-#define SIGPOLL SIGIO
-/*
-#define SIGLOST 29
-*/
-#define SIGPWR 30
-#define SIGSYS 31
-#define SIGUNUSED 31
-
-/* These should not be considered constants from userland. */
-#define SIGRTMIN 32
-#define SIGRTMAX _NSIG
-
-/*
- * SA_FLAGS values:
- *
- * SA_ONSTACK indicates that a registered stack_t will be used.
- * SA_RESTART flag to get restarting signals (which were the default long ago)
- * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
- * SA_RESETHAND clears the handler when the signal is delivered.
- * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
- * SA_NODEFER prevents the current signal from being masked in the handler.
- *
- * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
- * Unix names RESETHAND and NODEFER respectively.
- */
-#define SA_NOCLDSTOP 0x00000001
-#define SA_NOCLDWAIT 0x00000002
-#define SA_SIGINFO 0x00000004
-#define SA_ONSTACK 0x08000000
-#define SA_RESTART 0x10000000
-#define SA_NODEFER 0x40000000
-#define SA_RESETHAND 0x80000000
-
-#define SA_NOMASK SA_NODEFER
-#define SA_ONESHOT SA_RESETHAND
-
-/*
- * sigaltstack controls
- */
-#define SS_ONSTACK 1
-#define SS_DISABLE 2
-
-#define MINSIGSTKSZ 2048
-#define SIGSTKSZ 8192
-
-#include <asm-generic/signal.h>
-
-#ifdef __KERNEL__
-struct old_sigaction {
- __sighandler_t sa_handler;
- old_sigset_t sa_mask;
- unsigned long sa_flags;
- void (*sa_restorer)(void);
-};
-
-struct sigaction {
- __sighandler_t sa_handler;
- unsigned long sa_flags;
- void (*sa_restorer)(void);
- sigset_t sa_mask; /* mask last for extensibility */
-};
-
-struct k_sigaction {
- struct sigaction sa;
-};
-#else
-/* Here we must cater to libcs that poke about in kernel headers. */
-
-struct sigaction {
- union {
- __sighandler_t _sa_handler;
- void (*_sa_sigaction)(int, struct siginfo *, void *);
- } _u;
- sigset_t sa_mask;
- unsigned long sa_flags;
- void (*sa_restorer)(void);
-};
-
-#define sa_handler _u._sa_handler
-#define sa_sigaction _u._sa_sigaction
-
-#endif /* __KERNEL__ */
-
-typedef struct sigaltstack {
- void *ss_sp;
- int ss_flags;
- size_t ss_size;
-} stack_t;
-
-#ifdef __KERNEL__
-
-#include <asm/sigcontext.h>
-#undef __HAVE_ARCH_SIG_BITOPS
-
-#define ptrace_signal_deliver(regs, cookie) do { } while (0)
-
-#endif /* __KERNEL__ */
-
-#endif /* _M68KNOMMU_SIGNAL_H */
-#ifdef __uClinux__
-#include "swab_no.h"
-#else
-#include "swab_mm.h"
+#ifndef _M68K_SWAB_H
+#define _M68K_SWAB_H
+
+#include <asm/types.h>
+#include <linux/compiler.h>
+
+#define __SWAB_64_THRU_32__
+
+#if defined (__mcfisaaplus__) || defined (__mcfisac__)
+static inline __attribute_const__ __u32 __arch_swab32(__u32 val)
+{
+ __asm__("byterev %0" : "=d" (val) : "0" (val));
+ return val;
+}
+
+#define __arch_swab32 __arch_swab32
+#elif !defined(__uClinux__)
+
+static inline __attribute_const__ __u32 __arch_swab32(__u32 val)
+{
+ __asm__("rolw #8,%0; swap %0; rolw #8,%0" : "=d" (val) : "0" (val));
+ return val;
+}
+#define __arch_swab32 __arch_swab32
#endif
+
+#endif /* _M68K_SWAB_H */
+++ /dev/null
-#ifndef _M68K_SWAB_H
-#define _M68K_SWAB_H
-
-#include <asm/types.h>
-#include <linux/compiler.h>
-
-#define __SWAB_64_THRU_32__
-
-static inline __attribute_const__ __u32 __arch_swab32(__u32 val)
-{
- __asm__("rolw #8,%0; swap %0; rolw #8,%0" : "=d" (val) : "0" (val));
- return val;
-}
-#define __arch_swab32 __arch_swab32
-
-#endif /* _M68K_SWAB_H */
+++ /dev/null
-#ifndef _M68KNOMMU_SWAB_H
-#define _M68KNOMMU_SWAB_H
-
-#include <linux/types.h>
-
-#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__)
-# define __SWAB_64_THRU_32__
-#endif
-
-#if defined (__mcfisaaplus__) || defined (__mcfisac__)
-static inline __attribute_const__ __u32 __arch_swab32(__u32 val)
-{
- asm(
- "byterev %0"
- : "=d" (val)
- : "0" (val)
- );
- return val;
-}
-
-#define __arch_swab32 __arch_swab32
-#endif
-
-#endif /* _M68KNOMMU_SWAB_H */
-#ifdef __uClinux__
-#include "unistd_no.h"
-#else
-#include "unistd_mm.h"
-#endif
+#ifndef _ASM_M68K_UNISTD_H_
+#define _ASM_M68K_UNISTD_H_
+
+/*
+ * This file contains the system call numbers.
+ */
+
+#define __NR_restart_syscall 0
+#define __NR_exit 1
+#define __NR_fork 2
+#define __NR_read 3
+#define __NR_write 4
+#define __NR_open 5
+#define __NR_close 6
+#define __NR_waitpid 7
+#define __NR_creat 8
+#define __NR_link 9
+#define __NR_unlink 10
+#define __NR_execve 11
+#define __NR_chdir 12
+#define __NR_time 13
+#define __NR_mknod 14
+#define __NR_chmod 15
+#define __NR_chown 16
+#define __NR_break 17
+#define __NR_oldstat 18
+#define __NR_lseek 19
+#define __NR_getpid 20
+#define __NR_mount 21
+#define __NR_umount 22
+#define __NR_setuid 23
+#define __NR_getuid 24
+#define __NR_stime 25
+#define __NR_ptrace 26
+#define __NR_alarm 27
+#define __NR_oldfstat 28
+#define __NR_pause 29
+#define __NR_utime 30
+#define __NR_stty 31
+#define __NR_gtty 32
+#define __NR_access 33
+#define __NR_nice 34
+#define __NR_ftime 35
+#define __NR_sync 36
+#define __NR_kill 37
+#define __NR_rename 38
+#define __NR_mkdir 39
+#define __NR_rmdir 40
+#define __NR_dup 41
+#define __NR_pipe 42
+#define __NR_times 43
+#define __NR_prof 44
+#define __NR_brk 45
+#define __NR_setgid 46
+#define __NR_getgid 47
+#define __NR_signal 48
+#define __NR_geteuid 49
+#define __NR_getegid 50
+#define __NR_acct 51
+#define __NR_umount2 52
+#define __NR_lock 53
+#define __NR_ioctl 54
+#define __NR_fcntl 55
+#define __NR_mpx 56
+#define __NR_setpgid 57
+#define __NR_ulimit 58
+#define __NR_oldolduname 59
+#define __NR_umask 60
+#define __NR_chroot 61
+#define __NR_ustat 62
+#define __NR_dup2 63
+#define __NR_getppid 64
+#define __NR_getpgrp 65
+#define __NR_setsid 66
+#define __NR_sigaction 67
+#define __NR_sgetmask 68
+#define __NR_ssetmask 69
+#define __NR_setreuid 70
+#define __NR_setregid 71
+#define __NR_sigsuspend 72
+#define __NR_sigpending 73
+#define __NR_sethostname 74
+#define __NR_setrlimit 75
+#define __NR_getrlimit 76
+#define __NR_getrusage 77
+#define __NR_gettimeofday 78
+#define __NR_settimeofday 79
+#define __NR_getgroups 80
+#define __NR_setgroups 81
+#define __NR_select 82
+#define __NR_symlink 83
+#define __NR_oldlstat 84
+#define __NR_readlink 85
+#define __NR_uselib 86
+#define __NR_swapon 87
+#define __NR_reboot 88
+#define __NR_readdir 89
+#define __NR_mmap 90
+#define __NR_munmap 91
+#define __NR_truncate 92
+#define __NR_ftruncate 93
+#define __NR_fchmod 94
+#define __NR_fchown 95
+#define __NR_getpriority 96
+#define __NR_setpriority 97
+#define __NR_profil 98
+#define __NR_statfs 99
+#define __NR_fstatfs 100
+#define __NR_ioperm 101
+#define __NR_socketcall 102
+#define __NR_syslog 103
+#define __NR_setitimer 104
+#define __NR_getitimer 105
+#define __NR_stat 106
+#define __NR_lstat 107
+#define __NR_fstat 108
+#define __NR_olduname 109
+#define __NR_iopl /* 110 */ not supported
+#define __NR_vhangup 111
+#define __NR_idle /* 112 */ Obsolete
+#define __NR_vm86 /* 113 */ not supported
+#define __NR_wait4 114
+#define __NR_swapoff 115
+#define __NR_sysinfo 116
+#define __NR_ipc 117
+#define __NR_fsync 118
+#define __NR_sigreturn 119
+#define __NR_clone 120
+#define __NR_setdomainname 121
+#define __NR_uname 122
+#define __NR_cacheflush 123
+#define __NR_adjtimex 124
+#define __NR_mprotect 125
+#define __NR_sigprocmask 126
+#define __NR_create_module 127
+#define __NR_init_module 128
+#define __NR_delete_module 129
+#define __NR_get_kernel_syms 130
+#define __NR_quotactl 131
+#define __NR_getpgid 132
+#define __NR_fchdir 133
+#define __NR_bdflush 134
+#define __NR_sysfs 135
+#define __NR_personality 136
+#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
+#define __NR_setfsuid 138
+#define __NR_setfsgid 139
+#define __NR__llseek 140
+#define __NR_getdents 141
+#define __NR__newselect 142
+#define __NR_flock 143
+#define __NR_msync 144
+#define __NR_readv 145
+#define __NR_writev 146
+#define __NR_getsid 147
+#define __NR_fdatasync 148
+#define __NR__sysctl 149
+#define __NR_mlock 150
+#define __NR_munlock 151
+#define __NR_mlockall 152
+#define __NR_munlockall 153
+#define __NR_sched_setparam 154
+#define __NR_sched_getparam 155
+#define __NR_sched_setscheduler 156
+#define __NR_sched_getscheduler 157
+#define __NR_sched_yield 158
+#define __NR_sched_get_priority_max 159
+#define __NR_sched_get_priority_min 160
+#define __NR_sched_rr_get_interval 161
+#define __NR_nanosleep 162
+#define __NR_mremap 163
+#define __NR_setresuid 164
+#define __NR_getresuid 165
+#define __NR_getpagesize 166
+#define __NR_query_module 167
+#define __NR_poll 168
+#define __NR_nfsservctl 169
+#define __NR_setresgid 170
+#define __NR_getresgid 171
+#define __NR_prctl 172
+#define __NR_rt_sigreturn 173
+#define __NR_rt_sigaction 174
+#define __NR_rt_sigprocmask 175
+#define __NR_rt_sigpending 176
+#define __NR_rt_sigtimedwait 177
+#define __NR_rt_sigqueueinfo 178
+#define __NR_rt_sigsuspend 179
+#define __NR_pread64 180
+#define __NR_pwrite64 181
+#define __NR_lchown 182
+#define __NR_getcwd 183
+#define __NR_capget 184
+#define __NR_capset 185
+#define __NR_sigaltstack 186
+#define __NR_sendfile 187
+#define __NR_getpmsg 188 /* some people actually want streams */
+#define __NR_putpmsg 189 /* some people actually want streams */
+#define __NR_vfork 190
+#define __NR_ugetrlimit 191
+#define __NR_mmap2 192
+#define __NR_truncate64 193
+#define __NR_ftruncate64 194
+#define __NR_stat64 195
+#define __NR_lstat64 196
+#define __NR_fstat64 197
+#define __NR_chown32 198
+#define __NR_getuid32 199
+#define __NR_getgid32 200
+#define __NR_geteuid32 201
+#define __NR_getegid32 202
+#define __NR_setreuid32 203
+#define __NR_setregid32 204
+#define __NR_getgroups32 205
+#define __NR_setgroups32 206
+#define __NR_fchown32 207
+#define __NR_setresuid32 208
+#define __NR_getresuid32 209
+#define __NR_setresgid32 210
+#define __NR_getresgid32 211
+#define __NR_lchown32 212
+#define __NR_setuid32 213
+#define __NR_setgid32 214
+#define __NR_setfsuid32 215
+#define __NR_setfsgid32 216
+#define __NR_pivot_root 217
+#define __NR_getdents64 220
+#define __NR_gettid 221
+#define __NR_tkill 222
+#define __NR_setxattr 223
+#define __NR_lsetxattr 224
+#define __NR_fsetxattr 225
+#define __NR_getxattr 226
+#define __NR_lgetxattr 227
+#define __NR_fgetxattr 228
+#define __NR_listxattr 229
+#define __NR_llistxattr 230
+#define __NR_flistxattr 231
+#define __NR_removexattr 232
+#define __NR_lremovexattr 233
+#define __NR_fremovexattr 234
+#define __NR_futex 235
+#define __NR_sendfile64 236
+#define __NR_mincore 237
+#define __NR_madvise 238
+#define __NR_fcntl64 239
+#define __NR_readahead 240
+#define __NR_io_setup 241
+#define __NR_io_destroy 242
+#define __NR_io_getevents 243
+#define __NR_io_submit 244
+#define __NR_io_cancel 245
+#define __NR_fadvise64 246
+#define __NR_exit_group 247
+#define __NR_lookup_dcookie 248
+#define __NR_epoll_create 249
+#define __NR_epoll_ctl 250
+#define __NR_epoll_wait 251
+#define __NR_remap_file_pages 252
+#define __NR_set_tid_address 253
+#define __NR_timer_create 254
+#define __NR_timer_settime 255
+#define __NR_timer_gettime 256
+#define __NR_timer_getoverrun 257
+#define __NR_timer_delete 258
+#define __NR_clock_settime 259
+#define __NR_clock_gettime 260
+#define __NR_clock_getres 261
+#define __NR_clock_nanosleep 262
+#define __NR_statfs64 263
+#define __NR_fstatfs64 264
+#define __NR_tgkill 265
+#define __NR_utimes 266
+#define __NR_fadvise64_64 267
+#define __NR_mbind 268
+#define __NR_get_mempolicy 269
+#define __NR_set_mempolicy 270
+#define __NR_mq_open 271
+#define __NR_mq_unlink 272
+#define __NR_mq_timedsend 273
+#define __NR_mq_timedreceive 274
+#define __NR_mq_notify 275
+#define __NR_mq_getsetattr 276
+#define __NR_waitid 277
+#define __NR_vserver 278
+#define __NR_add_key 279
+#define __NR_request_key 280
+#define __NR_keyctl 281
+#define __NR_ioprio_set 282
+#define __NR_ioprio_get 283
+#define __NR_inotify_init 284
+#define __NR_inotify_add_watch 285
+#define __NR_inotify_rm_watch 286
+#define __NR_migrate_pages 287
+#define __NR_openat 288
+#define __NR_mkdirat 289
+#define __NR_mknodat 290
+#define __NR_fchownat 291
+#define __NR_futimesat 292
+#define __NR_fstatat64 293
+#define __NR_unlinkat 294
+#define __NR_renameat 295
+#define __NR_linkat 296
+#define __NR_symlinkat 297
+#define __NR_readlinkat 298
+#define __NR_fchmodat 299
+#define __NR_faccessat 300
+#define __NR_pselect6 301
+#define __NR_ppoll 302
+#define __NR_unshare 303
+#define __NR_set_robust_list 304
+#define __NR_get_robust_list 305
+#define __NR_splice 306
+#define __NR_sync_file_range 307
+#define __NR_tee 308
+#define __NR_vmsplice 309
+#define __NR_move_pages 310
+#define __NR_sched_setaffinity 311
+#define __NR_sched_getaffinity 312
+#define __NR_kexec_load 313
+#define __NR_getcpu 314
+#define __NR_epoll_pwait 315
+#define __NR_utimensat 316
+#define __NR_signalfd 317
+#define __NR_timerfd_create 318
+#define __NR_eventfd 319
+#define __NR_fallocate 320
+#define __NR_timerfd_settime 321
+#define __NR_timerfd_gettime 322
+#define __NR_signalfd4 323
+#define __NR_eventfd2 324
+#define __NR_epoll_create1 325
+#define __NR_dup3 326
+#define __NR_pipe2 327
+#define __NR_inotify_init1 328
+
+#ifdef __KERNEL__
+
+#define NR_syscalls 329
+
+#define __ARCH_WANT_IPC_PARSE_VERSION
+#define __ARCH_WANT_OLD_READDIR
+#define __ARCH_WANT_OLD_STAT
+#define __ARCH_WANT_STAT64
+#define __ARCH_WANT_SYS_ALARM
+#define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_PAUSE
+#define __ARCH_WANT_SYS_SGETMASK
+#define __ARCH_WANT_SYS_SIGNAL
+#define __ARCH_WANT_SYS_TIME
+#define __ARCH_WANT_SYS_UTIME
+#define __ARCH_WANT_SYS_WAITPID
+#define __ARCH_WANT_SYS_SOCKETCALL
+#define __ARCH_WANT_SYS_FADVISE64
+#define __ARCH_WANT_SYS_GETPGRP
+#define __ARCH_WANT_SYS_LLSEEK
+#define __ARCH_WANT_SYS_NICE
+#define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLDUMOUNT
+#define __ARCH_WANT_SYS_SIGPENDING
+#define __ARCH_WANT_SYS_SIGPROCMASK
+#define __ARCH_WANT_SYS_RT_SIGACTION
+
+/*
+ * "Conditional" syscalls
+ *
+ * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
+ * but it doesn't work on all toolchains, so we just do it by hand
+ */
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
+
+#endif /* __KERNEL__ */
+#endif /* _ASM_M68K_UNISTD_H_ */
+++ /dev/null
-#ifndef _ASM_M68K_UNISTD_H_
-#define _ASM_M68K_UNISTD_H_
-
-/*
- * This file contains the system call numbers.
- */
-
-#define __NR_restart_syscall 0
-#define __NR_exit 1
-#define __NR_fork 2
-#define __NR_read 3
-#define __NR_write 4
-#define __NR_open 5
-#define __NR_close 6
-#define __NR_waitpid 7
-#define __NR_creat 8
-#define __NR_link 9
-#define __NR_unlink 10
-#define __NR_execve 11
-#define __NR_chdir 12
-#define __NR_time 13
-#define __NR_mknod 14
-#define __NR_chmod 15
-#define __NR_chown 16
-#define __NR_break 17
-#define __NR_oldstat 18
-#define __NR_lseek 19
-#define __NR_getpid 20
-#define __NR_mount 21
-#define __NR_umount 22
-#define __NR_setuid 23
-#define __NR_getuid 24
-#define __NR_stime 25
-#define __NR_ptrace 26
-#define __NR_alarm 27
-#define __NR_oldfstat 28
-#define __NR_pause 29
-#define __NR_utime 30
-#define __NR_stty 31
-#define __NR_gtty 32
-#define __NR_access 33
-#define __NR_nice 34
-#define __NR_ftime 35
-#define __NR_sync 36
-#define __NR_kill 37
-#define __NR_rename 38
-#define __NR_mkdir 39
-#define __NR_rmdir 40
-#define __NR_dup 41
-#define __NR_pipe 42
-#define __NR_times 43
-#define __NR_prof 44
-#define __NR_brk 45
-#define __NR_setgid 46
-#define __NR_getgid 47
-#define __NR_signal 48
-#define __NR_geteuid 49
-#define __NR_getegid 50
-#define __NR_acct 51
-#define __NR_umount2 52
-#define __NR_lock 53
-#define __NR_ioctl 54
-#define __NR_fcntl 55
-#define __NR_mpx 56
-#define __NR_setpgid 57
-#define __NR_ulimit 58
-#define __NR_oldolduname 59
-#define __NR_umask 60
-#define __NR_chroot 61
-#define __NR_ustat 62
-#define __NR_dup2 63
-#define __NR_getppid 64
-#define __NR_getpgrp 65
-#define __NR_setsid 66
-#define __NR_sigaction 67
-#define __NR_sgetmask 68
-#define __NR_ssetmask 69
-#define __NR_setreuid 70
-#define __NR_setregid 71
-#define __NR_sigsuspend 72
-#define __NR_sigpending 73
-#define __NR_sethostname 74
-#define __NR_setrlimit 75
-#define __NR_getrlimit 76
-#define __NR_getrusage 77
-#define __NR_gettimeofday 78
-#define __NR_settimeofday 79
-#define __NR_getgroups 80
-#define __NR_setgroups 81
-#define __NR_select 82
-#define __NR_symlink 83
-#define __NR_oldlstat 84
-#define __NR_readlink 85
-#define __NR_uselib 86
-#define __NR_swapon 87
-#define __NR_reboot 88
-#define __NR_readdir 89
-#define __NR_mmap 90
-#define __NR_munmap 91
-#define __NR_truncate 92
-#define __NR_ftruncate 93
-#define __NR_fchmod 94
-#define __NR_fchown 95
-#define __NR_getpriority 96
-#define __NR_setpriority 97
-#define __NR_profil 98
-#define __NR_statfs 99
-#define __NR_fstatfs 100
-#define __NR_ioperm 101
-#define __NR_socketcall 102
-#define __NR_syslog 103
-#define __NR_setitimer 104
-#define __NR_getitimer 105
-#define __NR_stat 106
-#define __NR_lstat 107
-#define __NR_fstat 108
-#define __NR_olduname 109
-#define __NR_iopl /* 110 */ not supported
-#define __NR_vhangup 111
-#define __NR_idle /* 112 */ Obsolete
-#define __NR_vm86 /* 113 */ not supported
-#define __NR_wait4 114
-#define __NR_swapoff 115
-#define __NR_sysinfo 116
-#define __NR_ipc 117
-#define __NR_fsync 118
-#define __NR_sigreturn 119
-#define __NR_clone 120
-#define __NR_setdomainname 121
-#define __NR_uname 122
-#define __NR_cacheflush 123
-#define __NR_adjtimex 124
-#define __NR_mprotect 125
-#define __NR_sigprocmask 126
-#define __NR_create_module 127
-#define __NR_init_module 128
-#define __NR_delete_module 129
-#define __NR_get_kernel_syms 130
-#define __NR_quotactl 131
-#define __NR_getpgid 132
-#define __NR_fchdir 133
-#define __NR_bdflush 134
-#define __NR_sysfs 135
-#define __NR_personality 136
-#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
-#define __NR_setfsuid 138
-#define __NR_setfsgid 139
-#define __NR__llseek 140
-#define __NR_getdents 141
-#define __NR__newselect 142
-#define __NR_flock 143
-#define __NR_msync 144
-#define __NR_readv 145
-#define __NR_writev 146
-#define __NR_getsid 147
-#define __NR_fdatasync 148
-#define __NR__sysctl 149
-#define __NR_mlock 150
-#define __NR_munlock 151
-#define __NR_mlockall 152
-#define __NR_munlockall 153
-#define __NR_sched_setparam 154
-#define __NR_sched_getparam 155
-#define __NR_sched_setscheduler 156
-#define __NR_sched_getscheduler 157
-#define __NR_sched_yield 158
-#define __NR_sched_get_priority_max 159
-#define __NR_sched_get_priority_min 160
-#define __NR_sched_rr_get_interval 161
-#define __NR_nanosleep 162
-#define __NR_mremap 163
-#define __NR_setresuid 164
-#define __NR_getresuid 165
-#define __NR_getpagesize 166
-#define __NR_query_module 167
-#define __NR_poll 168
-#define __NR_nfsservctl 169
-#define __NR_setresgid 170
-#define __NR_getresgid 171
-#define __NR_prctl 172
-#define __NR_rt_sigreturn 173
-#define __NR_rt_sigaction 174
-#define __NR_rt_sigprocmask 175
-#define __NR_rt_sigpending 176
-#define __NR_rt_sigtimedwait 177
-#define __NR_rt_sigqueueinfo 178
-#define __NR_rt_sigsuspend 179
-#define __NR_pread64 180
-#define __NR_pwrite64 181
-#define __NR_lchown 182
-#define __NR_getcwd 183
-#define __NR_capget 184
-#define __NR_capset 185
-#define __NR_sigaltstack 186
-#define __NR_sendfile 187
-#define __NR_getpmsg 188 /* some people actually want streams */
-#define __NR_putpmsg 189 /* some people actually want streams */
-#define __NR_vfork 190
-#define __NR_ugetrlimit 191
-#define __NR_mmap2 192
-#define __NR_truncate64 193
-#define __NR_ftruncate64 194
-#define __NR_stat64 195
-#define __NR_lstat64 196
-#define __NR_fstat64 197
-#define __NR_chown32 198
-#define __NR_getuid32 199
-#define __NR_getgid32 200
-#define __NR_geteuid32 201
-#define __NR_getegid32 202
-#define __NR_setreuid32 203
-#define __NR_setregid32 204
-#define __NR_getgroups32 205
-#define __NR_setgroups32 206
-#define __NR_fchown32 207
-#define __NR_setresuid32 208
-#define __NR_getresuid32 209
-#define __NR_setresgid32 210
-#define __NR_getresgid32 211
-#define __NR_lchown32 212
-#define __NR_setuid32 213
-#define __NR_setgid32 214
-#define __NR_setfsuid32 215
-#define __NR_setfsgid32 216
-#define __NR_pivot_root 217
-#define __NR_getdents64 220
-#define __NR_gettid 221
-#define __NR_tkill 222
-#define __NR_setxattr 223
-#define __NR_lsetxattr 224
-#define __NR_fsetxattr 225
-#define __NR_getxattr 226
-#define __NR_lgetxattr 227
-#define __NR_fgetxattr 228
-#define __NR_listxattr 229
-#define __NR_llistxattr 230
-#define __NR_flistxattr 231
-#define __NR_removexattr 232
-#define __NR_lremovexattr 233
-#define __NR_fremovexattr 234
-#define __NR_futex 235
-#define __NR_sendfile64 236
-#define __NR_mincore 237
-#define __NR_madvise 238
-#define __NR_fcntl64 239
-#define __NR_readahead 240
-#define __NR_io_setup 241
-#define __NR_io_destroy 242
-#define __NR_io_getevents 243
-#define __NR_io_submit 244
-#define __NR_io_cancel 245
-#define __NR_fadvise64 246
-#define __NR_exit_group 247
-#define __NR_lookup_dcookie 248
-#define __NR_epoll_create 249
-#define __NR_epoll_ctl 250
-#define __NR_epoll_wait 251
-#define __NR_remap_file_pages 252
-#define __NR_set_tid_address 253
-#define __NR_timer_create 254
-#define __NR_timer_settime 255
-#define __NR_timer_gettime 256
-#define __NR_timer_getoverrun 257
-#define __NR_timer_delete 258
-#define __NR_clock_settime 259
-#define __NR_clock_gettime 260
-#define __NR_clock_getres 261
-#define __NR_clock_nanosleep 262
-#define __NR_statfs64 263
-#define __NR_fstatfs64 264
-#define __NR_tgkill 265
-#define __NR_utimes 266
-#define __NR_fadvise64_64 267
-#define __NR_mbind 268
-#define __NR_get_mempolicy 269
-#define __NR_set_mempolicy 270
-#define __NR_mq_open 271
-#define __NR_mq_unlink 272
-#define __NR_mq_timedsend 273
-#define __NR_mq_timedreceive 274
-#define __NR_mq_notify 275
-#define __NR_mq_getsetattr 276
-#define __NR_waitid 277
-#define __NR_vserver 278
-#define __NR_add_key 279
-#define __NR_request_key 280
-#define __NR_keyctl 281
-#define __NR_ioprio_set 282
-#define __NR_ioprio_get 283
-#define __NR_inotify_init 284
-#define __NR_inotify_add_watch 285
-#define __NR_inotify_rm_watch 286
-#define __NR_migrate_pages 287
-#define __NR_openat 288
-#define __NR_mkdirat 289
-#define __NR_mknodat 290
-#define __NR_fchownat 291
-#define __NR_futimesat 292
-#define __NR_fstatat64 293
-#define __NR_unlinkat 294
-#define __NR_renameat 295
-#define __NR_linkat 296
-#define __NR_symlinkat 297
-#define __NR_readlinkat 298
-#define __NR_fchmodat 299
-#define __NR_faccessat 300
-#define __NR_pselect6 301
-#define __NR_ppoll 302
-#define __NR_unshare 303
-#define __NR_set_robust_list 304
-#define __NR_get_robust_list 305
-#define __NR_splice 306
-#define __NR_sync_file_range 307
-#define __NR_tee 308
-#define __NR_vmsplice 309
-#define __NR_move_pages 310
-#define __NR_sched_setaffinity 311
-#define __NR_sched_getaffinity 312
-#define __NR_kexec_load 313
-#define __NR_getcpu 314
-#define __NR_epoll_pwait 315
-#define __NR_utimensat 316
-#define __NR_signalfd 317
-#define __NR_timerfd_create 318
-#define __NR_eventfd 319
-#define __NR_fallocate 320
-#define __NR_timerfd_settime 321
-#define __NR_timerfd_gettime 322
-#define __NR_signalfd4 323
-#define __NR_eventfd2 324
-#define __NR_epoll_create1 325
-#define __NR_dup3 326
-#define __NR_pipe2 327
-#define __NR_inotify_init1 328
-
-#ifdef __KERNEL__
-
-#define NR_syscalls 329
-
-#define __ARCH_WANT_IPC_PARSE_VERSION
-#define __ARCH_WANT_OLD_READDIR
-#define __ARCH_WANT_OLD_STAT
-#define __ARCH_WANT_STAT64
-#define __ARCH_WANT_SYS_ALARM
-#define __ARCH_WANT_SYS_GETHOSTNAME
-#define __ARCH_WANT_SYS_PAUSE
-#define __ARCH_WANT_SYS_SGETMASK
-#define __ARCH_WANT_SYS_SIGNAL
-#define __ARCH_WANT_SYS_TIME
-#define __ARCH_WANT_SYS_UTIME
-#define __ARCH_WANT_SYS_WAITPID
-#define __ARCH_WANT_SYS_SOCKETCALL
-#define __ARCH_WANT_SYS_FADVISE64
-#define __ARCH_WANT_SYS_GETPGRP
-#define __ARCH_WANT_SYS_LLSEEK
-#define __ARCH_WANT_SYS_NICE
-#define __ARCH_WANT_SYS_OLD_GETRLIMIT
-#define __ARCH_WANT_SYS_OLDUMOUNT
-#define __ARCH_WANT_SYS_SIGPENDING
-#define __ARCH_WANT_SYS_SIGPROCMASK
-#define __ARCH_WANT_SYS_RT_SIGACTION
-
-/*
- * "Conditional" syscalls
- *
- * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
- * but it doesn't work on all toolchains, so we just do it by hand
- */
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
-
-#endif /* __KERNEL__ */
-#endif /* _ASM_M68K_UNISTD_H_ */
+++ /dev/null
-#ifndef _ASM_M68K_UNISTD_H_
-#define _ASM_M68K_UNISTD_H_
-
-/*
- * This file contains the system call numbers.
- */
-
-#define __NR_restart_syscall 0
-#define __NR_exit 1
-#define __NR_fork 2
-#define __NR_read 3
-#define __NR_write 4
-#define __NR_open 5
-#define __NR_close 6
-#define __NR_waitpid 7
-#define __NR_creat 8
-#define __NR_link 9
-#define __NR_unlink 10
-#define __NR_execve 11
-#define __NR_chdir 12
-#define __NR_time 13
-#define __NR_mknod 14
-#define __NR_chmod 15
-#define __NR_chown 16
-#define __NR_break 17
-#define __NR_oldstat 18
-#define __NR_lseek 19
-#define __NR_getpid 20
-#define __NR_mount 21
-#define __NR_umount 22
-#define __NR_setuid 23
-#define __NR_getuid 24
-#define __NR_stime 25
-#define __NR_ptrace 26
-#define __NR_alarm 27
-#define __NR_oldfstat 28
-#define __NR_pause 29
-#define __NR_utime 30
-#define __NR_stty 31
-#define __NR_gtty 32
-#define __NR_access 33
-#define __NR_nice 34
-#define __NR_ftime 35
-#define __NR_sync 36
-#define __NR_kill 37
-#define __NR_rename 38
-#define __NR_mkdir 39
-#define __NR_rmdir 40
-#define __NR_dup 41
-#define __NR_pipe 42
-#define __NR_times 43
-#define __NR_prof 44
-#define __NR_brk 45
-#define __NR_setgid 46
-#define __NR_getgid 47
-#define __NR_signal 48
-#define __NR_geteuid 49
-#define __NR_getegid 50
-#define __NR_acct 51
-#define __NR_umount2 52
-#define __NR_lock 53
-#define __NR_ioctl 54
-#define __NR_fcntl 55
-#define __NR_mpx 56
-#define __NR_setpgid 57
-#define __NR_ulimit 58
-#define __NR_oldolduname 59
-#define __NR_umask 60
-#define __NR_chroot 61
-#define __NR_ustat 62
-#define __NR_dup2 63
-#define __NR_getppid 64
-#define __NR_getpgrp 65
-#define __NR_setsid 66
-#define __NR_sigaction 67
-#define __NR_sgetmask 68
-#define __NR_ssetmask 69
-#define __NR_setreuid 70
-#define __NR_setregid 71
-#define __NR_sigsuspend 72
-#define __NR_sigpending 73
-#define __NR_sethostname 74
-#define __NR_setrlimit 75
-#define __NR_getrlimit 76
-#define __NR_getrusage 77
-#define __NR_gettimeofday 78
-#define __NR_settimeofday 79
-#define __NR_getgroups 80
-#define __NR_setgroups 81
-#define __NR_select 82
-#define __NR_symlink 83
-#define __NR_oldlstat 84
-#define __NR_readlink 85
-#define __NR_uselib 86
-#define __NR_swapon 87
-#define __NR_reboot 88
-#define __NR_readdir 89
-#define __NR_mmap 90
-#define __NR_munmap 91
-#define __NR_truncate 92
-#define __NR_ftruncate 93
-#define __NR_fchmod 94
-#define __NR_fchown 95
-#define __NR_getpriority 96
-#define __NR_setpriority 97
-#define __NR_profil 98
-#define __NR_statfs 99
-#define __NR_fstatfs 100
-#define __NR_ioperm 101
-#define __NR_socketcall 102
-#define __NR_syslog 103
-#define __NR_setitimer 104
-#define __NR_getitimer 105
-#define __NR_stat 106
-#define __NR_lstat 107
-#define __NR_fstat 108
-#define __NR_olduname 109
-#define __NR_iopl /* 110 */ not supported
-#define __NR_vhangup 111
-#define __NR_idle /* 112 */ Obsolete
-#define __NR_vm86 /* 113 */ not supported
-#define __NR_wait4 114
-#define __NR_swapoff 115
-#define __NR_sysinfo 116
-#define __NR_ipc 117
-#define __NR_fsync 118
-#define __NR_sigreturn 119
-#define __NR_clone 120
-#define __NR_setdomainname 121
-#define __NR_uname 122
-#define __NR_cacheflush 123
-#define __NR_adjtimex 124
-#define __NR_mprotect 125
-#define __NR_sigprocmask 126
-#define __NR_create_module 127
-#define __NR_init_module 128
-#define __NR_delete_module 129
-#define __NR_get_kernel_syms 130
-#define __NR_quotactl 131
-#define __NR_getpgid 132
-#define __NR_fchdir 133
-#define __NR_bdflush 134
-#define __NR_sysfs 135
-#define __NR_personality 136
-#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
-#define __NR_setfsuid 138
-#define __NR_setfsgid 139
-#define __NR__llseek 140
-#define __NR_getdents 141
-#define __NR__newselect 142
-#define __NR_flock 143
-#define __NR_msync 144
-#define __NR_readv 145
-#define __NR_writev 146
-#define __NR_getsid 147
-#define __NR_fdatasync 148
-#define __NR__sysctl 149
-#define __NR_mlock 150
-#define __NR_munlock 151
-#define __NR_mlockall 152
-#define __NR_munlockall 153
-#define __NR_sched_setparam 154
-#define __NR_sched_getparam 155
-#define __NR_sched_setscheduler 156
-#define __NR_sched_getscheduler 157
-#define __NR_sched_yield 158
-#define __NR_sched_get_priority_max 159
-#define __NR_sched_get_priority_min 160
-#define __NR_sched_rr_get_interval 161
-#define __NR_nanosleep 162
-#define __NR_mremap 163
-#define __NR_setresuid 164
-#define __NR_getresuid 165
-#define __NR_getpagesize 166
-#define __NR_query_module 167
-#define __NR_poll 168
-#define __NR_nfsservctl 169
-#define __NR_setresgid 170
-#define __NR_getresgid 171
-#define __NR_prctl 172
-#define __NR_rt_sigreturn 173
-#define __NR_rt_sigaction 174
-#define __NR_rt_sigprocmask 175
-#define __NR_rt_sigpending 176
-#define __NR_rt_sigtimedwait 177
-#define __NR_rt_sigqueueinfo 178
-#define __NR_rt_sigsuspend 179
-#define __NR_pread64 180
-#define __NR_pwrite64 181
-#define __NR_lchown 182
-#define __NR_getcwd 183
-#define __NR_capget 184
-#define __NR_capset 185
-#define __NR_sigaltstack 186
-#define __NR_sendfile 187
-#define __NR_getpmsg 188 /* some people actually want streams */
-#define __NR_putpmsg 189 /* some people actually want streams */
-#define __NR_vfork 190
-#define __NR_ugetrlimit 191
-#define __NR_mmap2 192
-#define __NR_truncate64 193
-#define __NR_ftruncate64 194
-#define __NR_stat64 195
-#define __NR_lstat64 196
-#define __NR_fstat64 197
-#define __NR_chown32 198
-#define __NR_getuid32 199
-#define __NR_getgid32 200
-#define __NR_geteuid32 201
-#define __NR_getegid32 202
-#define __NR_setreuid32 203
-#define __NR_setregid32 204
-#define __NR_getgroups32 205
-#define __NR_setgroups32 206
-#define __NR_fchown32 207
-#define __NR_setresuid32 208
-#define __NR_getresuid32 209
-#define __NR_setresgid32 210
-#define __NR_getresgid32 211
-#define __NR_lchown32 212
-#define __NR_setuid32 213
-#define __NR_setgid32 214
-#define __NR_setfsuid32 215
-#define __NR_setfsgid32 216
-#define __NR_pivot_root 217
-#define __NR_getdents64 220
-#define __NR_gettid 221
-#define __NR_tkill 222
-#define __NR_setxattr 223
-#define __NR_lsetxattr 224
-#define __NR_fsetxattr 225
-#define __NR_getxattr 226
-#define __NR_lgetxattr 227
-#define __NR_fgetxattr 228
-#define __NR_listxattr 229
-#define __NR_llistxattr 230
-#define __NR_flistxattr 231
-#define __NR_removexattr 232
-#define __NR_lremovexattr 233
-#define __NR_fremovexattr 234
-#define __NR_futex 235
-#define __NR_sendfile64 236
-#define __NR_mincore 237
-#define __NR_madvise 238
-#define __NR_fcntl64 239
-#define __NR_readahead 240
-#define __NR_io_setup 241
-#define __NR_io_destroy 242
-#define __NR_io_getevents 243
-#define __NR_io_submit 244
-#define __NR_io_cancel 245
-#define __NR_fadvise64 246
-#define __NR_exit_group 247
-#define __NR_lookup_dcookie 248
-#define __NR_epoll_create 249
-#define __NR_epoll_ctl 250
-#define __NR_epoll_wait 251
-#define __NR_remap_file_pages 252
-#define __NR_set_tid_address 253
-#define __NR_timer_create 254
-#define __NR_timer_settime 255
-#define __NR_timer_gettime 256
-#define __NR_timer_getoverrun 257
-#define __NR_timer_delete 258
-#define __NR_clock_settime 259
-#define __NR_clock_gettime 260
-#define __NR_clock_getres 261
-#define __NR_clock_nanosleep 262
-#define __NR_statfs64 263
-#define __NR_fstatfs64 264
-#define __NR_tgkill 265
-#define __NR_utimes 266
-#define __NR_fadvise64_64 267
-#define __NR_mbind 268
-#define __NR_get_mempolicy 269
-#define __NR_set_mempolicy 270
-#define __NR_mq_open 271
-#define __NR_mq_unlink 272
-#define __NR_mq_timedsend 273
-#define __NR_mq_timedreceive 274
-#define __NR_mq_notify 275
-#define __NR_mq_getsetattr 276
-#define __NR_waitid 277
-#define __NR_vserver 278
-#define __NR_add_key 279
-#define __NR_request_key 280
-#define __NR_keyctl 281
-#define __NR_ioprio_set 282
-#define __NR_ioprio_get 283
-#define __NR_inotify_init 284
-#define __NR_inotify_add_watch 285
-#define __NR_inotify_rm_watch 286
-#define __NR_migrate_pages 287
-#define __NR_openat 288
-#define __NR_mkdirat 289
-#define __NR_mknodat 290
-#define __NR_fchownat 291
-#define __NR_futimesat 292
-#define __NR_fstatat64 293
-#define __NR_unlinkat 294
-#define __NR_renameat 295
-#define __NR_linkat 296
-#define __NR_symlinkat 297
-#define __NR_readlinkat 298
-#define __NR_fchmodat 299
-#define __NR_faccessat 300
-#define __NR_pselect6 301
-#define __NR_ppoll 302
-#define __NR_unshare 303
-#define __NR_set_robust_list 304
-#define __NR_get_robust_list 305
-#define __NR_splice 306
-#define __NR_sync_file_range 307
-#define __NR_tee 308
-#define __NR_vmsplice 309
-#define __NR_move_pages 310
-#define __NR_sched_setaffinity 311
-#define __NR_sched_getaffinity 312
-#define __NR_kexec_load 313
-#define __NR_getcpu 314
-#define __NR_epoll_pwait 315
-#define __NR_utimensat 316
-#define __NR_signalfd 317
-#define __NR_timerfd_create 318
-#define __NR_eventfd 319
-#define __NR_fallocate 320
-#define __NR_timerfd_settime 321
-#define __NR_timerfd_gettime 322
-#define __NR_signalfd4 323
-#define __NR_eventfd2 324
-#define __NR_epoll_create1 325
-#define __NR_dup3 326
-#define __NR_pipe2 327
-#define __NR_inotify_init1 328
-
-#ifdef __KERNEL__
-
-#define NR_syscalls 329
-
-#define __ARCH_WANT_IPC_PARSE_VERSION
-#define __ARCH_WANT_OLD_READDIR
-#define __ARCH_WANT_OLD_STAT
-#define __ARCH_WANT_STAT64
-#define __ARCH_WANT_SYS_ALARM
-#define __ARCH_WANT_SYS_GETHOSTNAME
-#define __ARCH_WANT_SYS_PAUSE
-#define __ARCH_WANT_SYS_SGETMASK
-#define __ARCH_WANT_SYS_SIGNAL
-#define __ARCH_WANT_SYS_TIME
-#define __ARCH_WANT_SYS_UTIME
-#define __ARCH_WANT_SYS_WAITPID
-#define __ARCH_WANT_SYS_SOCKETCALL
-#define __ARCH_WANT_SYS_FADVISE64
-#define __ARCH_WANT_SYS_GETPGRP
-#define __ARCH_WANT_SYS_LLSEEK
-#define __ARCH_WANT_SYS_NICE
-#define __ARCH_WANT_SYS_OLD_GETRLIMIT
-#define __ARCH_WANT_SYS_OLDUMOUNT
-#define __ARCH_WANT_SYS_SIGPENDING
-#define __ARCH_WANT_SYS_SIGPROCMASK
-#define __ARCH_WANT_SYS_RT_SIGACTION
-
-/*
- * "Conditional" syscalls
- *
- * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
- * but it doesn't work on all toolchains, so we just do it by hand
- */
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
-
-#endif /* __KERNEL__ */
-#endif /* _ASM_M68K_UNISTD_H_ */
This option enables support for MIPS Technologies MIPSsim software
emulator.
-config MACH_EMMA
- bool "NEC EMMA series based machines"
+config NEC_MARKEINS
+ bool "NEC EMMA2RH Mark-eins board"
+ select SOC_EMMA2RH
+ select HW_HAS_PCI
+ help
+ This enables support for the NEC Electronics Mark-eins boards.
config MACH_VR41XX
bool "NEC VR4100 series based machines"
source "arch/mips/alchemy/Kconfig"
source "arch/mips/basler/excite/Kconfig"
-source "arch/mips/emma/Kconfig"
source "arch/mips/jazz/Kconfig"
source "arch/mips/lasat/Kconfig"
source "arch/mips/pmc-sierra/Kconfig"
bool
select SERIAL_RM9000
+config SOC_EMMA2RH
+ bool
+ select CEVT_R4K
+ select CSRC_R4K
+ select DMA_NONCOHERENT
+ select IRQ_CPU
+ select SWAP_IO_SPACE
+ select SYS_HAS_CPU_R5500
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_64BIT_KERNEL
+ select SYS_SUPPORTS_BIG_ENDIAN
+
config SOC_PNX833X
bool
select CEVT_R4K
config SWAP_IO_SPACE
bool
-config EMMA2RH
- bool
- depends on MARKEINS
- default y
-
config SERIAL_RM9000
bool
#
# Common NEC EMMAXXX
#
-core-$(CONFIG_SOC_EMMA) += arch/mips/emma/common/
+core-$(CONFIG_SOC_EMMA2RH) += arch/mips/emma/common/
cflags-$(CONFIG_SOC_EMMA2RH) += -I$(srctree)/arch/mips/include/asm/mach-emma2rh
#
# CONFIG_PNX8550_STB810 is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_PMC_YOSEMITE is not set
-CONFIG_MARKEINS=y
+CONFIG_NEC_MARKEINS=y
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP32 is not set
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y
CONFIG_SWAP_IO_SPACE=y
-CONFIG_EMMA2RH=y
+CONFIG_SOC_EMMA2RH=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
#
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_START=0x1e000000
-CONFIG_MTD_PHYSMAP_LEN=0x02000000
-CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+CONFIG_MTD_PHYSMAP_START=0x0
+CONFIG_MTD_PHYSMAP_LEN=0x0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=0
# CONFIG_MTD_PLATRAM is not set
#
+++ /dev/null
-choice
- prompt "Machine type"
- depends on MACH_EMMA
- default NEC_MARKEINS
-
-config NEC_MARKEINS
- bool "NEC EMMA2RH Mark-eins board"
- select SOC_EMMA2RH
- select HW_HAS_PCI
- help
- This enables support for the NEC Electronics Mark-eins boards.
-
-endchoice
-
-config SOC_EMMA2RH
- bool
- select SOC_EMMA
- select SYS_HAS_CPU_R5500
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_64BIT_KERNEL
-
-config SOC_EMMA
- bool
- select CEVT_R4K
- select CSRC_R4K
- select DMA_NONCOHERENT
- select IRQ_CPU
- select SWAP_IO_SPACE
- select SYS_SUPPORTS_BIG_ENDIAN
},
};
-static struct platform_device *devices[] = {
- &i2c_emma_devices[0],
- &i2c_emma_devices[1],
- &i2c_emma_devices[2],
- &serial_emma,
-};
-
static struct mtd_partition markeins_parts[] = {
[0] = {
.name = "RootFS",
},
};
+static struct physmap_flash_data markeins_flash_data = {
+ .width = 2,
+ .nr_parts = ARRAY_SIZE(markeins_parts),
+ .parts = markeins_parts
+};
+
+static struct resource markeins_flash_resource = {
+ .start = 0x1e000000,
+ .end = 0x02000000,
+ .flags = IORESOURCE_MEM
+};
+
+static struct platform_device markeins_flash_device = {
+ .name = "physmap-flash",
+ .id = 0,
+ .dev = {
+ .platform_data = &markeins_flash_data,
+ },
+ .num_resources = 1,
+ .resource = &markeins_flash_resource,
+};
+
+static struct platform_device *devices[] = {
+ i2c_emma_devices,
+ i2c_emma_devices + 1,
+ i2c_emma_devices + 2,
+ &serial_emma,
+ &markeins_flash_device,
+};
+
static int __init platform_devices_setup(void)
{
- physmap_set_partitions(markeins_parts, ARRAY_SIZE(markeins_parts));
return platform_add_devices(devices, ARRAY_SIZE(devices));
}
arch_initcall(platform_devices_setup);
-
*/
#ifdef CONFIG_MIPS32_O32
-#define TIF_32BIT TIF_32BIT_REGS
-
#define __NR_seccomp_read_32 4003
#define __NR_seccomp_write_32 4004
#define __NR_seccomp_exit_32 4001
#elif defined(CONFIG_MIPS32_N32)
-#define TIF_32BIT _TIF_32BIT_ADDR
-
#define __NR_seccomp_read_32 6000
#define __NR_seccomp_write_32 6001
#define __NR_seccomp_exit_32 6058
#define TIF_LOAD_WATCH 25 /* If set, load watch registers */
#define TIF_SYSCALL_TRACE 31 /* syscall trace active */
+#ifdef CONFIG_MIPS32_O32
+#define TIF_32BIT TIF_32BIT_REGS
+#elif defined(CONFIG_MIPS32_N32)
+#define TIF_32BIT _TIF_32BIT_ADDR
+#endif /* CONFIG_MIPS32_O32 */
+
#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.23
-# Fri Oct 12 21:00:07 2007
+# Linux kernel version: 2.6.29-rc8
+# Fri Mar 13 01:32:55 2009
#
CONFIG_PARISC=y
CONFIG_MMU=y
CONFIG_POSIX_MQUEUE=y
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
-# CONFIG_USER_NS is not set
# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
# CONFIG_EMBEDDED is not set
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
+CONFIG_AIO=y
CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+CONFIG_TRACEPOINTS=y
+# CONFIG_MARKERS is not set
+CONFIG_OPROFILE=m
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
+CONFIG_INIT_ALL_POSSIBLE=y
CONFIG_BLOCK=y
# CONFIG_LBD is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
#
# IO Schedulers
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
+# CONFIG_FREEZER is not set
#
# Processor type and features
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4096
-# CONFIG_RESOURCES_64BIT is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_ZONE_DMA_FLAG=0
CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
# CONFIG_HPUX is not set
#
# CONFIG_EISA is not set
# CONFIG_PCI is not set
# CONFIG_ARCH_SUPPORTS_MSI is not set
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
# CONFIG_PCCARD is not set
#
# Executable file formats
#
CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
CONFIG_BINFMT_MISC=m
-
-#
-# Networking
-#
CONFIG_NET=y
#
# Networking options
#
+CONFIG_COMPAT_NET_DEV_OPS=y
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=m
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
CONFIG_NET_KEY=m
# CONFIG_NET_KEY_MIGRATE is not set
CONFIG_INET=y
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
-# CONFIG_IP_VS is not set
# CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETWORK_SECMARK is not set
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_ADVANCED=y
#
# Core Netfilter Configuration
#
-# CONFIG_NETFILTER_NETLINK is not set
-# CONFIG_NF_CONNTRACK_ENABLED is not set
+# CONFIG_NETFILTER_NETLINK_QUEUE is not set
+# CONFIG_NETFILTER_NETLINK_LOG is not set
# CONFIG_NF_CONNTRACK is not set
# CONFIG_NETFILTER_XTABLES is not set
+# CONFIG_IP_VS is not set
#
# IP: Netfilter Configuration
#
+# CONFIG_NF_DEFRAG_IPV4 is not set
CONFIG_IP_NF_QUEUE=m
# CONFIG_IP_NF_IPTABLES is not set
# CONFIG_IP_NF_ARPTABLES is not set
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
CONFIG_LLC=m
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
#
# Network testing
#
CONFIG_NET_PKTGEN=m
# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
-
-#
-# Wireless
-#
+# CONFIG_PHONET is not set
+CONFIG_WIRELESS=y
# CONFIG_CFG80211 is not set
+CONFIG_WIRELESS_OLD_REGULATORY=y
# CONFIG_WIRELESS_EXT is not set
+# CONFIG_LIB80211 is not set
# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
+# CONFIG_WIMAX is not set
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set
# CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=6144
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_BLK_DEV_XIP is not set
# CONFIG_CDROM_PKTCDVD is not set
CONFIG_ATA_OVER_ETH=m
+# CONFIG_BLK_DEV_HD is not set
CONFIG_MISC_DEVICES=y
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set
#
# CONFIG_SCSI_FC_ATTRS is not set
CONFIG_SCSI_ISCSI_ATTRS=m
# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
CONFIG_SCSI_LOWLEVEL=y
# CONFIG_ISCSI_TCP is not set
+# CONFIG_LIBFC is not set
# CONFIG_SCSI_PPA is not set
# CONFIG_SCSI_IMM is not set
CONFIG_SCSI_LASI700=y
CONFIG_53C700_LE_ON_BE=y
# CONFIG_SCSI_ZALON is not set
CONFIG_SCSI_DEBUG=m
+# CONFIG_SCSI_DH is not set
# CONFIG_ATA is not set
CONFIG_MD=y
CONFIG_BLK_DEV_MD=m
# CONFIG_MD_FAULTY is not set
# CONFIG_BLK_DEV_DM is not set
CONFIG_NETDEVICES=y
-# CONFIG_NETDEVICES_MULTIQUEUE is not set
CONFIG_DUMMY=m
CONFIG_BONDING=m
# CONFIG_MACVLAN is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
# CONFIG_B44 is not set
# CONFIG_NET_POCKET is not set
CONFIG_NETDEV_1000=y
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
# CONFIG_WAN is not set
# CONFIG_PLIP is not set
CONFIG_PPP=m
# CONFIG_PPPOL2TP is not set
# CONFIG_SLIP is not set
CONFIG_SLHC=m
-# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
CONFIG_MOUSE_PS2_ALPS=y
CONFIG_MOUSE_PS2_LOGIPS2PP=y
CONFIG_MOUSE_PS2_SYNAPTICS=y
-CONFIG_MOUSE_PS2_LIFEBOOK=y
CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_ELANTECH is not set
# CONFIG_MOUSE_PS2_TOUCHKIT is not set
CONFIG_MOUSE_SERIAL=m
# CONFIG_MOUSE_VSXXXAA is not set
# Character devices
#
CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=64
CONFIG_PRINTER=m
# CONFIG_LP_CONSOLE is not set
CONFIG_PPDEV=m
-# CONFIG_TIPAR is not set
# CONFIG_IPMI_HANDLER is not set
-# CONFIG_WATCHDOG is not set
# CONFIG_HW_RANDOM is not set
-CONFIG_GEN_RTC=y
-CONFIG_GEN_RTC_X=y
# CONFIG_R3964 is not set
CONFIG_RAW_DRIVER=y
CONFIG_MAX_RAW_DEVS=256
# CONFIG_TCG_TPM is not set
# CONFIG_I2C is not set
-
-#
-# SPI support
-#
# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
#
# Sonics Silicon Backplane
#
-CONFIG_SSB_POSSIBLE=y
# CONFIG_SSB is not set
#
# Multifunction device drivers
#
+# CONFIG_MFD_CORE is not set
# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_REGULATOR is not set
#
# Multimedia devices
#
+
+#
+# Multimedia core support
+#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
-# CONFIG_DAB is not set
+# CONFIG_VIDEO_MEDIA is not set
#
-# Graphics support
+# Multimedia drivers
#
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+# CONFIG_DAB is not set
#
-# Display device support
+# Graphics support
#
-# CONFIG_DISPLAY_SUPPORT is not set
# CONFIG_VGASTATE is not set
CONFIG_VIDEO_OUTPUT_CONTROL=m
CONFIG_FB=y
# CONFIG_FIRMWARE_EDID is not set
# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
# CONFIG_FB_SYS_FILLRECT is not set
# CONFIG_FB_SYS_COPYAREA is not set
# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
# CONFIG_FB_SYS_FOPS is not set
-CONFIG_FB_DEFERRED_IO=y
# CONFIG_FB_SVGALIB is not set
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_BACKLIGHT is not set
CONFIG_FB_STI=y
# CONFIG_FB_S1D13XXX is not set
# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
#
# Console display driver support
# CONFIG_LOGO_LINUX_VGA16 is not set
# CONFIG_LOGO_LINUX_CLUT224 is not set
CONFIG_LOGO_PARISC_CLUT224=y
-
-#
-# Sound
-#
CONFIG_SOUND=y
-
-#
-# Advanced Linux Sound Architecture
-#
+CONFIG_SOUND_OSS_CORE=y
CONFIG_SND=y
CONFIG_SND_TIMER=y
CONFIG_SND_PCM=y
CONFIG_SND_VERBOSE_PROCFS=y
# CONFIG_SND_VERBOSE_PRINTK is not set
# CONFIG_SND_DEBUG is not set
-
-#
-# Generic devices
-#
+CONFIG_SND_DRIVERS=y
# CONFIG_SND_DUMMY is not set
# CONFIG_SND_VIRMIDI is not set
# CONFIG_SND_MTPAV is not set
# CONFIG_SND_SERIAL_U16550 is not set
# CONFIG_SND_MPU401 is not set
# CONFIG_SND_PORTMAN2X4 is not set
-
-#
-# GSC devices
-#
+CONFIG_SND_GSC=y
CONFIG_SND_HARMONY=y
-
-#
-# System on Chip audio support
-#
# CONFIG_SND_SOC is not set
-
-#
-# SoC Audio support for SuperH
-#
-
-#
-# Open Sound System
-#
# CONFIG_SOUND_PRIME is not set
CONFIG_HID_SUPPORT=y
CONFIG_HID=y
CONFIG_HID_DEBUG=y
+# CONFIG_HIDRAW is not set
+# CONFIG_HID_PID is not set
+
+#
+# Special HID drivers
+#
+CONFIG_HID_COMPAT=y
CONFIG_USB_SUPPORT=y
# CONFIG_USB_ARCH_HAS_HCD is not set
# CONFIG_USB_ARCH_HAS_OHCI is not set
# CONFIG_USB_ARCH_HAS_EHCI is not set
#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+# Enable Host or Gadget support to see Inventra options
#
#
-# USB Gadget Support
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
#
# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
-# CONFIG_RTC_CLASS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
#
-# DMA Engine support
+# RTC interfaces
#
-# CONFIG_DMA_ENGINE is not set
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
#
-# DMA Clients
+# SPI RTC drivers
#
#
-# DMA Devices
-#
-# CONFIG_AUXDISPLAY is not set
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
#
-# Userspace I/O
+# on-CPU RTC drivers
#
+CONFIG_RTC_DRV_PARISC=y
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
#
# File systems
# CONFIG_EXT2_FS_XIP is not set
CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_XATTR is not set
-# CONFIG_EXT4DEV_FS is not set
+# CONFIG_EXT4_FS is not set
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_DEBUG is not set
# CONFIG_JFS_STATISTICS is not set
CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
CONFIG_XFS_FS=m
# CONFIG_XFS_QUOTA is not set
-# CONFIG_XFS_SECURITY is not set
# CONFIG_XFS_POSIX_ACL is not set
# CONFIG_XFS_RT is not set
-# CONFIG_GFS2_FS is not set
+# CONFIG_XFS_DEBUG is not set
# CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
CONFIG_AUTOFS4_FS=y
# CONFIG_FUSE_FS is not set
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
# CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_ECRYPT_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
CONFIG_UFS_FS=m
# CONFIG_UFS_FS_WRITE is not set
# CONFIG_UFS_DEBUG is not set
-
-#
-# Network File Systems
-#
+CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
CONFIG_NFS_V4=y
-CONFIG_NFS_DIRECTIO=y
+CONFIG_ROOT_NFS=y
CONFIG_NFSD=m
CONFIG_NFSD_V3=y
# CONFIG_NFSD_V3_ACL is not set
CONFIG_NFSD_V4=y
-CONFIG_NFSD_TCP=y
-CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_EXPORTFS=m
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
-# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_SUNRPC_REGISTER_V4 is not set
CONFIG_RPCSEC_GSS_KRB5=y
CONFIG_RPCSEC_GSS_SPKM3=m
CONFIG_SMB_FS=m
CONFIG_CIFS=m
# CONFIG_CIFS_STATS is not set
# CONFIG_CIFS_WEAK_PW_HASH is not set
+# CONFIG_CIFS_UPCALL is not set
# CONFIG_CIFS_XATTR is not set
# CONFIG_CIFS_DEBUG2 is not set
# CONFIG_CIFS_EXPERIMENTAL is not set
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=m
CONFIG_NLS_KOI8_R=m
CONFIG_NLS_KOI8_U=m
CONFIG_NLS_UTF8=m
-
-#
-# Distributed Lock Manager
-#
# CONFIG_DLM is not set
-#
-# Profiling support
-#
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=m
-
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
CONFIG_MAGIC_SYSRQ=y
# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_DEBUG_FS is not set
+CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_CHECK is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_SHIRQ is not set
CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
CONFIG_SCHED_DEBUG=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
# CONFIG_DEBUG_LIST is not set
-CONFIG_FORCED_INLINING=y
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_NOP_TRACER=y
+CONFIG_RING_BUFFER=y
+CONFIG_TRACING=y
+
+#
+# Tracers
+#
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_FTRACE_STARTUP_TEST is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
CONFIG_DEBUG_RODATA=y
#
CONFIG_KEYS=y
CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD=m
+CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_NULL=m
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_AUTHENC=m
+CONFIG_CRYPTO_TEST=m
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=m
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
CONFIG_CRYPTO_HMAC=y
# CONFIG_CRYPTO_XCBC is not set
-CONFIG_CRYPTO_NULL=m
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=m
CONFIG_CRYPTO_MD4=m
CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_MICHAEL_MIC=m
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
CONFIG_CRYPTO_SHA1=m
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
-CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_TGR192=m
-# CONFIG_CRYPTO_GF128MUL is not set
-CONFIG_CRYPTO_ECB=m
-CONFIG_CRYPTO_CBC=y
-# CONFIG_CRYPTO_PCBC is not set
-# CONFIG_CRYPTO_LRW is not set
-# CONFIG_CRYPTO_XTS is not set
-# CONFIG_CRYPTO_CRYPTD is not set
-CONFIG_CRYPTO_DES=y
-# CONFIG_CRYPTO_FCRYPT is not set
-CONFIG_CRYPTO_BLOWFISH=m
-CONFIG_CRYPTO_TWOFISH=m
-CONFIG_CRYPTO_TWOFISH_COMMON=m
-CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_WP512=m
+
+#
+# Ciphers
+#
CONFIG_CRYPTO_AES=m
+CONFIG_CRYPTO_ANUBIS=m
+CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_BLOWFISH=m
+# CONFIG_CRYPTO_CAMELLIA is not set
CONFIG_CRYPTO_CAST5=m
CONFIG_CRYPTO_CAST6=m
-CONFIG_CRYPTO_TEA=m
-CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
CONFIG_CRYPTO_KHAZAD=m
-CONFIG_CRYPTO_ANUBIS=m
+# CONFIG_CRYPTO_SALSA20 is not set
# CONFIG_CRYPTO_SEED is not set
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_TEA=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_TWOFISH_COMMON=m
+
+#
+# Compression
+#
CONFIG_CRYPTO_DEFLATE=m
-CONFIG_CRYPTO_MICHAEL_MIC=m
-CONFIG_CRYPTO_CRC32C=m
-# CONFIG_CRYPTO_CAMELLIA is not set
-CONFIG_CRYPTO_TEST=m
-# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_HW is not set
#
# Library routines
#
CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_CRC_CCITT=m
# CONFIG_CRC16 is not set
-# CONFIG_CRC_ITU_T is not set
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=m
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
CONFIG_LIBCRC32C=m
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.23
-# Fri Oct 12 21:12:44 2007
+# Linux kernel version: 2.6.29-rc8
+# Fri Mar 13 01:32:56 2009
#
CONFIG_PARISC=y
CONFIG_MMU=y
CONFIG_POSIX_MQUEUE=y
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
-# CONFIG_USER_NS is not set
# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
-# CONFIG_CPUSETS is not set
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
CONFIG_EMBEDDED=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
+CONFIG_AIO=y
CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_PCI_QUIRKS=y
+CONFIG_COMPAT_BRK=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+CONFIG_TRACEPOINTS=y
+# CONFIG_MARKERS is not set
+CONFIG_OPROFILE=m
+CONFIG_HAVE_OPROFILE=y
+CONFIG_USE_GENERIC_SMP_HELPERS=y
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
+CONFIG_INIT_ALL_POSSIBLE=y
CONFIG_STOP_MACHINE=y
CONFIG_BLOCK=y
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
CONFIG_BLOCK_COMPAT=y
#
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_FREEZER is not set
#
# Processor type and features
CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT is not set
-CONFIG_PREEMPT_BKL=y
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
CONFIG_SELECT_MEMORY_MODEL=y
# CONFIG_FLATMEM_MANUAL is not set
CONFIG_DISCONTIGMEM_MANUAL=y
CONFIG_DISCONTIGMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
CONFIG_NEED_MULTIPLE_NODES=y
-# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
-CONFIG_RESOURCES_64BIT=y
+CONFIG_PHYS_ADDR_T_64BIT=y
CONFIG_ZONE_DMA_FLAG=0
CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
CONFIG_COMPAT=y
CONFIG_NR_CPUS=8
# CONFIG_GSC is not set
CONFIG_PCI=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_PCI_LEGACY=y
# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_STUB is not set
CONFIG_PCI_LBA=y
CONFIG_IOSAPIC=y
CONFIG_IOMMU_SBA=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
+CONFIG_IOMMU_HELPER=y
CONFIG_PCCARD=m
# CONFIG_PCMCIA_DEBUG is not set
CONFIG_PCMCIA=m
# Executable file formats
#
CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
# CONFIG_BINFMT_MISC is not set
-
-#
-# Networking
-#
CONFIG_NET=y
#
# Networking options
#
+CONFIG_COMPAT_NET_DEV_OPS=y
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=m
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+CONFIG_XFRM_IPCOMP=m
CONFIG_NET_KEY=m
# CONFIG_NET_KEY_MIGRATE is not set
CONFIG_INET=y
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
-# CONFIG_IP_VS is not set
CONFIG_IPV6=m
# CONFIG_IPV6_PRIVACY is not set
# CONFIG_IPV6_ROUTER_PREF is not set
CONFIG_INET6_XFRM_MODE_BEET=m
# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
CONFIG_IPV6_SIT=m
+CONFIG_IPV6_NDISC_NODETYPE=y
CONFIG_IPV6_TUNNEL=m
# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
# CONFIG_NETWORK_SECMARK is not set
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_ADVANCED=y
#
# Core Netfilter Configuration
#
-# CONFIG_NETFILTER_NETLINK is not set
-# CONFIG_NF_CONNTRACK_ENABLED is not set
+# CONFIG_NETFILTER_NETLINK_QUEUE is not set
+# CONFIG_NETFILTER_NETLINK_LOG is not set
# CONFIG_NF_CONNTRACK is not set
CONFIG_NETFILTER_XTABLES=m
# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
# CONFIG_NETFILTER_XT_TARGET_MARK is not set
-# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
+# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
+# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
# CONFIG_NETFILTER_XT_MATCH_ESP is not set
+# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
+# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set
# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set
# CONFIG_NETFILTER_XT_MATCH_MAC is not set
# CONFIG_NETFILTER_XT_MATCH_MARK is not set
-# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
+# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
+# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set
# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
+# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
# CONFIG_NETFILTER_XT_MATCH_REALM is not set
+# CONFIG_NETFILTER_XT_MATCH_RECENT is not set
# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
# CONFIG_NETFILTER_XT_MATCH_STRING is not set
# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set
# CONFIG_NETFILTER_XT_MATCH_TIME is not set
# CONFIG_NETFILTER_XT_MATCH_U32 is not set
-# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
+# CONFIG_IP_VS is not set
#
# IP: Netfilter Configuration
#
+# CONFIG_NF_DEFRAG_IPV4 is not set
CONFIG_IP_NF_QUEUE=m
CONFIG_IP_NF_IPTABLES=m
-CONFIG_IP_NF_MATCH_IPRANGE=m
-CONFIG_IP_NF_MATCH_TOS=m
-CONFIG_IP_NF_MATCH_RECENT=m
-CONFIG_IP_NF_MATCH_ECN=m
+# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
# CONFIG_IP_NF_MATCH_AH is not set
+CONFIG_IP_NF_MATCH_ECN=m
CONFIG_IP_NF_MATCH_TTL=m
-CONFIG_IP_NF_MATCH_OWNER=m
-# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
CONFIG_IP_NF_FILTER=m
CONFIG_IP_NF_TARGET_REJECT=m
CONFIG_IP_NF_TARGET_LOG=m
CONFIG_IP_NF_TARGET_ULOG=m
CONFIG_IP_NF_MANGLE=m
-CONFIG_IP_NF_TARGET_TOS=m
CONFIG_IP_NF_TARGET_ECN=m
# CONFIG_IP_NF_TARGET_TTL is not set
CONFIG_IP_NF_RAW=m
CONFIG_IP_NF_ARP_MANGLE=m
#
-# IPv6: Netfilter Configuration (EXPERIMENTAL)
+# IPv6: Netfilter Configuration
#
# CONFIG_IP6_NF_QUEUE is not set
CONFIG_IP6_NF_IPTABLES=m
-CONFIG_IP6_NF_MATCH_RT=m
-CONFIG_IP6_NF_MATCH_OPTS=m
+# CONFIG_IP6_NF_MATCH_AH is not set
+# CONFIG_IP6_NF_MATCH_EUI64 is not set
CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_OPTS=m
CONFIG_IP6_NF_MATCH_HL=m
-# CONFIG_IP6_NF_MATCH_OWNER is not set
CONFIG_IP6_NF_MATCH_IPV6HEADER=m
-# CONFIG_IP6_NF_MATCH_AH is not set
# CONFIG_IP6_NF_MATCH_MH is not set
-# CONFIG_IP6_NF_MATCH_EUI64 is not set
-CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_MATCH_RT=m
CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_FILTER=m
CONFIG_IP6_NF_TARGET_REJECT=m
CONFIG_IP6_NF_MANGLE=m
# CONFIG_IP6_NF_TARGET_HL is not set
CONFIG_IP6_NF_RAW=m
CONFIG_IP_DCCP=m
CONFIG_INET_DCCP_DIAG=m
-CONFIG_IP_DCCP_ACKVEC=y
#
# DCCP CCIDs Configuration (EXPERIMENTAL)
#
-CONFIG_IP_DCCP_CCID2=m
# CONFIG_IP_DCCP_CCID2_DEBUG is not set
# CONFIG_IP_DCCP_CCID3 is not set
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
CONFIG_LLC=m
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
#
# Network testing
#
CONFIG_NET_PKTGEN=m
# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
-
-#
-# Wireless
-#
+# CONFIG_PHONET is not set
+CONFIG_WIRELESS=y
# CONFIG_CFG80211 is not set
+CONFIG_WIRELESS_OLD_REGULATORY=y
# CONFIG_WIRELESS_EXT is not set
+# CONFIG_LIB80211 is not set
# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
+# CONFIG_WIMAX is not set
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set
# CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=6144
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_BLK_DEV_XIP is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
CONFIG_MISC_DEVICES=y
# CONFIG_PHANTOM is not set
-# CONFIG_EEPROM_93CX6 is not set
# CONFIG_SGI_IOC4 is not set
# CONFIG_TIFM_CORE is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_HP_ILO is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set
#
CONFIG_SCSI_FC_ATTRS=m
CONFIG_SCSI_ISCSI_ATTRS=m
# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
CONFIG_SCSI_LOWLEVEL=y
# CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_CXGB3_ISCSI is not set
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_3W_9XXX is not set
# CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_AIC79XX is not set
# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_ARCMSR is not set
# CONFIG_MEGARAID_NEWGEN is not set
# CONFIG_MEGARAID_LEGACY is not set
# CONFIG_MEGARAID_SAS is not set
# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_FCOE is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
# CONFIG_SCSI_IPS is not set
# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_MVSAS is not set
# CONFIG_SCSI_STEX is not set
CONFIG_SCSI_SYM53C8XX_2=y
CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
CONFIG_SCSI_DEBUG=m
# CONFIG_SCSI_SRP is not set
# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
+# CONFIG_SCSI_DH is not set
# CONFIG_ATA is not set
CONFIG_MD=y
CONFIG_BLK_DEV_MD=y
+CONFIG_MD_AUTODETECT=y
CONFIG_MD_LINEAR=y
CONFIG_MD_RAID0=y
CONFIG_MD_RAID1=y
# CONFIG_MD_MULTIPATH is not set
# CONFIG_MD_FAULTY is not set
# CONFIG_BLK_DEV_DM is not set
-
-#
-# Fusion MPT device support
-#
CONFIG_FUSION=y
CONFIG_FUSION_SPI=m
CONFIG_FUSION_FC=m
#
# IEEE 1394 (FireWire) support
#
+
+#
+# Enable only one of the two stacks, unless you know what you are doing
+#
# CONFIG_FIREWIRE is not set
# CONFIG_IEEE1394 is not set
# CONFIG_I2O is not set
CONFIG_NETDEVICES=y
-# CONFIG_NETDEVICES_MULTIQUEUE is not set
CONFIG_DUMMY=m
CONFIG_BONDING=m
# CONFIG_MACVLAN is not set
# CONFIG_EQUALIZER is not set
CONFIG_TUN=m
# CONFIG_VETH is not set
-# CONFIG_IP1000 is not set
# CONFIG_ARCNET is not set
-# CONFIG_PHYLIB is not set
+CONFIG_PHYLIB=m
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
CONFIG_NET_ETHERNET=y
CONFIG_MII=m
# CONFIG_HAPPYMEAL is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
CONFIG_NET_PCI=y
CONFIG_PCNET32=m
-# CONFIG_PCNET32_NAPI is not set
# CONFIG_AMD8111_ETH is not set
# CONFIG_ADAPTEC_STARFIRE is not set
# CONFIG_B44 is not set
# CONFIG_FORCEDETH is not set
-# CONFIG_EEPRO100 is not set
CONFIG_E100=m
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_8139CP is not set
# CONFIG_8139TOO is not set
+# CONFIG_R6040 is not set
# CONFIG_SIS900 is not set
# CONFIG_EPIC100 is not set
+# CONFIG_SMSC9420 is not set
# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
# CONFIG_SC92031 is not set
+# CONFIG_ATL2 is not set
CONFIG_NETDEV_1000=y
CONFIG_ACENIC=m
CONFIG_ACENIC_OMIT_TIGON_I=y
# CONFIG_DL2K is not set
CONFIG_E1000=m
-CONFIG_E1000_NAPI=y
-# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_E1000E is not set
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SIS190 is not set
# CONFIG_SKGE is not set
# CONFIG_SKY2 is not set
-# CONFIG_SK98LIN is not set
# CONFIG_VIA_VELOCITY is not set
CONFIG_TIGON3=m
# CONFIG_BNX2 is not set
# CONFIG_QLA3XXX is not set
# CONFIG_ATL1 is not set
+# CONFIG_ATL1E is not set
+# CONFIG_ATL1C is not set
+# CONFIG_JME is not set
CONFIG_NETDEV_10000=y
# CONFIG_CHELSIO_T1 is not set
+CONFIG_CHELSIO_T3_DEPENDS=y
# CONFIG_CHELSIO_T3 is not set
+# CONFIG_ENIC is not set
# CONFIG_IXGBE is not set
# CONFIG_IXGB is not set
# CONFIG_S2IO is not set
# CONFIG_MYRI10GE is not set
# CONFIG_NETXEN_NIC is not set
# CONFIG_NIU is not set
+# CONFIG_MLX4_EN is not set
# CONFIG_MLX4_CORE is not set
# CONFIG_TEHUTI is not set
+# CONFIG_BNX2X is not set
+# CONFIG_QLGE is not set
+# CONFIG_SFC is not set
# CONFIG_TR is not set
#
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
CONFIG_NET_PCMCIA=y
CONFIG_PCMCIA_3C589=m
CONFIG_PCMCIA_3C574=m
# CONFIG_SLIP is not set
CONFIG_SLHC=m
# CONFIG_NET_FC is not set
-# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
# Character devices
#
CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
#
# Serial drivers
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_JSM is not set
CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
# CONFIG_LEGACY_PTYS is not set
# CONFIG_IPMI_HANDLER is not set
-# CONFIG_WATCHDOG is not set
# CONFIG_HW_RANDOM is not set
-CONFIG_GEN_RTC=y
-CONFIG_GEN_RTC_X=y
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
-CONFIG_AGP=y
-CONFIG_AGP_PARISC=y
-# CONFIG_DRM is not set
#
# PCMCIA character devices
# CONFIG_SYNCLINK_CS is not set
# CONFIG_CARDMAN_4000 is not set
# CONFIG_CARDMAN_4040 is not set
+# CONFIG_IPWIRELESS is not set
CONFIG_RAW_DRIVER=y
CONFIG_MAX_RAW_DEVS=256
# CONFIG_TCG_TPM is not set
CONFIG_DEVPORT=y
# CONFIG_I2C is not set
-
-#
-# SPI support
-#
# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
#
# Sonics Silicon Backplane
#
-CONFIG_SSB_POSSIBLE=y
# CONFIG_SSB is not set
#
# Multifunction device drivers
#
+# CONFIG_MFD_CORE is not set
# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_REGULATOR is not set
#
# Multimedia devices
#
+
+#
+# Multimedia core support
+#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
# CONFIG_DAB is not set
#
# Graphics support
#
+CONFIG_AGP=y
+CONFIG_AGP_PARISC=y
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Display device support
#
# CONFIG_DISPLAY_SUPPORT is not set
-# CONFIG_VGASTATE is not set
-# CONFIG_VIDEO_OUTPUT_CONTROL is not set
-# CONFIG_FB is not set
#
# Console display driver support
CONFIG_DUMMY_CONSOLE_COLUMNS=160
CONFIG_DUMMY_CONSOLE_ROWS=64
# CONFIG_STI_CONSOLE is not set
-
-#
-# Sound
-#
# CONFIG_SOUND is not set
CONFIG_HID_SUPPORT=y
CONFIG_HID=y
# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+# CONFIG_HID_PID is not set
+
+#
+# Special HID drivers
+#
+CONFIG_HID_COMPAT=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
CONFIG_USB_ARCH_HAS_EHCI=y
# CONFIG_USB is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+# Enable Host or Gadget support to see Inventra options
#
#
-# USB Gadget Support
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
#
# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_UWB is not set
# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set
-# CONFIG_RTC_CLASS is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
#
-# DMA Engine support
+# RTC interfaces
#
-# CONFIG_DMA_ENGINE is not set
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
#
-# DMA Clients
+# SPI RTC drivers
#
#
-# DMA Devices
-#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
#
-# Userspace I/O
+# on-CPU RTC drivers
#
+CONFIG_RTC_DRV_PARISC=y
+# CONFIG_DMADEVICES is not set
# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
#
# File systems
# CONFIG_EXT2_FS_XIP is not set
CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_XATTR is not set
-# CONFIG_EXT4DEV_FS is not set
+# CONFIG_EXT4_FS is not set
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_DEBUG is not set
# CONFIG_JFS_STATISTICS is not set
CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
CONFIG_XFS_FS=m
# CONFIG_XFS_QUOTA is not set
-# CONFIG_XFS_SECURITY is not set
# CONFIG_XFS_POSIX_ACL is not set
# CONFIG_XFS_RT is not set
+# CONFIG_XFS_DEBUG is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
CONFIG_AUTOFS4_FS=y
# CONFIG_FUSE_FS is not set
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
# CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_ECRYPT_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
CONFIG_UFS_FS=m
# CONFIG_UFS_FS_WRITE is not set
# CONFIG_UFS_DEBUG is not set
-
-#
-# Network File Systems
-#
+CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=m
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
CONFIG_NFS_V4=y
-CONFIG_NFS_DIRECTIO=y
CONFIG_NFSD=m
CONFIG_NFSD_V3=y
# CONFIG_NFSD_V3_ACL is not set
CONFIG_NFSD_V4=y
-CONFIG_NFSD_TCP=y
CONFIG_LOCKD=m
CONFIG_LOCKD_V4=y
CONFIG_EXPORTFS=m
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=m
CONFIG_SUNRPC_GSS=m
-# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_SUNRPC_REGISTER_V4 is not set
CONFIG_RPCSEC_GSS_KRB5=m
CONFIG_RPCSEC_GSS_SPKM3=m
CONFIG_SMB_FS=m
CONFIG_CIFS=m
# CONFIG_CIFS_STATS is not set
# CONFIG_CIFS_WEAK_PW_HASH is not set
+# CONFIG_CIFS_UPCALL is not set
# CONFIG_CIFS_XATTR is not set
# CONFIG_CIFS_DEBUG2 is not set
# CONFIG_CIFS_EXPERIMENTAL is not set
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=m
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
CONFIG_NLS_UTF8=m
-
-#
-# Distributed Lock Manager
-#
# CONFIG_DLM is not set
-#
-# Profiling support
-#
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=m
-
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=2048
CONFIG_MAGIC_SYSRQ=y
# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_DEBUG_FS is not set
+CONFIG_DEBUG_FS=y
CONFIG_HEADERS_CHECK=y
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_SHIRQ is not set
CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
CONFIG_SCHED_DEBUG=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
# CONFIG_DEBUG_LIST is not set
-CONFIG_FORCED_INLINING=y
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_NOP_TRACER=y
+CONFIG_RING_BUFFER=y
+CONFIG_TRACING=y
+
+#
+# Tracers
+#
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_FTRACE_STARTUP_TEST is not set
+# CONFIG_BUILD_DOCSRC is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
# CONFIG_DEBUG_RODATA is not set
#
CONFIG_KEYS=y
CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD=m
+CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_BLKCIPHER=m
+CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_NULL=m
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_AUTHENC=m
+CONFIG_CRYPTO_TEST=m
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=m
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
CONFIG_CRYPTO_HMAC=y
# CONFIG_CRYPTO_XCBC is not set
-CONFIG_CRYPTO_NULL=m
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=m
# CONFIG_CRYPTO_MD4 is not set
CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
CONFIG_CRYPTO_SHA1=m
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
-# CONFIG_CRYPTO_WP512 is not set
# CONFIG_CRYPTO_TGR192 is not set
-# CONFIG_CRYPTO_GF128MUL is not set
-# CONFIG_CRYPTO_ECB is not set
-CONFIG_CRYPTO_CBC=m
-# CONFIG_CRYPTO_PCBC is not set
-# CONFIG_CRYPTO_LRW is not set
-# CONFIG_CRYPTO_XTS is not set
-# CONFIG_CRYPTO_CRYPTD is not set
-CONFIG_CRYPTO_DES=m
-# CONFIG_CRYPTO_FCRYPT is not set
-CONFIG_CRYPTO_BLOWFISH=m
-# CONFIG_CRYPTO_TWOFISH is not set
-# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_BLOWFISH=m
+# CONFIG_CRYPTO_CAMELLIA is not set
CONFIG_CRYPTO_CAST5=m
# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_TEA is not set
-# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_DES=m
+# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_KHAZAD is not set
-# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_SALSA20 is not set
# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
CONFIG_CRYPTO_DEFLATE=m
-# CONFIG_CRYPTO_MICHAEL_MIC is not set
-CONFIG_CRYPTO_CRC32C=m
-# CONFIG_CRYPTO_CAMELLIA is not set
-CONFIG_CRYPTO_TEST=m
-# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_HW is not set
#
# Library routines
#
CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_CRC_CCITT=m
# CONFIG_CRC16 is not set
-# CONFIG_CRC_ITU_T is not set
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=m
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
CONFIG_LIBCRC32C=m
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.23
-# Fri Oct 12 21:16:46 2007
+# Linux kernel version: 2.6.29-rc8
+# Fri Mar 13 01:32:57 2009
#
CONFIG_PARISC=y
CONFIG_MMU=y
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
+# CONFIG_CGROUPS is not set
CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
# CONFIG_EMBEDDED is not set
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
+CONFIG_AIO=y
CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_PCI_QUIRKS=y
+CONFIG_COMPAT_BRK=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
# CONFIG_MODULE_UNLOAD is not set
CONFIG_MODVERSIONS=y
# CONFIG_MODULE_SRCVERSION_ALL is not set
-# CONFIG_KMOD is not set
+CONFIG_INIT_ALL_POSSIBLE=y
CONFIG_BLOCK=y
# CONFIG_LBD is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
#
# IO Schedulers
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_FREEZER is not set
#
# Processor type and features
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4096
-# CONFIG_RESOURCES_64BIT is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_ZONE_DMA_FLAG=0
CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
# CONFIG_HPUX is not set
#
CONFIG_ISA=y
CONFIG_PCI=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_PCI_LEGACY=y
# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_STUB is not set
CONFIG_GSC_DINO=y
# CONFIG_PCI_LBA is not set
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
+CONFIG_IOMMU_HELPER=y
# CONFIG_PCCARD is not set
+# CONFIG_HOTPLUG_PCI is not set
#
# PA-RISC specific drivers
# Executable file formats
#
CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
# CONFIG_BINFMT_MISC is not set
-
-#
-# Networking
-#
CONFIG_NET=y
#
# Networking options
#
+CONFIG_COMPAT_NET_DEV_OPS=y
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_UNIX=y
CONFIG_INET6_XFRM_MODE_TUNNEL=y
CONFIG_INET6_XFRM_MODE_BEET=y
CONFIG_IPV6_SIT=y
+CONFIG_IPV6_NDISC_NODETYPE=y
# CONFIG_IPV6_TUNNEL is not set
# CONFIG_NETLABEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
+# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
-
-#
-# QoS and/or fair queueing
-#
# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
-
-#
-# Wireless
-#
+# CONFIG_PHONET is not set
+CONFIG_WIRELESS=y
# CONFIG_CFG80211 is not set
+CONFIG_WIRELESS_OLD_REGULATORY=y
# CONFIG_WIRELESS_EXT is not set
-# CONFIG_IEEE80211 is not set
+# CONFIG_LIB80211 is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_WIMAX is not set
# CONFIG_RFKILL is not set
#
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_STANDALONE=y
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-# CONFIG_FW_LOADER is not set
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
CONFIG_CDROM_PKTCDVD=m
CONFIG_CDROM_PKTCDVD_BUFFERS=8
CONFIG_ATA_OVER_ETH=y
+# CONFIG_BLK_DEV_HD is not set
CONFIG_MISC_DEVICES=y
# CONFIG_PHANTOM is not set
-# CONFIG_EEPROM_93CX6 is not set
# CONFIG_SGI_IOC4 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_HP_ILO is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set
#
# CONFIG_SCSI_FC_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set
# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
CONFIG_SCSI_LOWLEVEL=y
# CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_CXGB3_ISCSI is not set
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_3W_9XXX is not set
# CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AIC79XX is not set
# CONFIG_SCSI_AIC94XX is not set
# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_IN2000 is not set
# CONFIG_SCSI_ARCMSR is not set
# CONFIG_MEGARAID_NEWGEN is not set
# CONFIG_MEGARAID_LEGACY is not set
# CONFIG_MEGARAID_SAS is not set
# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_FCOE is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_DTC3280 is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_PPA is not set
# CONFIG_SCSI_IMM is not set
+# CONFIG_SCSI_MVSAS is not set
# CONFIG_SCSI_NCR53C406A is not set
CONFIG_SCSI_LASI700=y
CONFIG_53C700_LE_ON_BE=y
CONFIG_SCSI_NCR53C8XX_MAX_TAGS=32
CONFIG_SCSI_NCR53C8XX_SYNC=40
# CONFIG_SCSI_PAS16 is not set
-# CONFIG_SCSI_PSI240I is not set
# CONFIG_SCSI_QLOGIC_FAS is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
# CONFIG_SCSI_QLA_FC is not set
# CONFIG_SCSI_NSP32 is not set
# CONFIG_SCSI_DEBUG is not set
# CONFIG_SCSI_SRP is not set
+# CONFIG_SCSI_DH is not set
# CONFIG_ATA is not set
CONFIG_MD=y
CONFIG_BLK_DEV_MD=y
+CONFIG_MD_AUTODETECT=y
CONFIG_MD_LINEAR=y
CONFIG_MD_RAID0=y
CONFIG_MD_RAID1=y
# CONFIG_MD_MULTIPATH is not set
# CONFIG_MD_FAULTY is not set
# CONFIG_BLK_DEV_DM is not set
-
-#
-# Fusion MPT device support
-#
# CONFIG_FUSION is not set
-# CONFIG_FUSION_SPI is not set
-# CONFIG_FUSION_FC is not set
-# CONFIG_FUSION_SAS is not set
#
# IEEE 1394 (FireWire) support
#
#
-# An alternative FireWire stack is available with EXPERIMENTAL=y
+# A new alternative FireWire stack is available with EXPERIMENTAL=y
#
# CONFIG_IEEE1394 is not set
# CONFIG_I2O is not set
CONFIG_NETDEVICES=y
-# CONFIG_NETDEVICES_MULTIQUEUE is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
# CONFIG_NET_PCI is not set
# CONFIG_B44 is not set
+# CONFIG_CS89x0 is not set
# CONFIG_NET_POCKET is not set
+# CONFIG_ATL2 is not set
CONFIG_NETDEV_1000=y
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_E1000 is not set
# CONFIG_E1000E is not set
+# CONFIG_IGB is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_R8169 is not set
# CONFIG_SIS190 is not set
# CONFIG_SKGE is not set
# CONFIG_SKY2 is not set
-# CONFIG_SK98LIN is not set
# CONFIG_VIA_VELOCITY is not set
# CONFIG_TIGON3 is not set
# CONFIG_BNX2 is not set
# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+# CONFIG_JME is not set
CONFIG_NETDEV_10000=y
# CONFIG_CHELSIO_T1 is not set
+CONFIG_CHELSIO_T3_DEPENDS=y
# CONFIG_CHELSIO_T3 is not set
+# CONFIG_ENIC is not set
# CONFIG_IXGBE is not set
# CONFIG_IXGB is not set
# CONFIG_S2IO is not set
# CONFIG_MYRI10GE is not set
# CONFIG_NETXEN_NIC is not set
# CONFIG_NIU is not set
+# CONFIG_MLX4_EN is not set
# CONFIG_MLX4_CORE is not set
# CONFIG_TEHUTI is not set
+# CONFIG_BNX2X is not set
+# CONFIG_QLGE is not set
+# CONFIG_SFC is not set
# CONFIG_TR is not set
#
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
# CONFIG_WAN is not set
# CONFIG_FDDI is not set
# CONFIG_PLIP is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_EVBUG is not set
CONFIG_MOUSE_PS2_ALPS=y
CONFIG_MOUSE_PS2_LOGIPS2PP=y
CONFIG_MOUSE_PS2_SYNAPTICS=y
-CONFIG_MOUSE_PS2_LIFEBOOK=y
CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_ELANTECH is not set
# CONFIG_MOUSE_PS2_TOUCHKIT is not set
# CONFIG_MOUSE_SERIAL is not set
# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_BCM5974 is not set
# CONFIG_MOUSE_INPORT is not set
# CONFIG_MOUSE_LOGIBM is not set
# CONFIG_MOUSE_PC110PAD is not set
# Character devices
#
CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_JSM is not set
CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
CONFIG_PRINTER=y
# CONFIG_LP_CONSOLE is not set
# CONFIG_PPDEV is not set
-# CONFIG_TIPAR is not set
# CONFIG_IPMI_HANDLER is not set
-# CONFIG_WATCHDOG is not set
# CONFIG_HW_RANDOM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
CONFIG_DEVPORT=y
# CONFIG_I2C is not set
-
-#
-# SPI support
-#
# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
#
# Sonics Silicon Backplane
#
-CONFIG_SSB_POSSIBLE=y
# CONFIG_SSB is not set
#
# Multifunction device drivers
#
+# CONFIG_MFD_CORE is not set
# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_REGULATOR is not set
#
# Multimedia devices
#
+
+#
+# Multimedia core support
+#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
-# CONFIG_DAB is not set
+# CONFIG_VIDEO_MEDIA is not set
#
-# Graphics support
+# Multimedia drivers
#
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+# CONFIG_DAB is not set
#
-# Display device support
+# Graphics support
#
-# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
# CONFIG_VGASTATE is not set
CONFIG_VIDEO_OUTPUT_CONTROL=m
CONFIG_FB=y
# CONFIG_FIRMWARE_EDID is not set
# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
# CONFIG_FB_SYS_FILLRECT is not set
# CONFIG_FB_SYS_COPYAREA is not set
# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
# CONFIG_FB_SYS_FOPS is not set
-CONFIG_FB_DEFERRED_IO=y
# CONFIG_FB_SVGALIB is not set
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_BACKLIGHT is not set
# CONFIG_FB_ATY is not set
# CONFIG_FB_S3 is not set
# CONFIG_FB_SIS is not set
+# CONFIG_FB_VIA is not set
# CONFIG_FB_NEOMAGIC is not set
# CONFIG_FB_KYRO is not set
# CONFIG_FB_3DFX is not set
# CONFIG_FB_VT8623 is not set
# CONFIG_FB_TRIDENT is not set
# CONFIG_FB_ARK is not set
+# CONFIG_FB_CARMINE is not set
# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
#
# Console display driver support
CONFIG_LOGO_LINUX_VGA16=y
CONFIG_LOGO_LINUX_CLUT224=y
CONFIG_LOGO_PARISC_CLUT224=y
-
-#
-# Sound
-#
CONFIG_SOUND=y
-
-#
-# Advanced Linux Sound Architecture
-#
+CONFIG_SOUND_OSS_CORE=y
CONFIG_SND=y
CONFIG_SND_TIMER=y
CONFIG_SND_PCM=y
CONFIG_SND_VERBOSE_PROCFS=y
# CONFIG_SND_VERBOSE_PRINTK is not set
# CONFIG_SND_DEBUG is not set
-
-#
-# Generic devices
-#
+CONFIG_SND_DRIVERS=y
# CONFIG_SND_DUMMY is not set
# CONFIG_SND_VIRMIDI is not set
# CONFIG_SND_MTPAV is not set
# CONFIG_SND_SERIAL_U16550 is not set
# CONFIG_SND_MPU401 is not set
# CONFIG_SND_PORTMAN2X4 is not set
-
-#
-# PCI devices
-#
+CONFIG_SND_PCI=y
# CONFIG_SND_AD1889 is not set
# CONFIG_SND_ALS300 is not set
# CONFIG_SND_ALI5451 is not set
# CONFIG_SND_AU8810 is not set
# CONFIG_SND_AU8820 is not set
# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AW2 is not set
# CONFIG_SND_BT87X is not set
# CONFIG_SND_CA0106 is not set
# CONFIG_SND_CMIPCI is not set
+# CONFIG_SND_OXYGEN is not set
# CONFIG_SND_CS4281 is not set
# CONFIG_SND_CS46XX is not set
# CONFIG_SND_DARLA20 is not set
# CONFIG_SND_HDA_INTEL is not set
# CONFIG_SND_HDSP is not set
# CONFIG_SND_HDSPM is not set
+# CONFIG_SND_HIFIER is not set
# CONFIG_SND_ICE1712 is not set
# CONFIG_SND_ICE1724 is not set
# CONFIG_SND_INTEL8X0 is not set
# CONFIG_SND_TRIDENT is not set
# CONFIG_SND_VIA82XX is not set
# CONFIG_SND_VIA82XX_MODEM is not set
+# CONFIG_SND_VIRTUOSO is not set
# CONFIG_SND_VX222 is not set
# CONFIG_SND_YMFPCI is not set
-
-#
-# GSC devices
-#
+CONFIG_SND_GSC=y
CONFIG_SND_HARMONY=y
-
-#
-# System on Chip audio support
-#
# CONFIG_SND_SOC is not set
-
-#
-# SoC Audio support for SuperH
-#
-
-#
-# Open Sound System
-#
# CONFIG_SOUND_PRIME is not set
CONFIG_HID_SUPPORT=y
CONFIG_HID=y
CONFIG_HID_DEBUG=y
+# CONFIG_HIDRAW is not set
+# CONFIG_HID_PID is not set
+
+#
+# Special HID drivers
+#
+CONFIG_HID_COMPAT=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
# CONFIG_USB is not set
#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+# Enable Host or Gadget support to see Inventra options
#
#
-# USB Gadget Support
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
#
# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set
-# CONFIG_RTC_CLASS is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
#
-# DMA Engine support
+# RTC interfaces
#
-# CONFIG_DMA_ENGINE is not set
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
#
-# DMA Clients
+# SPI RTC drivers
#
#
-# DMA Devices
-#
-# CONFIG_AUXDISPLAY is not set
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
#
-# Userspace I/O
+# on-CPU RTC drivers
#
+CONFIG_RTC_DRV_PARISC=y
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
#
# File systems
# CONFIG_EXT2_FS_XIP is not set
CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_XATTR is not set
+# CONFIG_EXT4_FS is not set
CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
# CONFIG_XFS_FS is not set
# CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
+CONFIG_DNOTIFY=y
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
CONFIG_AUTOFS4_FS=y
# CONFIG_FUSE_FS is not set
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
# CONFIG_HFSPLUS_FS is not set
# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
+CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
-# CONFIG_NFS_DIRECTIO is not set
+CONFIG_ROOT_NFS=y
CONFIG_NFSD=y
CONFIG_NFSD_V3=y
# CONFIG_NFSD_V3_ACL is not set
-CONFIG_NFSD_TCP=y
-CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_EXPORTFS=y
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=m
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
CONFIG_MAGIC_SYSRQ=y
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_SHIRQ is not set
CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
CONFIG_SCHED_DEBUG=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
# CONFIG_DEBUG_LIST is not set
-CONFIG_FORCED_INLINING=y
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+
+#
+# Tracers
+#
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_BUILD_DOCSRC is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
# CONFIG_DEBUG_RODATA is not set
#
#
# CONFIG_KEYS is not set
CONFIG_SECURITY=y
+# CONFIG_SECURITYFS is not set
# CONFIG_SECURITY_NETWORK is not set
-CONFIG_SECURITY_CAPABILITIES=y
+# CONFIG_SECURITY_PATH is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_MANAGER=y
-# CONFIG_CRYPTO_HMAC is not set
+CONFIG_CRYPTO_MANAGER2=y
# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_PCBC is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_MD4 is not set
# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
-# CONFIG_CRYPTO_WP512 is not set
# CONFIG_CRYPTO_TGR192 is not set
-# CONFIG_CRYPTO_ECB is not set
-CONFIG_CRYPTO_CBC=y
-# CONFIG_CRYPTO_PCBC is not set
-# CONFIG_CRYPTO_CRYPTD is not set
-# CONFIG_CRYPTO_DES is not set
-# CONFIG_CRYPTO_FCRYPT is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-# CONFIG_CRYPTO_TWOFISH is not set
-# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_TEA is not set
-# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_KHAZAD is not set
-# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
# CONFIG_CRYPTO_DEFLATE is not set
-# CONFIG_CRYPTO_MICHAEL_MIC is not set
-# CONFIG_CRYPTO_CRC32C is not set
-# CONFIG_CRYPTO_CAMELLIA is not set
-# CONFIG_CRYPTO_TEST is not set
-# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
#
# Library routines
#
CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.23
-# Fri Oct 12 21:24:00 2007
+# Linux kernel version: 2.6.29-rc8
+# Fri Mar 13 01:32:58 2009
#
CONFIG_PARISC=y
CONFIG_MMU=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
-# CONFIG_USER_NS is not set
# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
CONFIG_EMBEDDED=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
+CONFIG_AIO=y
CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_PCI_QUIRKS=y
+CONFIG_COMPAT_BRK=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+CONFIG_TRACEPOINTS=y
+# CONFIG_MARKERS is not set
+CONFIG_OPROFILE=m
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
+CONFIG_INIT_ALL_POSSIBLE=y
CONFIG_BLOCK=y
# CONFIG_LBD is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
#
# IO Schedulers
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
+# CONFIG_FREEZER is not set
#
# Processor type and features
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_ZONE_DMA_FLAG=0
CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
# CONFIG_HPUX is not set
#
# CONFIG_GSC is not set
CONFIG_PCI=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_PCI_LEGACY=y
# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_STUB is not set
CONFIG_PCI_LBA=y
CONFIG_IOSAPIC=y
CONFIG_IOMMU_SBA=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
+CONFIG_IOMMU_HELPER=y
# CONFIG_PCCARD is not set
# CONFIG_HOTPLUG_PCI is not set
# Executable file formats
#
CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
# CONFIG_BINFMT_MISC is not set
-
-#
-# Networking
-#
CONFIG_NET=y
#
# Networking options
#
+CONFIG_COMPAT_NET_DEV_OPS=y
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=m
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+CONFIG_XFRM_IPCOMP=m
CONFIG_NET_KEY=m
# CONFIG_NET_KEY_MIGRATE is not set
CONFIG_INET=y
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
-# CONFIG_IP_VS is not set
CONFIG_IPV6=m
# CONFIG_IPV6_PRIVACY is not set
# CONFIG_IPV6_ROUTER_PREF is not set
CONFIG_INET6_XFRM_MODE_BEET=m
# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
CONFIG_IPV6_SIT=m
+CONFIG_IPV6_NDISC_NODETYPE=y
CONFIG_IPV6_TUNNEL=m
# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
# CONFIG_NETWORK_SECMARK is not set
CONFIG_NETFILTER=y
CONFIG_NETFILTER_DEBUG=y
+CONFIG_NETFILTER_ADVANCED=y
#
# Core Netfilter Configuration
#
-# CONFIG_NETFILTER_NETLINK is not set
-# CONFIG_NF_CONNTRACK_ENABLED is not set
+# CONFIG_NETFILTER_NETLINK_QUEUE is not set
+# CONFIG_NETFILTER_NETLINK_LOG is not set
# CONFIG_NF_CONNTRACK is not set
# CONFIG_NETFILTER_XTABLES is not set
+# CONFIG_IP_VS is not set
#
# IP: Netfilter Configuration
#
+# CONFIG_NF_DEFRAG_IPV4 is not set
CONFIG_IP_NF_QUEUE=m
# CONFIG_IP_NF_IPTABLES is not set
# CONFIG_IP_NF_ARPTABLES is not set
#
-# IPv6: Netfilter Configuration (EXPERIMENTAL)
+# IPv6: Netfilter Configuration
#
# CONFIG_IP6_NF_QUEUE is not set
# CONFIG_IP6_NF_IPTABLES is not set
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
#
# Network testing
#
CONFIG_NET_PKTGEN=m
# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
-
-#
-# Wireless
-#
+# CONFIG_PHONET is not set
+CONFIG_WIRELESS=y
# CONFIG_CFG80211 is not set
+CONFIG_WIRELESS_OLD_REGULATORY=y
# CONFIG_WIRELESS_EXT is not set
+# CONFIG_LIB80211 is not set
# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
+# CONFIG_WIMAX is not set
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set
# CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
CONFIG_MISC_DEVICES=y
# CONFIG_PHANTOM is not set
-# CONFIG_EEPROM_93CX6 is not set
# CONFIG_SGI_IOC4 is not set
# CONFIG_TIFM_CORE is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_HP_ILO is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
CONFIG_IDE=y
-CONFIG_IDE_MAX_HWIFS=4
-CONFIG_BLK_DEV_IDE=y
#
-# Please see Documentation/ide.txt for help/info on IDE drives
+# Please see Documentation/ide/ide.txt for help/info on IDE drives
#
+CONFIG_IDE_ATAPI=y
# CONFIG_BLK_DEV_IDE_SATA is not set
-CONFIG_BLK_DEV_IDEDISK=m
-# CONFIG_IDEDISK_MULTI_MODE is not set
+CONFIG_IDE_GD=y
+CONFIG_IDE_GD_ATA=y
+# CONFIG_IDE_GD_ATAPI is not set
CONFIG_BLK_DEV_IDECD=y
+CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-CONFIG_BLK_DEV_IDESCSI=y
# CONFIG_IDE_TASK_IOCTL is not set
CONFIG_IDE_PROC_FS=y
#
# IDE chipset support/bugfixes
#
-CONFIG_IDE_GENERIC=y
# CONFIG_BLK_DEV_PLATFORM is not set
+CONFIG_BLK_DEV_IDEDMA_SFF=y
#
# PCI IDE chipsets support
#
CONFIG_BLK_DEV_IDEPCI=y
-CONFIG_IDEPCI_SHARE_IRQ=y
CONFIG_IDEPCI_PCIBUS_ORDER=y
-# CONFIG_BLK_DEV_OFFBOARD is not set
# CONFIG_BLK_DEV_GENERIC is not set
# CONFIG_BLK_DEV_OPTI621 is not set
CONFIG_BLK_DEV_IDEDMA_PCI=y
-# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
-CONFIG_IDEDMA_ONLYDISK=y
# CONFIG_BLK_DEV_AEC62XX is not set
# CONFIG_BLK_DEV_ALI15X3 is not set
# CONFIG_BLK_DEV_AMD74XX is not set
# CONFIG_BLK_DEV_CMD64X is not set
# CONFIG_BLK_DEV_TRIFLEX is not set
-# CONFIG_BLK_DEV_CY82C693 is not set
# CONFIG_BLK_DEV_CS5520 is not set
# CONFIG_BLK_DEV_CS5530 is not set
-# CONFIG_BLK_DEV_HPT34X is not set
# CONFIG_BLK_DEV_HPT366 is not set
# CONFIG_BLK_DEV_JMICRON is not set
# CONFIG_BLK_DEV_SC1200 is not set
# CONFIG_BLK_DEV_PIIX is not set
+# CONFIG_BLK_DEV_IT8172 is not set
# CONFIG_BLK_DEV_IT8213 is not set
# CONFIG_BLK_DEV_IT821X is not set
CONFIG_BLK_DEV_NS87415=y
# CONFIG_BLK_DEV_TRM290 is not set
# CONFIG_BLK_DEV_VIA82CXXX is not set
# CONFIG_BLK_DEV_TC86C001 is not set
-# CONFIG_IDE_ARM is not set
CONFIG_BLK_DEV_IDEDMA=y
-# CONFIG_IDEDMA_IVB is not set
-# CONFIG_BLK_DEV_HD is not set
#
# SCSI device support
# CONFIG_SCSI_FC_ATTRS is not set
CONFIG_SCSI_ISCSI_ATTRS=m
# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
CONFIG_SCSI_LOWLEVEL=y
# CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_CXGB3_ISCSI is not set
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_3W_9XXX is not set
# CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AIC79XX is not set
# CONFIG_SCSI_AIC94XX is not set
# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_ARCMSR is not set
# CONFIG_MEGARAID_NEWGEN is not set
# CONFIG_MEGARAID_LEGACY is not set
# CONFIG_MEGARAID_SAS is not set
# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_FCOE is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
# CONFIG_SCSI_IPS is not set
# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_MVSAS is not set
# CONFIG_SCSI_STEX is not set
CONFIG_SCSI_SYM53C8XX_2=y
CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
# CONFIG_SCSI_NSP32 is not set
CONFIG_SCSI_DEBUG=m
# CONFIG_SCSI_SRP is not set
+# CONFIG_SCSI_DH is not set
# CONFIG_ATA is not set
CONFIG_MD=y
CONFIG_BLK_DEV_MD=y
+CONFIG_MD_AUTODETECT=y
CONFIG_MD_LINEAR=y
CONFIG_MD_RAID0=y
CONFIG_MD_RAID1=y
CONFIG_DM_MIRROR=m
CONFIG_DM_ZERO=m
CONFIG_DM_MULTIPATH=m
-# CONFIG_DM_MULTIPATH_EMC is not set
-# CONFIG_DM_MULTIPATH_RDAC is not set
# CONFIG_DM_DELAY is not set
-
-#
-# Fusion MPT device support
-#
+# CONFIG_DM_UEVENT is not set
CONFIG_FUSION=y
CONFIG_FUSION_SPI=m
# CONFIG_FUSION_FC is not set
#
# IEEE 1394 (FireWire) support
#
+
+#
+# Enable only one of the two stacks, unless you know what you are doing
+#
# CONFIG_FIREWIRE is not set
# CONFIG_IEEE1394 is not set
# CONFIG_I2O is not set
CONFIG_NETDEVICES=y
-# CONFIG_NETDEVICES_MULTIQUEUE is not set
CONFIG_DUMMY=m
CONFIG_BONDING=m
# CONFIG_MACVLAN is not set
# CONFIG_EQUALIZER is not set
CONFIG_TUN=m
# CONFIG_VETH is not set
-# CONFIG_IP1000 is not set
# CONFIG_ARCNET is not set
-# CONFIG_PHYLIB is not set
+CONFIG_PHYLIB=m
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
CONFIG_NET_ETHERNET=y
CONFIG_MII=m
# CONFIG_HAPPYMEAL is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
CONFIG_NET_PCI=y
# CONFIG_PCNET32 is not set
# CONFIG_AMD8111_ETH is not set
# CONFIG_ADAPTEC_STARFIRE is not set
# CONFIG_B44 is not set
# CONFIG_FORCEDETH is not set
-# CONFIG_EEPRO100 is not set
CONFIG_E100=m
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_8139CP is not set
# CONFIG_8139TOO is not set
+# CONFIG_R6040 is not set
# CONFIG_SIS900 is not set
# CONFIG_EPIC100 is not set
+# CONFIG_SMSC9420 is not set
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
# CONFIG_SC92031 is not set
+# CONFIG_ATL2 is not set
CONFIG_NETDEV_1000=y
CONFIG_ACENIC=m
# CONFIG_ACENIC_OMIT_TIGON_I is not set
# CONFIG_DL2K is not set
CONFIG_E1000=m
-# CONFIG_E1000_NAPI is not set
-# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
# CONFIG_E1000E is not set
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SIS190 is not set
# CONFIG_SKGE is not set
# CONFIG_SKY2 is not set
-# CONFIG_SK98LIN is not set
# CONFIG_VIA_VELOCITY is not set
CONFIG_TIGON3=m
# CONFIG_BNX2 is not set
# CONFIG_QLA3XXX is not set
# CONFIG_ATL1 is not set
+# CONFIG_ATL1E is not set
+# CONFIG_ATL1C is not set
+# CONFIG_JME is not set
CONFIG_NETDEV_10000=y
# CONFIG_CHELSIO_T1 is not set
+CONFIG_CHELSIO_T3_DEPENDS=y
# CONFIG_CHELSIO_T3 is not set
+# CONFIG_ENIC is not set
# CONFIG_IXGBE is not set
# CONFIG_IXGB is not set
# CONFIG_S2IO is not set
# CONFIG_MYRI10GE is not set
# CONFIG_NETXEN_NIC is not set
# CONFIG_NIU is not set
+# CONFIG_MLX4_EN is not set
# CONFIG_MLX4_CORE is not set
# CONFIG_TEHUTI is not set
+# CONFIG_BNX2X is not set
+# CONFIG_QLGE is not set
+# CONFIG_SFC is not set
# CONFIG_TR is not set
#
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
#
# USB Network Adapters
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_RTL8150 is not set
-# CONFIG_USB_USBNET_MII is not set
# CONFIG_USB_USBNET is not set
# CONFIG_WAN is not set
# CONFIG_FDDI is not set
# CONFIG_SLIP is not set
CONFIG_SLHC=m
# CONFIG_NET_FC is not set
-# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1600
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=1200
# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
# CONFIG_MOUSE_PS2 is not set
# CONFIG_MOUSE_SERIAL is not set
# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_BCM5974 is not set
# CONFIG_MOUSE_VSXXXAA is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
# Character devices
#
CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
#
# Serial drivers
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_JSM is not set
CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_IPMI_HANDLER is not set
-# CONFIG_WATCHDOG is not set
# CONFIG_HW_RANDOM is not set
-CONFIG_GEN_RTC=y
-CONFIG_GEN_RTC_X=y
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
CONFIG_RAW_DRIVER=y
CONFIG_MAX_RAW_DEVS=256
# CONFIG_TCG_TPM is not set
CONFIG_DEVPORT=y
# CONFIG_I2C is not set
-
-#
-# SPI support
-#
# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
#
# Sonics Silicon Backplane
#
-CONFIG_SSB_POSSIBLE=y
# CONFIG_SSB is not set
#
# Multifunction device drivers
#
+# CONFIG_MFD_CORE is not set
# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_REGULATOR is not set
#
# Multimedia devices
#
+
+#
+# Multimedia core support
+#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
-# CONFIG_DAB is not set
+# CONFIG_VIDEO_MEDIA is not set
#
-# Graphics support
+# Multimedia drivers
#
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+# CONFIG_DAB is not set
#
-# Display device support
+# Graphics support
#
-# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
# CONFIG_VGASTATE is not set
CONFIG_VIDEO_OUTPUT_CONTROL=m
CONFIG_FB=y
# CONFIG_FIRMWARE_EDID is not set
# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
# CONFIG_FB_SYS_FILLRECT is not set
# CONFIG_FB_SYS_COPYAREA is not set
# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
# CONFIG_FB_SYS_FOPS is not set
-CONFIG_FB_DEFERRED_IO=y
# CONFIG_FB_SVGALIB is not set
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_BACKLIGHT is not set
# CONFIG_FB_S3 is not set
# CONFIG_FB_SAVAGE is not set
# CONFIG_FB_SIS is not set
+# CONFIG_FB_VIA is not set
# CONFIG_FB_NEOMAGIC is not set
# CONFIG_FB_KYRO is not set
# CONFIG_FB_3DFX is not set
# CONFIG_FB_TRIDENT is not set
# CONFIG_FB_ARK is not set
# CONFIG_FB_PM3 is not set
+# CONFIG_FB_CARMINE is not set
# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
#
# Console display driver support
# CONFIG_LOGO_LINUX_VGA16 is not set
# CONFIG_LOGO_LINUX_CLUT224 is not set
CONFIG_LOGO_PARISC_CLUT224=y
-
-#
-# Sound
-#
CONFIG_SOUND=y
-
-#
-# Advanced Linux Sound Architecture
-#
+CONFIG_SOUND_OSS_CORE=y
CONFIG_SND=y
CONFIG_SND_TIMER=y
CONFIG_SND_PCM=y
CONFIG_SND_VERBOSE_PROCFS=y
# CONFIG_SND_VERBOSE_PRINTK is not set
# CONFIG_SND_DEBUG is not set
-
-#
-# Generic devices
-#
+CONFIG_SND_VMASTER=y
CONFIG_SND_AC97_CODEC=y
+CONFIG_SND_DRIVERS=y
# CONFIG_SND_DUMMY is not set
# CONFIG_SND_VIRMIDI is not set
# CONFIG_SND_MTPAV is not set
# CONFIG_SND_SERIAL_U16550 is not set
# CONFIG_SND_MPU401 is not set
-
-#
-# PCI devices
-#
+# CONFIG_SND_AC97_POWER_SAVE is not set
+CONFIG_SND_PCI=y
CONFIG_SND_AD1889=y
# CONFIG_SND_ALS300 is not set
# CONFIG_SND_ALI5451 is not set
# CONFIG_SND_AU8810 is not set
# CONFIG_SND_AU8820 is not set
# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AW2 is not set
# CONFIG_SND_AZT3328 is not set
# CONFIG_SND_BT87X is not set
# CONFIG_SND_CA0106 is not set
# CONFIG_SND_CMIPCI is not set
+# CONFIG_SND_OXYGEN is not set
# CONFIG_SND_CS4281 is not set
# CONFIG_SND_CS46XX is not set
# CONFIG_SND_DARLA20 is not set
# CONFIG_SND_HDA_INTEL is not set
# CONFIG_SND_HDSP is not set
# CONFIG_SND_HDSPM is not set
+# CONFIG_SND_HIFIER is not set
# CONFIG_SND_ICE1712 is not set
# CONFIG_SND_ICE1724 is not set
# CONFIG_SND_INTEL8X0 is not set
# CONFIG_SND_TRIDENT is not set
# CONFIG_SND_VIA82XX is not set
# CONFIG_SND_VIA82XX_MODEM is not set
+# CONFIG_SND_VIRTUOSO is not set
# CONFIG_SND_VX222 is not set
# CONFIG_SND_YMFPCI is not set
-# CONFIG_SND_AC97_POWER_SAVE is not set
-
-#
-# USB devices
-#
+CONFIG_SND_USB=y
# CONFIG_SND_USB_AUDIO is not set
# CONFIG_SND_USB_CAIAQ is not set
-
-#
-# System on Chip audio support
-#
# CONFIG_SND_SOC is not set
-
-#
-# SoC Audio support for SuperH
-#
-
-#
-# Open Sound System
-#
# CONFIG_SOUND_PRIME is not set
CONFIG_AC97_BUS=y
CONFIG_HID_SUPPORT=y
CONFIG_HID=y
# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
#
# USB Input Devices
#
CONFIG_USB_HID=y
-# CONFIG_USB_HIDINPUT_POWERBOOK is not set
-# CONFIG_HID_FF is not set
+# CONFIG_HID_PID is not set
CONFIG_USB_HIDDEV=y
+
+#
+# Special HID drivers
+#
+CONFIG_HID_COMPAT=y
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_GREENASIA_FF is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_THRUSTMASTER_FF is not set
+# CONFIG_ZEROPLUS_FF is not set
CONFIG_USB_SUPPORT=y
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
CONFIG_USB_ARCH_HAS_EHCI=y
CONFIG_USB=y
CONFIG_USB_DEBUG=y
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
#
# Miscellaneous USB options
CONFIG_USB_DEVICE_CLASS=y
# CONFIG_USB_DYNAMIC_MINORS is not set
# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
#
# USB Host Controller Drivers
#
+# CONFIG_USB_C67X00_HCD is not set
# CONFIG_USB_EHCI_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
CONFIG_USB_OHCI_HCD=y
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
# CONFIG_USB_UHCI_HCD is not set
# CONFIG_USB_SL811_HCD is not set
# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_WHCI_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
#
# USB Device Class drivers
#
# CONFIG_USB_ACM is not set
CONFIG_USB_PRINTER=m
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
#
#
-# may also be needed; see USB_STORAGE Help for more information
+# see USB_STORAGE Help for more information
#
CONFIG_USB_STORAGE=m
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
-CONFIG_USB_STORAGE_DPCM=y
CONFIG_USB_STORAGE_USBAT=y
CONFIG_USB_STORAGE_SDDR09=y
CONFIG_USB_STORAGE_SDDR55=y
CONFIG_USB_STORAGE_JUMPSHOT=y
# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
# CONFIG_USB_LIBUSUAL is not set
#
#
CONFIG_USB_MDC800=m
CONFIG_USB_MICROTEK=m
-# CONFIG_USB_MON is not set
#
# USB port drivers
#
-
-#
-# USB Serial Converter support
-#
# CONFIG_USB_SERIAL is not set
#
# CONFIG_USB_EMI62 is not set
# CONFIG_USB_EMI26 is not set
# CONFIG_USB_ADUTUX is not set
-# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_SEVSEG is not set
# CONFIG_USB_RIO500 is not set
CONFIG_USB_LEGOTOWER=m
# CONFIG_USB_LCD is not set
# CONFIG_USB_TRANCEVIBRATOR is not set
# CONFIG_USB_IOWARRIOR is not set
# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
#
-# USB DSL modem support
-#
-
-#
-# USB Gadget Support
+# OTG and related infrastructure
#
-# CONFIG_USB_GADGET is not set
+# CONFIG_UWB is not set
# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set
-# CONFIG_RTC_CLASS is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
#
-# DMA Engine support
+# RTC interfaces
#
-# CONFIG_DMA_ENGINE is not set
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
#
-# DMA Clients
+# SPI RTC drivers
#
#
-# DMA Devices
+# Platform RTC drivers
#
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
#
-# Userspace I/O
+# on-CPU RTC drivers
#
+CONFIG_RTC_DRV_PARISC=y
+# CONFIG_DMADEVICES is not set
# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
#
# File systems
# CONFIG_EXT2_FS_XIP is not set
CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_XATTR is not set
-# CONFIG_EXT4DEV_FS is not set
+# CONFIG_EXT4_FS is not set
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
CONFIG_XFS_FS=m
# CONFIG_XFS_QUOTA is not set
-# CONFIG_XFS_SECURITY is not set
# CONFIG_XFS_POSIX_ACL is not set
# CONFIG_XFS_RT is not set
-# CONFIG_GFS2_FS is not set
+# CONFIG_XFS_DEBUG is not set
# CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
CONFIG_AUTOFS4_FS=y
# CONFIG_FUSE_FS is not set
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
# CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
+CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
+CONFIG_ROOT_NFS=y
CONFIG_NFSD=y
CONFIG_NFSD_V3=y
# CONFIG_NFSD_V3_ACL is not set
# CONFIG_NFSD_V4 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_EXPORTFS=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_SUNRPC_REGISTER_V4 is not set
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=m
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
CONFIG_NLS_UTF8=m
-
-#
-# Distributed Lock Manager
-#
# CONFIG_DLM is not set
-#
-# Profiling support
-#
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=m
-
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
CONFIG_MAGIC_SYSRQ=y
# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_DEBUG_FS is not set
+CONFIG_DEBUG_FS=y
CONFIG_HEADERS_CHECK=y
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_SHIRQ is not set
CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
CONFIG_SCHED_DEBUG=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
# CONFIG_DEBUG_LIST is not set
-CONFIG_FORCED_INLINING=y
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_NOP_TRACER=y
+CONFIG_RING_BUFFER=y
+CONFIG_TRACING=y
+
+#
+# Tracers
+#
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_FTRACE_STARTUP_TEST is not set
+# CONFIG_BUILD_DOCSRC is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
CONFIG_DEBUG_RODATA=y
#
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
CONFIG_CRYPTO_ALGAPI=m
+CONFIG_CRYPTO_ALGAPI2=m
+CONFIG_CRYPTO_AEAD2=m
CONFIG_CRYPTO_BLKCIPHER=m
+CONFIG_CRYPTO_BLKCIPHER2=m
+CONFIG_CRYPTO_HASH=m
+CONFIG_CRYPTO_HASH2=m
+CONFIG_CRYPTO_RNG2=m
CONFIG_CRYPTO_MANAGER=m
+CONFIG_CRYPTO_MANAGER2=m
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_NULL=m
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+CONFIG_CRYPTO_TEST=m
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=m
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_XCBC is not set
-CONFIG_CRYPTO_NULL=m
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=m
# CONFIG_CRYPTO_MD4 is not set
CONFIG_CRYPTO_MD5=m
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
-# CONFIG_CRYPTO_WP512 is not set
# CONFIG_CRYPTO_TGR192 is not set
-# CONFIG_CRYPTO_GF128MUL is not set
-# CONFIG_CRYPTO_ECB is not set
-CONFIG_CRYPTO_CBC=m
-# CONFIG_CRYPTO_PCBC is not set
-# CONFIG_CRYPTO_LRW is not set
-# CONFIG_CRYPTO_XTS is not set
-# CONFIG_CRYPTO_CRYPTD is not set
-CONFIG_CRYPTO_DES=m
-# CONFIG_CRYPTO_FCRYPT is not set
-CONFIG_CRYPTO_BLOWFISH=m
-# CONFIG_CRYPTO_TWOFISH is not set
-# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_BLOWFISH=m
+# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_TEA is not set
-# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_DES=m
+# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_KHAZAD is not set
-# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_SALSA20 is not set
# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
CONFIG_CRYPTO_DEFLATE=m
-# CONFIG_CRYPTO_MICHAEL_MIC is not set
-CONFIG_CRYPTO_CRC32C=m
-# CONFIG_CRYPTO_CAMELLIA is not set
-CONFIG_CRYPTO_TEST=m
-# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_HW is not set
#
# Library routines
#
CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_CRC_CCITT=m
# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.23
-# Fri Oct 12 20:54:57 2007
+# Linux kernel version: 2.6.29-rc8
+# Fri Mar 13 01:32:59 2009
#
CONFIG_PARISC=y
CONFIG_MMU=y
CONFIG_POSIX_MQUEUE=y
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
-# CONFIG_USER_NS is not set
# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
# CONFIG_EMBEDDED is not set
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
+CONFIG_AIO=y
CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_PCI_QUIRKS=y
+CONFIG_COMPAT_BRK=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+CONFIG_TRACEPOINTS=y
+# CONFIG_MARKERS is not set
+CONFIG_OPROFILE=m
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
+CONFIG_INIT_ALL_POSSIBLE=y
CONFIG_BLOCK=y
# CONFIG_LBD is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
#
# IO Schedulers
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
+# CONFIG_FREEZER is not set
#
# Processor type and features
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4096
-# CONFIG_RESOURCES_64BIT is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_ZONE_DMA_FLAG=0
CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
# CONFIG_HPUX is not set
#
# CONFIG_ISA is not set
CONFIG_PCI=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_PCI_LEGACY=y
# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_STUB is not set
CONFIG_GSC_DINO=y
CONFIG_PCI_LBA=y
CONFIG_IOSAPIC=y
CONFIG_IOMMU_SBA=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
+CONFIG_IOMMU_HELPER=y
CONFIG_PCCARD=y
# CONFIG_PCMCIA_DEBUG is not set
CONFIG_PCMCIA=y
# Executable file formats
#
CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
CONFIG_BINFMT_MISC=m
-
-#
-# Networking
-#
CONFIG_NET=y
#
# Networking options
#
+CONFIG_COMPAT_NET_DEV_OPS=y
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=m
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+CONFIG_XFRM_IPCOMP=y
CONFIG_NET_KEY=m
# CONFIG_NET_KEY_MIGRATE is not set
CONFIG_INET=y
CONFIG_INET6_XFRM_MODE_BEET=y
# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
CONFIG_IPV6_SIT=y
+CONFIG_IPV6_NDISC_NODETYPE=y
# CONFIG_IPV6_TUNNEL is not set
# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
CONFIG_LLC=m
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
-
-#
-# Wireless
-#
+# CONFIG_PHONET is not set
+CONFIG_WIRELESS=y
# CONFIG_CFG80211 is not set
+CONFIG_WIRELESS_OLD_REGULATORY=y
# CONFIG_WIRELESS_EXT is not set
+# CONFIG_LIB80211 is not set
# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
+# CONFIG_WIMAX is not set
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set
# CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=6144
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_BLK_DEV_XIP is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
CONFIG_MISC_DEVICES=y
# CONFIG_PHANTOM is not set
-# CONFIG_EEPROM_93CX6 is not set
# CONFIG_SGI_IOC4 is not set
# CONFIG_TIFM_CORE is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_HP_ILO is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
CONFIG_IDE=y
-CONFIG_BLK_DEV_IDE=y
#
-# Please see Documentation/ide.txt for help/info on IDE drives
+# Please see Documentation/ide/ide.txt for help/info on IDE drives
#
+CONFIG_IDE_ATAPI=y
# CONFIG_BLK_DEV_IDE_SATA is not set
-CONFIG_BLK_DEV_IDEDISK=y
-CONFIG_IDEDISK_MULTI_MODE=y
+CONFIG_IDE_GD=y
+CONFIG_IDE_GD_ATA=y
+# CONFIG_IDE_GD_ATAPI is not set
CONFIG_BLK_DEV_IDECS=y
# CONFIG_BLK_DEV_DELKIN is not set
CONFIG_BLK_DEV_IDECD=y
+CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-CONFIG_BLK_DEV_IDESCSI=y
# CONFIG_IDE_TASK_IOCTL is not set
CONFIG_IDE_PROC_FS=y
#
# IDE chipset support/bugfixes
#
-CONFIG_IDE_GENERIC=y
# CONFIG_BLK_DEV_PLATFORM is not set
+CONFIG_BLK_DEV_IDEDMA_SFF=y
#
# PCI IDE chipsets support
#
CONFIG_BLK_DEV_IDEPCI=y
-CONFIG_IDEPCI_SHARE_IRQ=y
CONFIG_IDEPCI_PCIBUS_ORDER=y
# CONFIG_BLK_DEV_OFFBOARD is not set
CONFIG_BLK_DEV_GENERIC=y
# CONFIG_BLK_DEV_OPTI621 is not set
CONFIG_BLK_DEV_IDEDMA_PCI=y
-# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
-CONFIG_IDEDMA_ONLYDISK=y
# CONFIG_BLK_DEV_AEC62XX is not set
# CONFIG_BLK_DEV_ALI15X3 is not set
# CONFIG_BLK_DEV_AMD74XX is not set
# CONFIG_BLK_DEV_CMD64X is not set
# CONFIG_BLK_DEV_TRIFLEX is not set
-# CONFIG_BLK_DEV_CY82C693 is not set
# CONFIG_BLK_DEV_CS5520 is not set
# CONFIG_BLK_DEV_CS5530 is not set
-# CONFIG_BLK_DEV_HPT34X is not set
# CONFIG_BLK_DEV_HPT366 is not set
# CONFIG_BLK_DEV_JMICRON is not set
# CONFIG_BLK_DEV_SC1200 is not set
# CONFIG_BLK_DEV_PIIX is not set
+# CONFIG_BLK_DEV_IT8172 is not set
# CONFIG_BLK_DEV_IT8213 is not set
# CONFIG_BLK_DEV_IT821X is not set
CONFIG_BLK_DEV_NS87415=y
# CONFIG_BLK_DEV_TRM290 is not set
# CONFIG_BLK_DEV_VIA82CXXX is not set
# CONFIG_BLK_DEV_TC86C001 is not set
-# CONFIG_IDE_ARM is not set
CONFIG_BLK_DEV_IDEDMA=y
-# CONFIG_IDEDMA_IVB is not set
-# CONFIG_BLK_DEV_HD is not set
#
# SCSI device support
# CONFIG_SCSI_FC_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set
# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
CONFIG_SCSI_LOWLEVEL=y
# CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_CXGB3_ISCSI is not set
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_3W_9XXX is not set
# CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AIC79XX is not set
# CONFIG_SCSI_AIC94XX is not set
# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_ARCMSR is not set
# CONFIG_MEGARAID_NEWGEN is not set
# CONFIG_MEGARAID_LEGACY is not set
# CONFIG_MEGARAID_SAS is not set
# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_FCOE is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
# CONFIG_SCSI_IPS is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_PPA is not set
# CONFIG_SCSI_IMM is not set
+# CONFIG_SCSI_MVSAS is not set
CONFIG_SCSI_LASI700=y
CONFIG_53C700_LE_ON_BE=y
# CONFIG_SCSI_STEX is not set
# CONFIG_SCSI_DEBUG is not set
# CONFIG_SCSI_SRP is not set
# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
+# CONFIG_SCSI_DH is not set
# CONFIG_ATA is not set
CONFIG_MD=y
CONFIG_BLK_DEV_MD=y
+CONFIG_MD_AUTODETECT=y
CONFIG_MD_LINEAR=y
CONFIG_MD_RAID0=y
CONFIG_MD_RAID1=y
# CONFIG_DM_ZERO is not set
# CONFIG_DM_MULTIPATH is not set
# CONFIG_DM_DELAY is not set
+# CONFIG_DM_UEVENT is not set
+# CONFIG_FUSION is not set
#
-# Fusion MPT device support
+# IEEE 1394 (FireWire) support
#
-# CONFIG_FUSION is not set
-# CONFIG_FUSION_SPI is not set
-# CONFIG_FUSION_FC is not set
-# CONFIG_FUSION_SAS is not set
#
-# IEEE 1394 (FireWire) support
+# Enable only one of the two stacks, unless you know what you are doing
#
# CONFIG_FIREWIRE is not set
# CONFIG_IEEE1394 is not set
# CONFIG_I2O is not set
CONFIG_NETDEVICES=y
-# CONFIG_NETDEVICES_MULTIQUEUE is not set
CONFIG_DUMMY=m
CONFIG_BONDING=m
# CONFIG_MACVLAN is not set
# CONFIG_EQUALIZER is not set
CONFIG_TUN=m
# CONFIG_VETH is not set
-# CONFIG_IP1000 is not set
# CONFIG_ARCNET is not set
-# CONFIG_PHYLIB is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
CONFIG_NET_ETHERNET=y
CONFIG_MII=m
CONFIG_LASI_82596=y
# CONFIG_DM9102 is not set
# CONFIG_ULI526X is not set
# CONFIG_PCMCIA_XIRCOM is not set
-# CONFIG_PCMCIA_XIRTULIP is not set
# CONFIG_DEPCA is not set
# CONFIG_HP100 is not set
# CONFIG_IBM_NEW_EMAC_ZMII is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
CONFIG_NET_PCI=y
# CONFIG_PCNET32 is not set
# CONFIG_AMD8111_ETH is not set
# CONFIG_AC3200 is not set
# CONFIG_B44 is not set
# CONFIG_FORCEDETH is not set
-# CONFIG_EEPRO100 is not set
+# CONFIG_CS89x0 is not set
# CONFIG_E100 is not set
# CONFIG_LNE390 is not set
# CONFIG_FEALNX is not set
# CONFIG_ES3210 is not set
# CONFIG_8139CP is not set
# CONFIG_8139TOO is not set
+# CONFIG_R6040 is not set
# CONFIG_SIS900 is not set
# CONFIG_EPIC100 is not set
+# CONFIG_SMSC9420 is not set
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
# CONFIG_SC92031 is not set
# CONFIG_NET_POCKET is not set
+# CONFIG_ATL2 is not set
CONFIG_NETDEV_1000=y
CONFIG_ACENIC=y
# CONFIG_ACENIC_OMIT_TIGON_I is not set
# CONFIG_DL2K is not set
# CONFIG_E1000 is not set
# CONFIG_E1000E is not set
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SIS190 is not set
# CONFIG_SKGE is not set
# CONFIG_SKY2 is not set
-# CONFIG_SK98LIN is not set
# CONFIG_VIA_VELOCITY is not set
CONFIG_TIGON3=y
# CONFIG_BNX2 is not set
# CONFIG_QLA3XXX is not set
# CONFIG_ATL1 is not set
+# CONFIG_ATL1E is not set
+# CONFIG_ATL1C is not set
+# CONFIG_JME is not set
CONFIG_NETDEV_10000=y
# CONFIG_CHELSIO_T1 is not set
+CONFIG_CHELSIO_T3_DEPENDS=y
# CONFIG_CHELSIO_T3 is not set
+# CONFIG_ENIC is not set
# CONFIG_IXGBE is not set
# CONFIG_IXGB is not set
# CONFIG_S2IO is not set
# CONFIG_MYRI10GE is not set
# CONFIG_NETXEN_NIC is not set
# CONFIG_NIU is not set
+# CONFIG_MLX4_EN is not set
# CONFIG_MLX4_CORE is not set
# CONFIG_TEHUTI is not set
+# CONFIG_BNX2X is not set
+# CONFIG_QLGE is not set
+# CONFIG_SFC is not set
# CONFIG_TR is not set
#
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
#
# USB Network Adapters
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_RTL8150 is not set
-# CONFIG_USB_USBNET_MII is not set
# CONFIG_USB_USBNET is not set
CONFIG_NET_PCMCIA=y
# CONFIG_PCMCIA_3C589 is not set
# CONFIG_SLIP is not set
CONFIG_SLHC=m
# CONFIG_NET_FC is not set
-# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
CONFIG_MOUSE_PS2_ALPS=y
CONFIG_MOUSE_PS2_LOGIPS2PP=y
CONFIG_MOUSE_PS2_SYNAPTICS=y
-CONFIG_MOUSE_PS2_LIFEBOOK=y
CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_ELANTECH is not set
# CONFIG_MOUSE_PS2_TOUCHKIT is not set
CONFIG_MOUSE_SERIAL=y
# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_BCM5974 is not set
# CONFIG_MOUSE_VSXXXAA is not set
CONFIG_MOUSE_HIL=y
# CONFIG_INPUT_JOYSTICK is not set
# Character devices
#
CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
#
# Serial drivers
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_JSM is not set
CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=64
CONFIG_PRINTER=m
# CONFIG_LP_CONSOLE is not set
CONFIG_PPDEV=m
-# CONFIG_TIPAR is not set
# CONFIG_IPMI_HANDLER is not set
-# CONFIG_WATCHDOG is not set
# CONFIG_HW_RANDOM is not set
-CONFIG_GEN_RTC=y
-CONFIG_GEN_RTC_X=y
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
#
# PCMCIA character devices
# CONFIG_SYNCLINK_CS is not set
# CONFIG_CARDMAN_4000 is not set
# CONFIG_CARDMAN_4040 is not set
+# CONFIG_IPWIRELESS is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
CONFIG_DEVPORT=y
# CONFIG_I2C is not set
-
-#
-# SPI support
-#
# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
#
# Sonics Silicon Backplane
#
-CONFIG_SSB_POSSIBLE=y
# CONFIG_SSB is not set
#
# Multifunction device drivers
#
+# CONFIG_MFD_CORE is not set
# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_REGULATOR is not set
#
# Multimedia devices
#
+
+#
+# Multimedia core support
+#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
-# CONFIG_DAB is not set
+# CONFIG_VIDEO_MEDIA is not set
#
-# Graphics support
+# Multimedia drivers
#
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+# CONFIG_DAB is not set
#
-# Display device support
+# Graphics support
#
-# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
# CONFIG_VGASTATE is not set
CONFIG_VIDEO_OUTPUT_CONTROL=m
CONFIG_FB=y
# CONFIG_FIRMWARE_EDID is not set
# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
# CONFIG_FB_SYS_FILLRECT is not set
# CONFIG_FB_SYS_COPYAREA is not set
# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
# CONFIG_FB_SYS_FOPS is not set
-CONFIG_FB_DEFERRED_IO=y
# CONFIG_FB_SVGALIB is not set
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_BACKLIGHT is not set
# CONFIG_FB_S3 is not set
# CONFIG_FB_SAVAGE is not set
# CONFIG_FB_SIS is not set
+# CONFIG_FB_VIA is not set
# CONFIG_FB_NEOMAGIC is not set
# CONFIG_FB_KYRO is not set
# CONFIG_FB_3DFX is not set
# CONFIG_FB_TRIDENT is not set
# CONFIG_FB_ARK is not set
# CONFIG_FB_PM3 is not set
+# CONFIG_FB_CARMINE is not set
# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
#
# Console display driver support
# CONFIG_LOGO_LINUX_VGA16 is not set
# CONFIG_LOGO_LINUX_CLUT224 is not set
CONFIG_LOGO_PARISC_CLUT224=y
-
-#
-# Sound
-#
CONFIG_SOUND=y
-
-#
-# Advanced Linux Sound Architecture
-#
+CONFIG_SOUND_OSS_CORE=y
CONFIG_SND=y
CONFIG_SND_TIMER=y
CONFIG_SND_PCM=y
CONFIG_SND_VERBOSE_PROCFS=y
# CONFIG_SND_VERBOSE_PRINTK is not set
# CONFIG_SND_DEBUG is not set
-
-#
-# Generic devices
-#
+CONFIG_SND_VMASTER=y
CONFIG_SND_AC97_CODEC=y
+CONFIG_SND_DRIVERS=y
# CONFIG_SND_DUMMY is not set
# CONFIG_SND_VIRMIDI is not set
# CONFIG_SND_MTPAV is not set
# CONFIG_SND_SERIAL_U16550 is not set
# CONFIG_SND_MPU401 is not set
# CONFIG_SND_PORTMAN2X4 is not set
-
-#
-# PCI devices
-#
+# CONFIG_SND_AC97_POWER_SAVE is not set
+CONFIG_SND_PCI=y
CONFIG_SND_AD1889=y
# CONFIG_SND_ALS300 is not set
# CONFIG_SND_ALI5451 is not set
# CONFIG_SND_AU8810 is not set
# CONFIG_SND_AU8820 is not set
# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AW2 is not set
# CONFIG_SND_AZT3328 is not set
# CONFIG_SND_BT87X is not set
# CONFIG_SND_CA0106 is not set
# CONFIG_SND_CMIPCI is not set
+# CONFIG_SND_OXYGEN is not set
# CONFIG_SND_CS4281 is not set
# CONFIG_SND_CS46XX is not set
# CONFIG_SND_DARLA20 is not set
# CONFIG_SND_HDA_INTEL is not set
# CONFIG_SND_HDSP is not set
# CONFIG_SND_HDSPM is not set
+# CONFIG_SND_HIFIER is not set
# CONFIG_SND_ICE1712 is not set
# CONFIG_SND_ICE1724 is not set
# CONFIG_SND_INTEL8X0 is not set
# CONFIG_SND_TRIDENT is not set
# CONFIG_SND_VIA82XX is not set
# CONFIG_SND_VIA82XX_MODEM is not set
+# CONFIG_SND_VIRTUOSO is not set
# CONFIG_SND_VX222 is not set
# CONFIG_SND_YMFPCI is not set
-# CONFIG_SND_AC97_POWER_SAVE is not set
-
-#
-# USB devices
-#
+CONFIG_SND_USB=y
# CONFIG_SND_USB_AUDIO is not set
# CONFIG_SND_USB_CAIAQ is not set
-
-#
-# PCMCIA devices
-#
+CONFIG_SND_PCMCIA=y
# CONFIG_SND_VXPOCKET is not set
# CONFIG_SND_PDAUDIOCF is not set
-
-#
-# GSC devices
-#
+CONFIG_SND_GSC=y
CONFIG_SND_HARMONY=y
-
-#
-# System on Chip audio support
-#
# CONFIG_SND_SOC is not set
-
-#
-# SoC Audio support for SuperH
-#
-
-#
-# Open Sound System
-#
# CONFIG_SOUND_PRIME is not set
CONFIG_AC97_BUS=y
CONFIG_HID_SUPPORT=y
CONFIG_HID=y
CONFIG_HID_DEBUG=y
+# CONFIG_HIDRAW is not set
#
# USB Input Devices
#
CONFIG_USB_HID=y
-# CONFIG_USB_HIDINPUT_POWERBOOK is not set
-# CONFIG_HID_FF is not set
+# CONFIG_HID_PID is not set
# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+CONFIG_HID_COMPAT=y
+CONFIG_HID_A4TECH=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_BELKIN=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+CONFIG_HID_CYPRESS=y
+CONFIG_HID_EZKEY=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_LOGITECH=y
+# CONFIG_LOGITECH_FF is not set
+# CONFIG_LOGIRUMBLEPAD2_FF is not set
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+CONFIG_HID_NTRIG=y
+CONFIG_HID_PANTHERLORD=y
+# CONFIG_PANTHERLORD_FF is not set
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+# CONFIG_GREENASIA_FF is not set
+CONFIG_HID_TOPSEED=y
+# CONFIG_THRUSTMASTER_FF is not set
+# CONFIG_ZEROPLUS_FF is not set
CONFIG_USB_SUPPORT=y
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
CONFIG_USB_ARCH_HAS_EHCI=y
CONFIG_USB=y
# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
#
# Miscellaneous USB options
CONFIG_USB_DEVICE_CLASS=y
# CONFIG_USB_DYNAMIC_MINORS is not set
# CONFIG_USB_OTG is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
#
# USB Host Controller Drivers
#
+# CONFIG_USB_C67X00_HCD is not set
# CONFIG_USB_EHCI_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
CONFIG_USB_OHCI_HCD=y
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
CONFIG_USB_UHCI_HCD=y
# CONFIG_USB_SL811_HCD is not set
# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_WHCI_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
#
# USB Device Class drivers
#
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
#
#
-# may also be needed; see USB_STORAGE Help for more information
+# see USB_STORAGE Help for more information
#
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_LIBUSUAL is not set
#
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_MICROTEK is not set
-CONFIG_USB_MON=y
#
# USB port drivers
#
# CONFIG_USB_USS720 is not set
-
-#
-# USB Serial Converter support
-#
# CONFIG_USB_SERIAL is not set
#
# CONFIG_USB_EMI62 is not set
# CONFIG_USB_EMI26 is not set
# CONFIG_USB_ADUTUX is not set
-# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_SEVSEG is not set
# CONFIG_USB_RIO500 is not set
# CONFIG_USB_LEGOTOWER is not set
# CONFIG_USB_LCD is not set
# CONFIG_USB_TRANCEVIBRATOR is not set
# CONFIG_USB_IOWARRIOR is not set
# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
#
-# USB DSL modem support
-#
-
-#
-# USB Gadget Support
+# OTG and related infrastructure
#
-# CONFIG_USB_GADGET is not set
+# CONFIG_UWB is not set
# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set
-# CONFIG_RTC_CLASS is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
#
-# DMA Engine support
+# RTC interfaces
#
-# CONFIG_DMA_ENGINE is not set
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
#
-# DMA Clients
+# SPI RTC drivers
#
#
-# DMA Devices
+# Platform RTC drivers
#
-# CONFIG_AUXDISPLAY is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
#
-# Userspace I/O
+# on-CPU RTC drivers
#
+CONFIG_RTC_DRV_PARISC=y
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
#
# File systems
# CONFIG_EXT2_FS_XIP is not set
CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_XATTR is not set
-# CONFIG_EXT4DEV_FS is not set
+# CONFIG_EXT4_FS is not set
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
# CONFIG_XFS_FS is not set
-# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
CONFIG_AUTOFS_FS=y
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
# CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_ECRYPT_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
+CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
+CONFIG_ROOT_NFS=y
CONFIG_NFSD=y
CONFIG_NFSD_V3=y
# CONFIG_NFSD_V3_ACL is not set
CONFIG_NFSD_V4=y
-CONFIG_NFSD_TCP=y
-CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_EXPORTFS=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
-# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_SUNRPC_REGISTER_V4 is not set
CONFIG_RPCSEC_GSS_KRB5=y
CONFIG_RPCSEC_GSS_SPKM3=m
CONFIG_SMB_FS=m
CONFIG_CIFS=m
# CONFIG_CIFS_STATS is not set
# CONFIG_CIFS_WEAK_PW_HASH is not set
+# CONFIG_CIFS_UPCALL is not set
# CONFIG_CIFS_XATTR is not set
# CONFIG_CIFS_DEBUG2 is not set
# CONFIG_CIFS_EXPERIMENTAL is not set
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_KOI8_R=m
CONFIG_NLS_KOI8_U=m
CONFIG_NLS_UTF8=y
-
-#
-# Distributed Lock Manager
-#
# CONFIG_DLM is not set
-#
-# Profiling support
-#
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=m
-
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
CONFIG_MAGIC_SYSRQ=y
# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_DEBUG_FS is not set
+CONFIG_DEBUG_FS=y
CONFIG_HEADERS_CHECK=y
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_SHIRQ is not set
CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
CONFIG_SCHED_DEBUG=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
# CONFIG_DEBUG_LIST is not set
-CONFIG_FORCED_INLINING=y
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_NOP_TRACER=y
+CONFIG_RING_BUFFER=y
+CONFIG_TRACING=y
+
+#
+# Tracers
+#
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_FTRACE_STARTUP_TEST is not set
+# CONFIG_BUILD_DOCSRC is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
# CONFIG_DEBUG_RODATA is not set
#
CONFIG_KEYS=y
CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_NULL=m
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_AUTHENC=y
+CONFIG_CRYPTO_TEST=m
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
CONFIG_CRYPTO_HMAC=y
# CONFIG_CRYPTO_XCBC is not set
-CONFIG_CRYPTO_NULL=m
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=m
CONFIG_CRYPTO_MD4=m
CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_MICHAEL_MIC=m
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
-CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_TGR192=m
-# CONFIG_CRYPTO_GF128MUL is not set
-# CONFIG_CRYPTO_ECB is not set
-CONFIG_CRYPTO_CBC=y
-# CONFIG_CRYPTO_PCBC is not set
-# CONFIG_CRYPTO_LRW is not set
-# CONFIG_CRYPTO_XTS is not set
-# CONFIG_CRYPTO_CRYPTD is not set
-CONFIG_CRYPTO_DES=y
-# CONFIG_CRYPTO_FCRYPT is not set
-CONFIG_CRYPTO_BLOWFISH=m
-CONFIG_CRYPTO_TWOFISH=m
-CONFIG_CRYPTO_TWOFISH_COMMON=m
-CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_WP512=m
+
+#
+# Ciphers
+#
CONFIG_CRYPTO_AES=m
+CONFIG_CRYPTO_ANUBIS=m
+CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_BLOWFISH=m
+# CONFIG_CRYPTO_CAMELLIA is not set
CONFIG_CRYPTO_CAST5=m
CONFIG_CRYPTO_CAST6=m
-CONFIG_CRYPTO_TEA=m
-CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
CONFIG_CRYPTO_KHAZAD=m
-CONFIG_CRYPTO_ANUBIS=m
+# CONFIG_CRYPTO_SALSA20 is not set
# CONFIG_CRYPTO_SEED is not set
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_TEA=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_TWOFISH_COMMON=m
+
+#
+# Compression
+#
CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_MICHAEL_MIC=m
-CONFIG_CRYPTO_CRC32C=m
-# CONFIG_CRYPTO_CAMELLIA is not set
-CONFIG_CRYPTO_TEST=m
-# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_HW is not set
#
# Library routines
#
CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_CRC_CCITT=m
# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
error = count - buf.count;
}
-out_putf:
fput(file);
out:
return error;
#include <asm/asm-offsets.h>
#include <asm/page.h>
+#include <asm/types.h>
#include <asm/asmregs.h>
/* Shift Left - note the r and t can NOT be the same! */
.macro shl r, sa, t
- dep,z \r, 31-\sa, 32-\sa, \t
+ dep,z \r, 31-(\sa), 32-(\sa), \t
.endm
/* The PA 2.0 shift left */
.macro shlw r, sa, t
- depw,z \r, 31-\sa, 32-\sa, \t
+ depw,z \r, 31-(\sa), 32-(\sa), \t
.endm
/* And the PA 2.0W shift left */
.macro shld r, sa, t
- depd,z \r, 63-\sa, 64-\sa, \t
+ depd,z \r, 63-(\sa), 64-(\sa), \t
.endm
/* Shift Right - note the r and t can NOT be the same! */
.macro shr r, sa, t
- extru \r, 31-\sa, 32-\sa, \t
+ extru \r, 31-(\sa), 32-(\sa), \t
.endm
/* pa20w version of shift right */
.macro shrd r, sa, t
- extrd,u \r, 63-\sa, 64-\sa, \t
+ extrd,u \r, 63-(\sa), 64-(\sa), \t
.endm
/* load 32-bit 'value' into 'reg' compensating for the ldil
*(volatile unsigned long long __force *) addr = b;
}
-/* readb can never be const, so use __fswab instead of le*_to_cpu */
-#define readb(addr) __raw_readb(addr)
-#define readw(addr) le16_to_cpu(__raw_readw(addr))
-#define readl(addr) le32_to_cpu(__raw_readl(addr))
-#define readq(addr) le64_to_cpu(__raw_readq(addr))
-#define writeb(b, addr) __raw_writeb(b, addr)
-#define writew(b, addr) __raw_writew(cpu_to_le16(b), addr)
-#define writel(b, addr) __raw_writel(cpu_to_le32(b), addr)
-#define writeq(b, addr) __raw_writeq(cpu_to_le64(b), addr)
+static inline unsigned char readb(const volatile void __iomem *addr)
+{
+ return __raw_readb(addr);
+}
+static inline unsigned short readw(const volatile void __iomem *addr)
+{
+ return le16_to_cpu(__raw_readw(addr));
+}
+static inline unsigned int readl(const volatile void __iomem *addr)
+{
+ return le32_to_cpu(__raw_readl(addr));
+}
+static inline unsigned long long readq(const volatile void __iomem *addr)
+{
+ return le64_to_cpu(__raw_readq(addr));
+}
+
+static inline void writeb(unsigned char b, volatile void __iomem *addr)
+{
+ __raw_writeb(b, addr);
+}
+static inline void writew(unsigned short w, volatile void __iomem *addr)
+{
+ __raw_writew(cpu_to_le16(w), addr);
+}
+static inline void writel(unsigned int l, volatile void __iomem *addr)
+{
+ __raw_writel(cpu_to_le32(l), addr);
+}
+static inline void writeq(unsigned long long q, volatile void __iomem *addr)
+{
+ __raw_writeq(cpu_to_le64(q), addr);
+}
+
+#define readb readb
+#define readw readw
+#define readl readl
+#define readq readq
+#define writeb writeb
+#define writew writew
+#define writel writel
+#define writeq writeq
#define readb_relaxed(addr) readb(addr)
#define readw_relaxed(addr) readw(addr)
extern unsigned long txn_affinity_addr(unsigned int irq, int cpu);
extern int cpu_claim_irq(unsigned int irq, struct irq_chip *, void *);
-extern int cpu_check_affinity(unsigned int irq, cpumask_t *dest);
+extern int cpu_check_affinity(unsigned int irq, const struct cpumask *dest);
/* soft power switch support (power.c) */
extern struct tasklet_struct power_tasklet;
#define __copy_to_user_inatomic __copy_to_user
#define __copy_from_user_inatomic __copy_from_user
+struct pt_regs;
int fixup_exception(struct pt_regs *regs);
#endif /* __PARISC_UACCESS_H */
{
int sr3;
- if (!vma->vm_mm->context) {
- BUG();
- return;
- }
+ BUG_ON(!vma->vm_mm->context);
sr3 = mfsp(3);
if (vma->vm_mm->context == sr3) {
* abstractions for the macros */
.macro EXTR reg1,start,length,reg2
#ifdef CONFIG_64BIT
- extrd,u \reg1,32+\start,\length,\reg2
+ extrd,u \reg1,32+(\start),\length,\reg2
#else
extrw,u \reg1,\start,\length,\reg2
#endif
.macro DEP reg1,start,length,reg2
#ifdef CONFIG_64BIT
- depd \reg1,32+\start,\length,\reg2
+ depd \reg1,32+(\start),\length,\reg2
#else
depw \reg1,\start,\length,\reg2
#endif
.macro DEPI val,start,length,reg
#ifdef CONFIG_64BIT
- depdi \val,32+\start,\length,\reg
+ depdi \val,32+(\start),\length,\reg
#else
depwi \val,\start,\length,\reg
#endif
}
#ifdef CONFIG_64BIT
-void __init set_firmware_width_unlocked(void)
+void __cpuinit set_firmware_width_unlocked(void)
{
int ret;
* This function must be called before any pdc_* function that uses the
* convert_to_wide function.
*/
-void __init set_firmware_width(void)
+void __cpuinit set_firmware_width(void)
{
unsigned long flags;
spin_lock_irqsave(&pdc_lock, flags);
spin_unlock_irqrestore(&pdc_lock, flags);
}
#else
-void __init set_firmware_width_unlocked(void) {
+void __cpuinit set_firmware_width_unlocked(void) {
return;
}
-void __init set_firmware_width(void) {
+void __cpuinit set_firmware_width(void) {
return;
}
#endif /*CONFIG_64BIT*/
return retval;
}
-int __init pdc_coproc_cfg_unlocked(struct pdc_coproc_cfg *pdc_coproc_info)
+int __cpuinit pdc_coproc_cfg_unlocked(struct pdc_coproc_cfg *pdc_coproc_info)
{
int ret;
* This PDC call returns the presence and status of all the coprocessors
* attached to the processor.
*/
-int __init pdc_coproc_cfg(struct pdc_coproc_cfg *pdc_coproc_info)
+int __cpuinit pdc_coproc_cfg(struct pdc_coproc_cfg *pdc_coproc_info)
{
int ret;
unsigned long flags;
}
#ifdef CONFIG_SMP
-int cpu_check_affinity(unsigned int irq, cpumask_t *dest)
+int cpu_check_affinity(unsigned int irq, const struct cpumask *dest)
{
int cpu_dest;
if (CHECK_IRQ_PER_CPU(irq)) {
/* Bad linux design decision. The mask has already
* been set; we must reset it */
- irq_desc[irq].affinity = CPU_MASK_ALL;
+ cpumask_setall(&irq_desc[irq].affinity);
return -EINVAL;
}
/* whatever mask they set, we just allow one CPU */
cpu_dest = first_cpu(*dest);
- *dest = cpumask_of_cpu(cpu_dest);
- return 0;
+ return cpu_dest;
}
static void cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest)
{
- if (cpu_check_affinity(irq, dest))
+ int cpu_dest;
+
+ cpu_dest = cpu_check_affinity(irq, dest);
+ if (cpu_dest < 0)
return;
- irq_desc[irq].affinity = *dest;
+ cpumask_copy(&irq_desc[irq].affinity, &cpumask_of_cpu(cpu_dest));
}
#endif
unsigned long txn_affinity_addr(unsigned int irq, int cpu)
{
#ifdef CONFIG_SMP
- irq_desc[irq].affinity = cpumask_of_cpu(cpu);
+ cpumask_copy(&irq_desc[irq].affinity, cpumask_of(cpu));
#endif
return per_cpu(cpu_data, cpu).txn_addr;
irq = eirr_to_irq(eirr_val);
#ifdef CONFIG_SMP
- dest = irq_desc[irq].affinity;
+ cpumask_copy(&dest, &irq_desc[irq].affinity);
if (CHECK_IRQ_PER_CPU(irq_desc[irq].status) &&
!cpu_isset(smp_processor_id(), dest)) {
int cpu = first_cpu(dest);
static dma_addr_t pa11_dma_map_single(struct device *dev, void *addr, size_t size, enum dma_data_direction direction)
{
- if (direction == DMA_NONE) {
- printk(KERN_ERR "pa11_dma_map_single(PCI_DMA_NONE) called by %p\n", __builtin_return_address(0));
- BUG();
- }
+ BUG_ON(direction == DMA_NONE);
flush_kernel_dcache_range((unsigned long) addr, size);
return virt_to_phys(addr);
static void pa11_dma_unmap_single(struct device *dev, dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
{
- if (direction == DMA_NONE) {
- printk(KERN_ERR "pa11_dma_unmap_single(PCI_DMA_NONE) called by %p\n", __builtin_return_address(0));
- BUG();
- }
+ BUG_ON(direction == DMA_NONE);
if (direction == DMA_TO_DEVICE)
return;
{
int i;
- if (direction == DMA_NONE)
- BUG();
+ BUG_ON(direction == DMA_NONE);
for (i = 0; i < nents; i++, sglist++ ) {
unsigned long vaddr = sg_virt_addr(sglist);
{
int i;
- if (direction == DMA_NONE)
- BUG();
+ BUG_ON(direction == DMA_NONE);
if (direction == DMA_TO_DEVICE)
return;
static void pa11_dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, unsigned long offset, size_t size, enum dma_data_direction direction)
{
- if (direction == DMA_NONE)
- BUG();
+ BUG_ON(direction == DMA_NONE);
flush_kernel_dcache_range((unsigned long) phys_to_virt(dma_handle) + offset, size);
}
static void pa11_dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, unsigned long offset, size_t size, enum dma_data_direction direction)
{
- if (direction == DMA_NONE)
- BUG();
+ BUG_ON(direction == DMA_NONE);
flush_kernel_dcache_range((unsigned long) phys_to_virt(dma_handle) + offset, size);
}
*/
max_low_pfn = max_pfn;
- if ((bootmap_pfn - bootmap_start_pfn) != bootmap_pages) {
- printk(KERN_WARNING "WARNING! bootmap sizing is messed up!\n");
- BUG();
- }
+ /* bootmap sizing messed up? */
+ BUG_ON((bootmap_pfn - bootmap_start_pfn) != bootmap_pages);
/* reserve PAGE0 pdc memory, kernel text/data/bss & bootmap */
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.27-rc3
-# Wed Aug 20 08:16:53 2008
+# Linux kernel version: 2.6.29-rc8
+# Fri Mar 13 09:28:45 2009
#
CONFIG_PPC64=y
CONFIG_ALTIVEC=y
# CONFIG_VSX is not set
CONFIG_PPC_STD_MMU=y
+CONFIG_PPC_STD_MMU_64=y
CONFIG_PPC_MM_SLICES=y
CONFIG_VIRT_CPU_ACCOUNTING=y
CONFIG_SMP=y
CONFIG_NR_CPUS=2
CONFIG_64BIT=y
CONFIG_WORD_SIZE=64
-CONFIG_PPC_MERGE=y
+CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
CONFIG_MMU=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_TIME=y
CONFIG_EARLY_PRINTK=y
CONFIG_COMPAT=y
CONFIG_SYSVIPC_COMPAT=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
CONFIG_PPC_OF=y
CONFIG_OF=y
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
# CONFIG_IKCONFIG is not set
CONFIG_LOG_BUF_SHIFT=17
-# CONFIG_CGROUPS is not set
# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
CONFIG_SYSFS_DEPRECATED=y
CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_RELAY is not set
# CONFIG_IPC_NS is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
-# CONFIG_EMBEDDED is not set
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
CONFIG_KALLSYMS_ALL=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
-# CONFIG_COMPAT_BRK is not set
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
+CONFIG_AIO=y
CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
CONFIG_PROFILING=y
-# CONFIG_MARKERS is not set
+CONFIG_TRACEPOINTS=y
+CONFIG_MARKERS=y
CONFIG_OPROFILE=m
CONFIG_HAVE_OPROFILE=y
# CONFIG_KPROBES is not set
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_SYSCALL_WRAPPERS=y
CONFIG_HAVE_IOREMAP_PROT=y
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_DMA_ATTRS=y
CONFIG_USE_GENERIC_SMP_HELPERS=y
-# CONFIG_HAVE_CLK is not set
-CONFIG_PROC_PAGE_MONITOR=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
# CONFIG_MODULE_FORCE_LOAD is not set
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
CONFIG_STOP_MACHINE=y
CONFIG_BLOCK=y
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
-CONFIG_CLASSIC_RCU=y
+# CONFIG_FREEZER is not set
#
# Platform support
CONFIG_PS3_DISK=y
CONFIG_PS3_ROM=y
CONFIG_PS3_FLASH=y
-CONFIG_OPROFILE_PS3=y
+CONFIG_PS3_VRAM=m
CONFIG_PS3_LPM=m
CONFIG_PPC_CELL=y
# CONFIG_PPC_CELL_NATIVE is not set
# CONFIG_PPC_IBM_CELL_BLADE is not set
# CONFIG_PPC_CELLEB is not set
+# CONFIG_PPC_CELL_QPACE is not set
#
# Cell Broadband Engine options
#
CONFIG_SPU_FS=y
CONFIG_SPU_FS_64K_LS=y
+# CONFIG_SPU_TRACE is not set
CONFIG_SPU_BASE=y
# CONFIG_PQ2ADS is not set
# CONFIG_IPIC is not set
# CONFIG_GENERIC_IOMAP is not set
# CONFIG_CPU_FREQ is not set
# CONFIG_FSL_ULI1575 is not set
+# CONFIG_SIMPLE_GPIO is not set
#
# Kernel options
# CONFIG_PREEMPT is not set
CONFIG_BINFMT_ELF=y
CONFIG_COMPAT_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
CONFIG_BINFMT_MISC=y
CONFIG_HUGETLB_PAGE_SIZE_VARIABLE=y
# CONFIG_IOMMU_VMERGE is not set
CONFIG_SPARSEMEM_MANUAL=y
CONFIG_SPARSEMEM=y
CONFIG_HAVE_MEMORY_PRESENT=y
-# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPARSEMEM_EXTREME=y
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
# CONFIG_SPARSEMEM_VMEMMAP is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_MIGRATION=y
-CONFIG_RESOURCES_64BIT=y
+CONFIG_PHYS_ADDR_T_64BIT=y
CONFIG_ZONE_DMA_FLAG=1
CONFIG_BOUNCE=y
+CONFIG_UNEVICTABLE_LRU=y
CONFIG_ARCH_MEMORY_PROBE=y
CONFIG_PPC_HAS_HASH_64K=y
+CONFIG_PPC_4K_PAGES=y
+# CONFIG_PPC_16K_PAGES is not set
# CONFIG_PPC_64K_PAGES is not set
CONFIG_FORCE_MAX_ZONEORDER=13
CONFIG_SCHED_SMT=y
#
# Networking options
#
+CONFIG_COMPAT_NET_DEV_OPS=y
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_UNIX=y
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
#
# Network testing
#
# Bluetooth device drivers
#
-CONFIG_BT_HCIUSB=m
-CONFIG_BT_HCIUSB_SCO=y
+CONFIG_BT_HCIBTUSB=m
# CONFIG_BT_HCIUART is not set
# CONFIG_BT_HCIBCM203X is not set
# CONFIG_BT_HCIBPA10X is not set
# CONFIG_BT_HCIBFUSB is not set
# CONFIG_BT_HCIVHCI is not set
# CONFIG_AF_RXRPC is not set
-
-#
-# Wireless
-#
+# CONFIG_PHONET is not set
+CONFIG_WIRELESS=y
CONFIG_CFG80211=m
+# CONFIG_CFG80211_REG_DEBUG is not set
CONFIG_NL80211=y
+# CONFIG_WIRELESS_OLD_REGULATORY is not set
CONFIG_WIRELESS_EXT=y
# CONFIG_WIRELESS_EXT_SYSFS is not set
+# CONFIG_LIB80211 is not set
CONFIG_MAC80211=m
#
# Rate control algorithm selection
#
CONFIG_MAC80211_RC_PID=y
+# CONFIG_MAC80211_RC_MINSTREL is not set
CONFIG_MAC80211_RC_DEFAULT_PID=y
+# CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set
CONFIG_MAC80211_RC_DEFAULT="pid"
# CONFIG_MAC80211_MESH is not set
# CONFIG_MAC80211_LEDS is not set
# CONFIG_MAC80211_DEBUGFS is not set
# CONFIG_MAC80211_DEBUG_MENU is not set
-CONFIG_IEEE80211=m
-# CONFIG_IEEE80211_DEBUG is not set
-CONFIG_IEEE80211_CRYPT_WEP=m
-CONFIG_IEEE80211_CRYPT_CCMP=m
-CONFIG_IEEE80211_CRYPT_TKIP=m
+# CONFIG_WIMAX is not set
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set
CONFIG_MTD_DEBUG_VERBOSE=0
# CONFIG_MTD_CONCAT is not set
# CONFIG_MTD_PARTITIONS is not set
+# CONFIG_MTD_TESTS is not set
#
# User Modules And Translation Layers
#
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
-CONFIG_MTD_PS3VRAM=y
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLOCK2MTD is not set
# CONFIG_MTD_NAND is not set
# CONFIG_MTD_ONENAND is not set
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
#
# UBI - Unsorted block images
#
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_BLK_DEV_HD is not set
CONFIG_MISC_DEVICES=y
-# CONFIG_EEPROM_93CX6 is not set
# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_93CX6 is not set
CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set
# CONFIG_SCSI_LOWLEVEL is not set
# CONFIG_SCSI_DH is not set
# CONFIG_ATA is not set
-# CONFIG_MD is not set
+CONFIG_MD=y
+# CONFIG_BLK_DEV_MD is not set
+CONFIG_BLK_DEV_DM=m
+# CONFIG_DM_DEBUG is not set
+# CONFIG_DM_CRYPT is not set
+# CONFIG_DM_SNAPSHOT is not set
+# CONFIG_DM_MIRROR is not set
+# CONFIG_DM_ZERO is not set
+# CONFIG_DM_MULTIPATH is not set
+# CONFIG_DM_DELAY is not set
+# CONFIG_DM_UEVENT is not set
# CONFIG_MACINTOSH_DRIVERS is not set
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
# CONFIG_B44 is not set
CONFIG_NETDEV_1000=y
CONFIG_GELIC_NET=y
# CONFIG_WLAN_PRE80211 is not set
CONFIG_WLAN_80211=y
# CONFIG_LIBERTAS is not set
+# CONFIG_LIBERTAS_THINFIRM is not set
# CONFIG_USB_ZD1201 is not set
# CONFIG_USB_NET_RNDIS_WLAN is not set
# CONFIG_RTL8187 is not set
# CONFIG_B43LEGACY is not set
CONFIG_ZD1211RW=m
# CONFIG_ZD1211RW_DEBUG is not set
-CONFIG_RT2X00=m
-CONFIG_RT2X00_LIB=m
-CONFIG_RT2X00_LIB_USB=m
-CONFIG_RT2X00_LIB_FIRMWARE=y
-# CONFIG_RT2500USB is not set
-CONFIG_RT73USB=m
-# CONFIG_RT2X00_DEBUG is not set
+# CONFIG_RT2X00 is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
#
# USB Network Adapters
CONFIG_USB_NET_AX8817X=m
# CONFIG_USB_NET_CDCETHER is not set
# CONFIG_USB_NET_DM9601 is not set
+# CONFIG_USB_NET_SMSC95XX is not set
# CONFIG_USB_NET_GL620A is not set
# CONFIG_USB_NET_NET1080 is not set
# CONFIG_USB_NET_PLUSB is not set
# Input device support
#
CONFIG_INPUT=y
-# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_FF_MEMLESS=m
# CONFIG_INPUT_POLLDEV is not set
#
# Non-8250 serial port support
#
CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=16
+# CONFIG_HVC_UDBG is not set
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_R3964 is not set
# CONFIG_THERMAL is not set
# CONFIG_THERMAL_HWMON is not set
# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
#
# Sonics Silicon Backplane
#
-CONFIG_SSB_POSSIBLE=y
# CONFIG_SSB is not set
#
# CONFIG_MFD_SM501 is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_MFD_TMIO is not set
+# CONFIG_REGULATOR is not set
#
# Multimedia devices
CONFIG_FB=y
# CONFIG_FIRMWARE_EDID is not set
# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
# CONFIG_FB_CFB_FILLRECT is not set
# CONFIG_FB_CFB_COPYAREA is not set
# CONFIG_FB_CFB_IMAGEBLIT is not set
CONFIG_FB_PS3=y
CONFIG_FB_PS3_DEFAULT_SIZE_M=9
# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_LOGO_LINUX_CLUT224=y
CONFIG_SOUND=m
+# CONFIG_SOUND_OSS_CORE is not set
CONFIG_SND=m
CONFIG_SND_TIMER=m
CONFIG_SND_PCM=m
# CONFIG_SND_SEQUENCER is not set
# CONFIG_SND_MIXER_OSS is not set
# CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_HRTIMER is not set
# CONFIG_SND_DYNAMIC_MINORS is not set
CONFIG_SND_SUPPORT_OLD_API=y
CONFIG_SND_VERBOSE_PROCFS=y
# USB Input Devices
#
CONFIG_USB_HID=m
-# CONFIG_USB_HIDINPUT_POWERBOOK is not set
-# CONFIG_HID_FF is not set
-# CONFIG_USB_HIDDEV is not set
+# CONFIG_HID_PID is not set
+CONFIG_USB_HIDDEV=y
#
# USB HID Boot Protocol drivers
#
# CONFIG_USB_KBD is not set
# CONFIG_USB_MOUSE is not set
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_COMPAT is not set
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_GREENASIA_FF is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_THRUSTMASTER_FF is not set
+# CONFIG_ZEROPLUS_FF is not set
CONFIG_USB_SUPPORT=y
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
# CONFIG_USB_DYNAMIC_MINORS is not set
CONFIG_USB_SUSPEND=y
# CONFIG_USB_OTG is not set
-CONFIG_USB_MON=y
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=m
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
#
# USB Host Controller Drivers
# CONFIG_USB_EHCI_TT_NEWSCHED is not set
CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y
# CONFIG_USB_EHCI_HCD_PPC_OF is not set
+# CONFIG_USB_OXU210HP_HCD is not set
# CONFIG_USB_ISP116X_HCD is not set
# CONFIG_USB_ISP1760_HCD is not set
CONFIG_USB_OHCI_HCD=m
CONFIG_USB_OHCI_LITTLE_ENDIAN=y
# CONFIG_USB_SL811_HCD is not set
# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
#
# Enable Host or Gadget support to see Inventra options
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set
# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
#
#
-# may also be needed; see USB_STORAGE Help for more information
+# see USB_STORAGE Help for more information
#
CONFIG_USB_STORAGE=m
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
-# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_USBAT is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_SDDR55 is not set
# CONFIG_USB_STORAGE_ALAUDA is not set
# CONFIG_USB_STORAGE_ONETOUCH is not set
# CONFIG_USB_STORAGE_KARMA is not set
-# CONFIG_USB_STORAGE_SIERRA is not set
# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
# CONFIG_USB_LIBUSUAL is not set
# CONFIG_USB_EMI62 is not set
# CONFIG_USB_EMI26 is not set
# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
# CONFIG_USB_RIO500 is not set
# CONFIG_USB_LEGOTOWER is not set
# CONFIG_USB_LCD is not set
# CONFIG_USB_IOWARRIOR is not set
# CONFIG_USB_TEST is not set
# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
# Platform RTC drivers
#
# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
# CONFIG_RTC_DRV_DS1511 is not set
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
# CONFIG_RTC_DRV_V3020 is not set
#
CONFIG_RTC_DRV_PPC=m
# CONFIG_DMADEVICES is not set
# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
#
# File systems
CONFIG_EXT2_FS=m
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT2_FS_XIP is not set
-CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS=m
CONFIG_EXT3_FS_XATTR=y
# CONFIG_EXT3_FS_POSIX_ACL is not set
# CONFIG_EXT3_FS_SECURITY is not set
-# CONFIG_EXT4DEV_FS is not set
-CONFIG_JBD=y
+CONFIG_EXT4_FS=y
+# CONFIG_EXT4DEV_COMPAT is not set
+CONFIG_EXT4_FS_XATTR=y
+# CONFIG_EXT4_FS_POSIX_ACL is not set
+# CONFIG_EXT4_FS_SECURITY is not set
+CONFIG_JBD=m
# CONFIG_JBD_DEBUG is not set
+CONFIG_JBD2=y
+# CONFIG_JBD2_DEBUG is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
CONFIG_DNOTIFY=y
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
CONFIG_QUOTA=y
# CONFIG_QUOTA_NETLINK_INTERFACE is not set
CONFIG_PRINT_QUOTA_WARNING=y
+CONFIG_QUOTA_TREE=y
# CONFIG_QFMT_V1 is not set
CONFIG_QFMT_V2=y
CONFIG_QUOTACTL=y
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
CONFIG_HUGETLBFS=y
CONFIG_HUGETLB_PAGE=y
# CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_OMFS_FS is not set
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
CONFIG_RPCSEC_GSS_KRB5=y
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# Library routines
#
CONFIG_BITREVERSE=y
-# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_CRC_CCITT=m
-# CONFIG_CRC16 is not set
+CONFIG_CRC16=y
CONFIG_CRC_T10DIF=y
CONFIG_CRC_ITU_T=m
CONFIG_CRC32=y
CONFIG_DEBUG_MEMORY_INIT=y
CONFIG_DEBUG_LIST=y
# CONFIG_DEBUG_SG is not set
-CONFIG_FRAME_POINTER=y
+# CONFIG_DEBUG_NOTIFIERS is not set
# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_FAULT_INJECTION is not set
# CONFIG_LATENCYTOP is not set
CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_HAVE_FTRACE=y
+CONFIG_NOP_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
-# CONFIG_FTRACE is not set
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_RING_BUFFER=y
+CONFIG_TRACING=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
# CONFIG_IRQSOFF_TRACER is not set
# CONFIG_SCHED_TRACER is not set
# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_FTRACE_STARTUP_TEST is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
+CONFIG_PRINT_STACK_DEPTH=64
CONFIG_DEBUG_STACKOVERFLOW=y
# CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_DEBUG_PAGEALLOC is not set
# CONFIG_CODE_PATCHING_SELFTEST is not set
# CONFIG_FTR_FIXUP_SELFTEST is not set
+# CONFIG_MSI_BITMAP_SELFTEST is not set
# CONFIG_XMON is not set
CONFIG_IRQSTACKS=y
# CONFIG_VIRQ_DEBUG is not set
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
CONFIG_CRYPTO=y
#
# Crypto core or helper
#
+# CONFIG_CRYPTO_FIPS is not set
CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
CONFIG_CRYPTO_AEAD=m
+CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG=m
+CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
CONFIG_CRYPTO_GF128MUL=m
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_CRYPTD is not set
#
# CONFIG_CRYPTO_DEFLATE is not set
CONFIG_CRYPTO_LZO=m
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_HW=y
# CONFIG_PPC_CLOCK is not set
# CONFIG_VIRTUALIZATION is not set
/* We need to mark all pages as being coherent if we're SMP or we have a
* 74[45]x and an MPC107 host bridge. Also 83xx and PowerQUICC II
* require it for PCI "streaming/prefetch" to work properly.
+ * This is also required by 52xx family.
*/
#if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE) \
- || defined(CONFIG_PPC_83xx) || defined(CONFIG_8260)
+ || defined(CONFIG_PPC_83xx) || defined(CONFIG_8260) \
+ || defined(CONFIG_PPC_MPC52xx)
#define CPU_FTR_COMMON CPU_FTR_NEED_COHERENT
#else
#define CPU_FTR_COMMON 0
and r1,r1,r2 /* writable if _RW and _DIRTY */
rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */
rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */
- ori r1,r1,0xe14 /* clear out reserved bits and M */
+ ori r1,r1,0xe04 /* clear out reserved bits */
andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */
+BEGIN_FTR_SECTION
+ rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */
+END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
mtspr SPRN_RPA,r1
mfspr r3,SPRN_IMISS
tlbli r3
and r1,r1,r2 /* writable if _RW and _DIRTY */
rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */
rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */
- ori r1,r1,0xe14 /* clear out reserved bits and M */
+ ori r1,r1,0xe04 /* clear out reserved bits */
andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */
+BEGIN_FTR_SECTION
+ rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */
+END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
mtspr SPRN_RPA,r1
mfspr r3,SPRN_DMISS
tlbld r3
stw r3,0(r2) /* update PTE (accessed/dirty bits) */
/* Convert linux-style PTE to low word of PPC-style PTE */
rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */
- li r1,0xe15 /* clear out reserved bits and M */
+ li r1,0xe05 /* clear out reserved bits & PP lsb */
andc r1,r3,r1 /* PP = user? 2: 0 */
+BEGIN_FTR_SECTION
+ rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */
+END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
mtspr SPRN_RPA,r1
mfspr r3,SPRN_DMISS
tlbld r3
be disabled on the kernel command line using "ps3flash=off", to
not allocate this fixed buffer.
+config PS3_VRAM
+ tristate "PS3 Video RAM Storage Driver"
+ depends on FB_PS3=y && BLOCK && m
+ help
+ This driver allows you to use excess PS3 video RAM as volatile
+ storage or system swap.
+
config PS3_LPM
tristate "PS3 Logical Performance Monitor support"
depends on PPC_PS3
#define MCL_CURRENT 1 /* lock all current mappings */
#define MCL_FUTURE 2 /* lock all future mappings */
+#if defined(__KERNEL__) && !defined(__ASSEMBLY__) && defined(CONFIG_64BIT)
+int s390_mmap_check(unsigned long addr, unsigned long len);
+#define arch_mmap_check(addr,len,flags) s390_mmap_check(addr,len)
+#endif
+
#endif /* __S390_MMAN_H__ */
extern int get_cpu_capability(unsigned int *);
/*
- * User space process size: 2GB for 31 bit, 4TB for 64 bit.
+ * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
*/
#ifndef __s390x__
#else /* __s390x__ */
-#define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk,TIF_31BIT) ? \
- (1UL << 31) : (1UL << 53))
+#define TASK_SIZE_OF(tsk) ((tsk)->mm->context.asce_limit)
#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \
(1UL << 30) : (1UL << 41))
#define TASK_SIZE TASK_SIZE_OF(current)
};
#endif
+#define SD_MC_INIT SD_CPU_INIT
+
#include <asm-generic/topology.h>
#endif /* _ASM_S390_TOPOLOGY_H */
*
*/
+#include <asm/asm-offsets.h>
+
#ifndef CONFIG_64BIT
.globl _mcount
_mcount:
ahi %r15,-96
l %r3,100(%r15)
la %r2,0(%r14)
- st %r1,0(%r15)
+ st %r1,__SF_BACKCHAIN(%r15)
la %r3,0(%r3)
bras %r14,0f
.long ftrace_trace_function
stg %r14,112(%r15)
lgr %r1,%r15
aghi %r15,-160
- stg %r1,0(%r15)
+ stg %r1,__SF_BACKCHAIN(%r15)
lgr %r2,%r14
lg %r3,168(%r15)
larl %r14,ftrace_trace_function
" clr %0,%3\n"
" jl 0f\n"
" slr %0,%3\n"
- " alr %1,%2\n"
+ " ahi %1,1\n"
"0:\n"
: "+d" (reg2), "+d" (reg3), "=d" (tmp)
: "d" (base), "2" (1UL) : "cc" );
goto fault;
pfn = pte_pfn(*pte);
- if (!pfn_valid(pfn))
- goto out;
offset = uaddr & (PAGE_SIZE - 1);
size = min(n - done, PAGE_SIZE - offset);
done += size;
uaddr += size;
} while (done < n);
-out:
spin_unlock(&mm->page_table_lock);
return n - done;
fault:
goto fault;
pfn = pte_pfn(*pte);
- if (!pfn_valid(pfn))
- goto out;
-
ret = (pfn << PAGE_SHIFT) + (uaddr & (PAGE_SIZE - 1));
out:
return ret;
goto fault;
pfn = pte_pfn(*pte);
- if (!pfn_valid(pfn)) {
- done = -1;
- goto out;
- }
-
offset = uaddr & (PAGE_SIZE-1);
addr = (char *)(pfn << PAGE_SHIFT) + offset;
len = min(count - done, PAGE_SIZE - offset);
done += len_str;
uaddr += len_str;
} while ((len_str == len) && (done < count));
-out:
spin_unlock(&mm->page_table_lock);
return done + 1;
fault:
}
pfn_from = pte_pfn(*pte_from);
- if (!pfn_valid(pfn_from))
- goto out;
pfn_to = pte_pfn(*pte_to);
- if (!pfn_valid(pfn_to))
- goto out;
-
offset_from = uaddr_from & (PAGE_SIZE-1);
offset_to = uaddr_from & (PAGE_SIZE-1);
offset_max = max(offset_from, offset_to);
uaddr_from += size;
uaddr_to += size;
} while (done < n);
-out:
spin_unlock(&mm->page_table_lock);
return n - done;
fault:
* Leave an at least ~128 MB hole.
*/
#define MIN_GAP (128*1024*1024)
-#define MAX_GAP (TASK_SIZE/6*5)
+#define MAX_GAP (STACK_TOP/6*5)
static inline unsigned long mmap_base(void)
{
else if (gap > MAX_GAP)
gap = MAX_GAP;
- return TASK_SIZE - (gap & PAGE_MASK);
+ return STACK_TOP - (gap & PAGE_MASK);
}
static inline int mmap_is_legacy(void)
#else
+int s390_mmap_check(unsigned long addr, unsigned long len)
+{
+ if (!test_thread_flag(TIF_31BIT) &&
+ len >= TASK_SIZE && TASK_SIZE < (1UL << 53))
+ return crst_table_upgrade(current->mm, 1UL << 53);
+ return 0;
+}
+
static unsigned long
s390_get_unmapped_area(struct file *filp, unsigned long addr,
unsigned long len, unsigned long pgoff, unsigned long flags)
{
struct mm_struct *mm = current->mm;
+ unsigned long area;
int rc;
- addr = arch_get_unmapped_area(filp, addr, len, pgoff, flags);
- if (addr & ~PAGE_MASK)
- return addr;
- if (unlikely(mm->context.asce_limit < addr + len)) {
- rc = crst_table_upgrade(mm, addr + len);
+ area = arch_get_unmapped_area(filp, addr, len, pgoff, flags);
+ if (!(area & ~PAGE_MASK))
+ return area;
+ if (area == -ENOMEM &&
+ !test_thread_flag(TIF_31BIT) && TASK_SIZE < (1UL << 53)) {
+ /* Upgrade the page table to 4 levels and retry. */
+ rc = crst_table_upgrade(mm, 1UL << 53);
if (rc)
return (unsigned long) rc;
+ area = arch_get_unmapped_area(filp, addr, len, pgoff, flags);
}
- return addr;
+ return area;
}
static unsigned long
-s390_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
+s390_get_unmapped_area_topdown(struct file *filp, const unsigned long addr,
const unsigned long len, const unsigned long pgoff,
const unsigned long flags)
{
struct mm_struct *mm = current->mm;
- unsigned long addr = addr0;
+ unsigned long area;
int rc;
- addr = arch_get_unmapped_area_topdown(filp, addr, len, pgoff, flags);
- if (addr & ~PAGE_MASK)
- return addr;
- if (unlikely(mm->context.asce_limit < addr + len)) {
- rc = crst_table_upgrade(mm, addr + len);
+ area = arch_get_unmapped_area_topdown(filp, addr, len, pgoff, flags);
+ if (!(area & ~PAGE_MASK))
+ return area;
+ if (area == -ENOMEM &&
+ !test_thread_flag(TIF_31BIT) && TASK_SIZE < (1UL << 53)) {
+ /* Upgrade the page table to 4 levels and retry. */
+ rc = crst_table_upgrade(mm, 1UL << 53);
if (rc)
return (unsigned long) rc;
+ area = arch_get_unmapped_area_topdown(filp, addr, len,
+ pgoff, flags);
}
- return addr;
+ return area;
}
/*
* This function, called very early during the creation of a new
crst_table_init(table, entry);
pgd_populate(mm, (pgd_t *) table, (pud_t *) pgd);
mm->pgd = (pgd_t *) table;
+ mm->task_size = mm->context.asce_limit;
table = NULL;
}
spin_unlock(&mm->page_table_lock);
BUG();
}
mm->pgd = (pgd_t *) (pgd_val(*pgd) & _REGION_ENTRY_ORIGIN);
+ mm->task_size = mm->context.asce_limit;
crst_table_free(mm, (unsigned long *) pgd);
}
update_mm(mm, current);
#define PIL_DEVICE_IRQ 5
#define PIL_SMP_CALL_FUNC_SNGL 6
#define PIL_DEFERRED_PCR_WORK 7
+#define PIL_KGDB_CAPTURE 8
#define PIL_NORMAL_MAX 14
#define PIL_NMI 15
}
#ifdef CONFIG_SMP
-void smp_kgdb_capture_client(struct pt_regs *regs)
+void smp_kgdb_capture_client(int irq, struct pt_regs *regs)
{
unsigned long flags;
const u32 *vdma = of_get_property(pbm->op->node, "virtual-dma", NULL);
if (vdma) {
- struct resource *rp = kmalloc(sizeof(*rp), GFP_KERNEL);
+ struct resource *rp = kzalloc(sizeof(*rp), GFP_KERNEL);
if (!rp) {
prom_printf("Cannot allocate IOMMU resource.\n");
tl0_irq6: BTRAP(0x46)
#endif
tl0_irq7: TRAP_IRQ(deferred_pcr_work_irq, 7)
-tl0_irq8: BTRAP(0x48) BTRAP(0x49)
+#ifdef CONFIG_KGDB
+tl0_irq8: TRAP_IRQ(smp_kgdb_capture_client, 8)
+#else
+tl0_irq8: BTRAP(0x48)
+#endif
+tl0_irq9: BTRAP(0x49)
tl0_irq10: BTRAP(0x4a) BTRAP(0x4b) BTRAP(0x4c) BTRAP(0x4d)
tl0_irq14: TRAP_IRQ(timer_interrupt, 14)
tl0_irq15: TRAP_NMI_IRQ(perfctr_irq, 15)
#ifdef CONFIG_KGDB
.globl xcall_kgdb_capture
xcall_kgdb_capture:
-661: rdpr %pstate, %g2
- wrpr %g2, PSTATE_IG | PSTATE_AG, %pstate
- .section .sun4v_2insn_patch, "ax"
- .word 661b
- nop
- nop
- .previous
-
- rdpr %pil, %g2
- wrpr %g0, PIL_NORMAL_MAX, %pil
- sethi %hi(109f), %g7
- ba,pt %xcc, etrap_irq
-109: or %g7, %lo(109b), %g7
-#ifdef CONFIG_TRACE_IRQFLAGS
- call trace_hardirqs_off
- nop
-#endif
- call smp_kgdb_capture_client
- add %sp, PTREGS_OFF, %o0
- /* Has to be a non-v9 branch due to the large distance. */
- ba rtrap_xcall
- ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
+ wr %g0, (1 << PIL_KGDB_CAPTURE), %set_softint
+ retry
#endif
#endif /* CONFIG_SMP */
kprobe_opcode_t opcode;
kprobe_opcode_t *orig_opcodes = opcodes;
+ if (search_exception_tables(opcodes))
+ return 0; /* Page fault may occur on this address. */
+
retry:
if (opcodes - orig_opcodes > MAX_INSN_SIZE - 1)
return 0;
* use the TSC value at the transitions to calculate a pretty
* good value for the TSC frequencty.
*/
-static inline int pit_expect_msb(unsigned char val)
+static inline int pit_expect_msb(unsigned char val, u64 *tscp, unsigned long *deltap)
{
- int count = 0;
+ int count;
+ u64 tsc = 0;
for (count = 0; count < 50000; count++) {
/* Ignore LSB */
inb(0x42);
if (inb(0x42) != val)
break;
+ tsc = get_cycles();
}
- return count > 50;
+ *deltap = get_cycles() - tsc;
+ *tscp = tsc;
+
+ /*
+ * We require _some_ success, but the quality control
+ * will be based on the error terms on the TSC values.
+ */
+ return count > 5;
}
/*
- * How many MSB values do we want to see? We aim for a
- * 15ms calibration, which assuming a 2us counter read
- * error should give us roughly 150 ppm precision for
- * the calibration.
+ * How many MSB values do we want to see? We aim for
+ * a maximum error rate of 500ppm (in practice the
+ * real error is much smaller), but refuse to spend
+ * more than 25ms on it.
*/
-#define QUICK_PIT_MS 15
-#define QUICK_PIT_ITERATIONS (QUICK_PIT_MS * PIT_TICK_RATE / 1000 / 256)
+#define MAX_QUICK_PIT_MS 25
+#define MAX_QUICK_PIT_ITERATIONS (MAX_QUICK_PIT_MS * PIT_TICK_RATE / 1000 / 256)
static unsigned long quick_pit_calibrate(void)
{
+ int i;
+ u64 tsc, delta;
+ unsigned long d1, d2;
+
/* Set the Gate high, disable speaker */
outb((inb(0x61) & ~0x02) | 0x01, 0x61);
outb(0xff, 0x42);
outb(0xff, 0x42);
- if (pit_expect_msb(0xff)) {
- int i;
- u64 t1, t2, delta;
- unsigned char expect = 0xfe;
-
- t1 = get_cycles();
- for (i = 0; i < QUICK_PIT_ITERATIONS; i++, expect--) {
- if (!pit_expect_msb(expect))
- goto failed;
+ /*
+ * The PIT starts counting at the next edge, so we
+ * need to delay for a microsecond. The easiest way
+ * to do that is to just read back the 16-bit counter
+ * once from the PIT.
+ */
+ inb(0x42);
+ inb(0x42);
+
+ if (pit_expect_msb(0xff, &tsc, &d1)) {
+ for (i = 1; i <= MAX_QUICK_PIT_ITERATIONS; i++) {
+ if (!pit_expect_msb(0xff-i, &delta, &d2))
+ break;
+
+ /*
+ * Iterate until the error is less than 500 ppm
+ */
+ delta -= tsc;
+ if (d1+d2 < delta >> 11)
+ goto success;
}
- t2 = get_cycles();
-
- /*
- * Make sure we can rely on the second TSC timestamp:
- */
- if (!pit_expect_msb(expect))
- goto failed;
-
- /*
- * Ok, if we get here, then we've seen the
- * MSB of the PIT decrement QUICK_PIT_ITERATIONS
- * times, and each MSB had many hits, so we never
- * had any sudden jumps.
- *
- * As a result, we can depend on there not being
- * any odd delays anywhere, and the TSC reads are
- * reliable.
- *
- * kHz = ticks / time-in-seconds / 1000;
- * kHz = (t2 - t1) / (QPI * 256 / PIT_TICK_RATE) / 1000
- * kHz = ((t2 - t1) * PIT_TICK_RATE) / (QPI * 256 * 1000)
- */
- delta = (t2 - t1)*PIT_TICK_RATE;
- do_div(delta, QUICK_PIT_ITERATIONS*256*1000);
- printk("Fast TSC calibration using PIT\n");
- return delta;
}
-failed:
+ printk("Fast TSC calibration failed\n");
return 0;
+
+success:
+ /*
+ * Ok, if we get here, then we've seen the
+ * MSB of the PIT decrement 'i' times, and the
+ * error has shrunk to less than 500 ppm.
+ *
+ * As a result, we can depend on there not being
+ * any odd delays anywhere, and the TSC reads are
+ * reliable (within the error). We also adjust the
+ * delta to the middle of the error bars, just
+ * because it looks nicer.
+ *
+ * kHz = ticks / time-in-seconds / 1000;
+ * kHz = (t2 - t1) / (I * 256 / PIT_TICK_RATE) / 1000
+ * kHz = ((t2 - t1) * PIT_TICK_RATE) / (I * 256 * 1000)
+ */
+ delta += (long)(d2 - d1)/2;
+ delta *= PIT_TICK_RATE;
+ do_div(delta, i*256*1000);
+ printk("Fast TSC calibration using PIT\n");
+ return delta;
}
/**
acpi_status status = AE_OK;
extern acpi_status acpi_os_initialize1(void);
-
- status = acpi_os_initialize1();
+ acpi_os_initialize1();
status =
acpi_enable_subsystem(ACPI_NO_HARDWARE_INIT | ACPI_NO_ACPI_ENABLE);
goto error1;
}
- if (ACPI_FAILURE(status)) {
- printk(KERN_ERR PREFIX
- "Unable to initialize ACPI OS objects\n");
- goto error1;
- }
-
/*
* ACPI 2.0 requires the EC driver to be loaded and work before
* the EC device is found in the namespace (i.e. before acpi_initialize_objects()
int pxm, node = -1;
pxm = acpi_get_pxm(handle);
- if (pxm >= 0)
+ if (pxm >= 0 && pxm < MAX_PXM_DOMAINS)
node = acpi_map_pxm_to_node(pxm);
return node;
return AE_SUPPORT;
}
-#ifdef CONFIG_X86
-
-struct aml_port_desc {
- uint start;
- uint end;
- char* name;
- char warned;
-};
-
-static struct aml_port_desc aml_invalid_port_list[] = {
- {0x20, 0x21, "PIC0", 0},
- {0xA0, 0xA1, "PIC1", 0},
- {0x4D0, 0x4D1, "ELCR", 0}
-};
-
-/*
- * valid_aml_io_address()
- *
- * if valid, return true
- * else invalid, warn once, return false
- */
-static bool valid_aml_io_address(uint address, uint length)
-{
- int i;
- int entries = sizeof(aml_invalid_port_list) / sizeof(struct aml_port_desc);
-
- for (i = 0; i < entries; ++i) {
- if ((address >= aml_invalid_port_list[i].start &&
- address <= aml_invalid_port_list[i].end) ||
- (address + length >= aml_invalid_port_list[i].start &&
- address + length <= aml_invalid_port_list[i].end))
- {
- if (!aml_invalid_port_list[i].warned)
- {
- printk(KERN_ERR "ACPI: Denied BIOS AML access"
- " to invalid port 0x%x+0x%x (%s)\n",
- address, length,
- aml_invalid_port_list[i].name);
- aml_invalid_port_list[i].warned = 1;
- }
- return false; /* invalid */
- }
- }
- return true; /* valid */
-}
-#else
-static inline bool valid_aml_io_address(uint address, uint length) { return true; }
-#endif
/******************************************************************************
*
* FUNCTION: acpi_os_validate_address
switch (space_id) {
case ACPI_ADR_SPACE_SYSTEM_IO:
- if (!valid_aml_io_address(address, length))
- return AE_AML_ILLEGAL_ADDRESS;
case ACPI_ADR_SPACE_SYSTEM_MEMORY:
/* Only interference checks against SystemIO and SytemMemory
are needed */
DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
},
},
+ {
+ .callback = init_old_suspend_ordering,
+ .ident = "Asus Pundit P1-AH2 (M2N8L motherboard)",
+ .matches = {
+ DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTek Computer INC."),
+ DMI_MATCH(DMI_BOARD_NAME, "M2N8L"),
+ },
+ },
+ {
+ .callback = init_set_sci_en_on_resume,
+ .ident = "Toshiba Satellite L300",
+ .matches = {
+ DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+ DMI_MATCH(DMI_PRODUCT_NAME, "Satellite L300"),
+ },
+ },
{},
};
#endif /* CONFIG_SUSPEND */
return map;
}
+static bool piix_no_sidpr(struct ata_host *host)
+{
+ struct pci_dev *pdev = to_pci_dev(host->dev);
+
+ /*
+ * Samsung DB-P70 only has three ATA ports exposed and
+ * curiously the unconnected first port reports link online
+ * while not responding to SRST protocol causing excessive
+ * detection delay.
+ *
+ * Unfortunately, the system doesn't carry enough DMI
+ * information to identify the machine but does have subsystem
+ * vendor and device set. As it's unclear whether the
+ * subsystem vendor/device is used only for this specific
+ * board, the port can't be disabled solely with the
+ * information; however, turning off SIDPR access works around
+ * the problem. Turn it off.
+ *
+ * This problem is reported in bnc#441240.
+ *
+ * https://bugzilla.novell.com/show_bug.cgi?id=441420
+ */
+ if (pdev->vendor == PCI_VENDOR_ID_INTEL && pdev->device == 0x2920 &&
+ pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG &&
+ pdev->subsystem_device == 0xb049) {
+ dev_printk(KERN_WARNING, host->dev,
+ "Samsung DB-P70 detected, disabling SIDPR\n");
+ return true;
+ }
+
+ return false;
+}
+
static int __devinit piix_init_sidpr(struct ata_host *host)
{
struct pci_dev *pdev = to_pci_dev(host->dev);
if (hpriv->map[i] == IDE)
return 0;
+ /* is it blacklisted? */
+ if (piix_no_sidpr(host))
+ return 0;
+
if (!(host->ports[0]->flags & PIIX_FLAG_SIDPR))
return 0;
iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
udelay(20); /* FIXME: flush */
iowrite8(ap->ctl, ioaddr->ctl_addr);
+ ap->last_ctl = ap->ctl;
/* wait the port to become ready */
return ata_sff_wait_after_reset(&ap->link, devmask, deadline);
}
/* set up device control */
- if (ap->ioaddr.ctl_addr)
+ if (ap->ioaddr.ctl_addr) {
iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
+ ap->last_ctl = ap->ctl;
+ }
}
EXPORT_SYMBOL_GPL(ata_sff_postreset);
if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
/* set up device control for ATA_FLAG_SATA_RESET */
iowrite8(ap->ctl, ioaddr->ctl_addr);
+ ap->last_ctl = ap->ctl;
}
DPRINTK("EXIT\n");
else
handled = mv_host_intr(host, pending_irqs);
}
- spin_unlock(&host->lock);
/* for MSI: unmask; interrupt cause bits will retrigger now */
if (using_msi)
writel(hpriv->main_irq_mask, hpriv->main_irq_mask_addr);
+ spin_unlock(&host->lock);
+
return IRQ_RETVAL(handled);
}
obj-$(CONFIG_BLK_DEV_FD) += floppy.o
obj-$(CONFIG_AMIGA_FLOPPY) += amiflop.o
obj-$(CONFIG_PS3_DISK) += ps3disk.o
+obj-$(CONFIG_PS3_VRAM) += ps3vram.o
obj-$(CONFIG_ATARI_FLOPPY) += ataflop.o
obj-$(CONFIG_AMIGA_Z2RAM) += z2ram.o
obj-$(CONFIG_BLK_DEV_RAM) += brd.o
--- /dev/null
+/*
+ * ps3vram - Use extra PS3 video ram as MTD block device.
+ *
+ * Copyright 2009 Sony Corporation
+ *
+ * Based on the MTD ps3vram driver, which is
+ * Copyright (c) 2007-2008 Jim Paris <jim@jtan.com>
+ * Added support RSX DMA Vivien Chappelier <vivien.chappelier@free.fr>
+ */
+
+#include <linux/blkdev.h>
+#include <linux/delay.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+
+#include <asm/firmware.h>
+#include <asm/lv1call.h>
+#include <asm/ps3.h>
+
+
+#define DEVICE_NAME "ps3vram"
+
+
+#define XDR_BUF_SIZE (2 * 1024 * 1024) /* XDR buffer (must be 1MiB aligned) */
+#define XDR_IOIF 0x0c000000
+
+#define FIFO_BASE XDR_IOIF
+#define FIFO_SIZE (64 * 1024)
+
+#define DMA_PAGE_SIZE (4 * 1024)
+
+#define CACHE_PAGE_SIZE (256 * 1024)
+#define CACHE_PAGE_COUNT ((XDR_BUF_SIZE - FIFO_SIZE) / CACHE_PAGE_SIZE)
+
+#define CACHE_OFFSET CACHE_PAGE_SIZE
+#define FIFO_OFFSET 0
+
+#define CTRL_PUT 0x10
+#define CTRL_GET 0x11
+#define CTRL_TOP 0x15
+
+#define UPLOAD_SUBCH 1
+#define DOWNLOAD_SUBCH 2
+
+#define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c
+#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104
+
+#define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT 0x601
+
+#define CACHE_PAGE_PRESENT 1
+#define CACHE_PAGE_DIRTY 2
+
+struct ps3vram_tag {
+ unsigned int address;
+ unsigned int flags;
+};
+
+struct ps3vram_cache {
+ unsigned int page_count;
+ unsigned int page_size;
+ struct ps3vram_tag *tags;
+ unsigned int hit;
+ unsigned int miss;
+};
+
+struct ps3vram_priv {
+ struct request_queue *queue;
+ struct gendisk *gendisk;
+
+ u64 size;
+
+ u64 memory_handle;
+ u64 context_handle;
+ u32 *ctrl;
+ u32 *reports;
+ u8 __iomem *ddr_base;
+ u8 *xdr_buf;
+
+ u32 *fifo_base;
+ u32 *fifo_ptr;
+
+ struct ps3vram_cache cache;
+
+ /* Used to serialize cache/DMA operations */
+ struct mutex lock;
+};
+
+
+static int ps3vram_major;
+
+
+static struct block_device_operations ps3vram_fops = {
+ .owner = THIS_MODULE,
+};
+
+
+#define DMA_NOTIFIER_HANDLE_BASE 0x66604200 /* first DMA notifier handle */
+#define DMA_NOTIFIER_OFFSET_BASE 0x1000 /* first DMA notifier offset */
+#define DMA_NOTIFIER_SIZE 0x40
+#define NOTIFIER 7 /* notifier used for completion report */
+
+static char *size = "256M";
+module_param(size, charp, 0);
+MODULE_PARM_DESC(size, "memory size");
+
+static u32 *ps3vram_get_notifier(u32 *reports, int notifier)
+{
+ return (void *)reports + DMA_NOTIFIER_OFFSET_BASE +
+ DMA_NOTIFIER_SIZE * notifier;
+}
+
+static void ps3vram_notifier_reset(struct ps3_system_bus_device *dev)
+{
+ struct ps3vram_priv *priv = dev->core.driver_data;
+ u32 *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
+ int i;
+
+ for (i = 0; i < 4; i++)
+ notify[i] = 0xffffffff;
+}
+
+static int ps3vram_notifier_wait(struct ps3_system_bus_device *dev,
+ unsigned int timeout_ms)
+{
+ struct ps3vram_priv *priv = dev->core.driver_data;
+ u32 *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
+ unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
+
+ do {
+ if (!notify[3])
+ return 0;
+ msleep(1);
+ } while (time_before(jiffies, timeout));
+
+ return -ETIMEDOUT;
+}
+
+static void ps3vram_init_ring(struct ps3_system_bus_device *dev)
+{
+ struct ps3vram_priv *priv = dev->core.driver_data;
+
+ priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET;
+ priv->ctrl[CTRL_GET] = FIFO_BASE + FIFO_OFFSET;
+}
+
+static int ps3vram_wait_ring(struct ps3_system_bus_device *dev,
+ unsigned int timeout_ms)
+{
+ struct ps3vram_priv *priv = dev->core.driver_data;
+ unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
+
+ do {
+ if (priv->ctrl[CTRL_PUT] == priv->ctrl[CTRL_GET])
+ return 0;
+ msleep(1);
+ } while (time_before(jiffies, timeout));
+
+ dev_warn(&dev->core, "FIFO timeout (%08x/%08x/%08x)\n",
+ priv->ctrl[CTRL_PUT], priv->ctrl[CTRL_GET],
+ priv->ctrl[CTRL_TOP]);
+
+ return -ETIMEDOUT;
+}
+
+static void ps3vram_out_ring(struct ps3vram_priv *priv, u32 data)
+{
+ *(priv->fifo_ptr)++ = data;
+}
+
+static void ps3vram_begin_ring(struct ps3vram_priv *priv, u32 chan, u32 tag,
+ u32 size)
+{
+ ps3vram_out_ring(priv, (size << 18) | (chan << 13) | tag);
+}
+
+static void ps3vram_rewind_ring(struct ps3_system_bus_device *dev)
+{
+ struct ps3vram_priv *priv = dev->core.driver_data;
+ int status;
+
+ ps3vram_out_ring(priv, 0x20000000 | (FIFO_BASE + FIFO_OFFSET));
+
+ priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET;
+
+ /* asking the HV for a blit will kick the FIFO */
+ status = lv1_gpu_context_attribute(priv->context_handle,
+ L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT, 0,
+ 0, 0, 0);
+ if (status)
+ dev_err(&dev->core,
+ "%s: lv1_gpu_context_attribute failed %d\n", __func__,
+ status);
+
+ priv->fifo_ptr = priv->fifo_base;
+}
+
+static void ps3vram_fire_ring(struct ps3_system_bus_device *dev)
+{
+ struct ps3vram_priv *priv = dev->core.driver_data;
+ int status;
+
+ mutex_lock(&ps3_gpu_mutex);
+
+ priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET +
+ (priv->fifo_ptr - priv->fifo_base) * sizeof(u32);
+
+ /* asking the HV for a blit will kick the FIFO */
+ status = lv1_gpu_context_attribute(priv->context_handle,
+ L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT, 0,
+ 0, 0, 0);
+ if (status)
+ dev_err(&dev->core,
+ "%s: lv1_gpu_context_attribute failed %d\n", __func__,
+ status);
+
+ if ((priv->fifo_ptr - priv->fifo_base) * sizeof(u32) >
+ FIFO_SIZE - 1024) {
+ dev_dbg(&dev->core, "FIFO full, rewinding\n");
+ ps3vram_wait_ring(dev, 200);
+ ps3vram_rewind_ring(dev);
+ }
+
+ mutex_unlock(&ps3_gpu_mutex);
+}
+
+static void ps3vram_bind(struct ps3_system_bus_device *dev)
+{
+ struct ps3vram_priv *priv = dev->core.driver_data;
+
+ ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0, 1);
+ ps3vram_out_ring(priv, 0x31337303);
+ ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x180, 3);
+ ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
+ ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
+ ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
+
+ ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0, 1);
+ ps3vram_out_ring(priv, 0x3137c0de);
+ ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x180, 3);
+ ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
+ ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
+ ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
+
+ ps3vram_fire_ring(dev);
+}
+
+static int ps3vram_upload(struct ps3_system_bus_device *dev,
+ unsigned int src_offset, unsigned int dst_offset,
+ int len, int count)
+{
+ struct ps3vram_priv *priv = dev->core.driver_data;
+
+ ps3vram_begin_ring(priv, UPLOAD_SUBCH,
+ NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
+ ps3vram_out_ring(priv, XDR_IOIF + src_offset);
+ ps3vram_out_ring(priv, dst_offset);
+ ps3vram_out_ring(priv, len);
+ ps3vram_out_ring(priv, len);
+ ps3vram_out_ring(priv, len);
+ ps3vram_out_ring(priv, count);
+ ps3vram_out_ring(priv, (1 << 8) | 1);
+ ps3vram_out_ring(priv, 0);
+
+ ps3vram_notifier_reset(dev);
+ ps3vram_begin_ring(priv, UPLOAD_SUBCH,
+ NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
+ ps3vram_out_ring(priv, 0);
+ ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x100, 1);
+ ps3vram_out_ring(priv, 0);
+ ps3vram_fire_ring(dev);
+ if (ps3vram_notifier_wait(dev, 200) < 0) {
+ dev_warn(&dev->core, "%s: Notifier timeout\n", __func__);
+ return -1;
+ }
+
+ return 0;
+}
+
+static int ps3vram_download(struct ps3_system_bus_device *dev,
+ unsigned int src_offset, unsigned int dst_offset,
+ int len, int count)
+{
+ struct ps3vram_priv *priv = dev->core.driver_data;
+
+ ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
+ NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
+ ps3vram_out_ring(priv, src_offset);
+ ps3vram_out_ring(priv, XDR_IOIF + dst_offset);
+ ps3vram_out_ring(priv, len);
+ ps3vram_out_ring(priv, len);
+ ps3vram_out_ring(priv, len);
+ ps3vram_out_ring(priv, count);
+ ps3vram_out_ring(priv, (1 << 8) | 1);
+ ps3vram_out_ring(priv, 0);
+
+ ps3vram_notifier_reset(dev);
+ ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
+ NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
+ ps3vram_out_ring(priv, 0);
+ ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x100, 1);
+ ps3vram_out_ring(priv, 0);
+ ps3vram_fire_ring(dev);
+ if (ps3vram_notifier_wait(dev, 200) < 0) {
+ dev_warn(&dev->core, "%s: Notifier timeout\n", __func__);
+ return -1;
+ }
+
+ return 0;
+}
+
+static void ps3vram_cache_evict(struct ps3_system_bus_device *dev, int entry)
+{
+ struct ps3vram_priv *priv = dev->core.driver_data;
+ struct ps3vram_cache *cache = &priv->cache;
+
+ if (!(cache->tags[entry].flags & CACHE_PAGE_DIRTY))
+ return;
+
+ dev_dbg(&dev->core, "Flushing %d: 0x%08x\n", entry,
+ cache->tags[entry].address);
+ if (ps3vram_upload(dev, CACHE_OFFSET + entry * cache->page_size,
+ cache->tags[entry].address, DMA_PAGE_SIZE,
+ cache->page_size / DMA_PAGE_SIZE) < 0) {
+ dev_err(&dev->core,
+ "Failed to upload from 0x%x to " "0x%x size 0x%x\n",
+ entry * cache->page_size, cache->tags[entry].address,
+ cache->page_size);
+ }
+ cache->tags[entry].flags &= ~CACHE_PAGE_DIRTY;
+}
+
+static void ps3vram_cache_load(struct ps3_system_bus_device *dev, int entry,
+ unsigned int address)
+{
+ struct ps3vram_priv *priv = dev->core.driver_data;
+ struct ps3vram_cache *cache = &priv->cache;
+
+ dev_dbg(&dev->core, "Fetching %d: 0x%08x\n", entry, address);
+ if (ps3vram_download(dev, address,
+ CACHE_OFFSET + entry * cache->page_size,
+ DMA_PAGE_SIZE,
+ cache->page_size / DMA_PAGE_SIZE) < 0) {
+ dev_err(&dev->core,
+ "Failed to download from 0x%x to 0x%x size 0x%x\n",
+ address, entry * cache->page_size, cache->page_size);
+ }
+
+ cache->tags[entry].address = address;
+ cache->tags[entry].flags |= CACHE_PAGE_PRESENT;
+}
+
+
+static void ps3vram_cache_flush(struct ps3_system_bus_device *dev)
+{
+ struct ps3vram_priv *priv = dev->core.driver_data;
+ struct ps3vram_cache *cache = &priv->cache;
+ int i;
+
+ dev_dbg(&dev->core, "FLUSH\n");
+ for (i = 0; i < cache->page_count; i++) {
+ ps3vram_cache_evict(dev, i);
+ cache->tags[i].flags = 0;
+ }
+}
+
+static unsigned int ps3vram_cache_match(struct ps3_system_bus_device *dev,
+ loff_t address)
+{
+ struct ps3vram_priv *priv = dev->core.driver_data;
+ struct ps3vram_cache *cache = &priv->cache;
+ unsigned int base;
+ unsigned int offset;
+ int i;
+ static int counter;
+
+ offset = (unsigned int) (address & (cache->page_size - 1));
+ base = (unsigned int) (address - offset);
+
+ /* fully associative check */
+ for (i = 0; i < cache->page_count; i++) {
+ if ((cache->tags[i].flags & CACHE_PAGE_PRESENT) &&
+ cache->tags[i].address == base) {
+ cache->hit++;
+ dev_dbg(&dev->core, "Found entry %d: 0x%08x\n", i,
+ cache->tags[i].address);
+ return i;
+ }
+ }
+
+ /* choose a random entry */
+ i = (jiffies + (counter++)) % cache->page_count;
+ dev_dbg(&dev->core, "Using entry %d\n", i);
+
+ ps3vram_cache_evict(dev, i);
+ ps3vram_cache_load(dev, i, base);
+
+ cache->miss++;
+ return i;
+}
+
+static int ps3vram_cache_init(struct ps3_system_bus_device *dev)
+{
+ struct ps3vram_priv *priv = dev->core.driver_data;
+
+ priv->cache.page_count = CACHE_PAGE_COUNT;
+ priv->cache.page_size = CACHE_PAGE_SIZE;
+ priv->cache.tags = kzalloc(sizeof(struct ps3vram_tag) *
+ CACHE_PAGE_COUNT, GFP_KERNEL);
+ if (priv->cache.tags == NULL) {
+ dev_err(&dev->core, "Could not allocate cache tags\n");
+ return -ENOMEM;
+ }
+
+ dev_info(&dev->core, "Created ram cache: %d entries, %d KiB each\n",
+ CACHE_PAGE_COUNT, CACHE_PAGE_SIZE / 1024);
+
+ return 0;
+}
+
+static void ps3vram_cache_cleanup(struct ps3_system_bus_device *dev)
+{
+ struct ps3vram_priv *priv = dev->core.driver_data;
+
+ ps3vram_cache_flush(dev);
+ kfree(priv->cache.tags);
+}
+
+static int ps3vram_read(struct ps3_system_bus_device *dev, loff_t from,
+ size_t len, size_t *retlen, u_char *buf)
+{
+ struct ps3vram_priv *priv = dev->core.driver_data;
+ unsigned int cached, count;
+
+ dev_dbg(&dev->core, "%s: from=0x%08x len=0x%zx\n", __func__,
+ (unsigned int)from, len);
+
+ if (from >= priv->size)
+ return -EIO;
+
+ if (len > priv->size - from)
+ len = priv->size - from;
+
+ /* Copy from vram to buf */
+ count = len;
+ while (count) {
+ unsigned int offset, avail;
+ unsigned int entry;
+
+ offset = (unsigned int) (from & (priv->cache.page_size - 1));
+ avail = priv->cache.page_size - offset;
+
+ mutex_lock(&priv->lock);
+
+ entry = ps3vram_cache_match(dev, from);
+ cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
+
+ dev_dbg(&dev->core, "%s: from=%08x cached=%08x offset=%08x "
+ "avail=%08x count=%08x\n", __func__,
+ (unsigned int)from, cached, offset, avail, count);
+
+ if (avail > count)
+ avail = count;
+ memcpy(buf, priv->xdr_buf + cached, avail);
+
+ mutex_unlock(&priv->lock);
+
+ buf += avail;
+ count -= avail;
+ from += avail;
+ }
+
+ *retlen = len;
+ return 0;
+}
+
+static int ps3vram_write(struct ps3_system_bus_device *dev, loff_t to,
+ size_t len, size_t *retlen, const u_char *buf)
+{
+ struct ps3vram_priv *priv = dev->core.driver_data;
+ unsigned int cached, count;
+
+ if (to >= priv->size)
+ return -EIO;
+
+ if (len > priv->size - to)
+ len = priv->size - to;
+
+ /* Copy from buf to vram */
+ count = len;
+ while (count) {
+ unsigned int offset, avail;
+ unsigned int entry;
+
+ offset = (unsigned int) (to & (priv->cache.page_size - 1));
+ avail = priv->cache.page_size - offset;
+
+ mutex_lock(&priv->lock);
+
+ entry = ps3vram_cache_match(dev, to);
+ cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
+
+ dev_dbg(&dev->core, "%s: to=%08x cached=%08x offset=%08x "
+ "avail=%08x count=%08x\n", __func__, (unsigned int)to,
+ cached, offset, avail, count);
+
+ if (avail > count)
+ avail = count;
+ memcpy(priv->xdr_buf + cached, buf, avail);
+
+ priv->cache.tags[entry].flags |= CACHE_PAGE_DIRTY;
+
+ mutex_unlock(&priv->lock);
+
+ buf += avail;
+ count -= avail;
+ to += avail;
+ }
+
+ *retlen = len;
+ return 0;
+}
+
+static int ps3vram_proc_show(struct seq_file *m, void *v)
+{
+ struct ps3vram_priv *priv = m->private;
+
+ seq_printf(m, "hit:%u\nmiss:%u\n", priv->cache.hit, priv->cache.miss);
+ return 0;
+}
+
+static int ps3vram_proc_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, ps3vram_proc_show, PDE(inode)->data);
+}
+
+static const struct file_operations ps3vram_proc_fops = {
+ .owner = THIS_MODULE,
+ .open = ps3vram_proc_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
+static void __devinit ps3vram_proc_init(struct ps3_system_bus_device *dev)
+{
+ struct ps3vram_priv *priv = dev->core.driver_data;
+ struct proc_dir_entry *pde;
+
+ pde = proc_create(DEVICE_NAME, 0444, NULL, &ps3vram_proc_fops);
+ if (!pde) {
+ dev_warn(&dev->core, "failed to create /proc entry\n");
+ return;
+ }
+
+ pde->owner = THIS_MODULE;
+ pde->data = priv;
+}
+
+static int ps3vram_make_request(struct request_queue *q, struct bio *bio)
+{
+ struct ps3_system_bus_device *dev = q->queuedata;
+ int write = bio_data_dir(bio) == WRITE;
+ const char *op = write ? "write" : "read";
+ loff_t offset = bio->bi_sector << 9;
+ int error = 0;
+ struct bio_vec *bvec;
+ unsigned int i;
+
+ dev_dbg(&dev->core, "%s\n", __func__);
+
+ bio_for_each_segment(bvec, bio, i) {
+ /* PS3 is ppc64, so we don't handle highmem */
+ char *ptr = page_address(bvec->bv_page) + bvec->bv_offset;
+ size_t len = bvec->bv_len, retlen;
+
+ dev_dbg(&dev->core, " %s %zu bytes at offset %llu\n", op,
+ len, offset);
+ if (write)
+ error = ps3vram_write(dev, offset, len, &retlen, ptr);
+ else
+ error = ps3vram_read(dev, offset, len, &retlen, ptr);
+
+ if (error) {
+ dev_err(&dev->core, "%s failed\n", op);
+ goto out;
+ }
+
+ if (retlen != len) {
+ dev_err(&dev->core, "Short %s\n", op);
+ goto out;
+ }
+
+ offset += len;
+ }
+
+ dev_dbg(&dev->core, "%s completed\n", op);
+
+out:
+ bio_endio(bio, error);
+ return 0;
+}
+
+static int __devinit ps3vram_probe(struct ps3_system_bus_device *dev)
+{
+ struct ps3vram_priv *priv;
+ int error, status;
+ struct request_queue *queue;
+ struct gendisk *gendisk;
+ u64 ddr_lpar, ctrl_lpar, info_lpar, reports_lpar, ddr_size,
+ reports_size;
+ char *rest;
+
+ priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+ if (!priv) {
+ error = -ENOMEM;
+ goto fail;
+ }
+
+ mutex_init(&priv->lock);
+ dev->core.driver_data = priv;
+
+ priv = dev->core.driver_data;
+
+ /* Allocate XDR buffer (1MiB aligned) */
+ priv->xdr_buf = (void *)__get_free_pages(GFP_KERNEL,
+ get_order(XDR_BUF_SIZE));
+ if (priv->xdr_buf == NULL) {
+ dev_err(&dev->core, "Could not allocate XDR buffer\n");
+ error = -ENOMEM;
+ goto fail_free_priv;
+ }
+
+ /* Put FIFO at begginning of XDR buffer */
+ priv->fifo_base = (u32 *) (priv->xdr_buf + FIFO_OFFSET);
+ priv->fifo_ptr = priv->fifo_base;
+
+ /* XXX: Need to open GPU, in case ps3fb or snd_ps3 aren't loaded */
+ if (ps3_open_hv_device(dev)) {
+ dev_err(&dev->core, "ps3_open_hv_device failed\n");
+ error = -EAGAIN;
+ goto out_close_gpu;
+ }
+
+ /* Request memory */
+ status = -1;
+ ddr_size = ALIGN(memparse(size, &rest), 1024*1024);
+ if (!ddr_size) {
+ dev_err(&dev->core, "Specified size is too small\n");
+ error = -EINVAL;
+ goto out_close_gpu;
+ }
+
+ while (ddr_size > 0) {
+ status = lv1_gpu_memory_allocate(ddr_size, 0, 0, 0, 0,
+ &priv->memory_handle,
+ &ddr_lpar);
+ if (!status)
+ break;
+ ddr_size -= 1024*1024;
+ }
+ if (status) {
+ dev_err(&dev->core, "lv1_gpu_memory_allocate failed %d\n",
+ status);
+ error = -ENOMEM;
+ goto out_free_xdr_buf;
+ }
+
+ /* Request context */
+ status = lv1_gpu_context_allocate(priv->memory_handle, 0,
+ &priv->context_handle, &ctrl_lpar,
+ &info_lpar, &reports_lpar,
+ &reports_size);
+ if (status) {
+ dev_err(&dev->core, "lv1_gpu_context_allocate failed %d\n",
+ status);
+ error = -ENOMEM;
+ goto out_free_memory;
+ }
+
+ /* Map XDR buffer to RSX */
+ status = lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF,
+ ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)),
+ XDR_BUF_SIZE, 0);
+ if (status) {
+ dev_err(&dev->core, "lv1_gpu_context_iomap failed %d\n",
+ status);
+ error = -ENOMEM;
+ goto out_free_context;
+ }
+
+ priv->ddr_base = ioremap_flags(ddr_lpar, ddr_size, _PAGE_NO_CACHE);
+
+ if (!priv->ddr_base) {
+ dev_err(&dev->core, "ioremap DDR failed\n");
+ error = -ENOMEM;
+ goto out_free_context;
+ }
+
+ priv->ctrl = ioremap(ctrl_lpar, 64 * 1024);
+ if (!priv->ctrl) {
+ dev_err(&dev->core, "ioremap CTRL failed\n");
+ error = -ENOMEM;
+ goto out_unmap_vram;
+ }
+
+ priv->reports = ioremap(reports_lpar, reports_size);
+ if (!priv->reports) {
+ dev_err(&dev->core, "ioremap REPORTS failed\n");
+ error = -ENOMEM;
+ goto out_unmap_ctrl;
+ }
+
+ mutex_lock(&ps3_gpu_mutex);
+ ps3vram_init_ring(dev);
+ mutex_unlock(&ps3_gpu_mutex);
+
+ priv->size = ddr_size;
+
+ ps3vram_bind(dev);
+
+ mutex_lock(&ps3_gpu_mutex);
+ error = ps3vram_wait_ring(dev, 100);
+ mutex_unlock(&ps3_gpu_mutex);
+ if (error < 0) {
+ dev_err(&dev->core, "Failed to initialize channels\n");
+ error = -ETIMEDOUT;
+ goto out_unmap_reports;
+ }
+
+ ps3vram_cache_init(dev);
+ ps3vram_proc_init(dev);
+
+ queue = blk_alloc_queue(GFP_KERNEL);
+ if (!queue) {
+ dev_err(&dev->core, "blk_alloc_queue failed\n");
+ error = -ENOMEM;
+ goto out_cache_cleanup;
+ }
+
+ priv->queue = queue;
+ queue->queuedata = dev;
+ blk_queue_make_request(queue, ps3vram_make_request);
+ blk_queue_max_phys_segments(queue, MAX_PHYS_SEGMENTS);
+ blk_queue_max_hw_segments(queue, MAX_HW_SEGMENTS);
+ blk_queue_max_segment_size(queue, MAX_SEGMENT_SIZE);
+ blk_queue_max_sectors(queue, SAFE_MAX_SECTORS);
+
+ gendisk = alloc_disk(1);
+ if (!gendisk) {
+ dev_err(&dev->core, "alloc_disk failed\n");
+ error = -ENOMEM;
+ goto fail_cleanup_queue;
+ }
+
+ priv->gendisk = gendisk;
+ gendisk->major = ps3vram_major;
+ gendisk->first_minor = 0;
+ gendisk->fops = &ps3vram_fops;
+ gendisk->queue = queue;
+ gendisk->private_data = dev;
+ gendisk->driverfs_dev = &dev->core;
+ strlcpy(gendisk->disk_name, DEVICE_NAME, sizeof(gendisk->disk_name));
+ set_capacity(gendisk, priv->size >> 9);
+
+ dev_info(&dev->core, "%s: Using %lu MiB of GPU memory\n",
+ gendisk->disk_name, get_capacity(gendisk) >> 11);
+
+ add_disk(gendisk);
+ return 0;
+
+fail_cleanup_queue:
+ blk_cleanup_queue(queue);
+out_cache_cleanup:
+ remove_proc_entry(DEVICE_NAME, NULL);
+ ps3vram_cache_cleanup(dev);
+out_unmap_reports:
+ iounmap(priv->reports);
+out_unmap_ctrl:
+ iounmap(priv->ctrl);
+out_unmap_vram:
+ iounmap(priv->ddr_base);
+out_free_context:
+ lv1_gpu_context_free(priv->context_handle);
+out_free_memory:
+ lv1_gpu_memory_free(priv->memory_handle);
+out_close_gpu:
+ ps3_close_hv_device(dev);
+out_free_xdr_buf:
+ free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
+fail_free_priv:
+ kfree(priv);
+ dev->core.driver_data = NULL;
+fail:
+ return error;
+}
+
+static int ps3vram_remove(struct ps3_system_bus_device *dev)
+{
+ struct ps3vram_priv *priv = dev->core.driver_data;
+
+ del_gendisk(priv->gendisk);
+ put_disk(priv->gendisk);
+ blk_cleanup_queue(priv->queue);
+ remove_proc_entry(DEVICE_NAME, NULL);
+ ps3vram_cache_cleanup(dev);
+ iounmap(priv->reports);
+ iounmap(priv->ctrl);
+ iounmap(priv->ddr_base);
+ lv1_gpu_context_free(priv->context_handle);
+ lv1_gpu_memory_free(priv->memory_handle);
+ ps3_close_hv_device(dev);
+ free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
+ kfree(priv);
+ dev->core.driver_data = NULL;
+ return 0;
+}
+
+static struct ps3_system_bus_driver ps3vram = {
+ .match_id = PS3_MATCH_ID_GPU,
+ .match_sub_id = PS3_MATCH_SUB_ID_GPU_RAMDISK,
+ .core.name = DEVICE_NAME,
+ .core.owner = THIS_MODULE,
+ .probe = ps3vram_probe,
+ .remove = ps3vram_remove,
+ .shutdown = ps3vram_remove,
+};
+
+
+static int __init ps3vram_init(void)
+{
+ int error;
+
+ if (!firmware_has_feature(FW_FEATURE_PS3_LV1))
+ return -ENODEV;
+
+ error = register_blkdev(0, DEVICE_NAME);
+ if (error <= 0) {
+ pr_err("%s: register_blkdev failed %d\n", DEVICE_NAME, error);
+ return error;
+ }
+ ps3vram_major = error;
+
+ pr_info("%s: registered block device major %d\n", DEVICE_NAME,
+ ps3vram_major);
+
+ error = ps3_system_bus_driver_register(&ps3vram);
+ if (error)
+ unregister_blkdev(ps3vram_major, DEVICE_NAME);
+
+ return error;
+}
+
+static void __exit ps3vram_exit(void)
+{
+ ps3_system_bus_driver_unregister(&ps3vram);
+ unregister_blkdev(ps3vram_major, DEVICE_NAME);
+}
+
+module_init(ps3vram_init);
+module_exit(ps3vram_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("PS3 Video RAM Storage Driver");
+MODULE_AUTHOR("Sony Corporation");
+MODULE_ALIAS(PS3_MODULE_ALIAS_GPU_RAMDISK);
ace->fsm_state, ace->id_req_count);
#endif
+ /* Verify that there is actually a CF in the slot. If not, then
+ * bail out back to the idle state and wake up all the waiters */
+ status = ace_in32(ace, ACE_STATUS);
+ if ((status & ACE_STATUS_CFDETECT) == 0) {
+ ace->fsm_state = ACE_FSM_STATE_IDLE;
+ ace->media_change = 1;
+ set_capacity(ace->gd, 0);
+ dev_info(ace->dev, "No CF in slot\n");
+
+ /* Drop all pending requests */
+ while ((req = elv_next_request(ace->queue)) != NULL)
+ end_request(req, 0);
+
+ /* Drop back to IDLE state and notify waiters */
+ ace->fsm_state = ACE_FSM_STATE_IDLE;
+ ace->id_result = -EIO;
+ while (ace->id_req_count) {
+ complete(&ace->id_completion);
+ ace->id_req_count--;
+ }
+ }
+
switch (ace->fsm_state) {
case ACE_FSM_STATE_IDLE:
/* See if there is anything to do */
return error;
}
-static struct device *next_device(struct klist_iter *i) {
- struct klist_node * n = klist_next(i);
- return n ? container_of(n, struct device, knode_parent) : NULL;
+static int
+find_quicksilver(struct device *dev, void *data)
+{
+ struct parisc_device **lba = data;
+ struct parisc_device *padev = to_parisc_device(dev);
+
+ if (IS_QUICKSILVER(padev))
+ *lba = padev;
+
+ return 0;
}
static int
int err = -1;
struct parisc_device *sba = NULL, *lba = NULL;
struct lba_device *lbadev = NULL;
- struct device *dev = NULL;
- struct klist_iter i;
if (!sba_list)
goto out;
}
/* Now search our Pluto for our precious AGP device... */
- klist_iter_init(&sba->dev.klist_children, &i);
- while ((dev = next_device(&i))) {
- struct parisc_device *padev = to_parisc_device(dev);
- if (IS_QUICKSILVER(padev))
- lba = padev;
- }
- klist_iter_exit(&i);
+ device_for_each_child(&sba->dev, &lba, find_quicksilver);
if (!lba) {
printk(KERN_INFO DRVPFX "No AGP devices found.\n");
+/*
+ * Copyright(c) 2007 - 2009 Intel Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc., 59
+ * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called COPYING.
+ */
+
#include <linux/kernel.h>
#include <linux/spinlock.h>
#include <linux/device.h>
return 0;
bail:
file->private_data = NULL;
- kfree(list->hiddev);
+ kfree(list);
return res;
}
*/
static ssize_t hiddev_read(struct file * file, char __user * buffer, size_t count, loff_t *ppos)
{
- DECLARE_WAITQUEUE(wait, current);
+ DEFINE_WAIT(wait);
struct hiddev_list *list = file->private_data;
int event_size;
int retval;
rq->cmd_flags |= REQ_PREEMPT;
rq->buffer = (char *)pc;
rq->rq_disk = disk;
+
+ if (pc->req_xfer) {
+ rq->data = pc->buf;
+ rq->data_len = pc->req_xfer;
+ }
+
memcpy(rq->cmd, pc->c, 12);
if (drive->media == ide_tape)
rq->cmd[13] = REQ_IDETAPE_PC1;
rq = blk_get_request(drive->queue, READ, __GFP_WAIT);
rq->cmd_type = REQ_TYPE_SPECIAL;
rq->buffer = (char *)pc;
+
+ if (pc->req_xfer) {
+ rq->data = pc->buf;
+ rq->data_len = pc->req_xfer;
+ }
+
memcpy(rq->cmd, pc->c, 12);
if (drive->media == ide_tape)
rq->cmd[13] = REQ_IDETAPE_PC1;
{
ide_hwif_t *hwif = drive->hwif;
struct scatterlist *sg = hwif->sg_table;
+ int i;
ide_map_sg(drive, rq);
else
hwif->sg_dma_direction = DMA_TO_DEVICE;
- return dma_map_sg(hwif->dev, sg, hwif->sg_nents,
- hwif->sg_dma_direction);
+ i = dma_map_sg(hwif->dev, sg, hwif->sg_nents, hwif->sg_dma_direction);
+ if (i) {
+ hwif->orig_sg_nents = hwif->sg_nents;
+ hwif->sg_nents = i;
+ }
+
+ return i;
}
EXPORT_SYMBOL_GPL(ide_build_sglist);
{
ide_hwif_t *hwif = drive->hwif;
- dma_unmap_sg(hwif->dev, hwif->sg_table, hwif->sg_nents,
+ dma_unmap_sg(hwif->dev, hwif->sg_table, hwif->orig_sg_nents,
hwif->sg_dma_direction);
}
EXPORT_SYMBOL_GPL(ide_destroy_dmatable);
return ide_stopped;
}
- ide_init_sg_cmd(drive, rq);
- ide_map_sg(drive, rq);
+ if (blk_fs_request(rq) || pc->req_xfer) {
+ ide_init_sg_cmd(drive, rq);
+ ide_map_sg(drive, rq);
+ }
pc->sg = hwif->sg_table;
pc->sg_cnt = hwif->sg_nents;
/* length limit according to Siemens 3070usb-protokoll.doc ch. 2.1 */
#define IF_WRITEBUF 264
+/* interrupt pipe message size according to ibid. ch. 2.2 */
+#define IP_MSGSIZE 3
+
/* Values for the Gigaset 307x */
#define USB_GIGA_VENDOR_ID 0x0681
#define USB_3070_PRODUCT_ID 0x0001
unsigned char *rcvbuf; /* AT reply receive buffer */
struct urb *urb_int_in; /* URB for interrupt pipe */
- unsigned char int_in_buf[3];
+ unsigned char *int_in_buf;
spinlock_t lock; /* locks all following */
int basstate; /* bitmap (BS_*) */
}
/* drop incomplete packets even if the missing bytes wouldn't matter */
- if (unlikely(urb->actual_length < 3)) {
+ if (unlikely(urb->actual_length < IP_MSGSIZE)) {
dev_warn(cs->dev, "incomplete interrupt packet (%d bytes)\n",
urb->actual_length);
goto resubmit;
static void gigaset_freecshw(struct cardstate *cs)
{
/* timers, URBs and rcvbuf are disposed of in disconnect */
+ kfree(cs->hw.bas->int_in_buf);
kfree(cs->hw.bas);
cs->hw.bas = NULL;
}
pr_err("out of memory\n");
return 0;
}
+ ucs->int_in_buf = kmalloc(IP_MSGSIZE, GFP_KERNEL);
+ if (!ucs->int_in_buf) {
+ kfree(ucs);
+ pr_err("out of memory\n");
+ return 0;
+ }
ucs->urb_cmd_in = NULL;
ucs->urb_cmd_out = NULL;
usb_fill_int_urb(ucs->urb_int_in, udev,
usb_rcvintpipe(udev,
(endpoint->bEndpointAddress) & 0x0f),
- ucs->int_in_buf, 3, read_int_callback, cs,
+ ucs->int_in_buf, IP_MSGSIZE, read_int_callback, cs,
endpoint->bInterval);
if ((rc = usb_submit_urb(ucs->urb_int_in, GFP_KERNEL)) != 0) {
dev_err(cs->dev, "could not submit interrupt URB: %s\n",
};
struct dm_crypt_request {
+ struct convert_context *ctx;
struct scatterlist sg_in;
struct scatterlist sg_out;
};
init_completion(&ctx->restart);
}
+static struct dm_crypt_request *dmreq_of_req(struct crypt_config *cc,
+ struct ablkcipher_request *req)
+{
+ return (struct dm_crypt_request *)((char *)req + cc->dmreq_start);
+}
+
+static struct ablkcipher_request *req_of_dmreq(struct crypt_config *cc,
+ struct dm_crypt_request *dmreq)
+{
+ return (struct ablkcipher_request *)((char *)dmreq - cc->dmreq_start);
+}
+
static int crypt_convert_block(struct crypt_config *cc,
struct convert_context *ctx,
struct ablkcipher_request *req)
u8 *iv;
int r = 0;
- dmreq = (struct dm_crypt_request *)((char *)req + cc->dmreq_start);
+ dmreq = dmreq_of_req(cc, req);
iv = (u8 *)ALIGN((unsigned long)(dmreq + 1),
crypto_ablkcipher_alignmask(cc->tfm) + 1);
+ dmreq->ctx = ctx;
sg_init_table(&dmreq->sg_in, 1);
sg_set_page(&dmreq->sg_in, bv_in->bv_page, 1 << SECTOR_SHIFT,
bv_in->bv_offset + ctx->offset_in);
cc->req = mempool_alloc(cc->req_pool, GFP_NOIO);
ablkcipher_request_set_tfm(cc->req, cc->tfm);
ablkcipher_request_set_callback(cc->req, CRYPTO_TFM_REQ_MAY_BACKLOG |
- CRYPTO_TFM_REQ_MAY_SLEEP,
- kcryptd_async_done, ctx);
+ CRYPTO_TFM_REQ_MAY_SLEEP,
+ kcryptd_async_done,
+ dmreq_of_req(cc, cc->req));
}
/*
static void crypt_dec_pending(struct dm_crypt_io *io)
{
struct crypt_config *cc = io->target->private;
+ struct bio *base_bio = io->base_bio;
+ struct dm_crypt_io *base_io = io->base_io;
+ int error = io->error;
if (!atomic_dec_and_test(&io->pending))
return;
- if (likely(!io->base_io))
- bio_endio(io->base_bio, io->error);
+ mempool_free(io, cc->io_pool);
+
+ if (likely(!base_io))
+ bio_endio(base_bio, error);
else {
- if (io->error && !io->base_io->error)
- io->base_io->error = io->error;
- crypt_dec_pending(io->base_io);
+ if (error && !base_io->error)
+ base_io->error = error;
+ crypt_dec_pending(base_io);
}
-
- mempool_free(io, cc->io_pool);
}
/*
static void kcryptd_async_done(struct crypto_async_request *async_req,
int error)
{
- struct convert_context *ctx = async_req->data;
+ struct dm_crypt_request *dmreq = async_req->data;
+ struct convert_context *ctx = dmreq->ctx;
struct dm_crypt_io *io = container_of(ctx, struct dm_crypt_io, ctx);
struct crypt_config *cc = io->target->private;
return;
}
- mempool_free(ablkcipher_request_cast(async_req), cc->req_pool);
+ mempool_free(req_of_dmreq(cc, dmreq), cc->req_pool);
if (!atomic_dec_and_test(&ctx->pending))
return;
(PAGE_SIZE >> SECTOR_SHIFT));
num_bvecs = 1 + min_t(int, bio_get_nr_vecs(where->bdev),
num_bvecs);
+ if (unlikely(num_bvecs > BIO_MAX_PAGES))
+ num_bvecs = BIO_MAX_PAGES;
bio = bio_alloc_bioset(GFP_NOIO, num_bvecs, io->client->bios);
bio->bi_sector = where->sector + (where->count - remaining);
bio->bi_bdev = where->bdev;
char *new_name = (char *) param + param->data_start;
if (new_name < param->data ||
- invalid_str(new_name, (void *) param + param_size)) {
+ invalid_str(new_name, (void *) param + param_size) ||
+ strlen(new_name) > DM_NAME_LEN - 1) {
DMWARN("Invalid new logical volume name supplied.");
return -EINVAL;
}
r = populate_table(t, param, param_size);
if (r) {
- dm_table_put(t);
+ dm_table_destroy(t);
goto out;
}
hc = dm_get_mdptr(md);
if (!hc || hc->md != md) {
DMWARN("device has been removed from the dev hash table.");
- dm_table_put(t);
+ dm_table_destroy(t);
up_write(&_hash_lock);
r = -ENXIO;
goto out;
static void dec_pending(struct dm_io *io, int error)
{
unsigned long flags;
+ int io_error;
+ struct bio *bio;
+ struct mapped_device *md = io->md;
/* Push-back supersedes any I/O errors */
- if (error && !(io->error > 0 && __noflush_suspending(io->md)))
+ if (error && !(io->error > 0 && __noflush_suspending(md)))
io->error = error;
if (atomic_dec_and_test(&io->io_count)) {
* This must be handled before the sleeper on
* suspend queue merges the pushback list.
*/
- spin_lock_irqsave(&io->md->pushback_lock, flags);
- if (__noflush_suspending(io->md))
- bio_list_add(&io->md->pushback, io->bio);
+ spin_lock_irqsave(&md->pushback_lock, flags);
+ if (__noflush_suspending(md))
+ bio_list_add(&md->pushback, io->bio);
else
/* noflush suspend was interrupted. */
io->error = -EIO;
- spin_unlock_irqrestore(&io->md->pushback_lock, flags);
+ spin_unlock_irqrestore(&md->pushback_lock, flags);
}
end_io_acct(io);
- if (io->error != DM_ENDIO_REQUEUE) {
- trace_block_bio_complete(io->md->queue, io->bio);
+ io_error = io->error;
+ bio = io->bio;
- bio_endio(io->bio, io->error);
- }
+ free_io(md, io);
+
+ if (io_error != DM_ENDIO_REQUEUE) {
+ trace_block_bio_complete(md->queue, bio);
- free_io(io->md, io);
+ bio_endio(bio, io_error);
+ }
}
}
{
int r = 0;
struct dm_target_io *tio = bio->bi_private;
+ struct dm_io *io = tio->io;
struct mapped_device *md = tio->io->md;
dm_endio_fn endio = tio->ti->type->end_io;
}
}
- dec_pending(tio->io, error);
-
/*
* Store md for cleanup instead of tio which is about to get freed.
*/
bio->bi_private = md->bs;
- bio_put(bio);
free_tio(md, tio);
+ bio_put(bio);
+ dec_pending(io, error);
}
static sector_t max_io_len(struct mapped_device *md,
static int dst_get_tuning_algo(struct dvb_frontend *fe)
{
- return dst_algo;
+ return dst_algo ? DVBFE_ALGO_HW : DVBFE_ALGO_SW;
}
static int dst_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
dprintk("%s() Finalised property cache\n", __func__);
dtv_property_cache_submit(fe);
- /* Request the search algorithm to search */
- fepriv->algo_status |= DVBFE_ALGO_SEARCH_AGAIN;
-
r |= dvb_frontend_ioctl_legacy(inode, file, FE_SET_FRONTEND,
&fepriv->parameters);
break;
fepriv->min_delay = (dvb_override_tune_delay * HZ) / 1000;
fepriv->state = FESTATE_RETUNE;
+
+ /* Request the search algorithm to search */
+ fepriv->algo_status |= DVBFE_ALGO_SEARCH_AGAIN;
+
dvb_frontend_wakeup(fe);
dvb_frontend_add_event(fe, 0);
fepriv->status = 0;
}
if (range > 0)
- internal->sub_range = MIN(internal->srch_range, range);
+ internal->sub_range = min(internal->srch_range, range);
else
internal->sub_range = 0;
timing = stb0899_read_reg(state, STB0899_RTF);
if (lock >= 42) {
- if ((lock > 48) && (ABS(timing) >= 110)) {
+ if ((lock > 48) && (abs(timing) >= 110)) {
internal->status = ANALOGCARRIER;
dprintk(state->verbose, FE_DEBUG, 1, "-->ANALOG Carrier !");
} else {
index++;
derot_freq += index * internal->direction * derot_step; /* next derot zig zag position */
- if (ABS(derot_freq) > derot_limit)
+ if (abs(derot_freq) > derot_limit)
next_loop--;
if (next_loop) {
last_derot_freq = derot_freq;
derot_freq += index * internal->direction * internal->derot_step; /* next zig zag derotator position */
- if(ABS(derot_freq) > derot_limit)
+ if(abs(derot_freq) > derot_limit)
next_loop--;
if (next_loop) {
if ((internal->status != CARRIEROK) || (stb0899_check_data(state) != DATAOK)) {
derot_freq += index * internal->direction * derot_step; /* next zig zag derotator position */
- if (ABS(derot_freq) > derot_limit)
+ if (abs(derot_freq) > derot_limit)
next_loop--;
if (next_loop) {
if (internal->sub_dir > 0) {
old_sub_range = internal->sub_range;
- internal->sub_range = MIN((internal->srch_range / 2) -
+ internal->sub_range = min((internal->srch_range / 2) -
(internal->tuner_offst + internal->sub_range / 2),
internal->sub_range);
int i;
i = 0;
- while ((1 << i) <= ABS(number))
+ while ((1 << i) <= abs(number))
i++;
if (number == 0)
reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
old_state = reg;
/* set to burst mode */
- STB0899_SETFIELD_VAL(DISEQCMODE, reg, 0x02);
+ STB0899_SETFIELD_VAL(DISEQCMODE, reg, 0x03);
STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 0x01);
stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
switch (burst) {
#define MAKEWORD32(a, b, c, d) (((a) << 24) | ((b) << 16) | ((c) << 8) | (d))
#define MAKEWORD16(a, b) (((a) << 8) | (b))
-#define MIN(x, y) ((x) <= (y) ? (x) : (y))
-#define MAX(x, y) ((x) >= (y) ? (x) : (y))
-#define ABS(x) ((x) >= 0 ? (x) : -(x))
-
#define LSB(x) ((x & 0xff))
#define MSB(y) ((y >> 8) & 0xff)
u32 freq; /* Demod internal Frequency */
u32 srate; /* Demod internal Symbol rate */
enum stb0899_fec fecrate; /* Demod internal FEC rate */
- u32 srch_range; /* Demod internal Search Range */
- u32 sub_range; /* Demod current sub range (Hz) */
- u32 tuner_step; /* Tuner step (Hz) */
- u32 tuner_offst; /* Relative offset to carrier (Hz) */
+ s32 srch_range; /* Demod internal Search Range */
+ s32 sub_range; /* Demod current sub range (Hz) */
+ s32 tuner_step; /* Tuner step (Hz) */
+ s32 tuner_offst; /* Relative offset to carrier (Hz) */
u32 tuner_bw; /* Current bandwidth of the tuner (Hz) */
s32 mclk; /* Masterclock Divider factor (binary) */
status->refclock = 27000000; /* Hz */
status->iqsense = 1;
status->bandwidth = 36000; /* kHz */
- state->bandwidth = status->bandwidth * 1000; /* MHz */
+ state->bandwidth = status->bandwidth * 1000; /* Hz */
state->reference = status->refclock / 1000; /* kHz */
/* Set default bandwidth. */
- return stb6100_set_bandwidth(fe, status->bandwidth);
+ return stb6100_set_bandwidth(fe, state->bandwidth);
}
static int stb6100_get_state(struct dvb_frontend *fe,
struct zl10353_state *state = fe->demodulator_priv;
u8 val = 0x0a;
- if (state->config.no_tuner) {
+ if (state->config.disable_i2c_gate_ctrl) {
/* No tuner attached to the internal I2C bus */
/* If set enable I2C bridge, the main I2C bus stopped hardly */
return 0;
/* set if parallel ts output is required */
int parallel_ts;
+
+ /* set if i2c_gate_ctrl disable is required */
+ u8 disable_i2c_gate_ctrl:1;
};
#if defined(CONFIG_DVB_ZL10353) || (defined(CONFIG_DVB_ZL10353_MODULE) && defined(MODULE))
return (-ENOENT);
}
- card = snd_card_new(index[devno], id[devno], THIS_MODULE, sizeof(snd_cx88_card_t));
- if (!card)
- return (-ENOMEM);
+ err = snd_card_create(index[devno], id[devno], THIS_MODULE,
+ sizeof(snd_cx88_card_t), &card);
+ if (err < 0)
+ return err;
card->private_free = snd_cx88_dev_free;
printk(KERN_INFO "em28xx-audio.c: Copyright (C) 2006 Markus "
"Rechberger\n");
- card = snd_card_new(index[devnr], "Em28xx Audio", THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[devnr], "Em28xx Audio", THIS_MODULE, 0,
+ &card);
+ if (err < 0)
+ return err;
spin_lock_init(&adev->slock);
err = snd_pcm_new(card, "Em28xx Audio", 0, 0, 1, &pcm);
}
/* Test some registers, but we don't know their exact meaning yet */
- if (m5602_read_sensor(sd, 0x00, prod_id, sizeof(prod_id)))
+ if (m5602_read_sensor(sd, 0x00, prod_id, 2))
+ return -ENODEV;
+ if (m5602_read_sensor(sd, 0x02, prod_id+2, 2))
+ return -ENODEV;
+ if (m5602_read_sensor(sd, 0x04, prod_id+4, 2))
return -ENODEV;
if (memcmp(prod_id, expected_prod_id, sizeof(prod_id)))
if (!enable[devnum])
return -ENODEV;
- card = snd_card_new(index[devnum], id[devnum], THIS_MODULE, sizeof(snd_card_saa7134_t));
-
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[devnum], id[devnum], THIS_MODULE,
+ sizeof(snd_card_saa7134_t), &card);
+ if (err < 0)
+ return err;
strcpy(card->driver, "SAA7134");
.demod_address = 0x1e>>1,
.no_tuner = 1,
.parallel_ts = 1,
+ .disable_i2c_gate_ctrl = 1,
};
/* ==================================================================
/* ---------------------------------------------------------------------- */
/* our structs */
-#define MAXREGS 64
+#define MAXREGS 256
struct CHIPSTATE;
typedef int (*getvalue)(int);
tristate "AverMedia 6 Eyes support (EXPERIMENTAL)"
depends on VIDEO_ZORAN_ZR36060 && EXPERIMENTAL && VIDEO_V4L1
select VIDEO_BT856 if VIDEO_HELPER_CHIPS_AUTO
+ select VIDEO_BT866 if VIDEO_HELPER_CHIPS_AUTO
select VIDEO_KS0127 if VIDEO_HELPER_CHIPS_AUTO
help
Support for the AverMedia 6 Eyes video surveillance card.
doesn't have access to, memory beyond the mem=xxx limit, nvram,
memory on the video card, etc...
-config MTD_PS3VRAM
- tristate "PS3 video RAM"
- depends on FB_PS3
- help
- This driver allows you to use excess PS3 video RAM as volatile
- storage or system swap.
-
config MTD_LART
tristate "28F160xx flash driver for LART"
depends on SA1100_LART
obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd.o
obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o
obj-$(CONFIG_MTD_M25P80) += m25p80.o
-obj-$(CONFIG_MTD_PS3VRAM) += ps3vram.o
+++ /dev/null
-/**
- * ps3vram - Use extra PS3 video ram as MTD block device.
- *
- * Copyright (c) 2007-2008 Jim Paris <jim@jtan.com>
- * Added support RSX DMA Vivien Chappelier <vivien.chappelier@free.fr>
- */
-
-#include <linux/io.h>
-#include <linux/mm.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/slab.h>
-#include <linux/version.h>
-#include <linux/gfp.h>
-#include <linux/delay.h>
-#include <linux/mtd/mtd.h>
-
-#include <asm/lv1call.h>
-#include <asm/ps3.h>
-
-#define DEVICE_NAME "ps3vram"
-
-#define XDR_BUF_SIZE (2 * 1024 * 1024) /* XDR buffer (must be 1MiB aligned) */
-#define XDR_IOIF 0x0c000000
-
-#define FIFO_BASE XDR_IOIF
-#define FIFO_SIZE (64 * 1024)
-
-#define DMA_PAGE_SIZE (4 * 1024)
-
-#define CACHE_PAGE_SIZE (256 * 1024)
-#define CACHE_PAGE_COUNT ((XDR_BUF_SIZE - FIFO_SIZE) / CACHE_PAGE_SIZE)
-
-#define CACHE_OFFSET CACHE_PAGE_SIZE
-#define FIFO_OFFSET 0
-
-#define CTRL_PUT 0x10
-#define CTRL_GET 0x11
-#define CTRL_TOP 0x15
-
-#define UPLOAD_SUBCH 1
-#define DOWNLOAD_SUBCH 2
-
-#define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c
-#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104
-
-#define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT 0x601
-
-struct mtd_info ps3vram_mtd;
-
-#define CACHE_PAGE_PRESENT 1
-#define CACHE_PAGE_DIRTY 2
-
-struct ps3vram_tag {
- unsigned int address;
- unsigned int flags;
-};
-
-struct ps3vram_cache {
- unsigned int page_count;
- unsigned int page_size;
- struct ps3vram_tag *tags;
-};
-
-struct ps3vram_priv {
- u64 memory_handle;
- u64 context_handle;
- u32 *ctrl;
- u32 *reports;
- u8 __iomem *ddr_base;
- u8 *xdr_buf;
-
- u32 *fifo_base;
- u32 *fifo_ptr;
-
- struct device *dev;
- struct ps3vram_cache cache;
-
- /* Used to serialize cache/DMA operations */
- struct mutex lock;
-};
-
-#define DMA_NOTIFIER_HANDLE_BASE 0x66604200 /* first DMA notifier handle */
-#define DMA_NOTIFIER_OFFSET_BASE 0x1000 /* first DMA notifier offset */
-#define DMA_NOTIFIER_SIZE 0x40
-#define NOTIFIER 7 /* notifier used for completion report */
-
-/* A trailing '-' means to subtract off ps3fb_videomemory.size */
-char *size = "256M-";
-module_param(size, charp, 0);
-MODULE_PARM_DESC(size, "memory size");
-
-static u32 *ps3vram_get_notifier(u32 *reports, int notifier)
-{
- return (void *) reports +
- DMA_NOTIFIER_OFFSET_BASE +
- DMA_NOTIFIER_SIZE * notifier;
-}
-
-static void ps3vram_notifier_reset(struct mtd_info *mtd)
-{
- int i;
-
- struct ps3vram_priv *priv = mtd->priv;
- u32 *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
- for (i = 0; i < 4; i++)
- notify[i] = 0xffffffff;
-}
-
-static int ps3vram_notifier_wait(struct mtd_info *mtd, unsigned int timeout_ms)
-{
- struct ps3vram_priv *priv = mtd->priv;
- u32 *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
- unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
-
- do {
- if (!notify[3])
- return 0;
- msleep(1);
- } while (time_before(jiffies, timeout));
-
- return -ETIMEDOUT;
-}
-
-static void ps3vram_init_ring(struct mtd_info *mtd)
-{
- struct ps3vram_priv *priv = mtd->priv;
-
- priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET;
- priv->ctrl[CTRL_GET] = FIFO_BASE + FIFO_OFFSET;
-}
-
-static int ps3vram_wait_ring(struct mtd_info *mtd, unsigned int timeout_ms)
-{
- struct ps3vram_priv *priv = mtd->priv;
- unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
-
- do {
- if (priv->ctrl[CTRL_PUT] == priv->ctrl[CTRL_GET])
- return 0;
- msleep(1);
- } while (time_before(jiffies, timeout));
-
- dev_dbg(priv->dev, "%s:%d: FIFO timeout (%08x/%08x/%08x)\n", __func__,
- __LINE__, priv->ctrl[CTRL_PUT], priv->ctrl[CTRL_GET],
- priv->ctrl[CTRL_TOP]);
-
- return -ETIMEDOUT;
-}
-
-static void ps3vram_out_ring(struct ps3vram_priv *priv, u32 data)
-{
- *(priv->fifo_ptr)++ = data;
-}
-
-static void ps3vram_begin_ring(struct ps3vram_priv *priv, u32 chan,
- u32 tag, u32 size)
-{
- ps3vram_out_ring(priv, (size << 18) | (chan << 13) | tag);
-}
-
-static void ps3vram_rewind_ring(struct mtd_info *mtd)
-{
- struct ps3vram_priv *priv = mtd->priv;
- u64 status;
-
- ps3vram_out_ring(priv, 0x20000000 | (FIFO_BASE + FIFO_OFFSET));
-
- priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET;
-
- /* asking the HV for a blit will kick the fifo */
- status = lv1_gpu_context_attribute(priv->context_handle,
- L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT,
- 0, 0, 0, 0);
- if (status)
- dev_err(priv->dev, "%s:%d: lv1_gpu_context_attribute failed\n",
- __func__, __LINE__);
-
- priv->fifo_ptr = priv->fifo_base;
-}
-
-static void ps3vram_fire_ring(struct mtd_info *mtd)
-{
- struct ps3vram_priv *priv = mtd->priv;
- u64 status;
-
- mutex_lock(&ps3_gpu_mutex);
-
- priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET +
- (priv->fifo_ptr - priv->fifo_base) * sizeof(u32);
-
- /* asking the HV for a blit will kick the fifo */
- status = lv1_gpu_context_attribute(priv->context_handle,
- L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT,
- 0, 0, 0, 0);
- if (status)
- dev_err(priv->dev, "%s:%d: lv1_gpu_context_attribute failed\n",
- __func__, __LINE__);
-
- if ((priv->fifo_ptr - priv->fifo_base) * sizeof(u32) >
- FIFO_SIZE - 1024) {
- dev_dbg(priv->dev, "%s:%d: fifo full, rewinding\n", __func__,
- __LINE__);
- ps3vram_wait_ring(mtd, 200);
- ps3vram_rewind_ring(mtd);
- }
-
- mutex_unlock(&ps3_gpu_mutex);
-}
-
-static void ps3vram_bind(struct mtd_info *mtd)
-{
- struct ps3vram_priv *priv = mtd->priv;
-
- ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0, 1);
- ps3vram_out_ring(priv, 0x31337303);
- ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x180, 3);
- ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
- ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
- ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
-
- ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0, 1);
- ps3vram_out_ring(priv, 0x3137c0de);
- ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x180, 3);
- ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
- ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
- ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
-
- ps3vram_fire_ring(mtd);
-}
-
-static int ps3vram_upload(struct mtd_info *mtd, unsigned int src_offset,
- unsigned int dst_offset, int len, int count)
-{
- struct ps3vram_priv *priv = mtd->priv;
-
- ps3vram_begin_ring(priv, UPLOAD_SUBCH,
- NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
- ps3vram_out_ring(priv, XDR_IOIF + src_offset);
- ps3vram_out_ring(priv, dst_offset);
- ps3vram_out_ring(priv, len);
- ps3vram_out_ring(priv, len);
- ps3vram_out_ring(priv, len);
- ps3vram_out_ring(priv, count);
- ps3vram_out_ring(priv, (1 << 8) | 1);
- ps3vram_out_ring(priv, 0);
-
- ps3vram_notifier_reset(mtd);
- ps3vram_begin_ring(priv, UPLOAD_SUBCH,
- NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
- ps3vram_out_ring(priv, 0);
- ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x100, 1);
- ps3vram_out_ring(priv, 0);
- ps3vram_fire_ring(mtd);
- if (ps3vram_notifier_wait(mtd, 200) < 0) {
- dev_dbg(priv->dev, "%s:%d: notifier timeout\n", __func__,
- __LINE__);
- return -1;
- }
-
- return 0;
-}
-
-static int ps3vram_download(struct mtd_info *mtd, unsigned int src_offset,
- unsigned int dst_offset, int len, int count)
-{
- struct ps3vram_priv *priv = mtd->priv;
-
- ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
- NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
- ps3vram_out_ring(priv, src_offset);
- ps3vram_out_ring(priv, XDR_IOIF + dst_offset);
- ps3vram_out_ring(priv, len);
- ps3vram_out_ring(priv, len);
- ps3vram_out_ring(priv, len);
- ps3vram_out_ring(priv, count);
- ps3vram_out_ring(priv, (1 << 8) | 1);
- ps3vram_out_ring(priv, 0);
-
- ps3vram_notifier_reset(mtd);
- ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
- NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
- ps3vram_out_ring(priv, 0);
- ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x100, 1);
- ps3vram_out_ring(priv, 0);
- ps3vram_fire_ring(mtd);
- if (ps3vram_notifier_wait(mtd, 200) < 0) {
- dev_dbg(priv->dev, "%s:%d: notifier timeout\n", __func__,
- __LINE__);
- return -1;
- }
-
- return 0;
-}
-
-static void ps3vram_cache_evict(struct mtd_info *mtd, int entry)
-{
- struct ps3vram_priv *priv = mtd->priv;
- struct ps3vram_cache *cache = &priv->cache;
-
- if (cache->tags[entry].flags & CACHE_PAGE_DIRTY) {
- dev_dbg(priv->dev, "%s:%d: flushing %d : 0x%08x\n", __func__,
- __LINE__, entry, cache->tags[entry].address);
- if (ps3vram_upload(mtd,
- CACHE_OFFSET + entry * cache->page_size,
- cache->tags[entry].address,
- DMA_PAGE_SIZE,
- cache->page_size / DMA_PAGE_SIZE) < 0) {
- dev_dbg(priv->dev, "%s:%d: failed to upload from "
- "0x%x to 0x%x size 0x%x\n", __func__, __LINE__,
- entry * cache->page_size,
- cache->tags[entry].address, cache->page_size);
- }
- cache->tags[entry].flags &= ~CACHE_PAGE_DIRTY;
- }
-}
-
-static void ps3vram_cache_load(struct mtd_info *mtd, int entry,
- unsigned int address)
-{
- struct ps3vram_priv *priv = mtd->priv;
- struct ps3vram_cache *cache = &priv->cache;
-
- dev_dbg(priv->dev, "%s:%d: fetching %d : 0x%08x\n", __func__, __LINE__,
- entry, address);
- if (ps3vram_download(mtd,
- address,
- CACHE_OFFSET + entry * cache->page_size,
- DMA_PAGE_SIZE,
- cache->page_size / DMA_PAGE_SIZE) < 0) {
- dev_err(priv->dev, "%s:%d: failed to download from "
- "0x%x to 0x%x size 0x%x\n", __func__, __LINE__, address,
- entry * cache->page_size, cache->page_size);
- }
-
- cache->tags[entry].address = address;
- cache->tags[entry].flags |= CACHE_PAGE_PRESENT;
-}
-
-
-static void ps3vram_cache_flush(struct mtd_info *mtd)
-{
- struct ps3vram_priv *priv = mtd->priv;
- struct ps3vram_cache *cache = &priv->cache;
- int i;
-
- dev_dbg(priv->dev, "%s:%d: FLUSH\n", __func__, __LINE__);
- for (i = 0; i < cache->page_count; i++) {
- ps3vram_cache_evict(mtd, i);
- cache->tags[i].flags = 0;
- }
-}
-
-static unsigned int ps3vram_cache_match(struct mtd_info *mtd, loff_t address)
-{
- struct ps3vram_priv *priv = mtd->priv;
- struct ps3vram_cache *cache = &priv->cache;
- unsigned int base;
- unsigned int offset;
- int i;
- static int counter;
-
- offset = (unsigned int) (address & (cache->page_size - 1));
- base = (unsigned int) (address - offset);
-
- /* fully associative check */
- for (i = 0; i < cache->page_count; i++) {
- if ((cache->tags[i].flags & CACHE_PAGE_PRESENT) &&
- cache->tags[i].address == base) {
- dev_dbg(priv->dev, "%s:%d: found entry %d : 0x%08x\n",
- __func__, __LINE__, i, cache->tags[i].address);
- return i;
- }
- }
-
- /* choose a random entry */
- i = (jiffies + (counter++)) % cache->page_count;
- dev_dbg(priv->dev, "%s:%d: using entry %d\n", __func__, __LINE__, i);
-
- ps3vram_cache_evict(mtd, i);
- ps3vram_cache_load(mtd, i, base);
-
- return i;
-}
-
-static int ps3vram_cache_init(struct mtd_info *mtd)
-{
- struct ps3vram_priv *priv = mtd->priv;
-
- priv->cache.page_count = CACHE_PAGE_COUNT;
- priv->cache.page_size = CACHE_PAGE_SIZE;
- priv->cache.tags = kzalloc(sizeof(struct ps3vram_tag) *
- CACHE_PAGE_COUNT, GFP_KERNEL);
- if (priv->cache.tags == NULL) {
- dev_err(priv->dev, "%s:%d: could not allocate cache tags\n",
- __func__, __LINE__);
- return -ENOMEM;
- }
-
- dev_info(priv->dev, "created ram cache: %d entries, %d KiB each\n",
- CACHE_PAGE_COUNT, CACHE_PAGE_SIZE / 1024);
-
- return 0;
-}
-
-static void ps3vram_cache_cleanup(struct mtd_info *mtd)
-{
- struct ps3vram_priv *priv = mtd->priv;
-
- ps3vram_cache_flush(mtd);
- kfree(priv->cache.tags);
-}
-
-static int ps3vram_erase(struct mtd_info *mtd, struct erase_info *instr)
-{
- struct ps3vram_priv *priv = mtd->priv;
-
- if (instr->addr + instr->len > mtd->size)
- return -EINVAL;
-
- mutex_lock(&priv->lock);
-
- ps3vram_cache_flush(mtd);
-
- /* Set bytes to 0xFF */
- memset_io(priv->ddr_base + instr->addr, 0xFF, instr->len);
-
- mutex_unlock(&priv->lock);
-
- instr->state = MTD_ERASE_DONE;
- mtd_erase_callback(instr);
-
- return 0;
-}
-
-static int ps3vram_read(struct mtd_info *mtd, loff_t from, size_t len,
- size_t *retlen, u_char *buf)
-{
- struct ps3vram_priv *priv = mtd->priv;
- unsigned int cached, count;
-
- dev_dbg(priv->dev, "%s:%d: from=0x%08x len=0x%zx\n", __func__, __LINE__,
- (unsigned int)from, len);
-
- if (from >= mtd->size)
- return -EINVAL;
-
- if (len > mtd->size - from)
- len = mtd->size - from;
-
- /* Copy from vram to buf */
- count = len;
- while (count) {
- unsigned int offset, avail;
- unsigned int entry;
-
- offset = (unsigned int) (from & (priv->cache.page_size - 1));
- avail = priv->cache.page_size - offset;
-
- mutex_lock(&priv->lock);
-
- entry = ps3vram_cache_match(mtd, from);
- cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
-
- dev_dbg(priv->dev, "%s:%d: from=%08x cached=%08x offset=%08x "
- "avail=%08x count=%08x\n", __func__, __LINE__,
- (unsigned int)from, cached, offset, avail, count);
-
- if (avail > count)
- avail = count;
- memcpy(buf, priv->xdr_buf + cached, avail);
-
- mutex_unlock(&priv->lock);
-
- buf += avail;
- count -= avail;
- from += avail;
- }
-
- *retlen = len;
- return 0;
-}
-
-static int ps3vram_write(struct mtd_info *mtd, loff_t to, size_t len,
- size_t *retlen, const u_char *buf)
-{
- struct ps3vram_priv *priv = mtd->priv;
- unsigned int cached, count;
-
- if (to >= mtd->size)
- return -EINVAL;
-
- if (len > mtd->size - to)
- len = mtd->size - to;
-
- /* Copy from buf to vram */
- count = len;
- while (count) {
- unsigned int offset, avail;
- unsigned int entry;
-
- offset = (unsigned int) (to & (priv->cache.page_size - 1));
- avail = priv->cache.page_size - offset;
-
- mutex_lock(&priv->lock);
-
- entry = ps3vram_cache_match(mtd, to);
- cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
-
- dev_dbg(priv->dev, "%s:%d: to=%08x cached=%08x offset=%08x "
- "avail=%08x count=%08x\n", __func__, __LINE__,
- (unsigned int)to, cached, offset, avail, count);
-
- if (avail > count)
- avail = count;
- memcpy(priv->xdr_buf + cached, buf, avail);
-
- priv->cache.tags[entry].flags |= CACHE_PAGE_DIRTY;
-
- mutex_unlock(&priv->lock);
-
- buf += avail;
- count -= avail;
- to += avail;
- }
-
- *retlen = len;
- return 0;
-}
-
-static int __devinit ps3vram_probe(struct ps3_system_bus_device *dev)
-{
- struct ps3vram_priv *priv;
- int status;
- u64 ddr_lpar;
- u64 ctrl_lpar;
- u64 info_lpar;
- u64 reports_lpar;
- u64 ddr_size;
- u64 reports_size;
- int ret = -ENOMEM;
- char *rest;
-
- ret = -EIO;
- ps3vram_mtd.priv = kzalloc(sizeof(struct ps3vram_priv), GFP_KERNEL);
- if (!ps3vram_mtd.priv)
- goto out;
- priv = ps3vram_mtd.priv;
-
- mutex_init(&priv->lock);
- priv->dev = &dev->core;
-
- /* Allocate XDR buffer (1MiB aligned) */
- priv->xdr_buf = (void *)__get_free_pages(GFP_KERNEL,
- get_order(XDR_BUF_SIZE));
- if (priv->xdr_buf == NULL) {
- dev_dbg(&dev->core, "%s:%d: could not allocate XDR buffer\n",
- __func__, __LINE__);
- ret = -ENOMEM;
- goto out_free_priv;
- }
-
- /* Put FIFO at begginning of XDR buffer */
- priv->fifo_base = (u32 *) (priv->xdr_buf + FIFO_OFFSET);
- priv->fifo_ptr = priv->fifo_base;
-
- /* XXX: Need to open GPU, in case ps3fb or snd_ps3 aren't loaded */
- if (ps3_open_hv_device(dev)) {
- dev_err(&dev->core, "%s:%d: ps3_open_hv_device failed\n",
- __func__, __LINE__);
- ret = -EAGAIN;
- goto out_close_gpu;
- }
-
- /* Request memory */
- status = -1;
- ddr_size = memparse(size, &rest);
- if (*rest == '-')
- ddr_size -= ps3fb_videomemory.size;
- ddr_size = ALIGN(ddr_size, 1024*1024);
- if (ddr_size <= 0) {
- dev_err(&dev->core, "%s:%d: specified size is too small\n",
- __func__, __LINE__);
- ret = -EINVAL;
- goto out_close_gpu;
- }
-
- while (ddr_size > 0) {
- status = lv1_gpu_memory_allocate(ddr_size, 0, 0, 0, 0,
- &priv->memory_handle,
- &ddr_lpar);
- if (!status)
- break;
- ddr_size -= 1024*1024;
- }
- if (status || ddr_size <= 0) {
- dev_err(&dev->core, "%s:%d: lv1_gpu_memory_allocate failed\n",
- __func__, __LINE__);
- ret = -ENOMEM;
- goto out_free_xdr_buf;
- }
-
- /* Request context */
- status = lv1_gpu_context_allocate(priv->memory_handle,
- 0,
- &priv->context_handle,
- &ctrl_lpar,
- &info_lpar,
- &reports_lpar,
- &reports_size);
- if (status) {
- dev_err(&dev->core, "%s:%d: lv1_gpu_context_allocate failed\n",
- __func__, __LINE__);
- ret = -ENOMEM;
- goto out_free_memory;
- }
-
- /* Map XDR buffer to RSX */
- status = lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF,
- ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)),
- XDR_BUF_SIZE, 0);
- if (status) {
- dev_err(&dev->core, "%s:%d: lv1_gpu_context_iomap failed\n",
- __func__, __LINE__);
- ret = -ENOMEM;
- goto out_free_context;
- }
-
- priv->ddr_base = ioremap_flags(ddr_lpar, ddr_size, _PAGE_NO_CACHE);
-
- if (!priv->ddr_base) {
- dev_err(&dev->core, "%s:%d: ioremap failed\n", __func__,
- __LINE__);
- ret = -ENOMEM;
- goto out_free_context;
- }
-
- priv->ctrl = ioremap(ctrl_lpar, 64 * 1024);
- if (!priv->ctrl) {
- dev_err(&dev->core, "%s:%d: ioremap failed\n", __func__,
- __LINE__);
- ret = -ENOMEM;
- goto out_unmap_vram;
- }
-
- priv->reports = ioremap(reports_lpar, reports_size);
- if (!priv->reports) {
- dev_err(&dev->core, "%s:%d: ioremap failed\n", __func__,
- __LINE__);
- ret = -ENOMEM;
- goto out_unmap_ctrl;
- }
-
- mutex_lock(&ps3_gpu_mutex);
- ps3vram_init_ring(&ps3vram_mtd);
- mutex_unlock(&ps3_gpu_mutex);
-
- ps3vram_mtd.name = "ps3vram";
- ps3vram_mtd.size = ddr_size;
- ps3vram_mtd.flags = MTD_CAP_RAM;
- ps3vram_mtd.erase = ps3vram_erase;
- ps3vram_mtd.point = NULL;
- ps3vram_mtd.unpoint = NULL;
- ps3vram_mtd.read = ps3vram_read;
- ps3vram_mtd.write = ps3vram_write;
- ps3vram_mtd.owner = THIS_MODULE;
- ps3vram_mtd.type = MTD_RAM;
- ps3vram_mtd.erasesize = CACHE_PAGE_SIZE;
- ps3vram_mtd.writesize = 1;
-
- ps3vram_bind(&ps3vram_mtd);
-
- mutex_lock(&ps3_gpu_mutex);
- ret = ps3vram_wait_ring(&ps3vram_mtd, 100);
- mutex_unlock(&ps3_gpu_mutex);
- if (ret < 0) {
- dev_err(&dev->core, "%s:%d: failed to initialize channels\n",
- __func__, __LINE__);
- ret = -ETIMEDOUT;
- goto out_unmap_reports;
- }
-
- ps3vram_cache_init(&ps3vram_mtd);
-
- if (add_mtd_device(&ps3vram_mtd)) {
- dev_err(&dev->core, "%s:%d: add_mtd_device failed\n",
- __func__, __LINE__);
- ret = -EAGAIN;
- goto out_cache_cleanup;
- }
-
- dev_info(&dev->core, "reserved %u MiB of gpu memory\n",
- (unsigned int)(ddr_size / 1024 / 1024));
-
- return 0;
-
-out_cache_cleanup:
- ps3vram_cache_cleanup(&ps3vram_mtd);
-out_unmap_reports:
- iounmap(priv->reports);
-out_unmap_ctrl:
- iounmap(priv->ctrl);
-out_unmap_vram:
- iounmap(priv->ddr_base);
-out_free_context:
- lv1_gpu_context_free(priv->context_handle);
-out_free_memory:
- lv1_gpu_memory_free(priv->memory_handle);
-out_close_gpu:
- ps3_close_hv_device(dev);
-out_free_xdr_buf:
- free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
-out_free_priv:
- kfree(ps3vram_mtd.priv);
- ps3vram_mtd.priv = NULL;
-out:
- return ret;
-}
-
-static int ps3vram_shutdown(struct ps3_system_bus_device *dev)
-{
- struct ps3vram_priv *priv;
-
- priv = ps3vram_mtd.priv;
-
- del_mtd_device(&ps3vram_mtd);
- ps3vram_cache_cleanup(&ps3vram_mtd);
- iounmap(priv->reports);
- iounmap(priv->ctrl);
- iounmap(priv->ddr_base);
- lv1_gpu_context_free(priv->context_handle);
- lv1_gpu_memory_free(priv->memory_handle);
- ps3_close_hv_device(dev);
- free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
- kfree(priv);
- return 0;
-}
-
-static struct ps3_system_bus_driver ps3vram_driver = {
- .match_id = PS3_MATCH_ID_GPU,
- .match_sub_id = PS3_MATCH_SUB_ID_GPU_RAMDISK,
- .core.name = DEVICE_NAME,
- .core.owner = THIS_MODULE,
- .probe = ps3vram_probe,
- .remove = ps3vram_shutdown,
- .shutdown = ps3vram_shutdown,
-};
-
-static int __init ps3vram_init(void)
-{
- return ps3_system_bus_driver_register(&ps3vram_driver);
-}
-
-static void __exit ps3vram_exit(void)
-{
- ps3_system_bus_driver_unregister(&ps3vram_driver);
-}
-
-module_init(ps3vram_init);
-module_exit(ps3vram_exit);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Jim Paris <jim@jtan.com>");
-MODULE_DESCRIPTION("MTD driver for PS3 video RAM");
-MODULE_ALIAS(PS3_MODULE_ALIAS_GPU_RAMDISK);
To compile this driver as a module, choose M here. The module
will be called ni65.
+config DNET
+ tristate "Dave ethernet support (DNET)"
+ depends on NET_ETHERNET && HAS_IOMEM
+ select PHYLIB
+ help
+ The Dave ethernet interface (DNET) is found on Qong Board FPGA.
+ Say Y to include support for the DNET chip.
+
+ To compile this driver as a module, choose M here: the module
+ will be called dnet.
+
source "drivers/net/tulip/Kconfig"
config AT1700
source "drivers/net/sfc/Kconfig"
+source "drivers/net/benet/Kconfig"
+
endif # NETDEV_10000
source "drivers/net/tokenring/Kconfig"
obj-$(CONFIG_TEHUTI) += tehuti.o
obj-$(CONFIG_ENIC) += enic/
obj-$(CONFIG_JME) += jme.o
+obj-$(CONFIG_BE2NET) += benet/
gianfar_driver-objs := gianfar.o \
gianfar_ethtool.o \
obj-$(CONFIG_XTENSA_XT2000_SONIC) += xtsonic.o
+obj-$(CONFIG_DNET) += dnet.o
obj-$(CONFIG_MACB) += macb.o
obj-$(CONFIG_ARM) += arm/
--- /dev/null
+config BE2NET
+ tristate "ServerEngines' 10Gbps NIC - BladeEngine 2"
+ depends on PCI && INET
+ select INET_LRO
+ help
+ This driver implements the NIC functionality for ServerEngines'
+ 10Gbps network adapter - BladeEngine 2.
--- /dev/null
+#
+# Makefile to build the network driver for ServerEngine's BladeEngine.
+#
+
+obj-$(CONFIG_BE2NET) += be2net.o
+
+be2net-y := be_main.o be_cmds.o be_ethtool.o
--- /dev/null
+/*
+ * Copyright (C) 2005 - 2009 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation. The full GNU General
+ * Public License is included in this distribution in the file called COPYING.
+ *
+ * Contact Information:
+ * linux-drivers@serverengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+
+#ifndef BE_H
+#define BE_H
+
+#include <linux/pci.h>
+#include <linux/etherdevice.h>
+#include <linux/version.h>
+#include <linux/delay.h>
+#include <net/tcp.h>
+#include <net/ip.h>
+#include <net/ipv6.h>
+#include <linux/if_vlan.h>
+#include <linux/workqueue.h>
+#include <linux/interrupt.h>
+#include <linux/inet_lro.h>
+
+#include "be_hw.h"
+
+#define DRV_VER "2.0.348"
+#define DRV_NAME "be2net"
+#define BE_NAME "ServerEngines BladeEngine2 10Gbps NIC"
+#define DRV_DESC BE_NAME "Driver"
+
+/* Number of bytes of an RX frame that are copied to skb->data */
+#define BE_HDR_LEN 64
+#define BE_MAX_JUMBO_FRAME_SIZE 9018
+#define BE_MIN_MTU 256
+
+#define BE_NUM_VLANS_SUPPORTED 64
+#define BE_MAX_EQD 96
+#define BE_MAX_TX_FRAG_COUNT 30
+
+#define EVNT_Q_LEN 1024
+#define TX_Q_LEN 2048
+#define TX_CQ_LEN 1024
+#define RX_Q_LEN 1024 /* Does not support any other value */
+#define RX_CQ_LEN 1024
+#define MCC_Q_LEN 64 /* total size not to exceed 8 pages */
+#define MCC_CQ_LEN 256
+
+#define BE_NAPI_WEIGHT 64
+#define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */
+#define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST)
+
+#define BE_MAX_LRO_DESCRIPTORS 16
+#define BE_MAX_FRAGS_PER_FRAME 16
+
+struct be_dma_mem {
+ void *va;
+ dma_addr_t dma;
+ u32 size;
+};
+
+struct be_queue_info {
+ struct be_dma_mem dma_mem;
+ u16 len;
+ u16 entry_size; /* Size of an element in the queue */
+ u16 id;
+ u16 tail, head;
+ bool created;
+ atomic_t used; /* Number of valid elements in the queue */
+};
+
+struct be_ctrl_info {
+ u8 __iomem *csr;
+ u8 __iomem *db; /* Door Bell */
+ u8 __iomem *pcicfg; /* PCI config space */
+ int pci_func;
+
+ /* Mbox used for cmd request/response */
+ spinlock_t cmd_lock; /* For serializing cmds to BE card */
+ struct be_dma_mem mbox_mem;
+ /* Mbox mem is adjusted to align to 16 bytes. The allocated addr
+ * is stored for freeing purpose */
+ struct be_dma_mem mbox_mem_alloced;
+};
+
+#include "be_cmds.h"
+
+struct be_drvr_stats {
+ u32 be_tx_reqs; /* number of TX requests initiated */
+ u32 be_tx_stops; /* number of times TX Q was stopped */
+ u32 be_fwd_reqs; /* number of send reqs through forwarding i/f */
+ u32 be_tx_wrbs; /* number of tx WRBs used */
+ u32 be_tx_events; /* number of tx completion events */
+ u32 be_tx_compl; /* number of tx completion entries processed */
+ u64 be_tx_jiffies;
+ ulong be_tx_bytes;
+ ulong be_tx_bytes_prev;
+ u32 be_tx_rate;
+
+ u32 cache_barrier[16];
+
+ u32 be_ethrx_post_fail;/* number of ethrx buffer alloc failures */
+ u32 be_polls; /* number of times NAPI called poll function */
+ u32 be_rx_events; /* number of ucast rx completion events */
+ u32 be_rx_compl; /* number of rx completion entries processed */
+ u32 be_lro_hgram_data[8]; /* histogram of LRO data packets */
+ u32 be_lro_hgram_ack[8]; /* histogram of LRO ACKs */
+ u64 be_rx_jiffies;
+ ulong be_rx_bytes;
+ ulong be_rx_bytes_prev;
+ u32 be_rx_rate;
+ /* number of non ether type II frames dropped where
+ * frame len > length field of Mac Hdr */
+ u32 be_802_3_dropped_frames;
+ /* number of non ether type II frames malformed where
+ * in frame len < length field of Mac Hdr */
+ u32 be_802_3_malformed_frames;
+ u32 be_rxcp_err; /* Num rx completion entries w/ err set. */
+ ulong rx_fps_jiffies; /* jiffies at last FPS calc */
+ u32 be_rx_frags;
+ u32 be_prev_rx_frags;
+ u32 be_rx_fps; /* Rx frags per second */
+};
+
+struct be_stats_obj {
+ struct be_drvr_stats drvr_stats;
+ struct net_device_stats net_stats;
+ struct be_dma_mem cmd;
+};
+
+struct be_eq_obj {
+ struct be_queue_info q;
+ char desc[32];
+
+ /* Adaptive interrupt coalescing (AIC) info */
+ bool enable_aic;
+ u16 min_eqd; /* in usecs */
+ u16 max_eqd; /* in usecs */
+ u16 cur_eqd; /* in usecs */
+
+ struct napi_struct napi;
+};
+
+struct be_tx_obj {
+ struct be_queue_info q;
+ struct be_queue_info cq;
+ /* Remember the skbs that were transmitted */
+ struct sk_buff *sent_skb_list[TX_Q_LEN];
+};
+
+/* Struct to remember the pages posted for rx frags */
+struct be_rx_page_info {
+ struct page *page;
+ dma_addr_t bus;
+ u16 page_offset;
+ bool last_page_user;
+};
+
+struct be_rx_obj {
+ struct be_queue_info q;
+ struct be_queue_info cq;
+ struct be_rx_page_info page_info_tbl[RX_Q_LEN];
+ struct net_lro_mgr lro_mgr;
+ struct net_lro_desc lro_desc[BE_MAX_LRO_DESCRIPTORS];
+};
+
+#define BE_NUM_MSIX_VECTORS 2 /* 1 each for Tx and Rx */
+struct be_adapter {
+ struct pci_dev *pdev;
+ struct net_device *netdev;
+
+ /* Mbox, pci config, csr address information */
+ struct be_ctrl_info ctrl;
+
+ struct msix_entry msix_entries[BE_NUM_MSIX_VECTORS];
+ bool msix_enabled;
+ bool isr_registered;
+
+ /* TX Rings */
+ struct be_eq_obj tx_eq;
+ struct be_tx_obj tx_obj;
+
+ u32 cache_line_break[8];
+
+ /* Rx rings */
+ struct be_eq_obj rx_eq;
+ struct be_rx_obj rx_obj;
+ u32 big_page_size; /* Compounded page size shared by rx wrbs */
+ bool rx_post_starved; /* Zero rx frags have been posted to BE */
+
+ struct vlan_group *vlan_grp;
+ u16 num_vlans;
+ u8 vlan_tag[VLAN_GROUP_ARRAY_LEN];
+
+ struct be_stats_obj stats;
+ /* Work queue used to perform periodic tasks like getting statistics */
+ struct delayed_work work;
+
+ /* Ethtool knobs and info */
+ bool rx_csum; /* BE card must perform rx-checksumming */
+ u32 max_rx_coal;
+ char fw_ver[FW_VER_LEN];
+ u32 if_handle; /* Used to configure filtering */
+ u32 pmac_id; /* MAC addr handle used by BE card */
+
+ struct be_link_info link;
+ u32 port_num;
+};
+
+extern struct ethtool_ops be_ethtool_ops;
+
+#define drvr_stats(adapter) (&adapter->stats.drvr_stats)
+
+#define BE_SET_NETDEV_OPS(netdev, ops) (netdev->netdev_ops = ops)
+
+static inline u32 MODULO(u16 val, u16 limit)
+{
+ BUG_ON(limit & (limit - 1));
+ return val & (limit - 1);
+}
+
+static inline void index_adv(u16 *index, u16 val, u16 limit)
+{
+ *index = MODULO((*index + val), limit);
+}
+
+static inline void index_inc(u16 *index, u16 limit)
+{
+ *index = MODULO((*index + 1), limit);
+}
+
+#define PAGE_SHIFT_4K 12
+#define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
+
+/* Returns number of pages spanned by the data starting at the given addr */
+#define PAGES_4K_SPANNED(_address, size) \
+ ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \
+ (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
+
+/* Byte offset into the page corresponding to given address */
+#define OFFSET_IN_PAGE(addr) \
+ ((size_t)(addr) & (PAGE_SIZE_4K-1))
+
+/* Returns bit offset within a DWORD of a bitfield */
+#define AMAP_BIT_OFFSET(_struct, field) \
+ (((size_t)&(((_struct *)0)->field))%32)
+
+/* Returns the bit mask of the field that is NOT shifted into location. */
+static inline u32 amap_mask(u32 bitsize)
+{
+ return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
+}
+
+static inline void
+amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
+{
+ u32 *dw = (u32 *) ptr + dw_offset;
+ *dw &= ~(mask << offset);
+ *dw |= (mask & value) << offset;
+}
+
+#define AMAP_SET_BITS(_struct, field, ptr, val) \
+ amap_set(ptr, \
+ offsetof(_struct, field)/32, \
+ amap_mask(sizeof(((_struct *)0)->field)), \
+ AMAP_BIT_OFFSET(_struct, field), \
+ val)
+
+static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
+{
+ u32 *dw = (u32 *) ptr;
+ return mask & (*(dw + dw_offset) >> offset);
+}
+
+#define AMAP_GET_BITS(_struct, field, ptr) \
+ amap_get(ptr, \
+ offsetof(_struct, field)/32, \
+ amap_mask(sizeof(((_struct *)0)->field)), \
+ AMAP_BIT_OFFSET(_struct, field))
+
+#define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len)
+#define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len)
+static inline void swap_dws(void *wrb, int len)
+{
+#ifdef __BIG_ENDIAN
+ u32 *dw = wrb;
+ BUG_ON(len % 4);
+ do {
+ *dw = cpu_to_le32(*dw);
+ dw++;
+ len -= 4;
+ } while (len);
+#endif /* __BIG_ENDIAN */
+}
+
+static inline u8 is_tcp_pkt(struct sk_buff *skb)
+{
+ u8 val = 0;
+
+ if (ip_hdr(skb)->version == 4)
+ val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
+ else if (ip_hdr(skb)->version == 6)
+ val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
+
+ return val;
+}
+
+static inline u8 is_udp_pkt(struct sk_buff *skb)
+{
+ u8 val = 0;
+
+ if (ip_hdr(skb)->version == 4)
+ val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
+ else if (ip_hdr(skb)->version == 6)
+ val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
+
+ return val;
+}
+
+#endif /* BE_H */
--- /dev/null
+/*
+ * Copyright (C) 2005 - 2009 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation. The full GNU General
+ * Public License is included in this distribution in the file called COPYING.
+ *
+ * Contact Information:
+ * linux-drivers@serverengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+
+#include "be.h"
+
+static int be_mbox_db_ready_wait(void __iomem *db)
+{
+ int cnt = 0, wait = 5;
+ u32 ready;
+
+ do {
+ ready = ioread32(db) & MPU_MAILBOX_DB_RDY_MASK;
+ if (ready)
+ break;
+
+ if (cnt > 200000) {
+ printk(KERN_WARNING DRV_NAME
+ ": mbox_db poll timed out\n");
+ return -1;
+ }
+
+ if (cnt > 50)
+ wait = 200;
+ cnt += wait;
+ udelay(wait);
+ } while (true);
+
+ return 0;
+}
+
+/*
+ * Insert the mailbox address into the doorbell in two steps
+ */
+static int be_mbox_db_ring(struct be_ctrl_info *ctrl)
+{
+ int status;
+ u16 compl_status, extd_status;
+ u32 val = 0;
+ void __iomem *db = ctrl->db + MPU_MAILBOX_DB_OFFSET;
+ struct be_dma_mem *mbox_mem = &ctrl->mbox_mem;
+ struct be_mcc_mailbox *mbox = mbox_mem->va;
+ struct be_mcc_cq_entry *cqe = &mbox->cqe;
+
+ memset(cqe, 0, sizeof(*cqe));
+
+ val &= ~MPU_MAILBOX_DB_RDY_MASK;
+ val |= MPU_MAILBOX_DB_HI_MASK;
+ /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */
+ val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2;
+ iowrite32(val, db);
+
+ /* wait for ready to be set */
+ status = be_mbox_db_ready_wait(db);
+ if (status != 0)
+ return status;
+
+ val = 0;
+ val &= ~MPU_MAILBOX_DB_RDY_MASK;
+ val &= ~MPU_MAILBOX_DB_HI_MASK;
+ /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */
+ val |= (u32)(mbox_mem->dma >> 4) << 2;
+ iowrite32(val, db);
+
+ status = be_mbox_db_ready_wait(db);
+ if (status != 0)
+ return status;
+
+ /* compl entry has been made now */
+ be_dws_le_to_cpu(cqe, sizeof(*cqe));
+ if (!(cqe->flags & CQE_FLAGS_VALID_MASK)) {
+ printk(KERN_WARNING DRV_NAME ": ERROR invalid mbox compl\n");
+ return -1;
+ }
+
+ compl_status = (cqe->status >> CQE_STATUS_COMPL_SHIFT) &
+ CQE_STATUS_COMPL_MASK;
+ if (compl_status != MCC_STATUS_SUCCESS) {
+ extd_status = (cqe->status >> CQE_STATUS_EXTD_SHIFT) &
+ CQE_STATUS_EXTD_MASK;
+ printk(KERN_WARNING DRV_NAME
+ ": ERROR in cmd compl. status(compl/extd)=%d/%d\n",
+ compl_status, extd_status);
+ }
+
+ return compl_status;
+}
+
+static int be_POST_stage_get(struct be_ctrl_info *ctrl, u16 *stage)
+{
+ u32 sem = ioread32(ctrl->csr + MPU_EP_SEMAPHORE_OFFSET);
+
+ *stage = sem & EP_SEMAPHORE_POST_STAGE_MASK;
+ if ((sem >> EP_SEMAPHORE_POST_ERR_SHIFT) & EP_SEMAPHORE_POST_ERR_MASK)
+ return -1;
+ else
+ return 0;
+}
+
+static int be_POST_stage_poll(struct be_ctrl_info *ctrl, u16 poll_stage)
+{
+ u16 stage, cnt, error;
+ for (cnt = 0; cnt < 5000; cnt++) {
+ error = be_POST_stage_get(ctrl, &stage);
+ if (error)
+ return -1;
+
+ if (stage == poll_stage)
+ break;
+ udelay(1000);
+ }
+ if (stage != poll_stage)
+ return -1;
+ return 0;
+}
+
+
+int be_cmd_POST(struct be_ctrl_info *ctrl)
+{
+ u16 stage, error;
+
+ error = be_POST_stage_get(ctrl, &stage);
+ if (error)
+ goto err;
+
+ if (stage == POST_STAGE_ARMFW_RDY)
+ return 0;
+
+ if (stage != POST_STAGE_AWAITING_HOST_RDY)
+ goto err;
+
+ /* On awaiting host rdy, reset and again poll on awaiting host rdy */
+ iowrite32(POST_STAGE_BE_RESET, ctrl->csr + MPU_EP_SEMAPHORE_OFFSET);
+ error = be_POST_stage_poll(ctrl, POST_STAGE_AWAITING_HOST_RDY);
+ if (error)
+ goto err;
+
+ /* Now kickoff POST and poll on armfw ready */
+ iowrite32(POST_STAGE_HOST_RDY, ctrl->csr + MPU_EP_SEMAPHORE_OFFSET);
+ error = be_POST_stage_poll(ctrl, POST_STAGE_ARMFW_RDY);
+ if (error)
+ goto err;
+
+ return 0;
+err:
+ printk(KERN_WARNING DRV_NAME ": ERROR, stage=%d\n", stage);
+ return -1;
+}
+
+static inline void *embedded_payload(struct be_mcc_wrb *wrb)
+{
+ return wrb->payload.embedded_payload;
+}
+
+static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb)
+{
+ return &wrb->payload.sgl[0];
+}
+
+/* Don't touch the hdr after it's prepared */
+static void be_wrb_hdr_prepare(struct be_mcc_wrb *wrb, int payload_len,
+ bool embedded, u8 sge_cnt)
+{
+ if (embedded)
+ wrb->embedded |= MCC_WRB_EMBEDDED_MASK;
+ else
+ wrb->embedded |= (sge_cnt & MCC_WRB_SGE_CNT_MASK) <<
+ MCC_WRB_SGE_CNT_SHIFT;
+ wrb->payload_length = payload_len;
+ be_dws_cpu_to_le(wrb, 20);
+}
+
+/* Don't touch the hdr after it's prepared */
+static void be_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr,
+ u8 subsystem, u8 opcode, int cmd_len)
+{
+ req_hdr->opcode = opcode;
+ req_hdr->subsystem = subsystem;
+ req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr));
+}
+
+static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages,
+ struct be_dma_mem *mem)
+{
+ int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages);
+ u64 dma = (u64)mem->dma;
+
+ for (i = 0; i < buf_pages; i++) {
+ pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF);
+ pages[i].hi = cpu_to_le32(upper_32_bits(dma));
+ dma += PAGE_SIZE_4K;
+ }
+}
+
+/* Converts interrupt delay in microseconds to multiplier value */
+static u32 eq_delay_to_mult(u32 usec_delay)
+{
+#define MAX_INTR_RATE 651042
+ const u32 round = 10;
+ u32 multiplier;
+
+ if (usec_delay == 0)
+ multiplier = 0;
+ else {
+ u32 interrupt_rate = 1000000 / usec_delay;
+ /* Max delay, corresponding to the lowest interrupt rate */
+ if (interrupt_rate == 0)
+ multiplier = 1023;
+ else {
+ multiplier = (MAX_INTR_RATE - interrupt_rate) * round;
+ multiplier /= interrupt_rate;
+ /* Round the multiplier to the closest value.*/
+ multiplier = (multiplier + round/2) / round;
+ multiplier = min(multiplier, (u32)1023);
+ }
+ }
+ return multiplier;
+}
+
+static inline struct be_mcc_wrb *wrb_from_mbox(struct be_dma_mem *mbox_mem)
+{
+ return &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb;
+}
+
+int be_cmd_eq_create(struct be_ctrl_info *ctrl,
+ struct be_queue_info *eq, int eq_delay)
+{
+ struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+ struct be_cmd_req_eq_create *req = embedded_payload(wrb);
+ struct be_cmd_resp_eq_create *resp = embedded_payload(wrb);
+ struct be_dma_mem *q_mem = &eq->dma_mem;
+ int status;
+
+ spin_lock(&ctrl->cmd_lock);
+ memset(wrb, 0, sizeof(*wrb));
+
+ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+ OPCODE_COMMON_EQ_CREATE, sizeof(*req));
+
+ req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
+
+ AMAP_SET_BITS(struct amap_eq_context, func, req->context,
+ ctrl->pci_func);
+ AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1);
+ /* 4byte eqe*/
+ AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0);
+ AMAP_SET_BITS(struct amap_eq_context, count, req->context,
+ __ilog2_u32(eq->len/256));
+ AMAP_SET_BITS(struct amap_eq_context, delaymult, req->context,
+ eq_delay_to_mult(eq_delay));
+ be_dws_cpu_to_le(req->context, sizeof(req->context));
+
+ be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
+
+ status = be_mbox_db_ring(ctrl);
+ if (!status) {
+ eq->id = le16_to_cpu(resp->eq_id);
+ eq->created = true;
+ }
+ spin_unlock(&ctrl->cmd_lock);
+ return status;
+}
+
+int be_cmd_mac_addr_query(struct be_ctrl_info *ctrl, u8 *mac_addr,
+ u8 type, bool permanent, u32 if_handle)
+{
+ struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+ struct be_cmd_req_mac_query *req = embedded_payload(wrb);
+ struct be_cmd_resp_mac_query *resp = embedded_payload(wrb);
+ int status;
+
+ spin_lock(&ctrl->cmd_lock);
+ memset(wrb, 0, sizeof(*wrb));
+
+ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+ OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req));
+
+ req->type = type;
+ if (permanent) {
+ req->permanent = 1;
+ } else {
+ req->if_id = cpu_to_le16((u16)if_handle);
+ req->permanent = 0;
+ }
+
+ status = be_mbox_db_ring(ctrl);
+ if (!status)
+ memcpy(mac_addr, resp->mac.addr, ETH_ALEN);
+
+ spin_unlock(&ctrl->cmd_lock);
+ return status;
+}
+
+int be_cmd_pmac_add(struct be_ctrl_info *ctrl, u8 *mac_addr,
+ u32 if_id, u32 *pmac_id)
+{
+ struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+ struct be_cmd_req_pmac_add *req = embedded_payload(wrb);
+ int status;
+
+ spin_lock(&ctrl->cmd_lock);
+ memset(wrb, 0, sizeof(*wrb));
+
+ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+ OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req));
+
+ req->if_id = cpu_to_le32(if_id);
+ memcpy(req->mac_address, mac_addr, ETH_ALEN);
+
+ status = be_mbox_db_ring(ctrl);
+ if (!status) {
+ struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb);
+ *pmac_id = le32_to_cpu(resp->pmac_id);
+ }
+
+ spin_unlock(&ctrl->cmd_lock);
+ return status;
+}
+
+int be_cmd_pmac_del(struct be_ctrl_info *ctrl, u32 if_id, u32 pmac_id)
+{
+ struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+ struct be_cmd_req_pmac_del *req = embedded_payload(wrb);
+ int status;
+
+ spin_lock(&ctrl->cmd_lock);
+ memset(wrb, 0, sizeof(*wrb));
+
+ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+ OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req));
+
+ req->if_id = cpu_to_le32(if_id);
+ req->pmac_id = cpu_to_le32(pmac_id);
+
+ status = be_mbox_db_ring(ctrl);
+ spin_unlock(&ctrl->cmd_lock);
+
+ return status;
+}
+
+int be_cmd_cq_create(struct be_ctrl_info *ctrl,
+ struct be_queue_info *cq, struct be_queue_info *eq,
+ bool sol_evts, bool no_delay, int coalesce_wm)
+{
+ struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+ struct be_cmd_req_cq_create *req = embedded_payload(wrb);
+ struct be_cmd_resp_cq_create *resp = embedded_payload(wrb);
+ struct be_dma_mem *q_mem = &cq->dma_mem;
+ void *ctxt = &req->context;
+ int status;
+
+ spin_lock(&ctrl->cmd_lock);
+ memset(wrb, 0, sizeof(*wrb));
+
+ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+ OPCODE_COMMON_CQ_CREATE, sizeof(*req));
+
+ req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
+
+ AMAP_SET_BITS(struct amap_cq_context, coalescwm, ctxt, coalesce_wm);
+ AMAP_SET_BITS(struct amap_cq_context, nodelay, ctxt, no_delay);
+ AMAP_SET_BITS(struct amap_cq_context, count, ctxt,
+ __ilog2_u32(cq->len/256));
+ AMAP_SET_BITS(struct amap_cq_context, valid, ctxt, 1);
+ AMAP_SET_BITS(struct amap_cq_context, solevent, ctxt, sol_evts);
+ AMAP_SET_BITS(struct amap_cq_context, eventable, ctxt, 1);
+ AMAP_SET_BITS(struct amap_cq_context, eqid, ctxt, eq->id);
+ AMAP_SET_BITS(struct amap_cq_context, armed, ctxt, 0);
+ AMAP_SET_BITS(struct amap_cq_context, func, ctxt, ctrl->pci_func);
+ be_dws_cpu_to_le(ctxt, sizeof(req->context));
+
+ be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
+
+ status = be_mbox_db_ring(ctrl);
+ if (!status) {
+ cq->id = le16_to_cpu(resp->cq_id);
+ cq->created = true;
+ }
+ spin_unlock(&ctrl->cmd_lock);
+
+ return status;
+}
+
+int be_cmd_txq_create(struct be_ctrl_info *ctrl,
+ struct be_queue_info *txq,
+ struct be_queue_info *cq)
+{
+ struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+ struct be_cmd_req_eth_tx_create *req = embedded_payload(wrb);
+ struct be_dma_mem *q_mem = &txq->dma_mem;
+ void *ctxt = &req->context;
+ int status;
+ u32 len_encoded;
+
+ spin_lock(&ctrl->cmd_lock);
+ memset(wrb, 0, sizeof(*wrb));
+
+ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, OPCODE_ETH_TX_CREATE,
+ sizeof(*req));
+
+ req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size);
+ req->ulp_num = BE_ULP1_NUM;
+ req->type = BE_ETH_TX_RING_TYPE_STANDARD;
+
+ len_encoded = fls(txq->len); /* log2(len) + 1 */
+ if (len_encoded == 16)
+ len_encoded = 0;
+ AMAP_SET_BITS(struct amap_tx_context, tx_ring_size, ctxt, len_encoded);
+ AMAP_SET_BITS(struct amap_tx_context, pci_func_id, ctxt,
+ ctrl->pci_func);
+ AMAP_SET_BITS(struct amap_tx_context, ctx_valid, ctxt, 1);
+ AMAP_SET_BITS(struct amap_tx_context, cq_id_send, ctxt, cq->id);
+
+ be_dws_cpu_to_le(ctxt, sizeof(req->context));
+
+ be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
+
+ status = be_mbox_db_ring(ctrl);
+ if (!status) {
+ struct be_cmd_resp_eth_tx_create *resp = embedded_payload(wrb);
+ txq->id = le16_to_cpu(resp->cid);
+ txq->created = true;
+ }
+ spin_unlock(&ctrl->cmd_lock);
+
+ return status;
+}
+
+int be_cmd_rxq_create(struct be_ctrl_info *ctrl,
+ struct be_queue_info *rxq, u16 cq_id, u16 frag_size,
+ u16 max_frame_size, u32 if_id, u32 rss)
+{
+ struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+ struct be_cmd_req_eth_rx_create *req = embedded_payload(wrb);
+ struct be_dma_mem *q_mem = &rxq->dma_mem;
+ int status;
+
+ spin_lock(&ctrl->cmd_lock);
+ memset(wrb, 0, sizeof(*wrb));
+
+ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, OPCODE_ETH_RX_CREATE,
+ sizeof(*req));
+
+ req->cq_id = cpu_to_le16(cq_id);
+ req->frag_size = fls(frag_size) - 1;
+ req->num_pages = 2;
+ be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
+ req->interface_id = cpu_to_le32(if_id);
+ req->max_frame_size = cpu_to_le16(max_frame_size);
+ req->rss_queue = cpu_to_le32(rss);
+
+ status = be_mbox_db_ring(ctrl);
+ if (!status) {
+ struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb);
+ rxq->id = le16_to_cpu(resp->id);
+ rxq->created = true;
+ }
+ spin_unlock(&ctrl->cmd_lock);
+
+ return status;
+}
+
+/* Generic destroyer function for all types of queues */
+int be_cmd_q_destroy(struct be_ctrl_info *ctrl, struct be_queue_info *q,
+ int queue_type)
+{
+ struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+ struct be_cmd_req_q_destroy *req = embedded_payload(wrb);
+ u8 subsys = 0, opcode = 0;
+ int status;
+
+ spin_lock(&ctrl->cmd_lock);
+
+ memset(wrb, 0, sizeof(*wrb));
+ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+ switch (queue_type) {
+ case QTYPE_EQ:
+ subsys = CMD_SUBSYSTEM_COMMON;
+ opcode = OPCODE_COMMON_EQ_DESTROY;
+ break;
+ case QTYPE_CQ:
+ subsys = CMD_SUBSYSTEM_COMMON;
+ opcode = OPCODE_COMMON_CQ_DESTROY;
+ break;
+ case QTYPE_TXQ:
+ subsys = CMD_SUBSYSTEM_ETH;
+ opcode = OPCODE_ETH_TX_DESTROY;
+ break;
+ case QTYPE_RXQ:
+ subsys = CMD_SUBSYSTEM_ETH;
+ opcode = OPCODE_ETH_RX_DESTROY;
+ break;
+ default:
+ printk(KERN_WARNING DRV_NAME ":bad Q type in Q destroy cmd\n");
+ status = -1;
+ goto err;
+ }
+ be_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req));
+ req->id = cpu_to_le16(q->id);
+
+ status = be_mbox_db_ring(ctrl);
+err:
+ spin_unlock(&ctrl->cmd_lock);
+
+ return status;
+}
+
+/* Create an rx filtering policy configuration on an i/f */
+int be_cmd_if_create(struct be_ctrl_info *ctrl, u32 flags, u8 *mac,
+ bool pmac_invalid, u32 *if_handle, u32 *pmac_id)
+{
+ struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+ struct be_cmd_req_if_create *req = embedded_payload(wrb);
+ int status;
+
+ spin_lock(&ctrl->cmd_lock);
+ memset(wrb, 0, sizeof(*wrb));
+
+ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+ OPCODE_COMMON_NTWK_INTERFACE_CREATE, sizeof(*req));
+
+ req->capability_flags = cpu_to_le32(flags);
+ req->enable_flags = cpu_to_le32(flags);
+ if (!pmac_invalid)
+ memcpy(req->mac_addr, mac, ETH_ALEN);
+
+ status = be_mbox_db_ring(ctrl);
+ if (!status) {
+ struct be_cmd_resp_if_create *resp = embedded_payload(wrb);
+ *if_handle = le32_to_cpu(resp->interface_id);
+ if (!pmac_invalid)
+ *pmac_id = le32_to_cpu(resp->pmac_id);
+ }
+
+ spin_unlock(&ctrl->cmd_lock);
+ return status;
+}
+
+int be_cmd_if_destroy(struct be_ctrl_info *ctrl, u32 interface_id)
+{
+ struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+ struct be_cmd_req_if_destroy *req = embedded_payload(wrb);
+ int status;
+
+ spin_lock(&ctrl->cmd_lock);
+ memset(wrb, 0, sizeof(*wrb));
+
+ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+ OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req));
+
+ req->interface_id = cpu_to_le32(interface_id);
+ status = be_mbox_db_ring(ctrl);
+
+ spin_unlock(&ctrl->cmd_lock);
+
+ return status;
+}
+
+/* Get stats is a non embedded command: the request is not embedded inside
+ * WRB but is a separate dma memory block
+ */
+int be_cmd_get_stats(struct be_ctrl_info *ctrl, struct be_dma_mem *nonemb_cmd)
+{
+ struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+ struct be_cmd_req_get_stats *req = nonemb_cmd->va;
+ struct be_sge *sge = nonembedded_sgl(wrb);
+ int status;
+
+ spin_lock(&ctrl->cmd_lock);
+ memset(wrb, 0, sizeof(*wrb));
+
+ memset(req, 0, sizeof(*req));
+
+ be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1);
+
+ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
+ OPCODE_ETH_GET_STATISTICS, sizeof(*req));
+ sge->pa_hi = cpu_to_le32(upper_32_bits(nonemb_cmd->dma));
+ sge->pa_lo = cpu_to_le32(nonemb_cmd->dma & 0xFFFFFFFF);
+ sge->len = cpu_to_le32(nonemb_cmd->size);
+
+ status = be_mbox_db_ring(ctrl);
+ if (!status) {
+ struct be_cmd_resp_get_stats *resp = nonemb_cmd->va;
+ be_dws_le_to_cpu(&resp->hw_stats, sizeof(resp->hw_stats));
+ }
+
+ spin_unlock(&ctrl->cmd_lock);
+ return status;
+}
+
+int be_cmd_link_status_query(struct be_ctrl_info *ctrl,
+ struct be_link_info *link)
+{
+ struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+ struct be_cmd_req_link_status *req = embedded_payload(wrb);
+ int status;
+
+ spin_lock(&ctrl->cmd_lock);
+ memset(wrb, 0, sizeof(*wrb));
+
+ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+ OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, sizeof(*req));
+
+ status = be_mbox_db_ring(ctrl);
+ if (!status) {
+ struct be_cmd_resp_link_status *resp = embedded_payload(wrb);
+ link->speed = resp->mac_speed;
+ link->duplex = resp->mac_duplex;
+ link->fault = resp->mac_fault;
+ } else {
+ link->speed = PHY_LINK_SPEED_ZERO;
+ }
+
+ spin_unlock(&ctrl->cmd_lock);
+ return status;
+}
+
+int be_cmd_get_fw_ver(struct be_ctrl_info *ctrl, char *fw_ver)
+{
+ struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+ struct be_cmd_req_get_fw_version *req = embedded_payload(wrb);
+ int status;
+
+ spin_lock(&ctrl->cmd_lock);
+ memset(wrb, 0, sizeof(*wrb));
+
+ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+ OPCODE_COMMON_GET_FW_VERSION, sizeof(*req));
+
+ status = be_mbox_db_ring(ctrl);
+ if (!status) {
+ struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb);
+ strncpy(fw_ver, resp->firmware_version_string, FW_VER_LEN);
+ }
+
+ spin_unlock(&ctrl->cmd_lock);
+ return status;
+}
+
+/* set the EQ delay interval of an EQ to specified value */
+int be_cmd_modify_eqd(struct be_ctrl_info *ctrl, u32 eq_id, u32 eqd)
+{
+ struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+ struct be_cmd_req_modify_eq_delay *req = embedded_payload(wrb);
+ int status;
+
+ spin_lock(&ctrl->cmd_lock);
+ memset(wrb, 0, sizeof(*wrb));
+
+ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+ OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req));
+
+ req->num_eq = cpu_to_le32(1);
+ req->delay[0].eq_id = cpu_to_le32(eq_id);
+ req->delay[0].phase = 0;
+ req->delay[0].delay_multiplier = cpu_to_le32(eqd);
+
+ status = be_mbox_db_ring(ctrl);
+
+ spin_unlock(&ctrl->cmd_lock);
+ return status;
+}
+
+int be_cmd_vlan_config(struct be_ctrl_info *ctrl, u32 if_id, u16 *vtag_array,
+ u32 num, bool untagged, bool promiscuous)
+{
+ struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+ struct be_cmd_req_vlan_config *req = embedded_payload(wrb);
+ int status;
+
+ spin_lock(&ctrl->cmd_lock);
+ memset(wrb, 0, sizeof(*wrb));
+
+ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+ OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req));
+
+ req->interface_id = if_id;
+ req->promiscuous = promiscuous;
+ req->untagged = untagged;
+ req->num_vlan = num;
+ if (!promiscuous) {
+ memcpy(req->normal_vlan, vtag_array,
+ req->num_vlan * sizeof(vtag_array[0]));
+ }
+
+ status = be_mbox_db_ring(ctrl);
+
+ spin_unlock(&ctrl->cmd_lock);
+ return status;
+}
+
+int be_cmd_promiscuous_config(struct be_ctrl_info *ctrl, u8 port_num, bool en)
+{
+ struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+ struct be_cmd_req_promiscuous_config *req = embedded_payload(wrb);
+ int status;
+
+ spin_lock(&ctrl->cmd_lock);
+ memset(wrb, 0, sizeof(*wrb));
+
+ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
+ OPCODE_ETH_PROMISCUOUS, sizeof(*req));
+
+ if (port_num)
+ req->port1_promiscuous = en;
+ else
+ req->port0_promiscuous = en;
+
+ status = be_mbox_db_ring(ctrl);
+
+ spin_unlock(&ctrl->cmd_lock);
+ return status;
+}
+
+int be_cmd_mcast_mac_set(struct be_ctrl_info *ctrl, u32 if_id, u8 *mac_table,
+ u32 num, bool promiscuous)
+{
+ struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+ struct be_cmd_req_mcast_mac_config *req = embedded_payload(wrb);
+ int status;
+
+ spin_lock(&ctrl->cmd_lock);
+ memset(wrb, 0, sizeof(*wrb));
+
+ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+ OPCODE_COMMON_NTWK_MULTICAST_SET, sizeof(*req));
+
+ req->interface_id = if_id;
+ req->promiscuous = promiscuous;
+ if (!promiscuous) {
+ req->num_mac = cpu_to_le16(num);
+ if (num)
+ memcpy(req->mac, mac_table, ETH_ALEN * num);
+ }
+
+ status = be_mbox_db_ring(ctrl);
+
+ spin_unlock(&ctrl->cmd_lock);
+ return status;
+}
+
+int be_cmd_set_flow_control(struct be_ctrl_info *ctrl, u32 tx_fc, u32 rx_fc)
+{
+ struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+ struct be_cmd_req_set_flow_control *req = embedded_payload(wrb);
+ int status;
+
+ spin_lock(&ctrl->cmd_lock);
+
+ memset(wrb, 0, sizeof(*wrb));
+
+ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+ OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req));
+
+ req->tx_flow_control = cpu_to_le16((u16)tx_fc);
+ req->rx_flow_control = cpu_to_le16((u16)rx_fc);
+
+ status = be_mbox_db_ring(ctrl);
+
+ spin_unlock(&ctrl->cmd_lock);
+ return status;
+}
+
+int be_cmd_get_flow_control(struct be_ctrl_info *ctrl, u32 *tx_fc, u32 *rx_fc)
+{
+ struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+ struct be_cmd_req_get_flow_control *req = embedded_payload(wrb);
+ int status;
+
+ spin_lock(&ctrl->cmd_lock);
+
+ memset(wrb, 0, sizeof(*wrb));
+
+ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+ OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req));
+
+ status = be_mbox_db_ring(ctrl);
+ if (!status) {
+ struct be_cmd_resp_get_flow_control *resp =
+ embedded_payload(wrb);
+ *tx_fc = le16_to_cpu(resp->tx_flow_control);
+ *rx_fc = le16_to_cpu(resp->rx_flow_control);
+ }
+
+ spin_unlock(&ctrl->cmd_lock);
+ return status;
+}
+
+int be_cmd_query_fw_cfg(struct be_ctrl_info *ctrl, u32 *port_num)
+{
+ struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+ struct be_cmd_req_query_fw_cfg *req = embedded_payload(wrb);
+ int status;
+
+ spin_lock(&ctrl->cmd_lock);
+
+ memset(wrb, 0, sizeof(*wrb));
+
+ be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+ be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+ OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req));
+
+ status = be_mbox_db_ring(ctrl);
+ if (!status) {
+ struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb);
+ *port_num = le32_to_cpu(resp->phys_port);
+ }
+
+ spin_unlock(&ctrl->cmd_lock);
+ return status;
+}
--- /dev/null
+/*
+ * Copyright (C) 2005 - 2009 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation. The full GNU General
+ * Public License is included in this distribution in the file called COPYING.
+ *
+ * Contact Information:
+ * linux-drivers@serverengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+
+/*
+ * The driver sends configuration and managements command requests to the
+ * firmware in the BE. These requests are communicated to the processor
+ * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one
+ * WRB inside a MAILBOX.
+ * The commands are serviced by the ARM processor in the BladeEngine's MPU.
+ */
+
+struct be_sge {
+ u32 pa_lo;
+ u32 pa_hi;
+ u32 len;
+};
+
+#define MCC_WRB_EMBEDDED_MASK 1 /* bit 0 of dword 0*/
+#define MCC_WRB_SGE_CNT_SHIFT 3 /* bits 3 - 7 of dword 0 */
+#define MCC_WRB_SGE_CNT_MASK 0x1F /* bits 3 - 7 of dword 0 */
+struct be_mcc_wrb {
+ u32 embedded; /* dword 0 */
+ u32 payload_length; /* dword 1 */
+ u32 tag0; /* dword 2 */
+ u32 tag1; /* dword 3 */
+ u32 rsvd; /* dword 4 */
+ union {
+ u8 embedded_payload[236]; /* used by embedded cmds */
+ struct be_sge sgl[19]; /* used by non-embedded cmds */
+ } payload;
+};
+
+#define CQE_FLAGS_VALID_MASK (1 << 31)
+#define CQE_FLAGS_ASYNC_MASK (1 << 30)
+#define CQE_FLAGS_COMPLETED_MASK (1 << 28)
+#define CQE_FLAGS_CONSUMED_MASK (1 << 27)
+
+/* Completion Status */
+enum {
+ MCC_STATUS_SUCCESS = 0x0,
+/* The client does not have sufficient privileges to execute the command */
+ MCC_STATUS_INSUFFICIENT_PRIVILEGES = 0x1,
+/* A parameter in the command was invalid. */
+ MCC_STATUS_INVALID_PARAMETER = 0x2,
+/* There are insufficient chip resources to execute the command */
+ MCC_STATUS_INSUFFICIENT_RESOURCES = 0x3,
+/* The command is completing because the queue was getting flushed */
+ MCC_STATUS_QUEUE_FLUSHING = 0x4,
+/* The command is completing with a DMA error */
+ MCC_STATUS_DMA_FAILED = 0x5
+};
+
+#define CQE_STATUS_COMPL_MASK 0xFFFF
+#define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */
+#define CQE_STATUS_EXTD_MASK 0xFFFF
+#define CQE_STATUS_EXTD_SHIFT 0 /* bits 0 - 15 */
+
+struct be_mcc_cq_entry {
+ u32 status; /* dword 0 */
+ u32 tag0; /* dword 1 */
+ u32 tag1; /* dword 2 */
+ u32 flags; /* dword 3 */
+};
+
+struct be_mcc_mailbox {
+ struct be_mcc_wrb wrb;
+ struct be_mcc_cq_entry cqe;
+};
+
+#define CMD_SUBSYSTEM_COMMON 0x1
+#define CMD_SUBSYSTEM_ETH 0x3
+
+#define OPCODE_COMMON_NTWK_MAC_QUERY 1
+#define OPCODE_COMMON_NTWK_MAC_SET 2
+#define OPCODE_COMMON_NTWK_MULTICAST_SET 3
+#define OPCODE_COMMON_NTWK_VLAN_CONFIG 4
+#define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY 5
+#define OPCODE_COMMON_CQ_CREATE 12
+#define OPCODE_COMMON_EQ_CREATE 13
+#define OPCODE_COMMON_MCC_CREATE 21
+#define OPCODE_COMMON_NTWK_RX_FILTER 34
+#define OPCODE_COMMON_GET_FW_VERSION 35
+#define OPCODE_COMMON_SET_FLOW_CONTROL 36
+#define OPCODE_COMMON_GET_FLOW_CONTROL 37
+#define OPCODE_COMMON_SET_FRAME_SIZE 39
+#define OPCODE_COMMON_MODIFY_EQ_DELAY 41
+#define OPCODE_COMMON_FIRMWARE_CONFIG 42
+#define OPCODE_COMMON_NTWK_INTERFACE_CREATE 50
+#define OPCODE_COMMON_NTWK_INTERFACE_DESTROY 51
+#define OPCODE_COMMON_CQ_DESTROY 54
+#define OPCODE_COMMON_EQ_DESTROY 55
+#define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG 58
+#define OPCODE_COMMON_NTWK_PMAC_ADD 59
+#define OPCODE_COMMON_NTWK_PMAC_DEL 60
+
+#define OPCODE_ETH_ACPI_CONFIG 2
+#define OPCODE_ETH_PROMISCUOUS 3
+#define OPCODE_ETH_GET_STATISTICS 4
+#define OPCODE_ETH_TX_CREATE 7
+#define OPCODE_ETH_RX_CREATE 8
+#define OPCODE_ETH_TX_DESTROY 9
+#define OPCODE_ETH_RX_DESTROY 10
+
+struct be_cmd_req_hdr {
+ u8 opcode; /* dword 0 */
+ u8 subsystem; /* dword 0 */
+ u8 port_number; /* dword 0 */
+ u8 domain; /* dword 0 */
+ u32 timeout; /* dword 1 */
+ u32 request_length; /* dword 2 */
+ u32 rsvd; /* dword 3 */
+};
+
+#define RESP_HDR_INFO_OPCODE_SHIFT 0 /* bits 0 - 7 */
+#define RESP_HDR_INFO_SUBSYS_SHIFT 8 /* bits 8 - 15 */
+struct be_cmd_resp_hdr {
+ u32 info; /* dword 0 */
+ u32 status; /* dword 1 */
+ u32 response_length; /* dword 2 */
+ u32 actual_resp_len; /* dword 3 */
+};
+
+struct phys_addr {
+ u32 lo;
+ u32 hi;
+};
+
+/**************************
+ * BE Command definitions *
+ **************************/
+
+/* Pseudo amap definition in which each bit of the actual structure is defined
+ * as a byte: used to calculate offset/shift/mask of each field */
+struct amap_eq_context {
+ u8 cidx[13]; /* dword 0*/
+ u8 rsvd0[3]; /* dword 0*/
+ u8 epidx[13]; /* dword 0*/
+ u8 valid; /* dword 0*/
+ u8 rsvd1; /* dword 0*/
+ u8 size; /* dword 0*/
+ u8 pidx[13]; /* dword 1*/
+ u8 rsvd2[3]; /* dword 1*/
+ u8 pd[10]; /* dword 1*/
+ u8 count[3]; /* dword 1*/
+ u8 solevent; /* dword 1*/
+ u8 stalled; /* dword 1*/
+ u8 armed; /* dword 1*/
+ u8 rsvd3[4]; /* dword 2*/
+ u8 func[8]; /* dword 2*/
+ u8 rsvd4; /* dword 2*/
+ u8 delaymult[10]; /* dword 2*/
+ u8 rsvd5[2]; /* dword 2*/
+ u8 phase[2]; /* dword 2*/
+ u8 nodelay; /* dword 2*/
+ u8 rsvd6[4]; /* dword 2*/
+ u8 rsvd7[32]; /* dword 3*/
+} __packed;
+
+struct be_cmd_req_eq_create {
+ struct be_cmd_req_hdr hdr;
+ u16 num_pages; /* sword */
+ u16 rsvd0; /* sword */
+ u8 context[sizeof(struct amap_eq_context) / 8];
+ struct phys_addr pages[8];
+} __packed;
+
+struct be_cmd_resp_eq_create {
+ struct be_cmd_resp_hdr resp_hdr;
+ u16 eq_id; /* sword */
+ u16 rsvd0; /* sword */
+} __packed;
+
+/******************** Mac query ***************************/
+enum {
+ MAC_ADDRESS_TYPE_STORAGE = 0x0,
+ MAC_ADDRESS_TYPE_NETWORK = 0x1,
+ MAC_ADDRESS_TYPE_PD = 0x2,
+ MAC_ADDRESS_TYPE_MANAGEMENT = 0x3
+};
+
+struct mac_addr {
+ u16 size_of_struct;
+ u8 addr[ETH_ALEN];
+} __packed;
+
+struct be_cmd_req_mac_query {
+ struct be_cmd_req_hdr hdr;
+ u8 type;
+ u8 permanent;
+ u16 if_id;
+} __packed;
+
+struct be_cmd_resp_mac_query {
+ struct be_cmd_resp_hdr hdr;
+ struct mac_addr mac;
+};
+
+/******************** PMac Add ***************************/
+struct be_cmd_req_pmac_add {
+ struct be_cmd_req_hdr hdr;
+ u32 if_id;
+ u8 mac_address[ETH_ALEN];
+ u8 rsvd0[2];
+} __packed;
+
+struct be_cmd_resp_pmac_add {
+ struct be_cmd_resp_hdr hdr;
+ u32 pmac_id;
+};
+
+/******************** PMac Del ***************************/
+struct be_cmd_req_pmac_del {
+ struct be_cmd_req_hdr hdr;
+ u32 if_id;
+ u32 pmac_id;
+};
+
+/******************** Create CQ ***************************/
+/* Pseudo amap definition in which each bit of the actual structure is defined
+ * as a byte: used to calculate offset/shift/mask of each field */
+struct amap_cq_context {
+ u8 cidx[11]; /* dword 0*/
+ u8 rsvd0; /* dword 0*/
+ u8 coalescwm[2]; /* dword 0*/
+ u8 nodelay; /* dword 0*/
+ u8 epidx[11]; /* dword 0*/
+ u8 rsvd1; /* dword 0*/
+ u8 count[2]; /* dword 0*/
+ u8 valid; /* dword 0*/
+ u8 solevent; /* dword 0*/
+ u8 eventable; /* dword 0*/
+ u8 pidx[11]; /* dword 1*/
+ u8 rsvd2; /* dword 1*/
+ u8 pd[10]; /* dword 1*/
+ u8 eqid[8]; /* dword 1*/
+ u8 stalled; /* dword 1*/
+ u8 armed; /* dword 1*/
+ u8 rsvd3[4]; /* dword 2*/
+ u8 func[8]; /* dword 2*/
+ u8 rsvd4[20]; /* dword 2*/
+ u8 rsvd5[32]; /* dword 3*/
+} __packed;
+
+struct be_cmd_req_cq_create {
+ struct be_cmd_req_hdr hdr;
+ u16 num_pages;
+ u16 rsvd0;
+ u8 context[sizeof(struct amap_cq_context) / 8];
+ struct phys_addr pages[8];
+} __packed;
+
+struct be_cmd_resp_cq_create {
+ struct be_cmd_resp_hdr hdr;
+ u16 cq_id;
+ u16 rsvd0;
+} __packed;
+
+/******************** Create TxQ ***************************/
+#define BE_ETH_TX_RING_TYPE_STANDARD 2
+#define BE_ULP1_NUM 1
+
+/* Pseudo amap definition in which each bit of the actual structure is defined
+ * as a byte: used to calculate offset/shift/mask of each field */
+struct amap_tx_context {
+ u8 rsvd0[16]; /* dword 0 */
+ u8 tx_ring_size[4]; /* dword 0 */
+ u8 rsvd1[26]; /* dword 0 */
+ u8 pci_func_id[8]; /* dword 1 */
+ u8 rsvd2[9]; /* dword 1 */
+ u8 ctx_valid; /* dword 1 */
+ u8 cq_id_send[16]; /* dword 2 */
+ u8 rsvd3[16]; /* dword 2 */
+ u8 rsvd4[32]; /* dword 3 */
+ u8 rsvd5[32]; /* dword 4 */
+ u8 rsvd6[32]; /* dword 5 */
+ u8 rsvd7[32]; /* dword 6 */
+ u8 rsvd8[32]; /* dword 7 */
+ u8 rsvd9[32]; /* dword 8 */
+ u8 rsvd10[32]; /* dword 9 */
+ u8 rsvd11[32]; /* dword 10 */
+ u8 rsvd12[32]; /* dword 11 */
+ u8 rsvd13[32]; /* dword 12 */
+ u8 rsvd14[32]; /* dword 13 */
+ u8 rsvd15[32]; /* dword 14 */
+ u8 rsvd16[32]; /* dword 15 */
+} __packed;
+
+struct be_cmd_req_eth_tx_create {
+ struct be_cmd_req_hdr hdr;
+ u8 num_pages;
+ u8 ulp_num;
+ u8 type;
+ u8 bound_port;
+ u8 context[sizeof(struct amap_tx_context) / 8];
+ struct phys_addr pages[8];
+} __packed;
+
+struct be_cmd_resp_eth_tx_create {
+ struct be_cmd_resp_hdr hdr;
+ u16 cid;
+ u16 rsvd0;
+} __packed;
+
+/******************** Create RxQ ***************************/
+struct be_cmd_req_eth_rx_create {
+ struct be_cmd_req_hdr hdr;
+ u16 cq_id;
+ u8 frag_size;
+ u8 num_pages;
+ struct phys_addr pages[2];
+ u32 interface_id;
+ u16 max_frame_size;
+ u16 rsvd0;
+ u32 rss_queue;
+} __packed;
+
+struct be_cmd_resp_eth_rx_create {
+ struct be_cmd_resp_hdr hdr;
+ u16 id;
+ u8 cpu_id;
+ u8 rsvd0;
+} __packed;
+
+/******************** Q Destroy ***************************/
+/* Type of Queue to be destroyed */
+enum {
+ QTYPE_EQ = 1,
+ QTYPE_CQ,
+ QTYPE_TXQ,
+ QTYPE_RXQ
+};
+
+struct be_cmd_req_q_destroy {
+ struct be_cmd_req_hdr hdr;
+ u16 id;
+ u16 bypass_flush; /* valid only for rx q destroy */
+} __packed;
+
+/************ I/f Create (it's actually I/f Config Create)**********/
+
+/* Capability flags for the i/f */
+enum be_if_flags {
+ BE_IF_FLAGS_RSS = 0x4,
+ BE_IF_FLAGS_PROMISCUOUS = 0x8,
+ BE_IF_FLAGS_BROADCAST = 0x10,
+ BE_IF_FLAGS_UNTAGGED = 0x20,
+ BE_IF_FLAGS_ULP = 0x40,
+ BE_IF_FLAGS_VLAN_PROMISCUOUS = 0x80,
+ BE_IF_FLAGS_VLAN = 0x100,
+ BE_IF_FLAGS_MCAST_PROMISCUOUS = 0x200,
+ BE_IF_FLAGS_PASS_L2_ERRORS = 0x400,
+ BE_IF_FLAGS_PASS_L3L4_ERRORS = 0x800
+};
+
+/* An RX interface is an object with one or more MAC addresses and
+ * filtering capabilities. */
+struct be_cmd_req_if_create {
+ struct be_cmd_req_hdr hdr;
+ u32 version; /* ignore currntly */
+ u32 capability_flags;
+ u32 enable_flags;
+ u8 mac_addr[ETH_ALEN];
+ u8 rsvd0;
+ u8 pmac_invalid; /* if set, don't attach the mac addr to the i/f */
+ u32 vlan_tag; /* not used currently */
+} __packed;
+
+struct be_cmd_resp_if_create {
+ struct be_cmd_resp_hdr hdr;
+ u32 interface_id;
+ u32 pmac_id;
+};
+
+/****** I/f Destroy(it's actually I/f Config Destroy )**********/
+struct be_cmd_req_if_destroy {
+ struct be_cmd_req_hdr hdr;
+ u32 interface_id;
+};
+
+/*************** HW Stats Get **********************************/
+struct be_port_rxf_stats {
+ u32 rx_bytes_lsd; /* dword 0*/
+ u32 rx_bytes_msd; /* dword 1*/
+ u32 rx_total_frames; /* dword 2*/
+ u32 rx_unicast_frames; /* dword 3*/
+ u32 rx_multicast_frames; /* dword 4*/
+ u32 rx_broadcast_frames; /* dword 5*/
+ u32 rx_crc_errors; /* dword 6*/
+ u32 rx_alignment_symbol_errors; /* dword 7*/
+ u32 rx_pause_frames; /* dword 8*/
+ u32 rx_control_frames; /* dword 9*/
+ u32 rx_in_range_errors; /* dword 10*/
+ u32 rx_out_range_errors; /* dword 11*/
+ u32 rx_frame_too_long; /* dword 12*/
+ u32 rx_address_match_errors; /* dword 13*/
+ u32 rx_vlan_mismatch; /* dword 14*/
+ u32 rx_dropped_too_small; /* dword 15*/
+ u32 rx_dropped_too_short; /* dword 16*/
+ u32 rx_dropped_header_too_small; /* dword 17*/
+ u32 rx_dropped_tcp_length; /* dword 18*/
+ u32 rx_dropped_runt; /* dword 19*/
+ u32 rx_64_byte_packets; /* dword 20*/
+ u32 rx_65_127_byte_packets; /* dword 21*/
+ u32 rx_128_256_byte_packets; /* dword 22*/
+ u32 rx_256_511_byte_packets; /* dword 23*/
+ u32 rx_512_1023_byte_packets; /* dword 24*/
+ u32 rx_1024_1518_byte_packets; /* dword 25*/
+ u32 rx_1519_2047_byte_packets; /* dword 26*/
+ u32 rx_2048_4095_byte_packets; /* dword 27*/
+ u32 rx_4096_8191_byte_packets; /* dword 28*/
+ u32 rx_8192_9216_byte_packets; /* dword 29*/
+ u32 rx_ip_checksum_errs; /* dword 30*/
+ u32 rx_tcp_checksum_errs; /* dword 31*/
+ u32 rx_udp_checksum_errs; /* dword 32*/
+ u32 rx_non_rss_packets; /* dword 33*/
+ u32 rx_ipv4_packets; /* dword 34*/
+ u32 rx_ipv6_packets; /* dword 35*/
+ u32 rx_ipv4_bytes_lsd; /* dword 36*/
+ u32 rx_ipv4_bytes_msd; /* dword 37*/
+ u32 rx_ipv6_bytes_lsd; /* dword 38*/
+ u32 rx_ipv6_bytes_msd; /* dword 39*/
+ u32 rx_chute1_packets; /* dword 40*/
+ u32 rx_chute2_packets; /* dword 41*/
+ u32 rx_chute3_packets; /* dword 42*/
+ u32 rx_management_packets; /* dword 43*/
+ u32 rx_switched_unicast_packets; /* dword 44*/
+ u32 rx_switched_multicast_packets; /* dword 45*/
+ u32 rx_switched_broadcast_packets; /* dword 46*/
+ u32 tx_bytes_lsd; /* dword 47*/
+ u32 tx_bytes_msd; /* dword 48*/
+ u32 tx_unicastframes; /* dword 49*/
+ u32 tx_multicastframes; /* dword 50*/
+ u32 tx_broadcastframes; /* dword 51*/
+ u32 tx_pauseframes; /* dword 52*/
+ u32 tx_controlframes; /* dword 53*/
+ u32 tx_64_byte_packets; /* dword 54*/
+ u32 tx_65_127_byte_packets; /* dword 55*/
+ u32 tx_128_256_byte_packets; /* dword 56*/
+ u32 tx_256_511_byte_packets; /* dword 57*/
+ u32 tx_512_1023_byte_packets; /* dword 58*/
+ u32 tx_1024_1518_byte_packets; /* dword 59*/
+ u32 tx_1519_2047_byte_packets; /* dword 60*/
+ u32 tx_2048_4095_byte_packets; /* dword 61*/
+ u32 tx_4096_8191_byte_packets; /* dword 62*/
+ u32 tx_8192_9216_byte_packets; /* dword 63*/
+ u32 rx_fifo_overflow; /* dword 64*/
+ u32 rx_input_fifo_overflow; /* dword 65*/
+};
+
+struct be_rxf_stats {
+ struct be_port_rxf_stats port[2];
+ u32 rx_drops_no_pbuf; /* dword 132*/
+ u32 rx_drops_no_txpb; /* dword 133*/
+ u32 rx_drops_no_erx_descr; /* dword 134*/
+ u32 rx_drops_no_tpre_descr; /* dword 135*/
+ u32 management_rx_port_packets; /* dword 136*/
+ u32 management_rx_port_bytes; /* dword 137*/
+ u32 management_rx_port_pause_frames; /* dword 138*/
+ u32 management_rx_port_errors; /* dword 139*/
+ u32 management_tx_port_packets; /* dword 140*/
+ u32 management_tx_port_bytes; /* dword 141*/
+ u32 management_tx_port_pause; /* dword 142*/
+ u32 management_rx_port_rxfifo_overflow; /* dword 143*/
+ u32 rx_drops_too_many_frags; /* dword 144*/
+ u32 rx_drops_invalid_ring; /* dword 145*/
+ u32 forwarded_packets; /* dword 146*/
+ u32 rx_drops_mtu; /* dword 147*/
+ u32 rsvd0[15];
+};
+
+struct be_erx_stats {
+ u32 rx_drops_no_fragments[44]; /* dwordS 0 to 43*/
+ u32 debug_wdma_sent_hold; /* dword 44*/
+ u32 debug_wdma_pbfree_sent_hold; /* dword 45*/
+ u32 debug_wdma_zerobyte_pbfree_sent_hold; /* dword 46*/
+ u32 debug_pmem_pbuf_dealloc; /* dword 47*/
+};
+
+struct be_hw_stats {
+ struct be_rxf_stats rxf;
+ u32 rsvd[48];
+ struct be_erx_stats erx;
+};
+
+struct be_cmd_req_get_stats {
+ struct be_cmd_req_hdr hdr;
+ u8 rsvd[sizeof(struct be_hw_stats)];
+};
+
+struct be_cmd_resp_get_stats {
+ struct be_cmd_resp_hdr hdr;
+ struct be_hw_stats hw_stats;
+};
+
+struct be_cmd_req_vlan_config {
+ struct be_cmd_req_hdr hdr;
+ u8 interface_id;
+ u8 promiscuous;
+ u8 untagged;
+ u8 num_vlan;
+ u16 normal_vlan[64];
+} __packed;
+
+struct be_cmd_req_promiscuous_config {
+ struct be_cmd_req_hdr hdr;
+ u8 port0_promiscuous;
+ u8 port1_promiscuous;
+ u16 rsvd0;
+} __packed;
+
+struct macaddr {
+ u8 byte[ETH_ALEN];
+};
+
+struct be_cmd_req_mcast_mac_config {
+ struct be_cmd_req_hdr hdr;
+ u16 num_mac;
+ u8 promiscuous;
+ u8 interface_id;
+ struct macaddr mac[32];
+} __packed;
+
+static inline struct be_hw_stats *
+hw_stats_from_cmd(struct be_cmd_resp_get_stats *cmd)
+{
+ return &cmd->hw_stats;
+}
+
+/******************** Link Status Query *******************/
+struct be_cmd_req_link_status {
+ struct be_cmd_req_hdr hdr;
+ u32 rsvd;
+};
+
+struct be_link_info {
+ u8 duplex;
+ u8 speed;
+ u8 fault;
+};
+
+enum {
+ PHY_LINK_DUPLEX_NONE = 0x0,
+ PHY_LINK_DUPLEX_HALF = 0x1,
+ PHY_LINK_DUPLEX_FULL = 0x2
+};
+
+enum {
+ PHY_LINK_SPEED_ZERO = 0x0, /* => No link */
+ PHY_LINK_SPEED_10MBPS = 0x1,
+ PHY_LINK_SPEED_100MBPS = 0x2,
+ PHY_LINK_SPEED_1GBPS = 0x3,
+ PHY_LINK_SPEED_10GBPS = 0x4
+};
+
+struct be_cmd_resp_link_status {
+ struct be_cmd_resp_hdr hdr;
+ u8 physical_port;
+ u8 mac_duplex;
+ u8 mac_speed;
+ u8 mac_fault;
+ u8 mgmt_mac_duplex;
+ u8 mgmt_mac_speed;
+ u16 rsvd0;
+} __packed;
+
+/******************** Get FW Version *******************/
+#define FW_VER_LEN 32
+struct be_cmd_req_get_fw_version {
+ struct be_cmd_req_hdr hdr;
+ u8 rsvd0[FW_VER_LEN];
+ u8 rsvd1[FW_VER_LEN];
+} __packed;
+
+struct be_cmd_resp_get_fw_version {
+ struct be_cmd_resp_hdr hdr;
+ u8 firmware_version_string[FW_VER_LEN];
+ u8 fw_on_flash_version_string[FW_VER_LEN];
+} __packed;
+
+/******************** Set Flow Contrl *******************/
+struct be_cmd_req_set_flow_control {
+ struct be_cmd_req_hdr hdr;
+ u16 tx_flow_control;
+ u16 rx_flow_control;
+} __packed;
+
+/******************** Get Flow Contrl *******************/
+struct be_cmd_req_get_flow_control {
+ struct be_cmd_req_hdr hdr;
+ u32 rsvd;
+};
+
+struct be_cmd_resp_get_flow_control {
+ struct be_cmd_resp_hdr hdr;
+ u16 tx_flow_control;
+ u16 rx_flow_control;
+} __packed;
+
+/******************** Modify EQ Delay *******************/
+struct be_cmd_req_modify_eq_delay {
+ struct be_cmd_req_hdr hdr;
+ u32 num_eq;
+ struct {
+ u32 eq_id;
+ u32 phase;
+ u32 delay_multiplier;
+ } delay[8];
+} __packed;
+
+struct be_cmd_resp_modify_eq_delay {
+ struct be_cmd_resp_hdr hdr;
+ u32 rsvd0;
+} __packed;
+
+/******************** Get FW Config *******************/
+struct be_cmd_req_query_fw_cfg {
+ struct be_cmd_req_hdr hdr;
+ u32 rsvd[30];
+};
+
+struct be_cmd_resp_query_fw_cfg {
+ struct be_cmd_resp_hdr hdr;
+ u32 be_config_number;
+ u32 asic_revision;
+ u32 phys_port;
+ u32 function_mode;
+ u32 rsvd[26];
+};
+
+extern int be_pci_fnum_get(struct be_ctrl_info *ctrl);
+extern int be_cmd_POST(struct be_ctrl_info *ctrl);
+extern int be_cmd_mac_addr_query(struct be_ctrl_info *ctrl, u8 *mac_addr,
+ u8 type, bool permanent, u32 if_handle);
+extern int be_cmd_pmac_add(struct be_ctrl_info *ctrl, u8 *mac_addr,
+ u32 if_id, u32 *pmac_id);
+extern int be_cmd_pmac_del(struct be_ctrl_info *ctrl, u32 if_id, u32 pmac_id);
+extern int be_cmd_if_create(struct be_ctrl_info *ctrl, u32 if_flags, u8 *mac,
+ bool pmac_invalid, u32 *if_handle, u32 *pmac_id);
+extern int be_cmd_if_destroy(struct be_ctrl_info *ctrl, u32 if_handle);
+extern int be_cmd_eq_create(struct be_ctrl_info *ctrl,
+ struct be_queue_info *eq, int eq_delay);
+extern int be_cmd_cq_create(struct be_ctrl_info *ctrl,
+ struct be_queue_info *cq, struct be_queue_info *eq,
+ bool sol_evts, bool no_delay,
+ int num_cqe_dma_coalesce);
+extern int be_cmd_txq_create(struct be_ctrl_info *ctrl,
+ struct be_queue_info *txq,
+ struct be_queue_info *cq);
+extern int be_cmd_rxq_create(struct be_ctrl_info *ctrl,
+ struct be_queue_info *rxq, u16 cq_id,
+ u16 frag_size, u16 max_frame_size, u32 if_id,
+ u32 rss);
+extern int be_cmd_q_destroy(struct be_ctrl_info *ctrl, struct be_queue_info *q,
+ int type);
+extern int be_cmd_link_status_query(struct be_ctrl_info *ctrl,
+ struct be_link_info *link);
+extern int be_cmd_reset(struct be_ctrl_info *ctrl);
+extern int be_cmd_get_stats(struct be_ctrl_info *ctrl,
+ struct be_dma_mem *nonemb_cmd);
+extern int be_cmd_get_fw_ver(struct be_ctrl_info *ctrl, char *fw_ver);
+
+extern int be_cmd_modify_eqd(struct be_ctrl_info *ctrl, u32 eq_id, u32 eqd);
+extern int be_cmd_vlan_config(struct be_ctrl_info *ctrl, u32 if_id,
+ u16 *vtag_array, u32 num, bool untagged,
+ bool promiscuous);
+extern int be_cmd_promiscuous_config(struct be_ctrl_info *ctrl,
+ u8 port_num, bool en);
+extern int be_cmd_mcast_mac_set(struct be_ctrl_info *ctrl, u32 if_id,
+ u8 *mac_table, u32 num, bool promiscuous);
+extern int be_cmd_set_flow_control(struct be_ctrl_info *ctrl,
+ u32 tx_fc, u32 rx_fc);
+extern int be_cmd_get_flow_control(struct be_ctrl_info *ctrl,
+ u32 *tx_fc, u32 *rx_fc);
+extern int be_cmd_query_fw_cfg(struct be_ctrl_info *ctrl, u32 *port_num);
--- /dev/null
+/*
+ * Copyright (C) 2005 - 2009 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation. The full GNU General
+ * Public License is included in this distribution in the file called COPYING.
+ *
+ * Contact Information:
+ * linux-drivers@serverengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+
+#include "be.h"
+#include <linux/ethtool.h>
+
+struct be_ethtool_stat {
+ char desc[ETH_GSTRING_LEN];
+ int type;
+ int size;
+ int offset;
+};
+
+enum {NETSTAT, PORTSTAT, MISCSTAT, DRVSTAT, ERXSTAT};
+#define FIELDINFO(_struct, field) FIELD_SIZEOF(_struct, field), \
+ offsetof(_struct, field)
+#define NETSTAT_INFO(field) #field, NETSTAT,\
+ FIELDINFO(struct net_device_stats,\
+ field)
+#define DRVSTAT_INFO(field) #field, DRVSTAT,\
+ FIELDINFO(struct be_drvr_stats, field)
+#define MISCSTAT_INFO(field) #field, MISCSTAT,\
+ FIELDINFO(struct be_rxf_stats, field)
+#define PORTSTAT_INFO(field) #field, PORTSTAT,\
+ FIELDINFO(struct be_port_rxf_stats, \
+ field)
+#define ERXSTAT_INFO(field) #field, ERXSTAT,\
+ FIELDINFO(struct be_erx_stats, field)
+
+static const struct be_ethtool_stat et_stats[] = {
+ {NETSTAT_INFO(rx_packets)},
+ {NETSTAT_INFO(tx_packets)},
+ {NETSTAT_INFO(rx_bytes)},
+ {NETSTAT_INFO(tx_bytes)},
+ {NETSTAT_INFO(rx_errors)},
+ {NETSTAT_INFO(tx_errors)},
+ {NETSTAT_INFO(rx_dropped)},
+ {NETSTAT_INFO(tx_dropped)},
+ {DRVSTAT_INFO(be_tx_reqs)},
+ {DRVSTAT_INFO(be_tx_stops)},
+ {DRVSTAT_INFO(be_fwd_reqs)},
+ {DRVSTAT_INFO(be_tx_wrbs)},
+ {DRVSTAT_INFO(be_polls)},
+ {DRVSTAT_INFO(be_tx_events)},
+ {DRVSTAT_INFO(be_rx_events)},
+ {DRVSTAT_INFO(be_tx_compl)},
+ {DRVSTAT_INFO(be_rx_compl)},
+ {DRVSTAT_INFO(be_ethrx_post_fail)},
+ {DRVSTAT_INFO(be_802_3_dropped_frames)},
+ {DRVSTAT_INFO(be_802_3_malformed_frames)},
+ {DRVSTAT_INFO(be_tx_rate)},
+ {DRVSTAT_INFO(be_rx_rate)},
+ {PORTSTAT_INFO(rx_unicast_frames)},
+ {PORTSTAT_INFO(rx_multicast_frames)},
+ {PORTSTAT_INFO(rx_broadcast_frames)},
+ {PORTSTAT_INFO(rx_crc_errors)},
+ {PORTSTAT_INFO(rx_alignment_symbol_errors)},
+ {PORTSTAT_INFO(rx_pause_frames)},
+ {PORTSTAT_INFO(rx_control_frames)},
+ {PORTSTAT_INFO(rx_in_range_errors)},
+ {PORTSTAT_INFO(rx_out_range_errors)},
+ {PORTSTAT_INFO(rx_frame_too_long)},
+ {PORTSTAT_INFO(rx_address_match_errors)},
+ {PORTSTAT_INFO(rx_vlan_mismatch)},
+ {PORTSTAT_INFO(rx_dropped_too_small)},
+ {PORTSTAT_INFO(rx_dropped_too_short)},
+ {PORTSTAT_INFO(rx_dropped_header_too_small)},
+ {PORTSTAT_INFO(rx_dropped_tcp_length)},
+ {PORTSTAT_INFO(rx_dropped_runt)},
+ {PORTSTAT_INFO(rx_fifo_overflow)},
+ {PORTSTAT_INFO(rx_input_fifo_overflow)},
+ {PORTSTAT_INFO(rx_ip_checksum_errs)},
+ {PORTSTAT_INFO(rx_tcp_checksum_errs)},
+ {PORTSTAT_INFO(rx_udp_checksum_errs)},
+ {PORTSTAT_INFO(rx_non_rss_packets)},
+ {PORTSTAT_INFO(rx_ipv4_packets)},
+ {PORTSTAT_INFO(rx_ipv6_packets)},
+ {PORTSTAT_INFO(tx_unicastframes)},
+ {PORTSTAT_INFO(tx_multicastframes)},
+ {PORTSTAT_INFO(tx_broadcastframes)},
+ {PORTSTAT_INFO(tx_pauseframes)},
+ {PORTSTAT_INFO(tx_controlframes)},
+ {MISCSTAT_INFO(rx_drops_no_pbuf)},
+ {MISCSTAT_INFO(rx_drops_no_txpb)},
+ {MISCSTAT_INFO(rx_drops_no_erx_descr)},
+ {MISCSTAT_INFO(rx_drops_no_tpre_descr)},
+ {MISCSTAT_INFO(rx_drops_too_many_frags)},
+ {MISCSTAT_INFO(rx_drops_invalid_ring)},
+ {MISCSTAT_INFO(forwarded_packets)},
+ {MISCSTAT_INFO(rx_drops_mtu)},
+ {ERXSTAT_INFO(rx_drops_no_fragments)},
+};
+#define ETHTOOL_STATS_NUM ARRAY_SIZE(et_stats)
+
+static void
+be_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo)
+{
+ struct be_adapter *adapter = netdev_priv(netdev);
+
+ strcpy(drvinfo->driver, DRV_NAME);
+ strcpy(drvinfo->version, DRV_VER);
+ strncpy(drvinfo->fw_version, adapter->fw_ver, FW_VER_LEN);
+ strcpy(drvinfo->bus_info, pci_name(adapter->pdev));
+ drvinfo->testinfo_len = 0;
+ drvinfo->regdump_len = 0;
+ drvinfo->eedump_len = 0;
+}
+
+static int
+be_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *coalesce)
+{
+ struct be_adapter *adapter = netdev_priv(netdev);
+ struct be_eq_obj *rx_eq = &adapter->rx_eq;
+ struct be_eq_obj *tx_eq = &adapter->tx_eq;
+
+ coalesce->rx_max_coalesced_frames = adapter->max_rx_coal;
+
+ coalesce->rx_coalesce_usecs = rx_eq->cur_eqd;
+ coalesce->rx_coalesce_usecs_high = rx_eq->max_eqd;
+ coalesce->rx_coalesce_usecs_low = rx_eq->min_eqd;
+
+ coalesce->tx_coalesce_usecs = tx_eq->cur_eqd;
+ coalesce->tx_coalesce_usecs_high = tx_eq->max_eqd;
+ coalesce->tx_coalesce_usecs_low = tx_eq->min_eqd;
+
+ coalesce->use_adaptive_rx_coalesce = rx_eq->enable_aic;
+ coalesce->use_adaptive_tx_coalesce = tx_eq->enable_aic;
+
+ return 0;
+}
+
+/*
+ * This routine is used to set interrup coalescing delay *as well as*
+ * the number of pkts to coalesce for LRO.
+ */
+static int
+be_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *coalesce)
+{
+ struct be_adapter *adapter = netdev_priv(netdev);
+ struct be_ctrl_info *ctrl = &adapter->ctrl;
+ struct be_eq_obj *rx_eq = &adapter->rx_eq;
+ struct be_eq_obj *tx_eq = &adapter->tx_eq;
+ u32 tx_max, tx_min, tx_cur;
+ u32 rx_max, rx_min, rx_cur;
+ int status = 0;
+
+ if (coalesce->use_adaptive_tx_coalesce == 1)
+ return -EINVAL;
+
+ adapter->max_rx_coal = coalesce->rx_max_coalesced_frames;
+ if (adapter->max_rx_coal > MAX_SKB_FRAGS)
+ adapter->max_rx_coal = MAX_SKB_FRAGS - 1;
+
+ /* if AIC is being turned on now, start with an EQD of 0 */
+ if (rx_eq->enable_aic == 0 &&
+ coalesce->use_adaptive_rx_coalesce == 1) {
+ rx_eq->cur_eqd = 0;
+ }
+ rx_eq->enable_aic = coalesce->use_adaptive_rx_coalesce;
+
+ rx_max = coalesce->rx_coalesce_usecs_high;
+ rx_min = coalesce->rx_coalesce_usecs_low;
+ rx_cur = coalesce->rx_coalesce_usecs;
+
+ tx_max = coalesce->tx_coalesce_usecs_high;
+ tx_min = coalesce->tx_coalesce_usecs_low;
+ tx_cur = coalesce->tx_coalesce_usecs;
+
+ if (tx_cur > BE_MAX_EQD)
+ tx_cur = BE_MAX_EQD;
+ if (tx_eq->cur_eqd != tx_cur) {
+ status = be_cmd_modify_eqd(ctrl, tx_eq->q.id, tx_cur);
+ if (!status)
+ tx_eq->cur_eqd = tx_cur;
+ }
+
+ if (rx_eq->enable_aic) {
+ if (rx_max > BE_MAX_EQD)
+ rx_max = BE_MAX_EQD;
+ if (rx_min > rx_max)
+ rx_min = rx_max;
+ rx_eq->max_eqd = rx_max;
+ rx_eq->min_eqd = rx_min;
+ if (rx_eq->cur_eqd > rx_max)
+ rx_eq->cur_eqd = rx_max;
+ if (rx_eq->cur_eqd < rx_min)
+ rx_eq->cur_eqd = rx_min;
+ } else {
+ if (rx_cur > BE_MAX_EQD)
+ rx_cur = BE_MAX_EQD;
+ if (rx_eq->cur_eqd != rx_cur) {
+ status = be_cmd_modify_eqd(ctrl, rx_eq->q.id, rx_cur);
+ if (!status)
+ rx_eq->cur_eqd = rx_cur;
+ }
+ }
+ return 0;
+}
+
+static u32 be_get_rx_csum(struct net_device *netdev)
+{
+ struct be_adapter *adapter = netdev_priv(netdev);
+
+ return adapter->rx_csum;
+}
+
+static int be_set_rx_csum(struct net_device *netdev, uint32_t data)
+{
+ struct be_adapter *adapter = netdev_priv(netdev);
+
+ if (data)
+ adapter->rx_csum = true;
+ else
+ adapter->rx_csum = false;
+
+ return 0;
+}
+
+static void
+be_get_ethtool_stats(struct net_device *netdev,
+ struct ethtool_stats *stats, uint64_t *data)
+{
+ struct be_adapter *adapter = netdev_priv(netdev);
+ struct be_drvr_stats *drvr_stats = &adapter->stats.drvr_stats;
+ struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
+ struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
+ struct be_port_rxf_stats *port_stats =
+ &rxf_stats->port[adapter->port_num];
+ struct net_device_stats *net_stats = &adapter->stats.net_stats;
+ struct be_erx_stats *erx_stats = &hw_stats->erx;
+ void *p = NULL;
+ int i;
+
+ for (i = 0; i < ETHTOOL_STATS_NUM; i++) {
+ switch (et_stats[i].type) {
+ case NETSTAT:
+ p = net_stats;
+ break;
+ case DRVSTAT:
+ p = drvr_stats;
+ break;
+ case PORTSTAT:
+ p = port_stats;
+ break;
+ case MISCSTAT:
+ p = rxf_stats;
+ break;
+ case ERXSTAT: /* Currently only one ERX stat is provided */
+ p = (u32 *)erx_stats + adapter->rx_obj.q.id;
+ break;
+ }
+
+ p = (u8 *)p + et_stats[i].offset;
+ data[i] = (et_stats[i].size == sizeof(u64)) ?
+ *(u64 *)p: *(u32 *)p;
+ }
+
+ return;
+}
+
+static void
+be_get_stat_strings(struct net_device *netdev, uint32_t stringset,
+ uint8_t *data)
+{
+ int i;
+ switch (stringset) {
+ case ETH_SS_STATS:
+ for (i = 0; i < ETHTOOL_STATS_NUM; i++) {
+ memcpy(data, et_stats[i].desc, ETH_GSTRING_LEN);
+ data += ETH_GSTRING_LEN;
+ }
+ break;
+ }
+}
+
+static int be_get_stats_count(struct net_device *netdev)
+{
+ return ETHTOOL_STATS_NUM;
+}
+
+static int be_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
+{
+ ecmd->speed = SPEED_10000;
+ ecmd->duplex = DUPLEX_FULL;
+ ecmd->autoneg = AUTONEG_DISABLE;
+ return 0;
+}
+
+static void
+be_get_ringparam(struct net_device *netdev, struct ethtool_ringparam *ring)
+{
+ struct be_adapter *adapter = netdev_priv(netdev);
+
+ ring->rx_max_pending = adapter->rx_obj.q.len;
+ ring->tx_max_pending = adapter->tx_obj.q.len;
+
+ ring->rx_pending = atomic_read(&adapter->rx_obj.q.used);
+ ring->tx_pending = atomic_read(&adapter->tx_obj.q.used);
+}
+
+static void
+be_get_pauseparam(struct net_device *netdev, struct ethtool_pauseparam *ecmd)
+{
+ struct be_adapter *adapter = netdev_priv(netdev);
+
+ be_cmd_get_flow_control(&adapter->ctrl, &ecmd->tx_pause,
+ &ecmd->rx_pause);
+ ecmd->autoneg = AUTONEG_ENABLE;
+}
+
+static int
+be_set_pauseparam(struct net_device *netdev, struct ethtool_pauseparam *ecmd)
+{
+ struct be_adapter *adapter = netdev_priv(netdev);
+ int status;
+
+ if (ecmd->autoneg != AUTONEG_ENABLE)
+ return -EINVAL;
+
+ status = be_cmd_set_flow_control(&adapter->ctrl, ecmd->tx_pause,
+ ecmd->rx_pause);
+ if (!status)
+ dev_warn(&adapter->pdev->dev, "Pause param set failed.\n");
+
+ return status;
+}
+
+struct ethtool_ops be_ethtool_ops = {
+ .get_settings = be_get_settings,
+ .get_drvinfo = be_get_drvinfo,
+ .get_link = ethtool_op_get_link,
+ .get_coalesce = be_get_coalesce,
+ .set_coalesce = be_set_coalesce,
+ .get_ringparam = be_get_ringparam,
+ .get_pauseparam = be_get_pauseparam,
+ .set_pauseparam = be_set_pauseparam,
+ .get_rx_csum = be_get_rx_csum,
+ .set_rx_csum = be_set_rx_csum,
+ .get_tx_csum = ethtool_op_get_tx_csum,
+ .set_tx_csum = ethtool_op_set_tx_csum,
+ .get_sg = ethtool_op_get_sg,
+ .set_sg = ethtool_op_set_sg,
+ .get_tso = ethtool_op_get_tso,
+ .set_tso = ethtool_op_set_tso,
+ .get_strings = be_get_stat_strings,
+ .get_stats_count = be_get_stats_count,
+ .get_ethtool_stats = be_get_ethtool_stats,
+};
--- /dev/null
+/*
+ * Copyright (C) 2005 - 2009 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation. The full GNU General
+ * Public License is included in this distribution in the file called COPYING.
+ *
+ * Contact Information:
+ * linux-drivers@serverengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+
+/********* Mailbox door bell *************/
+/* Used for driver communication with the FW.
+ * The software must write this register twice to post any command. First,
+ * it writes the register with hi=1 and the upper bits of the physical address
+ * for the MAILBOX structure. Software must poll the ready bit until this
+ * is acknowledged. Then, sotware writes the register with hi=0 with the lower
+ * bits in the address. It must poll the ready bit until the command is
+ * complete. Upon completion, the MAILBOX will contain a valid completion
+ * queue entry.
+ */
+#define MPU_MAILBOX_DB_OFFSET 0x160
+#define MPU_MAILBOX_DB_RDY_MASK 0x1 /* bit 0 */
+#define MPU_MAILBOX_DB_HI_MASK 0x2 /* bit 1 */
+
+#define MPU_EP_CONTROL 0
+
+/********** MPU semphore ******************/
+#define MPU_EP_SEMAPHORE_OFFSET 0xac
+#define EP_SEMAPHORE_POST_STAGE_MASK 0x0000FFFF
+#define EP_SEMAPHORE_POST_ERR_MASK 0x1
+#define EP_SEMAPHORE_POST_ERR_SHIFT 31
+/* MPU semphore POST stage values */
+#define POST_STAGE_AWAITING_HOST_RDY 0x1 /* FW awaiting goahead from host */
+#define POST_STAGE_HOST_RDY 0x2 /* Host has given go-ahed to FW */
+#define POST_STAGE_BE_RESET 0x3 /* Host wants to reset chip */
+#define POST_STAGE_ARMFW_RDY 0xc000 /* FW is done with POST */
+
+/********* Memory BAR register ************/
+#define PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET 0xfc
+/* Host Interrupt Enable, if set interrupts are enabled although "PCI Interrupt
+ * Disable" may still globally block interrupts in addition to individual
+ * interrupt masks; a mechanism for the device driver to block all interrupts
+ * atomically without having to arbitrate for the PCI Interrupt Disable bit
+ * with the OS.
+ */
+#define MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK (1 << 29) /* bit 29 */
+/* PCI physical function number */
+#define MEMBAR_CTRL_INT_CTRL_PFUNC_MASK 0x7 /* bits 26 - 28 */
+#define MEMBAR_CTRL_INT_CTRL_PFUNC_SHIFT 26
+
+/********* Event Q door bell *************/
+#define DB_EQ_OFFSET DB_CQ_OFFSET
+#define DB_EQ_RING_ID_MASK 0x1FF /* bits 0 - 8 */
+/* Clear the interrupt for this eq */
+#define DB_EQ_CLR_SHIFT (9) /* bit 9 */
+/* Must be 1 */
+#define DB_EQ_EVNT_SHIFT (10) /* bit 10 */
+/* Number of event entries processed */
+#define DB_EQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */
+/* Rearm bit */
+#define DB_EQ_REARM_SHIFT (29) /* bit 29 */
+
+/********* Compl Q door bell *************/
+#define DB_CQ_OFFSET 0x120
+#define DB_CQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */
+/* Number of event entries processed */
+#define DB_CQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */
+/* Rearm bit */
+#define DB_CQ_REARM_SHIFT (29) /* bit 29 */
+
+/********** TX ULP door bell *************/
+#define DB_TXULP1_OFFSET 0x60
+#define DB_TXULP_RING_ID_MASK 0x7FF /* bits 0 - 10 */
+/* Number of tx entries posted */
+#define DB_TXULP_NUM_POSTED_SHIFT (16) /* bits 16 - 29 */
+#define DB_TXULP_NUM_POSTED_MASK 0x3FFF /* bits 16 - 29 */
+
+/********** RQ(erx) door bell ************/
+#define DB_RQ_OFFSET 0x100
+#define DB_RQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */
+/* Number of rx frags posted */
+#define DB_RQ_NUM_POSTED_SHIFT (24) /* bits 24 - 31 */
+
+/*
+ * BE descriptors: host memory data structures whose formats
+ * are hardwired in BE silicon.
+ */
+/* Event Queue Descriptor */
+#define EQ_ENTRY_VALID_MASK 0x1 /* bit 0 */
+#define EQ_ENTRY_RES_ID_MASK 0xFFFF /* bits 16 - 31 */
+#define EQ_ENTRY_RES_ID_SHIFT 16
+struct be_eq_entry {
+ u32 evt;
+};
+
+/* TX Queue Descriptor */
+#define ETH_WRB_FRAG_LEN_MASK 0xFFFF
+struct be_eth_wrb {
+ u32 frag_pa_hi; /* dword 0 */
+ u32 frag_pa_lo; /* dword 1 */
+ u32 rsvd0; /* dword 2 */
+ u32 frag_len; /* dword 3: bits 0 - 15 */
+} __packed;
+
+/* Pseudo amap definition for eth_hdr_wrb in which each bit of the
+ * actual structure is defined as a byte : used to calculate
+ * offset/shift/mask of each field */
+struct amap_eth_hdr_wrb {
+ u8 rsvd0[32]; /* dword 0 */
+ u8 rsvd1[32]; /* dword 1 */
+ u8 complete; /* dword 2 */
+ u8 event;
+ u8 crc;
+ u8 forward;
+ u8 ipsec;
+ u8 mgmt;
+ u8 ipcs;
+ u8 udpcs;
+ u8 tcpcs;
+ u8 lso;
+ u8 vlan;
+ u8 gso[2];
+ u8 num_wrb[5];
+ u8 lso_mss[14];
+ u8 len[16]; /* dword 3 */
+ u8 vlan_tag[16];
+} __packed;
+
+struct be_eth_hdr_wrb {
+ u32 dw[4];
+};
+
+/* TX Compl Queue Descriptor */
+
+/* Pseudo amap definition for eth_tx_compl in which each bit of the
+ * actual structure is defined as a byte: used to calculate
+ * offset/shift/mask of each field */
+struct amap_eth_tx_compl {
+ u8 wrb_index[16]; /* dword 0 */
+ u8 ct[2]; /* dword 0 */
+ u8 port[2]; /* dword 0 */
+ u8 rsvd0[8]; /* dword 0 */
+ u8 status[4]; /* dword 0 */
+ u8 user_bytes[16]; /* dword 1 */
+ u8 nwh_bytes[8]; /* dword 1 */
+ u8 lso; /* dword 1 */
+ u8 cast_enc[2]; /* dword 1 */
+ u8 rsvd1[5]; /* dword 1 */
+ u8 rsvd2[32]; /* dword 2 */
+ u8 pkts[16]; /* dword 3 */
+ u8 ringid[11]; /* dword 3 */
+ u8 hash_val[4]; /* dword 3 */
+ u8 valid; /* dword 3 */
+} __packed;
+
+struct be_eth_tx_compl {
+ u32 dw[4];
+};
+
+/* RX Queue Descriptor */
+struct be_eth_rx_d {
+ u32 fragpa_hi;
+ u32 fragpa_lo;
+};
+
+/* RX Compl Queue Descriptor */
+
+/* Pseudo amap definition for eth_rx_compl in which each bit of the
+ * actual structure is defined as a byte: used to calculate
+ * offset/shift/mask of each field */
+struct amap_eth_rx_compl {
+ u8 vlan_tag[16]; /* dword 0 */
+ u8 pktsize[14]; /* dword 0 */
+ u8 port; /* dword 0 */
+ u8 ip_opt; /* dword 0 */
+ u8 err; /* dword 1 */
+ u8 rsshp; /* dword 1 */
+ u8 ipf; /* dword 1 */
+ u8 tcpf; /* dword 1 */
+ u8 udpf; /* dword 1 */
+ u8 ipcksm; /* dword 1 */
+ u8 l4_cksm; /* dword 1 */
+ u8 ip_version; /* dword 1 */
+ u8 macdst[6]; /* dword 1 */
+ u8 vtp; /* dword 1 */
+ u8 rsvd0; /* dword 1 */
+ u8 fragndx[10]; /* dword 1 */
+ u8 ct[2]; /* dword 1 */
+ u8 sw; /* dword 1 */
+ u8 numfrags[3]; /* dword 1 */
+ u8 rss_flush; /* dword 2 */
+ u8 cast_enc[2]; /* dword 2 */
+ u8 qnq; /* dword 2 */
+ u8 rss_bank; /* dword 2 */
+ u8 rsvd1[23]; /* dword 2 */
+ u8 lro_pkt; /* dword 2 */
+ u8 rsvd2[2]; /* dword 2 */
+ u8 valid; /* dword 2 */
+ u8 rsshash[32]; /* dword 3 */
+} __packed;
+
+struct be_eth_rx_compl {
+ u32 dw[4];
+};
--- /dev/null
+/*
+ * Copyright (C) 2005 - 2009 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation. The full GNU General
+ * Public License is included in this distribution in the file called COPYING.
+ *
+ * Contact Information:
+ * linux-drivers@serverengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+
+#include "be.h"
+
+MODULE_VERSION(DRV_VER);
+MODULE_DEVICE_TABLE(pci, be_dev_ids);
+MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
+MODULE_AUTHOR("ServerEngines Corporation");
+MODULE_LICENSE("GPL");
+
+static unsigned int rx_frag_size = 2048;
+module_param(rx_frag_size, uint, S_IRUGO);
+MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
+
+#define BE_VENDOR_ID 0x19a2
+#define BE2_DEVICE_ID_1 0x0211
+static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
+ { PCI_DEVICE(BE_VENDOR_ID, BE2_DEVICE_ID_1) },
+ { 0 }
+};
+MODULE_DEVICE_TABLE(pci, be_dev_ids);
+
+static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
+{
+ struct be_dma_mem *mem = &q->dma_mem;
+ if (mem->va)
+ pci_free_consistent(adapter->pdev, mem->size,
+ mem->va, mem->dma);
+}
+
+static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
+ u16 len, u16 entry_size)
+{
+ struct be_dma_mem *mem = &q->dma_mem;
+
+ memset(q, 0, sizeof(*q));
+ q->len = len;
+ q->entry_size = entry_size;
+ mem->size = len * entry_size;
+ mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
+ if (!mem->va)
+ return -1;
+ memset(mem->va, 0, mem->size);
+ return 0;
+}
+
+static inline void *queue_head_node(struct be_queue_info *q)
+{
+ return q->dma_mem.va + q->head * q->entry_size;
+}
+
+static inline void *queue_tail_node(struct be_queue_info *q)
+{
+ return q->dma_mem.va + q->tail * q->entry_size;
+}
+
+static inline void queue_head_inc(struct be_queue_info *q)
+{
+ index_inc(&q->head, q->len);
+}
+
+static inline void queue_tail_inc(struct be_queue_info *q)
+{
+ index_inc(&q->tail, q->len);
+}
+
+static void be_intr_set(struct be_ctrl_info *ctrl, bool enable)
+{
+ u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
+ u32 reg = ioread32(addr);
+ u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
+ if (!enabled && enable) {
+ reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
+ } else if (enabled && !enable) {
+ reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
+ } else {
+ printk(KERN_WARNING DRV_NAME
+ ": bad value in membar_int_ctrl reg=0x%x\n", reg);
+ return;
+ }
+ iowrite32(reg, addr);
+}
+
+static void be_rxq_notify(struct be_ctrl_info *ctrl, u16 qid, u16 posted)
+{
+ u32 val = 0;
+ val |= qid & DB_RQ_RING_ID_MASK;
+ val |= posted << DB_RQ_NUM_POSTED_SHIFT;
+ iowrite32(val, ctrl->db + DB_RQ_OFFSET);
+}
+
+static void be_txq_notify(struct be_ctrl_info *ctrl, u16 qid, u16 posted)
+{
+ u32 val = 0;
+ val |= qid & DB_TXULP_RING_ID_MASK;
+ val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
+ iowrite32(val, ctrl->db + DB_TXULP1_OFFSET);
+}
+
+static void be_eq_notify(struct be_ctrl_info *ctrl, u16 qid,
+ bool arm, bool clear_int, u16 num_popped)
+{
+ u32 val = 0;
+ val |= qid & DB_EQ_RING_ID_MASK;
+ if (arm)
+ val |= 1 << DB_EQ_REARM_SHIFT;
+ if (clear_int)
+ val |= 1 << DB_EQ_CLR_SHIFT;
+ val |= 1 << DB_EQ_EVNT_SHIFT;
+ val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
+ iowrite32(val, ctrl->db + DB_EQ_OFFSET);
+}
+
+static void be_cq_notify(struct be_ctrl_info *ctrl, u16 qid,
+ bool arm, u16 num_popped)
+{
+ u32 val = 0;
+ val |= qid & DB_CQ_RING_ID_MASK;
+ if (arm)
+ val |= 1 << DB_CQ_REARM_SHIFT;
+ val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
+ iowrite32(val, ctrl->db + DB_CQ_OFFSET);
+}
+
+
+static int be_mac_addr_set(struct net_device *netdev, void *p)
+{
+ struct be_adapter *adapter = netdev_priv(netdev);
+ struct sockaddr *addr = p;
+ int status = 0;
+
+ if (netif_running(netdev)) {
+ status = be_cmd_pmac_del(&adapter->ctrl, adapter->if_handle,
+ adapter->pmac_id);
+ if (status)
+ return status;
+
+ status = be_cmd_pmac_add(&adapter->ctrl, (u8 *)addr->sa_data,
+ adapter->if_handle, &adapter->pmac_id);
+ }
+
+ if (!status)
+ memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
+
+ return status;
+}
+
+static void netdev_stats_update(struct be_adapter *adapter)
+{
+ struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
+ struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
+ struct be_port_rxf_stats *port_stats =
+ &rxf_stats->port[adapter->port_num];
+ struct net_device_stats *dev_stats = &adapter->stats.net_stats;
+
+ dev_stats->rx_packets = port_stats->rx_total_frames;
+ dev_stats->tx_packets = port_stats->tx_unicastframes +
+ port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
+ dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
+ (u64) port_stats->rx_bytes_lsd;
+ dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
+ (u64) port_stats->tx_bytes_lsd;
+
+ /* bad pkts received */
+ dev_stats->rx_errors = port_stats->rx_crc_errors +
+ port_stats->rx_alignment_symbol_errors +
+ port_stats->rx_in_range_errors +
+ port_stats->rx_out_range_errors + port_stats->rx_frame_too_long;
+
+ /* packet transmit problems */
+ dev_stats->tx_errors = 0;
+
+ /* no space in linux buffers */
+ dev_stats->rx_dropped = 0;
+
+ /* no space available in linux */
+ dev_stats->tx_dropped = 0;
+
+ dev_stats->multicast = port_stats->tx_multicastframes;
+ dev_stats->collisions = 0;
+
+ /* detailed rx errors */
+ dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
+ port_stats->rx_out_range_errors + port_stats->rx_frame_too_long;
+ /* receive ring buffer overflow */
+ dev_stats->rx_over_errors = 0;
+ dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
+
+ /* frame alignment errors */
+ dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
+ /* receiver fifo overrun */
+ /* drops_no_pbuf is no per i/f, it's per BE card */
+ dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
+ port_stats->rx_input_fifo_overflow +
+ rxf_stats->rx_drops_no_pbuf;
+ /* receiver missed packetd */
+ dev_stats->rx_missed_errors = 0;
+ /* detailed tx_errors */
+ dev_stats->tx_aborted_errors = 0;
+ dev_stats->tx_carrier_errors = 0;
+ dev_stats->tx_fifo_errors = 0;
+ dev_stats->tx_heartbeat_errors = 0;
+ dev_stats->tx_window_errors = 0;
+}
+
+static void be_link_status_update(struct be_adapter *adapter)
+{
+ struct be_link_info *prev = &adapter->link;
+ struct be_link_info now = { 0 };
+ struct net_device *netdev = adapter->netdev;
+
+ be_cmd_link_status_query(&adapter->ctrl, &now);
+
+ /* If link came up or went down */
+ if (now.speed != prev->speed && (now.speed == PHY_LINK_SPEED_ZERO ||
+ prev->speed == PHY_LINK_SPEED_ZERO)) {
+ if (now.speed == PHY_LINK_SPEED_ZERO) {
+ netif_stop_queue(netdev);
+ netif_carrier_off(netdev);
+ printk(KERN_INFO "%s: Link down\n", netdev->name);
+ } else {
+ netif_start_queue(netdev);
+ netif_carrier_on(netdev);
+ printk(KERN_INFO "%s: Link up\n", netdev->name);
+ }
+ }
+ *prev = now;
+}
+
+/* Update the EQ delay n BE based on the RX frags consumed / sec */
+static void be_rx_eqd_update(struct be_adapter *adapter)
+{
+ u32 eqd;
+ struct be_ctrl_info *ctrl = &adapter->ctrl;
+ struct be_eq_obj *rx_eq = &adapter->rx_eq;
+ struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
+
+ /* Update once a second */
+ if (((jiffies - stats->rx_fps_jiffies) < HZ) || rx_eq->enable_aic == 0)
+ return;
+
+ stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
+ ((jiffies - stats->rx_fps_jiffies) / HZ);
+
+ stats->rx_fps_jiffies = jiffies;
+ stats->be_prev_rx_frags = stats->be_rx_frags;
+ eqd = stats->be_rx_fps / 110000;
+ eqd = eqd << 3;
+ if (eqd > rx_eq->max_eqd)
+ eqd = rx_eq->max_eqd;
+ if (eqd < rx_eq->min_eqd)
+ eqd = rx_eq->min_eqd;
+ if (eqd < 10)
+ eqd = 0;
+ if (eqd != rx_eq->cur_eqd)
+ be_cmd_modify_eqd(ctrl, rx_eq->q.id, eqd);
+
+ rx_eq->cur_eqd = eqd;
+}
+
+static struct net_device_stats *be_get_stats(struct net_device *dev)
+{
+ struct be_adapter *adapter = netdev_priv(dev);
+
+ return &adapter->stats.net_stats;
+}
+
+static void be_tx_stats_update(struct be_adapter *adapter,
+ u32 wrb_cnt, u32 copied, bool stopped)
+{
+ struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
+ stats->be_tx_reqs++;
+ stats->be_tx_wrbs += wrb_cnt;
+ stats->be_tx_bytes += copied;
+ if (stopped)
+ stats->be_tx_stops++;
+
+ /* Update tx rate once in two seconds */
+ if ((jiffies - stats->be_tx_jiffies) > 2 * HZ) {
+ u32 r;
+ r = (stats->be_tx_bytes - stats->be_tx_bytes_prev) /
+ ((u32) (jiffies - stats->be_tx_jiffies) / HZ);
+ r = (r / 1000000); /* M bytes/s */
+ stats->be_tx_rate = (r * 8); /* M bits/s */
+ stats->be_tx_jiffies = jiffies;
+ stats->be_tx_bytes_prev = stats->be_tx_bytes;
+ }
+}
+
+/* Determine number of WRB entries needed to xmit data in an skb */
+static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
+{
+ int cnt = 0;
+ while (skb) {
+ if (skb->len > skb->data_len)
+ cnt++;
+ cnt += skb_shinfo(skb)->nr_frags;
+ skb = skb_shinfo(skb)->frag_list;
+ }
+ /* to account for hdr wrb */
+ cnt++;
+ if (cnt & 1) {
+ /* add a dummy to make it an even num */
+ cnt++;
+ *dummy = true;
+ } else
+ *dummy = false;
+ BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
+ return cnt;
+}
+
+static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
+{
+ wrb->frag_pa_hi = upper_32_bits(addr);
+ wrb->frag_pa_lo = addr & 0xFFFFFFFF;
+ wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
+}
+
+static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
+ bool vlan, u32 wrb_cnt, u32 len)
+{
+ memset(hdr, 0, sizeof(*hdr));
+
+ AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
+
+ if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
+ AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
+ AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
+ hdr, skb_shinfo(skb)->gso_size);
+ } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
+ if (is_tcp_pkt(skb))
+ AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
+ else if (is_udp_pkt(skb))
+ AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
+ }
+
+ if (vlan && vlan_tx_tag_present(skb)) {
+ AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
+ AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
+ hdr, vlan_tx_tag_get(skb));
+ }
+
+ AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
+ AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
+ AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
+ AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
+}
+
+
+static int make_tx_wrbs(struct be_adapter *adapter,
+ struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
+{
+ u64 busaddr;
+ u32 i, copied = 0;
+ struct pci_dev *pdev = adapter->pdev;
+ struct sk_buff *first_skb = skb;
+ struct be_queue_info *txq = &adapter->tx_obj.q;
+ struct be_eth_wrb *wrb;
+ struct be_eth_hdr_wrb *hdr;
+
+ atomic_add(wrb_cnt, &txq->used);
+ hdr = queue_head_node(txq);
+ queue_head_inc(txq);
+
+ while (skb) {
+ if (skb->len > skb->data_len) {
+ int len = skb->len - skb->data_len;
+ busaddr = pci_map_single(pdev, skb->data, len,
+ PCI_DMA_TODEVICE);
+ wrb = queue_head_node(txq);
+ wrb_fill(wrb, busaddr, len);
+ be_dws_cpu_to_le(wrb, sizeof(*wrb));
+ queue_head_inc(txq);
+ copied += len;
+ }
+
+ for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
+ struct skb_frag_struct *frag =
+ &skb_shinfo(skb)->frags[i];
+ busaddr = pci_map_page(pdev, frag->page,
+ frag->page_offset,
+ frag->size, PCI_DMA_TODEVICE);
+ wrb = queue_head_node(txq);
+ wrb_fill(wrb, busaddr, frag->size);
+ be_dws_cpu_to_le(wrb, sizeof(*wrb));
+ queue_head_inc(txq);
+ copied += frag->size;
+ }
+ skb = skb_shinfo(skb)->frag_list;
+ }
+
+ if (dummy_wrb) {
+ wrb = queue_head_node(txq);
+ wrb_fill(wrb, 0, 0);
+ be_dws_cpu_to_le(wrb, sizeof(*wrb));
+ queue_head_inc(txq);
+ }
+
+ wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
+ wrb_cnt, copied);
+ be_dws_cpu_to_le(hdr, sizeof(*hdr));
+
+ return copied;
+}
+
+static int be_xmit(struct sk_buff *skb, struct net_device *netdev)
+{
+ struct be_adapter *adapter = netdev_priv(netdev);
+ struct be_tx_obj *tx_obj = &adapter->tx_obj;
+ struct be_queue_info *txq = &tx_obj->q;
+ u32 wrb_cnt = 0, copied = 0;
+ u32 start = txq->head;
+ bool dummy_wrb, stopped = false;
+
+ wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
+
+ copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
+
+ /* record the sent skb in the sent_skb table */
+ BUG_ON(tx_obj->sent_skb_list[start]);
+ tx_obj->sent_skb_list[start] = skb;
+
+ /* Ensure that txq has space for the next skb; Else stop the queue
+ * *BEFORE* ringing the tx doorbell, so that we serialze the
+ * tx compls of the current transmit which'll wake up the queue
+ */
+ if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >= txq->len) {
+ netif_stop_queue(netdev);
+ stopped = true;
+ }
+
+ be_txq_notify(&adapter->ctrl, txq->id, wrb_cnt);
+
+ netdev->trans_start = jiffies;
+
+ be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
+ return NETDEV_TX_OK;
+}
+
+static int be_change_mtu(struct net_device *netdev, int new_mtu)
+{
+ struct be_adapter *adapter = netdev_priv(netdev);
+ if (new_mtu < BE_MIN_MTU ||
+ new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
+ dev_info(&adapter->pdev->dev,
+ "MTU must be between %d and %d bytes\n",
+ BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
+ return -EINVAL;
+ }
+ dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
+ netdev->mtu, new_mtu);
+ netdev->mtu = new_mtu;
+ return 0;
+}
+
+/*
+ * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
+ * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
+ * set the BE in promiscuous VLAN mode.
+ */
+static void be_vid_config(struct net_device *netdev)
+{
+ struct be_adapter *adapter = netdev_priv(netdev);
+ u16 vtag[BE_NUM_VLANS_SUPPORTED];
+ u16 ntags = 0, i;
+
+ if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
+ /* Construct VLAN Table to give to HW */
+ for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
+ if (adapter->vlan_tag[i]) {
+ vtag[ntags] = cpu_to_le16(i);
+ ntags++;
+ }
+ }
+ be_cmd_vlan_config(&adapter->ctrl, adapter->if_handle,
+ vtag, ntags, 1, 0);
+ } else {
+ be_cmd_vlan_config(&adapter->ctrl, adapter->if_handle,
+ NULL, 0, 1, 1);
+ }
+}
+
+static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
+{
+ struct be_adapter *adapter = netdev_priv(netdev);
+ struct be_eq_obj *rx_eq = &adapter->rx_eq;
+ struct be_eq_obj *tx_eq = &adapter->tx_eq;
+ struct be_ctrl_info *ctrl = &adapter->ctrl;
+
+ be_eq_notify(ctrl, rx_eq->q.id, false, false, 0);
+ be_eq_notify(ctrl, tx_eq->q.id, false, false, 0);
+ adapter->vlan_grp = grp;
+ be_eq_notify(ctrl, rx_eq->q.id, true, false, 0);
+ be_eq_notify(ctrl, tx_eq->q.id, true, false, 0);
+}
+
+static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
+{
+ struct be_adapter *adapter = netdev_priv(netdev);
+
+ adapter->num_vlans++;
+ adapter->vlan_tag[vid] = 1;
+
+ be_vid_config(netdev);
+}
+
+static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
+{
+ struct be_adapter *adapter = netdev_priv(netdev);
+
+ adapter->num_vlans--;
+ adapter->vlan_tag[vid] = 0;
+
+ vlan_group_set_device(adapter->vlan_grp, vid, NULL);
+ be_vid_config(netdev);
+}
+
+static void be_set_multicast_filter(struct net_device *netdev)
+{
+ struct be_adapter *adapter = netdev_priv(netdev);
+ struct dev_mc_list *mc_ptr;
+ u8 mac_addr[32][ETH_ALEN];
+ int i = 0;
+
+ if (netdev->flags & IFF_ALLMULTI) {
+ /* set BE in Multicast promiscuous */
+ be_cmd_mcast_mac_set(&adapter->ctrl,
+ adapter->if_handle, NULL, 0, true);
+ return;
+ }
+
+ for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
+ memcpy(&mac_addr[i][0], mc_ptr->dmi_addr, ETH_ALEN);
+ if (++i >= 32) {
+ be_cmd_mcast_mac_set(&adapter->ctrl,
+ adapter->if_handle, &mac_addr[0][0], i, false);
+ i = 0;
+ }
+
+ }
+
+ if (i) {
+ /* reset the promiscuous mode also. */
+ be_cmd_mcast_mac_set(&adapter->ctrl,
+ adapter->if_handle, &mac_addr[0][0], i, false);
+ }
+}
+
+static void be_set_multicast_list(struct net_device *netdev)
+{
+ struct be_adapter *adapter = netdev_priv(netdev);
+
+ if (netdev->flags & IFF_PROMISC) {
+ be_cmd_promiscuous_config(&adapter->ctrl, adapter->port_num, 1);
+ } else {
+ be_cmd_promiscuous_config(&adapter->ctrl, adapter->port_num, 0);
+ be_set_multicast_filter(netdev);
+ }
+}
+
+static void be_rx_rate_update(struct be_adapter *adapter, u32 pktsize,
+ u16 numfrags)
+{
+ struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
+ u32 rate;
+
+ stats->be_rx_compl++;
+ stats->be_rx_frags += numfrags;
+ stats->be_rx_bytes += pktsize;
+
+ /* Update the rate once in two seconds */
+ if ((jiffies - stats->be_rx_jiffies) < 2 * HZ)
+ return;
+
+ rate = (stats->be_rx_bytes - stats->be_rx_bytes_prev) /
+ ((u32) (jiffies - stats->be_rx_jiffies) / HZ);
+ rate = (rate / 1000000); /* MB/Sec */
+ stats->be_rx_rate = (rate * 8); /* Mega Bits/Sec */
+ stats->be_rx_jiffies = jiffies;
+ stats->be_rx_bytes_prev = stats->be_rx_bytes;
+}
+
+static struct be_rx_page_info *
+get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
+{
+ struct be_rx_page_info *rx_page_info;
+ struct be_queue_info *rxq = &adapter->rx_obj.q;
+
+ rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
+ BUG_ON(!rx_page_info->page);
+
+ if (rx_page_info->last_page_user)
+ pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
+ adapter->big_page_size, PCI_DMA_FROMDEVICE);
+
+ atomic_dec(&rxq->used);
+ return rx_page_info;
+}
+
+/* Throwaway the data in the Rx completion */
+static void be_rx_compl_discard(struct be_adapter *adapter,
+ struct be_eth_rx_compl *rxcp)
+{
+ struct be_queue_info *rxq = &adapter->rx_obj.q;
+ struct be_rx_page_info *page_info;
+ u16 rxq_idx, i, num_rcvd;
+
+ rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
+ num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
+
+ for (i = 0; i < num_rcvd; i++) {
+ page_info = get_rx_page_info(adapter, rxq_idx);
+ put_page(page_info->page);
+ memset(page_info, 0, sizeof(*page_info));
+ index_inc(&rxq_idx, rxq->len);
+ }
+}
+
+/*
+ * skb_fill_rx_data forms a complete skb for an ether frame
+ * indicated by rxcp.
+ */
+static void skb_fill_rx_data(struct be_adapter *adapter,
+ struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
+{
+ struct be_queue_info *rxq = &adapter->rx_obj.q;
+ struct be_rx_page_info *page_info;
+ u16 rxq_idx, i, num_rcvd;
+ u32 pktsize, hdr_len, curr_frag_len;
+ u8 *start;
+
+ rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
+ pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
+ num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
+
+ page_info = get_rx_page_info(adapter, rxq_idx);
+
+ start = page_address(page_info->page) + page_info->page_offset;
+ prefetch(start);
+
+ /* Copy data in the first descriptor of this completion */
+ curr_frag_len = min(pktsize, rx_frag_size);
+
+ /* Copy the header portion into skb_data */
+ hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
+ memcpy(skb->data, start, hdr_len);
+ skb->len = curr_frag_len;
+ if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
+ /* Complete packet has now been moved to data */
+ put_page(page_info->page);
+ skb->data_len = 0;
+ skb->tail += curr_frag_len;
+ } else {
+ skb_shinfo(skb)->nr_frags = 1;
+ skb_shinfo(skb)->frags[0].page = page_info->page;
+ skb_shinfo(skb)->frags[0].page_offset =
+ page_info->page_offset + hdr_len;
+ skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
+ skb->data_len = curr_frag_len - hdr_len;
+ skb->tail += hdr_len;
+ }
+ memset(page_info, 0, sizeof(*page_info));
+
+ if (pktsize <= rx_frag_size) {
+ BUG_ON(num_rcvd != 1);
+ return;
+ }
+
+ /* More frags present for this completion */
+ pktsize -= curr_frag_len; /* account for above copied frag */
+ for (i = 1; i < num_rcvd; i++) {
+ index_inc(&rxq_idx, rxq->len);
+ page_info = get_rx_page_info(adapter, rxq_idx);
+
+ curr_frag_len = min(pktsize, rx_frag_size);
+
+ skb_shinfo(skb)->frags[i].page = page_info->page;
+ skb_shinfo(skb)->frags[i].page_offset = page_info->page_offset;
+ skb_shinfo(skb)->frags[i].size = curr_frag_len;
+ skb->len += curr_frag_len;
+ skb->data_len += curr_frag_len;
+ skb_shinfo(skb)->nr_frags++;
+ pktsize -= curr_frag_len;
+
+ memset(page_info, 0, sizeof(*page_info));
+ }
+
+ be_rx_rate_update(adapter, pktsize, num_rcvd);
+ return;
+}
+
+/* Process the RX completion indicated by rxcp when LRO is disabled */
+static void be_rx_compl_process(struct be_adapter *adapter,
+ struct be_eth_rx_compl *rxcp)
+{
+ struct sk_buff *skb;
+ u32 vtp, vid;
+ int l4_cksm;
+
+ l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
+ vtp = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
+
+ skb = netdev_alloc_skb(adapter->netdev, BE_HDR_LEN + NET_IP_ALIGN);
+ if (!skb) {
+ if (net_ratelimit())
+ dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
+ be_rx_compl_discard(adapter, rxcp);
+ return;
+ }
+
+ skb_reserve(skb, NET_IP_ALIGN);
+
+ skb_fill_rx_data(adapter, skb, rxcp);
+
+ if (l4_cksm && adapter->rx_csum)
+ skb->ip_summed = CHECKSUM_UNNECESSARY;
+ else
+ skb->ip_summed = CHECKSUM_NONE;
+
+ skb->truesize = skb->len + sizeof(struct sk_buff);
+ skb->protocol = eth_type_trans(skb, adapter->netdev);
+ skb->dev = adapter->netdev;
+
+ if (vtp) {
+ if (!adapter->vlan_grp || adapter->num_vlans == 0) {
+ kfree_skb(skb);
+ return;
+ }
+ vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
+ vid = be16_to_cpu(vid);
+ vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
+ } else {
+ netif_receive_skb(skb);
+ }
+
+ adapter->netdev->last_rx = jiffies;
+
+ return;
+}
+
+/* Process the RX completion indicated by rxcp when LRO is enabled */
+static void be_rx_compl_process_lro(struct be_adapter *adapter,
+ struct be_eth_rx_compl *rxcp)
+{
+ struct be_rx_page_info *page_info;
+ struct skb_frag_struct rx_frags[BE_MAX_FRAGS_PER_FRAME];
+ struct be_queue_info *rxq = &adapter->rx_obj.q;
+ u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
+ u16 i, rxq_idx = 0, vid;
+
+ num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
+ pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
+ vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
+ rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
+
+ remaining = pkt_size;
+ for (i = 0; i < num_rcvd; i++) {
+ page_info = get_rx_page_info(adapter, rxq_idx);
+
+ curr_frag_len = min(remaining, rx_frag_size);
+
+ rx_frags[i].page = page_info->page;
+ rx_frags[i].page_offset = page_info->page_offset;
+ rx_frags[i].size = curr_frag_len;
+ remaining -= curr_frag_len;
+
+ index_inc(&rxq_idx, rxq->len);
+
+ memset(page_info, 0, sizeof(*page_info));
+ }
+
+ if (likely(!vlanf)) {
+ lro_receive_frags(&adapter->rx_obj.lro_mgr, rx_frags, pkt_size,
+ pkt_size, NULL, 0);
+ } else {
+ vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
+ vid = be16_to_cpu(vid);
+
+ if (!adapter->vlan_grp || adapter->num_vlans == 0)
+ return;
+
+ lro_vlan_hwaccel_receive_frags(&adapter->rx_obj.lro_mgr,
+ rx_frags, pkt_size, pkt_size, adapter->vlan_grp,
+ vid, NULL, 0);
+ }
+
+ be_rx_rate_update(adapter, pkt_size, num_rcvd);
+ return;
+}
+
+static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
+{
+ struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
+
+ if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
+ return NULL;
+
+ be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
+
+ rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
+
+ queue_tail_inc(&adapter->rx_obj.cq);
+ return rxcp;
+}
+
+static inline struct page *be_alloc_pages(u32 size)
+{
+ gfp_t alloc_flags = GFP_ATOMIC;
+ u32 order = get_order(size);
+ if (order > 0)
+ alloc_flags |= __GFP_COMP;
+ return alloc_pages(alloc_flags, order);
+}
+
+/*
+ * Allocate a page, split it to fragments of size rx_frag_size and post as
+ * receive buffers to BE
+ */
+static void be_post_rx_frags(struct be_adapter *adapter)
+{
+ struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
+ struct be_rx_page_info *page_info = NULL;
+ struct be_queue_info *rxq = &adapter->rx_obj.q;
+ struct page *pagep = NULL;
+ struct be_eth_rx_d *rxd;
+ u64 page_dmaaddr = 0, frag_dmaaddr;
+ u32 posted, page_offset = 0;
+
+
+ page_info = &page_info_tbl[rxq->head];
+ for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
+ if (!pagep) {
+ pagep = be_alloc_pages(adapter->big_page_size);
+ if (unlikely(!pagep)) {
+ drvr_stats(adapter)->be_ethrx_post_fail++;
+ break;
+ }
+ page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
+ adapter->big_page_size,
+ PCI_DMA_FROMDEVICE);
+ page_info->page_offset = 0;
+ } else {
+ get_page(pagep);
+ page_info->page_offset = page_offset + rx_frag_size;
+ }
+ page_offset = page_info->page_offset;
+ page_info->page = pagep;
+ pci_unmap_addr_set(page_info, bus, page_dmaaddr);
+ frag_dmaaddr = page_dmaaddr + page_info->page_offset;
+
+ rxd = queue_head_node(rxq);
+ rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
+ rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
+ queue_head_inc(rxq);
+
+ /* Any space left in the current big page for another frag? */
+ if ((page_offset + rx_frag_size + rx_frag_size) >
+ adapter->big_page_size) {
+ pagep = NULL;
+ page_info->last_page_user = true;
+ }
+ page_info = &page_info_tbl[rxq->head];
+ }
+ if (pagep)
+ page_info->last_page_user = true;
+
+ if (posted) {
+ atomic_add(posted, &rxq->used);
+ be_rxq_notify(&adapter->ctrl, rxq->id, posted);
+ } else if (atomic_read(&rxq->used) == 0) {
+ /* Let be_worker replenish when memory is available */
+ adapter->rx_post_starved = true;
+ }
+
+ return;
+}
+
+static struct be_eth_tx_compl *
+be_tx_compl_get(struct be_adapter *adapter)
+{
+ struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
+ struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
+
+ if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
+ return NULL;
+
+ be_dws_le_to_cpu(txcp, sizeof(*txcp));
+
+ txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
+
+ queue_tail_inc(tx_cq);
+ return txcp;
+}
+
+static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
+{
+ struct be_queue_info *txq = &adapter->tx_obj.q;
+ struct be_eth_wrb *wrb;
+ struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
+ struct sk_buff *sent_skb;
+ u64 busaddr;
+ u16 cur_index, num_wrbs = 0;
+
+ cur_index = txq->tail;
+ sent_skb = sent_skbs[cur_index];
+ BUG_ON(!sent_skb);
+ sent_skbs[cur_index] = NULL;
+
+ do {
+ cur_index = txq->tail;
+ wrb = queue_tail_node(txq);
+ be_dws_le_to_cpu(wrb, sizeof(*wrb));
+ busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
+ if (busaddr != 0) {
+ pci_unmap_single(adapter->pdev, busaddr,
+ wrb->frag_len, PCI_DMA_TODEVICE);
+ }
+ num_wrbs++;
+ queue_tail_inc(txq);
+ } while (cur_index != last_index);
+
+ atomic_sub(num_wrbs, &txq->used);
+
+ kfree_skb(sent_skb);
+}
+
+static void be_rx_q_clean(struct be_adapter *adapter)
+{
+ struct be_rx_page_info *page_info;
+ struct be_queue_info *rxq = &adapter->rx_obj.q;
+ struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
+ struct be_eth_rx_compl *rxcp;
+ u16 tail;
+
+ /* First cleanup pending rx completions */
+ while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
+ be_rx_compl_discard(adapter, rxcp);
+ be_cq_notify(&adapter->ctrl, rx_cq->id, true, 1);
+ }
+
+ /* Then free posted rx buffer that were not used */
+ tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
+ for (; tail != rxq->head; index_inc(&tail, rxq->len)) {
+ page_info = get_rx_page_info(adapter, tail);
+ put_page(page_info->page);
+ memset(page_info, 0, sizeof(*page_info));
+ }
+ BUG_ON(atomic_read(&rxq->used));
+}
+
+static void be_tx_q_clean(struct be_adapter *adapter)
+{
+ struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
+ struct sk_buff *sent_skb;
+ struct be_queue_info *txq = &adapter->tx_obj.q;
+ u16 last_index;
+ bool dummy_wrb;
+
+ while (atomic_read(&txq->used)) {
+ sent_skb = sent_skbs[txq->tail];
+ last_index = txq->tail;
+ index_adv(&last_index,
+ wrb_cnt_for_skb(sent_skb, &dummy_wrb) - 1, txq->len);
+ be_tx_compl_process(adapter, last_index);
+ }
+}
+
+static void be_tx_queues_destroy(struct be_adapter *adapter)
+{
+ struct be_queue_info *q;
+
+ q = &adapter->tx_obj.q;
+ if (q->created)
+ be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_TXQ);
+ be_queue_free(adapter, q);
+
+ q = &adapter->tx_obj.cq;
+ if (q->created)
+ be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_CQ);
+ be_queue_free(adapter, q);
+
+ /* No more tx completions can be rcvd now; clean up if there are
+ * any pending completions or pending tx requests */
+ be_tx_q_clean(adapter);
+
+ q = &adapter->tx_eq.q;
+ if (q->created)
+ be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_EQ);
+ be_queue_free(adapter, q);
+}
+
+static int be_tx_queues_create(struct be_adapter *adapter)
+{
+ struct be_queue_info *eq, *q, *cq;
+
+ adapter->tx_eq.max_eqd = 0;
+ adapter->tx_eq.min_eqd = 0;
+ adapter->tx_eq.cur_eqd = 96;
+ adapter->tx_eq.enable_aic = false;
+ /* Alloc Tx Event queue */
+ eq = &adapter->tx_eq.q;
+ if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
+ return -1;
+
+ /* Ask BE to create Tx Event queue */
+ if (be_cmd_eq_create(&adapter->ctrl, eq, adapter->tx_eq.cur_eqd))
+ goto tx_eq_free;
+ /* Alloc TX eth compl queue */
+ cq = &adapter->tx_obj.cq;
+ if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
+ sizeof(struct be_eth_tx_compl)))
+ goto tx_eq_destroy;
+
+ /* Ask BE to create Tx eth compl queue */
+ if (be_cmd_cq_create(&adapter->ctrl, cq, eq, false, false, 3))
+ goto tx_cq_free;
+
+ /* Alloc TX eth queue */
+ q = &adapter->tx_obj.q;
+ if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
+ goto tx_cq_destroy;
+
+ /* Ask BE to create Tx eth queue */
+ if (be_cmd_txq_create(&adapter->ctrl, q, cq))
+ goto tx_q_free;
+ return 0;
+
+tx_q_free:
+ be_queue_free(adapter, q);
+tx_cq_destroy:
+ be_cmd_q_destroy(&adapter->ctrl, cq, QTYPE_CQ);
+tx_cq_free:
+ be_queue_free(adapter, cq);
+tx_eq_destroy:
+ be_cmd_q_destroy(&adapter->ctrl, eq, QTYPE_EQ);
+tx_eq_free:
+ be_queue_free(adapter, eq);
+ return -1;
+}
+
+static void be_rx_queues_destroy(struct be_adapter *adapter)
+{
+ struct be_queue_info *q;
+
+ q = &adapter->rx_obj.q;
+ if (q->created) {
+ be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_RXQ);
+ be_rx_q_clean(adapter);
+ }
+ be_queue_free(adapter, q);
+
+ q = &adapter->rx_obj.cq;
+ if (q->created)
+ be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_CQ);
+ be_queue_free(adapter, q);
+
+ q = &adapter->rx_eq.q;
+ if (q->created)
+ be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_EQ);
+ be_queue_free(adapter, q);
+}
+
+static int be_rx_queues_create(struct be_adapter *adapter)
+{
+ struct be_queue_info *eq, *q, *cq;
+ int rc;
+
+ adapter->max_rx_coal = BE_MAX_FRAGS_PER_FRAME;
+ adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
+ adapter->rx_eq.max_eqd = BE_MAX_EQD;
+ adapter->rx_eq.min_eqd = 0;
+ adapter->rx_eq.cur_eqd = 0;
+ adapter->rx_eq.enable_aic = true;
+
+ /* Alloc Rx Event queue */
+ eq = &adapter->rx_eq.q;
+ rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
+ sizeof(struct be_eq_entry));
+ if (rc)
+ return rc;
+
+ /* Ask BE to create Rx Event queue */
+ rc = be_cmd_eq_create(&adapter->ctrl, eq, adapter->rx_eq.cur_eqd);
+ if (rc)
+ goto rx_eq_free;
+
+ /* Alloc RX eth compl queue */
+ cq = &adapter->rx_obj.cq;
+ rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
+ sizeof(struct be_eth_rx_compl));
+ if (rc)
+ goto rx_eq_destroy;
+
+ /* Ask BE to create Rx eth compl queue */
+ rc = be_cmd_cq_create(&adapter->ctrl, cq, eq, false, false, 3);
+ if (rc)
+ goto rx_cq_free;
+
+ /* Alloc RX eth queue */
+ q = &adapter->rx_obj.q;
+ rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
+ if (rc)
+ goto rx_cq_destroy;
+
+ /* Ask BE to create Rx eth queue */
+ rc = be_cmd_rxq_create(&adapter->ctrl, q, cq->id, rx_frag_size,
+ BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
+ if (rc)
+ goto rx_q_free;
+
+ return 0;
+rx_q_free:
+ be_queue_free(adapter, q);
+rx_cq_destroy:
+ be_cmd_q_destroy(&adapter->ctrl, cq, QTYPE_CQ);
+rx_cq_free:
+ be_queue_free(adapter, cq);
+rx_eq_destroy:
+ be_cmd_q_destroy(&adapter->ctrl, eq, QTYPE_EQ);
+rx_eq_free:
+ be_queue_free(adapter, eq);
+ return rc;
+}
+static bool event_get(struct be_eq_obj *eq_obj, u16 *rid)
+{
+ struct be_eq_entry *entry = queue_tail_node(&eq_obj->q);
+ u32 evt = entry->evt;
+
+ if (!evt)
+ return false;
+
+ evt = le32_to_cpu(evt);
+ *rid = (evt >> EQ_ENTRY_RES_ID_SHIFT) & EQ_ENTRY_RES_ID_MASK;
+ entry->evt = 0;
+ queue_tail_inc(&eq_obj->q);
+ return true;
+}
+
+static int event_handle(struct be_ctrl_info *ctrl,
+ struct be_eq_obj *eq_obj)
+{
+ u16 rid = 0, num = 0;
+
+ while (event_get(eq_obj, &rid))
+ num++;
+
+ /* We can see an interrupt and no event */
+ be_eq_notify(ctrl, eq_obj->q.id, true, true, num);
+ if (num)
+ napi_schedule(&eq_obj->napi);
+
+ return num;
+}
+
+static irqreturn_t be_intx(int irq, void *dev)
+{
+ struct be_adapter *adapter = dev;
+ struct be_ctrl_info *ctrl = &adapter->ctrl;
+ int rx, tx;
+
+ tx = event_handle(ctrl, &adapter->tx_eq);
+ rx = event_handle(ctrl, &adapter->rx_eq);
+
+ if (rx || tx)
+ return IRQ_HANDLED;
+ else
+ return IRQ_NONE;
+}
+
+static irqreturn_t be_msix_rx(int irq, void *dev)
+{
+ struct be_adapter *adapter = dev;
+
+ event_handle(&adapter->ctrl, &adapter->rx_eq);
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t be_msix_tx(int irq, void *dev)
+{
+ struct be_adapter *adapter = dev;
+
+ event_handle(&adapter->ctrl, &adapter->tx_eq);
+
+ return IRQ_HANDLED;
+}
+
+static inline bool do_lro(struct be_adapter *adapter,
+ struct be_eth_rx_compl *rxcp)
+{
+ int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
+ int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
+
+ if (err)
+ drvr_stats(adapter)->be_rxcp_err++;
+
+ return (!tcp_frame || err || (adapter->max_rx_coal <= 1)) ?
+ false : true;
+}
+
+int be_poll_rx(struct napi_struct *napi, int budget)
+{
+ struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
+ struct be_adapter *adapter =
+ container_of(rx_eq, struct be_adapter, rx_eq);
+ struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
+ struct be_eth_rx_compl *rxcp;
+ u32 work_done;
+
+ for (work_done = 0; work_done < budget; work_done++) {
+ rxcp = be_rx_compl_get(adapter);
+ if (!rxcp)
+ break;
+
+ if (do_lro(adapter, rxcp))
+ be_rx_compl_process_lro(adapter, rxcp);
+ else
+ be_rx_compl_process(adapter, rxcp);
+ }
+
+ lro_flush_all(&adapter->rx_obj.lro_mgr);
+
+ /* Refill the queue */
+ if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
+ be_post_rx_frags(adapter);
+
+ /* All consumed */
+ if (work_done < budget) {
+ napi_complete(napi);
+ be_cq_notify(&adapter->ctrl, rx_cq->id, true, work_done);
+ } else {
+ /* More to be consumed; continue with interrupts disabled */
+ be_cq_notify(&adapter->ctrl, rx_cq->id, false, work_done);
+ }
+ return work_done;
+}
+
+/* For TX we don't honour budget; consume everything */
+int be_poll_tx(struct napi_struct *napi, int budget)
+{
+ struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
+ struct be_adapter *adapter =
+ container_of(tx_eq, struct be_adapter, tx_eq);
+ struct be_tx_obj *tx_obj = &adapter->tx_obj;
+ struct be_queue_info *tx_cq = &tx_obj->cq;
+ struct be_queue_info *txq = &tx_obj->q;
+ struct be_eth_tx_compl *txcp;
+ u32 num_cmpl = 0;
+ u16 end_idx;
+
+ while ((txcp = be_tx_compl_get(adapter))) {
+ end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
+ wrb_index, txcp);
+ be_tx_compl_process(adapter, end_idx);
+ num_cmpl++;
+ }
+
+ /* As Tx wrbs have been freed up, wake up netdev queue if
+ * it was stopped due to lack of tx wrbs.
+ */
+ if (netif_queue_stopped(adapter->netdev) &&
+ atomic_read(&txq->used) < txq->len / 2) {
+ netif_wake_queue(adapter->netdev);
+ }
+
+ napi_complete(napi);
+
+ be_cq_notify(&adapter->ctrl, tx_cq->id, true, num_cmpl);
+
+ drvr_stats(adapter)->be_tx_events++;
+ drvr_stats(adapter)->be_tx_compl += num_cmpl;
+
+ return 1;
+}
+
+static void be_worker(struct work_struct *work)
+{
+ struct be_adapter *adapter =
+ container_of(work, struct be_adapter, work.work);
+ int status;
+
+ /* Check link */
+ be_link_status_update(adapter);
+
+ /* Get Stats */
+ status = be_cmd_get_stats(&adapter->ctrl, &adapter->stats.cmd);
+ if (!status)
+ netdev_stats_update(adapter);
+
+ /* Set EQ delay */
+ be_rx_eqd_update(adapter);
+
+ if (adapter->rx_post_starved) {
+ adapter->rx_post_starved = false;
+ be_post_rx_frags(adapter);
+ }
+
+ schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
+}
+
+static void be_msix_enable(struct be_adapter *adapter)
+{
+ int i, status;
+
+ for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
+ adapter->msix_entries[i].entry = i;
+
+ status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
+ BE_NUM_MSIX_VECTORS);
+ if (status == 0)
+ adapter->msix_enabled = true;
+ return;
+}
+
+static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
+{
+ return adapter->msix_entries[eq_id -
+ 8 * adapter->ctrl.pci_func].vector;
+}
+
+static int be_msix_register(struct be_adapter *adapter)
+{
+ struct net_device *netdev = adapter->netdev;
+ struct be_eq_obj *tx_eq = &adapter->tx_eq;
+ struct be_eq_obj *rx_eq = &adapter->rx_eq;
+ int status, vec;
+
+ sprintf(tx_eq->desc, "%s-tx", netdev->name);
+ vec = be_msix_vec_get(adapter, tx_eq->q.id);
+ status = request_irq(vec, be_msix_tx, 0, tx_eq->desc, adapter);
+ if (status)
+ goto err;
+
+ sprintf(rx_eq->desc, "%s-rx", netdev->name);
+ vec = be_msix_vec_get(adapter, rx_eq->q.id);
+ status = request_irq(vec, be_msix_rx, 0, rx_eq->desc, adapter);
+ if (status) { /* Free TX IRQ */
+ vec = be_msix_vec_get(adapter, tx_eq->q.id);
+ free_irq(vec, adapter);
+ goto err;
+ }
+ return 0;
+err:
+ dev_warn(&adapter->pdev->dev,
+ "MSIX Request IRQ failed - err %d\n", status);
+ pci_disable_msix(adapter->pdev);
+ adapter->msix_enabled = false;
+ return status;
+}
+
+static int be_irq_register(struct be_adapter *adapter)
+{
+ struct net_device *netdev = adapter->netdev;
+ int status;
+
+ if (adapter->msix_enabled) {
+ status = be_msix_register(adapter);
+ if (status == 0)
+ goto done;
+ }
+
+ /* INTx */
+ netdev->irq = adapter->pdev->irq;
+ status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
+ adapter);
+ if (status) {
+ dev_err(&adapter->pdev->dev,
+ "INTx request IRQ failed - err %d\n", status);
+ return status;
+ }
+done:
+ adapter->isr_registered = true;
+ return 0;
+}
+
+static void be_irq_unregister(struct be_adapter *adapter)
+{
+ struct net_device *netdev = adapter->netdev;
+ int vec;
+
+ if (!adapter->isr_registered)
+ return;
+
+ /* INTx */
+ if (!adapter->msix_enabled) {
+ free_irq(netdev->irq, adapter);
+ goto done;
+ }
+
+ /* MSIx */
+ vec = be_msix_vec_get(adapter, adapter->tx_eq.q.id);
+ free_irq(vec, adapter);
+ vec = be_msix_vec_get(adapter, adapter->rx_eq.q.id);
+ free_irq(vec, adapter);
+done:
+ adapter->isr_registered = false;
+ return;
+}
+
+static int be_open(struct net_device *netdev)
+{
+ struct be_adapter *adapter = netdev_priv(netdev);
+ struct be_ctrl_info *ctrl = &adapter->ctrl;
+ struct be_eq_obj *rx_eq = &adapter->rx_eq;
+ struct be_eq_obj *tx_eq = &adapter->tx_eq;
+ u32 if_flags;
+ int status;
+
+ if_flags = BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_PROMISCUOUS |
+ BE_IF_FLAGS_MCAST_PROMISCUOUS | BE_IF_FLAGS_UNTAGGED |
+ BE_IF_FLAGS_PASS_L3L4_ERRORS;
+ status = be_cmd_if_create(ctrl, if_flags, netdev->dev_addr,
+ false/* pmac_invalid */, &adapter->if_handle,
+ &adapter->pmac_id);
+ if (status != 0)
+ goto do_none;
+
+ be_vid_config(netdev);
+
+ status = be_cmd_set_flow_control(ctrl, true, true);
+ if (status != 0)
+ goto if_destroy;
+
+ status = be_tx_queues_create(adapter);
+ if (status != 0)
+ goto if_destroy;
+
+ status = be_rx_queues_create(adapter);
+ if (status != 0)
+ goto tx_qs_destroy;
+
+ /* First time posting */
+ be_post_rx_frags(adapter);
+
+ napi_enable(&rx_eq->napi);
+ napi_enable(&tx_eq->napi);
+
+ be_irq_register(adapter);
+
+ be_intr_set(ctrl, true);
+
+ /* The evt queues are created in the unarmed state; arm them */
+ be_eq_notify(ctrl, rx_eq->q.id, true, false, 0);
+ be_eq_notify(ctrl, tx_eq->q.id, true, false, 0);
+
+ /* The compl queues are created in the unarmed state; arm them */
+ be_cq_notify(ctrl, adapter->rx_obj.cq.id, true, 0);
+ be_cq_notify(ctrl, adapter->tx_obj.cq.id, true, 0);
+
+ be_link_status_update(adapter);
+
+ schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
+ return 0;
+
+tx_qs_destroy:
+ be_tx_queues_destroy(adapter);
+if_destroy:
+ be_cmd_if_destroy(ctrl, adapter->if_handle);
+do_none:
+ return status;
+}
+
+static int be_close(struct net_device *netdev)
+{
+ struct be_adapter *adapter = netdev_priv(netdev);
+ struct be_ctrl_info *ctrl = &adapter->ctrl;
+ struct be_eq_obj *rx_eq = &adapter->rx_eq;
+ struct be_eq_obj *tx_eq = &adapter->tx_eq;
+ int vec;
+
+ cancel_delayed_work(&adapter->work);
+
+ netif_stop_queue(netdev);
+ netif_carrier_off(netdev);
+ adapter->link.speed = PHY_LINK_SPEED_ZERO;
+
+ be_intr_set(ctrl, false);
+
+ if (adapter->msix_enabled) {
+ vec = be_msix_vec_get(adapter, tx_eq->q.id);
+ synchronize_irq(vec);
+ vec = be_msix_vec_get(adapter, rx_eq->q.id);
+ synchronize_irq(vec);
+ } else {
+ synchronize_irq(netdev->irq);
+ }
+ be_irq_unregister(adapter);
+
+ napi_disable(&rx_eq->napi);
+ napi_disable(&tx_eq->napi);
+
+ be_rx_queues_destroy(adapter);
+ be_tx_queues_destroy(adapter);
+
+ be_cmd_if_destroy(ctrl, adapter->if_handle);
+ return 0;
+}
+
+static int be_get_frag_header(struct skb_frag_struct *frag, void **mac_hdr,
+ void **ip_hdr, void **tcpudp_hdr,
+ u64 *hdr_flags, void *priv)
+{
+ struct ethhdr *eh;
+ struct vlan_ethhdr *veh;
+ struct iphdr *iph;
+ u8 *va = page_address(frag->page) + frag->page_offset;
+ unsigned long ll_hlen;
+
+ prefetch(va);
+ eh = (struct ethhdr *)va;
+ *mac_hdr = eh;
+ ll_hlen = ETH_HLEN;
+ if (eh->h_proto != htons(ETH_P_IP)) {
+ if (eh->h_proto == htons(ETH_P_8021Q)) {
+ veh = (struct vlan_ethhdr *)va;
+ if (veh->h_vlan_encapsulated_proto != htons(ETH_P_IP))
+ return -1;
+
+ ll_hlen += VLAN_HLEN;
+ } else {
+ return -1;
+ }
+ }
+ *hdr_flags = LRO_IPV4;
+ iph = (struct iphdr *)(va + ll_hlen);
+ *ip_hdr = iph;
+ if (iph->protocol != IPPROTO_TCP)
+ return -1;
+ *hdr_flags |= LRO_TCP;
+ *tcpudp_hdr = (u8 *) (*ip_hdr) + (iph->ihl << 2);
+
+ return 0;
+}
+
+static void be_lro_init(struct be_adapter *adapter, struct net_device *netdev)
+{
+ struct net_lro_mgr *lro_mgr;
+
+ lro_mgr = &adapter->rx_obj.lro_mgr;
+ lro_mgr->dev = netdev;
+ lro_mgr->features = LRO_F_NAPI;
+ lro_mgr->ip_summed = CHECKSUM_UNNECESSARY;
+ lro_mgr->ip_summed_aggr = CHECKSUM_UNNECESSARY;
+ lro_mgr->max_desc = BE_MAX_LRO_DESCRIPTORS;
+ lro_mgr->lro_arr = adapter->rx_obj.lro_desc;
+ lro_mgr->get_frag_header = be_get_frag_header;
+ lro_mgr->max_aggr = BE_MAX_FRAGS_PER_FRAME;
+}
+
+static struct net_device_ops be_netdev_ops = {
+ .ndo_open = be_open,
+ .ndo_stop = be_close,
+ .ndo_start_xmit = be_xmit,
+ .ndo_get_stats = be_get_stats,
+ .ndo_set_rx_mode = be_set_multicast_list,
+ .ndo_set_mac_address = be_mac_addr_set,
+ .ndo_change_mtu = be_change_mtu,
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_vlan_rx_register = be_vlan_register,
+ .ndo_vlan_rx_add_vid = be_vlan_add_vid,
+ .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
+};
+
+static void be_netdev_init(struct net_device *netdev)
+{
+ struct be_adapter *adapter = netdev_priv(netdev);
+
+ netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
+ NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_IP_CSUM |
+ NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
+
+ netdev->flags |= IFF_MULTICAST;
+
+ BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
+
+ SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
+
+ be_lro_init(adapter, netdev);
+
+ netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
+ BE_NAPI_WEIGHT);
+ netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx,
+ BE_NAPI_WEIGHT);
+
+ netif_carrier_off(netdev);
+ netif_stop_queue(netdev);
+}
+
+static void be_unmap_pci_bars(struct be_adapter *adapter)
+{
+ struct be_ctrl_info *ctrl = &adapter->ctrl;
+ if (ctrl->csr)
+ iounmap(ctrl->csr);
+ if (ctrl->db)
+ iounmap(ctrl->db);
+ if (ctrl->pcicfg)
+ iounmap(ctrl->pcicfg);
+}
+
+static int be_map_pci_bars(struct be_adapter *adapter)
+{
+ u8 __iomem *addr;
+
+ addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
+ pci_resource_len(adapter->pdev, 2));
+ if (addr == NULL)
+ return -ENOMEM;
+ adapter->ctrl.csr = addr;
+
+ addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
+ 128 * 1024);
+ if (addr == NULL)
+ goto pci_map_err;
+ adapter->ctrl.db = addr;
+
+ addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1),
+ pci_resource_len(adapter->pdev, 1));
+ if (addr == NULL)
+ goto pci_map_err;
+ adapter->ctrl.pcicfg = addr;
+
+ return 0;
+pci_map_err:
+ be_unmap_pci_bars(adapter);
+ return -ENOMEM;
+}
+
+
+static void be_ctrl_cleanup(struct be_adapter *adapter)
+{
+ struct be_dma_mem *mem = &adapter->ctrl.mbox_mem_alloced;
+
+ be_unmap_pci_bars(adapter);
+
+ if (mem->va)
+ pci_free_consistent(adapter->pdev, mem->size,
+ mem->va, mem->dma);
+}
+
+/* Initialize the mbox required to send cmds to BE */
+static int be_ctrl_init(struct be_adapter *adapter)
+{
+ struct be_ctrl_info *ctrl = &adapter->ctrl;
+ struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
+ struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
+ int status;
+ u32 val;
+
+ status = be_map_pci_bars(adapter);
+ if (status)
+ return status;
+
+ mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
+ mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
+ mbox_mem_alloc->size, &mbox_mem_alloc->dma);
+ if (!mbox_mem_alloc->va) {
+ be_unmap_pci_bars(adapter);
+ return -1;
+ }
+ mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
+ mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
+ mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
+ memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
+ spin_lock_init(&ctrl->cmd_lock);
+
+ val = ioread32(ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
+ ctrl->pci_func = (val >> MEMBAR_CTRL_INT_CTRL_PFUNC_SHIFT) &
+ MEMBAR_CTRL_INT_CTRL_PFUNC_MASK;
+ return 0;
+}
+
+static void be_stats_cleanup(struct be_adapter *adapter)
+{
+ struct be_stats_obj *stats = &adapter->stats;
+ struct be_dma_mem *cmd = &stats->cmd;
+
+ if (cmd->va)
+ pci_free_consistent(adapter->pdev, cmd->size,
+ cmd->va, cmd->dma);
+}
+
+static int be_stats_init(struct be_adapter *adapter)
+{
+ struct be_stats_obj *stats = &adapter->stats;
+ struct be_dma_mem *cmd = &stats->cmd;
+
+ cmd->size = sizeof(struct be_cmd_req_get_stats);
+ cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
+ if (cmd->va == NULL)
+ return -1;
+ return 0;
+}
+
+static void __devexit be_remove(struct pci_dev *pdev)
+{
+ struct be_adapter *adapter = pci_get_drvdata(pdev);
+ if (!adapter)
+ return;
+
+ unregister_netdev(adapter->netdev);
+
+ be_stats_cleanup(adapter);
+
+ be_ctrl_cleanup(adapter);
+
+ if (adapter->msix_enabled) {
+ pci_disable_msix(adapter->pdev);
+ adapter->msix_enabled = false;
+ }
+
+ pci_set_drvdata(pdev, NULL);
+ pci_release_regions(pdev);
+ pci_disable_device(pdev);
+
+ free_netdev(adapter->netdev);
+}
+
+static int be_hw_up(struct be_adapter *adapter)
+{
+ struct be_ctrl_info *ctrl = &adapter->ctrl;
+ int status;
+
+ status = be_cmd_POST(ctrl);
+ if (status)
+ return status;
+
+ status = be_cmd_get_fw_ver(ctrl, adapter->fw_ver);
+ if (status)
+ return status;
+
+ status = be_cmd_query_fw_cfg(ctrl, &adapter->port_num);
+ return status;
+}
+
+static int __devinit be_probe(struct pci_dev *pdev,
+ const struct pci_device_id *pdev_id)
+{
+ int status = 0;
+ struct be_adapter *adapter;
+ struct net_device *netdev;
+ struct be_ctrl_info *ctrl;
+ u8 mac[ETH_ALEN];
+
+ status = pci_enable_device(pdev);
+ if (status)
+ goto do_none;
+
+ status = pci_request_regions(pdev, DRV_NAME);
+ if (status)
+ goto disable_dev;
+ pci_set_master(pdev);
+
+ netdev = alloc_etherdev(sizeof(struct be_adapter));
+ if (netdev == NULL) {
+ status = -ENOMEM;
+ goto rel_reg;
+ }
+ adapter = netdev_priv(netdev);
+ adapter->pdev = pdev;
+ pci_set_drvdata(pdev, adapter);
+ adapter->netdev = netdev;
+
+ be_msix_enable(adapter);
+
+ status = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
+ if (!status) {
+ netdev->features |= NETIF_F_HIGHDMA;
+ } else {
+ status = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
+ if (status) {
+ dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
+ goto free_netdev;
+ }
+ }
+
+ ctrl = &adapter->ctrl;
+ status = be_ctrl_init(adapter);
+ if (status)
+ goto free_netdev;
+
+ status = be_stats_init(adapter);
+ if (status)
+ goto ctrl_clean;
+
+ status = be_hw_up(adapter);
+ if (status)
+ goto stats_clean;
+
+ status = be_cmd_mac_addr_query(ctrl, mac, MAC_ADDRESS_TYPE_NETWORK,
+ true /* permanent */, 0);
+ if (status)
+ goto stats_clean;
+ memcpy(netdev->dev_addr, mac, ETH_ALEN);
+
+ INIT_DELAYED_WORK(&adapter->work, be_worker);
+ be_netdev_init(netdev);
+ SET_NETDEV_DEV(netdev, &adapter->pdev->dev);
+
+ status = register_netdev(netdev);
+ if (status != 0)
+ goto stats_clean;
+
+ dev_info(&pdev->dev, BE_NAME " port %d\n", adapter->port_num);
+ return 0;
+
+stats_clean:
+ be_stats_cleanup(adapter);
+ctrl_clean:
+ be_ctrl_cleanup(adapter);
+free_netdev:
+ free_netdev(adapter->netdev);
+rel_reg:
+ pci_release_regions(pdev);
+disable_dev:
+ pci_disable_device(pdev);
+do_none:
+ dev_warn(&pdev->dev, BE_NAME " initialization failed\n");
+ return status;
+}
+
+static int be_suspend(struct pci_dev *pdev, pm_message_t state)
+{
+ struct be_adapter *adapter = pci_get_drvdata(pdev);
+ struct net_device *netdev = adapter->netdev;
+
+ netif_device_detach(netdev);
+ if (netif_running(netdev)) {
+ rtnl_lock();
+ be_close(netdev);
+ rtnl_unlock();
+ }
+
+ pci_save_state(pdev);
+ pci_disable_device(pdev);
+ pci_set_power_state(pdev, pci_choose_state(pdev, state));
+ return 0;
+}
+
+static int be_resume(struct pci_dev *pdev)
+{
+ int status = 0;
+ struct be_adapter *adapter = pci_get_drvdata(pdev);
+ struct net_device *netdev = adapter->netdev;
+
+ netif_device_detach(netdev);
+
+ status = pci_enable_device(pdev);
+ if (status)
+ return status;
+
+ pci_set_power_state(pdev, 0);
+ pci_restore_state(pdev);
+
+ if (netif_running(netdev)) {
+ rtnl_lock();
+ be_open(netdev);
+ rtnl_unlock();
+ }
+ netif_device_attach(netdev);
+ return 0;
+}
+
+static struct pci_driver be_driver = {
+ .name = DRV_NAME,
+ .id_table = be_dev_ids,
+ .probe = be_probe,
+ .remove = be_remove,
+ .suspend = be_suspend,
+ .resume = be_resume
+};
+
+static int __init be_init_module(void)
+{
+ if (rx_frag_size != 8192 && rx_frag_size != 4096
+ && rx_frag_size != 2048) {
+ printk(KERN_WARNING DRV_NAME
+ " : Module param rx_frag_size must be 2048/4096/8192."
+ " Using 2048\n");
+ rx_frag_size = 2048;
+ }
+ /* Ensure rx_frag_size is aligned to chache line */
+ if (SKB_DATA_ALIGN(rx_frag_size) != rx_frag_size) {
+ printk(KERN_WARNING DRV_NAME
+ " : Bad module param rx_frag_size. Using 2048\n");
+ rx_frag_size = 2048;
+ }
+
+ return pci_register_driver(&be_driver);
+}
+module_init(be_init_module);
+
+static void __exit be_exit_module(void)
+{
+ pci_unregister_driver(&be_driver);
+}
+module_exit(be_exit_module);
#define DRV_MODULE_NAME "bnx2"
#define PFX DRV_MODULE_NAME ": "
-#define DRV_MODULE_VERSION "1.9.2"
-#define DRV_MODULE_RELDATE "Feb 11, 2009"
+#define DRV_MODULE_VERSION "1.9.3"
+#define DRV_MODULE_RELDATE "March 17, 2009"
#define RUN_AT(x) (jiffies + (x))
for (i = 0; i < BNX2_MAX_MSIX_VEC; i++) {
msix_ent[i].entry = i;
msix_ent[i].vector = 0;
-
- snprintf(bp->irq_tbl[i].name, len, "%s-%d", dev->name, i);
- bp->irq_tbl[i].handler = bnx2_msi_1shot;
}
rc = pci_enable_msix(bp->pdev, msix_ent, BNX2_MAX_MSIX_VEC);
bp->irq_nvecs = msix_vecs;
bp->flags |= BNX2_FLAG_USING_MSIX | BNX2_FLAG_ONE_SHOT_MSI;
- for (i = 0; i < BNX2_MAX_MSIX_VEC; i++)
+ for (i = 0; i < BNX2_MAX_MSIX_VEC; i++) {
bp->irq_tbl[i].vector = msix_ent[i].vector;
+ snprintf(bp->irq_tbl[i].name, len, "%s-%d", dev->name, i);
+ bp->irq_tbl[i].handler = bnx2_msi_1shot;
+ }
}
static void
#define PAGES_PER_SGE (1 << PAGES_PER_SGE_SHIFT)
#define SGE_PAGE_SIZE PAGE_SIZE
#define SGE_PAGE_SHIFT PAGE_SHIFT
-#define SGE_PAGE_ALIGN(addr) PAGE_ALIGN(addr)
+#define SGE_PAGE_ALIGN(addr) PAGE_ALIGN((typeof(PAGE_SIZE))addr)
#define BCM_RX_ETH_PAYLOAD_ALIGN 64
static void bnx2x_write_big_buf(struct bnx2x *bp, u32 addr, u32 len)
{
-#ifdef USE_DMAE
int offset = 0;
if (bp->dmae_ready) {
addr + offset, len);
} else
bnx2x_init_str_wr(bp, addr, bp->gunzip_buf, len);
-#else
- bnx2x_init_str_wr(bp, addr, bp->gunzip_buf, len);
-#endif
}
static void bnx2x_init_fill(struct bnx2x *bp, u32 addr, int fill, u32 len)
#include "bnx2x.h"
#include "bnx2x_init.h"
-#define DRV_MODULE_VERSION "1.45.26"
+#define DRV_MODULE_VERSION "1.45.27"
#define DRV_MODULE_RELDATE "2009/01/26"
#define BNX2X_BC_VER 0x040200
{
int port = BP_PORT(bp);
- bnx2x_init_fill(bp, BAR_USTRORM_INTMEM +
+ bnx2x_init_fill(bp, USTORM_INTMEM_ADDR +
USTORM_SB_HOST_STATUS_BLOCK_OFFSET(port, sb_id), 0,
sizeof(struct ustorm_status_block)/4);
- bnx2x_init_fill(bp, BAR_CSTRORM_INTMEM +
+ bnx2x_init_fill(bp, CSTORM_INTMEM_ADDR +
CSTORM_SB_HOST_STATUS_BLOCK_OFFSET(port, sb_id), 0,
sizeof(struct cstorm_status_block)/4);
}
{
int func = BP_FUNC(bp);
- bnx2x_init_fill(bp, BAR_USTRORM_INTMEM +
+ bnx2x_init_fill(bp, TSTORM_INTMEM_ADDR +
+ TSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0,
+ sizeof(struct tstorm_def_status_block)/4);
+ bnx2x_init_fill(bp, USTORM_INTMEM_ADDR +
USTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0,
sizeof(struct ustorm_def_status_block)/4);
- bnx2x_init_fill(bp, BAR_CSTRORM_INTMEM +
+ bnx2x_init_fill(bp, CSTORM_INTMEM_ADDR +
CSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0,
sizeof(struct cstorm_def_status_block)/4);
- bnx2x_init_fill(bp, BAR_XSTRORM_INTMEM +
+ bnx2x_init_fill(bp, XSTORM_INTMEM_ADDR +
XSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0,
sizeof(struct xstorm_def_status_block)/4);
- bnx2x_init_fill(bp, BAR_TSTRORM_INTMEM +
- TSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0,
- sizeof(struct tstorm_def_status_block)/4);
}
static void bnx2x_init_def_sb(struct bnx2x *bp,
(USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_TPA |
USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_SGE_RING);
context->ustorm_st_context.common.sge_buff_size =
- (u16)(BCM_PAGE_SIZE*PAGES_PER_SGE);
+ (u16)min((u32)SGE_PAGE_SIZE*PAGES_PER_SGE,
+ (u32)0xffff);
context->ustorm_st_context.common.sge_page_base_hi =
U64_HI(fp->rx_sge_mapping);
context->ustorm_st_context.common.sge_page_base_lo =
}
break;
case NETDEV_CHANGE:
- /*
- * TODO: is this what we get if somebody
- * sets up a hierarchical bond, then rmmod's
- * one of the slave bonding devices?
- */
+ if (bond->params.mode == BOND_MODE_8023AD || bond_is_lb(bond)) {
+ struct slave *slave;
+
+ slave = bond_get_slave_by_dev(bond, slave_dev);
+ if (slave) {
+ u16 old_speed = slave->speed;
+ u16 old_duplex = slave->duplex;
+
+ bond_update_speed_duplex(slave);
+
+ if (bond_is_lb(bond))
+ break;
+
+ if (old_speed != slave->speed)
+ bond_3ad_adapter_speed_changed(slave);
+ if (old_duplex != slave->duplex)
+ bond_3ad_adapter_duplex_changed(slave);
+ }
+ }
+
break;
case NETDEV_DOWN:
/*
struct net_device *dev = dev_id;
board_info_t *db = netdev_priv(dev);
int int_status;
+ unsigned long flags;
u8 reg_save;
dm9000_dbg(db, 3, "entering %s\n", __func__);
/* A real interrupt coming */
- spin_lock(&db->lock);
+ /* holders of db->lock must always block IRQs */
+ spin_lock_irqsave(&db->lock, flags);
/* Save previous register address */
reg_save = readb(db->io_addr);
/* Restore previous register address */
writeb(reg_save, db->io_addr);
- spin_unlock(&db->lock);
+ spin_unlock_irqrestore(&db->lock, flags);
return IRQ_HANDLED;
}
--- /dev/null
+/*
+ * Dave DNET Ethernet Controller driver
+ *
+ * Copyright (C) 2008 Dave S.r.l. <www.dave.eu>
+ * Copyright (C) 2009 Ilya Yanok, Emcraft Systems Ltd, <yanok@emcraft.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/dma-mapping.h>
+#include <linux/platform_device.h>
+#include <linux/phy.h>
+#include <linux/platform_device.h>
+
+#include "dnet.h"
+
+#undef DEBUG
+
+/* function for reading internal MAC register */
+u16 dnet_readw_mac(struct dnet *bp, u16 reg)
+{
+ u16 data_read;
+
+ /* issue a read */
+ dnet_writel(bp, reg, MACREG_ADDR);
+
+ /* since a read/write op to the MAC is very slow,
+ * we must wait before reading the data */
+ ndelay(500);
+
+ /* read data read from the MAC register */
+ data_read = dnet_readl(bp, MACREG_DATA);
+
+ /* all done */
+ return data_read;
+}
+
+/* function for writing internal MAC register */
+void dnet_writew_mac(struct dnet *bp, u16 reg, u16 val)
+{
+ /* load data to write */
+ dnet_writel(bp, val, MACREG_DATA);
+
+ /* issue a write */
+ dnet_writel(bp, reg | DNET_INTERNAL_WRITE, MACREG_ADDR);
+
+ /* since a read/write op to the MAC is very slow,
+ * we must wait before exiting */
+ ndelay(500);
+}
+
+static void __dnet_set_hwaddr(struct dnet *bp)
+{
+ u16 tmp;
+
+ tmp = cpu_to_be16(*((u16 *) bp->dev->dev_addr));
+ dnet_writew_mac(bp, DNET_INTERNAL_MAC_ADDR_0_REG, tmp);
+ tmp = cpu_to_be16(*((u16 *) (bp->dev->dev_addr + 2)));
+ dnet_writew_mac(bp, DNET_INTERNAL_MAC_ADDR_1_REG, tmp);
+ tmp = cpu_to_be16(*((u16 *) (bp->dev->dev_addr + 4)));
+ dnet_writew_mac(bp, DNET_INTERNAL_MAC_ADDR_2_REG, tmp);
+}
+
+static void __devinit dnet_get_hwaddr(struct dnet *bp)
+{
+ u16 tmp;
+ u8 addr[6];
+
+ /*
+ * from MAC docs:
+ * "Note that the MAC address is stored in the registers in Hexadecimal
+ * form. For example, to set the MAC Address to: AC-DE-48-00-00-80
+ * would require writing 0xAC (octet 0) to address 0x0B (high byte of
+ * Mac_addr[15:0]), 0xDE (octet 1) to address 0x0A (Low byte of
+ * Mac_addr[15:0]), 0x48 (octet 2) to address 0x0D (high byte of
+ * Mac_addr[15:0]), 0x00 (octet 3) to address 0x0C (Low byte of
+ * Mac_addr[15:0]), 0x00 (octet 4) to address 0x0F (high byte of
+ * Mac_addr[15:0]), and 0x80 (octet 5) to address * 0x0E (Low byte of
+ * Mac_addr[15:0]).
+ */
+ tmp = dnet_readw_mac(bp, DNET_INTERNAL_MAC_ADDR_0_REG);
+ *((u16 *) addr) = be16_to_cpu(tmp);
+ tmp = dnet_readw_mac(bp, DNET_INTERNAL_MAC_ADDR_1_REG);
+ *((u16 *) (addr + 2)) = be16_to_cpu(tmp);
+ tmp = dnet_readw_mac(bp, DNET_INTERNAL_MAC_ADDR_2_REG);
+ *((u16 *) (addr + 4)) = be16_to_cpu(tmp);
+
+ if (is_valid_ether_addr(addr))
+ memcpy(bp->dev->dev_addr, addr, sizeof(addr));
+}
+
+static int dnet_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
+{
+ struct dnet *bp = bus->priv;
+ u16 value;
+
+ while (!(dnet_readw_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG)
+ & DNET_INTERNAL_GMII_MNG_CMD_FIN))
+ cpu_relax();
+
+ /* only 5 bits allowed for phy-addr and reg_offset */
+ mii_id &= 0x1f;
+ regnum &= 0x1f;
+
+ /* prepare reg_value for a read */
+ value = (mii_id << 8);
+ value |= regnum;
+
+ /* write control word */
+ dnet_writew_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG, value);
+
+ /* wait for end of transfer */
+ while (!(dnet_readw_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG)
+ & DNET_INTERNAL_GMII_MNG_CMD_FIN))
+ cpu_relax();
+
+ value = dnet_readw_mac(bp, DNET_INTERNAL_GMII_MNG_DAT_REG);
+
+ pr_debug("mdio_read %02x:%02x <- %04x\n", mii_id, regnum, value);
+
+ return value;
+}
+
+static int dnet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
+ u16 value)
+{
+ struct dnet *bp = bus->priv;
+ u16 tmp;
+
+ pr_debug("mdio_write %02x:%02x <- %04x\n", mii_id, regnum, value);
+
+ while (!(dnet_readw_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG)
+ & DNET_INTERNAL_GMII_MNG_CMD_FIN))
+ cpu_relax();
+
+ /* prepare for a write operation */
+ tmp = (1 << 13);
+
+ /* only 5 bits allowed for phy-addr and reg_offset */
+ mii_id &= 0x1f;
+ regnum &= 0x1f;
+
+ /* only 16 bits on data */
+ value &= 0xffff;
+
+ /* prepare reg_value for a write */
+ tmp |= (mii_id << 8);
+ tmp |= regnum;
+
+ /* write data to write first */
+ dnet_writew_mac(bp, DNET_INTERNAL_GMII_MNG_DAT_REG, value);
+
+ /* write control word */
+ dnet_writew_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG, tmp);
+
+ while (!(dnet_readw_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG)
+ & DNET_INTERNAL_GMII_MNG_CMD_FIN))
+ cpu_relax();
+
+ return 0;
+}
+
+static int dnet_mdio_reset(struct mii_bus *bus)
+{
+ return 0;
+}
+
+static void dnet_handle_link_change(struct net_device *dev)
+{
+ struct dnet *bp = netdev_priv(dev);
+ struct phy_device *phydev = bp->phy_dev;
+ unsigned long flags;
+ u32 mode_reg, ctl_reg;
+
+ int status_change = 0;
+
+ spin_lock_irqsave(&bp->lock, flags);
+
+ mode_reg = dnet_readw_mac(bp, DNET_INTERNAL_MODE_REG);
+ ctl_reg = dnet_readw_mac(bp, DNET_INTERNAL_RXTX_CONTROL_REG);
+
+ if (phydev->link) {
+ if (bp->duplex != phydev->duplex) {
+ if (phydev->duplex)
+ ctl_reg &=
+ ~(DNET_INTERNAL_RXTX_CONTROL_ENABLEHALFDUP);
+ else
+ ctl_reg |=
+ DNET_INTERNAL_RXTX_CONTROL_ENABLEHALFDUP;
+
+ bp->duplex = phydev->duplex;
+ status_change = 1;
+ }
+
+ if (bp->speed != phydev->speed) {
+ status_change = 1;
+ switch (phydev->speed) {
+ case 1000:
+ mode_reg |= DNET_INTERNAL_MODE_GBITEN;
+ break;
+ case 100:
+ case 10:
+ mode_reg &= ~DNET_INTERNAL_MODE_GBITEN;
+ break;
+ default:
+ printk(KERN_WARNING
+ "%s: Ack! Speed (%d) is not "
+ "10/100/1000!\n", dev->name,
+ phydev->speed);
+ break;
+ }
+ bp->speed = phydev->speed;
+ }
+ }
+
+ if (phydev->link != bp->link) {
+ if (phydev->link) {
+ mode_reg |=
+ (DNET_INTERNAL_MODE_RXEN | DNET_INTERNAL_MODE_TXEN);
+ } else {
+ mode_reg &=
+ ~(DNET_INTERNAL_MODE_RXEN |
+ DNET_INTERNAL_MODE_TXEN);
+ bp->speed = 0;
+ bp->duplex = -1;
+ }
+ bp->link = phydev->link;
+
+ status_change = 1;
+ }
+
+ if (status_change) {
+ dnet_writew_mac(bp, DNET_INTERNAL_RXTX_CONTROL_REG, ctl_reg);
+ dnet_writew_mac(bp, DNET_INTERNAL_MODE_REG, mode_reg);
+ }
+
+ spin_unlock_irqrestore(&bp->lock, flags);
+
+ if (status_change) {
+ if (phydev->link)
+ printk(KERN_INFO "%s: link up (%d/%s)\n",
+ dev->name, phydev->speed,
+ DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
+ else
+ printk(KERN_INFO "%s: link down\n", dev->name);
+ }
+}
+
+static int dnet_mii_probe(struct net_device *dev)
+{
+ struct dnet *bp = netdev_priv(dev);
+ struct phy_device *phydev = NULL;
+ int phy_addr;
+
+ /* find the first phy */
+ for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
+ if (bp->mii_bus->phy_map[phy_addr]) {
+ phydev = bp->mii_bus->phy_map[phy_addr];
+ break;
+ }
+ }
+
+ if (!phydev) {
+ printk(KERN_ERR "%s: no PHY found\n", dev->name);
+ return -ENODEV;
+ }
+
+ /* TODO : add pin_irq */
+
+ /* attach the mac to the phy */
+ if (bp->capabilities & DNET_HAS_RMII) {
+ phydev = phy_connect(dev, dev_name(&phydev->dev),
+ &dnet_handle_link_change, 0,
+ PHY_INTERFACE_MODE_RMII);
+ } else {
+ phydev = phy_connect(dev, dev_name(&phydev->dev),
+ &dnet_handle_link_change, 0,
+ PHY_INTERFACE_MODE_MII);
+ }
+
+ if (IS_ERR(phydev)) {
+ printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
+ return PTR_ERR(phydev);
+ }
+
+ /* mask with MAC supported features */
+ if (bp->capabilities & DNET_HAS_GIGABIT)
+ phydev->supported &= PHY_GBIT_FEATURES;
+ else
+ phydev->supported &= PHY_BASIC_FEATURES;
+
+ phydev->supported |= SUPPORTED_Asym_Pause | SUPPORTED_Pause;
+
+ phydev->advertising = phydev->supported;
+
+ bp->link = 0;
+ bp->speed = 0;
+ bp->duplex = -1;
+ bp->phy_dev = phydev;
+
+ return 0;
+}
+
+static int dnet_mii_init(struct dnet *bp)
+{
+ int err, i;
+
+ bp->mii_bus = mdiobus_alloc();
+ if (bp->mii_bus == NULL)
+ return -ENOMEM;
+
+ bp->mii_bus->name = "dnet_mii_bus";
+ bp->mii_bus->read = &dnet_mdio_read;
+ bp->mii_bus->write = &dnet_mdio_write;
+ bp->mii_bus->reset = &dnet_mdio_reset;
+
+ snprintf(bp->mii_bus->id, MII_BUS_ID_SIZE, "%x", 0);
+
+ bp->mii_bus->priv = bp;
+
+ bp->mii_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
+ if (!bp->mii_bus->irq) {
+ err = -ENOMEM;
+ goto err_out;
+ }
+
+ for (i = 0; i < PHY_MAX_ADDR; i++)
+ bp->mii_bus->irq[i] = PHY_POLL;
+
+ platform_set_drvdata(bp->dev, bp->mii_bus);
+
+ if (mdiobus_register(bp->mii_bus)) {
+ err = -ENXIO;
+ goto err_out_free_mdio_irq;
+ }
+
+ if (dnet_mii_probe(bp->dev) != 0) {
+ err = -ENXIO;
+ goto err_out_unregister_bus;
+ }
+
+ return 0;
+
+err_out_unregister_bus:
+ mdiobus_unregister(bp->mii_bus);
+err_out_free_mdio_irq:
+ kfree(bp->mii_bus->irq);
+err_out:
+ mdiobus_free(bp->mii_bus);
+ return err;
+}
+
+/* For Neptune board: LINK1000 as Link LED and TX as activity LED */
+int dnet_phy_marvell_fixup(struct phy_device *phydev)
+{
+ return phy_write(phydev, 0x18, 0x4148);
+}
+
+static void dnet_update_stats(struct dnet *bp)
+{
+ u32 __iomem *reg = bp->regs + DNET_RX_PKT_IGNR_CNT;
+ u32 *p = &bp->hw_stats.rx_pkt_ignr;
+ u32 *end = &bp->hw_stats.rx_byte + 1;
+
+ WARN_ON((unsigned long)(end - p - 1) !=
+ (DNET_RX_BYTE_CNT - DNET_RX_PKT_IGNR_CNT) / 4);
+
+ for (; p < end; p++, reg++)
+ *p += readl(reg);
+
+ reg = bp->regs + DNET_TX_UNICAST_CNT;
+ p = &bp->hw_stats.tx_unicast;
+ end = &bp->hw_stats.tx_byte + 1;
+
+ WARN_ON((unsigned long)(end - p - 1) !=
+ (DNET_TX_BYTE_CNT - DNET_TX_UNICAST_CNT) / 4);
+
+ for (; p < end; p++, reg++)
+ *p += readl(reg);
+}
+
+static int dnet_poll(struct napi_struct *napi, int budget)
+{
+ struct dnet *bp = container_of(napi, struct dnet, napi);
+ struct net_device *dev = bp->dev;
+ int npackets = 0;
+ unsigned int pkt_len;
+ struct sk_buff *skb;
+ unsigned int *data_ptr;
+ u32 int_enable;
+ u32 cmd_word;
+ int i;
+
+ while (npackets < budget) {
+ /*
+ * break out of while loop if there are no more
+ * packets waiting
+ */
+ if (!(dnet_readl(bp, RX_FIFO_WCNT) >> 16)) {
+ napi_complete(napi);
+ int_enable = dnet_readl(bp, INTR_ENB);
+ int_enable |= DNET_INTR_SRC_RX_CMDFIFOAF;
+ dnet_writel(bp, int_enable, INTR_ENB);
+ return 0;
+ }
+
+ cmd_word = dnet_readl(bp, RX_LEN_FIFO);
+ pkt_len = cmd_word & 0xFFFF;
+
+ if (cmd_word & 0xDF180000)
+ printk(KERN_ERR "%s packet receive error %x\n",
+ __func__, cmd_word);
+
+ skb = dev_alloc_skb(pkt_len + 5);
+ if (skb != NULL) {
+ /* Align IP on 16 byte boundaries */
+ skb_reserve(skb, 2);
+ /*
+ * 'skb_put()' points to the start of sk_buff
+ * data area.
+ */
+ data_ptr = (unsigned int *)skb_put(skb, pkt_len);
+ for (i = 0; i < (pkt_len + 3) >> 2; i++)
+ *data_ptr++ = dnet_readl(bp, RX_DATA_FIFO);
+ skb->protocol = eth_type_trans(skb, dev);
+ netif_receive_skb(skb);
+ npackets++;
+ } else
+ printk(KERN_NOTICE
+ "%s: No memory to allocate a sk_buff of "
+ "size %u.\n", dev->name, pkt_len);
+ }
+
+ budget -= npackets;
+
+ if (npackets < budget) {
+ /* We processed all packets available. Tell NAPI it can
+ * stop polling then re-enable rx interrupts */
+ napi_complete(napi);
+ int_enable = dnet_readl(bp, INTR_ENB);
+ int_enable |= DNET_INTR_SRC_RX_CMDFIFOAF;
+ dnet_writel(bp, int_enable, INTR_ENB);
+ return 0;
+ }
+
+ /* There are still packets waiting */
+ return 1;
+}
+
+static irqreturn_t dnet_interrupt(int irq, void *dev_id)
+{
+ struct net_device *dev = dev_id;
+ struct dnet *bp = netdev_priv(dev);
+ u32 int_src, int_enable, int_current;
+ unsigned long flags;
+ unsigned int handled = 0;
+
+ spin_lock_irqsave(&bp->lock, flags);
+
+ /* read and clear the DNET irq (clear on read) */
+ int_src = dnet_readl(bp, INTR_SRC);
+ int_enable = dnet_readl(bp, INTR_ENB);
+ int_current = int_src & int_enable;
+
+ /* restart the queue if we had stopped it for TX fifo almost full */
+ if (int_current & DNET_INTR_SRC_TX_FIFOAE) {
+ int_enable = dnet_readl(bp, INTR_ENB);
+ int_enable &= ~DNET_INTR_ENB_TX_FIFOAE;
+ dnet_writel(bp, int_enable, INTR_ENB);
+ netif_wake_queue(dev);
+ handled = 1;
+ }
+
+ /* RX FIFO error checking */
+ if (int_current &
+ (DNET_INTR_SRC_RX_CMDFIFOFF | DNET_INTR_SRC_RX_DATAFIFOFF)) {
+ printk(KERN_ERR "%s: RX fifo error %x, irq %x\n", __func__,
+ dnet_readl(bp, RX_STATUS), int_current);
+ /* we can only flush the RX FIFOs */
+ dnet_writel(bp, DNET_SYS_CTL_RXFIFOFLUSH, SYS_CTL);
+ ndelay(500);
+ dnet_writel(bp, 0, SYS_CTL);
+ handled = 1;
+ }
+
+ /* TX FIFO error checking */
+ if (int_current &
+ (DNET_INTR_SRC_TX_FIFOFULL | DNET_INTR_SRC_TX_DISCFRM)) {
+ printk(KERN_ERR "%s: TX fifo error %x, irq %x\n", __func__,
+ dnet_readl(bp, TX_STATUS), int_current);
+ /* we can only flush the TX FIFOs */
+ dnet_writel(bp, DNET_SYS_CTL_TXFIFOFLUSH, SYS_CTL);
+ ndelay(500);
+ dnet_writel(bp, 0, SYS_CTL);
+ handled = 1;
+ }
+
+ if (int_current & DNET_INTR_SRC_RX_CMDFIFOAF) {
+ if (napi_schedule_prep(&bp->napi)) {
+ /*
+ * There's no point taking any more interrupts
+ * until we have processed the buffers
+ */
+ /* Disable Rx interrupts and schedule NAPI poll */
+ int_enable = dnet_readl(bp, INTR_ENB);
+ int_enable &= ~DNET_INTR_SRC_RX_CMDFIFOAF;
+ dnet_writel(bp, int_enable, INTR_ENB);
+ __napi_schedule(&bp->napi);
+ }
+ handled = 1;
+ }
+
+ if (!handled)
+ pr_debug("%s: irq %x remains\n", __func__, int_current);
+
+ spin_unlock_irqrestore(&bp->lock, flags);
+
+ return IRQ_RETVAL(handled);
+}
+
+#ifdef DEBUG
+static inline void dnet_print_skb(struct sk_buff *skb)
+{
+ int k;
+ printk(KERN_DEBUG PFX "data:");
+ for (k = 0; k < skb->len; k++)
+ printk(" %02x", (unsigned int)skb->data[k]);
+ printk("\n");
+}
+#else
+#define dnet_print_skb(skb) do {} while (0)
+#endif
+
+static int dnet_start_xmit(struct sk_buff *skb, struct net_device *dev)
+{
+
+ struct dnet *bp = netdev_priv(dev);
+ u32 tx_status, irq_enable;
+ unsigned int len, i, tx_cmd, wrsz;
+ unsigned long flags;
+ unsigned int *bufp;
+
+ tx_status = dnet_readl(bp, TX_STATUS);
+
+ pr_debug("start_xmit: len %u head %p data %p\n",
+ skb->len, skb->head, skb->data);
+ dnet_print_skb(skb);
+
+ /* frame size (words) */
+ len = (skb->len + 3) >> 2;
+
+ spin_lock_irqsave(&bp->lock, flags);
+
+ tx_status = dnet_readl(bp, TX_STATUS);
+
+ bufp = (unsigned int *)(((unsigned long) skb->data) & ~0x3UL);
+ wrsz = (u32) skb->len + 3;
+ wrsz += ((unsigned long) skb->data) & 0x3;
+ wrsz >>= 2;
+ tx_cmd = ((((unsigned long)(skb->data)) & 0x03) << 16) | (u32) skb->len;
+
+ /* check if there is enough room for the current frame */
+ if (wrsz < (DNET_FIFO_SIZE - dnet_readl(bp, TX_FIFO_WCNT))) {
+ for (i = 0; i < wrsz; i++)
+ dnet_writel(bp, *bufp++, TX_DATA_FIFO);
+
+ /*
+ * inform MAC that a packet's written and ready to be
+ * shipped out
+ */
+ dnet_writel(bp, tx_cmd, TX_LEN_FIFO);
+ }
+
+ if (dnet_readl(bp, TX_FIFO_WCNT) > DNET_FIFO_TX_DATA_AF_TH) {
+ netif_stop_queue(dev);
+ tx_status = dnet_readl(bp, INTR_SRC);
+ irq_enable = dnet_readl(bp, INTR_ENB);
+ irq_enable |= DNET_INTR_ENB_TX_FIFOAE;
+ dnet_writel(bp, irq_enable, INTR_ENB);
+ }
+
+ /* free the buffer */
+ dev_kfree_skb(skb);
+
+ spin_unlock_irqrestore(&bp->lock, flags);
+
+ dev->trans_start = jiffies;
+
+ return 0;
+}
+
+static void dnet_reset_hw(struct dnet *bp)
+{
+ /* put ts_mac in IDLE state i.e. disable rx/tx */
+ dnet_writew_mac(bp, DNET_INTERNAL_MODE_REG, DNET_INTERNAL_MODE_FCEN);
+
+ /*
+ * RX FIFO almost full threshold: only cmd FIFO almost full is
+ * implemented for RX side
+ */
+ dnet_writel(bp, DNET_FIFO_RX_CMD_AF_TH, RX_FIFO_TH);
+ /*
+ * TX FIFO almost empty threshold: only data FIFO almost empty
+ * is implemented for TX side
+ */
+ dnet_writel(bp, DNET_FIFO_TX_DATA_AE_TH, TX_FIFO_TH);
+
+ /* flush rx/tx fifos */
+ dnet_writel(bp, DNET_SYS_CTL_RXFIFOFLUSH | DNET_SYS_CTL_TXFIFOFLUSH,
+ SYS_CTL);
+ msleep(1);
+ dnet_writel(bp, 0, SYS_CTL);
+}
+
+static void dnet_init_hw(struct dnet *bp)
+{
+ u32 config;
+
+ dnet_reset_hw(bp);
+ __dnet_set_hwaddr(bp);
+
+ config = dnet_readw_mac(bp, DNET_INTERNAL_RXTX_CONTROL_REG);
+
+ if (bp->dev->flags & IFF_PROMISC)
+ /* Copy All Frames */
+ config |= DNET_INTERNAL_RXTX_CONTROL_ENPROMISC;
+ if (!(bp->dev->flags & IFF_BROADCAST))
+ /* No BroadCast */
+ config |= DNET_INTERNAL_RXTX_CONTROL_RXMULTICAST;
+
+ config |= DNET_INTERNAL_RXTX_CONTROL_RXPAUSE |
+ DNET_INTERNAL_RXTX_CONTROL_RXBROADCAST |
+ DNET_INTERNAL_RXTX_CONTROL_DROPCONTROL |
+ DNET_INTERNAL_RXTX_CONTROL_DISCFXFCS;
+
+ dnet_writew_mac(bp, DNET_INTERNAL_RXTX_CONTROL_REG, config);
+
+ /* clear irq before enabling them */
+ config = dnet_readl(bp, INTR_SRC);
+
+ /* enable RX/TX interrupt, recv packet ready interrupt */
+ dnet_writel(bp, DNET_INTR_ENB_GLOBAL_ENABLE | DNET_INTR_ENB_RX_SUMMARY |
+ DNET_INTR_ENB_TX_SUMMARY | DNET_INTR_ENB_RX_FIFOERR |
+ DNET_INTR_ENB_RX_ERROR | DNET_INTR_ENB_RX_FIFOFULL |
+ DNET_INTR_ENB_TX_FIFOFULL | DNET_INTR_ENB_TX_DISCFRM |
+ DNET_INTR_ENB_RX_PKTRDY, INTR_ENB);
+}
+
+static int dnet_open(struct net_device *dev)
+{
+ struct dnet *bp = netdev_priv(dev);
+
+ /* if the phy is not yet register, retry later */
+ if (!bp->phy_dev)
+ return -EAGAIN;
+
+ if (!is_valid_ether_addr(dev->dev_addr))
+ return -EADDRNOTAVAIL;
+
+ napi_enable(&bp->napi);
+ dnet_init_hw(bp);
+
+ phy_start_aneg(bp->phy_dev);
+
+ /* schedule a link state check */
+ phy_start(bp->phy_dev);
+
+ netif_start_queue(dev);
+
+ return 0;
+}
+
+static int dnet_close(struct net_device *dev)
+{
+ struct dnet *bp = netdev_priv(dev);
+
+ netif_stop_queue(dev);
+ napi_disable(&bp->napi);
+
+ if (bp->phy_dev)
+ phy_stop(bp->phy_dev);
+
+ dnet_reset_hw(bp);
+ netif_carrier_off(dev);
+
+ return 0;
+}
+
+static inline void dnet_print_pretty_hwstats(struct dnet_stats *hwstat)
+{
+ pr_debug("%s\n", __func__);
+ pr_debug("----------------------------- RX statistics "
+ "-------------------------------\n");
+ pr_debug("RX_PKT_IGNR_CNT %-8x\n", hwstat->rx_pkt_ignr);
+ pr_debug("RX_LEN_CHK_ERR_CNT %-8x\n", hwstat->rx_len_chk_err);
+ pr_debug("RX_LNG_FRM_CNT %-8x\n", hwstat->rx_lng_frm);
+ pr_debug("RX_SHRT_FRM_CNT %-8x\n", hwstat->rx_shrt_frm);
+ pr_debug("RX_IPG_VIOL_CNT %-8x\n", hwstat->rx_ipg_viol);
+ pr_debug("RX_CRC_ERR_CNT %-8x\n", hwstat->rx_crc_err);
+ pr_debug("RX_OK_PKT_CNT %-8x\n", hwstat->rx_ok_pkt);
+ pr_debug("RX_CTL_FRM_CNT %-8x\n", hwstat->rx_ctl_frm);
+ pr_debug("RX_PAUSE_FRM_CNT %-8x\n", hwstat->rx_pause_frm);
+ pr_debug("RX_MULTICAST_CNT %-8x\n", hwstat->rx_multicast);
+ pr_debug("RX_BROADCAST_CNT %-8x\n", hwstat->rx_broadcast);
+ pr_debug("RX_VLAN_TAG_CNT %-8x\n", hwstat->rx_vlan_tag);
+ pr_debug("RX_PRE_SHRINK_CNT %-8x\n", hwstat->rx_pre_shrink);
+ pr_debug("RX_DRIB_NIB_CNT %-8x\n", hwstat->rx_drib_nib);
+ pr_debug("RX_UNSUP_OPCD_CNT %-8x\n", hwstat->rx_unsup_opcd);
+ pr_debug("RX_BYTE_CNT %-8x\n", hwstat->rx_byte);
+ pr_debug("----------------------------- TX statistics "
+ "-------------------------------\n");
+ pr_debug("TX_UNICAST_CNT %-8x\n", hwstat->tx_unicast);
+ pr_debug("TX_PAUSE_FRM_CNT %-8x\n", hwstat->tx_pause_frm);
+ pr_debug("TX_MULTICAST_CNT %-8x\n", hwstat->tx_multicast);
+ pr_debug("TX_BRDCAST_CNT %-8x\n", hwstat->tx_brdcast);
+ pr_debug("TX_VLAN_TAG_CNT %-8x\n", hwstat->tx_vlan_tag);
+ pr_debug("TX_BAD_FCS_CNT %-8x\n", hwstat->tx_bad_fcs);
+ pr_debug("TX_JUMBO_CNT %-8x\n", hwstat->tx_jumbo);
+ pr_debug("TX_BYTE_CNT %-8x\n", hwstat->tx_byte);
+}
+
+static struct net_device_stats *dnet_get_stats(struct net_device *dev)
+{
+
+ struct dnet *bp = netdev_priv(dev);
+ struct net_device_stats *nstat = &dev->stats;
+ struct dnet_stats *hwstat = &bp->hw_stats;
+
+ /* read stats from hardware */
+ dnet_update_stats(bp);
+
+ /* Convert HW stats into netdevice stats */
+ nstat->rx_errors = (hwstat->rx_len_chk_err +
+ hwstat->rx_lng_frm + hwstat->rx_shrt_frm +
+ /* ignore IGP violation error
+ hwstat->rx_ipg_viol + */
+ hwstat->rx_crc_err +
+ hwstat->rx_pre_shrink +
+ hwstat->rx_drib_nib + hwstat->rx_unsup_opcd);
+ nstat->tx_errors = hwstat->tx_bad_fcs;
+ nstat->rx_length_errors = (hwstat->rx_len_chk_err +
+ hwstat->rx_lng_frm +
+ hwstat->rx_shrt_frm + hwstat->rx_pre_shrink);
+ nstat->rx_crc_errors = hwstat->rx_crc_err;
+ nstat->rx_frame_errors = hwstat->rx_pre_shrink + hwstat->rx_drib_nib;
+ nstat->rx_packets = hwstat->rx_ok_pkt;
+ nstat->tx_packets = (hwstat->tx_unicast +
+ hwstat->tx_multicast + hwstat->tx_brdcast);
+ nstat->rx_bytes = hwstat->rx_byte;
+ nstat->tx_bytes = hwstat->tx_byte;
+ nstat->multicast = hwstat->rx_multicast;
+ nstat->rx_missed_errors = hwstat->rx_pkt_ignr;
+
+ dnet_print_pretty_hwstats(hwstat);
+
+ return nstat;
+}
+
+static int dnet_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
+{
+ struct dnet *bp = netdev_priv(dev);
+ struct phy_device *phydev = bp->phy_dev;
+
+ if (!phydev)
+ return -ENODEV;
+
+ return phy_ethtool_gset(phydev, cmd);
+}
+
+static int dnet_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
+{
+ struct dnet *bp = netdev_priv(dev);
+ struct phy_device *phydev = bp->phy_dev;
+
+ if (!phydev)
+ return -ENODEV;
+
+ return phy_ethtool_sset(phydev, cmd);
+}
+
+static int dnet_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
+{
+ struct dnet *bp = netdev_priv(dev);
+ struct phy_device *phydev = bp->phy_dev;
+
+ if (!netif_running(dev))
+ return -EINVAL;
+
+ if (!phydev)
+ return -ENODEV;
+
+ return phy_mii_ioctl(phydev, if_mii(rq), cmd);
+}
+
+static void dnet_get_drvinfo(struct net_device *dev,
+ struct ethtool_drvinfo *info)
+{
+ strcpy(info->driver, DRV_NAME);
+ strcpy(info->version, DRV_VERSION);
+ strcpy(info->bus_info, "0");
+}
+
+static const struct ethtool_ops dnet_ethtool_ops = {
+ .get_settings = dnet_get_settings,
+ .set_settings = dnet_set_settings,
+ .get_drvinfo = dnet_get_drvinfo,
+ .get_link = ethtool_op_get_link,
+};
+
+static const struct net_device_ops dnet_netdev_ops = {
+ .ndo_open = dnet_open,
+ .ndo_stop = dnet_close,
+ .ndo_get_stats = dnet_get_stats,
+ .ndo_start_xmit = dnet_start_xmit,
+ .ndo_do_ioctl = dnet_ioctl,
+ .ndo_set_mac_address = eth_mac_addr,
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_change_mtu = eth_change_mtu,
+};
+
+static int __devinit dnet_probe(struct platform_device *pdev)
+{
+ struct resource *res;
+ struct net_device *dev;
+ struct dnet *bp;
+ struct phy_device *phydev;
+ int err = -ENXIO;
+ unsigned int mem_base, mem_size, irq;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(&pdev->dev, "no mmio resource defined\n");
+ goto err_out;
+ }
+ mem_base = res->start;
+ mem_size = resource_size(res);
+ irq = platform_get_irq(pdev, 0);
+
+ if (!request_mem_region(mem_base, mem_size, DRV_NAME)) {
+ dev_err(&pdev->dev, "no memory region available\n");
+ err = -EBUSY;
+ goto err_out;
+ }
+
+ err = -ENOMEM;
+ dev = alloc_etherdev(sizeof(*bp));
+ if (!dev) {
+ dev_err(&pdev->dev, "etherdev alloc failed, aborting.\n");
+ goto err_out;
+ }
+
+ /* TODO: Actually, we have some interesting features... */
+ dev->features |= 0;
+
+ bp = netdev_priv(dev);
+ bp->dev = dev;
+
+ SET_NETDEV_DEV(dev, &pdev->dev);
+
+ spin_lock_init(&bp->lock);
+
+ bp->regs = ioremap(mem_base, mem_size);
+ if (!bp->regs) {
+ dev_err(&pdev->dev, "failed to map registers, aborting.\n");
+ err = -ENOMEM;
+ goto err_out_free_dev;
+ }
+
+ dev->irq = irq;
+ err = request_irq(dev->irq, dnet_interrupt, 0, DRV_NAME, dev);
+ if (err) {
+ dev_err(&pdev->dev, "Unable to request IRQ %d (error %d)\n",
+ irq, err);
+ goto err_out_iounmap;
+ }
+
+ dev->netdev_ops = &dnet_netdev_ops;
+ netif_napi_add(dev, &bp->napi, dnet_poll, 64);
+ dev->ethtool_ops = &dnet_ethtool_ops;
+
+ dev->base_addr = (unsigned long)bp->regs;
+
+ bp->capabilities = dnet_readl(bp, VERCAPS) & DNET_CAPS_MASK;
+
+ dnet_get_hwaddr(bp);
+
+ if (!is_valid_ether_addr(dev->dev_addr)) {
+ /* choose a random ethernet address */
+ random_ether_addr(dev->dev_addr);
+ __dnet_set_hwaddr(bp);
+ }
+
+ err = register_netdev(dev);
+ if (err) {
+ dev_err(&pdev->dev, "Cannot register net device, aborting.\n");
+ goto err_out_free_irq;
+ }
+
+ /* register the PHY board fixup (for Marvell 88E1111) */
+ err = phy_register_fixup_for_uid(0x01410cc0, 0xfffffff0,
+ dnet_phy_marvell_fixup);
+ /* we can live without it, so just issue a warning */
+ if (err)
+ dev_warn(&pdev->dev, "Cannot register PHY board fixup.\n");
+
+ if (dnet_mii_init(bp) != 0)
+ goto err_out_unregister_netdev;
+
+ dev_info(&pdev->dev, "Dave DNET at 0x%p (0x%08x) irq %d %pM\n",
+ bp->regs, mem_base, dev->irq, dev->dev_addr);
+ dev_info(&pdev->dev, "has %smdio, %sirq, %sgigabit, %sdma \n",
+ (bp->capabilities & DNET_HAS_MDIO) ? "" : "no ",
+ (bp->capabilities & DNET_HAS_IRQ) ? "" : "no ",
+ (bp->capabilities & DNET_HAS_GIGABIT) ? "" : "no ",
+ (bp->capabilities & DNET_HAS_DMA) ? "" : "no ");
+ phydev = bp->phy_dev;
+ dev_info(&pdev->dev, "attached PHY driver [%s] "
+ "(mii_bus:phy_addr=%s, irq=%d)\n",
+ phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
+
+ return 0;
+
+err_out_unregister_netdev:
+ unregister_netdev(dev);
+err_out_free_irq:
+ free_irq(dev->irq, dev);
+err_out_iounmap:
+ iounmap(bp->regs);
+err_out_free_dev:
+ free_netdev(dev);
+err_out:
+ return err;
+}
+
+static int __devexit dnet_remove(struct platform_device *pdev)
+{
+
+ struct net_device *dev;
+ struct dnet *bp;
+
+ dev = platform_get_drvdata(pdev);
+
+ if (dev) {
+ bp = netdev_priv(dev);
+ if (bp->phy_dev)
+ phy_disconnect(bp->phy_dev);
+ mdiobus_unregister(bp->mii_bus);
+ kfree(bp->mii_bus->irq);
+ mdiobus_free(bp->mii_bus);
+ unregister_netdev(dev);
+ free_irq(dev->irq, dev);
+ iounmap(bp->regs);
+ free_netdev(dev);
+ }
+
+ return 0;
+}
+
+static struct platform_driver dnet_driver = {
+ .probe = dnet_probe,
+ .remove = __devexit_p(dnet_remove),
+ .driver = {
+ .name = "dnet",
+ },
+};
+
+static int __init dnet_init(void)
+{
+ return platform_driver_register(&dnet_driver);
+}
+
+static void __exit dnet_exit(void)
+{
+ platform_driver_unregister(&dnet_driver);
+}
+
+module_init(dnet_init);
+module_exit(dnet_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Dave DNET Ethernet driver");
+MODULE_AUTHOR("Ilya Yanok <yanok@emcraft.com>, "
+ "Matteo Vit <matteo.vit@dave.eu>");
--- /dev/null
+/*
+ * Dave DNET Ethernet Controller driver
+ *
+ * Copyright (C) 2008 Dave S.r.l. <www.dave.eu>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef _DNET_H
+#define _DNET_H
+
+#define DRV_NAME "dnet"
+#define DRV_VERSION "0.9.1"
+#define PFX DRV_NAME ": "
+
+/* Register access macros */
+#define dnet_writel(port, value, reg) \
+ writel((value), (port)->regs + DNET_##reg)
+#define dnet_readl(port, reg) readl((port)->regs + DNET_##reg)
+
+/* ALL DNET FIFO REGISTERS */
+#define DNET_RX_LEN_FIFO 0x000 /* RX_LEN_FIFO */
+#define DNET_RX_DATA_FIFO 0x004 /* RX_DATA_FIFO */
+#define DNET_TX_LEN_FIFO 0x008 /* TX_LEN_FIFO */
+#define DNET_TX_DATA_FIFO 0x00C /* TX_DATA_FIFO */
+
+/* ALL DNET CONTROL/STATUS REGISTERS OFFSETS */
+#define DNET_VERCAPS 0x100 /* VERCAPS */
+#define DNET_INTR_SRC 0x104 /* INTR_SRC */
+#define DNET_INTR_ENB 0x108 /* INTR_ENB */
+#define DNET_RX_STATUS 0x10C /* RX_STATUS */
+#define DNET_TX_STATUS 0x110 /* TX_STATUS */
+#define DNET_RX_FRAMES_CNT 0x114 /* RX_FRAMES_CNT */
+#define DNET_TX_FRAMES_CNT 0x118 /* TX_FRAMES_CNT */
+#define DNET_RX_FIFO_TH 0x11C /* RX_FIFO_TH */
+#define DNET_TX_FIFO_TH 0x120 /* TX_FIFO_TH */
+#define DNET_SYS_CTL 0x124 /* SYS_CTL */
+#define DNET_PAUSE_TMR 0x128 /* PAUSE_TMR */
+#define DNET_RX_FIFO_WCNT 0x12C /* RX_FIFO_WCNT */
+#define DNET_TX_FIFO_WCNT 0x130 /* TX_FIFO_WCNT */
+
+/* ALL DNET MAC REGISTERS */
+#define DNET_MACREG_DATA 0x200 /* Mac-Reg Data */
+#define DNET_MACREG_ADDR 0x204 /* Mac-Reg Addr */
+
+/* ALL DNET RX STATISTICS COUNTERS */
+#define DNET_RX_PKT_IGNR_CNT 0x300
+#define DNET_RX_LEN_CHK_ERR_CNT 0x304
+#define DNET_RX_LNG_FRM_CNT 0x308
+#define DNET_RX_SHRT_FRM_CNT 0x30C
+#define DNET_RX_IPG_VIOL_CNT 0x310
+#define DNET_RX_CRC_ERR_CNT 0x314
+#define DNET_RX_OK_PKT_CNT 0x318
+#define DNET_RX_CTL_FRM_CNT 0x31C
+#define DNET_RX_PAUSE_FRM_CNT 0x320
+#define DNET_RX_MULTICAST_CNT 0x324
+#define DNET_RX_BROADCAST_CNT 0x328
+#define DNET_RX_VLAN_TAG_CNT 0x32C
+#define DNET_RX_PRE_SHRINK_CNT 0x330
+#define DNET_RX_DRIB_NIB_CNT 0x334
+#define DNET_RX_UNSUP_OPCD_CNT 0x338
+#define DNET_RX_BYTE_CNT 0x33C
+
+/* DNET TX STATISTICS COUNTERS */
+#define DNET_TX_UNICAST_CNT 0x400
+#define DNET_TX_PAUSE_FRM_CNT 0x404
+#define DNET_TX_MULTICAST_CNT 0x408
+#define DNET_TX_BRDCAST_CNT 0x40C
+#define DNET_TX_VLAN_TAG_CNT 0x410
+#define DNET_TX_BAD_FCS_CNT 0x414
+#define DNET_TX_JUMBO_CNT 0x418
+#define DNET_TX_BYTE_CNT 0x41C
+
+/* SOME INTERNAL MAC-CORE REGISTER */
+#define DNET_INTERNAL_MODE_REG 0x0
+#define DNET_INTERNAL_RXTX_CONTROL_REG 0x2
+#define DNET_INTERNAL_MAX_PKT_SIZE_REG 0x4
+#define DNET_INTERNAL_IGP_REG 0x8
+#define DNET_INTERNAL_MAC_ADDR_0_REG 0xa
+#define DNET_INTERNAL_MAC_ADDR_1_REG 0xc
+#define DNET_INTERNAL_MAC_ADDR_2_REG 0xe
+#define DNET_INTERNAL_TX_RX_STS_REG 0x12
+#define DNET_INTERNAL_GMII_MNG_CTL_REG 0x14
+#define DNET_INTERNAL_GMII_MNG_DAT_REG 0x16
+
+#define DNET_INTERNAL_GMII_MNG_CMD_FIN (1 << 14)
+
+#define DNET_INTERNAL_WRITE (1 << 31)
+
+/* MAC-CORE REGISTER FIELDS */
+
+/* MAC-CORE MODE REGISTER FIELDS */
+#define DNET_INTERNAL_MODE_GBITEN (1 << 0)
+#define DNET_INTERNAL_MODE_FCEN (1 << 1)
+#define DNET_INTERNAL_MODE_RXEN (1 << 2)
+#define DNET_INTERNAL_MODE_TXEN (1 << 3)
+
+/* MAC-CORE RXTX CONTROL REGISTER FIELDS */
+#define DNET_INTERNAL_RXTX_CONTROL_RXSHORTFRAME (1 << 8)
+#define DNET_INTERNAL_RXTX_CONTROL_RXBROADCAST (1 << 7)
+#define DNET_INTERNAL_RXTX_CONTROL_RXMULTICAST (1 << 4)
+#define DNET_INTERNAL_RXTX_CONTROL_RXPAUSE (1 << 3)
+#define DNET_INTERNAL_RXTX_CONTROL_DISTXFCS (1 << 2)
+#define DNET_INTERNAL_RXTX_CONTROL_DISCFXFCS (1 << 1)
+#define DNET_INTERNAL_RXTX_CONTROL_ENPROMISC (1 << 0)
+#define DNET_INTERNAL_RXTX_CONTROL_DROPCONTROL (1 << 6)
+#define DNET_INTERNAL_RXTX_CONTROL_ENABLEHALFDUP (1 << 5)
+
+/* SYSTEM CONTROL REGISTER FIELDS */
+#define DNET_SYS_CTL_IGNORENEXTPKT (1 << 0)
+#define DNET_SYS_CTL_SENDPAUSE (1 << 2)
+#define DNET_SYS_CTL_RXFIFOFLUSH (1 << 3)
+#define DNET_SYS_CTL_TXFIFOFLUSH (1 << 4)
+
+/* TX STATUS REGISTER FIELDS */
+#define DNET_TX_STATUS_FIFO_ALMOST_EMPTY (1 << 2)
+#define DNET_TX_STATUS_FIFO_ALMOST_FULL (1 << 1)
+
+/* INTERRUPT SOURCE REGISTER FIELDS */
+#define DNET_INTR_SRC_TX_PKTSENT (1 << 0)
+#define DNET_INTR_SRC_TX_FIFOAF (1 << 1)
+#define DNET_INTR_SRC_TX_FIFOAE (1 << 2)
+#define DNET_INTR_SRC_TX_DISCFRM (1 << 3)
+#define DNET_INTR_SRC_TX_FIFOFULL (1 << 4)
+#define DNET_INTR_SRC_RX_CMDFIFOAF (1 << 8)
+#define DNET_INTR_SRC_RX_CMDFIFOFF (1 << 9)
+#define DNET_INTR_SRC_RX_DATAFIFOFF (1 << 10)
+#define DNET_INTR_SRC_TX_SUMMARY (1 << 16)
+#define DNET_INTR_SRC_RX_SUMMARY (1 << 17)
+#define DNET_INTR_SRC_PHY (1 << 19)
+
+/* INTERRUPT ENABLE REGISTER FIELDS */
+#define DNET_INTR_ENB_TX_PKTSENT (1 << 0)
+#define DNET_INTR_ENB_TX_FIFOAF (1 << 1)
+#define DNET_INTR_ENB_TX_FIFOAE (1 << 2)
+#define DNET_INTR_ENB_TX_DISCFRM (1 << 3)
+#define DNET_INTR_ENB_TX_FIFOFULL (1 << 4)
+#define DNET_INTR_ENB_RX_PKTRDY (1 << 8)
+#define DNET_INTR_ENB_RX_FIFOAF (1 << 9)
+#define DNET_INTR_ENB_RX_FIFOERR (1 << 10)
+#define DNET_INTR_ENB_RX_ERROR (1 << 11)
+#define DNET_INTR_ENB_RX_FIFOFULL (1 << 12)
+#define DNET_INTR_ENB_RX_FIFOAE (1 << 13)
+#define DNET_INTR_ENB_TX_SUMMARY (1 << 16)
+#define DNET_INTR_ENB_RX_SUMMARY (1 << 17)
+#define DNET_INTR_ENB_GLOBAL_ENABLE (1 << 18)
+
+/* default values:
+ * almost empty = less than one full sized ethernet frame (no jumbo) inside
+ * the fifo almost full = can write less than one full sized ethernet frame
+ * (no jumbo) inside the fifo
+ */
+#define DNET_CFG_TX_FIFO_FULL_THRES 25
+#define DNET_CFG_RX_FIFO_FULL_THRES 20
+
+/*
+ * Capabilities. Used by the driver to know the capabilities that the ethernet
+ * controller inside the FPGA have.
+ */
+
+#define DNET_HAS_MDIO (1 << 0)
+#define DNET_HAS_IRQ (1 << 1)
+#define DNET_HAS_GIGABIT (1 << 2)
+#define DNET_HAS_DMA (1 << 3)
+
+#define DNET_HAS_MII (1 << 4) /* or GMII */
+#define DNET_HAS_RMII (1 << 5) /* or RGMII */
+
+#define DNET_CAPS_MASK 0xFFFF
+
+#define DNET_FIFO_SIZE 1024 /* 1K x 32 bit */
+#define DNET_FIFO_TX_DATA_AF_TH (DNET_FIFO_SIZE - 384) /* 384 = 1536 / 4 */
+#define DNET_FIFO_TX_DATA_AE_TH 384
+
+#define DNET_FIFO_RX_CMD_AF_TH (1 << 16) /* just one frame inside the FIFO */
+
+/*
+ * Hardware-collected statistics.
+ */
+struct dnet_stats {
+ u32 rx_pkt_ignr;
+ u32 rx_len_chk_err;
+ u32 rx_lng_frm;
+ u32 rx_shrt_frm;
+ u32 rx_ipg_viol;
+ u32 rx_crc_err;
+ u32 rx_ok_pkt;
+ u32 rx_ctl_frm;
+ u32 rx_pause_frm;
+ u32 rx_multicast;
+ u32 rx_broadcast;
+ u32 rx_vlan_tag;
+ u32 rx_pre_shrink;
+ u32 rx_drib_nib;
+ u32 rx_unsup_opcd;
+ u32 rx_byte;
+ u32 tx_unicast;
+ u32 tx_pause_frm;
+ u32 tx_multicast;
+ u32 tx_brdcast;
+ u32 tx_vlan_tag;
+ u32 tx_bad_fcs;
+ u32 tx_jumbo;
+ u32 tx_byte;
+};
+
+struct dnet {
+ void __iomem *regs;
+ spinlock_t lock;
+ struct platform_device *pdev;
+ struct net_device *dev;
+ struct dnet_stats hw_stats;
+ unsigned int capabilities; /* read from FPGA */
+ struct napi_struct napi;
+
+ /* PHY stuff */
+ struct mii_bus *mii_bus;
+ struct phy_device *phy_dev;
+ unsigned int link;
+ unsigned int speed;
+ unsigned int duplex;
+};
+
+#endif /* _DNET_H */
if (of_device_is_compatible(np, "ibm,emac-460ex") ||
of_device_is_compatible(np, "ibm,emac-460gt"))
dev->features |= EMAC_FTR_460EX_PHY_CLK_FIX;
+ if (of_device_is_compatible(np, "ibm,emac-405ex") ||
+ of_device_is_compatible(np, "ibm,emac-405exr"))
+ dev->features |= EMAC_FTR_440EP_PHY_CLK_FIX;
} else if (of_device_is_compatible(np, "ibm,emac4")) {
dev->features |= EMAC_FTR_EMAC4;
if (of_device_is_compatible(np, "ibm,emac-440gx"))
struct net_device *netdev;
struct igb_adapter *adapter;
struct e1000_hw *hw;
- struct pci_dev *us_dev;
const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
unsigned long mmio_start, mmio_len;
- int i, err, pci_using_dac, pos;
- u16 eeprom_data = 0, state = 0;
+ int i, err, pci_using_dac;
+ u16 eeprom_data = 0;
u16 eeprom_apme_mask = IGB_EEPROM_APME;
u32 part_num;
int bars, need_ioport;
}
}
- /* 82575 requires that the pci-e link partner disable the L0s state */
- switch (pdev->device) {
- case E1000_DEV_ID_82575EB_COPPER:
- case E1000_DEV_ID_82575EB_FIBER_SERDES:
- case E1000_DEV_ID_82575GB_QUAD_COPPER:
- us_dev = pdev->bus->self;
- pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
- if (pos) {
- pci_read_config_word(us_dev, pos + PCI_EXP_LNKCTL,
- &state);
- state &= ~PCIE_LINK_STATE_L0S;
- pci_write_config_word(us_dev, pos + PCI_EXP_LNKCTL,
- state);
- dev_info(&pdev->dev,
- "Disabling ASPM L0s upstream switch port %s\n",
- pci_name(us_dev));
- }
- default:
- break;
- }
-
err = pci_request_selected_regions(pdev, bars, igb_driver_name);
if (err)
goto err_pci_reg;
.ndo_stop = ixgbe_close,
.ndo_start_xmit = ixgbe_xmit_frame,
.ndo_get_stats = ixgbe_get_stats,
+ .ndo_set_rx_mode = ixgbe_set_rx_mode,
.ndo_set_multicast_list = ixgbe_set_rx_mode,
.ndo_validate_addr = eth_validate_addr,
.ndo_set_mac_address = ixgbe_set_mac,
txq_set_fixed_prio_mode(txq);
}
- /*
- * Add configured unicast address to address filter table.
- */
- mv643xx_eth_program_unicast_filter(mp->dev);
-
/*
* Receive all unmatched unicast, TCP, UDP, BPDU and broadcast
* frames to RX queue #0, and include the pseudo-header when
*/
wrlp(mp, PORT_CONFIG_EXT, 0x00000000);
+ /*
+ * Add configured unicast addresses to address filter table.
+ */
+ mv643xx_eth_program_unicast_filter(mp->dev);
+
/*
* Enable the receive queues.
*/
}
-int netxen_is_flash_supported(struct netxen_adapter *adapter);
int netxen_get_flash_mac_addr(struct netxen_adapter *adapter, __le64 *mac);
int netxen_p3_get_mac_addr(struct netxen_adapter *adapter, __le64 *mac);
extern void netxen_change_ringparam(struct netxen_adapter *adapter);
return rc;
}
-int netxen_is_flash_supported(struct netxen_adapter *adapter)
-{
- const int locs[] = { 0, 0x4, 0x100, 0x4000, 0x4128 };
- int addr, val01, val02, i, j;
-
- /* if the flash size less than 4Mb, make huge war cry and die */
- for (j = 1; j < 4; j++) {
- addr = j * NETXEN_NIC_WINDOW_MARGIN;
- for (i = 0; i < ARRAY_SIZE(locs); i++) {
- if (netxen_rom_fast_read(adapter, locs[i], &val01) == 0
- && netxen_rom_fast_read(adapter, (addr + locs[i]),
- &val02) == 0) {
- if (val01 == val02)
- return -1;
- } else
- return -1;
- }
- }
-
- return 0;
-}
-
static int netxen_get_flash_block(struct netxen_adapter *adapter, int base,
int size, __le32 * buf)
{
struct net_device *netdev = adapter->netdev;
struct pci_dev *pdev = adapter->pdev;
- if (netxen_is_flash_supported(adapter) != 0)
- return -EIO;
-
if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
if (netxen_p3_get_mac_addr(adapter, &mac_addr) != 0)
return -EIO;
u8 flags1;
#define IB_MAC_IOCB_RSP_OI 0x01 /* Overide intr delay */
#define IB_MAC_IOCB_RSP_I 0x02 /* Disble Intr Generation */
+#define IB_MAC_CSUM_ERR_MASK 0x1c /* A mask to use for csum errs */
#define IB_MAC_IOCB_RSP_TE 0x04 /* Checksum error */
#define IB_MAC_IOCB_RSP_NU 0x08 /* No checksum rcvd */
#define IB_MAC_IOCB_RSP_IE 0x10 /* IPv4 checksum error */
if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_P) {
QPRINTK(qdev, RX_STATUS, DEBUG, "Promiscuous Packet.\n");
}
- if (ib_mac_rsp->flags1 & (IB_MAC_IOCB_RSP_IE | IB_MAC_IOCB_RSP_TE)) {
- QPRINTK(qdev, RX_STATUS, ERR,
- "Bad checksum for this %s packet.\n",
- ((ib_mac_rsp->
- flags2 & IB_MAC_IOCB_RSP_T) ? "TCP" : "UDP"));
- skb->ip_summed = CHECKSUM_NONE;
- } else if (qdev->rx_csum &&
- ((ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_T) ||
- ((ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_U) &&
- !(ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_NU)))) {
- QPRINTK(qdev, RX_STATUS, DEBUG, "RX checksum done!\n");
- skb->ip_summed = CHECKSUM_UNNECESSARY;
+
+ skb->protocol = eth_type_trans(skb, ndev);
+ skb->ip_summed = CHECKSUM_NONE;
+
+ /* If rx checksum is on, and there are no
+ * csum or frame errors.
+ */
+ if (qdev->rx_csum &&
+ !(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) &&
+ !(ib_mac_rsp->flags1 & IB_MAC_CSUM_ERR_MASK)) {
+ /* TCP frame. */
+ if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_T) {
+ QPRINTK(qdev, RX_STATUS, DEBUG,
+ "TCP checksum done!\n");
+ skb->ip_summed = CHECKSUM_UNNECESSARY;
+ } else if ((ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_U) &&
+ (ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_V4)) {
+ /* Unfragmented ipv4 UDP frame. */
+ struct iphdr *iph = (struct iphdr *) skb->data;
+ if (!(iph->frag_off &
+ cpu_to_be16(IP_MF|IP_OFFSET))) {
+ skb->ip_summed = CHECKSUM_UNNECESSARY;
+ QPRINTK(qdev, RX_STATUS, DEBUG,
+ "TCP checksum done!\n");
+ }
+ }
}
qdev->stats.rx_packets++;
qdev->stats.rx_bytes += skb->len;
tx_ring = &qdev->tx_ring[tx_ring_idx];
+ if (skb_padto(skb, ETH_ZLEN))
+ return NETDEV_TX_OK;
+
if (unlikely(atomic_read(&tx_ring->tx_count) < 2)) {
QPRINTK(qdev, TX_QUEUED, INFO,
"%s: shutting down tx queue %d du to lack of resources.\n",
mask = value << 16;
ql_write32(qdev, SYS, mask | value);
- /* Set the default queue. */
- value = NIC_RCV_CFG_DFQ;
- mask = NIC_RCV_CFG_DFQ_MASK;
+ /* Set the default queue, and VLAN behavior. */
+ value = NIC_RCV_CFG_DFQ | NIC_RCV_CFG_RV;
+ mask = NIC_RCV_CFG_DFQ_MASK | (NIC_RCV_CFG_RV << 16);
ql_write32(qdev, NIC_RCV_CFG, (mask | value));
/* Set the MPI interrupt to enabled. */
ql_tx_ring_clean(qdev);
+ /* Call netif_napi_del() from common point.
+ */
+ for (i = qdev->rss_ring_first_cq_id; i < qdev->rx_ring_count; i++)
+ netif_napi_del(&qdev->rx_ring[i].napi);
+
spin_lock(&qdev->hw_lock);
status = ql_adapter_reset(qdev);
if (status)
{
struct net_device *ndev = pci_get_drvdata(pdev);
struct ql_adapter *qdev = netdev_priv(ndev);
- int err, i;
+ int err;
netif_device_detach(ndev);
return err;
}
- for (i = qdev->rss_ring_first_cq_id; i < qdev->rx_ring_count; i++)
- netif_napi_del(&qdev->rx_ring[i].napi);
-
err = pci_save_state(pdev);
if (err)
return err;
#define RTL8169_TX_TIMEOUT (6*HZ)
#define RTL8169_PHY_TIMEOUT (10*HZ)
-#define RTL_EEPROM_SIG 0x8129
+#define RTL_EEPROM_SIG cpu_to_le32(0x8129)
+#define RTL_EEPROM_SIG_MASK cpu_to_le32(0xffff)
#define RTL_EEPROM_SIG_ADDR 0x0000
-#define RTL_EEPROM_MAC_ADDR 0x0007
/* write/read MMIO register */
#define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg))
/* Cfg9346Bits */
Cfg9346_Lock = 0x00,
Cfg9346_Unlock = 0xc0,
- Cfg9346_Program = 0x80, /* Programming mode */
- Cfg9346_EECS = 0x08, /* Chip select */
- Cfg9346_EESK = 0x04, /* Serial data clock */
- Cfg9346_EEDI = 0x02, /* Data input */
- Cfg9346_EEDO = 0x01, /* Data output */
/* rx_mode_bits */
AcceptErr = 0x20,
/* RxConfigBits */
RxCfgFIFOShift = 13,
RxCfgDMAShift = 8,
- RxCfg9356SEL = 6, /* EEPROM type: 0 = 9346, 1 = 9356 */
/* TxConfigBits */
TxInterFrameGapShift = 24,
};
-/* Delay between EEPROM clock transitions. Force out buffered PCI writes. */
-#define RTL_EEPROM_DELAY() RTL_R8(Cfg9346)
-#define RTL_EEPROM_READ_CMD 6
-
-/* read 16bit word stored in EEPROM. EEPROM is addressed by words. */
-static u16 rtl_eeprom_read(void __iomem *ioaddr, int addr)
-{
- u16 result = 0;
- int cmd, cmd_len, i;
-
- /* check for EEPROM address size (in bits) */
- if (RTL_R32(RxConfig) & (1 << RxCfg9356SEL)) {
- /* EEPROM is 93C56 */
- cmd_len = 3 + 8; /* 3 bits for command id and 8 for address */
- cmd = (RTL_EEPROM_READ_CMD << 8) | (addr & 0xff);
- } else {
- /* EEPROM is 93C46 */
- cmd_len = 3 + 6; /* 3 bits for command id and 6 for address */
- cmd = (RTL_EEPROM_READ_CMD << 6) | (addr & 0x3f);
- }
-
- /* enter programming mode */
- RTL_W8(Cfg9346, Cfg9346_Program | Cfg9346_EECS);
- RTL_EEPROM_DELAY();
-
- /* write command and requested address */
- while (cmd_len--) {
- u8 x = Cfg9346_Program | Cfg9346_EECS;
-
- x |= (cmd & (1 << cmd_len)) ? Cfg9346_EEDI : 0;
-
- /* write a bit */
- RTL_W8(Cfg9346, x);
- RTL_EEPROM_DELAY();
-
- /* raise clock */
- RTL_W8(Cfg9346, x | Cfg9346_EESK);
- RTL_EEPROM_DELAY();
- }
-
- /* lower clock */
- RTL_W8(Cfg9346, Cfg9346_Program | Cfg9346_EECS);
- RTL_EEPROM_DELAY();
-
- /* read back 16bit value */
- for (i = 16; i > 0; i--) {
- /* raise clock */
- RTL_W8(Cfg9346, Cfg9346_Program | Cfg9346_EECS | Cfg9346_EESK);
- RTL_EEPROM_DELAY();
-
- result <<= 1;
- result |= (RTL_R8(Cfg9346) & Cfg9346_EEDO) ? 1 : 0;
-
- /* lower clock */
- RTL_W8(Cfg9346, Cfg9346_Program | Cfg9346_EECS);
- RTL_EEPROM_DELAY();
- }
-
- RTL_W8(Cfg9346, Cfg9346_Program);
- /* leave programming mode */
- RTL_W8(Cfg9346, Cfg9346_Lock);
-
- return result;
-}
-
-static void rtl_init_mac_address(struct rtl8169_private *tp,
- void __iomem *ioaddr)
-{
- struct pci_dev *pdev = tp->pci_dev;
- u16 x;
- u8 mac[8];
-
- /* read EEPROM signature */
- x = rtl_eeprom_read(ioaddr, RTL_EEPROM_SIG_ADDR);
-
- if (x != RTL_EEPROM_SIG) {
- dev_info(&pdev->dev, "Missing EEPROM signature: %04x\n", x);
- return;
- }
-
- /* read MAC address */
- x = rtl_eeprom_read(ioaddr, RTL_EEPROM_MAC_ADDR);
- mac[0] = x & 0xff;
- mac[1] = x >> 8;
- x = rtl_eeprom_read(ioaddr, RTL_EEPROM_MAC_ADDR + 1);
- mac[2] = x & 0xff;
- mac[3] = x >> 8;
- x = rtl_eeprom_read(ioaddr, RTL_EEPROM_MAC_ADDR + 2);
- mac[4] = x & 0xff;
- mac[5] = x >> 8;
-
- if (netif_msg_probe(tp)) {
- DECLARE_MAC_BUF(buf);
-
- dev_info(&pdev->dev, "MAC address found in EEPROM: %s\n",
- print_mac(buf, mac));
- }
-
- if (is_valid_ether_addr(mac))
- rtl_rar_set(tp, mac);
-}
-
static int __devinit
rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{
tp->mmio_addr = ioaddr;
- rtl_init_mac_address(tp, ioaddr);
-
/* Get MAC address */
for (i = 0; i < MAC_ADDR_LEN; i++)
dev->dev_addr[i] = RTL_R8(MAC0 + i);
opts1 |= FirstFrag;
} else {
len = skb->len;
-
- if (unlikely(len < ETH_ZLEN)) {
- if (skb_padto(skb, ETH_ZLEN))
- goto err_update_stats;
- len = ETH_ZLEN;
- }
-
opts1 |= FirstFrag | LastFrag;
tp->tx_skb[entry].skb = skb;
}
err_stop:
netif_stop_queue(dev);
ret = NETDEV_TX_BUSY;
-err_update_stats:
dev->stats.tx_dropped++;
goto out;
}
{
struct net_device *ndev = netdev;
struct sh_eth_private *mdp = netdev_priv(ndev);
+ irqreturn_t ret = IRQ_NONE;
u32 ioaddr, boguscnt = RX_RING_SIZE;
u32 intr_status = 0;
/* Get interrpt stat */
intr_status = ctrl_inl(ioaddr + EESR);
/* Clear interrupt */
- ctrl_outl(intr_status, ioaddr + EESR);
+ if (intr_status & (EESR_FRC | EESR_RMAF | EESR_RRF |
+ EESR_RTLF | EESR_RTSF | EESR_PRE | EESR_CERF |
+ TX_CHECK | EESR_ERR_CHECK)) {
+ ctrl_outl(intr_status, ioaddr + EESR);
+ ret = IRQ_HANDLED;
+ } else
+ goto other_irq;
if (intr_status & (EESR_FRC | /* Frame recv*/
EESR_RMAF | /* Multi cast address recv*/
ndev->name, intr_status);
}
+other_irq:
spin_unlock(&mdp->lock);
- return IRQ_HANDLED;
+ return ret;
}
static void sh_eth_timer(unsigned long data)
int ret = 0;
struct sh_eth_private *mdp = netdev_priv(ndev);
- ret = request_irq(ndev->irq, &sh_eth_interrupt, 0, ndev->name, ndev);
+ ret = request_irq(ndev->irq, &sh_eth_interrupt,
+#if defined(CONFIG_CPU_SUBTYPE_SH7763) || defined(CONFIG_CPU_SUBTYPE_SH7764)
+ IRQF_SHARED,
+#else
+ 0,
+#endif
+ ndev->name, ndev);
if (ret) {
printk(KERN_ERR "Can not assign IRQ number to %s\n", CARDNAME);
return ret;
#define SH7763_SKB_ALIGN 32
/* Chip Base Address */
-# define SH_TSU_ADDR 0xFFE01800
-# define ARSTR 0xFFE01800
+# define SH_TSU_ADDR 0xFEE01800
+# define ARSTR SH_TSU_ADDR
/* Chip Registers */
/* E-DMAC */
dev_info(&dev->dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
(unsigned long)pdata->ioaddr, dev->irq);
+ /* Reset the last known duplex and carrier */
+ pdata->last_duplex = -1;
+ pdata->last_carrier = -1;
+
/* Bring the PHY up */
phy_start(pdata->phy_dev);
.ndo_do_ioctl = gem_ioctl,
.ndo_tx_timeout = gem_tx_timeout,
.ndo_change_mtu = gem_change_mtu,
- .ndo_set_mac_address = eth_mac_addr,
.ndo_validate_addr = eth_validate_addr,
+ .ndo_set_mac_address = gem_set_mac_address,
+#ifdef CONFIG_NET_POLL_CONTROLLER
+ .ndo_poll_controller = gem_poll_controller,
+#endif
};
static int __devinit gem_init_one(struct pci_dev *pdev,
dev->watchdog_timeo = 5 * HZ;
dev->irq = pdev->irq;
dev->dma = 0;
- dev->set_mac_address = gem_set_mac_address;
-#ifdef CONFIG_NET_POLL_CONTROLLER
- dev->poll_controller = gem_poll_controller;
-#endif
/* Set that now, in case PM kicks in now */
pci_set_drvdata(pdev, dev);
static void tulip_tx_timeout(struct net_device *dev);
static void tulip_init_ring(struct net_device *dev);
+static void tulip_free_ring(struct net_device *dev);
static int tulip_start_xmit(struct sk_buff *skb, struct net_device *dev);
static int tulip_open(struct net_device *dev);
static int tulip_close(struct net_device *dev);
{
int retval;
- if ((retval = request_irq(dev->irq, &tulip_interrupt, IRQF_SHARED, dev->name, dev)))
- return retval;
-
tulip_init_ring (dev);
+ retval = request_irq(dev->irq, &tulip_interrupt, IRQF_SHARED, dev->name, dev);
+ if (retval)
+ goto free_ring;
+
tulip_up (dev);
netif_start_queue (dev);
return 0;
+
+free_ring:
+ tulip_free_ring (dev);
+ return retval;
}
tulip_set_power_state (tp, 0, 1);
}
-
-static int tulip_close (struct net_device *dev)
+static void tulip_free_ring (struct net_device *dev)
{
struct tulip_private *tp = netdev_priv(dev);
- void __iomem *ioaddr = tp->base_addr;
int i;
- netif_stop_queue (dev);
-
- tulip_down (dev);
-
- if (tulip_debug > 1)
- printk (KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n",
- dev->name, ioread32 (ioaddr + CSR5));
-
- free_irq (dev->irq, dev);
-
/* Free all the skbuffs in the Rx queue. */
for (i = 0; i < RX_RING_SIZE; i++) {
struct sk_buff *skb = tp->rx_buffers[i].skb;
dev_kfree_skb (skb);
}
}
+
for (i = 0; i < TX_RING_SIZE; i++) {
struct sk_buff *skb = tp->tx_buffers[i].skb;
tp->tx_buffers[i].skb = NULL;
tp->tx_buffers[i].mapping = 0;
}
+}
+
+static int tulip_close (struct net_device *dev)
+{
+ struct tulip_private *tp = netdev_priv(dev);
+ void __iomem *ioaddr = tp->base_addr;
+
+ netif_stop_queue (dev);
+
+ tulip_down (dev);
+
+ if (tulip_debug > 1)
+ printk (KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n",
+ dev->name, ioread32 (ioaddr + CSR5));
+
+ free_irq (dev->irq, dev);
+
+ tulip_free_ring (dev);
return 0;
}
static int init_phy(struct net_device *dev)
{
struct ucc_geth_private *priv = netdev_priv(dev);
- struct device_node *np = priv->node;
- struct device_node *phy, *mdio;
- const phandle *ph;
- char bus_name[MII_BUS_ID_SIZE];
- const unsigned int *id;
+ struct ucc_geth_info *ug_info = priv->ug_info;
struct phy_device *phydev;
- char phy_id[BUS_ID_SIZE];
priv->oldlink = 0;
priv->oldspeed = 0;
priv->oldduplex = -1;
- ph = of_get_property(np, "phy-handle", NULL);
- phy = of_find_node_by_phandle(*ph);
- mdio = of_get_parent(phy);
-
- id = of_get_property(phy, "reg", NULL);
-
- of_node_put(phy);
- of_node_put(mdio);
-
- uec_mdio_bus_name(bus_name, mdio);
- snprintf(phy_id, sizeof(phy_id), "%s:%02x",
- bus_name, *id);
-
- phydev = phy_connect(dev, phy_id, &adjust_link, 0, priv->phy_interface);
+ phydev = phy_connect(dev, ug_info->phy_bus_id, &adjust_link, 0,
+ priv->phy_interface);
if (IS_ERR(phydev)) {
printk("%s: Could not attach to PHY\n", dev->name);
ug_info->uf_info.irq = irq_of_parse_and_map(np, 0);
fixed_link = of_get_property(np, "fixed-link", NULL);
if (fixed_link) {
- snprintf(ug_info->mdio_bus, MII_BUS_ID_SIZE, "0");
- ug_info->phy_address = fixed_link[0];
+ snprintf(ug_info->phy_bus_id, sizeof(ug_info->phy_bus_id),
+ PHY_ID_FMT, "0", fixed_link[0]);
phy = NULL;
} else {
+ char bus_name[MII_BUS_ID_SIZE];
+
ph = of_get_property(np, "phy-handle", NULL);
phy = of_find_node_by_phandle(*ph);
prop = of_get_property(phy, "reg", NULL);
if (prop == NULL)
return -1;
- ug_info->phy_address = *prop;
/* Set the bus id */
mdio = of_get_parent(phy);
if (err)
return -1;
- snprintf(ug_info->mdio_bus, MII_BUS_ID_SIZE, "%x", res.start);
+ uec_mdio_bus_name(bus_name, mdio);
+ snprintf(ug_info->phy_bus_id, sizeof(ug_info->phy_bus_id),
+ "%s:%02x", bus_name, *prop);
}
/* get the phy interface type, or default to MII */
u32 eventRegMask;
u16 pausePeriod;
u16 extensionField;
- u8 phy_address;
- char mdio_bus[MII_BUS_ID_SIZE];
+ char phy_bus_id[BUS_ID_SIZE];
u8 weightfactor[NUM_TX_QUEUES];
u8 interruptcoalescingmaxvalue[NUM_RX_QUEUES];
u8 l2qt[UCC_GETH_VLAN_PRIORITY_MAX];
{
struct sk_buff *skb = tdinfo->skb;
int i;
+ int pktlen;
/*
* Don't unmap the pre-allocated tx_bufs
*/
if (tdinfo->skb_dma) {
+ pktlen = (skb->len > ETH_ZLEN ? : ETH_ZLEN);
for (i = 0; i < tdinfo->nskb_dma; i++) {
#ifdef VELOCITY_ZERO_COPY_SUPPORT
pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], le16_to_cpu(td->tdesc1.len), PCI_DMA_TODEVICE);
#else
- pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], skb->len, PCI_DMA_TODEVICE);
+ pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], pktlen, PCI_DMA_TODEVICE);
#endif
tdinfo->skb_dma[i] = 0;
}
struct tx_desc *td_ptr;
struct velocity_td_info *tdinfo;
unsigned long flags;
- int pktlen = skb->len;
+ int pktlen;
__le16 len;
int index;
-
- if (skb->len < ETH_ZLEN) {
- if (skb_padto(skb, ETH_ZLEN))
- goto out;
- pktlen = ETH_ZLEN;
- }
+ if (skb_padto(skb, ETH_ZLEN))
+ goto out;
+ pktlen = max_t(unsigned int, skb->len, ETH_ZLEN);
len = cpu_to_le16(pktlen);
.set_tx_csum = virtnet_set_tx_csum,
.set_sg = ethtool_op_set_sg,
.set_tso = ethtool_op_set_tso,
+ .get_link = ethtool_op_get_link,
};
#define MIN_MTU 68
goto unregister;
}
+ netif_carrier_on(dev);
+
pr_debug("virtnet: registered device %s\n", dev->name);
return 0;
u8 iso[3];
};
-#define REG_WRITE(_ah, _reg, _val) iowrite32(_val, _ah->ah_sh + _reg)
-#define REG_READ(_ah, _reg) ioread32(_ah->ah_sh + _reg)
+#define REG_WRITE(_ah, _reg, _val) ath9k_iowrite32((_ah), (_reg), (_val))
+#define REG_READ(_ah, _reg) ath9k_ioread32((_ah), (_reg))
#define SM(_v, _f) (((_v) << _f##_S) & _f)
#define MS(_v, _f) (((_v) & _f) >> _f##_S)
struct ath_hal *sc_ah;
void __iomem *mem;
spinlock_t sc_resetlock;
+ spinlock_t sc_serial_rw;
struct mutex mutex;
u8 sc_curbssid[ETH_ALEN];
int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc);
int ath_cabq_update(struct ath_softc *);
+/*
+ * Read and write, they both share the same lock. We do this to serialize
+ * reads and writes on Atheros 802.11n PCI devices only. This is required
+ * as the FIFO on these devices can only accept sanely 2 requests. After
+ * that the device goes bananas. Serializing the reads/writes prevents this
+ * from happening.
+ */
+
+static inline void ath9k_iowrite32(struct ath_hal *ah, u32 reg_offset, u32 val)
+{
+ if (ah->ah_config.serialize_regmode == SER_REG_MODE_ON) {
+ unsigned long flags;
+ spin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags);
+ iowrite32(val, ah->ah_sc->mem + reg_offset);
+ spin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags);
+ } else
+ iowrite32(val, ah->ah_sc->mem + reg_offset);
+}
+
+static inline unsigned int ath9k_ioread32(struct ath_hal *ah, u32 reg_offset)
+{
+ u32 val;
+ if (ah->ah_config.serialize_regmode == SER_REG_MODE_ON) {
+ unsigned long flags;
+ spin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags);
+ val = ioread32(ah->ah_sc->mem + reg_offset);
+ spin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags);
+ } else
+ val = ioread32(ah->ah_sc->mem + reg_offset);
+ return val;
+}
+
#endif /* CORE_H */
}
ah->ah_config.intr_mitigation = 1;
+
+ /*
+ * We need this for PCI devices only (Cardbus, PCI, miniPCI)
+ * _and_ if on non-uniprocessor systems (Multiprocessor/HT).
+ * This means we use it for all AR5416 devices, and the few
+ * minor PCI AR9280 devices out there.
+ *
+ * Serialization is required because these devices do not handle
+ * well the case of two concurrent reads/writes due to the latency
+ * involved. During one read/write another read/write can be issued
+ * on another CPU while the previous read/write may still be working
+ * on our hardware, if we hit this case the hardware poops in a loop.
+ * We prevent this by serializing reads and writes.
+ *
+ * This issue is not present on PCI-Express devices or pre-AR5416
+ * devices (legacy, 802.11abg).
+ */
+ if (num_possible_cpus() > 1)
+ ah->ah_config.serialize_regmode = SER_REG_MODE_AUTO;
}
static struct ath_hal_5416 *ath9k_hw_newstate(u16 devid,
}
if (ah->ah_config.serialize_regmode == SER_REG_MODE_AUTO) {
- if (ah->ah_macVersion == AR_SREV_VERSION_5416_PCI) {
+ if (ah->ah_macVersion == AR_SREV_VERSION_5416_PCI ||
+ (AR_SREV_9280(ah) && !ah->ah_isPciExpress)) {
ah->ah_config.serialize_regmode =
SER_REG_MODE_ON;
} else {
printk(KERN_ERR "Unable to create debugfs files\n");
spin_lock_init(&sc->sc_resetlock);
+ spin_lock_init(&sc->sc_serial_rw);
mutex_init(&sc->mutex);
tasklet_init(&sc->intr_tq, ath9k_tasklet, (unsigned long)sc);
tasklet_init(&sc->bcon_tasklet, ath9k_beacon_tasklet,
r = fill_ctrlset(mac, skb);
if (r)
- return r;
+ goto fail;
info->rate_driver_data[0] = hw;
r = zd_usb_tx(&mac->chip.usb, skb);
if (r)
- return r;
+ goto fail;
+ return 0;
+
+fail:
+ dev_kfree_skb(skb);
return 0;
}
res = &dino_dev->hba.lmmio_space;
res->flags = IORESOURCE_MEM;
size = scnprintf(name, sizeof(name), "Dino LMMIO (%s)",
- bus->bridge->bus_id);
+ dev_name(bus->bridge));
res->name = kmalloc(size+1, GFP_KERNEL);
if(res->name)
strcpy((char *)res->name, name);
struct list_head *ln, *tmp_ln;
printk(KERN_ERR "Dino: cannot attach bus %s\n",
- bus->bridge->bus_id);
+ dev_name(bus->bridge));
/* kill the bus, we can't do anything with it */
list_for_each_safe(ln, tmp_ln, &bus->devices) {
struct pci_dev *dev = pci_dev_b(ln);
bus->resource[i+1] = &res[i];
}
- } else if(bus->self) {
+ } else if (bus->parent) {
int i;
pci_read_bridge_bases(bus);
}
DBG("DEBUG %s assigning %d [0x%lx,0x%lx]\n",
- bus->self->dev.bus_id, i,
+ dev_name(&bus->self->dev), i,
bus->self->resource[i].start,
bus->self->resource[i].end);
pci_assign_resource(bus->self, i);
DBG("DEBUG %s after assign %d [0x%lx,0x%lx]\n",
- bus->self->dev.bus_id, i,
+ dev_name(&bus->self->dev), i,
bus->self->resource[i].start,
bus->self->resource[i].end);
}
dino_current_bus = bus->subordinate + 1;
pci_bus_assign_resources(bus);
} else {
- printk(KERN_ERR "ERROR: failed to scan PCI bus on %s (probably duplicate bus number %d)\n", dev->dev.bus_id, dino_current_bus);
+ printk(KERN_ERR "ERROR: failed to scan PCI bus on %s (probably duplicate bus number %d)\n",
+ dev_name(&dev->dev), dino_current_bus);
/* increment the bus number in case of duplicates */
dino_current_bus++;
}
*irqp = irq;
}
-static struct device *next_device(struct klist_iter *i)
+struct gsc_fixup_struct {
+ void (*choose_irq)(struct parisc_device *, void *);
+ void *ctrl;
+};
+
+static int gsc_fixup_irqs_callback(struct device *dev, void *data)
{
- struct klist_node * n = klist_next(i);
- return n ? container_of(n, struct device, knode_parent) : NULL;
+ struct parisc_device *padev = to_parisc_device(dev);
+ struct gsc_fixup_struct *gf = data;
+
+ /* work-around for 715/64 and others which have parent
+ at path [5] and children at path [5/0/x] */
+ if (padev->id.hw_type == HPHW_FAULTY)
+ gsc_fixup_irqs(padev, gf->ctrl, gf->choose_irq);
+ gf->choose_irq(padev, gf->ctrl);
+
+ return 0;
}
void gsc_fixup_irqs(struct parisc_device *parent, void *ctrl,
void (*choose_irq)(struct parisc_device *, void *))
{
- struct device *dev;
- struct klist_iter i;
-
- klist_iter_init(&parent->dev.klist_children, &i);
- while ((dev = next_device(&i))) {
- struct parisc_device *padev = to_parisc_device(dev);
-
- /* work-around for 715/64 and others which have parent
- at path [5] and children at path [5/0/x] */
- if (padev->id.hw_type == HPHW_FAULTY)
- return gsc_fixup_irqs(padev, ctrl, choose_irq);
- choose_irq(padev, ctrl);
- }
- klist_iter_exit(&i);
+ struct gsc_fixup_struct data = {
+ .choose_irq = choose_irq,
+ .ctrl = ctrl,
+ };
+
+ device_for_each_child(&parent->dev, &data, gsc_fixup_irqs_callback);
}
int gsc_common_setup(struct parisc_device *parent, struct gsc_asic *gsc_asic)
}
/* Check if pcidev behind a PPB */
- if (NULL != pcidev->bus->self) {
+ if (pcidev->bus->parent) {
/* Convert pcidev INTR_PIN into something we
** can lookup in the IRT.
*/
#endif /* PCI_BRIDGE_FUNCS */
/*
- ** Locate the host slot the PPB nearest the Host bus
- ** adapter.
- */
- while (NULL != p->parent->self)
+ * Locate the host slot of the PPB.
+ */
+ while (p->parent->parent)
p = p->parent;
intr_slot = PCI_SLOT(p->self->devfn);
struct vector_info *vi = iosapic_get_vector(irq);
u32 d0, d1, dummy_d0;
unsigned long flags;
+ int dest_cpu;
- if (cpu_check_affinity(irq, dest))
+ dest_cpu = cpu_check_affinity(irq, dest);
+ if (dest_cpu < 0)
return;
- vi->txn_addr = txn_affinity_addr(irq, cpumask_first(dest));
+ irq_desc[irq].affinity = cpumask_of_cpu(dest_cpu);
+ vi->txn_addr = txn_affinity_addr(irq, dest_cpu);
spin_lock_irqsave(&iosapic_lock, flags);
/* d1 contains the destination CPU, so only want to set that
** Properly Setup MMIO resources for this bus.
** pci_alloc_primary_bus() mangles this.
*/
- if (bus->self) {
+ if (bus->parent) {
int i;
/* PCI-PCI Bridge */
pci_read_bridge_bases(bus);
** Can't fixup here anyway....garr...
*/
if (fbb_enable) {
- if (bus->self) {
+ if (bus->parent) {
u8 control;
/* enable on PPB */
(void) pci_read_config_byte(bus->self, PCI_BRIDGE_CONTROL, &control);
return (void *) pdir_base;
}
-static struct device *next_device(struct klist_iter *i)
+struct ibase_data_struct {
+ struct ioc *ioc;
+ int ioc_num;
+};
+
+static int setup_ibase_imask_callback(struct device *dev, void *data)
{
- struct klist_node * n = klist_next(i);
- return n ? container_of(n, struct device, knode_parent) : NULL;
+ /* lba_set_iregs() is in drivers/parisc/lba_pci.c */
+ extern void lba_set_iregs(struct parisc_device *, u32, u32);
+ struct parisc_device *lba = to_parisc_device(dev);
+ struct ibase_data_struct *ibd = data;
+ int rope_num = (lba->hpa.start >> 13) & 0xf;
+ if (rope_num >> 3 == ibd->ioc_num)
+ lba_set_iregs(lba, ibd->ioc->ibase, ibd->ioc->imask);
+ return 0;
}
/* setup Mercury or Elroy IBASE/IMASK registers. */
static void
setup_ibase_imask(struct parisc_device *sba, struct ioc *ioc, int ioc_num)
{
- /* lba_set_iregs() is in drivers/parisc/lba_pci.c */
- extern void lba_set_iregs(struct parisc_device *, u32, u32);
- struct device *dev;
- struct klist_iter i;
-
- klist_iter_init(&sba->dev.klist_children, &i);
- while ((dev = next_device(&i))) {
- struct parisc_device *lba = to_parisc_device(dev);
- int rope_num = (lba->hpa.start >> 13) & 0xf;
- if (rope_num >> 3 == ioc_num)
- lba_set_iregs(lba, ioc->ibase, ioc->imask);
- }
- klist_iter_exit(&i);
+ struct ibase_data_struct ibase_data = {
+ .ioc = ioc,
+ .ioc_num = ioc_num,
+ };
+
+ device_for_each_child(&sba->dev, &ibase_data,
+ setup_ibase_imask_callback);
+}
+
+#ifdef SBA_AGP_SUPPORT
+static int
+sba_ioc_find_quicksilver(struct device *dev, void *data)
+{
+ int *agp_found = data;
+ struct parisc_device *lba = to_parisc_device(dev);
+
+ if (IS_QUICKSILVER(lba))
+ *agp_found = 1;
+ return 0;
}
+#endif
static void
sba_ioc_init_pluto(struct parisc_device *sba, struct ioc *ioc, int ioc_num)
WRITE_REG(ioc->ibase | 31, ioc->ioc_hpa + IOC_PCOM);
#ifdef SBA_AGP_SUPPORT
-{
- struct klist_iter i;
- struct device *dev = NULL;
/*
** If an AGP device is present, only use half of the IOV space
** We program the next pdir index after we stop w/ a key for
** the GART code to handshake on.
*/
- klist_iter_init(&sba->dev.klist_children, &i);
- while ((dev = next_device(&i))) {
- struct parisc_device *lba = to_parisc_device(dev);
- if (IS_QUICKSILVER(lba))
- agp_found = 1;
- }
- klist_iter_exit(&i);
+ device_for_each_child(&sba->dev, &agp_found, sba_ioc_find_quicksilver);
if (agp_found && sba_reserve_agpgart) {
printk(KERN_INFO "%s: reserving %dMb of IOVA space for agpgart\n",
ioc->pdir_size /= 2;
ioc->pdir_base[PDIR_INDEX(iova_space_size/2)] = SBA_AGPGART_COOKIE;
}
-}
#endif /*SBA_AGP_SUPPORT*/
-
}
static void
if X86_PLATFORM_DEVICES
config ACER_WMI
- tristate "Acer WMI Laptop Extras (EXPERIMENTAL)"
- depends on EXPERIMENTAL
+ tristate "Acer WMI Laptop Extras"
depends on ACPI
depends on LEDS_CLASS
depends on NEW_LEDS
tristate "Asus Laptop Extras (EXPERIMENTAL)"
depends on ACPI
depends on EXPERIMENTAL && !ACPI_ASUS
- depends on LEDS_CLASS
- depends on NEW_LEDS
- depends on BACKLIGHT_CLASS_DEVICE
+ select LEDS_CLASS
+ select NEW_LEDS
+ select BACKLIGHT_CLASS_DEVICE
depends on INPUT
---help---
This is the new Linux driver for Asus laptops. It may also support some
config THINKPAD_ACPI
tristate "ThinkPad ACPI Laptop Extras"
depends on ACPI
+ depends on INPUT
select BACKLIGHT_LCD_SUPPORT
select BACKLIGHT_CLASS_DEVICE
select HWMON
select NVRAM
- select INPUT
select NEW_LEDS
select LEDS_CLASS
select NET
config ACPI_WMI
- tristate "WMI (EXPERIMENTAL)"
+ tristate "WMI"
depends on ACPI
- depends on EXPERIMENTAL
help
This driver adds support for the ACPI-WMI (Windows Management
Instrumentation) mapper device (PNP0C14) found on some systems.
kfree(wireless_rfkill->data);
rfkill_unregister(wireless_rfkill);
if (has_cap(ACER_CAP_BLUETOOTH)) {
- kfree(wireless_rfkill->data);
+ kfree(bluetooth_rfkill->data);
rfkill_unregister(bluetooth_rfkill);
}
return;
static void asus_hotk_notify(acpi_handle handle, u32 event, void *data)
{
static struct key_entry *key;
+ u16 count;
/* TODO Find a better way to handle events count. */
if (!hotk)
lcd_blank(FB_BLANK_POWERDOWN);
}
+ count = hotk->event_count[event % 128]++;
+ acpi_bus_generate_proc_event(hotk->device, event, count);
acpi_bus_generate_netlink_event(hotk->device->pnp.device_class,
dev_name(&hotk->device->dev), event,
- hotk->event_count[event % 128]++);
+ count);
if (hotk->inputdev) {
key = asus_get_entry_by_scancode(event);
static void eeepc_hotk_notify(acpi_handle handle, u32 event, void *data)
{
static struct key_entry *key;
+ u16 count;
+
if (!ehotk)
return;
if (event >= NOTIFY_BRN_MIN && event <= NOTIFY_BRN_MAX)
notify_brn();
+ count = ehotk->event_count[event % 128]++;
+ acpi_bus_generate_proc_event(ehotk->device, event, count);
acpi_bus_generate_netlink_event(ehotk->device->pnp.device_class,
dev_name(&ehotk->device->dev), event,
- ehotk->event_count[event % 128]++);
+ count);
if (ehotk->inputdev) {
key = eepc_get_entry_by_scancode(event);
if (key) {
* if it is not there yet.
*/
#define IBM_BIOS_MODULE_ALIAS(__type) \
- MODULE_ALIAS("dmi:bvnIBM:bvr" __type "ET??WW")
+ MODULE_ALIAS("dmi:bvnIBM:bvr" __type "ET??WW*")
/* Non-ancient thinkpads */
MODULE_ALIAS("dmi:bvnIBM:*:svnIBM:*:pvrThinkPad*:rvnIBM:*");
/* Ancient thinkpad BIOSes have to be identified by
* BIOS type or model number, and there are far less
* BIOS types than model numbers... */
-IBM_BIOS_MODULE_ALIAS("I[B,D,H,I,M,N,O,T,W,V,Y,Z]");
-IBM_BIOS_MODULE_ALIAS("1[0,3,6,8,A-G,I,K,M-P,S,T]");
-IBM_BIOS_MODULE_ALIAS("K[U,X-Z]");
+IBM_BIOS_MODULE_ALIAS("I[BDHIMNOTWVYZ]");
+IBM_BIOS_MODULE_ALIAS("1[0368A-GIKM-PST]");
+IBM_BIOS_MODULE_ALIAS("K[UX-Z]");
MODULE_AUTHOR("Borislav Deianov, Henrique de Moraes Holschuh");
MODULE_DESCRIPTION(TPACPI_DESC);
static int __init acpi_wmi_init(void)
{
- acpi_status result;
+ int result;
INIT_LIST_HEAD(&wmi_blocks.list);
MODULE_DESCRIPTION("OPENPROM Configuration Driver");
MODULE_LICENSE("GPL");
MODULE_VERSION("1.0");
+MODULE_ALIAS_MISCDEV(SUN_OPENPROM_MINOR);
/* Private data kept by the driver for each descriptor. */
typedef struct openprom_private_data
static DEFINE_MUTEX(fcoe_transports_lock);
/**
- * fcoe_transport_default - returns ptr to the default transport fcoe_sw
- **/
+ * fcoe_transport_default() - Returns ptr to the default transport fcoe_sw
+ */
struct fcoe_transport *fcoe_transport_default(void)
{
return &fcoe_sw_transport;
}
/**
- * fcoe_transport_to_pcidev - get the pci dev from a netdev
+ * fcoe_transport_to_pcidev() - get the pci dev from a netdev
* @netdev: the netdev that pci dev will be retrived from
*
* Returns: NULL or the corrsponding pci_dev
- **/
+ */
struct pci_dev *fcoe_transport_pcidev(const struct net_device *netdev)
{
if (!netdev->dev.parent)
}
/**
- * fcoe_transport_device_lookup - find out netdev is managed by the
- * transport
- * assign a transport to a device
+ * fcoe_transport_device_lookup() - Lookup a transport
* @netdev: the netdev the transport to be attached to
*
* This will look for existing offload driver, if not found, it falls back to
* the default sw hba (fcoe_sw) as its fcoe transport.
*
* Returns: 0 for success
- **/
-static struct fcoe_transport_internal *fcoe_transport_device_lookup(
- struct fcoe_transport *t, struct net_device *netdev)
+ */
+static struct fcoe_transport_internal *
+fcoe_transport_device_lookup(struct fcoe_transport *t,
+ struct net_device *netdev)
{
struct fcoe_transport_internal *ti;
return NULL;
}
/**
- * fcoe_transport_device_add - assign a transport to a device
+ * fcoe_transport_device_add() - Assign a transport to a device
* @netdev: the netdev the transport to be attached to
*
* This will look for existing offload driver, if not found, it falls back to
* the default sw hba (fcoe_sw) as its fcoe transport.
*
* Returns: 0 for success
- **/
+ */
static int fcoe_transport_device_add(struct fcoe_transport *t,
struct net_device *netdev)
{
}
/**
- * fcoe_transport_device_remove - remove a device from its transport
+ * fcoe_transport_device_remove() - Remove a device from its transport
* @netdev: the netdev the transport to be attached to
*
- * this removes the device from the transport so the given transport will
+ * This removes the device from the transport so the given transport will
* not manage this device any more
*
* Returns: 0 for success
- **/
+ */
static int fcoe_transport_device_remove(struct fcoe_transport *t,
struct net_device *netdev)
{
}
/**
- * fcoe_transport_device_remove_all - remove all from transport devlist
+ * fcoe_transport_device_remove_all() - Remove all from transport devlist
*
- * this removes the device from the transport so the given transport will
+ * This removes the device from the transport so the given transport will
* not manage this device any more
*
* Returns: 0 for success
- **/
+ */
static void fcoe_transport_device_remove_all(struct fcoe_transport *t)
{
struct fcoe_transport_internal *ti, *tmp;
}
/**
- * fcoe_transport_match - use the bus device match function to match the hw
- * @t: the fcoe transport
- * @netdev:
+ * fcoe_transport_match() - Use the bus device match function to match the hw
+ * @t: The fcoe transport to check
+ * @netdev: The netdev to match against
*
- * This function is used to check if the givne transport wants to manage the
+ * This function is used to check if the given transport wants to manage the
* input netdev. if the transports implements the match function, it will be
* called, o.w. we just compare the pci vendor and device id.
*
* Returns: true for match up
- **/
+ */
static bool fcoe_transport_match(struct fcoe_transport *t,
- struct net_device *netdev)
+ struct net_device *netdev)
{
/* match transport by vendor and device id */
struct pci_dev *pci;
}
/**
- * fcoe_transport_lookup - check if the transport is already registered
+ * fcoe_transport_lookup() - Check if the transport is already registered
* @t: the transport to be looked up
*
* This compares the parent device (pci) vendor and device id
*
* Returns: NULL if not found
*
- * TODO - return default sw transport if no other transport is found
- **/
-static struct fcoe_transport *fcoe_transport_lookup(
- struct net_device *netdev)
+ * TODO: return default sw transport if no other transport is found
+ */
+static struct fcoe_transport *
+fcoe_transport_lookup(struct net_device *netdev)
{
struct fcoe_transport *t;
}
/**
- * fcoe_transport_register - adds a fcoe transport to the fcoe transports list
+ * fcoe_transport_register() - Adds a fcoe transport to the fcoe transports list
* @t: ptr to the fcoe transport to be added
*
* Returns: 0 for success
- **/
+ */
int fcoe_transport_register(struct fcoe_transport *t)
{
struct fcoe_transport *tt;
list_add_tail(&t->list, &fcoe_transports);
mutex_unlock(&fcoe_transports_lock);
- mutex_init(&t->devlock);
- INIT_LIST_HEAD(&t->devlist);
-
printk(KERN_DEBUG "fcoe_transport_register:%s\n", t->name);
return 0;
EXPORT_SYMBOL_GPL(fcoe_transport_register);
/**
- * fcoe_transport_unregister - remove the tranport fro the fcoe transports list
+ * fcoe_transport_unregister() - Remove the tranport fro the fcoe transports list
* @t: ptr to the fcoe transport to be removed
*
* Returns: 0 for success
- **/
+ */
int fcoe_transport_unregister(struct fcoe_transport *t)
{
struct fcoe_transport *tt, *tmp;
}
EXPORT_SYMBOL_GPL(fcoe_transport_unregister);
-/*
- * fcoe_load_transport_driver - load an offload driver by alias name
+/**
+ * fcoe_load_transport_driver() - Load an offload driver by alias name
* @netdev: the target net device
*
* Requests for an offload driver module as the fcoe transport, if fails, it
* 3. pure hw fcoe hba may not have netdev
*
* Returns: 0 for success
- **/
+ */
int fcoe_load_transport_driver(struct net_device *netdev)
{
struct pci_dev *pci;
EXPORT_SYMBOL_GPL(fcoe_load_transport_driver);
/**
- * fcoe_transport_attach - load transport to fcoe
+ * fcoe_transport_attach() - Load transport to fcoe
* @netdev: the netdev the transport to be attached to
*
* This will look for existing offload driver, if not found, it falls back to
* the default sw hba (fcoe_sw) as its fcoe transport.
*
* Returns: 0 for success
- **/
+ */
int fcoe_transport_attach(struct net_device *netdev)
{
struct fcoe_transport *t;
EXPORT_SYMBOL_GPL(fcoe_transport_attach);
/**
- * fcoe_transport_release - unload transport from fcoe
+ * fcoe_transport_release() - Unload transport from fcoe
* @netdev: the net device on which fcoe is to be released
*
* Returns: 0 for success
- **/
+ */
int fcoe_transport_release(struct net_device *netdev)
{
struct fcoe_transport *t;
EXPORT_SYMBOL_GPL(fcoe_transport_release);
/**
- * fcoe_transport_init - initializes fcoe transport layer
+ * fcoe_transport_init() - Initializes fcoe transport layer
*
* This prepares for the fcoe transport layer
*
* Returns: none
- **/
+ */
int __init fcoe_transport_init(void)
{
INIT_LIST_HEAD(&fcoe_transports);
}
/**
- * fcoe_transport_exit - cleans up the fcoe transport layer
+ * fcoe_transport_exit() - Cleans up the fcoe transport layer
+ *
* This cleans up the fcoe transport layer. removing any transport on the list,
* note that the transport destroy func is not called here.
*
* Returns: none
- **/
+ */
int __exit fcoe_transport_exit(void)
{
struct fcoe_transport *t, *tmp;
.max_sectors = 0xffff,
};
-/*
- * fcoe_sw_lport_config - sets up the fc_lport
+/**
+ * fcoe_sw_lport_config() - sets up the fc_lport
* @lp: ptr to the fc_lport
* @shost: ptr to the parent scsi host
*
* Returns: 0 for success
- *
*/
static int fcoe_sw_lport_config(struct fc_lport *lp)
{
int i = 0;
- lp->link_status = 0;
+ lp->link_up = 0;
+ lp->qfull = 0;
lp->max_retry_count = 3;
lp->e_d_tov = 2 * 1000; /* FC-FS default */
lp->r_a_tov = 2 * 2 * 1000;
return 0;
}
-/*
- * fcoe_sw_netdev_config - sets up fcoe_softc for lport and network
- * related properties
+/**
+ * fcoe_sw_netdev_config() - Set up netdev for SW FCoE
* @lp : ptr to the fc_lport
* @netdev : ptr to the associated netdevice struct
*
* Must be called after fcoe_sw_lport_config() as it will use lport mutex
*
* Returns : 0 for success
- *
*/
static int fcoe_sw_netdev_config(struct fc_lport *lp, struct net_device *netdev)
{
if (fc_set_mfs(lp, mfs))
return -EINVAL;
- lp->link_status = ~FC_PAUSE & ~FC_LINK_UP;
if (!fcoe_link_ok(lp))
- lp->link_status |= FC_LINK_UP;
+ lp->link_up = 1;
/* offload features support */
if (fc->real_dev->features & NETIF_F_SG)
skb_queue_head_init(&fc->fcoe_pending_queue);
+ fc->fcoe_pending_queue_active = 0;
/* setup Source Mac Address */
memcpy(fc->ctl_src_addr, fc->real_dev->dev_addr,
return 0;
}
-/*
- * fcoe_sw_shost_config - sets up fc_lport->host
+/**
+ * fcoe_sw_shost_config() - Sets up fc_lport->host
* @lp : ptr to the fc_lport
* @shost : ptr to the associated scsi host
* @dev : device associated to scsi host
*
- * Must be called after fcoe_sw_lport_config) and fcoe_sw_netdev_config()
+ * Must be called after fcoe_sw_lport_config() and fcoe_sw_netdev_config()
*
* Returns : 0 for success
- *
*/
static int fcoe_sw_shost_config(struct fc_lport *lp, struct Scsi_Host *shost,
struct device *dev)
return 0;
}
-/*
- * fcoe_sw_em_config - allocates em for this lport
+/**
+ * fcoe_sw_em_config() - allocates em for this lport
* @lp: the port that em is to allocated for
*
* Returns : 0 on success
return 0;
}
-/*
- * fcoe_sw_destroy - FCoE software HBA tear-down function
+/**
+ * fcoe_sw_destroy() - FCoE software HBA tear-down function
* @netdev: ptr to the associated net_device
*
* Returns: 0 if link is OK for use by FCoE.
if (!lp)
return -ENODEV;
- fc = fcoe_softc(lp);
+ fc = lport_priv(lp);
/* Logout of the fabric */
fc_fabric_logoff(lp);
.frame_send = fcoe_xmit,
};
-/*
- * fcoe_sw_create - this function creates the fcoe interface
+/**
+ * fcoe_sw_create() - this function creates the fcoe interface
* @netdev: pointer the associated netdevice
*
* Creates fc_lport struct and scsi_host for lport, configures lport
return rc;
}
-/*
- * fcoe_sw_match - the fcoe sw transport match function
+/**
+ * fcoe_sw_match() - The FCoE SW transport match function
*
* Returns : false always
*/
.device = 0xffff,
};
-/*
- * fcoe_sw_init - registers fcoe_sw_transport
+/**
+ * fcoe_sw_init() - Registers fcoe_sw_transport
*
* Returns : 0 on success
*/
/* attach to scsi transport */
scsi_transport_fcoe_sw =
fc_attach_transport(&fcoe_sw_transport_function);
+
if (!scsi_transport_fcoe_sw) {
printk(KERN_ERR "fcoe_sw_init:fc_attach_transport() failed\n");
return -ENODEV;
}
+
+ mutex_init(&fcoe_sw_transport.devlock);
+ INIT_LIST_HEAD(&fcoe_sw_transport.devlist);
+
/* register sw transport */
fcoe_transport_register(&fcoe_sw_transport);
return 0;
}
-/*
- * fcoe_sw_exit - unregisters fcoe_sw_transport
+/**
+ * fcoe_sw_exit() - Unregisters fcoe_sw_transport
*
* Returns : 0 on success
*/
static int debug_fcoe;
#define FCOE_MAX_QUEUE_DEPTH 256
+#define FCOE_LOW_QUEUE_DEPTH 32
/* destination address mode */
#define FCOE_GW_ADDR_MODE 0x00
/* Function Prototyes */
static int fcoe_check_wait_queue(struct fc_lport *);
-static void fcoe_insert_wait_queue_head(struct fc_lport *, struct sk_buff *);
-static void fcoe_insert_wait_queue(struct fc_lport *, struct sk_buff *);
static void fcoe_recv_flogi(struct fcoe_softc *, struct fc_frame *, u8 *);
#ifdef CONFIG_HOTPLUG_CPU
static int fcoe_cpu_callback(struct notifier_block *, ulong, void *);
};
/**
- * fcoe_create_percpu_data - creates the associated cpu data
+ * fcoe_create_percpu_data() - creates the associated cpu data
* @cpu: index for the cpu where fcoe cpu data will be created
*
* create percpu stats block, from cpu add notifier
*
* Returns: none
- **/
+ */
static void fcoe_create_percpu_data(int cpu)
{
struct fc_lport *lp;
}
/**
- * fcoe_destroy_percpu_data - destroys the associated cpu data
+ * fcoe_destroy_percpu_data() - destroys the associated cpu data
* @cpu: index for the cpu where fcoe cpu data will destroyed
*
* destroy percpu stats block called by cpu add/remove notifier
*
* Retuns: none
- **/
+ */
static void fcoe_destroy_percpu_data(int cpu)
{
struct fc_lport *lp;
}
/**
- * fcoe_cpu_callback - fcoe cpu hotplug event callback
+ * fcoe_cpu_callback() - fcoe cpu hotplug event callback
* @nfb: callback data block
* @action: event triggering the callback
* @hcpu: index for the cpu of this event
* this creates or destroys per cpu data for fcoe
*
* Returns NOTIFY_OK always.
- **/
+ */
static int fcoe_cpu_callback(struct notifier_block *nfb, unsigned long action,
void *hcpu)
{
#endif /* CONFIG_HOTPLUG_CPU */
/**
- * fcoe_rcv - this is the fcoe receive function called by NET_RX_SOFTIRQ
+ * fcoe_rcv() - this is the fcoe receive function called by NET_RX_SOFTIRQ
* @skb: the receive skb
* @dev: associated net device
* @ptype: context
* this function will receive the packet and build fc frame and pass it up
*
* Returns: 0 for success
- **/
+ */
int fcoe_rcv(struct sk_buff *skb, struct net_device *dev,
struct packet_type *ptype, struct net_device *olddev)
{
EXPORT_SYMBOL_GPL(fcoe_rcv);
/**
- * fcoe_start_io - pass to netdev to start xmit for fcoe
+ * fcoe_start_io() - pass to netdev to start xmit for fcoe
* @skb: the skb to be xmitted
*
* Returns: 0 for success
- **/
+ */
static inline int fcoe_start_io(struct sk_buff *skb)
{
int rc;
}
/**
- * fcoe_get_paged_crc_eof - in case we need alloc a page for crc_eof
+ * fcoe_get_paged_crc_eof() - in case we need alloc a page for crc_eof
* @skb: the skb to be xmitted
* @tlen: total len
*
* Returns: 0 for success
- **/
+ */
static int fcoe_get_paged_crc_eof(struct sk_buff *skb, int tlen)
{
struct fcoe_percpu_s *fps;
}
/**
- * fcoe_fc_crc - calculates FC CRC in this fcoe skb
+ * fcoe_fc_crc() - calculates FC CRC in this fcoe skb
* @fp: the fc_frame containg data to be checksummed
*
* This uses crc32() to calculate the crc for fc frame
* Return : 32 bit crc
- *
- **/
+ */
u32 fcoe_fc_crc(struct fc_frame *fp)
{
struct sk_buff *skb = fp_skb(fp);
EXPORT_SYMBOL_GPL(fcoe_fc_crc);
/**
- * fcoe_xmit - FCoE frame transmit function
+ * fcoe_xmit() - FCoE frame transmit function
* @lp: the associated local port
* @fp: the fc_frame to be transmitted
*
* Return : 0 for success
- *
- **/
+ */
int fcoe_xmit(struct fc_lport *lp, struct fc_frame *fp)
{
int wlen, rc = 0;
WARN_ON((fr_len(fp) % sizeof(u32)) != 0);
- fc = fcoe_softc(lp);
+ fc = lport_priv(lp);
/*
* if it is a flogi then we need to learn gw-addr
* and my own fcid
if (skb_is_nonlinear(skb)) {
skb_frag_t *frag;
if (fcoe_get_paged_crc_eof(skb, tlen)) {
- kfree(skb);
+ kfree_skb(skb);
return -ENOMEM;
}
frag = &skb_shinfo(skb)->frags[skb_shinfo(skb)->nr_frags - 1];
rc = fcoe_start_io(skb);
if (rc) {
- fcoe_insert_wait_queue(lp, skb);
+ spin_lock_bh(&fc->fcoe_pending_queue.lock);
+ __skb_queue_tail(&fc->fcoe_pending_queue, skb);
+ spin_unlock_bh(&fc->fcoe_pending_queue.lock);
if (fc->fcoe_pending_queue.qlen > FCOE_MAX_QUEUE_DEPTH)
- fc_pause(lp);
+ lp->qfull = 1;
}
return 0;
}
EXPORT_SYMBOL_GPL(fcoe_xmit);
-/*
- * fcoe_percpu_receive_thread - recv thread per cpu
+/**
+ * fcoe_percpu_receive_thread() - recv thread per cpu
* @arg: ptr to the fcoe per cpu struct
*
* Return: 0 for success
- *
*/
int fcoe_percpu_receive_thread(void *arg)
{
struct fcoe_softc *fc;
struct fcoe_hdr *hp;
- set_user_nice(current, 19);
+ set_user_nice(current, -20);
while (!kthread_should_stop()) {
}
/**
- * fcoe_recv_flogi - flogi receive function
+ * fcoe_recv_flogi() - flogi receive function
* @fc: associated fcoe_softc
* @fp: the recieved frame
* @sa: the source address of this flogi
* mac address for the initiator, eitehr OUI based or GW based.
*
* Returns: none
- **/
+ */
static void fcoe_recv_flogi(struct fcoe_softc *fc, struct fc_frame *fp, u8 *sa)
{
struct fc_frame_header *fh;
}
/**
- * fcoe_watchdog - fcoe timer callback
+ * fcoe_watchdog() - fcoe timer callback
* @vp:
*
- * This checks the pending queue length for fcoe and put fcoe to be paused state
+ * This checks the pending queue length for fcoe and set lport qfull
* if the FCOE_MAX_QUEUE_DEPTH is reached. This is done for all fc_lport on the
* fcoe_hostlist.
*
* Returns: 0 for success
- **/
+ */
void fcoe_watchdog(ulong vp)
{
- struct fc_lport *lp;
struct fcoe_softc *fc;
- int paused = 0;
read_lock(&fcoe_hostlist_lock);
list_for_each_entry(fc, &fcoe_hostlist, list) {
- lp = fc->lp;
- if (lp) {
- if (fc->fcoe_pending_queue.qlen > FCOE_MAX_QUEUE_DEPTH)
- paused = 1;
- if (fcoe_check_wait_queue(lp) < FCOE_MAX_QUEUE_DEPTH) {
- if (paused)
- fc_unpause(lp);
- }
- }
+ if (fc->lp)
+ fcoe_check_wait_queue(fc->lp);
}
read_unlock(&fcoe_hostlist_lock);
/**
- * fcoe_check_wait_queue - put the skb into fcoe pending xmit queue
+ * fcoe_check_wait_queue() - put the skb into fcoe pending xmit queue
* @lp: the fc_port for this skb
* @skb: the associated skb to be xmitted
*
* This empties the wait_queue, dequeue the head of the wait_queue queue
* and calls fcoe_start_io() for each packet, if all skb have been
- * transmitted, return 0 if a error occurs, then restore wait_queue and
- * try again later.
+ * transmitted, return qlen or -1 if a error occurs, then restore
+ * wait_queue and try again later.
*
* The wait_queue is used when the skb transmit fails. skb will go
* in the wait_queue which will be emptied by the time function OR
* by the next skb transmit.
*
* Returns: 0 for success
- **/
+ */
static int fcoe_check_wait_queue(struct fc_lport *lp)
{
- int rc, unpause = 0;
- int paused = 0;
+ struct fcoe_softc *fc = lport_priv(lp);
struct sk_buff *skb;
- struct fcoe_softc *fc;
+ int rc = -1;
- fc = fcoe_softc(lp);
spin_lock_bh(&fc->fcoe_pending_queue.lock);
+ if (fc->fcoe_pending_queue_active)
+ goto out;
+ fc->fcoe_pending_queue_active = 1;
- /*
- * is this interface paused?
- */
- if (fc->fcoe_pending_queue.qlen > FCOE_MAX_QUEUE_DEPTH)
- paused = 1;
- if (fc->fcoe_pending_queue.qlen) {
- while ((skb = __skb_dequeue(&fc->fcoe_pending_queue)) != NULL) {
- spin_unlock_bh(&fc->fcoe_pending_queue.lock);
- rc = fcoe_start_io(skb);
- if (rc) {
- fcoe_insert_wait_queue_head(lp, skb);
- return rc;
- }
- spin_lock_bh(&fc->fcoe_pending_queue.lock);
- }
- if (fc->fcoe_pending_queue.qlen < FCOE_MAX_QUEUE_DEPTH)
- unpause = 1;
- }
- spin_unlock_bh(&fc->fcoe_pending_queue.lock);
- if ((unpause) && (paused))
- fc_unpause(lp);
- return fc->fcoe_pending_queue.qlen;
-}
-
-/**
- * fcoe_insert_wait_queue_head - puts skb to fcoe pending queue head
- * @lp: the fc_port for this skb
- * @skb: the associated skb to be xmitted
- *
- * Returns: none
- **/
-static void fcoe_insert_wait_queue_head(struct fc_lport *lp,
- struct sk_buff *skb)
-{
- struct fcoe_softc *fc;
+ while (fc->fcoe_pending_queue.qlen) {
+ /* keep qlen > 0 until fcoe_start_io succeeds */
+ fc->fcoe_pending_queue.qlen++;
+ skb = __skb_dequeue(&fc->fcoe_pending_queue);
- fc = fcoe_softc(lp);
- spin_lock_bh(&fc->fcoe_pending_queue.lock);
- __skb_queue_head(&fc->fcoe_pending_queue, skb);
- spin_unlock_bh(&fc->fcoe_pending_queue.lock);
-}
+ spin_unlock_bh(&fc->fcoe_pending_queue.lock);
+ rc = fcoe_start_io(skb);
+ spin_lock_bh(&fc->fcoe_pending_queue.lock);
-/**
- * fcoe_insert_wait_queue - put the skb into fcoe pending queue tail
- * @lp: the fc_port for this skb
- * @skb: the associated skb to be xmitted
- *
- * Returns: none
- **/
-static void fcoe_insert_wait_queue(struct fc_lport *lp,
- struct sk_buff *skb)
-{
- struct fcoe_softc *fc;
+ if (rc) {
+ __skb_queue_head(&fc->fcoe_pending_queue, skb);
+ /* undo temporary increment above */
+ fc->fcoe_pending_queue.qlen--;
+ break;
+ }
+ /* undo temporary increment above */
+ fc->fcoe_pending_queue.qlen--;
+ }
- fc = fcoe_softc(lp);
- spin_lock_bh(&fc->fcoe_pending_queue.lock);
- __skb_queue_tail(&fc->fcoe_pending_queue, skb);
+ if (fc->fcoe_pending_queue.qlen < FCOE_LOW_QUEUE_DEPTH)
+ lp->qfull = 0;
+ fc->fcoe_pending_queue_active = 0;
+ rc = fc->fcoe_pending_queue.qlen;
+out:
spin_unlock_bh(&fc->fcoe_pending_queue.lock);
+ return rc;
}
/**
- * fcoe_dev_setup - setup link change notification interface
- *
- **/
-static void fcoe_dev_setup(void)
+ * fcoe_dev_setup() - setup link change notification interface
+ */
+static void fcoe_dev_setup()
{
/*
* here setup a interface specific wd time to
}
/**
- * fcoe_dev_setup - cleanup link change notification interface
- **/
+ * fcoe_dev_setup() - cleanup link change notification interface
+ */
static void fcoe_dev_cleanup(void)
{
unregister_netdevice_notifier(&fcoe_notifier);
}
/**
- * fcoe_device_notification - netdev event notification callback
+ * fcoe_device_notification() - netdev event notification callback
* @notifier: context of the notification
* @event: type of event
* @ptr: fixed array for output parsed ifname
* This function is called by the ethernet driver in case of link change event
*
* Returns: 0 for success
- **/
+ */
static int fcoe_device_notification(struct notifier_block *notifier,
ulong event, void *ptr)
{
struct net_device *real_dev = ptr;
struct fcoe_softc *fc;
struct fcoe_dev_stats *stats;
- u16 new_status;
+ u32 new_link_up;
u32 mfs;
int rc = NOTIFY_OK;
goto out;
}
- new_status = lp->link_status;
+ new_link_up = lp->link_up;
switch (event) {
case NETDEV_DOWN:
case NETDEV_GOING_DOWN:
- new_status &= ~FC_LINK_UP;
+ new_link_up = 0;
break;
case NETDEV_UP:
case NETDEV_CHANGE:
- new_status &= ~FC_LINK_UP;
- if (!fcoe_link_ok(lp))
- new_status |= FC_LINK_UP;
+ new_link_up = !fcoe_link_ok(lp);
break;
case NETDEV_CHANGEMTU:
mfs = fc->real_dev->mtu -
sizeof(struct fcoe_crc_eof));
if (mfs >= FC_MIN_MAX_FRAME)
fc_set_mfs(lp, mfs);
- new_status &= ~FC_LINK_UP;
- if (!fcoe_link_ok(lp))
- new_status |= FC_LINK_UP;
+ new_link_up = !fcoe_link_ok(lp);
break;
case NETDEV_REGISTER:
break;
default:
FC_DBG("unknown event %ld call", event);
}
- if (lp->link_status != new_status) {
- if ((new_status & FC_LINK_UP) == FC_LINK_UP)
+ if (lp->link_up != new_link_up) {
+ if (new_link_up)
fc_linkup(lp);
else {
stats = lp->dev_stats[smp_processor_id()];
}
/**
- * fcoe_if_to_netdev - parse a name buffer to get netdev
+ * fcoe_if_to_netdev() - parse a name buffer to get netdev
* @ifname: fixed array for output parsed ifname
* @buffer: incoming buffer to be copied
*
* Returns: NULL or ptr to netdeive
- **/
+ */
static struct net_device *fcoe_if_to_netdev(const char *buffer)
{
char *cp;
}
/**
- * fcoe_netdev_to_module_owner - finds out the nic drive moddule of the netdev
+ * fcoe_netdev_to_module_owner() - finds out the nic drive moddule of the netdev
* @netdev: the target netdev
*
* Returns: ptr to the struct module, NULL for failure
- **/
-static struct module *fcoe_netdev_to_module_owner(
- const struct net_device *netdev)
+ */
+static struct module *
+fcoe_netdev_to_module_owner(const struct net_device *netdev)
{
struct device *dev;
}
/**
- * fcoe_ethdrv_get - holds the nic driver module by try_module_get() for
- * the corresponding netdev.
+ * fcoe_ethdrv_get() - Hold the Ethernet driver
* @netdev: the target netdev
*
+ * Holds the Ethernet driver module by try_module_get() for
+ * the corresponding netdev.
+ *
* Returns: 0 for succsss
- **/
+ */
static int fcoe_ethdrv_get(const struct net_device *netdev)
{
struct module *owner;
}
/**
- * fcoe_ethdrv_get - releases the nic driver module by module_put for
- * the corresponding netdev.
+ * fcoe_ethdrv_put() - Release the Ethernet driver
* @netdev: the target netdev
*
+ * Releases the Ethernet driver module by module_put for
+ * the corresponding netdev.
+ *
* Returns: 0 for succsss
- **/
+ */
static int fcoe_ethdrv_put(const struct net_device *netdev)
{
struct module *owner;
}
/**
- * fcoe_destroy- handles the destroy from sysfs
+ * fcoe_destroy() - handles the destroy from sysfs
* @buffer: expcted to be a eth if name
* @kp: associated kernel param
*
* Returns: 0 for success
- **/
+ */
static int fcoe_destroy(const char *buffer, struct kernel_param *kp)
{
int rc;
}
/**
- * fcoe_create - handles the create call from sysfs
+ * fcoe_create() - Handles the create call from sysfs
* @buffer: expcted to be a eth if name
* @kp: associated kernel param
*
* Returns: 0 for success
- **/
+ */
static int fcoe_create(const char *buffer, struct kernel_param *kp)
{
int rc;
__MODULE_PARM_TYPE(destroy, "string");
MODULE_PARM_DESC(destroy, "Destroy fcoe port");
-/*
- * fcoe_link_ok - check if link is ok for the fc_lport
+/**
+ * fcoe_link_ok() - Check if link is ok for the fc_lport
* @lp: ptr to the fc_lport
*
* Any permanently-disqualifying conditions have been previously checked.
*/
int fcoe_link_ok(struct fc_lport *lp)
{
- struct fcoe_softc *fc = fcoe_softc(lp);
+ struct fcoe_softc *fc = lport_priv(lp);
struct net_device *dev = fc->real_dev;
struct ethtool_cmd ecmd = { ETHTOOL_GSET };
int rc = 0;
}
EXPORT_SYMBOL_GPL(fcoe_link_ok);
-/*
- * fcoe_percpu_clean - frees skb of the corresponding lport from the per
- * cpu queue.
+/**
+ * fcoe_percpu_clean() - Clear the pending skbs for an lport
* @lp: the fc_lport
*/
void fcoe_percpu_clean(struct fc_lport *lp)
EXPORT_SYMBOL_GPL(fcoe_percpu_clean);
/**
- * fcoe_clean_pending_queue - dequeue skb and free it
+ * fcoe_clean_pending_queue() - Dequeue a skb and free it
* @lp: the corresponding fc_lport
*
* Returns: none
- **/
+ */
void fcoe_clean_pending_queue(struct fc_lport *lp)
{
struct fcoe_softc *fc = lport_priv(lp);
EXPORT_SYMBOL_GPL(fcoe_clean_pending_queue);
/**
- * libfc_host_alloc - allocate a Scsi_Host with room for the fc_lport
+ * libfc_host_alloc() - Allocate a Scsi_Host with room for the fc_lport
* @sht: ptr to the scsi host templ
* @priv_size: size of private data after fc_lport
*
* Returns: ptr to Scsi_Host
- * TODO - to libfc?
+ * TODO: to libfc?
*/
-static inline struct Scsi_Host *libfc_host_alloc(
- struct scsi_host_template *sht, int priv_size)
+static inline struct Scsi_Host *
+libfc_host_alloc(struct scsi_host_template *sht, int priv_size)
{
return scsi_host_alloc(sht, sizeof(struct fc_lport) + priv_size);
}
/**
- * fcoe_host_alloc - allocate a Scsi_Host with room for the fcoe_softc
+ * fcoe_host_alloc() - Allocate a Scsi_Host with room for the fcoe_softc
* @sht: ptr to the scsi host templ
* @priv_size: size of private data after fc_lport
*
}
EXPORT_SYMBOL_GPL(fcoe_host_alloc);
-/*
- * fcoe_reset - resets the fcoe
+/**
+ * fcoe_reset() - Resets the fcoe
* @shost: shost the reset is from
*
* Returns: always 0
}
EXPORT_SYMBOL_GPL(fcoe_reset);
-/*
- * fcoe_wwn_from_mac - converts 48-bit IEEE MAC address to 64-bit FC WWN.
+/**
+ * fcoe_wwn_from_mac() - Converts 48-bit IEEE MAC address to 64-bit FC WWN.
* @mac: mac address
* @scheme: check port
* @port: port indicator for converting
return wwn;
}
EXPORT_SYMBOL_GPL(fcoe_wwn_from_mac);
-/*
- * fcoe_hostlist_lookup_softc - find the corresponding lport by a given device
+
+/**
+ * fcoe_hostlist_lookup_softc() - find the corresponding lport by a given device
* @device: this is currently ptr to net_device
*
* Returns: NULL or the located fcoe_softc
*/
-static struct fcoe_softc *fcoe_hostlist_lookup_softc(
- const struct net_device *dev)
+static struct fcoe_softc *
+fcoe_hostlist_lookup_softc(const struct net_device *dev)
{
struct fcoe_softc *fc;
return NULL;
}
-/*
- * fcoe_hostlist_lookup - find the corresponding lport by netdev
+/**
+ * fcoe_hostlist_lookup() - Find the corresponding lport by netdev
* @netdev: ptr to net_device
*
* Returns: 0 for success
}
EXPORT_SYMBOL_GPL(fcoe_hostlist_lookup);
-/*
- * fcoe_hostlist_add - add a lport to lports list
+/**
+ * fcoe_hostlist_add() - Add a lport to lports list
* @lp: ptr to the fc_lport to badded
*
* Returns: 0 for success
fc = fcoe_hostlist_lookup_softc(fcoe_netdev(lp));
if (!fc) {
- fc = fcoe_softc(lp);
+ fc = lport_priv(lp);
write_lock_bh(&fcoe_hostlist_lock);
list_add_tail(&fc->list, &fcoe_hostlist);
write_unlock_bh(&fcoe_hostlist_lock);
}
EXPORT_SYMBOL_GPL(fcoe_hostlist_add);
-/*
- * fcoe_hostlist_remove - remove a lport from lports list
+/**
+ * fcoe_hostlist_remove() - remove a lport from lports list
* @lp: ptr to the fc_lport to badded
*
* Returns: 0 for success
EXPORT_SYMBOL_GPL(fcoe_hostlist_remove);
/**
- * fcoe_libfc_config - sets up libfc related properties for lport
+ * fcoe_libfc_config() - sets up libfc related properties for lport
* @lp: ptr to the fc_lport
* @tt: libfc function template
*
* Returns : 0 for success
- **/
+ */
int fcoe_libfc_config(struct fc_lport *lp, struct libfc_function_template *tt)
{
/* Set the function pointers set by the LLDD */
EXPORT_SYMBOL_GPL(fcoe_libfc_config);
/**
- * fcoe_init - fcoe module loading initialization
+ * fcoe_init() - fcoe module loading initialization
*
* Initialization routine
* 1. Will create fc transport software structure
* 2. initialize the link list of port information structure
*
* Returns 0 on success, negative on failure
- **/
+ */
static int __init fcoe_init(void)
{
int cpu;
} else {
fcoe_percpu[cpu] = NULL;
kfree(p);
-
}
}
}
*/
fcoe_dev_setup();
- init_timer(&fcoe_timer);
- fcoe_timer.data = 0;
- fcoe_timer.function = fcoe_watchdog;
- fcoe_timer.expires = (jiffies + (10 * HZ));
- add_timer(&fcoe_timer);
+ setup_timer(&fcoe_timer, fcoe_watchdog, 0);
+
+ mod_timer(&fcoe_timer, jiffies + (10 * HZ));
/* initiatlize the fcoe transport */
fcoe_transport_init();
module_init(fcoe_init);
/**
- * fcoe_exit - fcoe module unloading cleanup
+ * fcoe_exit() - fcoe module unloading cleanup
*
* Returns 0 on success, negative on failure
- **/
+ */
static void __exit fcoe_exit(void)
{
u32 idx;
*/
del_timer_sync(&fcoe_timer);
- /* releases the assocaited fcoe transport for each lport */
+ /* releases the associated fcoe transport for each lport */
list_for_each_entry_safe(fc, tmp, &fcoe_hostlist, list)
fcoe_transport_release(fc->real_dev);
hostdata = kzalloc(sizeof(*hostdata), GFP_KERNEL);
if (!hostdata) {
- dev_printk(KERN_ERR, dev, "Failed to allocate host data\n");
+ dev_printk(KERN_ERR, &dev->dev, "Failed to allocate host data\n");
return -ENOMEM;
}
static void fc_disc_restart(struct fc_disc *);
/**
- * fc_disc_lookup_rport - lookup a remote port by port_id
+ * fc_disc_lookup_rport() - lookup a remote port by port_id
* @lport: Fibre Channel host port instance
* @port_id: remote port port_id to match
*/
}
/**
- * fc_disc_stop_rports - delete all the remote ports associated with the lport
+ * fc_disc_stop_rports() - delete all the remote ports associated with the lport
* @disc: The discovery job to stop rports on
*
* Locking Note: This function expects that the lport mutex is locked before
}
/**
- * fc_disc_rport_callback - Event handler for rport events
+ * fc_disc_rport_callback() - Event handler for rport events
* @lport: The lport which is receiving the event
* @rport: The rport which the event has occured on
* @event: The event that occured
}
/**
- * fc_disc_recv_rscn_req - Handle Registered State Change Notification (RSCN)
+ * fc_disc_recv_rscn_req() - Handle Registered State Change Notification (RSCN)
* @sp: Current sequence of the RSCN exchange
* @fp: RSCN Frame
* @lport: Fibre Channel host port instance
list_del(&dp->peers);
rport = lport->tt.rport_lookup(lport, dp->ids.port_id);
if (rport) {
- rdata = RPORT_TO_PRIV(rport);
+ rdata = rport->dd_data;
list_del(&rdata->peers);
lport->tt.rport_logoff(rport);
}
}
/**
- * fc_disc_recv_req - Handle incoming requests
+ * fc_disc_recv_req() - Handle incoming requests
* @sp: Current sequence of the request exchange
* @fp: The frame
* @lport: The FC local port
}
/**
- * fc_disc_restart - Restart discovery
+ * fc_disc_restart() - Restart discovery
* @lport: FC discovery context
*
* Locking Note: This function expects that the disc mutex
}
/**
- * fc_disc_start - Fibre Channel Target discovery
+ * fc_disc_start() - Fibre Channel Target discovery
* @lport: FC local port
*
* Returns non-zero if discovery cannot be started.
};
/**
- * fc_disc_new_target - Handle new target found by discovery
+ * fc_disc_new_target() - Handle new target found by discovery
* @lport: FC local port
* @rport: The previous FC remote port (NULL if new remote port)
* @ids: Identifiers for the new FC remote port
struct fc_rport_identifiers *ids)
{
struct fc_lport *lport = disc->lport;
- struct fc_rport_libfc_priv *rp;
+ struct fc_rport_libfc_priv *rdata;
int error = 0;
if (rport && ids->port_name) {
dp.ids.port_name = ids->port_name;
dp.ids.node_name = ids->node_name;
dp.ids.roles = ids->roles;
- rport = fc_rport_rogue_create(&dp);
+ rport = lport->tt.rport_create(&dp);
}
if (!rport)
error = -ENOMEM;
}
if (rport) {
- rp = rport->dd_data;
- rp->ops = &fc_disc_rport_ops;
- rp->rp_state = RPORT_ST_INIT;
+ rdata = rport->dd_data;
+ rdata->ops = &fc_disc_rport_ops;
+ rdata->rp_state = RPORT_ST_INIT;
lport->tt.rport_login(rport);
}
}
}
/**
- * fc_disc_del_target - Delete a target
+ * fc_disc_del_target() - Delete a target
* @disc: FC discovery context
* @rport: The remote port to be removed
*/
static void fc_disc_del_target(struct fc_disc *disc, struct fc_rport *rport)
{
struct fc_lport *lport = disc->lport;
- struct fc_rport_libfc_priv *rdata = RPORT_TO_PRIV(rport);
+ struct fc_rport_libfc_priv *rdata = rport->dd_data;
list_del(&rdata->peers);
lport->tt.rport_logoff(rport);
}
/**
- * fc_disc_done - Discovery has been completed
+ * fc_disc_done() - Discovery has been completed
* @disc: FC discovery context
*/
static void fc_disc_done(struct fc_disc *disc)
}
/**
- * fc_disc_error - Handle error on dNS request
+ * fc_disc_error() - Handle error on dNS request
* @disc: FC discovery context
* @fp: The frame pointer
*/
}
/**
- * fc_disc_gpn_ft_req - Send Get Port Names by FC-4 type (GPN_FT) request
+ * fc_disc_gpn_ft_req() - Send Get Port Names by FC-4 type (GPN_FT) request
* @lport: FC discovery context
*
* Locking Note: This function expects that the disc_mutex is locked
}
/**
- * fc_disc_gpn_ft_parse - Parse the list of IDs and names resulting from a request
+ * fc_disc_gpn_ft_parse() - Parse the list of IDs and names resulting from a request
* @lport: Fibre Channel host port instance
* @buf: GPN_FT response buffer
* @len: size of response buffer
if ((dp.ids.port_id != fc_host_port_id(lport->host)) &&
(dp.ids.port_name != lport->wwpn)) {
- rport = fc_rport_rogue_create(&dp);
+ rport = lport->tt.rport_create(&dp);
if (rport) {
rdata = rport->dd_data;
rdata->ops = &fc_disc_rport_ops;
return error;
}
-/*
+/**
+ * fc_disc_timeout() - Retry handler for the disc component
+ * @work: Structure holding disc obj that needs retry discovery
+ *
* Handle retry of memory allocation for remote ports.
*/
static void fc_disc_timeout(struct work_struct *work)
}
/**
- * fc_disc_gpn_ft_resp - Handle a response frame from Get Port Names (GPN_FT)
+ * fc_disc_gpn_ft_resp() - Handle a response frame from Get Port Names (GPN_FT)
* @sp: Current sequence of GPN_FT exchange
* @fp: response frame
* @lp_arg: Fibre Channel host port instance
fr_len(fp));
} else if (ntohs(cp->ct_cmd) == FC_FS_ACC) {
- /*
- * Accepted. Parse response.
- */
+ /* Accepted, parse the response. */
buf = cp + 1;
len -= sizeof(*cp);
} else if (ntohs(cp->ct_cmd) == FC_FS_RJT) {
}
/**
- * fc_disc_single - Discover the directory information for a single target
+ * fc_disc_single() - Discover the directory information for a single target
* @lport: FC local port
* @dp: The port to rediscover
*
if (rport)
fc_disc_del_target(disc, rport);
- new_rport = fc_rport_rogue_create(dp);
+ new_rport = lport->tt.rport_create(dp);
if (new_rport) {
rdata = new_rport->dd_data;
rdata->ops = &fc_disc_rport_ops;
}
/**
- * fc_disc_stop - Stop discovery for a given lport
+ * fc_disc_stop() - Stop discovery for a given lport
* @lport: The lport that discovery should stop for
*/
void fc_disc_stop(struct fc_lport *lport)
}
/**
- * fc_disc_stop_final - Stop discovery for a given lport
+ * fc_disc_stop_final() - Stop discovery for a given lport
* @lport: The lport that discovery should stop for
*
* This function will block until discovery has been
}
/**
- * fc_disc_init - Initialize the discovery block
+ * fc_disc_init() - Initialize the discovery block
* @lport: FC local port
*/
int fc_disc_init(struct fc_lport *lport)
#include <scsi/libfc.h>
#include <scsi/fc_encode.h>
-#define FC_DEF_R_A_TOV (10 * 1000) /* resource allocation timeout */
-
/*
* fc_exch_debug can be set in debugger or at compile time to get more logs.
*/
{
struct fc_exch *ep;
struct fc_frame_header *fh;
- u16 rxid;
ep = mp->lp->tt.exch_get(mp->lp, fp);
if (ep) {
if ((ntoh24(fh->fh_f_ctl) & FC_FC_SEQ_INIT) == 0)
ep->esb_stat &= ~ESB_ST_SEQ_INIT;
- /*
- * Set the responder ID in the frame header.
- * The old one should've been 0xffff.
- * If it isn't, don't assign one.
- * Incoming basic link service frames may specify
- * a referenced RX_ID.
- */
- if (fh->fh_type != FC_TYPE_BLS) {
- rxid = ntohs(fh->fh_rx_id);
- WARN_ON(rxid != FC_XID_UNKNOWN);
- fh->fh_rx_id = htons(ep->rxid);
- }
fc_exch_hold(ep); /* hold for caller */
spin_unlock_bh(&ep->ex_lock); /* lock from exch_get */
}
* If fc_pf_rjt_reason is FC_RJT_NONE then this function will have a hold
* on the ep that should be released by the caller.
*/
-static enum fc_pf_rjt_reason
-fc_seq_lookup_recip(struct fc_exch_mgr *mp, struct fc_frame *fp)
+static enum fc_pf_rjt_reason fc_seq_lookup_recip(struct fc_exch_mgr *mp,
+ struct fc_frame *fp)
{
struct fc_frame_header *fh = fc_frame_header_get(fp);
struct fc_exch *ep = NULL;
* Send BLS Reject.
* This is for rejecting BA_ABTS only.
*/
-static void
-fc_exch_send_ba_rjt(struct fc_frame *rx_fp, enum fc_ba_rjt_reason reason,
- enum fc_ba_rjt_explan explan)
+static void fc_exch_send_ba_rjt(struct fc_frame *rx_fp,
+ enum fc_ba_rjt_reason reason,
+ enum fc_ba_rjt_explan explan)
{
struct fc_frame *fp;
struct fc_frame_header *rx_fh;
ap->ba_high_seq_cnt = fh->fh_seq_cnt;
ap->ba_low_seq_cnt = htons(sp->cnt);
}
- sp = fc_seq_start_next(sp);
+ sp = fc_seq_start_next_locked(sp);
spin_unlock_bh(&ep->ex_lock);
fc_seq_send_last(sp, fp, FC_RCTL_BA_ACC, FC_TYPE_BLS);
fc_frame_free(rx_fp);
* If sid is non-zero, reset only exchanges we source from that FID.
* If did is non-zero, reset only exchanges destined to that FID.
*/
-void fc_exch_mgr_reset(struct fc_exch_mgr *mp, u32 sid, u32 did)
+void fc_exch_mgr_reset(struct fc_lport *lp, u32 sid, u32 did)
{
struct fc_exch *ep;
struct fc_exch *next;
+ struct fc_exch_mgr *mp = lp->emp;
spin_lock_bh(&mp->em_lock);
restart:
if (IS_ERR(fp)) {
int err = PTR_ERR(fp);
- if (err == -FC_EX_CLOSED)
+ if (err == -FC_EX_CLOSED || err == -FC_EX_TIMEOUT)
goto cleanup;
FC_DBG("Cannot process RRQ, because of frame error %d\n", err);
return;
}
/**
- * fc_fcp_pkt_release - release hold on scsi_pkt packet
+ * fc_fcp_pkt_release() - release hold on scsi_pkt packet
* @fsp: fcp packet struct
*
* This is used by upper layer scsi driver.
}
/**
- * fc_fcp_pkt_destory - release hold on scsi_pkt packet
- *
+ * fc_fcp_pkt_destory() - release hold on scsi_pkt packet
* @seq: exchange sequence
* @fsp: fcp packet struct
*
}
/**
- * fc_fcp_lock_pkt - lock a packet and get a ref to it.
+ * fc_fcp_lock_pkt() - lock a packet and get a ref to it.
* @fsp: fcp packet
*
* We should only return error if we return a command to scsi-ml before
buf = fc_frame_payload_get(fp, 0);
if (offset + len > fsp->data_len) {
- /*
- * this should never happen
- */
+ /* this should never happen */
if ((fr_flags(fp) & FCPHF_CRC_UNCHECKED) &&
fc_frame_crc_check(fp))
goto crc_err;
fc_fcp_complete_locked(fsp);
}
-/*
- * fc_fcp_send_data - Send SCSI data to target.
+/**
+ * fc_fcp_send_data() - Send SCSI data to target.
* @fsp: ptr to fc_fcp_pkt
* @sp: ptr to this sequence
* @offset: starting offset for this data request
}
}
-/*
- * fc_fcp_reduce_can_queue - drop can_queue
+/**
+ * fc_fcp_reduce_can_queue() - drop can_queue
* @lp: lport to drop queueing for
*
* If we are getting memory allocation failures, then we may
spin_unlock_irqrestore(lp->host->host_lock, flags);
}
-/*
- * exch mgr calls this routine to process scsi
- * exchanges.
+/**
+ * fc_fcp_recv() - Reveive FCP frames
+ * @seq: The sequence the frame is on
+ * @fp: The FC frame
+ * @arg: The related FCP packet
*
* Return : None
* Context : called from Soft IRQ context
}
/**
- * fc_fcp_complete_locked - complete processing of a fcp packet
+ * fc_fcp_complete_locked() - complete processing of a fcp packet
* @fsp: fcp packet
*
* This function may sleep if a timer is pending. The packet lock must be
}
/**
- * fc_fcp_cleanup_each_cmd - run fn on each active command
+ * fc_fcp_cleanup_each_cmd() - Cleanup active commads
* @lp: logical port
* @id: target id
* @lun: lun
}
/**
- * fc_fcp_pkt_send - send a fcp packet to the lower level.
+ * fc_fcp_pkt_send() - send a fcp packet to the lower level.
* @lp: fc lport
* @fsp: fc packet.
*
static inline int fc_fcp_lport_queue_ready(struct fc_lport *lp)
{
/* lock ? */
- return (lp->state == LPORT_ST_READY) && (lp->link_status & FC_LINK_UP);
+ return (lp->state == LPORT_ST_READY) && lp->link_up && !lp->qfull;
}
/**
EXPORT_SYMBOL(fc_queuecommand);
/**
- * fc_io_compl - Handle responses for completed commands
+ * fc_io_compl() - Handle responses for completed commands
* @fsp: scsi packet
*
* Translates a error to a Linux SCSI error.
sc_cmd->result = DID_ERROR << 16;
break;
case FC_DATA_UNDRUN:
- if (fsp->cdb_status == 0) {
+ if ((fsp->cdb_status == 0) && !(fsp->req_flags & FC_SRB_READ)) {
/*
* scsi status is good but transport level
- * underrun. for read it should be an error??
+ * underrun.
*/
- sc_cmd->result = (DID_OK << 16) | fsp->cdb_status;
+ sc_cmd->result = DID_OK << 16;
} else {
/*
* scsi got underrun, this is an error
}
/**
- * fc_fcp_complete - complete processing of a fcp packet
+ * fc_fcp_complete() - complete processing of a fcp packet
* @fsp: fcp packet
*
* This function may sleep if a fsp timer is pending.
EXPORT_SYMBOL(fc_fcp_complete);
/**
- * fc_eh_abort - Abort a command...from scsi host template
+ * fc_eh_abort() - Abort a command
* @sc_cmd: scsi command to abort
*
+ * From scsi host template.
* send ABTS to the target device and wait for the response
* sc_cmd is the pointer to the command to be aborted.
*/
lp = shost_priv(sc_cmd->device->host);
if (lp->state != LPORT_ST_READY)
return rc;
- else if (!(lp->link_status & FC_LINK_UP))
+ else if (!lp->link_up)
return rc;
spin_lock_irqsave(lp->host->host_lock, flags);
EXPORT_SYMBOL(fc_eh_abort);
/**
- * fc_eh_device_reset: Reset a single LUN
+ * fc_eh_device_reset() Reset a single LUN
* @sc_cmd: scsi command
*
* Set from scsi host template to send tm cmd to the target and wait for the
EXPORT_SYMBOL(fc_eh_device_reset);
/**
- * fc_eh_host_reset - The reset function will reset the ports on the host.
+ * fc_eh_host_reset() - The reset function will reset the ports on the host.
* @sc_cmd: scsi command
*/
int fc_eh_host_reset(struct scsi_cmnd *sc_cmd)
EXPORT_SYMBOL(fc_eh_host_reset);
/**
- * fc_slave_alloc - configure queue depth
+ * fc_slave_alloc() - configure queue depth
* @sdev: scsi device
*
* Configures queue depth based on host's cmd_per_len. If not set
}
/**
- * fc_lport_rport_callback - Event handler for rport events
+ * fc_lport_rport_callback() - Event handler for rport events
* @lport: The lport which is receiving the event
* @rport: The rport which the event has occured on
* @event: The event that occured
}
/**
- * fc_lport_state - Return a string which represents the lport's state
+ * fc_lport_state() - Return a string which represents the lport's state
* @lport: The lport whose state is to converted to a string
*/
static const char *fc_lport_state(struct fc_lport *lport)
}
/**
- * fc_lport_ptp_setup - Create an rport for point-to-point mode
+ * fc_lport_ptp_setup() - Create an rport for point-to-point mode
* @lport: The lport to attach the ptp rport to
* @fid: The FID of the ptp rport
* @remote_wwpn: The WWPN of the ptp rport
lport->ptp_rp = NULL;
}
- lport->ptp_rp = fc_rport_rogue_create(&dp);
+ lport->ptp_rp = lport->tt.rport_create(&dp);
lport->tt.rport_login(lport->ptp_rp);
{
struct fc_lport *lp = shost_priv(shost);
- if ((lp->link_status & FC_LINK_UP) == FC_LINK_UP)
+ if (lp->link_up)
fc_host_port_state(shost) = FC_PORTSTATE_ONLINE;
else
fc_host_port_state(shost) = FC_PORTSTATE_OFFLINE;
}
/**
- * fc_lport_recv_rlir_req - Handle received Registered Link Incident Report.
+ * fc_lport_recv_rlir_req() - Handle received Registered Link Incident Report.
* @lport: Fibre Channel local port recieving the RLIR
* @sp: current sequence in the RLIR exchange
* @fp: RLIR request frame
}
/**
- * fc_lport_recv_echo_req - Handle received ECHO request
+ * fc_lport_recv_echo_req() - Handle received ECHO request
* @lport: Fibre Channel local port recieving the ECHO
* @sp: current sequence in the ECHO exchange
* @fp: ECHO request frame
}
/**
- * fc_lport_recv_echo_req - Handle received Request Node ID data request
+ * fc_lport_recv_echo_req() - Handle received Request Node ID data request
* @lport: Fibre Channel local port recieving the RNID
* @sp: current sequence in the RNID exchange
* @fp: RNID request frame
}
/**
- * fc_lport_recv_adisc_req - Handle received Address Discovery Request
+ * fc_lport_recv_adisc_req() - Handle received Address Discovery Request
* @lport: Fibre Channel local port recieving the ADISC
* @sp: current sequence in the ADISC exchange
* @fp: ADISC request frame
}
/**
- * fc_lport_recv_logo_req - Handle received fabric LOGO request
+ * fc_lport_recv_logo_req() - Handle received fabric LOGO request
* @lport: Fibre Channel local port recieving the LOGO
* @sp: current sequence in the LOGO exchange
* @fp: LOGO request frame
}
/**
- * fc_fabric_login - Start the lport state machine
+ * fc_fabric_login() - Start the lport state machine
* @lport: The lport that should log into the fabric
*
* Locking Note: This function should not be called
EXPORT_SYMBOL(fc_fabric_login);
/**
- * fc_linkup - Handler for transport linkup events
+ * fc_linkup() - Handler for transport linkup events
* @lport: The lport whose link is up
*/
void fc_linkup(struct fc_lport *lport)
fc_host_port_id(lport->host));
mutex_lock(&lport->lp_mutex);
- if ((lport->link_status & FC_LINK_UP) != FC_LINK_UP) {
- lport->link_status |= FC_LINK_UP;
+ if (!lport->link_up) {
+ lport->link_up = 1;
if (lport->state == LPORT_ST_RESET)
fc_lport_enter_flogi(lport);
EXPORT_SYMBOL(fc_linkup);
/**
- * fc_linkdown - Handler for transport linkdown events
+ * fc_linkdown() - Handler for transport linkdown events
* @lport: The lport whose link is down
*/
void fc_linkdown(struct fc_lport *lport)
FC_DEBUG_LPORT("Link is down for port (%6x)\n",
fc_host_port_id(lport->host));
- if ((lport->link_status & FC_LINK_UP) == FC_LINK_UP) {
- lport->link_status &= ~(FC_LINK_UP);
+ if (lport->link_up) {
+ lport->link_up = 0;
fc_lport_enter_reset(lport);
lport->tt.fcp_cleanup(lport);
}
EXPORT_SYMBOL(fc_linkdown);
/**
- * fc_pause - Pause the flow of frames
- * @lport: The lport to be paused
- */
-void fc_pause(struct fc_lport *lport)
-{
- mutex_lock(&lport->lp_mutex);
- lport->link_status |= FC_PAUSE;
- mutex_unlock(&lport->lp_mutex);
-}
-EXPORT_SYMBOL(fc_pause);
-
-/**
- * fc_unpause - Unpause the flow of frames
- * @lport: The lport to be unpaused
- */
-void fc_unpause(struct fc_lport *lport)
-{
- mutex_lock(&lport->lp_mutex);
- lport->link_status &= ~(FC_PAUSE);
- mutex_unlock(&lport->lp_mutex);
-}
-EXPORT_SYMBOL(fc_unpause);
-
-/**
- * fc_fabric_logoff - Logout of the fabric
+ * fc_fabric_logoff() - Logout of the fabric
* @lport: fc_lport pointer to logoff the fabric
*
* Return value:
* 0 for success, -1 for failure
- **/
+ */
int fc_fabric_logoff(struct fc_lport *lport)
{
lport->tt.disc_stop_final(lport);
mutex_lock(&lport->lp_mutex);
fc_lport_enter_logo(lport);
mutex_unlock(&lport->lp_mutex);
+ cancel_delayed_work_sync(&lport->retry_work);
return 0;
}
EXPORT_SYMBOL(fc_fabric_logoff);
/**
- * fc_lport_destroy - unregister a fc_lport
+ * fc_lport_destroy() - unregister a fc_lport
* @lport: fc_lport pointer to unregister
*
* Return value:
* clean-up all the allocated memory
* and free up other system resources.
*
- **/
+ */
int fc_lport_destroy(struct fc_lport *lport)
{
lport->tt.frame_send = fc_frame_drop;
lport->tt.fcp_abort_io(lport);
- lport->tt.exch_mgr_reset(lport->emp, 0, 0);
+ lport->tt.exch_mgr_reset(lport, 0, 0);
return 0;
}
EXPORT_SYMBOL(fc_lport_destroy);
/**
- * fc_set_mfs - sets up the mfs for the corresponding fc_lport
+ * fc_set_mfs() - sets up the mfs for the corresponding fc_lport
* @lport: fc_lport pointer to unregister
* @mfs: the new mfs for fc_lport
*
* Set mfs for the given fc_lport to the new mfs.
*
* Return: 0 for success
- *
- **/
+ */
int fc_set_mfs(struct fc_lport *lport, u32 mfs)
{
unsigned int old_mfs;
EXPORT_SYMBOL(fc_set_mfs);
/**
- * fc_lport_disc_callback - Callback for discovery events
+ * fc_lport_disc_callback() - Callback for discovery events
* @lport: FC local port
* @event: The discovery event
*/
}
/**
- * fc_rport_enter_ready - Enter the ready state and start discovery
+ * fc_rport_enter_ready() - Enter the ready state and start discovery
* @lport: Fibre Channel local port that is ready
*
* Locking Note: The lport lock is expected to be held before calling
}
/**
- * fc_lport_recv_flogi_req - Receive a FLOGI request
+ * fc_lport_recv_flogi_req() - Receive a FLOGI request
* @sp_in: The sequence the FLOGI is on
* @rx_fp: The frame the FLOGI is in
* @lport: The lport that recieved the request
}
/**
- * fc_lport_recv_req - The generic lport request handler
+ * fc_lport_recv_req() - The generic lport request handler
* @lport: The lport that received the request
* @sp: The sequence the request is on
* @fp: The frame the request is in
}
/**
- * fc_lport_reset - Reset an lport
+ * fc_lport_reset() - Reset an lport
* @lport: The lport which should be reset
*
* Locking Note: This functions should not be called with the
*/
int fc_lport_reset(struct fc_lport *lport)
{
+ cancel_delayed_work_sync(&lport->retry_work);
mutex_lock(&lport->lp_mutex);
fc_lport_enter_reset(lport);
mutex_unlock(&lport->lp_mutex);
EXPORT_SYMBOL(fc_lport_reset);
/**
- * fc_rport_enter_reset - Reset the local port
+ * fc_rport_enter_reset() - Reset the local port
* @lport: Fibre Channel local port to be reset
*
* Locking Note: The lport lock is expected to be held before calling
lport->tt.disc_stop(lport);
- lport->tt.exch_mgr_reset(lport->emp, 0, 0);
+ lport->tt.exch_mgr_reset(lport, 0, 0);
fc_host_fabric_name(lport->host) = 0;
fc_host_port_id(lport->host) = 0;
- if ((lport->link_status & FC_LINK_UP) == FC_LINK_UP)
+ if (lport->link_up)
fc_lport_enter_flogi(lport);
}
/**
- * fc_lport_error - Handler for any errors
+ * fc_lport_error() - Handler for any errors
* @lport: The fc_lport object
* @fp: The frame pointer
*
}
/**
- * fc_lport_rft_id_resp - Handle response to Register Fibre
- * Channel Types by ID (RPN_ID) request
+ * fc_lport_rft_id_resp() - Handle response to Register Fibre
+ * Channel Types by ID (RPN_ID) request
* @sp: current sequence in RPN_ID exchange
* @fp: response frame
* @lp_arg: Fibre Channel host port instance
FC_DEBUG_LPORT("Received a RFT_ID response\n");
+ if (IS_ERR(fp)) {
+ fc_lport_error(lport, fp);
+ goto err;
+ }
+
if (lport->state != LPORT_ST_RFT_ID) {
FC_DBG("Received a RFT_ID response, but in state %s\n",
fc_lport_state(lport));
goto out;
}
- if (IS_ERR(fp)) {
- fc_lport_error(lport, fp);
- goto err;
- }
-
fh = fc_frame_header_get(fp);
ct = fc_frame_payload_get(fp, sizeof(*ct));
}
/**
- * fc_lport_rpn_id_resp - Handle response to Register Port
- * Name by ID (RPN_ID) request
+ * fc_lport_rpn_id_resp() - Handle response to Register Port
+ * Name by ID (RPN_ID) request
* @sp: current sequence in RPN_ID exchange
* @fp: response frame
* @lp_arg: Fibre Channel host port instance
FC_DEBUG_LPORT("Received a RPN_ID response\n");
+ if (IS_ERR(fp)) {
+ fc_lport_error(lport, fp);
+ goto err;
+ }
+
if (lport->state != LPORT_ST_RPN_ID) {
FC_DBG("Received a RPN_ID response, but in state %s\n",
fc_lport_state(lport));
goto out;
}
- if (IS_ERR(fp)) {
- fc_lport_error(lport, fp);
- goto err;
- }
-
fh = fc_frame_header_get(fp);
ct = fc_frame_payload_get(fp, sizeof(*ct));
if (fh && ct && fh->fh_type == FC_TYPE_CT &&
}
/**
- * fc_lport_scr_resp - Handle response to State Change Register (SCR) request
+ * fc_lport_scr_resp() - Handle response to State Change Register (SCR) request
* @sp: current sequence in SCR exchange
* @fp: response frame
* @lp_arg: Fibre Channel lport port instance that sent the registration request
FC_DEBUG_LPORT("Received a SCR response\n");
+ if (IS_ERR(fp)) {
+ fc_lport_error(lport, fp);
+ goto err;
+ }
+
if (lport->state != LPORT_ST_SCR) {
FC_DBG("Received a SCR response, but in state %s\n",
fc_lport_state(lport));
goto out;
}
- if (IS_ERR(fp)) {
- fc_lport_error(lport, fp);
- goto err;
- }
-
op = fc_frame_payload_op(fp);
if (op == ELS_LS_ACC)
fc_lport_enter_ready(lport);
}
/**
- * fc_lport_enter_scr - Send a State Change Register (SCR) request
+ * fc_lport_enter_scr() - Send a State Change Register (SCR) request
* @lport: Fibre Channel local port to register for state changes
*
* Locking Note: The lport lock is expected to be held before calling
}
/**
- * fc_lport_enter_rft_id - Register FC4-types with the name server
+ * fc_lport_enter_rft_id() - Register FC4-types with the name server
* @lport: Fibre Channel local port to register
*
* Locking Note: The lport lock is expected to be held before calling
}
/**
- * fc_rport_enter_rft_id - Register port name with the name server
+ * fc_rport_enter_rft_id() - Register port name with the name server
* @lport: Fibre Channel local port to register
*
* Locking Note: The lport lock is expected to be held before calling
};
/**
- * fc_rport_enter_dns - Create a rport to the name server
+ * fc_rport_enter_dns() - Create a rport to the name server
* @lport: Fibre Channel local port requesting a rport for the name server
*
* Locking Note: The lport lock is expected to be held before calling
fc_lport_state_enter(lport, LPORT_ST_DNS);
- rport = fc_rport_rogue_create(&dp);
+ rport = lport->tt.rport_create(&dp);
if (!rport)
goto err;
}
/**
- * fc_lport_timeout - Handler for the retry_work timer.
+ * fc_lport_timeout() - Handler for the retry_work timer.
* @work: The work struct of the fc_lport
*/
static void fc_lport_timeout(struct work_struct *work)
}
/**
- * fc_lport_logo_resp - Handle response to LOGO request
+ * fc_lport_logo_resp() - Handle response to LOGO request
* @sp: current sequence in LOGO exchange
* @fp: response frame
* @lp_arg: Fibre Channel lport port instance that sent the LOGO request
FC_DEBUG_LPORT("Received a LOGO response\n");
+ if (IS_ERR(fp)) {
+ fc_lport_error(lport, fp);
+ goto err;
+ }
+
if (lport->state != LPORT_ST_LOGO) {
FC_DBG("Received a LOGO response, but in state %s\n",
fc_lport_state(lport));
goto out;
}
- if (IS_ERR(fp)) {
- fc_lport_error(lport, fp);
- goto err;
- }
-
op = fc_frame_payload_op(fp);
if (op == ELS_LS_ACC)
fc_lport_enter_reset(lport);
}
/**
- * fc_rport_enter_logo - Logout of the fabric
+ * fc_rport_enter_logo() - Logout of the fabric
* @lport: Fibre Channel local port to be logged out
*
* Locking Note: The lport lock is expected to be held before calling
}
/**
- * fc_lport_flogi_resp - Handle response to FLOGI request
+ * fc_lport_flogi_resp() - Handle response to FLOGI request
* @sp: current sequence in FLOGI exchange
* @fp: response frame
* @lp_arg: Fibre Channel lport port instance that sent the FLOGI request
FC_DEBUG_LPORT("Received a FLOGI response\n");
+ if (IS_ERR(fp)) {
+ fc_lport_error(lport, fp);
+ goto err;
+ }
+
if (lport->state != LPORT_ST_FLOGI) {
FC_DBG("Received a FLOGI response, but in state %s\n",
fc_lport_state(lport));
goto out;
}
- if (IS_ERR(fp)) {
- fc_lport_error(lport, fp);
- goto err;
- }
-
fh = fc_frame_header_get(fp);
did = ntoh24(fh->fh_d_id);
if (fc_frame_payload_op(fp) == ELS_LS_ACC && did != 0) {
}
/**
- * fc_rport_enter_flogi - Send a FLOGI request to the fabric manager
+ * fc_rport_enter_flogi() - Send a FLOGI request to the fabric manager
* @lport: Fibre Channel local port to be logged in to the fabric
*
* Locking Note: The lport lock is expected to be held before calling
struct fc_seq *, struct fc_frame *);
static void fc_rport_timeout(struct work_struct *);
static void fc_rport_error(struct fc_rport *, struct fc_frame *);
+static void fc_rport_error_retry(struct fc_rport *, struct fc_frame *);
static void fc_rport_work(struct work_struct *);
static const char *fc_rport_state_names[] = {
}
/**
- * fc_rport_state - return a string for the state the rport is in
+ * fc_rport_state() - return a string for the state the rport is in
* @rport: The rport whose state we want to get a string for
*/
static const char *fc_rport_state(struct fc_rport *rport)
}
/**
- * fc_set_rport_loss_tmo - Set the remote port loss timeout in seconds.
+ * fc_set_rport_loss_tmo() - Set the remote port loss timeout in seconds.
* @rport: Pointer to Fibre Channel remote port structure
* @timeout: timeout in seconds
*/
EXPORT_SYMBOL(fc_set_rport_loss_tmo);
/**
- * fc_plogi_get_maxframe - Get max payload from the common service parameters
+ * fc_plogi_get_maxframe() - Get max payload from the common service parameters
* @flp: FLOGI payload structure
* @maxval: upper limit, may be less than what is in the service parameters
*/
-static unsigned int
-fc_plogi_get_maxframe(struct fc_els_flogi *flp, unsigned int maxval)
+static unsigned int fc_plogi_get_maxframe(struct fc_els_flogi *flp,
+ unsigned int maxval)
{
unsigned int mfs;
}
/**
- * fc_rport_state_enter - Change the rport's state
+ * fc_rport_state_enter() - Change the rport's state
* @rport: The rport whose state should change
* @new: The new state of the rport
*
static void fc_rport_work(struct work_struct *work)
{
+ u32 port_id;
struct fc_rport_libfc_priv *rdata =
container_of(work, struct fc_rport_libfc_priv, event_work);
enum fc_rport_event event;
rport_ops->event_callback(lport, rport, event);
if (trans_state == FC_PORTSTATE_ROGUE)
put_device(&rport->dev);
- else
+ else {
+ port_id = rport->port_id;
fc_remote_port_delete(rport);
+ lport->tt.exch_mgr_reset(lport, 0, port_id);
+ lport->tt.exch_mgr_reset(lport, port_id, 0);
+ }
} else
mutex_unlock(&rdata->rp_mutex);
}
/**
- * fc_rport_login - Start the remote port login state machine
+ * fc_rport_login() - Start the remote port login state machine
* @rport: Fibre Channel remote port
*
* Locking Note: Called without the rport lock held. This
}
/**
- * fc_rport_logoff - Logoff and remove an rport
+ * fc_rport_logoff() - Logoff and remove an rport
* @rport: Fibre Channel remote port to be removed
*
* Locking Note: Called without the rport lock held. This
}
/**
- * fc_rport_enter_ready - The rport is ready
+ * fc_rport_enter_ready() - The rport is ready
* @rport: Fibre Channel remote port that is ready
*
* Locking Note: The rport lock is expected to be held before calling
}
/**
- * fc_rport_timeout - Handler for the retry_work timer.
+ * fc_rport_timeout() - Handler for the retry_work timer.
* @work: The work struct of the fc_rport_libfc_priv
*
* Locking Note: Called without the rport lock held. This
}
/**
- * fc_rport_error - Handler for any errors
+ * fc_rport_error() - Error handler, called once retries have been exhausted
* @rport: The fc_rport object
* @fp: The frame pointer
*
- * If the error was caused by a resource allocation failure
- * then wait for half a second and retry, otherwise retry
- * immediately.
- *
* Locking Note: The rport lock is expected to be held before
* calling this routine
*/
static void fc_rport_error(struct fc_rport *rport, struct fc_frame *fp)
{
struct fc_rport_libfc_priv *rdata = rport->dd_data;
- unsigned long delay = 0;
FC_DEBUG_RPORT("Error %ld in state %s, retries %d\n",
PTR_ERR(fp), fc_rport_state(rport), rdata->retries);
- if (!fp || PTR_ERR(fp) == -FC_EX_TIMEOUT) {
- /*
- * Memory allocation failure, or the exchange timed out.
- * Retry after delay
- */
- if (rdata->retries < rdata->local_port->max_retry_count) {
- rdata->retries++;
- if (!fp)
- delay = msecs_to_jiffies(500);
- get_device(&rport->dev);
- schedule_delayed_work(&rdata->retry_work, delay);
- } else {
- switch (rdata->rp_state) {
- case RPORT_ST_PLOGI:
- case RPORT_ST_PRLI:
- case RPORT_ST_LOGO:
- rdata->event = RPORT_EV_FAILED;
- queue_work(rport_event_queue,
- &rdata->event_work);
- break;
- case RPORT_ST_RTV:
- fc_rport_enter_ready(rport);
- break;
- case RPORT_ST_NONE:
- case RPORT_ST_READY:
- case RPORT_ST_INIT:
- break;
- }
- }
+ switch (rdata->rp_state) {
+ case RPORT_ST_PLOGI:
+ case RPORT_ST_PRLI:
+ case RPORT_ST_LOGO:
+ rdata->event = RPORT_EV_FAILED;
+ queue_work(rport_event_queue,
+ &rdata->event_work);
+ break;
+ case RPORT_ST_RTV:
+ fc_rport_enter_ready(rport);
+ break;
+ case RPORT_ST_NONE:
+ case RPORT_ST_READY:
+ case RPORT_ST_INIT:
+ break;
}
}
/**
- * fc_rport_plogi_recv_resp - Handle incoming ELS PLOGI response
+ * fc_rport_error_retry() - Error handler when retries are desired
+ * @rport: The fc_rport object
+ * @fp: The frame pointer
+ *
+ * If the error was an exchange timeout retry immediately,
+ * otherwise wait for E_D_TOV.
+ *
+ * Locking Note: The rport lock is expected to be held before
+ * calling this routine
+ */
+static void fc_rport_error_retry(struct fc_rport *rport, struct fc_frame *fp)
+{
+ struct fc_rport_libfc_priv *rdata = rport->dd_data;
+ unsigned long delay = FC_DEF_E_D_TOV;
+
+ /* make sure this isn't an FC_EX_CLOSED error, never retry those */
+ if (PTR_ERR(fp) == -FC_EX_CLOSED)
+ return fc_rport_error(rport, fp);
+
+ if (rdata->retries < rdata->local_port->max_retry_count) {
+ FC_DEBUG_RPORT("Error %ld in state %s, retrying\n",
+ PTR_ERR(fp), fc_rport_state(rport));
+ rdata->retries++;
+ /* no additional delay on exchange timeouts */
+ if (PTR_ERR(fp) == -FC_EX_TIMEOUT)
+ delay = 0;
+ get_device(&rport->dev);
+ schedule_delayed_work(&rdata->retry_work, delay);
+ return;
+ }
+
+ return fc_rport_error(rport, fp);
+}
+
+/**
+ * fc_rport_plogi_recv_resp() - Handle incoming ELS PLOGI response
* @sp: current sequence in the PLOGI exchange
* @fp: response frame
* @rp_arg: Fibre Channel remote port
FC_DEBUG_RPORT("Received a PLOGI response from port (%6x)\n",
rport->port_id);
+ if (IS_ERR(fp)) {
+ fc_rport_error_retry(rport, fp);
+ goto err;
+ }
+
if (rdata->rp_state != RPORT_ST_PLOGI) {
FC_DBG("Received a PLOGI response, but in state %s\n",
fc_rport_state(rport));
goto out;
}
- if (IS_ERR(fp)) {
- fc_rport_error(rport, fp);
- goto err;
- }
-
op = fc_frame_payload_op(fp);
if (op == ELS_LS_ACC &&
(plp = fc_frame_payload_get(fp, sizeof(*plp))) != NULL) {
else
fc_rport_enter_prli(rport);
} else
- fc_rport_error(rport, fp);
+ fc_rport_error_retry(rport, fp);
out:
fc_frame_free(fp);
}
/**
- * fc_rport_enter_plogi - Send Port Login (PLOGI) request to peer
+ * fc_rport_enter_plogi() - Send Port Login (PLOGI) request to peer
* @rport: Fibre Channel remote port to send PLOGI to
*
* Locking Note: The rport lock is expected to be held before calling
rport->maxframe_size = FC_MIN_MAX_PAYLOAD;
fp = fc_frame_alloc(lport, sizeof(struct fc_els_flogi));
if (!fp) {
- fc_rport_error(rport, fp);
+ fc_rport_error_retry(rport, fp);
return;
}
rdata->e_d_tov = lport->e_d_tov;
if (!lport->tt.elsct_send(lport, rport, fp, ELS_PLOGI,
fc_rport_plogi_resp, rport, lport->e_d_tov))
- fc_rport_error(rport, fp);
+ fc_rport_error_retry(rport, fp);
else
get_device(&rport->dev);
}
/**
- * fc_rport_prli_resp - Process Login (PRLI) response handler
+ * fc_rport_prli_resp() - Process Login (PRLI) response handler
* @sp: current sequence in the PRLI exchange
* @fp: response frame
* @rp_arg: Fibre Channel remote port
FC_DEBUG_RPORT("Received a PRLI response from port (%6x)\n",
rport->port_id);
+ if (IS_ERR(fp)) {
+ fc_rport_error_retry(rport, fp);
+ goto err;
+ }
+
if (rdata->rp_state != RPORT_ST_PRLI) {
FC_DBG("Received a PRLI response, but in state %s\n",
fc_rport_state(rport));
goto out;
}
- if (IS_ERR(fp)) {
- fc_rport_error(rport, fp);
- goto err;
- }
-
op = fc_frame_payload_op(fp);
if (op == ELS_LS_ACC) {
pp = fc_frame_payload_get(fp, sizeof(*pp));
}
/**
- * fc_rport_logo_resp - Logout (LOGO) response handler
+ * fc_rport_logo_resp() - Logout (LOGO) response handler
* @sp: current sequence in the LOGO exchange
* @fp: response frame
* @rp_arg: Fibre Channel remote port
rport->port_id);
if (IS_ERR(fp)) {
- fc_rport_error(rport, fp);
+ fc_rport_error_retry(rport, fp);
goto err;
}
}
/**
- * fc_rport_enter_prli - Send Process Login (PRLI) request to peer
+ * fc_rport_enter_prli() - Send Process Login (PRLI) request to peer
* @rport: Fibre Channel remote port to send PRLI to
*
* Locking Note: The rport lock is expected to be held before calling
fp = fc_frame_alloc(lport, sizeof(*pp));
if (!fp) {
- fc_rport_error(rport, fp);
+ fc_rport_error_retry(rport, fp);
return;
}
if (!lport->tt.elsct_send(lport, rport, fp, ELS_PRLI,
fc_rport_prli_resp, rport, lport->e_d_tov))
- fc_rport_error(rport, fp);
+ fc_rport_error_retry(rport, fp);
else
get_device(&rport->dev);
}
/**
- * fc_rport_els_rtv_resp - Request Timeout Value response handler
+ * fc_rport_els_rtv_resp() - Request Timeout Value response handler
* @sp: current sequence in the RTV exchange
* @fp: response frame
* @rp_arg: Fibre Channel remote port
FC_DEBUG_RPORT("Received a RTV response from port (%6x)\n",
rport->port_id);
+ if (IS_ERR(fp)) {
+ fc_rport_error(rport, fp);
+ goto err;
+ }
+
if (rdata->rp_state != RPORT_ST_RTV) {
FC_DBG("Received a RTV response, but in state %s\n",
fc_rport_state(rport));
goto out;
}
- if (IS_ERR(fp)) {
- fc_rport_error(rport, fp);
- goto err;
- }
-
op = fc_frame_payload_op(fp);
if (op == ELS_LS_ACC) {
struct fc_els_rtv_acc *rtv;
}
/**
- * fc_rport_enter_rtv - Send Request Timeout Value (RTV) request to peer
+ * fc_rport_enter_rtv() - Send Request Timeout Value (RTV) request to peer
* @rport: Fibre Channel remote port to send RTV to
*
* Locking Note: The rport lock is expected to be held before calling
fp = fc_frame_alloc(lport, sizeof(struct fc_els_rtv));
if (!fp) {
- fc_rport_error(rport, fp);
+ fc_rport_error_retry(rport, fp);
return;
}
if (!lport->tt.elsct_send(lport, rport, fp, ELS_RTV,
fc_rport_rtv_resp, rport, lport->e_d_tov))
- fc_rport_error(rport, fp);
+ fc_rport_error_retry(rport, fp);
else
get_device(&rport->dev);
}
/**
- * fc_rport_enter_logo - Send Logout (LOGO) request to peer
+ * fc_rport_enter_logo() - Send Logout (LOGO) request to peer
* @rport: Fibre Channel remote port to send LOGO to
*
* Locking Note: The rport lock is expected to be held before calling
fp = fc_frame_alloc(lport, sizeof(struct fc_els_logo));
if (!fp) {
- fc_rport_error(rport, fp);
+ fc_rport_error_retry(rport, fp);
return;
}
if (!lport->tt.elsct_send(lport, rport, fp, ELS_LOGO,
fc_rport_logo_resp, rport, lport->e_d_tov))
- fc_rport_error(rport, fp);
+ fc_rport_error_retry(rport, fp);
else
get_device(&rport->dev);
}
/**
- * fc_rport_recv_req - Receive a request from a rport
+ * fc_rport_recv_req() - Receive a request from a rport
* @sp: current sequence in the PLOGI exchange
* @fp: response frame
* @rp_arg: Fibre Channel remote port
}
/**
- * fc_rport_recv_plogi_req - Handle incoming Port Login (PLOGI) request
+ * fc_rport_recv_plogi_req() - Handle incoming Port Login (PLOGI) request
* @rport: Fibre Channel remote port that initiated PLOGI
* @sp: current sequence in the PLOGI exchange
* @fp: PLOGI request frame
}
/**
- * fc_rport_recv_prli_req - Handle incoming Process Login (PRLI) request
+ * fc_rport_recv_prli_req() - Handle incoming Process Login (PRLI) request
* @rport: Fibre Channel remote port that initiated PRLI
* @sp: current sequence in the PRLI exchange
* @fp: PRLI request frame
}
/**
- * fc_rport_recv_prlo_req - Handle incoming Process Logout (PRLO) request
+ * fc_rport_recv_prlo_req() - Handle incoming Process Logout (PRLO) request
* @rport: Fibre Channel remote port that initiated PRLO
* @sp: current sequence in the PRLO exchange
* @fp: PRLO request frame
}
/**
- * fc_rport_recv_logo_req - Handle incoming Logout (LOGO) request
+ * fc_rport_recv_logo_req() - Handle incoming Logout (LOGO) request
* @rport: Fibre Channel remote port that initiated LOGO
* @sp: current sequence in the LOGO exchange
* @fp: LOGO request frame
int fc_rport_init(struct fc_lport *lport)
{
+ if (!lport->tt.rport_create)
+ lport->tt.rport_create = fc_rport_rogue_create;
+
if (!lport->tt.rport_login)
lport->tt.rport_login = fc_rport_login;
struct fc_rport_libfc_priv *rdata = rport->dd_data;
struct fc_lport *lport = rdata->local_port;
- lport->tt.exch_mgr_reset(lport->emp, 0, rport->port_id);
- lport->tt.exch_mgr_reset(lport->emp, rport->port_id, 0);
+ lport->tt.exch_mgr_reset(lport, 0, rport->port_id);
+ lport->tt.exch_mgr_reset(lport, rport->port_id, 0);
}
EXPORT_SYMBOL(fc_rport_terminate_io);
if (ha->optrom_state != QLA_SWAITING)
break;
- if (start & 0xfff) {
- qla_printk(KERN_WARNING, ha,
- "Invalid start region 0x%x/0x%x.\n", start, size);
- return -EINVAL;
- }
-
ha->optrom_region_start = start;
ha->optrom_region_size = start + size > ha->optrom_size ?
ha->optrom_size - start : size;
else if (start == (ha->flt_region_boot * 4) ||
start == (ha->flt_region_fw * 4))
valid = 1;
- else if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) &&
- start == (ha->flt_region_vpd_nvram * 4))
+ else if (IS_QLA25XX(ha) || IS_QLA81XX(ha))
valid = 1;
if (!valid) {
qla_printk(KERN_WARNING, ha,
DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
- if (ha->flags.npiv_supported)
+ if (ha->flags.npiv_supported) {
+ if (ha->operating_mode == LOOP)
+ ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
+ }
+
mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
port_id_t wrap, nxt_d_id;
struct qla_hw_data *ha = vha->hw;
struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
+ struct scsi_qla_host *tvp;
rval = QLA_SUCCESS;
/* Bypass virtual ports of the same host. */
found = 0;
if (ha->num_vhosts) {
- list_for_each_entry(vp, &ha->vp_list, list) {
+ list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
if (new_fcport->d_id.b24 == vp->d_id.b24) {
found = 1;
break;
uint16_t first_loop_id;
struct qla_hw_data *ha = vha->hw;
struct scsi_qla_host *vp;
+ struct scsi_qla_host *tvp;
rval = QLA_SUCCESS;
/* Check for loop ID being already in use. */
found = 0;
fcport = NULL;
- list_for_each_entry(vp, &ha->vp_list, list) {
+ list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
list_for_each_entry(fcport, &vp->vp_fcports, list) {
if (fcport->loop_id == dev->loop_id &&
fcport != dev) {
uint8_t status = 0;
struct qla_hw_data *ha = vha->hw;
struct scsi_qla_host *vp;
+ struct scsi_qla_host *tvp;
struct req_que *req = ha->req_q_map[0];
if (vha->flags.online) {
if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
atomic_set(&vha->loop_state, LOOP_DOWN);
qla2x00_mark_all_devices_lost(vha, 0);
- list_for_each_entry(vp, &ha->vp_list, list)
+ list_for_each_entry_safe(vp, tvp, &ha->vp_list, list)
qla2x00_mark_all_devices_lost(vp, 0);
} else {
if (!atomic_read(&vha->loop_down_timer))
DEBUG(printk(KERN_INFO
"qla2x00_abort_isp(%ld): succeeded.\n",
vha->host_no));
- list_for_each_entry(vp, &ha->vp_list, list) {
+ list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
if (vp->vp_idx)
qla2x00_vp_abort_isp(vp);
}
static int
qla2x00_restart_isp(scsi_qla_host_t *vha)
{
- uint8_t status = 0;
+ int status = 0;
uint32_t wait_time;
struct qla_hw_data *ha = vha->hw;
struct req_que *req = ha->req_q_map[0];
uint16_t stat = le16_to_cpu(rptid_entry->vp_idx);
struct qla_hw_data *ha = vha->hw;
scsi_qla_host_t *vp;
+ scsi_qla_host_t *tvp;
if (rptid_entry->entry_status != 0)
return;
if (MSB(stat) == 1)
return;
- list_for_each_entry(vp, &ha->vp_list, list)
+ list_for_each_entry_safe(vp, tvp, &ha->vp_list, list)
if (vp_idx == vp->vp_idx)
break;
if (!vp)
qla24xx_find_vhost_by_name(struct qla_hw_data *ha, uint8_t *port_name)
{
scsi_qla_host_t *vha;
+ struct scsi_qla_host *tvha;
/* Locate matching device in database. */
- list_for_each_entry(vha, &ha->vp_list, list) {
+ list_for_each_entry_safe(vha, tvha, &ha->vp_list, list) {
if (!memcmp(port_name, vha->port_name, WWN_SIZE))
return vha;
}
void
qla2x00_alert_all_vps(struct rsp_que *rsp, uint16_t *mb)
{
- scsi_qla_host_t *vha;
+ scsi_qla_host_t *vha, *tvha;
struct qla_hw_data *ha = rsp->hw;
int i = 0;
- list_for_each_entry(vha, &ha->vp_list, list) {
+ list_for_each_entry_safe(vha, tvha, &ha->vp_list, list) {
if (vha->vp_idx) {
switch (mb[0]) {
case MBA_LIP_OCCURRED:
int ret;
struct qla_hw_data *ha = vha->hw;
scsi_qla_host_t *vp;
+ struct scsi_qla_host *tvp;
if (vha->vp_idx)
return;
clear_bit(VP_DPC_NEEDED, &vha->dpc_flags);
- list_for_each_entry(vp, &ha->vp_list, list) {
+ list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
if (vp->vp_idx)
ret = qla2x00_do_dpc_vp(vp);
}
{
char name[16];
- ha->init_cb_size = sizeof(init_cb_t);
- if (IS_QLA2XXX_MIDTYPE(ha))
- ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
-
ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
&ha->init_cb_dma, GFP_KERNEL);
if (!ha->init_cb)
void qla2x00_relogin(struct scsi_qla_host *vha)
{
fc_port_t *fcport;
- uint8_t status;
+ int status;
uint16_t next_loopid = 0;
struct qla_hw_data *ha = vha->hw;
/*
* Driver version
*/
-#define QLA2XXX_VERSION "8.03.00-k3"
+#define QLA2XXX_VERSION "8.03.00-k4"
#define QLA_DRIVER_MAJOR_VER 8
#define QLA_DRIVER_MINOR_VER 3
/*
* The device does not want the automatic start to be issued.
*/
- if (sdkp->device->no_start_on_add) {
+ if (sdkp->device->no_start_on_add)
break;
- }
-
- /*
- * If manual intervention is required, or this is an
- * absent USB storage device, a spinup is meaningless.
- */
- if (sense_valid &&
- sshdr.sense_key == NOT_READY &&
- sshdr.asc == 4 && sshdr.ascq == 3) {
- break; /* manual intervention required */
- /*
- * Issue command to spin up drive when not ready
- */
- } else if (sense_valid && sshdr.sense_key == NOT_READY) {
+ if (sense_valid && sshdr.sense_key == NOT_READY) {
+ if (sshdr.asc == 4 && sshdr.ascq == 3)
+ break; /* manual intervention required */
+ if (sshdr.asc == 4 && sshdr.ascq == 0xb)
+ break; /* standby */
+ if (sshdr.asc == 4 && sshdr.ascq == 0xc)
+ break; /* unavailable */
+ /*
+ * Issue command to spin up drive when not ready
+ */
if (!spintime) {
sd_printk(KERN_NOTICE, sdkp, "Spinning up disk...");
cmd[0] = START_STOP;
goto fail;
if (request_irq(dev->irq, ncr53c8xx_intr, IRQF_SHARED, "zalon", host)) {
- dev_printk(KERN_ERR, dev, "irq problem with %d, detaching\n ",
+ dev_printk(KERN_ERR, &dev->dev, "irq problem with %d, detaching\n ",
dev->irq);
goto fail;
}
source "drivers/staging/rt2870/Kconfig"
-source "drivers/staging/benet/Kconfig"
-
source "drivers/staging/comedi/Kconfig"
source "drivers/staging/asus_oled/Kconfig"
obj-$(CONFIG_OTUS) += otus/
obj-$(CONFIG_RT2860) += rt2860/
obj-$(CONFIG_RT2870) += rt2870/
-obj-$(CONFIG_BENET) += benet/
obj-$(CONFIG_COMEDI) += comedi/
obj-$(CONFIG_ASUS_OLED) += asus_oled/
obj-$(CONFIG_PANEL) += panel/
+++ /dev/null
-config BENET
- tristate "ServerEngines 10Gb NIC - BladeEngine"
- depends on PCI && INET
- select INET_LRO
- help
- This driver implements the NIC functionality for ServerEngines
- 10Gb network adapter BladeEngine (EC 3210).
+++ /dev/null
-SERVER ENGINES 10Gbe NIC - BLADE-ENGINE
-P: Subbu Seetharaman
-M: subbus@serverengines.com
-L: netdev@vger.kernel.org
-W: http://www.serverengines.com
-S: Supported
+++ /dev/null
-#
-# Makefile to build the network driver for ServerEngine's BladeEngine
-#
-obj-$(CONFIG_BENET) += benet.o
-
-benet-y := be_init.o \
- be_int.o \
- be_netif.o \
- be_ethtool.o \
- funcobj.o \
- cq.o \
- eq.o \
- mpu.o \
- eth.o
+++ /dev/null
-TODO:
- - remove wrappers around common iowrite functions
- - full netdev audit of common problems/issues
-
-Please send all patches and questions to Subbu Seetharaman
-<subbus@serverengines.com> and Greg Kroah-Hartman <greg@kroah.com>
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * Autogenerated by srcgen version: 0127
- */
-#ifndef __asyncmesg_amap_h__
-#define __asyncmesg_amap_h__
-#include "fwcmd_common.h"
-
-/* --- ASYNC_EVENT_CODES --- */
-#define ASYNC_EVENT_CODE_LINK_STATE (1)
-#define ASYNC_EVENT_CODE_ISCSI (2)
-
-/* --- ASYNC_LINK_STATES --- */
-#define ASYNC_EVENT_LINK_DOWN (0) /* Link Down on a port */
-#define ASYNC_EVENT_LINK_UP (1) /* Link Up on a port */
-
-/*
- * The last 4 bytes of the async events have this common format. It allows
- * the driver to distinguish [link]MCC_CQ_ENTRY[/link] structs from
- * asynchronous events. Both arrive on the same completion queue. This
- * structure also contains the common fields used to decode the async event.
- */
-struct BE_ASYNC_EVENT_TRAILER_AMAP {
- u8 rsvd0[8]; /* DWORD 0 */
- u8 event_code[8]; /* DWORD 0 */
- u8 event_type[8]; /* DWORD 0 */
- u8 rsvd1[6]; /* DWORD 0 */
- u8 async_event; /* DWORD 0 */
- u8 valid; /* DWORD 0 */
-} __packed;
-struct ASYNC_EVENT_TRAILER_AMAP {
- u32 dw[1];
-};
-
-/*
- * Applicable in Initiator, Target and NIC modes.
- * A link state async event is seen by all device drivers as soon they
- * create an MCC ring. Thereafter, anytime the link status changes the
- * drivers will receive a link state async event. Notifications continue to
- * be sent until a driver destroys its MCC ring. A link down event is
- * reported when either port loses link. A link up event is reported
- * when either port regains link. When BE's failover mechanism is enabled, a
- * link down on the active port causes traffic to be diverted to the standby
- * port by the BE's ARM firmware (assuming the standby port has link). In
- * this case, the standy port assumes the active status. Note: when link is
- * restored on the failed port, traffic continues on the currently active
- * port. The ARM firmware does not attempt to 'fail back' traffic to
- * the restored port.
- */
-struct BE_ASYNC_EVENT_LINK_STATE_AMAP {
- u8 port0_link_status[8];
- u8 port1_link_status[8];
- u8 active_port[8];
- u8 rsvd0[8]; /* DWORD 0 */
- u8 port0_duplex[8];
- u8 port0_speed[8];
- u8 port1_duplex[8];
- u8 port1_speed[8];
- u8 port0_fault[8];
- u8 port1_fault[8];
- u8 rsvd1[2][8]; /* DWORD 2 */
- struct BE_ASYNC_EVENT_TRAILER_AMAP trailer;
-} __packed;
-struct ASYNC_EVENT_LINK_STATE_AMAP {
- u32 dw[4];
-};
-#endif /* __asyncmesg_amap_h__ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * Autogenerated by srcgen version: 0127
- */
-#ifndef __be_cm_amap_h__
-#define __be_cm_amap_h__
-#include "be_common.h"
-#include "etx_context.h"
-#include "mpu_context.h"
-
-/*
- * --- CEV_WATERMARK_ENUM ---
- * CQ/EQ Watermark Encodings. Encoded as number of free entries in
- * Queue when Watermark is reached.
- */
-#define CEV_WMARK_0 (0) /* Watermark when Queue full */
-#define CEV_WMARK_16 (1) /* Watermark at 16 free entries */
-#define CEV_WMARK_32 (2) /* Watermark at 32 free entries */
-#define CEV_WMARK_48 (3) /* Watermark at 48 free entries */
-#define CEV_WMARK_64 (4) /* Watermark at 64 free entries */
-#define CEV_WMARK_80 (5) /* Watermark at 80 free entries */
-#define CEV_WMARK_96 (6) /* Watermark at 96 free entries */
-#define CEV_WMARK_112 (7) /* Watermark at 112 free entries */
-#define CEV_WMARK_128 (8) /* Watermark at 128 free entries */
-#define CEV_WMARK_144 (9) /* Watermark at 144 free entries */
-#define CEV_WMARK_160 (10) /* Watermark at 160 free entries */
-#define CEV_WMARK_176 (11) /* Watermark at 176 free entries */
-#define CEV_WMARK_192 (12) /* Watermark at 192 free entries */
-#define CEV_WMARK_208 (13) /* Watermark at 208 free entries */
-#define CEV_WMARK_224 (14) /* Watermark at 224 free entries */
-#define CEV_WMARK_240 (15) /* Watermark at 240 free entries */
-
-/*
- * --- CQ_CNT_ENUM ---
- * Completion Queue Count Encodings.
- */
-#define CEV_CQ_CNT_256 (0) /* CQ has 256 entries */
-#define CEV_CQ_CNT_512 (1) /* CQ has 512 entries */
-#define CEV_CQ_CNT_1024 (2) /* CQ has 1024 entries */
-
-/*
- * --- EQ_CNT_ENUM ---
- * Event Queue Count Encodings.
- */
-#define CEV_EQ_CNT_256 (0) /* EQ has 256 entries (16-byte EQEs only) */
-#define CEV_EQ_CNT_512 (1) /* EQ has 512 entries (16-byte EQEs only) */
-#define CEV_EQ_CNT_1024 (2) /* EQ has 1024 entries (4-byte or */
- /* 16-byte EQEs only) */
-#define CEV_EQ_CNT_2048 (3) /* EQ has 2048 entries (4-byte or */
- /* 16-byte EQEs only) */
-#define CEV_EQ_CNT_4096 (4) /* EQ has 4096 entries (4-byte EQEs only) */
-
-/*
- * --- EQ_SIZE_ENUM ---
- * Event Queue Entry Size Encoding.
- */
-#define CEV_EQ_SIZE_4 (0) /* EQE is 4 bytes */
-#define CEV_EQ_SIZE_16 (1) /* EQE is 16 bytes */
-
-/*
- * Completion Queue Context Table Entry. Contains the state of a CQ.
- * Located in RAM within the CEV block.
- */
-struct BE_CQ_CONTEXT_AMAP {
- u8 Cidx[11]; /* DWORD 0 */
- u8 Watermark[4]; /* DWORD 0 */
- u8 NoDelay; /* DWORD 0 */
- u8 EPIdx[11]; /* DWORD 0 */
- u8 Count[2]; /* DWORD 0 */
- u8 valid; /* DWORD 0 */
- u8 SolEvent; /* DWORD 0 */
- u8 Eventable; /* DWORD 0 */
- u8 Pidx[11]; /* DWORD 1 */
- u8 PD[10]; /* DWORD 1 */
- u8 EQID[7]; /* DWORD 1 */
- u8 Func; /* DWORD 1 */
- u8 WME; /* DWORD 1 */
- u8 Stalled; /* DWORD 1 */
- u8 Armed; /* DWORD 1 */
-} __packed;
-struct CQ_CONTEXT_AMAP {
- u32 dw[2];
-};
-
-/*
- * Event Queue Context Table Entry. Contains the state of an EQ.
- * Located in RAM in the CEV block.
- */
-struct BE_EQ_CONTEXT_AMAP {
- u8 Cidx[13]; /* DWORD 0 */
- u8 rsvd0[2]; /* DWORD 0 */
- u8 Func; /* DWORD 0 */
- u8 EPIdx[13]; /* DWORD 0 */
- u8 valid; /* DWORD 0 */
- u8 rsvd1; /* DWORD 0 */
- u8 Size; /* DWORD 0 */
- u8 Pidx[13]; /* DWORD 1 */
- u8 rsvd2[3]; /* DWORD 1 */
- u8 PD[10]; /* DWORD 1 */
- u8 Count[3]; /* DWORD 1 */
- u8 SolEvent; /* DWORD 1 */
- u8 Stalled; /* DWORD 1 */
- u8 Armed; /* DWORD 1 */
- u8 Watermark[4]; /* DWORD 2 */
- u8 WME; /* DWORD 2 */
- u8 rsvd3[3]; /* DWORD 2 */
- u8 EventVect[6]; /* DWORD 2 */
- u8 rsvd4[2]; /* DWORD 2 */
- u8 Delay[8]; /* DWORD 2 */
- u8 rsvd5[6]; /* DWORD 2 */
- u8 TMR; /* DWORD 2 */
- u8 rsvd6; /* DWORD 2 */
- u8 rsvd7[32]; /* DWORD 3 */
-} __packed;
-struct EQ_CONTEXT_AMAP {
- u32 dw[4];
-};
-
-#endif /* __be_cm_amap_h__ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * Autogenerated by srcgen version: 0127
- */
-#ifndef __be_common_amap_h__
-#define __be_common_amap_h__
-
-/* Physical Address. */
-struct BE_PHYS_ADDR_AMAP {
- u8 lo[32]; /* DWORD 0 */
- u8 hi[32]; /* DWORD 1 */
-} __packed;
-struct PHYS_ADDR_AMAP {
- u32 dw[2];
-};
-
-/* Virtual Address. */
-struct BE_VIRT_ADDR_AMAP {
- u8 lo[32]; /* DWORD 0 */
- u8 hi[32]; /* DWORD 1 */
-} __packed;
-struct VIRT_ADDR_AMAP {
- u32 dw[2];
-};
-
-/* Scatter gather element. */
-struct BE_SGE_AMAP {
- u8 addr_hi[32]; /* DWORD 0 */
- u8 addr_lo[32]; /* DWORD 1 */
- u8 rsvd0[32]; /* DWORD 2 */
- u8 len[16]; /* DWORD 3 */
- u8 rsvd1[16]; /* DWORD 3 */
-} __packed;
-struct SGE_AMAP {
- u32 dw[4];
-};
-
-#endif /* __be_common_amap_h__ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * be_ethtool.c
- *
- * This file contains various functions that ethtool can use
- * to talk to the driver and the BE H/W.
- */
-
-#include "benet.h"
-
-#include <linux/ethtool.h>
-
-static const char benet_gstrings_stats[][ETH_GSTRING_LEN] = {
-/* net_device_stats */
- "rx_packets",
- "tx_packets",
- "rx_bytes",
- "tx_bytes",
- "rx_errors",
- "tx_errors",
- "rx_dropped",
- "tx_dropped",
- "multicast",
- "collisions",
- "rx_length_errors",
- "rx_over_errors",
- "rx_crc_errors",
- "rx_frame_errors",
- "rx_fifo_errors",
- "rx_missed_errors",
- "tx_aborted_errors",
- "tx_carrier_errors",
- "tx_fifo_errors",
- "tx_heartbeat_errors",
- "tx_window_errors",
- "rx_compressed",
- "tc_compressed",
-/* BE driver Stats */
- "bes_tx_reqs",
- "bes_tx_fails",
- "bes_fwd_reqs",
- "bes_tx_wrbs",
- "bes_interrupts",
- "bes_events",
- "bes_tx_events",
- "bes_rx_events",
- "bes_tx_compl",
- "bes_rx_compl",
- "bes_ethrx_post_fail",
- "bes_802_3_dropped_frames",
- "bes_802_3_malformed_frames",
- "bes_rx_misc_pkts",
- "bes_eth_tx_rate",
- "bes_eth_rx_rate",
- "Num Packets collected",
- "Num Times Flushed",
-};
-
-#define NET_DEV_STATS_LEN \
- (sizeof(struct net_device_stats)/sizeof(unsigned long))
-
-#define BENET_STATS_LEN ARRAY_SIZE(benet_gstrings_stats)
-
-static void
-be_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo)
-{
- struct be_net_object *pnob = netdev_priv(netdev);
- struct be_adapter *adapter = pnob->adapter;
-
- strncpy(drvinfo->driver, be_driver_name, 32);
- strncpy(drvinfo->version, be_drvr_ver, 32);
- strncpy(drvinfo->fw_version, be_fw_ver, 32);
- strcpy(drvinfo->bus_info, pci_name(adapter->pdev));
- drvinfo->testinfo_len = 0;
- drvinfo->regdump_len = 0;
- drvinfo->eedump_len = 0;
-}
-
-static int
-be_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *coalesce)
-{
- struct be_net_object *pnob = netdev_priv(netdev);
- struct be_adapter *adapter = pnob->adapter;
-
- coalesce->rx_max_coalesced_frames = adapter->max_rx_coal;
-
- coalesce->rx_coalesce_usecs = adapter->cur_eqd;
- coalesce->rx_coalesce_usecs_high = adapter->max_eqd;
- coalesce->rx_coalesce_usecs_low = adapter->min_eqd;
-
- coalesce->tx_coalesce_usecs = adapter->cur_eqd;
- coalesce->tx_coalesce_usecs_high = adapter->max_eqd;
- coalesce->tx_coalesce_usecs_low = adapter->min_eqd;
-
- coalesce->use_adaptive_rx_coalesce = adapter->enable_aic;
- coalesce->use_adaptive_tx_coalesce = adapter->enable_aic;
-
- return 0;
-}
-
-/*
- * This routine is used to set interrup coalescing delay *as well as*
- * the number of pkts to coalesce for LRO.
- */
-static int
-be_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *coalesce)
-{
- struct be_net_object *pnob = netdev_priv(netdev);
- struct be_adapter *adapter = pnob->adapter;
- struct be_eq_object *eq_objectp;
- u32 max, min, cur;
- int status;
-
- adapter->max_rx_coal = coalesce->rx_max_coalesced_frames;
- if (adapter->max_rx_coal >= BE_LRO_MAX_PKTS)
- adapter->max_rx_coal = BE_LRO_MAX_PKTS;
-
- if (adapter->enable_aic == 0 &&
- coalesce->use_adaptive_rx_coalesce == 1) {
- /* if AIC is being turned on now, start with an EQD of 0 */
- adapter->cur_eqd = 0;
- }
- adapter->enable_aic = coalesce->use_adaptive_rx_coalesce;
-
- /* round off to nearest multiple of 8 */
- max = (((coalesce->rx_coalesce_usecs_high + 4) >> 3) << 3);
- min = (((coalesce->rx_coalesce_usecs_low + 4) >> 3) << 3);
- cur = (((coalesce->rx_coalesce_usecs + 4) >> 3) << 3);
-
- if (adapter->enable_aic) {
- /* accept low and high if AIC is enabled */
- if (max > MAX_EQD)
- max = MAX_EQD;
- if (min > max)
- min = max;
- adapter->max_eqd = max;
- adapter->min_eqd = min;
- if (adapter->cur_eqd > max)
- adapter->cur_eqd = max;
- if (adapter->cur_eqd < min)
- adapter->cur_eqd = min;
- } else {
- /* accept specified coalesce_usecs only if AIC is disabled */
- if (cur > MAX_EQD)
- cur = MAX_EQD;
- eq_objectp = &pnob->event_q_obj;
- status =
- be_eq_modify_delay(&pnob->fn_obj, 1, &eq_objectp, &cur,
- NULL, NULL, NULL);
- if (status == BE_SUCCESS)
- adapter->cur_eqd = cur;
- }
- return 0;
-}
-
-static u32 be_get_rx_csum(struct net_device *netdev)
-{
- struct be_net_object *pnob = netdev_priv(netdev);
- struct be_adapter *adapter = pnob->adapter;
- return adapter->rx_csum;
-}
-
-static int be_set_rx_csum(struct net_device *netdev, uint32_t data)
-{
- struct be_net_object *pnob = netdev_priv(netdev);
- struct be_adapter *adapter = pnob->adapter;
-
- if (data)
- adapter->rx_csum = 1;
- else
- adapter->rx_csum = 0;
-
- return 0;
-}
-
-static void
-be_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
-{
- switch (stringset) {
- case ETH_SS_STATS:
- memcpy(data, *benet_gstrings_stats,
- sizeof(benet_gstrings_stats));
- break;
- }
-}
-
-static int be_get_stats_count(struct net_device *netdev)
-{
- return BENET_STATS_LEN;
-}
-
-static void
-be_get_ethtool_stats(struct net_device *netdev,
- struct ethtool_stats *stats, uint64_t *data)
-{
- struct be_net_object *pnob = netdev_priv(netdev);
- struct be_adapter *adapter = pnob->adapter;
- int i;
-
- benet_get_stats(netdev);
-
- for (i = 0; i <= NET_DEV_STATS_LEN; i++)
- data[i] = ((unsigned long *)&adapter->benet_stats)[i];
-
- data[i] = adapter->be_stat.bes_tx_reqs;
- data[i++] = adapter->be_stat.bes_tx_fails;
- data[i++] = adapter->be_stat.bes_fwd_reqs;
- data[i++] = adapter->be_stat.bes_tx_wrbs;
-
- data[i++] = adapter->be_stat.bes_ints;
- data[i++] = adapter->be_stat.bes_events;
- data[i++] = adapter->be_stat.bes_tx_events;
- data[i++] = adapter->be_stat.bes_rx_events;
- data[i++] = adapter->be_stat.bes_tx_compl;
- data[i++] = adapter->be_stat.bes_rx_compl;
- data[i++] = adapter->be_stat.bes_ethrx_post_fail;
- data[i++] = adapter->be_stat.bes_802_3_dropped_frames;
- data[i++] = adapter->be_stat.bes_802_3_malformed_frames;
- data[i++] = adapter->be_stat.bes_rx_misc_pkts;
- data[i++] = adapter->be_stat.bes_eth_tx_rate;
- data[i++] = adapter->be_stat.bes_eth_rx_rate;
- data[i++] = adapter->be_stat.bes_rx_coal;
- data[i++] = adapter->be_stat.bes_rx_flush;
-
-}
-
-static int be_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
-{
- ecmd->speed = SPEED_10000;
- ecmd->duplex = DUPLEX_FULL;
- ecmd->autoneg = AUTONEG_DISABLE;
- return 0;
-}
-
-/* Get the Ring parameters from the pnob */
-static void
-be_get_ringparam(struct net_device *netdev, struct ethtool_ringparam *ring)
-{
- struct be_net_object *pnob = netdev_priv(netdev);
-
- /* Pre Set Maxims */
- ring->rx_max_pending = pnob->rx_q_len;
- ring->rx_mini_max_pending = ring->rx_mini_max_pending;
- ring->rx_jumbo_max_pending = ring->rx_jumbo_max_pending;
- ring->tx_max_pending = pnob->tx_q_len;
-
- /* Current hardware Settings */
- ring->rx_pending = atomic_read(&pnob->rx_q_posted);
- ring->rx_mini_pending = ring->rx_mini_pending;
- ring->rx_jumbo_pending = ring->rx_jumbo_pending;
- ring->tx_pending = atomic_read(&pnob->tx_q_used);
-
-}
-
-static void
-be_get_pauseparam(struct net_device *netdev, struct ethtool_pauseparam *ecmd)
-{
- struct be_net_object *pnob = netdev_priv(netdev);
- bool rxfc, txfc;
- int status;
-
- status = be_eth_get_flow_control(&pnob->fn_obj, &txfc, &rxfc);
- if (status != BE_SUCCESS) {
- dev_info(&netdev->dev, "Unable to get pause frame settings\n");
- /* return defaults */
- ecmd->rx_pause = 1;
- ecmd->tx_pause = 0;
- ecmd->autoneg = AUTONEG_ENABLE;
- return;
- }
-
- if (txfc == true)
- ecmd->tx_pause = 1;
- else
- ecmd->tx_pause = 0;
-
- if (rxfc == true)
- ecmd->rx_pause = 1;
- else
- ecmd->rx_pause = 0;
-
- ecmd->autoneg = AUTONEG_ENABLE;
-}
-
-static int
-be_set_pauseparam(struct net_device *netdev, struct ethtool_pauseparam *ecmd)
-{
- struct be_net_object *pnob = netdev_priv(netdev);
- bool txfc, rxfc;
- int status;
-
- if (ecmd->autoneg != AUTONEG_ENABLE)
- return -EINVAL;
-
- if (ecmd->tx_pause)
- txfc = true;
- else
- txfc = false;
-
- if (ecmd->rx_pause)
- rxfc = true;
- else
- rxfc = false;
-
- status = be_eth_set_flow_control(&pnob->fn_obj, txfc, rxfc);
- if (status != BE_SUCCESS) {
- dev_info(&netdev->dev, "Unable to set pause frame settings\n");
- return -1;
- }
- return 0;
-}
-
-struct ethtool_ops be_ethtool_ops = {
- .get_settings = be_get_settings,
- .get_drvinfo = be_get_drvinfo,
- .get_link = ethtool_op_get_link,
- .get_coalesce = be_get_coalesce,
- .set_coalesce = be_set_coalesce,
- .get_ringparam = be_get_ringparam,
- .get_pauseparam = be_get_pauseparam,
- .set_pauseparam = be_set_pauseparam,
- .get_rx_csum = be_get_rx_csum,
- .set_rx_csum = be_set_rx_csum,
- .get_tx_csum = ethtool_op_get_tx_csum,
- .set_tx_csum = ethtool_op_set_tx_csum,
- .get_sg = ethtool_op_get_sg,
- .set_sg = ethtool_op_set_sg,
- .get_tso = ethtool_op_get_tso,
- .set_tso = ethtool_op_set_tso,
- .get_strings = be_get_strings,
- .get_stats_count = be_get_stats_count,
- .get_ethtool_stats = be_get_ethtool_stats,
-};
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-#include <linux/etherdevice.h>
-#include "benet.h"
-
-#define DRVR_VERSION "1.0.728"
-
-static const struct pci_device_id be_device_id_table[] = {
- {PCI_DEVICE(0x19a2, 0x0201)},
- {0}
-};
-
-MODULE_DEVICE_TABLE(pci, be_device_id_table);
-
-MODULE_VERSION(DRVR_VERSION);
-
-#define DRV_DESCRIPTION "ServerEngines BladeEngine Network Driver Version "
-
-MODULE_DESCRIPTION(DRV_DESCRIPTION DRVR_VERSION);
-MODULE_AUTHOR("ServerEngines");
-MODULE_LICENSE("GPL");
-
-static unsigned int msix = 1;
-module_param(msix, uint, S_IRUGO);
-MODULE_PARM_DESC(msix, "Use MSI-x interrupts");
-
-static unsigned int rxbuf_size = 2048; /* Default RX frag size */
-module_param(rxbuf_size, uint, S_IRUGO);
-MODULE_PARM_DESC(rxbuf_size, "Size of buffers to hold Rx data");
-
-const char be_drvr_ver[] = DRVR_VERSION;
-char be_fw_ver[32]; /* F/W version filled in by be_probe */
-char be_driver_name[] = "benet";
-
-/*
- * Number of entries in each queue.
- */
-#define EVENT_Q_LEN 1024
-#define ETH_TXQ_LEN 2048
-#define ETH_TXCQ_LEN 1024
-#define ETH_RXQ_LEN 1024 /* Does not support any other value */
-#define ETH_UC_RXCQ_LEN 1024
-#define ETH_BC_RXCQ_LEN 256
-#define MCC_Q_LEN 64 /* total size not to exceed 8 pages */
-#define MCC_CQ_LEN 256
-
-/* Bit mask describing events of interest to be traced */
-unsigned int trace_level;
-
-static int
-init_pci_be_function(struct be_adapter *adapter, struct pci_dev *pdev)
-{
- u64 pa;
-
- /* CSR */
- pa = pci_resource_start(pdev, 2);
- adapter->csr_va = ioremap_nocache(pa, pci_resource_len(pdev, 2));
- if (adapter->csr_va == NULL)
- return -ENOMEM;
-
- /* Door Bell */
- pa = pci_resource_start(pdev, 4);
- adapter->db_va = ioremap_nocache(pa, (128 * 1024));
- if (adapter->db_va == NULL) {
- iounmap(adapter->csr_va);
- return -ENOMEM;
- }
-
- /* PCI */
- pa = pci_resource_start(pdev, 1);
- adapter->pci_va = ioremap_nocache(pa, pci_resource_len(pdev, 1));
- if (adapter->pci_va == NULL) {
- iounmap(adapter->csr_va);
- iounmap(adapter->db_va);
- return -ENOMEM;
- }
- return 0;
-}
-
-/*
- This function enables the interrupt corresponding to the Event
- queue ID for the given NetObject
-*/
-void be_enable_eq_intr(struct be_net_object *pnob)
-{
- struct CQ_DB_AMAP cqdb;
- cqdb.dw[0] = 0;
- AMAP_SET_BITS_PTR(CQ_DB, event, &cqdb, 1);
- AMAP_SET_BITS_PTR(CQ_DB, rearm, &cqdb, 1);
- AMAP_SET_BITS_PTR(CQ_DB, num_popped, &cqdb, 0);
- AMAP_SET_BITS_PTR(CQ_DB, qid, &cqdb, pnob->event_q_id);
- PD_WRITE(&pnob->fn_obj, cq_db, cqdb.dw[0]);
-}
-
-/*
- This function disables the interrupt corresponding to the Event
- queue ID for the given NetObject
-*/
-void be_disable_eq_intr(struct be_net_object *pnob)
-{
- struct CQ_DB_AMAP cqdb;
- cqdb.dw[0] = 0;
- AMAP_SET_BITS_PTR(CQ_DB, event, &cqdb, 1);
- AMAP_SET_BITS_PTR(CQ_DB, rearm, &cqdb, 0);
- AMAP_SET_BITS_PTR(CQ_DB, num_popped, &cqdb, 0);
- AMAP_SET_BITS_PTR(CQ_DB, qid, &cqdb, pnob->event_q_id);
- PD_WRITE(&pnob->fn_obj, cq_db, cqdb.dw[0]);
-}
-
-/*
- This function enables the interrupt from the network function
- of the BladeEngine. Use the function be_disable_eq_intr()
- to enable the interrupt from the event queue of only one specific
- NetObject
-*/
-void be_enable_intr(struct be_net_object *pnob)
-{
- struct PCICFG_HOST_TIMER_INT_CTRL_CSR_AMAP ctrl;
- u32 host_intr;
-
- ctrl.dw[0] = PCICFG1_READ(&pnob->fn_obj, host_timer_int_ctrl);
- host_intr = AMAP_GET_BITS_PTR(PCICFG_HOST_TIMER_INT_CTRL_CSR,
- hostintr, ctrl.dw);
- if (!host_intr) {
- AMAP_SET_BITS_PTR(PCICFG_HOST_TIMER_INT_CTRL_CSR,
- hostintr, ctrl.dw, 1);
- PCICFG1_WRITE(&pnob->fn_obj, host_timer_int_ctrl,
- ctrl.dw[0]);
- }
-}
-
-/*
- This function disables the interrupt from the network function of
- the BladeEngine. Use the function be_disable_eq_intr() to
- disable the interrupt from the event queue of only one specific NetObject
-*/
-void be_disable_intr(struct be_net_object *pnob)
-{
-
- struct PCICFG_HOST_TIMER_INT_CTRL_CSR_AMAP ctrl;
- u32 host_intr;
- ctrl.dw[0] = PCICFG1_READ(&pnob->fn_obj, host_timer_int_ctrl);
- host_intr = AMAP_GET_BITS_PTR(PCICFG_HOST_TIMER_INT_CTRL_CSR,
- hostintr, ctrl.dw);
- if (host_intr) {
- AMAP_SET_BITS_PTR(PCICFG_HOST_TIMER_INT_CTRL_CSR, hostintr,
- ctrl.dw, 0);
- PCICFG1_WRITE(&pnob->fn_obj, host_timer_int_ctrl,
- ctrl.dw[0]);
- }
-}
-
-static int be_enable_msix(struct be_adapter *adapter)
-{
- int i, ret;
-
- if (!msix)
- return -1;
-
- for (i = 0; i < BE_MAX_REQ_MSIX_VECTORS; i++)
- adapter->msix_entries[i].entry = i;
-
- ret = pci_enable_msix(adapter->pdev, adapter->msix_entries,
- BE_MAX_REQ_MSIX_VECTORS);
-
- if (ret == 0)
- adapter->msix_enabled = 1;
- return ret;
-}
-
-static int be_register_isr(struct be_adapter *adapter,
- struct be_net_object *pnob)
-{
- struct net_device *netdev = pnob->netdev;
- int intx = 0, r;
-
- netdev->irq = adapter->pdev->irq;
- r = be_enable_msix(adapter);
-
- if (r == 0) {
- r = request_irq(adapter->msix_entries[0].vector,
- be_int, IRQF_SHARED, netdev->name, netdev);
- if (r) {
- printk(KERN_WARNING
- "MSIX Request IRQ failed - Errno %d\n", r);
- intx = 1;
- pci_disable_msix(adapter->pdev);
- adapter->msix_enabled = 0;
- }
- } else {
- intx = 1;
- }
-
- if (intx) {
- r = request_irq(netdev->irq, be_int, IRQF_SHARED,
- netdev->name, netdev);
- if (r) {
- printk(KERN_WARNING
- "INTx Request IRQ failed - Errno %d\n", r);
- return -1;
- }
- }
- adapter->isr_registered = 1;
- return 0;
-}
-
-static void be_unregister_isr(struct be_adapter *adapter)
-{
- struct net_device *netdev = adapter->netdevp;
- if (adapter->isr_registered) {
- if (adapter->msix_enabled) {
- free_irq(adapter->msix_entries[0].vector, netdev);
- pci_disable_msix(adapter->pdev);
- adapter->msix_enabled = 0;
- } else {
- free_irq(netdev->irq, netdev);
- }
- adapter->isr_registered = 0;
- }
-}
-
-/*
- This function processes the Flush Completions that are issued by the
- ARM F/W, when a Recv Ring is destroyed. A flush completion is
- identified when a Rx COmpl descriptor has the tcpcksum and udpcksum
- set and the pktsize is 32. These completions are received on the
- Rx Completion Queue.
-*/
-static u32 be_process_rx_flush_cmpl(struct be_net_object *pnob)
-{
- struct ETH_RX_COMPL_AMAP *rxcp;
- unsigned int i = 0;
- while ((rxcp = be_get_rx_cmpl(pnob)) != NULL) {
- be_notify_cmpl(pnob, 1, pnob->rx_cq_id, 1);
- i++;
- }
- return i;
-}
-
-static void be_tx_q_clean(struct be_net_object *pnob)
-{
- while (atomic_read(&pnob->tx_q_used))
- process_one_tx_compl(pnob, tx_compl_lastwrb_idx_get(pnob));
-}
-
-static void be_rx_q_clean(struct be_net_object *pnob)
-{
- if (pnob->rx_ctxt) {
- int i;
- struct be_rx_page_info *rx_page_info;
- for (i = 0; i < pnob->rx_q_len; i++) {
- rx_page_info = &(pnob->rx_page_info[i]);
- if (!pnob->rx_pg_shared || rx_page_info->page_offset) {
- pci_unmap_page(pnob->adapter->pdev,
- pci_unmap_addr(rx_page_info, bus),
- pnob->rx_buf_size,
- PCI_DMA_FROMDEVICE);
- }
- if (rx_page_info->page)
- put_page(rx_page_info->page);
- memset(rx_page_info, 0, sizeof(struct be_rx_page_info));
- }
- pnob->rx_pg_info_hd = 0;
- }
-}
-
-static void be_destroy_netobj(struct be_net_object *pnob)
-{
- int status;
-
- if (pnob->tx_q_created) {
- status = be_eth_sq_destroy(&pnob->tx_q_obj);
- pnob->tx_q_created = 0;
- }
-
- if (pnob->rx_q_created) {
- status = be_eth_rq_destroy(&pnob->rx_q_obj);
- if (status != 0) {
- status = be_eth_rq_destroy_options(&pnob->rx_q_obj, 0,
- NULL, NULL);
- BUG_ON(status);
- }
- pnob->rx_q_created = 0;
- }
-
- be_process_rx_flush_cmpl(pnob);
-
- if (pnob->tx_cq_created) {
- status = be_cq_destroy(&pnob->tx_cq_obj);
- pnob->tx_cq_created = 0;
- }
-
- if (pnob->rx_cq_created) {
- status = be_cq_destroy(&pnob->rx_cq_obj);
- pnob->rx_cq_created = 0;
- }
-
- if (pnob->mcc_q_created) {
- status = be_mcc_ring_destroy(&pnob->mcc_q_obj);
- pnob->mcc_q_created = 0;
- }
- if (pnob->mcc_cq_created) {
- status = be_cq_destroy(&pnob->mcc_cq_obj);
- pnob->mcc_cq_created = 0;
- }
-
- if (pnob->event_q_created) {
- status = be_eq_destroy(&pnob->event_q_obj);
- pnob->event_q_created = 0;
- }
- be_function_cleanup(&pnob->fn_obj);
-}
-
-/*
- * free all resources associated with a pnob
- * Called at the time of module cleanup as well a any error during
- * module init. Some resources may be partially allocated in a NetObj.
- */
-static void netobject_cleanup(struct be_adapter *adapter,
- struct be_net_object *pnob)
-{
- struct net_device *netdev = adapter->netdevp;
-
- if (netif_running(netdev)) {
- netif_stop_queue(netdev);
- be_wait_nic_tx_cmplx_cmpl(pnob);
- be_disable_eq_intr(pnob);
- }
-
- be_unregister_isr(adapter);
-
- if (adapter->tasklet_started) {
- tasklet_kill(&(adapter->sts_handler));
- adapter->tasklet_started = 0;
- }
- if (pnob->fn_obj_created)
- be_disable_intr(pnob);
-
- if (adapter->dev_state != BE_DEV_STATE_NONE)
- unregister_netdev(netdev);
-
- if (pnob->fn_obj_created)
- be_destroy_netobj(pnob);
-
- adapter->net_obj = NULL;
- adapter->netdevp = NULL;
-
- be_rx_q_clean(pnob);
- if (pnob->rx_ctxt) {
- kfree(pnob->rx_page_info);
- kfree(pnob->rx_ctxt);
- }
-
- be_tx_q_clean(pnob);
- kfree(pnob->tx_ctxt);
-
- if (pnob->mcc_q)
- pci_free_consistent(adapter->pdev, pnob->mcc_q_size,
- pnob->mcc_q, pnob->mcc_q_bus);
-
- if (pnob->mcc_wrb_ctxt)
- free_pages((unsigned long)pnob->mcc_wrb_ctxt,
- get_order(pnob->mcc_wrb_ctxt_size));
-
- if (pnob->mcc_cq)
- pci_free_consistent(adapter->pdev, pnob->mcc_cq_size,
- pnob->mcc_cq, pnob->mcc_cq_bus);
-
- if (pnob->event_q)
- pci_free_consistent(adapter->pdev, pnob->event_q_size,
- pnob->event_q, pnob->event_q_bus);
-
- if (pnob->tx_cq)
- pci_free_consistent(adapter->pdev, pnob->tx_cq_size,
- pnob->tx_cq, pnob->tx_cq_bus);
-
- if (pnob->tx_q)
- pci_free_consistent(adapter->pdev, pnob->tx_q_size,
- pnob->tx_q, pnob->tx_q_bus);
-
- if (pnob->rx_q)
- pci_free_consistent(adapter->pdev, pnob->rx_q_size,
- pnob->rx_q, pnob->rx_q_bus);
-
- if (pnob->rx_cq)
- pci_free_consistent(adapter->pdev, pnob->rx_cq_size,
- pnob->rx_cq, pnob->rx_cq_bus);
-
-
- if (pnob->mb_ptr)
- pci_free_consistent(adapter->pdev, pnob->mb_size, pnob->mb_ptr,
- pnob->mb_bus);
-
- free_netdev(netdev);
-}
-
-
-static int be_nob_ring_alloc(struct be_adapter *adapter,
- struct be_net_object *pnob)
-{
- u32 size;
-
- /* Mail box rd; mailbox pointer needs to be 16 byte aligned */
- pnob->mb_size = sizeof(struct MCC_MAILBOX_AMAP) + 16;
- pnob->mb_ptr = pci_alloc_consistent(adapter->pdev, pnob->mb_size,
- &pnob->mb_bus);
- if (!pnob->mb_bus)
- return -1;
- memset(pnob->mb_ptr, 0, pnob->mb_size);
- pnob->mb_rd.va = PTR_ALIGN(pnob->mb_ptr, 16);
- pnob->mb_rd.pa = PTR_ALIGN(pnob->mb_bus, 16);
- pnob->mb_rd.length = sizeof(struct MCC_MAILBOX_AMAP);
- /*
- * Event queue
- */
- pnob->event_q_len = EVENT_Q_LEN;
- pnob->event_q_size = pnob->event_q_len * sizeof(struct EQ_ENTRY_AMAP);
- pnob->event_q = pci_alloc_consistent(adapter->pdev, pnob->event_q_size,
- &pnob->event_q_bus);
- if (!pnob->event_q_bus)
- return -1;
- memset(pnob->event_q, 0, pnob->event_q_size);
- /*
- * Eth TX queue
- */
- pnob->tx_q_len = ETH_TXQ_LEN;
- pnob->tx_q_port = 0;
- pnob->tx_q_size = pnob->tx_q_len * sizeof(struct ETH_WRB_AMAP);
- pnob->tx_q = pci_alloc_consistent(adapter->pdev, pnob->tx_q_size,
- &pnob->tx_q_bus);
- if (!pnob->tx_q_bus)
- return -1;
- memset(pnob->tx_q, 0, pnob->tx_q_size);
- /*
- * Eth TX Compl queue
- */
- pnob->txcq_len = ETH_TXCQ_LEN;
- pnob->tx_cq_size = pnob->txcq_len * sizeof(struct ETH_TX_COMPL_AMAP);
- pnob->tx_cq = pci_alloc_consistent(adapter->pdev, pnob->tx_cq_size,
- &pnob->tx_cq_bus);
- if (!pnob->tx_cq_bus)
- return -1;
- memset(pnob->tx_cq, 0, pnob->tx_cq_size);
- /*
- * Eth RX queue
- */
- pnob->rx_q_len = ETH_RXQ_LEN;
- pnob->rx_q_size = pnob->rx_q_len * sizeof(struct ETH_RX_D_AMAP);
- pnob->rx_q = pci_alloc_consistent(adapter->pdev, pnob->rx_q_size,
- &pnob->rx_q_bus);
- if (!pnob->rx_q_bus)
- return -1;
- memset(pnob->rx_q, 0, pnob->rx_q_size);
- /*
- * Eth Unicast RX Compl queue
- */
- pnob->rx_cq_len = ETH_UC_RXCQ_LEN;
- pnob->rx_cq_size = pnob->rx_cq_len *
- sizeof(struct ETH_RX_COMPL_AMAP);
- pnob->rx_cq = pci_alloc_consistent(adapter->pdev, pnob->rx_cq_size,
- &pnob->rx_cq_bus);
- if (!pnob->rx_cq_bus)
- return -1;
- memset(pnob->rx_cq, 0, pnob->rx_cq_size);
-
- /* TX resources */
- size = pnob->tx_q_len * sizeof(void **);
- pnob->tx_ctxt = kzalloc(size, GFP_KERNEL);
- if (pnob->tx_ctxt == NULL)
- return -1;
-
- /* RX resources */
- size = pnob->rx_q_len * sizeof(void *);
- pnob->rx_ctxt = kzalloc(size, GFP_KERNEL);
- if (pnob->rx_ctxt == NULL)
- return -1;
-
- size = (pnob->rx_q_len * sizeof(struct be_rx_page_info));
- pnob->rx_page_info = kzalloc(size, GFP_KERNEL);
- if (pnob->rx_page_info == NULL)
- return -1;
-
- adapter->eth_statsp = kzalloc(sizeof(struct FWCMD_ETH_GET_STATISTICS),
- GFP_KERNEL);
- if (adapter->eth_statsp == NULL)
- return -1;
- pnob->rx_buf_size = rxbuf_size;
- return 0;
-}
-
-/*
- This function initializes the be_net_object for subsequent
- network operations.
-
- Before calling this function, the driver must have allocated
- space for the NetObject structure, initialized the structure,
- allocated DMAable memory for all the network queues that form
- part of the NetObject and populated the start address (virtual)
- and number of entries allocated for each queue in the NetObject structure.
-
- The driver must also have allocated memory to hold the
- mailbox structure (MCC_MAILBOX) and post the physical address,
- virtual addresses and the size of the mailbox memory in the
- NetObj.mb_rd. This structure is used by BECLIB for
- initial communication with the embedded MCC processor. BECLIB
- uses the mailbox until MCC rings are created for more efficient
- communication with the MCC processor.
-
- If the driver wants to create multiple network interface for more
- than one protection domain, it can call be_create_netobj()
- multiple times once for each protection domain. A Maximum of
- 32 protection domains are supported.
-
-*/
-static int
-be_create_netobj(struct be_net_object *pnob, u8 __iomem *csr_va,
- u8 __iomem *db_va, u8 __iomem *pci_va)
-{
- int status = 0;
- bool eventable = false, tx_no_delay = false, rx_no_delay = false;
- struct be_eq_object *eq_objectp = NULL;
- struct be_function_object *pfob = &pnob->fn_obj;
- struct ring_desc rd;
- u32 set_rxbuf_size;
- u32 tx_cmpl_wm = CEV_WMARK_96; /* 0xffffffff to disable */
- u32 rx_cmpl_wm = CEV_WMARK_160; /* 0xffffffff to disable */
- u32 eq_delay = 0; /* delay in 8usec units. 0xffffffff to disable */
-
- memset(&rd, 0, sizeof(struct ring_desc));
-
- status = be_function_object_create(csr_va, db_va, pci_va,
- BE_FUNCTION_TYPE_NETWORK, &pnob->mb_rd, pfob);
- if (status != BE_SUCCESS)
- return status;
- pnob->fn_obj_created = true;
-
- if (tx_cmpl_wm == 0xffffffff)
- tx_no_delay = true;
- if (rx_cmpl_wm == 0xffffffff)
- rx_no_delay = true;
- /*
- * now create the necessary rings
- * Event Queue first.
- */
- if (pnob->event_q_len) {
- rd.va = pnob->event_q;
- rd.pa = pnob->event_q_bus;
- rd.length = pnob->event_q_size;
-
- status = be_eq_create(pfob, &rd, 4, pnob->event_q_len,
- (u32) -1, /* CEV_WMARK_* or -1 */
- eq_delay, /* in 8us units, or -1 */
- &pnob->event_q_obj);
- if (status != BE_SUCCESS)
- goto error_ret;
- pnob->event_q_id = pnob->event_q_obj.eq_id;
- pnob->event_q_created = 1;
- eventable = true;
- eq_objectp = &pnob->event_q_obj;
- }
- /*
- * Now Eth Tx Compl. queue.
- */
- if (pnob->txcq_len) {
- rd.va = pnob->tx_cq;
- rd.pa = pnob->tx_cq_bus;
- rd.length = pnob->tx_cq_size;
-
- status = be_cq_create(pfob, &rd,
- pnob->txcq_len * sizeof(struct ETH_TX_COMPL_AMAP),
- false, /* solicted events, */
- tx_no_delay, /* nodelay */
- tx_cmpl_wm, /* Watermark encodings */
- eq_objectp, &pnob->tx_cq_obj);
- if (status != BE_SUCCESS)
- goto error_ret;
-
- pnob->tx_cq_id = pnob->tx_cq_obj.cq_id;
- pnob->tx_cq_created = 1;
- }
- /*
- * Eth Tx queue
- */
- if (pnob->tx_q_len) {
- struct be_eth_sq_parameters ex_params = { 0 };
- u32 type;
-
- if (pnob->tx_q_port) {
- /* TXQ to be bound to a specific port */
- type = BE_ETH_TX_RING_TYPE_BOUND;
- ex_params.port = pnob->tx_q_port - 1;
- } else
- type = BE_ETH_TX_RING_TYPE_STANDARD;
-
- rd.va = pnob->tx_q;
- rd.pa = pnob->tx_q_bus;
- rd.length = pnob->tx_q_size;
-
- status = be_eth_sq_create_ex(pfob, &rd,
- pnob->tx_q_len * sizeof(struct ETH_WRB_AMAP),
- type, 2, &pnob->tx_cq_obj,
- &ex_params, &pnob->tx_q_obj);
-
- if (status != BE_SUCCESS)
- goto error_ret;
-
- pnob->tx_q_id = pnob->tx_q_obj.bid;
- pnob->tx_q_created = 1;
- }
- /*
- * Now Eth Rx compl. queue. Always needed.
- */
- rd.va = pnob->rx_cq;
- rd.pa = pnob->rx_cq_bus;
- rd.length = pnob->rx_cq_size;
-
- status = be_cq_create(pfob, &rd,
- pnob->rx_cq_len * sizeof(struct ETH_RX_COMPL_AMAP),
- false, /* solicted events, */
- rx_no_delay, /* nodelay */
- rx_cmpl_wm, /* Watermark encodings */
- eq_objectp, &pnob->rx_cq_obj);
- if (status != BE_SUCCESS)
- goto error_ret;
-
- pnob->rx_cq_id = pnob->rx_cq_obj.cq_id;
- pnob->rx_cq_created = 1;
-
- status = be_eth_rq_set_frag_size(pfob, pnob->rx_buf_size,
- (u32 *) &set_rxbuf_size);
- if (status != BE_SUCCESS) {
- be_eth_rq_get_frag_size(pfob, (u32 *) &pnob->rx_buf_size);
- if ((pnob->rx_buf_size != 2048) && (pnob->rx_buf_size != 4096)
- && (pnob->rx_buf_size != 8192))
- goto error_ret;
- } else {
- if (pnob->rx_buf_size != set_rxbuf_size)
- pnob->rx_buf_size = set_rxbuf_size;
- }
- /*
- * Eth RX queue. be_eth_rq_create() always assumes 2 pages size
- */
- rd.va = pnob->rx_q;
- rd.pa = pnob->rx_q_bus;
- rd.length = pnob->rx_q_size;
-
- status = be_eth_rq_create(pfob, &rd, &pnob->rx_cq_obj,
- &pnob->rx_cq_obj, &pnob->rx_q_obj);
-
- if (status != BE_SUCCESS)
- goto error_ret;
-
- pnob->rx_q_id = pnob->rx_q_obj.rid;
- pnob->rx_q_created = 1;
-
- return BE_SUCCESS; /* All required queues created. */
-
-error_ret:
- be_destroy_netobj(pnob);
- return status;
-}
-
-static int be_nob_ring_init(struct be_adapter *adapter,
- struct be_net_object *pnob)
-{
- int status;
-
- pnob->event_q_tl = 0;
-
- pnob->tx_q_hd = 0;
- pnob->tx_q_tl = 0;
-
- pnob->tx_cq_tl = 0;
-
- pnob->rx_cq_tl = 0;
-
- memset(pnob->event_q, 0, pnob->event_q_size);
- memset(pnob->tx_cq, 0, pnob->tx_cq_size);
- memset(pnob->tx_ctxt, 0, pnob->tx_q_len * sizeof(void **));
- memset(pnob->rx_ctxt, 0, pnob->rx_q_len * sizeof(void *));
- pnob->rx_pg_info_hd = 0;
- pnob->rx_q_hd = 0;
- atomic_set(&pnob->rx_q_posted, 0);
-
- status = be_create_netobj(pnob, adapter->csr_va, adapter->db_va,
- adapter->pci_va);
- if (status != BE_SUCCESS)
- return -1;
-
- be_post_eth_rx_buffs(pnob);
- return 0;
-}
-
-/* This function handles async callback for link status */
-static void
-be_link_status_async_callback(void *context, u32 event_code, void *event)
-{
- struct ASYNC_EVENT_LINK_STATE_AMAP *link_status = event;
- struct be_adapter *adapter = context;
- bool link_enable = false;
- struct be_net_object *pnob;
- struct ASYNC_EVENT_TRAILER_AMAP *async_trailer;
- struct net_device *netdev;
- u32 async_event_code, async_event_type, active_port;
- u32 port0_link_status, port1_link_status, port0_duplex, port1_duplex;
- u32 port0_speed, port1_speed;
-
- if (event_code != ASYNC_EVENT_CODE_LINK_STATE) {
- /* Not our event to handle */
- return;
- }
- async_trailer = (struct ASYNC_EVENT_TRAILER_AMAP *)
- ((u8 *) event + sizeof(struct MCC_CQ_ENTRY_AMAP) -
- sizeof(struct ASYNC_EVENT_TRAILER_AMAP));
-
- async_event_code = AMAP_GET_BITS_PTR(ASYNC_EVENT_TRAILER, event_code,
- async_trailer);
- BUG_ON(async_event_code != ASYNC_EVENT_CODE_LINK_STATE);
-
- pnob = adapter->net_obj;
- netdev = pnob->netdev;
-
- /* Determine if this event is a switch VLD or a physical link event */
- async_event_type = AMAP_GET_BITS_PTR(ASYNC_EVENT_TRAILER, event_type,
- async_trailer);
- active_port = AMAP_GET_BITS_PTR(ASYNC_EVENT_LINK_STATE,
- active_port, link_status);
- port0_link_status = AMAP_GET_BITS_PTR(ASYNC_EVENT_LINK_STATE,
- port0_link_status, link_status);
- port1_link_status = AMAP_GET_BITS_PTR(ASYNC_EVENT_LINK_STATE,
- port1_link_status, link_status);
- port0_duplex = AMAP_GET_BITS_PTR(ASYNC_EVENT_LINK_STATE,
- port0_duplex, link_status);
- port1_duplex = AMAP_GET_BITS_PTR(ASYNC_EVENT_LINK_STATE,
- port1_duplex, link_status);
- port0_speed = AMAP_GET_BITS_PTR(ASYNC_EVENT_LINK_STATE,
- port0_speed, link_status);
- port1_speed = AMAP_GET_BITS_PTR(ASYNC_EVENT_LINK_STATE,
- port1_speed, link_status);
- if (async_event_type == NTWK_LINK_TYPE_VIRTUAL) {
- adapter->be_stat.bes_link_change_virtual++;
- if (adapter->be_link_sts->active_port != active_port) {
- dev_notice(&netdev->dev,
- "Active port changed due to VLD on switch\n");
- } else {
- dev_notice(&netdev->dev, "Link status update\n");
- }
-
- } else {
- adapter->be_stat.bes_link_change_physical++;
- if (adapter->be_link_sts->active_port != active_port) {
- dev_notice(&netdev->dev,
- "Active port changed due to port link"
- " status change\n");
- } else {
- dev_notice(&netdev->dev, "Link status update\n");
- }
- }
-
- memset(adapter->be_link_sts, 0, sizeof(adapter->be_link_sts));
-
- if ((port0_link_status == ASYNC_EVENT_LINK_UP) ||
- (port1_link_status == ASYNC_EVENT_LINK_UP)) {
- if ((adapter->port0_link_sts == BE_PORT_LINK_DOWN) &&
- (adapter->port1_link_sts == BE_PORT_LINK_DOWN)) {
- /* Earlier both the ports are down So link is up */
- link_enable = true;
- }
-
- if (port0_link_status == ASYNC_EVENT_LINK_UP) {
- adapter->port0_link_sts = BE_PORT_LINK_UP;
- adapter->be_link_sts->mac0_duplex = port0_duplex;
- adapter->be_link_sts->mac0_speed = port0_speed;
- if (active_port == NTWK_PORT_A)
- adapter->be_link_sts->active_port = 0;
- } else
- adapter->port0_link_sts = BE_PORT_LINK_DOWN;
-
- if (port1_link_status == ASYNC_EVENT_LINK_UP) {
- adapter->port1_link_sts = BE_PORT_LINK_UP;
- adapter->be_link_sts->mac1_duplex = port1_duplex;
- adapter->be_link_sts->mac1_speed = port1_speed;
- if (active_port == NTWK_PORT_B)
- adapter->be_link_sts->active_port = 1;
- } else
- adapter->port1_link_sts = BE_PORT_LINK_DOWN;
-
- printk(KERN_INFO "Link Properties for %s:\n", netdev->name);
- dev_info(&netdev->dev, "Link Properties:\n");
- be_print_link_info(adapter->be_link_sts);
-
- if (!link_enable)
- return;
- /*
- * Both ports were down previously, but atleast one of
- * them has come up if this netdevice's carrier is not up,
- * then indicate to stack
- */
- if (!netif_carrier_ok(netdev)) {
- netif_start_queue(netdev);
- netif_carrier_on(netdev);
- }
- return;
- }
-
- /* Now both the ports are down. Tell the stack about it */
- dev_info(&netdev->dev, "Both ports are down\n");
- adapter->port0_link_sts = BE_PORT_LINK_DOWN;
- adapter->port1_link_sts = BE_PORT_LINK_DOWN;
- if (netif_carrier_ok(netdev)) {
- netif_carrier_off(netdev);
- netif_stop_queue(netdev);
- }
- return;
-}
-
-static int be_mcc_create(struct be_adapter *adapter)
-{
- struct be_net_object *pnob;
-
- pnob = adapter->net_obj;
- /*
- * Create the MCC ring so that all further communication with
- * MCC can go thru the ring. we do this at the end since
- * we do not want to be dealing with interrupts until the
- * initialization is complete.
- */
- pnob->mcc_q_len = MCC_Q_LEN;
- pnob->mcc_q_size = pnob->mcc_q_len * sizeof(struct MCC_WRB_AMAP);
- pnob->mcc_q = pci_alloc_consistent(adapter->pdev, pnob->mcc_q_size,
- &pnob->mcc_q_bus);
- if (!pnob->mcc_q_bus)
- return -1;
- /*
- * space for MCC WRB context
- */
- pnob->mcc_wrb_ctxtLen = MCC_Q_LEN;
- pnob->mcc_wrb_ctxt_size = pnob->mcc_wrb_ctxtLen *
- sizeof(struct be_mcc_wrb_context);
- pnob->mcc_wrb_ctxt = (void *)__get_free_pages(GFP_KERNEL,
- get_order(pnob->mcc_wrb_ctxt_size));
- if (pnob->mcc_wrb_ctxt == NULL)
- return -1;
- /*
- * Space for MCC compl. ring
- */
- pnob->mcc_cq_len = MCC_CQ_LEN;
- pnob->mcc_cq_size = pnob->mcc_cq_len * sizeof(struct MCC_CQ_ENTRY_AMAP);
- pnob->mcc_cq = pci_alloc_consistent(adapter->pdev, pnob->mcc_cq_size,
- &pnob->mcc_cq_bus);
- if (!pnob->mcc_cq_bus)
- return -1;
- return 0;
-}
-
-/*
- This function creates the MCC request and completion ring required
- for communicating with the ARM processor. The caller must have
- allocated required amount of memory for the MCC ring and MCC
- completion ring and posted the virtual address and number of
- entries in the corresponding members (mcc_q and mcc_cq) in the
- NetObject struture.
-
- When this call is completed, all further communication with
- ARM will switch from mailbox to this ring.
-
- pnob - Pointer to the NetObject structure. This NetObject should
- have been created using a previous call to be_create_netobj()
-*/
-int be_create_mcc_rings(struct be_net_object *pnob)
-{
- int status = 0;
- struct ring_desc rd;
- struct be_function_object *pfob = &pnob->fn_obj;
-
- memset(&rd, 0, sizeof(struct ring_desc));
- if (pnob->mcc_cq_len) {
- rd.va = pnob->mcc_cq;
- rd.pa = pnob->mcc_cq_bus;
- rd.length = pnob->mcc_cq_size;
-
- status = be_cq_create(pfob, &rd,
- pnob->mcc_cq_len * sizeof(struct MCC_CQ_ENTRY_AMAP),
- false, /* solicted events, */
- true, /* nodelay */
- 0, /* 0 Watermark since Nodelay is true */
- &pnob->event_q_obj,
- &pnob->mcc_cq_obj);
-
- if (status != BE_SUCCESS)
- return status;
-
- pnob->mcc_cq_id = pnob->mcc_cq_obj.cq_id;
- pnob->mcc_cq_created = 1;
- }
- if (pnob->mcc_q_len) {
- rd.va = pnob->mcc_q;
- rd.pa = pnob->mcc_q_bus;
- rd.length = pnob->mcc_q_size;
-
- status = be_mcc_ring_create(pfob, &rd,
- pnob->mcc_q_len * sizeof(struct MCC_WRB_AMAP),
- pnob->mcc_wrb_ctxt, pnob->mcc_wrb_ctxtLen,
- &pnob->mcc_cq_obj, &pnob->mcc_q_obj);
-
- if (status != BE_SUCCESS)
- return status;
-
- pnob->mcc_q_created = 1;
- }
- return BE_SUCCESS;
-}
-
-static int be_mcc_init(struct be_adapter *adapter)
-{
- u32 r;
- struct be_net_object *pnob;
-
- pnob = adapter->net_obj;
- memset(pnob->mcc_q, 0, pnob->mcc_q_size);
- pnob->mcc_q_hd = 0;
-
- memset(pnob->mcc_wrb_ctxt, 0, pnob->mcc_wrb_ctxt_size);
-
- memset(pnob->mcc_cq, 0, pnob->mcc_cq_size);
- pnob->mcc_cq_tl = 0;
-
- r = be_create_mcc_rings(adapter->net_obj);
- if (r != BE_SUCCESS)
- return -1;
-
- return 0;
-}
-
-static void be_remove(struct pci_dev *pdev)
-{
- struct be_net_object *pnob;
- struct be_adapter *adapter;
-
- adapter = pci_get_drvdata(pdev);
- if (!adapter)
- return;
-
- pci_set_drvdata(pdev, NULL);
- pnob = (struct be_net_object *)adapter->net_obj;
-
- flush_scheduled_work();
-
- if (pnob) {
- /* Unregister async callback function for link status updates */
- if (pnob->mcc_q_created)
- be_mcc_add_async_event_callback(&pnob->mcc_q_obj,
- NULL, NULL);
- netobject_cleanup(adapter, pnob);
- }
-
- if (adapter->csr_va)
- iounmap(adapter->csr_va);
- if (adapter->db_va)
- iounmap(adapter->db_va);
- if (adapter->pci_va)
- iounmap(adapter->pci_va);
-
- pci_release_regions(adapter->pdev);
- pci_disable_device(adapter->pdev);
-
- kfree(adapter->be_link_sts);
- kfree(adapter->eth_statsp);
-
- if (adapter->timer_ctxt.get_stats_timer.function)
- del_timer_sync(&adapter->timer_ctxt.get_stats_timer);
- kfree(adapter);
-}
-
-/*
- * This function is called by the PCI sub-system when it finds a PCI
- * device with dev/vendor IDs that match with one of our devices.
- * All of the driver initialization is done in this function.
- */
-static int be_probe(struct pci_dev *pdev, const struct pci_device_id *pdev_id)
-{
- int status = 0;
- struct be_adapter *adapter;
- struct FWCMD_COMMON_GET_FW_VERSION_RESPONSE_PAYLOAD get_fwv;
- struct be_net_object *pnob;
- struct net_device *netdev;
-
- status = pci_enable_device(pdev);
- if (status)
- goto error;
-
- status = pci_request_regions(pdev, be_driver_name);
- if (status)
- goto error_pci_req;
-
- pci_set_master(pdev);
- adapter = kzalloc(sizeof(struct be_adapter), GFP_KERNEL);
- if (adapter == NULL) {
- status = -ENOMEM;
- goto error_adapter;
- }
- adapter->dev_state = BE_DEV_STATE_NONE;
- adapter->pdev = pdev;
- pci_set_drvdata(pdev, adapter);
-
- adapter->enable_aic = 1;
- adapter->max_eqd = MAX_EQD;
- adapter->min_eqd = 0;
- adapter->cur_eqd = 0;
-
- status = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
- if (!status) {
- adapter->dma_64bit_cap = true;
- } else {
- adapter->dma_64bit_cap = false;
- status = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
- if (status != 0) {
- printk(KERN_ERR "Could not set PCI DMA Mask\n");
- goto cleanup;
- }
- }
-
- status = init_pci_be_function(adapter, pdev);
- if (status != 0) {
- printk(KERN_ERR "Failed to map PCI BARS\n");
- status = -ENOMEM;
- goto cleanup;
- }
-
- be_trace_set_level(DL_ALWAYS | DL_ERR);
-
- adapter->be_link_sts = kmalloc(sizeof(struct BE_LINK_STATUS),
- GFP_KERNEL);
- if (adapter->be_link_sts == NULL) {
- printk(KERN_ERR "Memory allocation for link status "
- "buffer failed\n");
- goto cleanup;
- }
- spin_lock_init(&adapter->txq_lock);
-
- netdev = alloc_etherdev(sizeof(struct be_net_object));
- if (netdev == NULL) {
- status = -ENOMEM;
- goto cleanup;
- }
- pnob = netdev_priv(netdev);
- adapter->net_obj = pnob;
- adapter->netdevp = netdev;
- pnob->adapter = adapter;
- pnob->netdev = netdev;
-
- status = be_nob_ring_alloc(adapter, pnob);
- if (status != 0)
- goto cleanup;
-
- status = be_nob_ring_init(adapter, pnob);
- if (status != 0)
- goto cleanup;
-
- be_rxf_mac_address_read_write(&pnob->fn_obj, false, false, false,
- false, false, netdev->dev_addr, NULL, NULL);
-
- netdev->init = &benet_init;
- netif_carrier_off(netdev);
- netif_stop_queue(netdev);
-
- SET_NETDEV_DEV(netdev, &(adapter->pdev->dev));
-
- netif_napi_add(netdev, &pnob->napi, be_poll, 64);
-
- /* if the rx_frag size if 2K, one page is shared as two RX frags */
- pnob->rx_pg_shared =
- (pnob->rx_buf_size <= PAGE_SIZE / 2) ? true : false;
- if (pnob->rx_buf_size != rxbuf_size) {
- printk(KERN_WARNING
- "Could not set Rx buffer size to %d. Using %d\n",
- rxbuf_size, pnob->rx_buf_size);
- rxbuf_size = pnob->rx_buf_size;
- }
-
- tasklet_init(&(adapter->sts_handler), be_process_intr,
- (unsigned long)adapter);
- adapter->tasklet_started = 1;
- spin_lock_init(&(adapter->int_lock));
-
- status = be_register_isr(adapter, pnob);
- if (status != 0)
- goto cleanup;
-
- adapter->rx_csum = 1;
- adapter->max_rx_coal = BE_LRO_MAX_PKTS;
-
- memset(&get_fwv, 0,
- sizeof(struct FWCMD_COMMON_GET_FW_VERSION_RESPONSE_PAYLOAD));
- printk(KERN_INFO "BladeEngine Driver version:%s. "
- "Copyright ServerEngines, Corporation 2005 - 2008\n",
- be_drvr_ver);
- status = be_function_get_fw_version(&pnob->fn_obj, &get_fwv, NULL,
- NULL);
- if (status == BE_SUCCESS) {
- strncpy(be_fw_ver, get_fwv.firmware_version_string, 32);
- printk(KERN_INFO "BladeEngine Firmware Version:%s\n",
- get_fwv.firmware_version_string);
- } else {
- printk(KERN_WARNING "Unable to get BE Firmware Version\n");
- }
-
- sema_init(&adapter->get_eth_stat_sem, 0);
- init_timer(&adapter->timer_ctxt.get_stats_timer);
- atomic_set(&adapter->timer_ctxt.get_stat_flag, 0);
- adapter->timer_ctxt.get_stats_timer.function =
- &be_get_stats_timer_handler;
-
- status = be_mcc_create(adapter);
- if (status < 0)
- goto cleanup;
- status = be_mcc_init(adapter);
- if (status < 0)
- goto cleanup;
-
-
- status = be_mcc_add_async_event_callback(&adapter->net_obj->mcc_q_obj,
- be_link_status_async_callback, (void *)adapter);
- if (status != BE_SUCCESS) {
- printk(KERN_WARNING "add_async_event_callback failed");
- printk(KERN_WARNING
- "Link status changes may not be reflected\n");
- }
-
- status = register_netdev(netdev);
- if (status != 0)
- goto cleanup;
- be_update_link_status(adapter);
- adapter->dev_state = BE_DEV_STATE_INIT;
- return 0;
-
-cleanup:
- be_remove(pdev);
- return status;
-error_adapter:
- pci_release_regions(pdev);
-error_pci_req:
- pci_disable_device(pdev);
-error:
- printk(KERN_ERR "BladeEngine initalization failed\n");
- return status;
-}
-
-/*
- * Get the current link status and print the status on console
- */
-void be_update_link_status(struct be_adapter *adapter)
-{
- int status;
- struct be_net_object *pnob = adapter->net_obj;
-
- status = be_rxf_link_status(&pnob->fn_obj, adapter->be_link_sts, NULL,
- NULL, NULL);
- if (status == BE_SUCCESS) {
- if (adapter->be_link_sts->mac0_speed &&
- adapter->be_link_sts->mac0_duplex)
- adapter->port0_link_sts = BE_PORT_LINK_UP;
- else
- adapter->port0_link_sts = BE_PORT_LINK_DOWN;
-
- if (adapter->be_link_sts->mac1_speed &&
- adapter->be_link_sts->mac1_duplex)
- adapter->port1_link_sts = BE_PORT_LINK_UP;
- else
- adapter->port1_link_sts = BE_PORT_LINK_DOWN;
-
- dev_info(&pnob->netdev->dev, "Link Properties:\n");
- be_print_link_info(adapter->be_link_sts);
- return;
- }
- dev_info(&pnob->netdev->dev, "Could not get link status\n");
- return;
-}
-
-
-#ifdef CONFIG_PM
-static void
-be_pm_cleanup(struct be_adapter *adapter,
- struct be_net_object *pnob, struct net_device *netdev)
-{
- netif_carrier_off(netdev);
- netif_stop_queue(netdev);
-
- be_wait_nic_tx_cmplx_cmpl(pnob);
- be_disable_eq_intr(pnob);
-
- if (adapter->tasklet_started) {
- tasklet_kill(&adapter->sts_handler);
- adapter->tasklet_started = 0;
- }
-
- be_unregister_isr(adapter);
- be_disable_intr(pnob);
-
- be_tx_q_clean(pnob);
- be_rx_q_clean(pnob);
-
- be_destroy_netobj(pnob);
-}
-
-static int be_suspend(struct pci_dev *pdev, pm_message_t state)
-{
- struct be_adapter *adapter = pci_get_drvdata(pdev);
- struct net_device *netdev = adapter->netdevp;
- struct be_net_object *pnob = netdev_priv(netdev);
-
- adapter->dev_pm_state = adapter->dev_state;
- adapter->dev_state = BE_DEV_STATE_SUSPEND;
-
- netif_device_detach(netdev);
- if (netif_running(netdev))
- be_pm_cleanup(adapter, pnob, netdev);
-
- pci_enable_wake(pdev, 3, 1);
- pci_enable_wake(pdev, 4, 1); /* D3 Cold = 4 */
- pci_save_state(pdev);
- pci_disable_device(pdev);
- pci_set_power_state(pdev, pci_choose_state(pdev, state));
- return 0;
-}
-
-static void be_up(struct be_adapter *adapter)
-{
- struct be_net_object *pnob = adapter->net_obj;
-
- if (pnob->num_vlans != 0)
- be_rxf_vlan_config(&pnob->fn_obj, false, pnob->num_vlans,
- pnob->vlan_tag, NULL, NULL, NULL);
-
-}
-
-static int be_resume(struct pci_dev *pdev)
-{
- int status = 0;
- struct be_adapter *adapter = pci_get_drvdata(pdev);
- struct net_device *netdev = adapter->netdevp;
- struct be_net_object *pnob = netdev_priv(netdev);
-
- netif_device_detach(netdev);
-
- status = pci_enable_device(pdev);
- if (status)
- return status;
-
- pci_set_power_state(pdev, 0);
- pci_restore_state(pdev);
- pci_enable_wake(pdev, 3, 0);
- pci_enable_wake(pdev, 4, 0); /* 4 is D3 cold */
-
- netif_carrier_on(netdev);
- netif_start_queue(netdev);
-
- if (netif_running(netdev)) {
- be_rxf_mac_address_read_write(&pnob->fn_obj, false, false,
- false, true, false, netdev->dev_addr, NULL, NULL);
-
- status = be_nob_ring_init(adapter, pnob);
- if (status < 0)
- return status;
-
- tasklet_init(&(adapter->sts_handler), be_process_intr,
- (unsigned long)adapter);
- adapter->tasklet_started = 1;
-
- if (be_register_isr(adapter, pnob) != 0) {
- printk(KERN_ERR "be_register_isr failed\n");
- return status;
- }
-
-
- status = be_mcc_init(adapter);
- if (status < 0) {
- printk(KERN_ERR "be_mcc_init failed\n");
- return status;
- }
- be_update_link_status(adapter);
- /*
- * Register async call back function to handle link
- * status updates
- */
- status = be_mcc_add_async_event_callback(
- &adapter->net_obj->mcc_q_obj,
- be_link_status_async_callback, (void *)adapter);
- if (status != BE_SUCCESS) {
- printk(KERN_WARNING "add_async_event_callback failed");
- printk(KERN_WARNING
- "Link status changes may not be reflected\n");
- }
- be_enable_intr(pnob);
- be_enable_eq_intr(pnob);
- be_up(adapter);
- }
- netif_device_attach(netdev);
- adapter->dev_state = adapter->dev_pm_state;
- return 0;
-
-}
-
-#endif
-
-/* Wait until no more pending transmits */
-void be_wait_nic_tx_cmplx_cmpl(struct be_net_object *pnob)
-{
- int i;
-
- /* Wait for 20us * 50000 (= 1s) and no more */
- i = 0;
- while ((pnob->tx_q_tl != pnob->tx_q_hd) && (i < 50000)) {
- ++i;
- udelay(20);
- }
-
- /* Check for no more pending transmits */
- if (i >= 50000) {
- printk(KERN_WARNING
- "Did not receive completions for all TX requests\n");
- }
-}
-
-static struct pci_driver be_driver = {
- .name = be_driver_name,
- .id_table = be_device_id_table,
- .probe = be_probe,
-#ifdef CONFIG_PM
- .suspend = be_suspend,
- .resume = be_resume,
-#endif
- .remove = be_remove
-};
-
-/*
- * Module init entry point. Registers our our device and return.
- * Our probe will be called if the device is found.
- */
-static int __init be_init_module(void)
-{
- int ret;
-
- if (rxbuf_size != 8192 && rxbuf_size != 4096 && rxbuf_size != 2048) {
- printk(KERN_WARNING
- "Unsupported receive buffer size (%d) requested\n",
- rxbuf_size);
- printk(KERN_WARNING
- "Must be 2048, 4096 or 8192. Defaulting to 2048\n");
- rxbuf_size = 2048;
- }
-
- ret = pci_register_driver(&be_driver);
-
- return ret;
-}
-
-module_init(be_init_module);
-
-/*
- * be_exit_module - Driver Exit Cleanup Routine
- */
-static void __exit be_exit_module(void)
-{
- pci_unregister_driver(&be_driver);
-}
-
-module_exit(be_exit_module);
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-#include <linux/if_vlan.h>
-#include <linux/inet_lro.h>
-
-#include "benet.h"
-
-/* number of bytes of RX frame that are copied to skb->data */
-#define BE_HDR_LEN 64
-
-#define NETIF_RX(skb) netif_receive_skb(skb)
-#define VLAN_ACCEL_RX(skb, pnob, vt) \
- vlan_hwaccel_rx(skb, pnob->vlan_grp, vt)
-
-/*
- This function notifies BladeEngine of the number of completion
- entries processed from the specified completion queue by writing
- the number of popped entries to the door bell.
-
- pnob - Pointer to the NetObject structure
- n - Number of completion entries processed
- cq_id - Queue ID of the completion queue for which notification
- is being done.
- re_arm - 1 - rearm the completion ring to generate an event.
- - 0 - dont rearm the completion ring to generate an event
-*/
-void be_notify_cmpl(struct be_net_object *pnob, int n, int cq_id, int re_arm)
-{
- struct CQ_DB_AMAP cqdb;
-
- cqdb.dw[0] = 0;
- AMAP_SET_BITS_PTR(CQ_DB, qid, &cqdb, cq_id);
- AMAP_SET_BITS_PTR(CQ_DB, rearm, &cqdb, re_arm);
- AMAP_SET_BITS_PTR(CQ_DB, num_popped, &cqdb, n);
- PD_WRITE(&pnob->fn_obj, cq_db, cqdb.dw[0]);
-}
-
-/*
- * adds additional receive frags indicated by BE starting from given
- * frag index (fi) to specified skb's frag list
- */
-static void
-add_skb_frags(struct be_net_object *pnob, struct sk_buff *skb,
- u32 nresid, u32 fi)
-{
- struct be_adapter *adapter = pnob->adapter;
- u32 sk_frag_idx, n;
- struct be_rx_page_info *rx_page_info;
- u32 frag_sz = pnob->rx_buf_size;
-
- sk_frag_idx = skb_shinfo(skb)->nr_frags;
- while (nresid) {
- index_inc(&fi, pnob->rx_q_len);
-
- rx_page_info = (struct be_rx_page_info *)pnob->rx_ctxt[fi];
- pnob->rx_ctxt[fi] = NULL;
- if ((rx_page_info->page_offset) ||
- (pnob->rx_pg_shared == false)) {
- pci_unmap_page(adapter->pdev,
- pci_unmap_addr(rx_page_info, bus),
- frag_sz, PCI_DMA_FROMDEVICE);
- }
-
- n = min(nresid, frag_sz);
- skb_shinfo(skb)->frags[sk_frag_idx].page = rx_page_info->page;
- skb_shinfo(skb)->frags[sk_frag_idx].page_offset
- = rx_page_info->page_offset;
- skb_shinfo(skb)->frags[sk_frag_idx].size = n;
-
- sk_frag_idx++;
- skb->len += n;
- skb->data_len += n;
- skb_shinfo(skb)->nr_frags++;
- nresid -= n;
-
- memset(rx_page_info, 0, sizeof(struct be_rx_page_info));
- atomic_dec(&pnob->rx_q_posted);
- }
-}
-
-/*
- * This function processes incoming nic packets over various Rx queues.
- * This function takes the adapter, the current Rx status descriptor
- * entry and the Rx completion queue ID as argument.
- */
-static inline int process_nic_rx_completion(struct be_net_object *pnob,
- struct ETH_RX_COMPL_AMAP *rxcp)
-{
- struct be_adapter *adapter = pnob->adapter;
- struct sk_buff *skb;
- int udpcksm, tcpcksm;
- int n;
- u32 nresid, fi;
- u32 frag_sz = pnob->rx_buf_size;
- u8 *va;
- struct be_rx_page_info *rx_page_info;
- u32 numfrags, vtp, vtm, vlan_tag, pktsize;
-
- fi = AMAP_GET_BITS_PTR(ETH_RX_COMPL, fragndx, rxcp);
- BUG_ON(fi >= (int)pnob->rx_q_len);
- BUG_ON(fi < 0);
-
- rx_page_info = (struct be_rx_page_info *)pnob->rx_ctxt[fi];
- BUG_ON(!rx_page_info->page);
- pnob->rx_ctxt[fi] = NULL;
-
- /*
- * If one page is used per fragment or if this is the second half of
- * of the page, unmap the page here
- */
- if ((rx_page_info->page_offset) || (pnob->rx_pg_shared == false)) {
- pci_unmap_page(adapter->pdev,
- pci_unmap_addr(rx_page_info, bus), frag_sz,
- PCI_DMA_FROMDEVICE);
- }
-
- atomic_dec(&pnob->rx_q_posted);
- udpcksm = AMAP_GET_BITS_PTR(ETH_RX_COMPL, udpcksm, rxcp);
- tcpcksm = AMAP_GET_BITS_PTR(ETH_RX_COMPL, tcpcksm, rxcp);
- pktsize = AMAP_GET_BITS_PTR(ETH_RX_COMPL, pktsize, rxcp);
- /*
- * get rid of RX flush completions first.
- */
- if ((tcpcksm) && (udpcksm) && (pktsize == 32)) {
- put_page(rx_page_info->page);
- memset(rx_page_info, 0, sizeof(struct be_rx_page_info));
- return 0;
- }
- skb = netdev_alloc_skb(pnob->netdev, BE_HDR_LEN + NET_IP_ALIGN);
- if (skb == NULL) {
- dev_info(&pnob->netdev->dev, "alloc_skb() failed\n");
- put_page(rx_page_info->page);
- memset(rx_page_info, 0, sizeof(struct be_rx_page_info));
- goto free_frags;
- }
- skb_reserve(skb, NET_IP_ALIGN);
-
- skb->dev = pnob->netdev;
-
- n = min(pktsize, frag_sz);
-
- va = page_address(rx_page_info->page) + rx_page_info->page_offset;
- prefetch(va);
-
- skb->len = n;
- skb->data_len = n;
- if (n <= BE_HDR_LEN) {
- memcpy(skb->data, va, n);
- put_page(rx_page_info->page);
- skb->data_len -= n;
- skb->tail += n;
- } else {
-
- /* Setup the SKB with page buffer information */
- skb_shinfo(skb)->frags[0].page = rx_page_info->page;
- skb_shinfo(skb)->nr_frags++;
-
- /* Copy the header into the skb_data */
- memcpy(skb->data, va, BE_HDR_LEN);
- skb_shinfo(skb)->frags[0].page_offset =
- rx_page_info->page_offset + BE_HDR_LEN;
- skb_shinfo(skb)->frags[0].size = n - BE_HDR_LEN;
- skb->data_len -= BE_HDR_LEN;
- skb->tail += BE_HDR_LEN;
- }
- memset(rx_page_info, 0, sizeof(struct be_rx_page_info));
- nresid = pktsize - n;
-
- skb->protocol = eth_type_trans(skb, pnob->netdev);
-
- if ((tcpcksm || udpcksm) && adapter->rx_csum)
- skb->ip_summed = CHECKSUM_UNNECESSARY;
- else
- skb->ip_summed = CHECKSUM_NONE;
- /*
- * if we have more bytes left, the frame has been
- * given to us in multiple fragments. This happens
- * with Jumbo frames. Add the remaining fragments to
- * skb->frags[] array.
- */
- if (nresid)
- add_skb_frags(pnob, skb, nresid, fi);
-
- /* update the the true size of the skb. */
- skb->truesize = skb->len + sizeof(struct sk_buff);
-
- /*
- * If a 802.3 frame or 802.2 LLC frame
- * (i.e) contains length field in MAC Hdr
- * and frame len is greater than 64 bytes
- */
- if (((skb->protocol == ntohs(ETH_P_802_2)) ||
- (skb->protocol == ntohs(ETH_P_802_3)))
- && (pktsize > BE_HDR_LEN)) {
- /*
- * If the length given in Mac Hdr is less than frame size
- * Erraneous frame, Drop it
- */
- if ((ntohs(*(u16 *) (va + 12)) + ETH_HLEN) < pktsize) {
- /* Increment Non Ether type II frames dropped */
- adapter->be_stat.bes_802_3_dropped_frames++;
-
- kfree_skb(skb);
- return 0;
- }
- /*
- * else if the length given in Mac Hdr is greater than
- * frame size, should not be seeing this sort of frames
- * dump the pkt and pass to stack
- */
- else if ((ntohs(*(u16 *) (va + 12)) + ETH_HLEN) > pktsize) {
- /* Increment Non Ether type II frames malformed */
- adapter->be_stat.bes_802_3_malformed_frames++;
- }
- }
-
- vtp = AMAP_GET_BITS_PTR(ETH_RX_COMPL, vtp, rxcp);
- vtm = AMAP_GET_BITS_PTR(ETH_RX_COMPL, vtm, rxcp);
- if (vtp && vtm) {
- /* Vlan tag present in pkt and BE found
- * that the tag matched an entry in VLAN table
- */
- if (!pnob->vlan_grp || pnob->num_vlans == 0) {
- /* But we have no VLANs configured.
- * This should never happen. Drop the packet.
- */
- dev_info(&pnob->netdev->dev,
- "BladeEngine: Unexpected vlan tagged packet\n");
- kfree_skb(skb);
- return 0;
- }
- /* pass the VLAN packet to stack */
- vlan_tag = AMAP_GET_BITS_PTR(ETH_RX_COMPL, vlan_tag, rxcp);
- VLAN_ACCEL_RX(skb, pnob, be16_to_cpu(vlan_tag));
-
- } else {
- NETIF_RX(skb);
- }
- return 0;
-
-free_frags:
- /* free all frags associated with the current rxcp */
- numfrags = AMAP_GET_BITS_PTR(ETH_RX_COMPL, numfrags, rxcp);
- while (numfrags-- > 1) {
- index_inc(&fi, pnob->rx_q_len);
-
- rx_page_info = (struct be_rx_page_info *)
- pnob->rx_ctxt[fi];
- pnob->rx_ctxt[fi] = (void *)NULL;
- if (rx_page_info->page_offset || !pnob->rx_pg_shared) {
- pci_unmap_page(adapter->pdev,
- pci_unmap_addr(rx_page_info, bus),
- frag_sz, PCI_DMA_FROMDEVICE);
- }
-
- put_page(rx_page_info->page);
- memset(rx_page_info, 0, sizeof(struct be_rx_page_info));
- atomic_dec(&pnob->rx_q_posted);
- }
- return -ENOMEM;
-}
-
-static void process_nic_rx_completion_lro(struct be_net_object *pnob,
- struct ETH_RX_COMPL_AMAP *rxcp)
-{
- struct be_adapter *adapter = pnob->adapter;
- struct skb_frag_struct rx_frags[BE_MAX_FRAGS_PER_FRAME];
- unsigned int udpcksm, tcpcksm;
- u32 numfrags, vlanf, vtm, vlan_tag, nresid;
- u16 vlant;
- unsigned int fi, idx, n;
- struct be_rx_page_info *rx_page_info;
- u32 frag_sz = pnob->rx_buf_size, pktsize;
- bool rx_coal = (adapter->max_rx_coal <= 1) ? 0 : 1;
- u8 err, *va;
- __wsum csum = 0;
-
- if (AMAP_GET_BITS_PTR(ETH_RX_COMPL, ipsec, rxcp)) {
- /* Drop the pkt and move to the next completion. */
- adapter->be_stat.bes_rx_misc_pkts++;
- return;
- }
- err = AMAP_GET_BITS_PTR(ETH_RX_COMPL, err, rxcp);
- if (err || !rx_coal) {
- /* We won't coalesce Rx pkts if the err bit set.
- * take the path of normal completion processing */
- process_nic_rx_completion(pnob, rxcp);
- return;
- }
-
- fi = AMAP_GET_BITS_PTR(ETH_RX_COMPL, fragndx, rxcp);
- BUG_ON(fi >= (int)pnob->rx_q_len);
- BUG_ON(fi < 0);
- rx_page_info = (struct be_rx_page_info *)pnob->rx_ctxt[fi];
- BUG_ON(!rx_page_info->page);
- pnob->rx_ctxt[fi] = (void *)NULL;
- /* If one page is used per fragment or if this is the
- * second half of the page, unmap the page here
- */
- if (rx_page_info->page_offset || !pnob->rx_pg_shared) {
- pci_unmap_page(adapter->pdev,
- pci_unmap_addr(rx_page_info, bus),
- frag_sz, PCI_DMA_FROMDEVICE);
- }
-
- numfrags = AMAP_GET_BITS_PTR(ETH_RX_COMPL, numfrags, rxcp);
- udpcksm = AMAP_GET_BITS_PTR(ETH_RX_COMPL, udpcksm, rxcp);
- tcpcksm = AMAP_GET_BITS_PTR(ETH_RX_COMPL, tcpcksm, rxcp);
- vlan_tag = AMAP_GET_BITS_PTR(ETH_RX_COMPL, vlan_tag, rxcp);
- vlant = be16_to_cpu(vlan_tag);
- vlanf = AMAP_GET_BITS_PTR(ETH_RX_COMPL, vtp, rxcp);
- vtm = AMAP_GET_BITS_PTR(ETH_RX_COMPL, vtm, rxcp);
- pktsize = AMAP_GET_BITS_PTR(ETH_RX_COMPL, pktsize, rxcp);
-
- atomic_dec(&pnob->rx_q_posted);
-
- if (tcpcksm && udpcksm && pktsize == 32) {
- /* flush completion entries */
- put_page(rx_page_info->page);
- memset(rx_page_info, 0, sizeof(struct be_rx_page_info));
- return;
- }
- /* Only one of udpcksum and tcpcksum can be set */
- BUG_ON(udpcksm && tcpcksm);
-
- /* jumbo frames could come in multiple fragments */
- BUG_ON(numfrags != ((pktsize + (frag_sz - 1)) / frag_sz));
- n = min(pktsize, frag_sz);
- nresid = pktsize - n; /* will be useful for jumbo pkts */
- idx = 0;
-
- va = page_address(rx_page_info->page) + rx_page_info->page_offset;
- prefetch(va);
- rx_frags[idx].page = rx_page_info->page;
- rx_frags[idx].page_offset = (rx_page_info->page_offset);
- rx_frags[idx].size = n;
- memset(rx_page_info, 0, sizeof(struct be_rx_page_info));
-
- /* If we got multiple fragments, we have more data. */
- while (nresid) {
- idx++;
- index_inc(&fi, pnob->rx_q_len);
-
- rx_page_info = (struct be_rx_page_info *)pnob->rx_ctxt[fi];
- pnob->rx_ctxt[fi] = (void *)NULL;
- if (rx_page_info->page_offset || !pnob->rx_pg_shared) {
- pci_unmap_page(adapter->pdev,
- pci_unmap_addr(rx_page_info, bus),
- frag_sz, PCI_DMA_FROMDEVICE);
- }
-
- n = min(nresid, frag_sz);
- rx_frags[idx].page = rx_page_info->page;
- rx_frags[idx].page_offset = (rx_page_info->page_offset);
- rx_frags[idx].size = n;
-
- nresid -= n;
- memset(rx_page_info, 0, sizeof(struct be_rx_page_info));
- atomic_dec(&pnob->rx_q_posted);
- }
-
- if (likely(!(vlanf && vtm))) {
- lro_receive_frags(&pnob->lro_mgr, rx_frags,
- pktsize, pktsize,
- (void *)(unsigned long)csum, csum);
- } else {
- /* Vlan tag present in pkt and BE found
- * that the tag matched an entry in VLAN table
- */
- if (unlikely(!pnob->vlan_grp || pnob->num_vlans == 0)) {
- /* But we have no VLANs configured.
- * This should never happen. Drop the packet.
- */
- dev_info(&pnob->netdev->dev,
- "BladeEngine: Unexpected vlan tagged packet\n");
- return;
- }
- /* pass the VLAN packet to stack */
- lro_vlan_hwaccel_receive_frags(&pnob->lro_mgr,
- rx_frags, pktsize, pktsize,
- pnob->vlan_grp, vlant,
- (void *)(unsigned long)csum,
- csum);
- }
-
- adapter->be_stat.bes_rx_coal++;
-}
-
-struct ETH_RX_COMPL_AMAP *be_get_rx_cmpl(struct be_net_object *pnob)
-{
- struct ETH_RX_COMPL_AMAP *rxcp = &pnob->rx_cq[pnob->rx_cq_tl];
- u32 valid, ct;
-
- valid = AMAP_GET_BITS_PTR(ETH_RX_COMPL, valid, rxcp);
- if (valid == 0)
- return NULL;
-
- ct = AMAP_GET_BITS_PTR(ETH_RX_COMPL, ct, rxcp);
- if (ct != 0) {
- /* Invalid chute #. treat as error */
- AMAP_SET_BITS_PTR(ETH_RX_COMPL, err, rxcp, 1);
- }
-
- be_adv_rxcq_tl(pnob);
- AMAP_SET_BITS_PTR(ETH_RX_COMPL, valid, rxcp, 0);
- return rxcp;
-}
-
-static void update_rx_rate(struct be_adapter *adapter)
-{
- /* update the rate once in two seconds */
- if ((jiffies - adapter->eth_rx_jiffies) > 2 * (HZ)) {
- u32 r;
- r = adapter->eth_rx_bytes /
- ((jiffies - adapter->eth_rx_jiffies) / (HZ));
- r = (r / 1000000); /* MB/Sec */
-
- /* Mega Bits/Sec */
- adapter->be_stat.bes_eth_rx_rate = (r * 8);
- adapter->eth_rx_jiffies = jiffies;
- adapter->eth_rx_bytes = 0;
- }
-}
-
-static int process_rx_completions(struct be_net_object *pnob, int max_work)
-{
- struct be_adapter *adapter = pnob->adapter;
- struct ETH_RX_COMPL_AMAP *rxcp;
- u32 nc = 0;
- unsigned int pktsize;
-
- while (max_work && (rxcp = be_get_rx_cmpl(pnob))) {
- prefetch(rxcp);
- pktsize = AMAP_GET_BITS_PTR(ETH_RX_COMPL, pktsize, rxcp);
- process_nic_rx_completion_lro(pnob, rxcp);
- adapter->eth_rx_bytes += pktsize;
- update_rx_rate(adapter);
- nc++;
- max_work--;
- adapter->be_stat.bes_rx_compl++;
- }
- if (likely(adapter->max_rx_coal > 1)) {
- adapter->be_stat.bes_rx_flush++;
- lro_flush_all(&pnob->lro_mgr);
- }
-
- /* Refill the queue */
- if (atomic_read(&pnob->rx_q_posted) < 900)
- be_post_eth_rx_buffs(pnob);
-
- return nc;
-}
-
-static struct ETH_TX_COMPL_AMAP *be_get_tx_cmpl(struct be_net_object *pnob)
-{
- struct ETH_TX_COMPL_AMAP *txcp = &pnob->tx_cq[pnob->tx_cq_tl];
- u32 valid;
-
- valid = AMAP_GET_BITS_PTR(ETH_TX_COMPL, valid, txcp);
- if (valid == 0)
- return NULL;
-
- AMAP_SET_BITS_PTR(ETH_TX_COMPL, valid, txcp, 0);
- be_adv_txcq_tl(pnob);
- return txcp;
-
-}
-
-void process_one_tx_compl(struct be_net_object *pnob, u32 end_idx)
-{
- struct be_adapter *adapter = pnob->adapter;
- int cur_index, tx_wrbs_completed = 0;
- struct sk_buff *skb;
- u64 busaddr, pa, pa_lo, pa_hi;
- struct ETH_WRB_AMAP *wrb;
- u32 frag_len, last_index, j;
-
- last_index = tx_compl_lastwrb_idx_get(pnob);
- BUG_ON(last_index != end_idx);
- pnob->tx_ctxt[pnob->tx_q_tl] = NULL;
- do {
- cur_index = pnob->tx_q_tl;
- wrb = &pnob->tx_q[cur_index];
- pa_hi = AMAP_GET_BITS_PTR(ETH_WRB, frag_pa_hi, wrb);
- pa_lo = AMAP_GET_BITS_PTR(ETH_WRB, frag_pa_lo, wrb);
- frag_len = AMAP_GET_BITS_PTR(ETH_WRB, frag_len, wrb);
- busaddr = (pa_hi << 32) | pa_lo;
- if (busaddr != 0) {
- pa = le64_to_cpu(busaddr);
- pci_unmap_single(adapter->pdev, pa,
- frag_len, PCI_DMA_TODEVICE);
- }
- if (cur_index == last_index) {
- skb = (struct sk_buff *)pnob->tx_ctxt[cur_index];
- BUG_ON(!skb);
- for (j = 0; j < skb_shinfo(skb)->nr_frags; j++) {
- struct skb_frag_struct *frag;
- frag = &skb_shinfo(skb)->frags[j];
- pci_unmap_page(adapter->pdev,
- (ulong) frag->page, frag->size,
- PCI_DMA_TODEVICE);
- }
- kfree_skb(skb);
- pnob->tx_ctxt[cur_index] = NULL;
- } else {
- BUG_ON(pnob->tx_ctxt[cur_index]);
- }
- tx_wrbs_completed++;
- be_adv_txq_tl(pnob);
- } while (cur_index != last_index);
- atomic_sub(tx_wrbs_completed, &pnob->tx_q_used);
-}
-
-/* there is no need to take an SMP lock here since currently
- * we have only one instance of the tasklet that does completion
- * processing.
- */
-static void process_nic_tx_completions(struct be_net_object *pnob)
-{
- struct be_adapter *adapter = pnob->adapter;
- struct ETH_TX_COMPL_AMAP *txcp;
- struct net_device *netdev = pnob->netdev;
- u32 end_idx, num_processed = 0;
-
- adapter->be_stat.bes_tx_events++;
-
- while ((txcp = be_get_tx_cmpl(pnob))) {
- end_idx = AMAP_GET_BITS_PTR(ETH_TX_COMPL, wrb_index, txcp);
- process_one_tx_compl(pnob, end_idx);
- num_processed++;
- adapter->be_stat.bes_tx_compl++;
- }
- be_notify_cmpl(pnob, num_processed, pnob->tx_cq_id, 1);
- /*
- * We got Tx completions and have usable WRBs.
- * If the netdev's queue has been stopped
- * because we had run out of WRBs, wake it now.
- */
- spin_lock(&adapter->txq_lock);
- if (netif_queue_stopped(netdev)
- && atomic_read(&pnob->tx_q_used) < pnob->tx_q_len / 2) {
- netif_wake_queue(netdev);
- }
- spin_unlock(&adapter->txq_lock);
-}
-
-static u32 post_rx_buffs(struct be_net_object *pnob, struct list_head *rxbl)
-{
- u32 nposted = 0;
- struct ETH_RX_D_AMAP *rxd = NULL;
- struct be_recv_buffer *rxbp;
- void **rx_ctxp;
- struct RQ_DB_AMAP rqdb;
-
- rx_ctxp = pnob->rx_ctxt;
-
- while (!list_empty(rxbl) &&
- (rx_ctxp[pnob->rx_q_hd] == NULL) && nposted < 255) {
-
- rxbp = list_first_entry(rxbl, struct be_recv_buffer, rxb_list);
- list_del(&rxbp->rxb_list);
- rxd = pnob->rx_q + pnob->rx_q_hd;
- AMAP_SET_BITS_PTR(ETH_RX_D, fragpa_lo, rxd, rxbp->rxb_pa_lo);
- AMAP_SET_BITS_PTR(ETH_RX_D, fragpa_hi, rxd, rxbp->rxb_pa_hi);
-
- rx_ctxp[pnob->rx_q_hd] = rxbp->rxb_ctxt;
- be_adv_rxq_hd(pnob);
- nposted++;
- }
-
- if (nposted) {
- /* Now press the door bell to notify BladeEngine. */
- rqdb.dw[0] = 0;
- AMAP_SET_BITS_PTR(RQ_DB, numPosted, &rqdb, nposted);
- AMAP_SET_BITS_PTR(RQ_DB, rq, &rqdb, pnob->rx_q_id);
- PD_WRITE(&pnob->fn_obj, erx_rq_db, rqdb.dw[0]);
- }
- atomic_add(nposted, &pnob->rx_q_posted);
- return nposted;
-}
-
-void be_post_eth_rx_buffs(struct be_net_object *pnob)
-{
- struct be_adapter *adapter = pnob->adapter;
- u32 num_bufs, r;
- u64 busaddr = 0, tmp_pa;
- u32 max_bufs, pg_hd;
- u32 frag_size;
- struct be_recv_buffer *rxbp;
- struct list_head rxbl;
- struct be_rx_page_info *rx_page_info;
- struct page *page = NULL;
- u32 page_order = 0;
- gfp_t alloc_flags = GFP_ATOMIC;
-
- BUG_ON(!adapter);
-
- max_bufs = 64; /* should be even # <= 255. */
-
- frag_size = pnob->rx_buf_size;
- page_order = get_order(frag_size);
-
- if (frag_size == 8192)
- alloc_flags |= (gfp_t) __GFP_COMP;
- /*
- * Form a linked list of RECV_BUFFFER structure to be be posted.
- * We will post even number of buffer so that pages can be
- * shared.
- */
- INIT_LIST_HEAD(&rxbl);
-
- for (num_bufs = 0; num_bufs < max_bufs &&
- !pnob->rx_page_info[pnob->rx_pg_info_hd].page; ++num_bufs) {
-
- rxbp = &pnob->eth_rx_bufs[num_bufs];
- pg_hd = pnob->rx_pg_info_hd;
- rx_page_info = &pnob->rx_page_info[pg_hd];
-
- if (!page) {
- page = alloc_pages(alloc_flags, page_order);
- if (unlikely(page == NULL)) {
- adapter->be_stat.bes_ethrx_post_fail++;
- pnob->rxbuf_post_fail++;
- break;
- }
- pnob->rxbuf_post_fail = 0;
- busaddr = pci_map_page(adapter->pdev, page, 0,
- frag_size, PCI_DMA_FROMDEVICE);
- rx_page_info->page_offset = 0;
- rx_page_info->page = page;
- /*
- * If we are sharing a page among two skbs,
- * alloc a new one on the next iteration
- */
- if (pnob->rx_pg_shared == false)
- page = NULL;
- } else {
- get_page(page);
- rx_page_info->page_offset += frag_size;
- rx_page_info->page = page;
- /*
- * We are finished with the alloced page,
- * Alloc a new one on the next iteration
- */
- page = NULL;
- }
- rxbp->rxb_ctxt = (void *)rx_page_info;
- index_inc(&pnob->rx_pg_info_hd, pnob->rx_q_len);
-
- pci_unmap_addr_set(rx_page_info, bus, busaddr);
- tmp_pa = busaddr + rx_page_info->page_offset;
- rxbp->rxb_pa_lo = (tmp_pa & 0xFFFFFFFF);
- rxbp->rxb_pa_hi = (tmp_pa >> 32);
- rxbp->rxb_len = frag_size;
- list_add_tail(&rxbp->rxb_list, &rxbl);
- } /* End of for */
-
- r = post_rx_buffs(pnob, &rxbl);
- BUG_ON(r != num_bufs);
- return;
-}
-
-/*
- * Interrupt service for network function. We just schedule the
- * tasklet which does all completion processing.
- */
-irqreturn_t be_int(int irq, void *dev)
-{
- struct net_device *netdev = dev;
- struct be_net_object *pnob = netdev_priv(netdev);
- struct be_adapter *adapter = pnob->adapter;
- u32 isr;
-
- isr = CSR_READ(&pnob->fn_obj, cev.isr1);
- if (unlikely(!isr))
- return IRQ_NONE;
-
- spin_lock(&adapter->int_lock);
- adapter->isr |= isr;
- spin_unlock(&adapter->int_lock);
-
- adapter->be_stat.bes_ints++;
-
- tasklet_schedule(&adapter->sts_handler);
- return IRQ_HANDLED;
-}
-
-/*
- * Poll function called by NAPI with a work budget.
- * We process as many UC. BC and MC receive completions
- * as the budget allows and return the actual number of
- * RX ststutses processed.
- */
-int be_poll(struct napi_struct *napi, int budget)
-{
- struct be_net_object *pnob =
- container_of(napi, struct be_net_object, napi);
- u32 work_done;
-
- pnob->adapter->be_stat.bes_polls++;
- work_done = process_rx_completions(pnob, budget);
- BUG_ON(work_done > budget);
-
- /* All consumed */
- if (work_done < budget) {
- netif_rx_complete(napi);
- /* enable intr */
- be_notify_cmpl(pnob, work_done, pnob->rx_cq_id, 1);
- } else {
- /* More to be consumed; continue with interrupts disabled */
- be_notify_cmpl(pnob, work_done, pnob->rx_cq_id, 0);
- }
- return work_done;
-}
-
-static struct EQ_ENTRY_AMAP *get_event(struct be_net_object *pnob)
-{
- struct EQ_ENTRY_AMAP *eqp = &(pnob->event_q[pnob->event_q_tl]);
- if (!AMAP_GET_BITS_PTR(EQ_ENTRY, Valid, eqp))
- return NULL;
- be_adv_eq_tl(pnob);
- return eqp;
-}
-
-/*
- * Processes all valid events in the event ring associated with given
- * NetObject. Also, notifies BE the number of events processed.
- */
-static inline u32 process_events(struct be_net_object *pnob)
-{
- struct be_adapter *adapter = pnob->adapter;
- struct EQ_ENTRY_AMAP *eqp;
- u32 rid, num_events = 0;
- struct net_device *netdev = pnob->netdev;
-
- while ((eqp = get_event(pnob)) != NULL) {
- adapter->be_stat.bes_events++;
- rid = AMAP_GET_BITS_PTR(EQ_ENTRY, ResourceID, eqp);
- if (rid == pnob->rx_cq_id) {
- adapter->be_stat.bes_rx_events++;
- netif_rx_schedule(&pnob->napi);
- } else if (rid == pnob->tx_cq_id) {
- process_nic_tx_completions(pnob);
- } else if (rid == pnob->mcc_cq_id) {
- be_mcc_process_cq(&pnob->mcc_q_obj, 1);
- } else {
- dev_info(&netdev->dev,
- "Invalid EQ ResourceID %d\n", rid);
- }
- AMAP_SET_BITS_PTR(EQ_ENTRY, Valid, eqp, 0);
- AMAP_SET_BITS_PTR(EQ_ENTRY, ResourceID, eqp, 0);
- num_events++;
- }
- return num_events;
-}
-
-static void update_eqd(struct be_adapter *adapter, struct be_net_object *pnob)
-{
- int status;
- struct be_eq_object *eq_objectp;
-
- /* update once a second */
- if ((jiffies - adapter->ips_jiffies) > 1 * (HZ)) {
- /* One second elapsed since last update */
- u32 r, new_eqd = -1;
- r = adapter->be_stat.bes_ints - adapter->be_stat.bes_prev_ints;
- r = r / ((jiffies - adapter->ips_jiffies) / (HZ));
- adapter->be_stat.bes_ips = r;
- adapter->ips_jiffies = jiffies;
- adapter->be_stat.bes_prev_ints = adapter->be_stat.bes_ints;
- if (r > IPS_HI_WM && adapter->cur_eqd < adapter->max_eqd)
- new_eqd = (adapter->cur_eqd + 8);
- if (r < IPS_LO_WM && adapter->cur_eqd > adapter->min_eqd)
- new_eqd = (adapter->cur_eqd - 8);
- if (adapter->enable_aic && new_eqd != -1) {
- eq_objectp = &pnob->event_q_obj;
- status = be_eq_modify_delay(&pnob->fn_obj, 1,
- &eq_objectp, &new_eqd, NULL,
- NULL, NULL);
- if (status == BE_SUCCESS)
- adapter->cur_eqd = new_eqd;
- }
- }
-}
-
-/*
- This function notifies BladeEngine of how many events were processed
- from the event queue by ringing the corresponding door bell and
- optionally re-arms the event queue.
- n - number of events processed
- re_arm - 1 - re-arm the EQ, 0 - do not re-arm the EQ
-
-*/
-static void be_notify_event(struct be_net_object *pnob, int n, int re_arm)
-{
- struct CQ_DB_AMAP eqdb;
- eqdb.dw[0] = 0;
-
- AMAP_SET_BITS_PTR(CQ_DB, qid, &eqdb, pnob->event_q_id);
- AMAP_SET_BITS_PTR(CQ_DB, rearm, &eqdb, re_arm);
- AMAP_SET_BITS_PTR(CQ_DB, event, &eqdb, 1);
- AMAP_SET_BITS_PTR(CQ_DB, num_popped, &eqdb, n);
- /*
- * Under some situations we see an interrupt and no valid
- * EQ entry. To keep going, we need to ring the DB even if
- * numPOsted is 0.
- */
- PD_WRITE(&pnob->fn_obj, cq_db, eqdb.dw[0]);
- return;
-}
-
-/*
- * Called from the tasklet scheduled by ISR. All real interrupt processing
- * is done here.
- */
-void be_process_intr(unsigned long context)
-{
- struct be_adapter *adapter = (struct be_adapter *)context;
- struct be_net_object *pnob = adapter->net_obj;
- u32 isr, n;
- ulong flags = 0;
-
- isr = adapter->isr;
-
- /*
- * we create only one NIC event queue in Linux. Event is
- * expected only in the first event queue
- */
- BUG_ON(isr & 0xfffffffe);
- if ((isr & 1) == 0)
- return; /* not our interrupt */
- n = process_events(pnob);
- /*
- * Clear the event bit. adapter->isr is set by
- * hard interrupt. Prevent race with lock.
- */
- spin_lock_irqsave(&adapter->int_lock, flags);
- adapter->isr &= ~1;
- spin_unlock_irqrestore(&adapter->int_lock, flags);
- be_notify_event(pnob, n, 1);
- /*
- * If previous allocation attempts had failed and
- * BE has used up all posted buffers, post RX buffers here
- */
- if (pnob->rxbuf_post_fail && atomic_read(&pnob->rx_q_posted) == 0)
- be_post_eth_rx_buffs(pnob);
- update_eqd(adapter, pnob);
- return;
-}
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * be_netif.c
- *
- * This file contains various entry points of drivers seen by tcp/ip stack.
- */
-
-#include <linux/if_vlan.h>
-#include <linux/in.h>
-#include "benet.h"
-#include <linux/ip.h>
-#include <linux/inet_lro.h>
-
-/* Strings to print Link properties */
-static const char *link_speed[] = {
- "Invalid link Speed Value",
- "10 Mbps",
- "100 Mbps",
- "1 Gbps",
- "10 Gbps"
-};
-
-static const char *link_duplex[] = {
- "Invalid Duplex Value",
- "Half Duplex",
- "Full Duplex"
-};
-
-static const char *link_state[] = {
- "",
- "(active)"
-};
-
-void be_print_link_info(struct BE_LINK_STATUS *lnk_status)
-{
- u16 si, di, ai;
-
- /* Port 0 */
- if (lnk_status->mac0_speed && lnk_status->mac0_duplex) {
- /* Port is up and running */
- si = (lnk_status->mac0_speed < 5) ? lnk_status->mac0_speed : 0;
- di = (lnk_status->mac0_duplex < 3) ?
- lnk_status->mac0_duplex : 0;
- ai = (lnk_status->active_port == 0) ? 1 : 0;
- printk(KERN_INFO "PortNo. 0: Speed - %s %s %s\n",
- link_speed[si], link_duplex[di], link_state[ai]);
- } else
- printk(KERN_INFO "PortNo. 0: Down\n");
-
- /* Port 1 */
- if (lnk_status->mac1_speed && lnk_status->mac1_duplex) {
- /* Port is up and running */
- si = (lnk_status->mac1_speed < 5) ? lnk_status->mac1_speed : 0;
- di = (lnk_status->mac1_duplex < 3) ?
- lnk_status->mac1_duplex : 0;
- ai = (lnk_status->active_port == 0) ? 1 : 0;
- printk(KERN_INFO "PortNo. 1: Speed - %s %s %s\n",
- link_speed[si], link_duplex[di], link_state[ai]);
- } else
- printk(KERN_INFO "PortNo. 1: Down\n");
-
- return;
-}
-
-static int
-be_get_frag_header(struct skb_frag_struct *frag, void **mac_hdr,
- void **ip_hdr, void **tcpudp_hdr,
- u64 *hdr_flags, void *priv)
-{
- struct ethhdr *eh;
- struct vlan_ethhdr *veh;
- struct iphdr *iph;
- u8 *va = page_address(frag->page) + frag->page_offset;
- unsigned long ll_hlen;
-
- /* find the mac header, abort if not IPv4 */
-
- prefetch(va);
- eh = (struct ethhdr *)va;
- *mac_hdr = eh;
- ll_hlen = ETH_HLEN;
- if (eh->h_proto != htons(ETH_P_IP)) {
- if (eh->h_proto == htons(ETH_P_8021Q)) {
- veh = (struct vlan_ethhdr *)va;
- if (veh->h_vlan_encapsulated_proto != htons(ETH_P_IP))
- return -1;
-
- ll_hlen += VLAN_HLEN;
-
- } else {
- return -1;
- }
- }
- *hdr_flags = LRO_IPV4;
-
- iph = (struct iphdr *)(va + ll_hlen);
- *ip_hdr = iph;
- if (iph->protocol != IPPROTO_TCP)
- return -1;
- *hdr_flags |= LRO_TCP;
- *tcpudp_hdr = (u8 *) (*ip_hdr) + (iph->ihl << 2);
-
- return 0;
-}
-
-static int benet_open(struct net_device *netdev)
-{
- struct be_net_object *pnob = netdev_priv(netdev);
- struct be_adapter *adapter = pnob->adapter;
- struct net_lro_mgr *lro_mgr;
-
- if (adapter->dev_state < BE_DEV_STATE_INIT)
- return -EAGAIN;
-
- lro_mgr = &pnob->lro_mgr;
- lro_mgr->dev = netdev;
-
- lro_mgr->features = LRO_F_NAPI;
- lro_mgr->ip_summed = CHECKSUM_UNNECESSARY;
- lro_mgr->ip_summed_aggr = CHECKSUM_UNNECESSARY;
- lro_mgr->max_desc = BE_MAX_LRO_DESCRIPTORS;
- lro_mgr->lro_arr = pnob->lro_desc;
- lro_mgr->get_frag_header = be_get_frag_header;
- lro_mgr->max_aggr = adapter->max_rx_coal;
- lro_mgr->frag_align_pad = 2;
- if (lro_mgr->max_aggr > MAX_SKB_FRAGS)
- lro_mgr->max_aggr = MAX_SKB_FRAGS;
-
- adapter->max_rx_coal = BE_LRO_MAX_PKTS;
-
- be_update_link_status(adapter);
-
- /*
- * Set carrier on only if Physical Link up
- * Either of the port link status up signifies this
- */
- if ((adapter->port0_link_sts == BE_PORT_LINK_UP) ||
- (adapter->port1_link_sts == BE_PORT_LINK_UP)) {
- netif_start_queue(netdev);
- netif_carrier_on(netdev);
- }
-
- adapter->dev_state = BE_DEV_STATE_OPEN;
- napi_enable(&pnob->napi);
- be_enable_intr(pnob);
- be_enable_eq_intr(pnob);
- /*
- * RX completion queue may be in dis-armed state. Arm it.
- */
- be_notify_cmpl(pnob, 0, pnob->rx_cq_id, 1);
-
- return 0;
-}
-
-static int benet_close(struct net_device *netdev)
-{
- struct be_net_object *pnob = netdev_priv(netdev);
- struct be_adapter *adapter = pnob->adapter;
-
- netif_stop_queue(netdev);
- synchronize_irq(netdev->irq);
-
- be_wait_nic_tx_cmplx_cmpl(pnob);
- adapter->dev_state = BE_DEV_STATE_INIT;
- netif_carrier_off(netdev);
-
- adapter->port0_link_sts = BE_PORT_LINK_DOWN;
- adapter->port1_link_sts = BE_PORT_LINK_DOWN;
- be_disable_intr(pnob);
- be_disable_eq_intr(pnob);
- napi_disable(&pnob->napi);
-
- return 0;
-}
-
-/*
- * Setting a Mac Address for BE
- * Takes netdev and a void pointer as arguments.
- * The pointer holds the new addres to be used.
- */
-static int benet_set_mac_addr(struct net_device *netdev, void *p)
-{
- struct sockaddr *addr = p;
- struct be_net_object *pnob = netdev_priv(netdev);
-
- memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
- be_rxf_mac_address_read_write(&pnob->fn_obj, 0, 0, false, true, false,
- netdev->dev_addr, NULL, NULL);
- /*
- * Since we are doing Active-Passive failover, both
- * ports should have matching MAC addresses everytime.
- */
- be_rxf_mac_address_read_write(&pnob->fn_obj, 1, 0, false, true, false,
- netdev->dev_addr, NULL, NULL);
-
- return 0;
-}
-
-void be_get_stats_timer_handler(unsigned long context)
-{
- struct be_timer_ctxt *ctxt = (struct be_timer_ctxt *)context;
-
- if (atomic_read(&ctxt->get_stat_flag)) {
- atomic_dec(&ctxt->get_stat_flag);
- up((void *)ctxt->get_stat_sem_addr);
- }
- del_timer(&ctxt->get_stats_timer);
- return;
-}
-
-void be_get_stat_cb(void *context, int status,
- struct MCC_WRB_AMAP *optional_wrb)
-{
- struct be_timer_ctxt *ctxt = (struct be_timer_ctxt *)context;
- /*
- * just up the semaphore if the get_stat_flag
- * reads 1. so that the waiter can continue.
- * If it is 0, then it was handled by the timer handler.
- */
- del_timer(&ctxt->get_stats_timer);
- if (atomic_read(&ctxt->get_stat_flag)) {
- atomic_dec(&ctxt->get_stat_flag);
- up((void *)ctxt->get_stat_sem_addr);
- }
-}
-
-struct net_device_stats *benet_get_stats(struct net_device *dev)
-{
- struct be_net_object *pnob = netdev_priv(dev);
- struct be_adapter *adapter = pnob->adapter;
- u64 pa;
- struct be_timer_ctxt *ctxt = &adapter->timer_ctxt;
-
- if (adapter->dev_state != BE_DEV_STATE_OPEN) {
- /* Return previously read stats */
- return &(adapter->benet_stats);
- }
- /* Get Physical Addr */
- pa = pci_map_single(adapter->pdev, adapter->eth_statsp,
- sizeof(struct FWCMD_ETH_GET_STATISTICS),
- PCI_DMA_FROMDEVICE);
- ctxt->get_stat_sem_addr = (unsigned long)&adapter->get_eth_stat_sem;
- atomic_inc(&ctxt->get_stat_flag);
-
- be_rxf_query_eth_statistics(&pnob->fn_obj, adapter->eth_statsp,
- cpu_to_le64(pa), be_get_stat_cb, ctxt,
- NULL);
-
- ctxt->get_stats_timer.data = (unsigned long)ctxt;
- mod_timer(&ctxt->get_stats_timer, (jiffies + (HZ * 2)));
- down((void *)ctxt->get_stat_sem_addr); /* callback will unblock us */
-
- /* Adding port0 and port1 stats. */
- adapter->benet_stats.rx_packets =
- adapter->eth_statsp->params.response.p0recvdtotalframes +
- adapter->eth_statsp->params.response.p1recvdtotalframes;
- adapter->benet_stats.tx_packets =
- adapter->eth_statsp->params.response.p0xmitunicastframes +
- adapter->eth_statsp->params.response.p1xmitunicastframes;
- adapter->benet_stats.tx_bytes =
- adapter->eth_statsp->params.response.p0xmitbyteslsd +
- adapter->eth_statsp->params.response.p1xmitbyteslsd;
- adapter->benet_stats.rx_errors =
- adapter->eth_statsp->params.response.p0crcerrors +
- adapter->eth_statsp->params.response.p1crcerrors;
- adapter->benet_stats.rx_errors +=
- adapter->eth_statsp->params.response.p0alignmentsymerrs +
- adapter->eth_statsp->params.response.p1alignmentsymerrs;
- adapter->benet_stats.rx_errors +=
- adapter->eth_statsp->params.response.p0inrangelenerrors +
- adapter->eth_statsp->params.response.p1inrangelenerrors;
- adapter->benet_stats.rx_bytes =
- adapter->eth_statsp->params.response.p0recvdtotalbytesLSD +
- adapter->eth_statsp->params.response.p1recvdtotalbytesLSD;
- adapter->benet_stats.rx_crc_errors =
- adapter->eth_statsp->params.response.p0crcerrors +
- adapter->eth_statsp->params.response.p1crcerrors;
-
- adapter->benet_stats.tx_packets +=
- adapter->eth_statsp->params.response.p0xmitmulticastframes +
- adapter->eth_statsp->params.response.p1xmitmulticastframes;
- adapter->benet_stats.tx_packets +=
- adapter->eth_statsp->params.response.p0xmitbroadcastframes +
- adapter->eth_statsp->params.response.p1xmitbroadcastframes;
- adapter->benet_stats.tx_errors = 0;
-
- adapter->benet_stats.multicast =
- adapter->eth_statsp->params.response.p0xmitmulticastframes +
- adapter->eth_statsp->params.response.p1xmitmulticastframes;
-
- adapter->benet_stats.rx_fifo_errors =
- adapter->eth_statsp->params.response.p0rxfifooverflowdropped +
- adapter->eth_statsp->params.response.p1rxfifooverflowdropped;
- adapter->benet_stats.rx_frame_errors =
- adapter->eth_statsp->params.response.p0alignmentsymerrs +
- adapter->eth_statsp->params.response.p1alignmentsymerrs;
- adapter->benet_stats.rx_length_errors =
- adapter->eth_statsp->params.response.p0inrangelenerrors +
- adapter->eth_statsp->params.response.p1inrangelenerrors;
- adapter->benet_stats.rx_length_errors +=
- adapter->eth_statsp->params.response.p0outrangeerrors +
- adapter->eth_statsp->params.response.p1outrangeerrors;
- adapter->benet_stats.rx_length_errors +=
- adapter->eth_statsp->params.response.p0frametoolongerrors +
- adapter->eth_statsp->params.response.p1frametoolongerrors;
-
- pci_unmap_single(adapter->pdev, (ulong) adapter->eth_statsp,
- sizeof(struct FWCMD_ETH_GET_STATISTICS),
- PCI_DMA_FROMDEVICE);
- return &(adapter->benet_stats);
-
-}
-
-static void be_start_tx(struct be_net_object *pnob, u32 nposted)
-{
-#define CSR_ETH_MAX_SQPOSTS 255
- struct SQ_DB_AMAP sqdb;
-
- sqdb.dw[0] = 0;
-
- AMAP_SET_BITS_PTR(SQ_DB, cid, &sqdb, pnob->tx_q_id);
- while (nposted) {
- if (nposted > CSR_ETH_MAX_SQPOSTS) {
- AMAP_SET_BITS_PTR(SQ_DB, numPosted, &sqdb,
- CSR_ETH_MAX_SQPOSTS);
- nposted -= CSR_ETH_MAX_SQPOSTS;
- } else {
- AMAP_SET_BITS_PTR(SQ_DB, numPosted, &sqdb, nposted);
- nposted = 0;
- }
- PD_WRITE(&pnob->fn_obj, etx_sq_db, sqdb.dw[0]);
- }
-
- return;
-}
-
-static void update_tx_rate(struct be_adapter *adapter)
-{
- /* update the rate once in two seconds */
- if ((jiffies - adapter->eth_tx_jiffies) > 2 * (HZ)) {
- u32 r;
- r = adapter->eth_tx_bytes /
- ((jiffies - adapter->eth_tx_jiffies) / (HZ));
- r = (r / 1000000); /* M bytes/s */
- adapter->be_stat.bes_eth_tx_rate = (r * 8); /* M bits/s */
- adapter->eth_tx_jiffies = jiffies;
- adapter->eth_tx_bytes = 0;
- }
-}
-
-static int wrb_cnt_in_skb(struct sk_buff *skb)
-{
- int cnt = 0;
- while (skb) {
- if (skb->len > skb->data_len)
- cnt++;
- cnt += skb_shinfo(skb)->nr_frags;
- skb = skb_shinfo(skb)->frag_list;
- }
- BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
- return cnt;
-}
-
-static void wrb_fill(struct ETH_WRB_AMAP *wrb, u64 addr, int len)
-{
- AMAP_SET_BITS_PTR(ETH_WRB, frag_pa_hi, wrb, addr >> 32);
- AMAP_SET_BITS_PTR(ETH_WRB, frag_pa_lo, wrb, addr & 0xFFFFFFFF);
- AMAP_SET_BITS_PTR(ETH_WRB, frag_len, wrb, len);
-}
-
-static void wrb_fill_extra(struct ETH_WRB_AMAP *wrb, struct sk_buff *skb,
- struct be_net_object *pnob)
-{
- wrb->dw[2] = 0;
- wrb->dw[3] = 0;
- AMAP_SET_BITS_PTR(ETH_WRB, crc, wrb, 1);
- if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
- AMAP_SET_BITS_PTR(ETH_WRB, lso, wrb, 1);
- AMAP_SET_BITS_PTR(ETH_WRB, lso_mss, wrb,
- skb_shinfo(skb)->gso_size);
- } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
- u8 proto = ((struct iphdr *)ip_hdr(skb))->protocol;
- if (proto == IPPROTO_TCP)
- AMAP_SET_BITS_PTR(ETH_WRB, tcpcs, wrb, 1);
- else if (proto == IPPROTO_UDP)
- AMAP_SET_BITS_PTR(ETH_WRB, udpcs, wrb, 1);
- }
- if (pnob->vlan_grp && vlan_tx_tag_present(skb)) {
- AMAP_SET_BITS_PTR(ETH_WRB, vlan, wrb, 1);
- AMAP_SET_BITS_PTR(ETH_WRB, vlan_tag, wrb, vlan_tx_tag_get(skb));
- }
-}
-
-static inline void wrb_copy_extra(struct ETH_WRB_AMAP *to,
- struct ETH_WRB_AMAP *from)
-{
-
- to->dw[2] = from->dw[2];
- to->dw[3] = from->dw[3];
-}
-
-/* Returns the actual count of wrbs used including a possible dummy */
-static int copy_skb_to_txq(struct be_net_object *pnob, struct sk_buff *skb,
- u32 wrb_cnt, u32 *copied)
-{
- u64 busaddr;
- struct ETH_WRB_AMAP *wrb = NULL, *first = NULL;
- u32 i;
- bool dummy = true;
- struct pci_dev *pdev = pnob->adapter->pdev;
-
- if (wrb_cnt & 1)
- wrb_cnt++;
- else
- dummy = false;
-
- atomic_add(wrb_cnt, &pnob->tx_q_used);
-
- while (skb) {
- if (skb->len > skb->data_len) {
- int len = skb->len - skb->data_len;
- busaddr = pci_map_single(pdev, skb->data, len,
- PCI_DMA_TODEVICE);
- busaddr = cpu_to_le64(busaddr);
- wrb = &pnob->tx_q[pnob->tx_q_hd];
- if (first == NULL) {
- wrb_fill_extra(wrb, skb, pnob);
- first = wrb;
- } else {
- wrb_copy_extra(wrb, first);
- }
- wrb_fill(wrb, busaddr, len);
- be_adv_txq_hd(pnob);
- *copied += len;
- }
-
- for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
- struct skb_frag_struct *frag =
- &skb_shinfo(skb)->frags[i];
- busaddr = pci_map_page(pdev, frag->page,
- frag->page_offset, frag->size,
- PCI_DMA_TODEVICE);
- busaddr = cpu_to_le64(busaddr);
- wrb = &pnob->tx_q[pnob->tx_q_hd];
- if (first == NULL) {
- wrb_fill_extra(wrb, skb, pnob);
- first = wrb;
- } else {
- wrb_copy_extra(wrb, first);
- }
- wrb_fill(wrb, busaddr, frag->size);
- be_adv_txq_hd(pnob);
- *copied += frag->size;
- }
- skb = skb_shinfo(skb)->frag_list;
- }
-
- if (dummy) {
- wrb = &pnob->tx_q[pnob->tx_q_hd];
- BUG_ON(first == NULL);
- wrb_copy_extra(wrb, first);
- wrb_fill(wrb, 0, 0);
- be_adv_txq_hd(pnob);
- }
- AMAP_SET_BITS_PTR(ETH_WRB, complete, wrb, 1);
- AMAP_SET_BITS_PTR(ETH_WRB, last, wrb, 1);
- return wrb_cnt;
-}
-
-/* For each skb transmitted, tx_ctxt stores the num of wrbs in the
- * start index and skb pointer in the end index
- */
-static inline void be_tx_wrb_info_remember(struct be_net_object *pnob,
- struct sk_buff *skb, int wrb_cnt,
- u32 start)
-{
- *(u32 *) (&pnob->tx_ctxt[start]) = wrb_cnt;
- index_adv(&start, wrb_cnt - 1, pnob->tx_q_len);
- pnob->tx_ctxt[start] = skb;
-}
-
-static int benet_xmit(struct sk_buff *skb, struct net_device *netdev)
-{
- struct be_net_object *pnob = netdev_priv(netdev);
- struct be_adapter *adapter = pnob->adapter;
- u32 wrb_cnt, copied = 0;
- u32 start = pnob->tx_q_hd;
-
- adapter->be_stat.bes_tx_reqs++;
-
- wrb_cnt = wrb_cnt_in_skb(skb);
- spin_lock_bh(&adapter->txq_lock);
- if ((pnob->tx_q_len - 2 - atomic_read(&pnob->tx_q_used)) <= wrb_cnt) {
- netif_stop_queue(pnob->netdev);
- spin_unlock_bh(&adapter->txq_lock);
- adapter->be_stat.bes_tx_fails++;
- return NETDEV_TX_BUSY;
- }
- spin_unlock_bh(&adapter->txq_lock);
-
- wrb_cnt = copy_skb_to_txq(pnob, skb, wrb_cnt, &copied);
- be_tx_wrb_info_remember(pnob, skb, wrb_cnt, start);
-
- be_start_tx(pnob, wrb_cnt);
-
- adapter->eth_tx_bytes += copied;
- adapter->be_stat.bes_tx_wrbs += wrb_cnt;
- update_tx_rate(adapter);
- netdev->trans_start = jiffies;
-
- return NETDEV_TX_OK;
-}
-
-/*
- * This is the driver entry point to change the mtu of the device
- * Returns 0 for success and errno for failure.
- */
-static int benet_change_mtu(struct net_device *netdev, int new_mtu)
-{
- /*
- * BE supports jumbo frame size upto 9000 bytes including the link layer
- * header. Considering the different variants of frame formats possible
- * like VLAN, SNAP/LLC, the maximum possible value for MTU is 8974 bytes
- */
-
- if (new_mtu < (ETH_ZLEN + ETH_FCS_LEN) || (new_mtu > BE_MAX_MTU)) {
- dev_info(&netdev->dev, "Invalid MTU requested. "
- "Must be between %d and %d bytes\n",
- (ETH_ZLEN + ETH_FCS_LEN), BE_MAX_MTU);
- return -EINVAL;
- }
- dev_info(&netdev->dev, "MTU changed from %d to %d\n",
- netdev->mtu, new_mtu);
- netdev->mtu = new_mtu;
- return 0;
-}
-
-/*
- * This is the driver entry point to register a vlan with the device
- */
-static void benet_vlan_register(struct net_device *netdev,
- struct vlan_group *grp)
-{
- struct be_net_object *pnob = netdev_priv(netdev);
-
- be_disable_eq_intr(pnob);
- pnob->vlan_grp = grp;
- pnob->num_vlans = 0;
- be_enable_eq_intr(pnob);
-}
-
-/*
- * This is the driver entry point to add a vlan vlan_id
- * with the device netdev
- */
-static void benet_vlan_add_vid(struct net_device *netdev, u16 vlan_id)
-{
- struct be_net_object *pnob = netdev_priv(netdev);
-
- if (pnob->num_vlans == (BE_NUM_VLAN_SUPPORTED - 1)) {
- /* no way to return an error */
- dev_info(&netdev->dev,
- "BladeEngine: Cannot configure more than %d Vlans\n",
- BE_NUM_VLAN_SUPPORTED);
- return;
- }
- /* The new vlan tag will be in the slot indicated by num_vlans. */
- pnob->vlan_tag[pnob->num_vlans++] = vlan_id;
- be_rxf_vlan_config(&pnob->fn_obj, false, pnob->num_vlans,
- pnob->vlan_tag, NULL, NULL, NULL);
-}
-
-/*
- * This is the driver entry point to remove a vlan vlan_id
- * with the device netdev
- */
-static void benet_vlan_rem_vid(struct net_device *netdev, u16 vlan_id)
-{
- struct be_net_object *pnob = netdev_priv(netdev);
-
- u32 i, value;
-
- /*
- * In Blade Engine, we support 32 vlan tag filters across both ports.
- * To program a vlan tag, the RXF_RTPR_CSR register is used.
- * Each 32-bit value of RXF_RTDR_CSR can address 2 vlan tag entries.
- * The Vlan table is of depth 16. thus we support 32 tags.
- */
-
- value = vlan_id | VLAN_VALID_BIT;
- for (i = 0; i < BE_NUM_VLAN_SUPPORTED; i++) {
- if (pnob->vlan_tag[i] == vlan_id)
- break;
- }
-
- if (i == BE_NUM_VLAN_SUPPORTED)
- return;
- /* Now compact the vlan tag array by removing hole created. */
- while ((i + 1) < BE_NUM_VLAN_SUPPORTED) {
- pnob->vlan_tag[i] = pnob->vlan_tag[i + 1];
- i++;
- }
- if ((i + 1) == BE_NUM_VLAN_SUPPORTED)
- pnob->vlan_tag[i] = (u16) 0x0;
- pnob->num_vlans--;
- be_rxf_vlan_config(&pnob->fn_obj, false, pnob->num_vlans,
- pnob->vlan_tag, NULL, NULL, NULL);
-}
-
-/*
- * This function is called to program multicast
- * address in the multicast filter of the ASIC.
- */
-static void be_set_multicast_filter(struct net_device *netdev)
-{
- struct be_net_object *pnob = netdev_priv(netdev);
- struct dev_mc_list *mc_ptr;
- u8 mac_addr[32][ETH_ALEN];
- int i;
-
- if (netdev->flags & IFF_ALLMULTI) {
- /* set BE in Multicast promiscuous */
- be_rxf_multicast_config(&pnob->fn_obj, true, 0, NULL, NULL,
- NULL, NULL);
- return;
- }
-
- for (mc_ptr = netdev->mc_list, i = 0; mc_ptr;
- mc_ptr = mc_ptr->next, i++) {
- memcpy(&mac_addr[i][0], mc_ptr->dmi_addr, ETH_ALEN);
- }
-
- /* reset the promiscuous mode also. */
- be_rxf_multicast_config(&pnob->fn_obj, false, i,
- &mac_addr[0][0], NULL, NULL, NULL);
-}
-
-/*
- * This is the driver entry point to set multicast list
- * with the device netdev. This function will be used to
- * set promiscuous mode or multicast promiscuous mode
- * or multicast mode....
- */
-static void benet_set_multicast_list(struct net_device *netdev)
-{
- struct be_net_object *pnob = netdev_priv(netdev);
-
- if (netdev->flags & IFF_PROMISC) {
- be_rxf_promiscuous(&pnob->fn_obj, 1, 1, NULL, NULL, NULL);
- } else {
- be_rxf_promiscuous(&pnob->fn_obj, 0, 0, NULL, NULL, NULL);
- be_set_multicast_filter(netdev);
- }
-}
-
-int benet_init(struct net_device *netdev)
-{
- struct be_net_object *pnob = netdev_priv(netdev);
- struct be_adapter *adapter = pnob->adapter;
-
- ether_setup(netdev);
-
- netdev->open = &benet_open;
- netdev->stop = &benet_close;
- netdev->hard_start_xmit = &benet_xmit;
-
- netdev->get_stats = &benet_get_stats;
-
- netdev->set_multicast_list = &benet_set_multicast_list;
-
- netdev->change_mtu = &benet_change_mtu;
- netdev->set_mac_address = &benet_set_mac_addr;
-
- netdev->vlan_rx_register = benet_vlan_register;
- netdev->vlan_rx_add_vid = benet_vlan_add_vid;
- netdev->vlan_rx_kill_vid = benet_vlan_rem_vid;
-
- netdev->features =
- NETIF_F_SG | NETIF_F_HIGHDMA | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
- NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_IP_CSUM;
-
- netdev->flags |= IFF_MULTICAST;
-
- /* If device is DAC Capable, set the HIGHDMA flag for netdevice. */
- if (adapter->dma_64bit_cap)
- netdev->features |= NETIF_F_HIGHDMA;
-
- SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
- return 0;
-}
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-#ifndef _BENET_H_
-#define _BENET_H_
-
-#include <linux/pci.h>
-#include <linux/netdevice.h>
-#include <linux/inet_lro.h>
-#include "hwlib.h"
-
-#define _SA_MODULE_NAME "net-driver"
-
-#define VLAN_VALID_BIT 0x8000
-#define BE_NUM_VLAN_SUPPORTED 32
-#define BE_PORT_LINK_DOWN 0000
-#define BE_PORT_LINK_UP 0001
-#define BE_MAX_TX_FRAG_COUNT (30)
-
-/* Flag bits for send operation */
-#define IPCS (1 << 0) /* Enable IP checksum offload */
-#define UDPCS (1 << 1) /* Enable UDP checksum offload */
-#define TCPCS (1 << 2) /* Enable TCP checksum offload */
-#define LSO (1 << 3) /* Enable Large Segment offload */
-#define ETHVLAN (1 << 4) /* Enable VLAN insert */
-#define ETHEVENT (1 << 5) /* Generate event on completion */
-#define ETHCOMPLETE (1 << 6) /* Generate completion when done */
-#define IPSEC (1 << 7) /* Enable IPSEC */
-#define FORWARD (1 << 8) /* Send the packet in forwarding path */
-#define FIN (1 << 9) /* Issue FIN segment */
-
-#define BE_MAX_MTU 8974
-
-#define BE_MAX_LRO_DESCRIPTORS 8
-#define BE_LRO_MAX_PKTS 64
-#define BE_MAX_FRAGS_PER_FRAME 6
-
-extern const char be_drvr_ver[];
-extern char be_fw_ver[];
-extern char be_driver_name[];
-
-extern struct ethtool_ops be_ethtool_ops;
-
-#define BE_DEV_STATE_NONE 0
-#define BE_DEV_STATE_INIT 1
-#define BE_DEV_STATE_OPEN 2
-#define BE_DEV_STATE_SUSPEND 3
-
-/* This structure is used to describe physical fragments to use
- * for DMAing data from NIC.
- */
-struct be_recv_buffer {
- struct list_head rxb_list; /* for maintaining a linked list */
- void *rxb_va; /* buffer virtual address */
- u32 rxb_pa_lo; /* low part of physical address */
- u32 rxb_pa_hi; /* high part of physical address */
- u32 rxb_len; /* length of recv buffer */
- void *rxb_ctxt; /* context for OSM driver to use */
-};
-
-/*
- * fragment list to describe scattered data.
- */
-struct be_tx_frag_list {
- u32 txb_len; /* Size of this fragment */
- u32 txb_pa_lo; /* Lower 32 bits of 64 bit physical addr */
- u32 txb_pa_hi; /* Higher 32 bits of 64 bit physical addr */
-};
-
-struct be_rx_page_info {
- struct page *page;
- dma_addr_t bus;
- u16 page_offset;
-};
-
-/*
- * This structure is the main tracking structure for a NIC interface.
- */
-struct be_net_object {
- /* MCC Ring - used to send fwcmds to embedded ARM processor */
- struct MCC_WRB_AMAP *mcc_q; /* VA of the start of the ring */
- u32 mcc_q_len; /* # of WRB entries in this ring */
- u32 mcc_q_size;
- u32 mcc_q_hd; /* MCC ring head */
- u8 mcc_q_created; /* flag to help cleanup */
- struct be_mcc_object mcc_q_obj; /* BECLIB's MCC ring Object */
- dma_addr_t mcc_q_bus; /* DMA'ble bus address */
-
- /* MCC Completion Ring - FW responses to fwcmds sent from MCC ring */
- struct MCC_CQ_ENTRY_AMAP *mcc_cq; /* VA of the start of the ring */
- u32 mcc_cq_len; /* # of compl. entries in this ring */
- u32 mcc_cq_size;
- u32 mcc_cq_tl; /* compl. ring tail */
- u8 mcc_cq_created; /* flag to help cleanup */
- struct be_cq_object mcc_cq_obj; /* BECLIB's MCC compl. ring object */
- u32 mcc_cq_id; /* MCC ring ID */
- dma_addr_t mcc_cq_bus; /* DMA'ble bus address */
-
- struct ring_desc mb_rd; /* RD for MCC_MAIL_BOX */
- void *mb_ptr; /* mailbox ptr to be freed */
- dma_addr_t mb_bus; /* DMA'ble bus address */
- u32 mb_size;
-
- /* BEClib uses an array of context objects to track outstanding
- * requests to the MCC. We need allocate the same number of
- * conext entries as the number of entries in the MCC WRB ring
- */
- u32 mcc_wrb_ctxt_size;
- void *mcc_wrb_ctxt; /* pointer to the context area */
- u32 mcc_wrb_ctxtLen; /* Number of entries in the context */
- /*
- * NIC send request ring - used for xmitting raw ether frames.
- */
- struct ETH_WRB_AMAP *tx_q; /* VA of the start of the ring */
- u32 tx_q_len; /* # if entries in the send ring */
- u32 tx_q_size;
- u32 tx_q_hd; /* Head index. Next req. goes here */
- u32 tx_q_tl; /* Tail indx. oldest outstanding req. */
- u8 tx_q_created; /* flag to help cleanup */
- struct be_ethsq_object tx_q_obj;/* BECLIB's send Q handle */
- dma_addr_t tx_q_bus; /* DMA'ble bus address */
- u32 tx_q_id; /* send queue ring ID */
- u32 tx_q_port; /* 0 no binding, 1 port A, 2 port B */
- atomic_t tx_q_used; /* # of WRBs used */
- /* ptr to an array in which we store context info for each send req. */
- void **tx_ctxt;
- /*
- * NIC Send compl. ring - completion status for all NIC frames xmitted.
- */
- struct ETH_TX_COMPL_AMAP *tx_cq;/* VA of start of the ring */
- u32 txcq_len; /* # of entries in the ring */
- u32 tx_cq_size;
- /*
- * index into compl ring where the host expects next completion entry
- */
- u32 tx_cq_tl;
- u32 tx_cq_id; /* completion queue id */
- u8 tx_cq_created; /* flag to help cleanup */
- struct be_cq_object tx_cq_obj;
- dma_addr_t tx_cq_bus; /* DMA'ble bus address */
- /*
- * Event Queue - all completion entries post events here.
- */
- struct EQ_ENTRY_AMAP *event_q; /* VA of start of event queue */
- u32 event_q_len; /* # of entries */
- u32 event_q_size;
- u32 event_q_tl; /* Tail of the event queue */
- u32 event_q_id; /* Event queue ID */
- u8 event_q_created; /* flag to help cleanup */
- struct be_eq_object event_q_obj; /* Queue handle */
- dma_addr_t event_q_bus; /* DMA'ble bus address */
- /*
- * NIC receive queue - Data buffers to be used for receiving unicast,
- * broadcast and multi-cast frames are posted here.
- */
- struct ETH_RX_D_AMAP *rx_q; /* VA of start of the queue */
- u32 rx_q_len; /* # of entries */
- u32 rx_q_size;
- u32 rx_q_hd; /* Head of the queue */
- atomic_t rx_q_posted; /* number of posted buffers */
- u32 rx_q_id; /* queue ID */
- u8 rx_q_created; /* flag to help cleanup */
- struct be_ethrq_object rx_q_obj; /* NIC RX queue handle */
- dma_addr_t rx_q_bus; /* DMA'ble bus address */
- /*
- * Pointer to an array of opaque context object for use by OSM driver
- */
- void **rx_ctxt;
- /*
- * NIC unicast RX completion queue - all unicast ether frame completion
- * statuses from BE come here.
- */
- struct ETH_RX_COMPL_AMAP *rx_cq; /* VA of start of the queue */
- u32 rx_cq_len; /* # of entries */
- u32 rx_cq_size;
- u32 rx_cq_tl; /* Tail of the queue */
- u32 rx_cq_id; /* queue ID */
- u8 rx_cq_created; /* flag to help cleanup */
- struct be_cq_object rx_cq_obj; /* queue handle */
- dma_addr_t rx_cq_bus; /* DMA'ble bus address */
- struct be_function_object fn_obj; /* function object */
- bool fn_obj_created;
- u32 rx_buf_size; /* Size of the RX buffers */
-
- struct net_device *netdev;
- struct be_recv_buffer eth_rx_bufs[256]; /* to pass Rx buffer
- addresses */
- struct be_adapter *adapter; /* Pointer to OSM adapter */
- u32 devno; /* OSM, network dev no. */
- u32 use_port; /* Current active port */
- struct be_rx_page_info *rx_page_info; /* Array of Rx buf pages */
- u32 rx_pg_info_hd; /* Head of queue */
- int rxbuf_post_fail; /* RxBuff posting fail count */
- bool rx_pg_shared; /* Is an allocsted page shared as two frags ? */
- struct vlan_group *vlan_grp;
- u32 num_vlans; /* Number of vlans in BE's filter */
- u16 vlan_tag[BE_NUM_VLAN_SUPPORTED]; /* vlans currently configured */
- struct napi_struct napi;
- struct net_lro_mgr lro_mgr;
- struct net_lro_desc lro_desc[BE_MAX_LRO_DESCRIPTORS];
-};
-
-#define NET_FH(np) (&(np)->fn_obj)
-
-/*
- * BE driver statistics.
- */
-struct be_drvr_stat {
- u32 bes_tx_reqs; /* number of TX requests initiated */
- u32 bes_tx_fails; /* number of TX requests that failed */
- u32 bes_fwd_reqs; /* number of send reqs through forwarding i/f */
- u32 bes_tx_wrbs; /* number of tx WRBs used */
-
- u32 bes_ints; /* number of interrupts */
- u32 bes_polls; /* number of times NAPI called poll function */
- u32 bes_events; /* total evet entries processed */
- u32 bes_tx_events; /* number of tx completion events */
- u32 bes_rx_events; /* number of ucast rx completion events */
- u32 bes_tx_compl; /* number of tx completion entries processed */
- u32 bes_rx_compl; /* number of rx completion entries
- processed */
- u32 bes_ethrx_post_fail; /* number of ethrx buffer alloc
- failures */
- /*
- * number of non ether type II frames dropped where
- * frame len > length field of Mac Hdr
- */
- u32 bes_802_3_dropped_frames;
- /*
- * number of non ether type II frames malformed where
- * in frame len < length field of Mac Hdr
- */
- u32 bes_802_3_malformed_frames;
- u32 bes_ips; /* interrupts / sec */
- u32 bes_prev_ints; /* bes_ints at last IPS calculation */
- u16 bes_eth_tx_rate; /* ETH TX rate - Mb/sec */
- u16 bes_eth_rx_rate; /* ETH RX rate - Mb/sec */
- u32 bes_rx_coal; /* Num pkts coalasced */
- u32 bes_rx_flush; /* Num times coalasced */
- u32 bes_link_change_physical; /*Num of times physical link changed */
- u32 bes_link_change_virtual; /*Num of times virtual link changed */
- u32 bes_rx_misc_pkts; /* Misc pkts received */
-};
-
-/* Maximum interrupt delay (in microseconds) allowed */
-#define MAX_EQD 120
-
-/*
- * timer to prevent system shutdown hang for ever if h/w stops responding
- */
-struct be_timer_ctxt {
- atomic_t get_stat_flag;
- struct timer_list get_stats_timer;
- unsigned long get_stat_sem_addr;
-} ;
-
-/* This structure is the main BladeEngine driver context. */
-struct be_adapter {
- struct net_device *netdevp;
- struct be_drvr_stat be_stat;
- struct net_device_stats benet_stats;
-
- /* PCI BAR mapped addresses */
- u8 __iomem *csr_va; /* CSR */
- u8 __iomem *db_va; /* Door Bell */
- u8 __iomem *pci_va; /* PCI Config */
-
- struct tasklet_struct sts_handler;
- struct timer_list cq_timer;
- spinlock_t int_lock; /* to protect the isr field in adapter */
-
- struct FWCMD_ETH_GET_STATISTICS *eth_statsp;
- /*
- * This will enable the use of ethtool to enable or disable
- * Checksum on Rx pkts to be obeyed or disobeyed.
- * If this is true = 1, then whatever is the checksum on the
- * Received pkt as per BE, it will be given to the stack.
- * Else the stack will re calculate it.
- */
- bool rx_csum;
- /*
- * This will enable the use of ethtool to enable or disable
- * Coalese on Rx pkts to be obeyed or disobeyed.
- * If this is grater than 0 and less than 16 then coalascing
- * is enabled else it is disabled
- */
- u32 max_rx_coal;
- struct pci_dev *pdev; /* Pointer to OS's PCI dvice */
-
- spinlock_t txq_lock; /* to stop/wake queue based on tx_q_used */
-
- u32 isr; /* copy of Intr status reg. */
-
- u32 port0_link_sts; /* Port 0 link status */
- u32 port1_link_sts; /* port 1 list status */
- struct BE_LINK_STATUS *be_link_sts;
-
- /* pointer to the first netobject of this adapter */
- struct be_net_object *net_obj;
-
- /* Flags to indicate what to clean up */
- bool tasklet_started;
- bool isr_registered;
- /*
- * adaptive interrupt coalescing (AIC) related
- */
- bool enable_aic; /* 1 if AIC is enabled */
- u16 min_eqd; /* minimum EQ delay in usec */
- u16 max_eqd; /* minimum EQ delay in usec */
- u16 cur_eqd; /* current EQ delay in usec */
- /*
- * book keeping for interrupt / sec and TX/RX rate calculation
- */
- ulong ips_jiffies; /* jiffies at last IPS calc */
- u32 eth_tx_bytes;
- ulong eth_tx_jiffies;
- u32 eth_rx_bytes;
- ulong eth_rx_jiffies;
-
- struct semaphore get_eth_stat_sem;
-
- /* timer ctxt to prevent shutdown hanging due to un-responsive BE */
- struct be_timer_ctxt timer_ctxt;
-
-#define BE_MAX_MSIX_VECTORS 32
-#define BE_MAX_REQ_MSIX_VECTORS 1 /* only one EQ in Linux driver */
- struct msix_entry msix_entries[BE_MAX_MSIX_VECTORS];
- bool msix_enabled;
- bool dma_64bit_cap; /* the Device DAC capable or not */
- u8 dev_state; /* The current state of the device */
- u8 dev_pm_state; /* The State of device before going to suspend */
-};
-
-/*
- * Every second we look at the ints/sec and adjust eq_delay
- * between adapter->min_eqd and adapter->max_eqd to keep the ints/sec between
- * IPS_HI_WM and IPS_LO_WM.
- */
-#define IPS_HI_WM 18000
-#define IPS_LO_WM 8000
-
-
-static inline void index_adv(u32 *index, u32 val, u32 limit)
-{
- BUG_ON(limit & (limit-1));
- *index = (*index + val) & (limit - 1);
-}
-
-static inline void index_inc(u32 *index, u32 limit)
-{
- BUG_ON(limit & (limit-1));
- *index = (*index + 1) & (limit - 1);
-}
-
-static inline void be_adv_eq_tl(struct be_net_object *pnob)
-{
- index_inc(&pnob->event_q_tl, pnob->event_q_len);
-}
-
-static inline void be_adv_txq_hd(struct be_net_object *pnob)
-{
- index_inc(&pnob->tx_q_hd, pnob->tx_q_len);
-}
-
-static inline void be_adv_txq_tl(struct be_net_object *pnob)
-{
- index_inc(&pnob->tx_q_tl, pnob->tx_q_len);
-}
-
-static inline void be_adv_txcq_tl(struct be_net_object *pnob)
-{
- index_inc(&pnob->tx_cq_tl, pnob->txcq_len);
-}
-
-static inline void be_adv_rxq_hd(struct be_net_object *pnob)
-{
- index_inc(&pnob->rx_q_hd, pnob->rx_q_len);
-}
-
-static inline void be_adv_rxcq_tl(struct be_net_object *pnob)
-{
- index_inc(&pnob->rx_cq_tl, pnob->rx_cq_len);
-}
-
-static inline u32 tx_compl_lastwrb_idx_get(struct be_net_object *pnob)
-{
- return (pnob->tx_q_tl + *(u32 *)&pnob->tx_ctxt[pnob->tx_q_tl] - 1)
- & (pnob->tx_q_len - 1);
-}
-
-int benet_init(struct net_device *);
-int be_ethtool_ioctl(struct net_device *, struct ifreq *);
-struct net_device_stats *benet_get_stats(struct net_device *);
-void be_process_intr(unsigned long context);
-irqreturn_t be_int(int irq, void *dev);
-void be_post_eth_rx_buffs(struct be_net_object *);
-void be_get_stat_cb(void *, int, struct MCC_WRB_AMAP *);
-void be_get_stats_timer_handler(unsigned long);
-void be_wait_nic_tx_cmplx_cmpl(struct be_net_object *);
-void be_print_link_info(struct BE_LINK_STATUS *);
-void be_update_link_status(struct be_adapter *);
-void be_init_procfs(struct be_adapter *);
-void be_cleanup_procfs(struct be_adapter *);
-int be_poll(struct napi_struct *, int);
-struct ETH_RX_COMPL_AMAP *be_get_rx_cmpl(struct be_net_object *);
-void be_notify_cmpl(struct be_net_object *, int, int, int);
-void be_enable_intr(struct be_net_object *);
-void be_enable_eq_intr(struct be_net_object *);
-void be_disable_intr(struct be_net_object *);
-void be_disable_eq_intr(struct be_net_object *);
-int be_set_uc_mac_adr(struct be_net_object *, u8, u8, u8,
- u8 *, mcc_wrb_cqe_callback, void *);
-int be_get_flow_ctl(struct be_function_object *pFnObj, bool *, bool *);
-void process_one_tx_compl(struct be_net_object *pnob, u32 end_idx);
-
-#endif /* _BENET_H_ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-#ifndef _BESTATUS_H_
-#define _BESTATUS_H_
-
-#define BE_SUCCESS (0x00000000L)
-/*
- * MessageId: BE_PENDING
- * The BladeEngine Driver call succeeded, and pended operation.
- */
-#define BE_PENDING (0x20070001L)
-#define BE_STATUS_PENDING (BE_PENDING)
-/*
- * MessageId: BE_NOT_OK
- * An error occurred.
- */
-#define BE_NOT_OK (0xE0070002L)
-/*
- * MessageId: BE_STATUS_SYSTEM_RESOURCES
- * Insufficient host system resources exist to complete the API.
- */
-#define BE_STATUS_SYSTEM_RESOURCES (0xE0070003L)
-/*
- * MessageId: BE_STATUS_CHIP_RESOURCES
- * Insufficient chip resources exist to complete the API.
- */
-#define BE_STATUS_CHIP_RESOURCES (0xE0070004L)
-/*
- * MessageId: BE_STATUS_NO_RESOURCE
- * Insufficient resources to complete request.
- */
-#define BE_STATUS_NO_RESOURCE (0xE0070005L)
-/*
- * MessageId: BE_STATUS_BUSY
- * Resource is currently busy.
- */
-#define BE_STATUS_BUSY (0xE0070006L)
-/*
- * MessageId: BE_STATUS_INVALID_PARAMETER
- * Invalid Parameter in request.
- */
-#define BE_STATUS_INVALID_PARAMETER (0xE0000007L)
-/*
- * MessageId: BE_STATUS_NOT_SUPPORTED
- * Requested operation is not supported.
- */
-#define BE_STATUS_NOT_SUPPORTED (0xE000000DL)
-
-/*
- * ***************************************************************************
- * E T H E R N E T S T A T U S
- * ***************************************************************************
- */
-
-/*
- * MessageId: BE_ETH_TX_ERROR
- * The Ethernet device driver failed to transmit a packet.
- */
-#define BE_ETH_TX_ERROR (0xE0070101L)
-
-/*
- * ***************************************************************************
- * S H A R E D S T A T U S
- * ***************************************************************************
- */
-
-/*
- * MessageId: BE_STATUS_VBD_INVALID_VERSION
- * The device driver is not compatible with this version of the VBD.
- */
-#define BE_STATUS_INVALID_VERSION (0xE0070402L)
-/*
- * MessageId: BE_STATUS_DOMAIN_DENIED
- * The operation failed to complete due to insufficient access
- * rights for the requesting domain.
- */
-#define BE_STATUS_DOMAIN_DENIED (0xE0070403L)
-/*
- * MessageId: BE_STATUS_TCP_NOT_STARTED
- * The embedded TCP/IP stack has not been started.
- */
-#define BE_STATUS_TCP_NOT_STARTED (0xE0070409L)
-/*
- * MessageId: BE_STATUS_NO_MCC_WRB
- * No free MCC WRB are available for posting the request.
- */
-#define BE_STATUS_NO_MCC_WRB (0xE0070414L)
-
-#endif /* _BESTATUS_ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * Autogenerated by srcgen version: 0127
- */
-#ifndef __cev_amap_h__
-#define __cev_amap_h__
-#include "ep.h"
-
-/*
- * Host Interrupt Status Register 0. The first of four application
- * interrupt status registers. This register contains the interrupts
- * for Event Queues EQ0 through EQ31.
- */
-struct BE_CEV_ISR0_CSR_AMAP {
- u8 interrupt0; /* DWORD 0 */
- u8 interrupt1; /* DWORD 0 */
- u8 interrupt2; /* DWORD 0 */
- u8 interrupt3; /* DWORD 0 */
- u8 interrupt4; /* DWORD 0 */
- u8 interrupt5; /* DWORD 0 */
- u8 interrupt6; /* DWORD 0 */
- u8 interrupt7; /* DWORD 0 */
- u8 interrupt8; /* DWORD 0 */
- u8 interrupt9; /* DWORD 0 */
- u8 interrupt10; /* DWORD 0 */
- u8 interrupt11; /* DWORD 0 */
- u8 interrupt12; /* DWORD 0 */
- u8 interrupt13; /* DWORD 0 */
- u8 interrupt14; /* DWORD 0 */
- u8 interrupt15; /* DWORD 0 */
- u8 interrupt16; /* DWORD 0 */
- u8 interrupt17; /* DWORD 0 */
- u8 interrupt18; /* DWORD 0 */
- u8 interrupt19; /* DWORD 0 */
- u8 interrupt20; /* DWORD 0 */
- u8 interrupt21; /* DWORD 0 */
- u8 interrupt22; /* DWORD 0 */
- u8 interrupt23; /* DWORD 0 */
- u8 interrupt24; /* DWORD 0 */
- u8 interrupt25; /* DWORD 0 */
- u8 interrupt26; /* DWORD 0 */
- u8 interrupt27; /* DWORD 0 */
- u8 interrupt28; /* DWORD 0 */
- u8 interrupt29; /* DWORD 0 */
- u8 interrupt30; /* DWORD 0 */
- u8 interrupt31; /* DWORD 0 */
-} __packed;
-struct CEV_ISR0_CSR_AMAP {
- u32 dw[1];
-};
-
-/*
- * Host Interrupt Status Register 1. The second of four application
- * interrupt status registers. This register contains the interrupts
- * for Event Queues EQ32 through EQ63.
- */
-struct BE_CEV_ISR1_CSR_AMAP {
- u8 interrupt32; /* DWORD 0 */
- u8 interrupt33; /* DWORD 0 */
- u8 interrupt34; /* DWORD 0 */
- u8 interrupt35; /* DWORD 0 */
- u8 interrupt36; /* DWORD 0 */
- u8 interrupt37; /* DWORD 0 */
- u8 interrupt38; /* DWORD 0 */
- u8 interrupt39; /* DWORD 0 */
- u8 interrupt40; /* DWORD 0 */
- u8 interrupt41; /* DWORD 0 */
- u8 interrupt42; /* DWORD 0 */
- u8 interrupt43; /* DWORD 0 */
- u8 interrupt44; /* DWORD 0 */
- u8 interrupt45; /* DWORD 0 */
- u8 interrupt46; /* DWORD 0 */
- u8 interrupt47; /* DWORD 0 */
- u8 interrupt48; /* DWORD 0 */
- u8 interrupt49; /* DWORD 0 */
- u8 interrupt50; /* DWORD 0 */
- u8 interrupt51; /* DWORD 0 */
- u8 interrupt52; /* DWORD 0 */
- u8 interrupt53; /* DWORD 0 */
- u8 interrupt54; /* DWORD 0 */
- u8 interrupt55; /* DWORD 0 */
- u8 interrupt56; /* DWORD 0 */
- u8 interrupt57; /* DWORD 0 */
- u8 interrupt58; /* DWORD 0 */
- u8 interrupt59; /* DWORD 0 */
- u8 interrupt60; /* DWORD 0 */
- u8 interrupt61; /* DWORD 0 */
- u8 interrupt62; /* DWORD 0 */
- u8 interrupt63; /* DWORD 0 */
-} __packed;
-struct CEV_ISR1_CSR_AMAP {
- u32 dw[1];
-};
-/*
- * Host Interrupt Status Register 2. The third of four application
- * interrupt status registers. This register contains the interrupts
- * for Event Queues EQ64 through EQ95.
- */
-struct BE_CEV_ISR2_CSR_AMAP {
- u8 interrupt64; /* DWORD 0 */
- u8 interrupt65; /* DWORD 0 */
- u8 interrupt66; /* DWORD 0 */
- u8 interrupt67; /* DWORD 0 */
- u8 interrupt68; /* DWORD 0 */
- u8 interrupt69; /* DWORD 0 */
- u8 interrupt70; /* DWORD 0 */
- u8 interrupt71; /* DWORD 0 */
- u8 interrupt72; /* DWORD 0 */
- u8 interrupt73; /* DWORD 0 */
- u8 interrupt74; /* DWORD 0 */
- u8 interrupt75; /* DWORD 0 */
- u8 interrupt76; /* DWORD 0 */
- u8 interrupt77; /* DWORD 0 */
- u8 interrupt78; /* DWORD 0 */
- u8 interrupt79; /* DWORD 0 */
- u8 interrupt80; /* DWORD 0 */
- u8 interrupt81; /* DWORD 0 */
- u8 interrupt82; /* DWORD 0 */
- u8 interrupt83; /* DWORD 0 */
- u8 interrupt84; /* DWORD 0 */
- u8 interrupt85; /* DWORD 0 */
- u8 interrupt86; /* DWORD 0 */
- u8 interrupt87; /* DWORD 0 */
- u8 interrupt88; /* DWORD 0 */
- u8 interrupt89; /* DWORD 0 */
- u8 interrupt90; /* DWORD 0 */
- u8 interrupt91; /* DWORD 0 */
- u8 interrupt92; /* DWORD 0 */
- u8 interrupt93; /* DWORD 0 */
- u8 interrupt94; /* DWORD 0 */
- u8 interrupt95; /* DWORD 0 */
-} __packed;
-struct CEV_ISR2_CSR_AMAP {
- u32 dw[1];
-};
-
-/*
- * Host Interrupt Status Register 3. The fourth of four application
- * interrupt status registers. This register contains the interrupts
- * for Event Queues EQ96 through EQ127.
- */
-struct BE_CEV_ISR3_CSR_AMAP {
- u8 interrupt96; /* DWORD 0 */
- u8 interrupt97; /* DWORD 0 */
- u8 interrupt98; /* DWORD 0 */
- u8 interrupt99; /* DWORD 0 */
- u8 interrupt100; /* DWORD 0 */
- u8 interrupt101; /* DWORD 0 */
- u8 interrupt102; /* DWORD 0 */
- u8 interrupt103; /* DWORD 0 */
- u8 interrupt104; /* DWORD 0 */
- u8 interrupt105; /* DWORD 0 */
- u8 interrupt106; /* DWORD 0 */
- u8 interrupt107; /* DWORD 0 */
- u8 interrupt108; /* DWORD 0 */
- u8 interrupt109; /* DWORD 0 */
- u8 interrupt110; /* DWORD 0 */
- u8 interrupt111; /* DWORD 0 */
- u8 interrupt112; /* DWORD 0 */
- u8 interrupt113; /* DWORD 0 */
- u8 interrupt114; /* DWORD 0 */
- u8 interrupt115; /* DWORD 0 */
- u8 interrupt116; /* DWORD 0 */
- u8 interrupt117; /* DWORD 0 */
- u8 interrupt118; /* DWORD 0 */
- u8 interrupt119; /* DWORD 0 */
- u8 interrupt120; /* DWORD 0 */
- u8 interrupt121; /* DWORD 0 */
- u8 interrupt122; /* DWORD 0 */
- u8 interrupt123; /* DWORD 0 */
- u8 interrupt124; /* DWORD 0 */
- u8 interrupt125; /* DWORD 0 */
- u8 interrupt126; /* DWORD 0 */
- u8 interrupt127; /* DWORD 0 */
-} __packed;
-struct CEV_ISR3_CSR_AMAP {
- u32 dw[1];
-};
-
-/* Completions and Events block Registers. */
-struct BE_CEV_CSRMAP_AMAP {
- u8 rsvd0[32]; /* DWORD 0 */
- u8 rsvd1[32]; /* DWORD 1 */
- u8 rsvd2[32]; /* DWORD 2 */
- u8 rsvd3[32]; /* DWORD 3 */
- struct BE_CEV_ISR0_CSR_AMAP isr0;
- struct BE_CEV_ISR1_CSR_AMAP isr1;
- struct BE_CEV_ISR2_CSR_AMAP isr2;
- struct BE_CEV_ISR3_CSR_AMAP isr3;
- u8 rsvd4[32]; /* DWORD 8 */
- u8 rsvd5[32]; /* DWORD 9 */
- u8 rsvd6[32]; /* DWORD 10 */
- u8 rsvd7[32]; /* DWORD 11 */
- u8 rsvd8[32]; /* DWORD 12 */
- u8 rsvd9[32]; /* DWORD 13 */
- u8 rsvd10[32]; /* DWORD 14 */
- u8 rsvd11[32]; /* DWORD 15 */
- u8 rsvd12[32]; /* DWORD 16 */
- u8 rsvd13[32]; /* DWORD 17 */
- u8 rsvd14[32]; /* DWORD 18 */
- u8 rsvd15[32]; /* DWORD 19 */
- u8 rsvd16[32]; /* DWORD 20 */
- u8 rsvd17[32]; /* DWORD 21 */
- u8 rsvd18[32]; /* DWORD 22 */
- u8 rsvd19[32]; /* DWORD 23 */
- u8 rsvd20[32]; /* DWORD 24 */
- u8 rsvd21[32]; /* DWORD 25 */
- u8 rsvd22[32]; /* DWORD 26 */
- u8 rsvd23[32]; /* DWORD 27 */
- u8 rsvd24[32]; /* DWORD 28 */
- u8 rsvd25[32]; /* DWORD 29 */
- u8 rsvd26[32]; /* DWORD 30 */
- u8 rsvd27[32]; /* DWORD 31 */
- u8 rsvd28[32]; /* DWORD 32 */
- u8 rsvd29[32]; /* DWORD 33 */
- u8 rsvd30[192]; /* DWORD 34 */
- u8 rsvd31[192]; /* DWORD 40 */
- u8 rsvd32[160]; /* DWORD 46 */
- u8 rsvd33[160]; /* DWORD 51 */
- u8 rsvd34[160]; /* DWORD 56 */
- u8 rsvd35[96]; /* DWORD 61 */
- u8 rsvd36[192][32]; /* DWORD 64 */
-} __packed;
-struct CEV_CSRMAP_AMAP {
- u32 dw[256];
-};
-
-#endif /* __cev_amap_h__ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-#include "hwlib.h"
-#include "bestatus.h"
-
-/*
- * Completion Queue Objects
- */
-/*
- *============================================================================
- * P U B L I C R O U T I N E S
- *============================================================================
- */
-
-/*
- This routine creates a completion queue based on the client completion
- queue configuration information.
-
-
- FunctionObject - Handle to a function object
- CqBaseVa - Base VA for a the CQ ring
- NumEntries - CEV_CQ_CNT_* values
- solEventEnable - 0 = All CQEs can generate Events if CQ is eventable
- 1 = only CQEs with solicited bit set are eventable
- eventable - Eventable CQ, generates interrupts.
- nodelay - 1 = Force interrupt, relevent if CQ eventable.
- Interrupt is asserted immediately after EQE
- write is confirmed, regardless of EQ Timer
- or watermark settings.
- wme - Enable watermark based coalescing
- wmThresh - High watermark(CQ fullness at which event
- or interrupt should be asserted). These are the
- CEV_WATERMARK encoded values.
- EqObject - EQ Handle to assign to this CQ
- ppCqObject - Internal CQ Handle returned.
-
- Returns BE_SUCCESS if successfull, otherwise a useful error code is
- returned.
-
- IRQL < DISPATCH_LEVEL
-
-*/
-int be_cq_create(struct be_function_object *pfob,
- struct ring_desc *rd, u32 length, bool solicited_eventable,
- bool no_delay, u32 wm_thresh,
- struct be_eq_object *eq_object, struct be_cq_object *cq_object)
-{
- int status = BE_SUCCESS;
- u32 num_entries_encoding;
- u32 num_entries = length / sizeof(struct MCC_CQ_ENTRY_AMAP);
- struct FWCMD_COMMON_CQ_CREATE *fwcmd = NULL;
- struct MCC_WRB_AMAP *wrb = NULL;
- u32 n;
- unsigned long irql;
-
- ASSERT(rd);
- ASSERT(cq_object);
- ASSERT(length % sizeof(struct MCC_CQ_ENTRY_AMAP) == 0);
-
- switch (num_entries) {
- case 256:
- num_entries_encoding = CEV_CQ_CNT_256;
- break;
- case 512:
- num_entries_encoding = CEV_CQ_CNT_512;
- break;
- case 1024:
- num_entries_encoding = CEV_CQ_CNT_1024;
- break;
- default:
- ASSERT(0);
- return BE_STATUS_INVALID_PARAMETER;
- }
-
- /*
- * All cq entries all the same size. Use iSCSI version
- * as a test for the proper rd length.
- */
- memset(cq_object, 0, sizeof(*cq_object));
-
- atomic_set(&cq_object->ref_count, 0);
- cq_object->parent_function = pfob;
- cq_object->eq_object = eq_object;
- cq_object->num_entries = num_entries;
- /* save for MCC cq processing */
- cq_object->va = rd->va;
-
- /* map into UT. */
- length = num_entries * sizeof(struct MCC_CQ_ENTRY_AMAP);
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- wrb = be_function_peek_mcc_wrb(pfob);
- if (!wrb) {
- ASSERT(wrb);
- TRACE(DL_ERR, "No free MCC WRBs in create EQ.");
- status = BE_STATUS_NO_MCC_WRB;
- goto Error;
- }
- /* Prepares an embedded fwcmd, including request/response sizes. */
- fwcmd = BE_PREPARE_EMBEDDED_FWCMD(pfob, wrb, COMMON_CQ_CREATE);
-
- fwcmd->params.request.num_pages = PAGES_SPANNED(OFFSET_IN_PAGE(rd->va),
- length);
-
- AMAP_SET_BITS_PTR(CQ_CONTEXT, valid, &fwcmd->params.request.context, 1);
- n = pfob->pci_function_number;
- AMAP_SET_BITS_PTR(CQ_CONTEXT, Func, &fwcmd->params.request.context, n);
-
- n = (eq_object != NULL);
- AMAP_SET_BITS_PTR(CQ_CONTEXT, Eventable,
- &fwcmd->params.request.context, n);
- AMAP_SET_BITS_PTR(CQ_CONTEXT, Armed, &fwcmd->params.request.context, 1);
-
- n = eq_object ? eq_object->eq_id : 0;
- AMAP_SET_BITS_PTR(CQ_CONTEXT, EQID, &fwcmd->params.request.context, n);
- AMAP_SET_BITS_PTR(CQ_CONTEXT, Count,
- &fwcmd->params.request.context, num_entries_encoding);
-
- n = 0; /* Protection Domain is always 0 in Linux driver */
- AMAP_SET_BITS_PTR(CQ_CONTEXT, PD, &fwcmd->params.request.context, n);
- AMAP_SET_BITS_PTR(CQ_CONTEXT, NoDelay,
- &fwcmd->params.request.context, no_delay);
- AMAP_SET_BITS_PTR(CQ_CONTEXT, SolEvent,
- &fwcmd->params.request.context, solicited_eventable);
-
- n = (wm_thresh != 0xFFFFFFFF);
- AMAP_SET_BITS_PTR(CQ_CONTEXT, WME, &fwcmd->params.request.context, n);
-
- n = (n ? wm_thresh : 0);
- AMAP_SET_BITS_PTR(CQ_CONTEXT, Watermark,
- &fwcmd->params.request.context, n);
- /* Create a page list for the FWCMD. */
- be_rd_to_pa_list(rd, fwcmd->params.request.pages,
- ARRAY_SIZE(fwcmd->params.request.pages));
-
- /* Post the f/w command */
- status = be_function_post_mcc_wrb(pfob, wrb, NULL, NULL, NULL,
- NULL, NULL, fwcmd, NULL);
- if (status != BE_SUCCESS) {
- TRACE(DL_ERR, "MCC to create CQ failed.");
- goto Error;
- }
- /* Remember the CQ id. */
- cq_object->cq_id = fwcmd->params.response.cq_id;
-
- /* insert this cq into eq_object reference */
- if (eq_object) {
- atomic_inc(&eq_object->ref_count);
- list_add_tail(&cq_object->cqlist_for_eq,
- &eq_object->cq_list_head);
- }
-
-Error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
-
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
-/*
-
- Deferences the given object. Once the object's reference count drops to
- zero, the object is destroyed and all resources that are held by this object
- are released. The on-chip context is also destroyed along with the queue
- ID, and any mappings made into the UT.
-
- cq_object - CQ handle returned from cq_object_create.
-
- returns the current reference count on the object
-
- IRQL: IRQL < DISPATCH_LEVEL
-*/
-int be_cq_destroy(struct be_cq_object *cq_object)
-{
- int status = 0;
-
- /* Nothing should reference this CQ at this point. */
- ASSERT(atomic_read(&cq_object->ref_count) == 0);
-
- /* Send fwcmd to destroy the CQ. */
- status = be_function_ring_destroy(cq_object->parent_function,
- cq_object->cq_id, FWCMD_RING_TYPE_CQ,
- NULL, NULL, NULL, NULL);
- ASSERT(status == 0);
-
- /* Remove reference if this is an eventable CQ. */
- if (cq_object->eq_object) {
- atomic_dec(&cq_object->eq_object->ref_count);
- list_del(&cq_object->cqlist_for_eq);
- }
- return BE_SUCCESS;
-}
-
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * Autogenerated by srcgen version: 0127
- */
-#ifndef __descriptors_amap_h__
-#define __descriptors_amap_h__
-
-/*
- * --- IPC_NODE_ID_ENUM ---
- * IPC processor id values
- */
-#define TPOST_NODE_ID (0) /* TPOST ID */
-#define TPRE_NODE_ID (1) /* TPRE ID */
-#define TXULP0_NODE_ID (2) /* TXULP0 ID */
-#define TXULP1_NODE_ID (3) /* TXULP1 ID */
-#define TXULP2_NODE_ID (4) /* TXULP2 ID */
-#define RXULP0_NODE_ID (5) /* RXULP0 ID */
-#define RXULP1_NODE_ID (6) /* RXULP1 ID */
-#define RXULP2_NODE_ID (7) /* RXULP2 ID */
-#define MPU_NODE_ID (15) /* MPU ID */
-
-/*
- * --- MAC_ID_ENUM ---
- * Meaning of the mac_id field in rxpp_eth_d
- */
-#define PORT0_HOST_MAC0 (0) /* PD 0, Port 0, host networking, MAC 0. */
-#define PORT0_HOST_MAC1 (1) /* PD 0, Port 0, host networking, MAC 1. */
-#define PORT0_STORAGE_MAC0 (2) /* PD 0, Port 0, host storage, MAC 0. */
-#define PORT0_STORAGE_MAC1 (3) /* PD 0, Port 0, host storage, MAC 1. */
-#define PORT1_HOST_MAC0 (4) /* PD 0, Port 1 host networking, MAC 0. */
-#define PORT1_HOST_MAC1 (5) /* PD 0, Port 1 host networking, MAC 1. */
-#define PORT1_STORAGE_MAC0 (6) /* PD 0, Port 1 host storage, MAC 0. */
-#define PORT1_STORAGE_MAC1 (7) /* PD 0, Port 1 host storage, MAC 1. */
-#define FIRST_VM_MAC (8) /* PD 1 MAC. Protection domains have IDs */
- /* from 0x8-0x26, one per PD. */
-#define LAST_VM_MAC (38) /* PD 31 MAC. */
-#define MGMT_MAC (39) /* Management port MAC. */
-#define MARBLE_MAC0 (59) /* Used for flushing function 0 receive */
- /*
- * queues before re-using a torn-down
- * receive ring. the DA =
- * 00-00-00-00-00-00, and the MSB of the
- * SA = 00
- */
-#define MARBLE_MAC1 (60) /* Used for flushing function 1 receive */
- /*
- * queues before re-using a torn-down
- * receive ring. the DA =
- * 00-00-00-00-00-00, and the MSB of the
- * SA != 00
- */
-#define NULL_MAC (61) /* Promiscuous mode, indicates no match */
-#define MCAST_MAC (62) /* Multicast match. */
-#define BCAST_MATCH (63) /* Broadcast match. */
-
-#endif /* __descriptors_amap_h__ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * Autogenerated by srcgen version: 0127
- */
-#ifndef __doorbells_amap_h__
-#define __doorbells_amap_h__
-
-/* The TX/RDMA send queue doorbell. */
-struct BE_SQ_DB_AMAP {
- u8 cid[11]; /* DWORD 0 */
- u8 rsvd0[5]; /* DWORD 0 */
- u8 numPosted[14]; /* DWORD 0 */
- u8 rsvd1[2]; /* DWORD 0 */
-} __packed;
-struct SQ_DB_AMAP {
- u32 dw[1];
-};
-
-/* The receive queue doorbell. */
-struct BE_RQ_DB_AMAP {
- u8 rq[10]; /* DWORD 0 */
- u8 rsvd0[13]; /* DWORD 0 */
- u8 Invalidate; /* DWORD 0 */
- u8 numPosted[8]; /* DWORD 0 */
-} __packed;
-struct RQ_DB_AMAP {
- u32 dw[1];
-};
-
-/*
- * The CQ/EQ doorbell. Software MUST set reserved fields in this
- * descriptor to zero, otherwise (CEV) hardware will not execute the
- * doorbell (flagging a bad_db_qid error instead).
- */
-struct BE_CQ_DB_AMAP {
- u8 qid[10]; /* DWORD 0 */
- u8 rsvd0[4]; /* DWORD 0 */
- u8 rearm; /* DWORD 0 */
- u8 event; /* DWORD 0 */
- u8 num_popped[13]; /* DWORD 0 */
- u8 rsvd1[3]; /* DWORD 0 */
-} __packed;
-struct CQ_DB_AMAP {
- u32 dw[1];
-};
-
-struct BE_TPM_RQ_DB_AMAP {
- u8 qid[10]; /* DWORD 0 */
- u8 rsvd0[6]; /* DWORD 0 */
- u8 numPosted[11]; /* DWORD 0 */
- u8 mss_cnt[5]; /* DWORD 0 */
-} __packed;
-struct TPM_RQ_DB_AMAP {
- u32 dw[1];
-};
-
-/*
- * Post WRB Queue Doorbell Register used by the host Storage stack
- * to notify the controller of a posted Work Request Block
- */
-struct BE_WRB_POST_DB_AMAP {
- u8 wrb_cid[10]; /* DWORD 0 */
- u8 rsvd0[6]; /* DWORD 0 */
- u8 wrb_index[8]; /* DWORD 0 */
- u8 numberPosted[8]; /* DWORD 0 */
-} __packed;
-struct WRB_POST_DB_AMAP {
- u32 dw[1];
-};
-
-/*
- * Update Default PDU Queue Doorbell Register used to communicate
- * to the controller that the driver has stopped processing the queue
- * and where in the queue it stopped, this is
- * a CQ Entry Type. Used by storage driver.
- */
-struct BE_DEFAULT_PDU_DB_AMAP {
- u8 qid[10]; /* DWORD 0 */
- u8 rsvd0[4]; /* DWORD 0 */
- u8 rearm; /* DWORD 0 */
- u8 event; /* DWORD 0 */
- u8 cqproc[14]; /* DWORD 0 */
- u8 rsvd1[2]; /* DWORD 0 */
-} __packed;
-struct DEFAULT_PDU_DB_AMAP {
- u32 dw[1];
-};
-
-/* Management Command and Controller default fragment ring */
-struct BE_MCC_DB_AMAP {
- u8 rid[11]; /* DWORD 0 */
- u8 rsvd0[5]; /* DWORD 0 */
- u8 numPosted[14]; /* DWORD 0 */
- u8 rsvd1[2]; /* DWORD 0 */
-} __packed;
-struct MCC_DB_AMAP {
- u32 dw[1];
-};
-
-/*
- * Used for bootstrapping the Host interface. This register is
- * used for driver communication with the MPU when no MCC Rings exist.
- * The software must write this register twice to post any MCC
- * command. First, it writes the register with hi=1 and the upper bits of
- * the physical address for the MCC_MAILBOX structure. Software must poll
- * the ready bit until this is acknowledged. Then, sotware writes the
- * register with hi=0 with the lower bits in the address. It must
- * poll the ready bit until the MCC command is complete. Upon completion,
- * the MCC_MAILBOX will contain a valid completion queue entry.
- */
-struct BE_MPU_MAILBOX_DB_AMAP {
- u8 ready; /* DWORD 0 */
- u8 hi; /* DWORD 0 */
- u8 address[30]; /* DWORD 0 */
-} __packed;
-struct MPU_MAILBOX_DB_AMAP {
- u32 dw[1];
-};
-
-/*
- * This is the protection domain doorbell register map. Note that
- * while this map shows doorbells for all Blade Engine supported
- * protocols, not all of these may be valid in a given function or
- * protection domain. It is the responsibility of the application
- * accessing the doorbells to know which are valid. Each doorbell
- * occupies 32 bytes of space, but unless otherwise specified,
- * only the first 4 bytes should be written. There are 32 instances
- * of these doorbells for the host and 31 virtual machines respectively.
- * The host and VMs will only map the doorbell pages belonging to its
- * protection domain. It will not be able to touch the doorbells for
- * another VM. The doorbells are the only registers directly accessible
- * by a virtual machine. Similarly, there are 511 additional
- * doorbells for RDMA protection domains. PD 0 for RDMA shares
- * the same physical protection domain doorbell page as ETH/iSCSI.
- *
- */
-struct BE_PROTECTION_DOMAIN_DBMAP_AMAP {
- u8 rsvd0[512]; /* DWORD 0 */
- struct BE_SQ_DB_AMAP rdma_sq_db;
- u8 rsvd1[7][32]; /* DWORD 17 */
- struct BE_WRB_POST_DB_AMAP iscsi_wrb_post_db;
- u8 rsvd2[7][32]; /* DWORD 25 */
- struct BE_SQ_DB_AMAP etx_sq_db;
- u8 rsvd3[7][32]; /* DWORD 33 */
- struct BE_RQ_DB_AMAP rdma_rq_db;
- u8 rsvd4[7][32]; /* DWORD 41 */
- struct BE_DEFAULT_PDU_DB_AMAP iscsi_default_pdu_db;
- u8 rsvd5[7][32]; /* DWORD 49 */
- struct BE_TPM_RQ_DB_AMAP tpm_rq_db;
- u8 rsvd6[7][32]; /* DWORD 57 */
- struct BE_RQ_DB_AMAP erx_rq_db;
- u8 rsvd7[7][32]; /* DWORD 65 */
- struct BE_CQ_DB_AMAP cq_db;
- u8 rsvd8[7][32]; /* DWORD 73 */
- struct BE_MCC_DB_AMAP mpu_mcc_db;
- u8 rsvd9[7][32]; /* DWORD 81 */
- struct BE_MPU_MAILBOX_DB_AMAP mcc_bootstrap_db;
- u8 rsvd10[935][32]; /* DWORD 89 */
-} __packed;
-struct PROTECTION_DOMAIN_DBMAP_AMAP {
- u32 dw[1024];
-};
-
-#endif /* __doorbells_amap_h__ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * Autogenerated by srcgen version: 0127
- */
-#ifndef __ep_amap_h__
-#define __ep_amap_h__
-
-/* General Control and Status Register. */
-struct BE_EP_CONTROL_CSR_AMAP {
- u8 m0_RxPbuf; /* DWORD 0 */
- u8 m1_RxPbuf; /* DWORD 0 */
- u8 m2_RxPbuf; /* DWORD 0 */
- u8 ff_en; /* DWORD 0 */
- u8 rsvd0[27]; /* DWORD 0 */
- u8 CPU_reset; /* DWORD 0 */
-} __packed;
-struct EP_CONTROL_CSR_AMAP {
- u32 dw[1];
-};
-
-/* Semaphore Register. */
-struct BE_EP_SEMAPHORE_CSR_AMAP {
- u8 value[32]; /* DWORD 0 */
-} __packed;
-struct EP_SEMAPHORE_CSR_AMAP {
- u32 dw[1];
-};
-
-/* Embedded Processor Specific Registers. */
-struct BE_EP_CSRMAP_AMAP {
- struct BE_EP_CONTROL_CSR_AMAP ep_control;
- u8 rsvd0[32]; /* DWORD 1 */
- u8 rsvd1[32]; /* DWORD 2 */
- u8 rsvd2[32]; /* DWORD 3 */
- u8 rsvd3[32]; /* DWORD 4 */
- u8 rsvd4[32]; /* DWORD 5 */
- u8 rsvd5[8][128]; /* DWORD 6 */
- u8 rsvd6[32]; /* DWORD 38 */
- u8 rsvd7[32]; /* DWORD 39 */
- u8 rsvd8[32]; /* DWORD 40 */
- u8 rsvd9[32]; /* DWORD 41 */
- u8 rsvd10[32]; /* DWORD 42 */
- struct BE_EP_SEMAPHORE_CSR_AMAP ep_semaphore;
- u8 rsvd11[32]; /* DWORD 44 */
- u8 rsvd12[19][32]; /* DWORD 45 */
-} __packed;
-struct EP_CSRMAP_AMAP {
- u32 dw[64];
-};
-
-#endif /* __ep_amap_h__ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-#include "hwlib.h"
-#include "bestatus.h"
-/*
- This routine creates an event queue based on the client completion
- queue configuration information.
-
- FunctionObject - Handle to a function object
- EqBaseVa - Base VA for a the EQ ring
- SizeEncoding - The encoded size for the EQ entries. This value is
- either CEV_EQ_SIZE_4 or CEV_EQ_SIZE_16
- NumEntries - CEV_CQ_CNT_* values.
- Watermark - Enables watermark based coalescing. This parameter
- must be of the type CEV_WMARK_* if watermarks
- are enabled. If watermarks to to be disabled
- this value should be-1.
- TimerDelay - If a timer delay is enabled this value should be the
- time of the delay in 8 microsecond units. If
- delays are not used this parameter should be
- set to -1.
- ppEqObject - Internal EQ Handle returned.
-
- Returns BE_SUCCESS if successfull,, otherwise a useful error code
- is returned.
-
- IRQL < DISPATCH_LEVEL
-*/
-int
-be_eq_create(struct be_function_object *pfob,
- struct ring_desc *rd, u32 eqe_size, u32 num_entries,
- u32 watermark, /* CEV_WMARK_* or -1 */
- u32 timer_delay, /* in 8us units, or -1 */
- struct be_eq_object *eq_object)
-{
- int status = BE_SUCCESS;
- u32 num_entries_encoding, eqe_size_encoding, length;
- struct FWCMD_COMMON_EQ_CREATE *fwcmd = NULL;
- struct MCC_WRB_AMAP *wrb = NULL;
- u32 n;
- unsigned long irql;
-
- ASSERT(rd);
- ASSERT(eq_object);
-
- switch (num_entries) {
- case 256:
- num_entries_encoding = CEV_EQ_CNT_256;
- break;
- case 512:
- num_entries_encoding = CEV_EQ_CNT_512;
- break;
- case 1024:
- num_entries_encoding = CEV_EQ_CNT_1024;
- break;
- case 2048:
- num_entries_encoding = CEV_EQ_CNT_2048;
- break;
- case 4096:
- num_entries_encoding = CEV_EQ_CNT_4096;
- break;
- default:
- ASSERT(0);
- return BE_STATUS_INVALID_PARAMETER;
- }
-
- switch (eqe_size) {
- case 4:
- eqe_size_encoding = CEV_EQ_SIZE_4;
- break;
- case 16:
- eqe_size_encoding = CEV_EQ_SIZE_16;
- break;
- default:
- ASSERT(0);
- return BE_STATUS_INVALID_PARAMETER;
- }
-
- if ((eqe_size == 4 && num_entries < 1024) ||
- (eqe_size == 16 && num_entries == 4096)) {
- TRACE(DL_ERR, "Bad EQ size. eqe_size:%d num_entries:%d",
- eqe_size, num_entries);
- ASSERT(0);
- return BE_STATUS_INVALID_PARAMETER;
- }
-
- memset(eq_object, 0, sizeof(*eq_object));
-
- atomic_set(&eq_object->ref_count, 0);
- eq_object->parent_function = pfob;
- eq_object->eq_id = 0xFFFFFFFF;
-
- INIT_LIST_HEAD(&eq_object->cq_list_head);
-
- length = num_entries * eqe_size;
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- wrb = be_function_peek_mcc_wrb(pfob);
- if (!wrb) {
- ASSERT(wrb);
- TRACE(DL_ERR, "No free MCC WRBs in create EQ.");
- status = BE_STATUS_NO_MCC_WRB;
- goto Error;
- }
- /* Prepares an embedded fwcmd, including request/response sizes. */
- fwcmd = BE_PREPARE_EMBEDDED_FWCMD(pfob, wrb, COMMON_EQ_CREATE);
-
- fwcmd->params.request.num_pages = PAGES_SPANNED(OFFSET_IN_PAGE(rd->va),
- length);
- n = pfob->pci_function_number;
- AMAP_SET_BITS_PTR(EQ_CONTEXT, Func, &fwcmd->params.request.context, n);
-
- AMAP_SET_BITS_PTR(EQ_CONTEXT, valid, &fwcmd->params.request.context, 1);
-
- AMAP_SET_BITS_PTR(EQ_CONTEXT, Size,
- &fwcmd->params.request.context, eqe_size_encoding);
-
- n = 0; /* Protection Domain is always 0 in Linux driver */
- AMAP_SET_BITS_PTR(EQ_CONTEXT, PD, &fwcmd->params.request.context, n);
-
- /* Let the caller ARM the EQ with the doorbell. */
- AMAP_SET_BITS_PTR(EQ_CONTEXT, Armed, &fwcmd->params.request.context, 0);
-
- AMAP_SET_BITS_PTR(EQ_CONTEXT, Count, &fwcmd->params.request.context,
- num_entries_encoding);
-
- n = pfob->pci_function_number * 32;
- AMAP_SET_BITS_PTR(EQ_CONTEXT, EventVect,
- &fwcmd->params.request.context, n);
- if (watermark != -1) {
- AMAP_SET_BITS_PTR(EQ_CONTEXT, WME,
- &fwcmd->params.request.context, 1);
- AMAP_SET_BITS_PTR(EQ_CONTEXT, Watermark,
- &fwcmd->params.request.context, watermark);
- ASSERT(watermark <= CEV_WMARK_240);
- } else
- AMAP_SET_BITS_PTR(EQ_CONTEXT, WME,
- &fwcmd->params.request.context, 0);
- if (timer_delay != -1) {
- AMAP_SET_BITS_PTR(EQ_CONTEXT, TMR,
- &fwcmd->params.request.context, 1);
-
- ASSERT(timer_delay <= 250); /* max value according to EAS */
- timer_delay = min(timer_delay, (u32)250);
-
- AMAP_SET_BITS_PTR(EQ_CONTEXT, Delay,
- &fwcmd->params.request.context, timer_delay);
- } else {
- AMAP_SET_BITS_PTR(EQ_CONTEXT, TMR,
- &fwcmd->params.request.context, 0);
- }
- /* Create a page list for the FWCMD. */
- be_rd_to_pa_list(rd, fwcmd->params.request.pages,
- ARRAY_SIZE(fwcmd->params.request.pages));
-
- status = be_function_post_mcc_wrb(pfob, wrb, NULL, NULL, NULL,
- NULL, NULL, fwcmd, NULL);
- if (status != BE_SUCCESS) {
- TRACE(DL_ERR, "MCC to create EQ failed.");
- goto Error;
- }
- /* Get the EQ id. The MPU allocates the IDs. */
- eq_object->eq_id = fwcmd->params.response.eq_id;
-
-Error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
-
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
-/*
- Deferences the given object. Once the object's reference count drops to
- zero, the object is destroyed and all resources that are held by this
- object are released. The on-chip context is also destroyed along with
- the queue ID, and any mappings made into the UT.
-
- eq_object - EQ handle returned from eq_object_create.
-
- Returns BE_SUCCESS if successfull, otherwise a useful error code
- is returned.
-
- IRQL: IRQL < DISPATCH_LEVEL
-*/
-int be_eq_destroy(struct be_eq_object *eq_object)
-{
- int status = 0;
-
- ASSERT(atomic_read(&eq_object->ref_count) == 0);
- /* no CQs should reference this EQ now */
- ASSERT(list_empty(&eq_object->cq_list_head));
-
- /* Send fwcmd to destroy the EQ. */
- status = be_function_ring_destroy(eq_object->parent_function,
- eq_object->eq_id, FWCMD_RING_TYPE_EQ,
- NULL, NULL, NULL, NULL);
- ASSERT(status == 0);
-
- return BE_SUCCESS;
-}
-/*
- *---------------------------------------------------------------------------
- * Function: be_eq_modify_delay
- * Changes the EQ delay for a group of EQs.
- * num_eq - The number of EQs in the eq_array to adjust.
- * This also is the number of delay values in
- * the eq_delay_array.
- * eq_array - Array of struct be_eq_object pointers to adjust.
- * eq_delay_array - Array of "num_eq" timer delays in units
- * of microseconds. The be_eq_query_delay_range
- * fwcmd returns the resolution and range of
- * legal EQ delays.
- * cb -
- * cb_context -
- * q_ctxt - Optional. Pointer to a previously allocated
- * struct. If the MCC WRB ring is full, this
- * structure is used to queue the operation. It
- * will be posted to the MCC ring when space
- * becomes available. All queued commands will
- * be posted to the ring in the order they are
- * received. It is always valid to pass a pointer to
- * a generic be_generic_q_cntxt. However,
- * the specific context structs
- * are generally smaller than the generic struct.
- * return pend_status - BE_SUCCESS (0) on success.
- * BE_PENDING (postive value) if the FWCMD
- * completion is pending. Negative error code on failure.
- *-------------------------------------------------------------------------
- */
-int
-be_eq_modify_delay(struct be_function_object *pfob,
- u32 num_eq, struct be_eq_object **eq_array,
- u32 *eq_delay_array, mcc_wrb_cqe_callback cb,
- void *cb_context, struct be_eq_modify_delay_q_ctxt *q_ctxt)
-{
- struct FWCMD_COMMON_MODIFY_EQ_DELAY *fwcmd = NULL;
- struct MCC_WRB_AMAP *wrb = NULL;
- int status = 0;
- struct be_generic_q_ctxt *gen_ctxt = NULL;
- u32 i;
- unsigned long irql;
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- wrb = be_function_peek_mcc_wrb(pfob);
- if (!wrb) {
- if (q_ctxt && cb) {
- wrb = (struct MCC_WRB_AMAP *) &q_ctxt->wrb_header;
- gen_ctxt = (struct be_generic_q_ctxt *) q_ctxt;
- gen_ctxt->context.bytes = sizeof(*q_ctxt);
- } else {
- status = BE_STATUS_NO_MCC_WRB;
- goto Error;
- }
- }
- /* Prepares an embedded fwcmd, including request/response sizes. */
- fwcmd = BE_PREPARE_EMBEDDED_FWCMD(pfob, wrb, COMMON_MODIFY_EQ_DELAY);
-
- ASSERT(num_eq > 0);
- ASSERT(num_eq <= ARRAY_SIZE(fwcmd->params.request.delay));
- fwcmd->params.request.num_eq = num_eq;
- for (i = 0; i < num_eq; i++) {
- fwcmd->params.request.delay[i].eq_id = eq_array[i]->eq_id;
- fwcmd->params.request.delay[i].delay_in_microseconds =
- eq_delay_array[i];
- }
-
- /* Post the f/w command */
- status = be_function_post_mcc_wrb(pfob, wrb, gen_ctxt,
- cb, cb_context, NULL, NULL, fwcmd, NULL);
-
-Error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
-
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-#include <linux/if_ether.h>
-#include "hwlib.h"
-#include "bestatus.h"
-
-/*
- *---------------------------------------------------------
- * Function: be_eth_sq_create_ex
- * Creates an ethernet send ring - extended version with
- * additional parameters.
- * pfob -
- * rd - ring address
- * length_in_bytes -
- * type - The type of ring to create.
- * ulp - The requested ULP number for the ring.
- * This should be zero based, i.e. 0,1,2. This must
- * be valid NIC ULP based on the firmware config.
- * All doorbells for this ring must be sent to
- * this ULP. The first network ring allocated for
- * each ULP are higher performance than subsequent rings.
- * cq_object - cq object for completions
- * ex_parameters - Additional parameters (that may increase in
- * future revisions). These parameters are only used
- * for certain ring types -- see
- * struct be_eth_sq_parameters for details.
- * eth_sq -
- * return status - BE_SUCCESS (0) on success. Negative error code on failure.
- *---------------------------------------------------------
- */
-int
-be_eth_sq_create_ex(struct be_function_object *pfob, struct ring_desc *rd,
- u32 length, u32 type, u32 ulp, struct be_cq_object *cq_object,
- struct be_eth_sq_parameters *ex_parameters,
- struct be_ethsq_object *eth_sq)
-{
- struct FWCMD_COMMON_ETH_TX_CREATE *fwcmd = NULL;
- struct MCC_WRB_AMAP *wrb = NULL;
- int status = 0;
- u32 n;
- unsigned long irql;
-
- ASSERT(rd);
- ASSERT(eth_sq);
- ASSERT(ex_parameters);
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- memset(eth_sq, 0, sizeof(*eth_sq));
-
- eth_sq->parent_function = pfob;
- eth_sq->bid = 0xFFFFFFFF;
- eth_sq->cq_object = cq_object;
-
- /* Translate hwlib interface to arm interface. */
- switch (type) {
- case BE_ETH_TX_RING_TYPE_FORWARDING:
- type = ETH_TX_RING_TYPE_FORWARDING;
- break;
- case BE_ETH_TX_RING_TYPE_STANDARD:
- type = ETH_TX_RING_TYPE_STANDARD;
- break;
- case BE_ETH_TX_RING_TYPE_BOUND:
- ASSERT(ex_parameters->port < 2);
- type = ETH_TX_RING_TYPE_BOUND;
- break;
- default:
- TRACE(DL_ERR, "Invalid eth tx ring type:%d", type);
- return BE_NOT_OK;
- break;
- }
-
- wrb = be_function_peek_mcc_wrb(pfob);
- if (!wrb) {
- ASSERT(wrb);
- TRACE(DL_ERR, "No free MCC WRBs in create EQ.");
- status = BE_STATUS_NO_MCC_WRB;
- goto Error;
- }
- /* NIC must be supported by the current config. */
- ASSERT(pfob->fw_config.nic_ulp_mask);
-
- /*
- * The ulp parameter must select a valid NIC ULP
- * for the current config.
- */
- ASSERT((1 << ulp) & pfob->fw_config.nic_ulp_mask);
-
- /* Prepares an embedded fwcmd, including request/response sizes. */
- fwcmd = BE_PREPARE_EMBEDDED_FWCMD(pfob, wrb, COMMON_ETH_TX_CREATE);
- fwcmd->header.request.port_number = ex_parameters->port;
-
- AMAP_SET_BITS_PTR(ETX_CONTEXT, pd_id,
- &fwcmd->params.request.context, 0);
-
- n = be_ring_length_to_encoding(length, sizeof(struct ETH_WRB_AMAP));
- AMAP_SET_BITS_PTR(ETX_CONTEXT, tx_ring_size,
- &fwcmd->params.request.context, n);
-
- AMAP_SET_BITS_PTR(ETX_CONTEXT, cq_id_send,
- &fwcmd->params.request.context, cq_object->cq_id);
-
- n = pfob->pci_function_number;
- AMAP_SET_BITS_PTR(ETX_CONTEXT, func, &fwcmd->params.request.context, n);
-
- fwcmd->params.request.type = type;
- fwcmd->params.request.ulp_num = (1 << ulp);
- fwcmd->params.request.num_pages = DIV_ROUND_UP(length, PAGE_SIZE);
- ASSERT(PAGES_SPANNED(rd->va, rd->length) >=
- fwcmd->params.request.num_pages);
-
- /* Create a page list for the FWCMD. */
- be_rd_to_pa_list(rd, fwcmd->params.request.pages,
- ARRAY_SIZE(fwcmd->params.request.pages));
-
- status = be_function_post_mcc_wrb(pfob, wrb, NULL, NULL, NULL,
- NULL, NULL, fwcmd, NULL);
- if (status != BE_SUCCESS) {
- TRACE(DL_ERR, "MCC to create etx queue failed.");
- goto Error;
- }
- /* save the butler ID */
- eth_sq->bid = fwcmd->params.response.cid;
-
- /* add a reference to the corresponding CQ */
- atomic_inc(&cq_object->ref_count);
-
-Error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
-
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
-
-/*
- This routine destroys an ethernet send queue
-
- EthSq - EthSq Handle returned from EthSqCreate
-
- This function always return BE_SUCCESS.
-
- This function frees memory allocated by EthSqCreate for the EthSq Object.
-
-*/
-int be_eth_sq_destroy(struct be_ethsq_object *eth_sq)
-{
- int status = 0;
-
- /* Send fwcmd to destroy the queue. */
- status = be_function_ring_destroy(eth_sq->parent_function, eth_sq->bid,
- FWCMD_RING_TYPE_ETH_TX, NULL, NULL, NULL, NULL);
- ASSERT(status == 0);
-
- /* Derefence any associated CQs. */
- atomic_dec(ð_sq->cq_object->ref_count);
- return status;
-}
-/*
- This routine attempts to set the transmit flow control parameters.
-
- FunctionObject - Handle to a function object
-
- txfc_enable - transmit flow control enable - true for
- enable, false for disable
-
- rxfc_enable - receive flow control enable - true for
- enable, false for disable
-
- Returns BE_SUCCESS if successfull, otherwise a useful int error
- code is returned.
-
- IRQL: < DISPATCH_LEVEL
-
- This function always fails in non-privileged machine context.
-*/
-int
-be_eth_set_flow_control(struct be_function_object *pfob,
- bool txfc_enable, bool rxfc_enable)
-{
- struct FWCMD_COMMON_SET_FLOW_CONTROL *fwcmd = NULL;
- struct MCC_WRB_AMAP *wrb = NULL;
- int status = 0;
- unsigned long irql;
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- wrb = be_function_peek_mcc_wrb(pfob);
- if (!wrb) {
- TRACE(DL_ERR, "MCC wrb peek failed.");
- status = BE_STATUS_NO_MCC_WRB;
- goto error;
- }
- /* Prepares an embedded fwcmd, including request/response sizes. */
- fwcmd = BE_PREPARE_EMBEDDED_FWCMD(pfob, wrb, COMMON_SET_FLOW_CONTROL);
-
- fwcmd->params.request.rx_flow_control = rxfc_enable;
- fwcmd->params.request.tx_flow_control = txfc_enable;
-
- /* Post the f/w command */
- status = be_function_post_mcc_wrb(pfob, wrb, NULL, NULL, NULL,
- NULL, NULL, fwcmd, NULL);
-
- if (status != 0) {
- TRACE(DL_ERR, "set flow control fwcmd failed.");
- goto error;
- }
-
-error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
-
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
-/*
- This routine attempts to get the transmit flow control parameters.
-
- pfob - Handle to a function object
-
- txfc_enable - transmit flow control enable - true for
- enable, false for disable
-
- rxfc_enable - receive flow control enable - true for enable,
- false for disable
-
- Returns BE_SUCCESS if successfull, otherwise a useful int error code
- is returned.
-
- IRQL: < DISPATCH_LEVEL
-
- This function always fails in non-privileged machine context.
-*/
-int
-be_eth_get_flow_control(struct be_function_object *pfob,
- bool *txfc_enable, bool *rxfc_enable)
-{
- struct FWCMD_COMMON_GET_FLOW_CONTROL *fwcmd = NULL;
- struct MCC_WRB_AMAP *wrb = NULL;
- int status = 0;
- unsigned long irql;
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- wrb = be_function_peek_mcc_wrb(pfob);
- if (!wrb) {
- TRACE(DL_ERR, "MCC wrb peek failed.");
- status = BE_STATUS_NO_MCC_WRB;
- goto error;
- }
- /* Prepares an embedded fwcmd, including request/response sizes. */
- fwcmd = BE_PREPARE_EMBEDDED_FWCMD(pfob, wrb, COMMON_GET_FLOW_CONTROL);
-
- /* Post the f/w command */
- status = be_function_post_mcc_wrb(pfob, wrb, NULL, NULL, NULL,
- NULL, NULL, fwcmd, NULL);
-
- if (status != 0) {
- TRACE(DL_ERR, "get flow control fwcmd failed.");
- goto error;
- }
-
- *txfc_enable = fwcmd->params.response.tx_flow_control;
- *rxfc_enable = fwcmd->params.response.rx_flow_control;
-
-error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
-
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
-/*
- *---------------------------------------------------------
- * Function: be_eth_set_qos
- * This function sets the ethernet transmit Quality of Service (QoS)
- * characteristics of BladeEngine for the domain. All ethernet
- * transmit rings of the domain will evenly share the bandwidth.
- * The exeception to sharing is the host primary (super) ethernet
- * transmit ring as well as the host ethernet forwarding ring
- * for missed offload data.
- * pfob -
- * max_bps - the maximum bits per second in units of
- * 10 Mbps (valid 0-100)
- * max_pps - the maximum packets per second in units
- * of 1 Kpps (0 indicates no limit)
- * return status - BE_SUCCESS (0) on success. Negative error code on failure.
- *---------------------------------------------------------
- */
-int
-be_eth_set_qos(struct be_function_object *pfob, u32 max_bps, u32 max_pps)
-{
- struct FWCMD_COMMON_SET_QOS *fwcmd = NULL;
- struct MCC_WRB_AMAP *wrb = NULL;
- int status = 0;
- unsigned long irql;
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- wrb = be_function_peek_mcc_wrb(pfob);
- if (!wrb) {
- TRACE(DL_ERR, "MCC wrb peek failed.");
- status = BE_STATUS_NO_MCC_WRB;
- goto error;
- }
- /* Prepares an embedded fwcmd, including request/response sizes. */
- fwcmd = BE_PREPARE_EMBEDDED_FWCMD(pfob, wrb, COMMON_SET_QOS);
-
- /* Set fields in fwcmd */
- fwcmd->params.request.max_bits_per_second_NIC = max_bps;
- fwcmd->params.request.max_packets_per_second_NIC = max_pps;
- fwcmd->params.request.valid_flags = QOS_BITS_NIC | QOS_PKTS_NIC;
-
- /* Post the f/w command */
- status = be_function_post_mcc_wrb(pfob, wrb, NULL, NULL, NULL,
- NULL, NULL, fwcmd, NULL);
-
- if (status != 0)
- TRACE(DL_ERR, "network set qos fwcmd failed.");
-
-error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
-/*
- *---------------------------------------------------------
- * Function: be_eth_get_qos
- * This function retrieves the ethernet transmit Quality of Service (QoS)
- * characteristics for the domain.
- * max_bps - the maximum bits per second in units of
- * 10 Mbps (valid 0-100)
- * max_pps - the maximum packets per second in units of
- * 1 Kpps (0 indicates no limit)
- * return status - BE_SUCCESS (0) on success. Negative error code on failure.
- *---------------------------------------------------------
- */
-int
-be_eth_get_qos(struct be_function_object *pfob, u32 *max_bps, u32 *max_pps)
-{
- struct FWCMD_COMMON_GET_QOS *fwcmd = NULL;
- struct MCC_WRB_AMAP *wrb = NULL;
- int status = 0;
- unsigned long irql;
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- wrb = be_function_peek_mcc_wrb(pfob);
- if (!wrb) {
- TRACE(DL_ERR, "MCC wrb peek failed.");
- status = BE_STATUS_NO_MCC_WRB;
- goto error;
- }
- /* Prepares an embedded fwcmd, including request/response sizes. */
- fwcmd = BE_PREPARE_EMBEDDED_FWCMD(pfob, wrb, COMMON_GET_QOS);
-
- /* Post the f/w command */
- status = be_function_post_mcc_wrb(pfob, wrb, NULL, NULL, NULL,
- NULL, NULL, fwcmd, NULL);
-
- if (status != 0) {
- TRACE(DL_ERR, "network get qos fwcmd failed.");
- goto error;
- }
-
- *max_bps = fwcmd->params.response.max_bits_per_second_NIC;
- *max_pps = fwcmd->params.response.max_packets_per_second_NIC;
-
-error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
-/*
- *---------------------------------------------------------
- * Function: be_eth_set_frame_size
- * This function sets the ethernet maximum frame size. The previous
- * values are returned.
- * pfob -
- * tx_frame_size - maximum transmit frame size in bytes
- * rx_frame_size - maximum receive frame size in bytes
- * return status - BE_SUCCESS (0) on success. Negative error code on failure.
- *---------------------------------------------------------
- */
-int
-be_eth_set_frame_size(struct be_function_object *pfob,
- u32 *tx_frame_size, u32 *rx_frame_size)
-{
- struct FWCMD_COMMON_SET_FRAME_SIZE *fwcmd = NULL;
- struct MCC_WRB_AMAP *wrb = NULL;
- int status = 0;
- unsigned long irql;
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- wrb = be_function_peek_mcc_wrb(pfob);
- if (!wrb) {
- TRACE(DL_ERR, "MCC wrb peek failed.");
- status = BE_STATUS_NO_MCC_WRB;
- goto error;
- }
- /* Prepares an embedded fwcmd, including request/response sizes. */
- fwcmd = BE_PREPARE_EMBEDDED_FWCMD(pfob, wrb, COMMON_SET_FRAME_SIZE);
- fwcmd->params.request.max_tx_frame_size = *tx_frame_size;
- fwcmd->params.request.max_rx_frame_size = *rx_frame_size;
-
- /* Post the f/w command */
- status = be_function_post_mcc_wrb(pfob, wrb, NULL, NULL, NULL,
- NULL, NULL, fwcmd, NULL);
-
- if (status != 0) {
- TRACE(DL_ERR, "network set frame size fwcmd failed.");
- goto error;
- }
-
- *tx_frame_size = fwcmd->params.response.chip_max_tx_frame_size;
- *rx_frame_size = fwcmd->params.response.chip_max_rx_frame_size;
-
-error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
-
-/*
- This routine creates a Ethernet receive ring.
-
- pfob - handle to a function object
- rq_base_va - base VA for the default receive ring. this must be
- exactly 8K in length and continguous physical memory.
- cq_object - handle to a previously created CQ to be associated
- with the RQ.
- pp_eth_rq - pointer to an opqaue handle where an eth
- receive object is returned.
- Returns BE_SUCCESS if successfull, , otherwise a useful
- int error code is returned.
-
- IRQL: < DISPATCH_LEVEL
- this function allocates a struct be_ethrq_object *object.
- there must be no more than 1 of these per function object, unless the
- function object supports RSS (is networking and on the host).
- the rq_base_va must point to a buffer of exactly 8K.
- the erx::host_cqid (or host_stor_cqid) register and erx::ring_page registers
- will be updated as appropriate on return
-*/
-int
-be_eth_rq_create(struct be_function_object *pfob,
- struct ring_desc *rd, struct be_cq_object *cq_object,
- struct be_cq_object *bcmc_cq_object,
- struct be_ethrq_object *eth_rq)
-{
- int status = 0;
- struct MCC_WRB_AMAP *wrb = NULL;
- struct FWCMD_COMMON_ETH_RX_CREATE *fwcmd = NULL;
- unsigned long irql;
-
- /* MPU will set the */
- ASSERT(rd);
- ASSERT(eth_rq);
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- eth_rq->parent_function = pfob;
- eth_rq->cq_object = cq_object;
-
- wrb = be_function_peek_mcc_wrb(pfob);
- if (!wrb) {
- TRACE(DL_ERR, "MCC wrb peek failed.");
- status = BE_STATUS_NO_MCC_WRB;
- goto Error;
- }
- /* Prepares an embedded fwcmd, including request/response sizes. */
- fwcmd = BE_PREPARE_EMBEDDED_FWCMD(pfob, wrb, COMMON_ETH_RX_CREATE);
-
- fwcmd->params.request.num_pages = 2; /* required length */
- fwcmd->params.request.cq_id = cq_object->cq_id;
-
- if (bcmc_cq_object)
- fwcmd->params.request.bcmc_cq_id = bcmc_cq_object->cq_id;
- else
- fwcmd->params.request.bcmc_cq_id = 0xFFFF;
-
- /* Create a page list for the FWCMD. */
- be_rd_to_pa_list(rd, fwcmd->params.request.pages,
- ARRAY_SIZE(fwcmd->params.request.pages));
-
- /* Post the f/w command */
- status = be_function_post_mcc_wrb(pfob, wrb, NULL, NULL, NULL,
- NULL, NULL, fwcmd, NULL);
- if (status != BE_SUCCESS) {
- TRACE(DL_ERR, "fwcmd to map eth rxq frags failed.");
- goto Error;
- }
- /* Save the ring ID for cleanup. */
- eth_rq->rid = fwcmd->params.response.id;
-
- atomic_inc(&cq_object->ref_count);
-
-Error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
-
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
-/*
- This routine destroys an Ethernet receive queue
-
- eth_rq - ethernet receive queue handle returned from eth_rq_create
-
- Returns BE_SUCCESS on success and an appropriate int on failure.
-
- This function frees resourcs allocated by EthRqCreate.
- The erx::host_cqid (or host_stor_cqid) register and erx::ring_page
- registers will be updated as appropriate on return
- IRQL: < DISPATCH_LEVEL
-*/
-
-static void be_eth_rq_destroy_internal_cb(void *context, int status,
- struct MCC_WRB_AMAP *wrb)
-{
- struct be_ethrq_object *eth_rq = (struct be_ethrq_object *) context;
-
- if (status != BE_SUCCESS) {
- TRACE(DL_ERR, "Destroy eth rq failed in internal callback.\n");
- } else {
- /* Dereference any CQs associated with this queue. */
- atomic_dec(ð_rq->cq_object->ref_count);
- }
-
- return;
-}
-
-int be_eth_rq_destroy(struct be_ethrq_object *eth_rq)
-{
- int status = BE_SUCCESS;
-
- /* Send fwcmd to destroy the RQ. */
- status = be_function_ring_destroy(eth_rq->parent_function,
- eth_rq->rid, FWCMD_RING_TYPE_ETH_RX, NULL, NULL,
- be_eth_rq_destroy_internal_cb, eth_rq);
-
- return status;
-}
-
-/*
- *---------------------------------------------------------------------------
- * Function: be_eth_rq_destroy_options
- * Destroys an ethernet receive ring with finer granularity options
- * than the standard be_eth_rq_destroy() API function.
- * eth_rq -
- * flush - Set to 1 to flush the ring, set to 0 to bypass the flush
- * cb - Callback function on completion
- * cb_context - Callback context
- * return status - BE_SUCCESS (0) on success. Negative error code on failure.
- *----------------------------------------------------------------------------
- */
-int
-be_eth_rq_destroy_options(struct be_ethrq_object *eth_rq, bool flush,
- mcc_wrb_cqe_callback cb, void *cb_context)
-{
- struct FWCMD_COMMON_RING_DESTROY *fwcmd = NULL;
- struct MCC_WRB_AMAP *wrb = NULL;
- int status = BE_SUCCESS;
- struct be_function_object *pfob = NULL;
- unsigned long irql;
-
- pfob = eth_rq->parent_function;
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- TRACE(DL_INFO, "Destroy eth_rq ring id:%d, flush:%d", eth_rq->rid,
- flush);
-
- wrb = be_function_peek_mcc_wrb(pfob);
- if (!wrb) {
- ASSERT(wrb);
- TRACE(DL_ERR, "No free MCC WRBs in destroy eth_rq ring.");
- status = BE_STATUS_NO_MCC_WRB;
- goto Error;
- }
- /* Prepares an embedded fwcmd, including request/response sizes. */
- fwcmd = BE_PREPARE_EMBEDDED_FWCMD(pfob, wrb, COMMON_RING_DESTROY);
-
- fwcmd->params.request.id = eth_rq->rid;
- fwcmd->params.request.ring_type = FWCMD_RING_TYPE_ETH_RX;
- fwcmd->params.request.bypass_flush = ((0 == flush) ? 1 : 0);
-
- /* Post the f/w command */
- status = be_function_post_mcc_wrb(pfob, wrb, NULL, cb, cb_context,
- be_eth_rq_destroy_internal_cb, eth_rq, fwcmd, NULL);
-
- if (status != BE_SUCCESS && status != BE_PENDING) {
- TRACE(DL_ERR, "eth_rq ring destroy failed. id:%d, flush:%d",
- eth_rq->rid, flush);
- goto Error;
- }
-
-Error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
-
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
-/*
- This routine queries the frag size for erx.
-
- pfob - handle to a function object
-
- frag_size_bytes - erx frag size in bytes that is/was set.
-
- Returns BE_SUCCESS if successfull, otherwise a useful int error
- code is returned.
-
- IRQL: < DISPATCH_LEVEL
-
-*/
-int
-be_eth_rq_get_frag_size(struct be_function_object *pfob, u32 *frag_size_bytes)
-{
- struct FWCMD_ETH_GET_RX_FRAG_SIZE *fwcmd = NULL;
- struct MCC_WRB_AMAP *wrb = NULL;
- int status = 0;
- unsigned long irql;
-
- ASSERT(frag_size_bytes);
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- wrb = be_function_peek_mcc_wrb(pfob);
- if (!wrb) {
- TRACE(DL_ERR, "MCC wrb peek failed.");
- return BE_STATUS_NO_MCC_WRB;
- }
- /* Prepares an embedded fwcmd, including request/response sizes. */
- fwcmd = BE_PREPARE_EMBEDDED_FWCMD(pfob, wrb, ETH_GET_RX_FRAG_SIZE);
-
- /* Post the f/w command */
- status = be_function_post_mcc_wrb(pfob, wrb, NULL, NULL, NULL,
- NULL, NULL, fwcmd, NULL);
-
- if (status != 0) {
- TRACE(DL_ERR, "get frag size fwcmd failed.");
- goto error;
- }
-
- *frag_size_bytes = 1 << fwcmd->params.response.actual_fragsize_log2;
-
-error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
-
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
-/*
- This routine attempts to set the frag size for erx. If the frag size is
- already set, the attempt fails and the current frag size is returned.
-
- pfob - Handle to a function object
-
- frag_size - Erx frag size in bytes that is/was set.
-
- current_frag_size_bytes - Pointer to location where currrent frag
- is to be rturned
-
- Returns BE_SUCCESS if successfull, otherwise a useful int error
- code is returned.
-
- IRQL: < DISPATCH_LEVEL
-
- This function always fails in non-privileged machine context.
-*/
-int
-be_eth_rq_set_frag_size(struct be_function_object *pfob,
- u32 frag_size, u32 *frag_size_bytes)
-{
- struct FWCMD_ETH_SET_RX_FRAG_SIZE *fwcmd = NULL;
- struct MCC_WRB_AMAP *wrb = NULL;
- int status = 0;
- unsigned long irql;
-
- ASSERT(frag_size_bytes);
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- wrb = be_function_peek_mcc_wrb(pfob);
- if (!wrb) {
- TRACE(DL_ERR, "MCC wrb peek failed.");
- status = BE_STATUS_NO_MCC_WRB;
- goto error;
- }
- /* Prepares an embedded fwcmd, including request/response sizes. */
- fwcmd = BE_PREPARE_EMBEDDED_FWCMD(pfob, wrb, ETH_SET_RX_FRAG_SIZE);
-
- ASSERT(frag_size >= 128 && frag_size <= 16 * 1024);
-
- /* This is the log2 of the fragsize. This is not the exact
- * ERX encoding. */
- fwcmd->params.request.new_fragsize_log2 = __ilog2_u32(frag_size);
-
- /* Post the f/w command */
- status = be_function_post_mcc_wrb(pfob, wrb, NULL, NULL, NULL,
- NULL, NULL, fwcmd, NULL);
-
- if (status != 0) {
- TRACE(DL_ERR, "set frag size fwcmd failed.");
- goto error;
- }
-
- *frag_size_bytes = 1 << fwcmd->params.response.actual_fragsize_log2;
-error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
-
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
-
-/*
- This routine gets or sets a mac address for a domain
- given the port and mac.
-
- FunctionObject - Function object handle.
- port1 - Set to TRUE if this function will set/get the Port 1
- address. Only the host may set this to TRUE.
- mac1 - Set to TRUE if this function will set/get the
- MAC 1 address. Only the host may set this to TRUE.
- write - Set to TRUE if this function should write the mac address.
- mac_address - Buffer of the mac address to read or write.
-
- Returns BE_SUCCESS if successfull, otherwise a useful int is returned.
-
- IRQL: < DISPATCH_LEVEL
-*/
-int be_rxf_mac_address_read_write(struct be_function_object *pfob,
- bool port1, /* VM must always set to false */
- bool mac1, /* VM must always set to false */
- bool mgmt, bool write,
- bool permanent, u8 *mac_address,
- mcc_wrb_cqe_callback cb, /* optional */
- void *cb_context) /* optional */
-{
- int status = BE_SUCCESS;
- union {
- struct FWCMD_COMMON_NTWK_MAC_QUERY *query;
- struct FWCMD_COMMON_NTWK_MAC_SET *set;
- } fwcmd = {NULL};
- struct MCC_WRB_AMAP *wrb = NULL;
- u32 type = 0;
- unsigned long irql;
- struct be_mcc_wrb_response_copy rc;
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- ASSERT(mac_address);
-
- ASSERT(port1 == false);
- ASSERT(mac1 == false);
-
- wrb = be_function_peek_mcc_wrb(pfob);
- if (!wrb) {
- TRACE(DL_ERR, "MCC wrb peek failed.");
- status = BE_STATUS_NO_MCC_WRB;
- goto Error;
- }
-
- if (mgmt) {
- type = MAC_ADDRESS_TYPE_MANAGEMENT;
- } else {
- if (pfob->type == BE_FUNCTION_TYPE_NETWORK)
- type = MAC_ADDRESS_TYPE_NETWORK;
- else
- type = MAC_ADDRESS_TYPE_STORAGE;
- }
-
- if (write) {
- /* Prepares an embedded fwcmd, including
- * request/response sizes.
- */
- fwcmd.set = BE_PREPARE_EMBEDDED_FWCMD(pfob,
- wrb, COMMON_NTWK_MAC_SET);
-
- fwcmd.set->params.request.invalidate = 0;
- fwcmd.set->params.request.mac1 = (mac1 ? 1 : 0);
- fwcmd.set->params.request.port = (port1 ? 1 : 0);
- fwcmd.set->params.request.type = type;
-
- /* Copy the mac address to set. */
- fwcmd.set->params.request.mac.SizeOfStructure =
- sizeof(fwcmd.set->params.request.mac);
- memcpy(fwcmd.set->params.request.mac.MACAddress,
- mac_address, ETH_ALEN);
-
- /* Post the f/w command */
- status = be_function_post_mcc_wrb(pfob, wrb, NULL,
- cb, cb_context, NULL, NULL, fwcmd.set, NULL);
-
- } else {
-
- /*
- * Prepares an embedded fwcmd, including
- * request/response sizes.
- */
- fwcmd.query = BE_PREPARE_EMBEDDED_FWCMD(pfob,
- wrb, COMMON_NTWK_MAC_QUERY);
-
- fwcmd.query->params.request.mac1 = (mac1 ? 1 : 0);
- fwcmd.query->params.request.port = (port1 ? 1 : 0);
- fwcmd.query->params.request.type = type;
- fwcmd.query->params.request.permanent = permanent;
-
- rc.length = FIELD_SIZEOF(struct FWCMD_COMMON_NTWK_MAC_QUERY,
- params.response.mac.MACAddress);
- rc.fwcmd_offset = offsetof(struct FWCMD_COMMON_NTWK_MAC_QUERY,
- params.response.mac.MACAddress);
- rc.va = mac_address;
- /* Post the f/w command (with a copy for the response) */
- status = be_function_post_mcc_wrb(pfob, wrb, NULL, cb,
- cb_context, NULL, NULL, fwcmd.query, &rc);
- }
-
- if (status < 0) {
- TRACE(DL_ERR, "mac set/query failed.");
- goto Error;
- }
-
-Error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
-/*
- This routine writes data to context memory.
-
- pfob - Function object handle.
- mac_table - Set to the 128-bit multicast address hash table.
-
- Returns BE_SUCCESS if successfull, otherwise a useful int is returned.
-
- IRQL: < DISPATCH_LEVEL
-*/
-
-int be_rxf_multicast_config(struct be_function_object *pfob,
- bool promiscuous, u32 num, u8 *mac_table,
- mcc_wrb_cqe_callback cb, /* optional */
- void *cb_context,
- struct be_multicast_q_ctxt *q_ctxt)
-{
- int status = BE_SUCCESS;
- struct FWCMD_COMMON_NTWK_MULTICAST_SET *fwcmd = NULL;
- struct MCC_WRB_AMAP *wrb = NULL;
- struct be_generic_q_ctxt *generic_ctxt = NULL;
- unsigned long irql;
-
- ASSERT(num <= ARRAY_SIZE(fwcmd->params.request.mac));
-
- if (num > ARRAY_SIZE(fwcmd->params.request.mac)) {
- TRACE(DL_ERR, "Too many multicast addresses. BE supports %d.",
- (int) ARRAY_SIZE(fwcmd->params.request.mac));
- return BE_NOT_OK;
- }
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- wrb = be_function_peek_mcc_wrb(pfob);
- if (!wrb) {
- if (q_ctxt && cb) {
- wrb = (struct MCC_WRB_AMAP *) &q_ctxt->wrb_header;
- generic_ctxt = (struct be_generic_q_ctxt *) q_ctxt;
- generic_ctxt->context.bytes = sizeof(*q_ctxt);
- } else {
- status = BE_STATUS_NO_MCC_WRB;
- goto Error;
- }
- }
- /* Prepares an embedded fwcmd, including request/response sizes. */
- fwcmd = BE_PREPARE_EMBEDDED_FWCMD(pfob, wrb, COMMON_NTWK_MULTICAST_SET);
-
- fwcmd->params.request.promiscuous = promiscuous;
- if (!promiscuous) {
- fwcmd->params.request.num_mac = num;
- if (num > 0) {
- ASSERT(mac_table);
- memcpy(fwcmd->params.request.mac,
- mac_table, ETH_ALEN * num);
- }
- }
-
- /* Post the f/w command */
- status = be_function_post_mcc_wrb(pfob, wrb, generic_ctxt,
- cb, cb_context, NULL, NULL, fwcmd, NULL);
- if (status < 0) {
- TRACE(DL_ERR, "multicast fwcmd failed.");
- goto Error;
- }
-
-Error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
-/*
- This routine adds or removes a vlan tag from the rxf table.
-
- FunctionObject - Function object handle.
- VLanTag - VLan tag to add or remove.
- Add - Set to TRUE if this will add a vlan tag
-
- Returns BE_SUCCESS if successfull, otherwise a useful int is returned.
-
- IRQL: < DISPATCH_LEVEL
-*/
-int be_rxf_vlan_config(struct be_function_object *pfob,
- bool promiscuous, u32 num, u16 *vlan_tag_array,
- mcc_wrb_cqe_callback cb, /* optional */
- void *cb_context,
- struct be_vlan_q_ctxt *q_ctxt) /* optional */
-{
- int status = BE_SUCCESS;
- struct FWCMD_COMMON_NTWK_VLAN_CONFIG *fwcmd = NULL;
- struct MCC_WRB_AMAP *wrb = NULL;
- struct be_generic_q_ctxt *generic_ctxt = NULL;
- unsigned long irql;
-
- if (num > ARRAY_SIZE(fwcmd->params.request.vlan_tag)) {
- TRACE(DL_ERR, "Too many VLAN tags.");
- return BE_NOT_OK;
- }
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- wrb = be_function_peek_mcc_wrb(pfob);
- if (!wrb) {
- if (q_ctxt && cb) {
- wrb = (struct MCC_WRB_AMAP *) &q_ctxt->wrb_header;
- generic_ctxt = (struct be_generic_q_ctxt *) q_ctxt;
- generic_ctxt->context.bytes = sizeof(*q_ctxt);
- } else {
- status = BE_STATUS_NO_MCC_WRB;
- goto Error;
- }
- }
- /* Prepares an embedded fwcmd, including request/response sizes. */
- fwcmd = BE_PREPARE_EMBEDDED_FWCMD(pfob, wrb, COMMON_NTWK_VLAN_CONFIG);
-
- fwcmd->params.request.promiscuous = promiscuous;
- if (!promiscuous) {
- fwcmd->params.request.num_vlan = num;
-
- if (num > 0) {
- ASSERT(vlan_tag_array);
- memcpy(fwcmd->params.request.vlan_tag, vlan_tag_array,
- num * sizeof(vlan_tag_array[0]));
- }
- }
-
- /* Post the commadn */
- status = be_function_post_mcc_wrb(pfob, wrb, generic_ctxt,
- cb, cb_context, NULL, NULL, fwcmd, NULL);
- if (status < 0) {
- TRACE(DL_ERR, "vlan fwcmd failed.");
- goto Error;
- }
-
-Error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
-
-int be_rxf_link_status(struct be_function_object *pfob,
- struct BE_LINK_STATUS *link_status,
- mcc_wrb_cqe_callback cb,
- void *cb_context,
- struct be_link_status_q_ctxt *q_ctxt)
-{
- struct FWCMD_COMMON_NTWK_LINK_STATUS_QUERY *fwcmd = NULL;
- struct MCC_WRB_AMAP *wrb = NULL;
- int status = 0;
- struct be_generic_q_ctxt *generic_ctxt = NULL;
- unsigned long irql;
- struct be_mcc_wrb_response_copy rc;
-
- ASSERT(link_status);
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- wrb = be_function_peek_mcc_wrb(pfob);
-
- if (!wrb) {
- if (q_ctxt && cb) {
- wrb = (struct MCC_WRB_AMAP *) &q_ctxt->wrb_header;
- generic_ctxt = (struct be_generic_q_ctxt *) q_ctxt;
- generic_ctxt->context.bytes = sizeof(*q_ctxt);
- } else {
- status = BE_STATUS_NO_MCC_WRB;
- goto Error;
- }
- }
- /* Prepares an embedded fwcmd, including request/response sizes. */
- fwcmd = BE_PREPARE_EMBEDDED_FWCMD(pfob, wrb,
- COMMON_NTWK_LINK_STATUS_QUERY);
-
- rc.length = FIELD_SIZEOF(struct FWCMD_COMMON_NTWK_LINK_STATUS_QUERY,
- params.response);
- rc.fwcmd_offset = offsetof(struct FWCMD_COMMON_NTWK_LINK_STATUS_QUERY,
- params.response);
- rc.va = link_status;
- /* Post or queue the f/w command */
- status = be_function_post_mcc_wrb(pfob, wrb, generic_ctxt,
- cb, cb_context, NULL, NULL, fwcmd, &rc);
-
- if (status < 0) {
- TRACE(DL_ERR, "link status fwcmd failed.");
- goto Error;
- }
-
-Error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
-int
-be_rxf_query_eth_statistics(struct be_function_object *pfob,
- struct FWCMD_ETH_GET_STATISTICS *va_for_fwcmd,
- u64 pa_for_fwcmd, mcc_wrb_cqe_callback cb,
- void *cb_context,
- struct be_nonembedded_q_ctxt *q_ctxt)
-{
- struct MCC_WRB_AMAP *wrb = NULL;
- int status = 0;
- struct be_generic_q_ctxt *generic_ctxt = NULL;
- unsigned long irql;
-
- ASSERT(va_for_fwcmd);
- ASSERT(pa_for_fwcmd);
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- wrb = be_function_peek_mcc_wrb(pfob);
-
- if (!wrb) {
- if (q_ctxt && cb) {
- wrb = (struct MCC_WRB_AMAP *) &q_ctxt->wrb_header;
- generic_ctxt = (struct be_generic_q_ctxt *) q_ctxt;
- generic_ctxt->context.bytes = sizeof(*q_ctxt);
- } else {
- status = BE_STATUS_NO_MCC_WRB;
- goto Error;
- }
- }
-
- TRACE(DL_INFO, "Query eth stats. fwcmd va:%p pa:0x%08x_%08x",
- va_for_fwcmd, upper_32_bits(pa_for_fwcmd), (u32)pa_for_fwcmd);
-
- /* Prepares an embedded fwcmd, including request/response sizes. */
- va_for_fwcmd = BE_PREPARE_NONEMBEDDED_FWCMD(pfob, wrb,
- va_for_fwcmd, pa_for_fwcmd, ETH_GET_STATISTICS);
-
- /* Post the f/w command */
- status = be_function_post_mcc_wrb(pfob, wrb, generic_ctxt,
- cb, cb_context, NULL, NULL, va_for_fwcmd, NULL);
- if (status < 0) {
- TRACE(DL_ERR, "eth stats fwcmd failed.");
- goto Error;
- }
-
-Error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
-int
-be_rxf_promiscuous(struct be_function_object *pfob,
- bool enable_port0, bool enable_port1,
- mcc_wrb_cqe_callback cb, void *cb_context,
- struct be_promiscuous_q_ctxt *q_ctxt)
-{
- struct FWCMD_ETH_PROMISCUOUS *fwcmd = NULL;
- struct MCC_WRB_AMAP *wrb = NULL;
- int status = 0;
- struct be_generic_q_ctxt *generic_ctxt = NULL;
- unsigned long irql;
-
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- wrb = be_function_peek_mcc_wrb(pfob);
-
- if (!wrb) {
- if (q_ctxt && cb) {
- wrb = (struct MCC_WRB_AMAP *) &q_ctxt->wrb_header;
- generic_ctxt = (struct be_generic_q_ctxt *) q_ctxt;
- generic_ctxt->context.bytes = sizeof(*q_ctxt);
- } else {
- status = BE_STATUS_NO_MCC_WRB;
- goto Error;
- }
- }
- /* Prepares an embedded fwcmd, including request/response sizes. */
- fwcmd = BE_PREPARE_EMBEDDED_FWCMD(pfob, wrb, ETH_PROMISCUOUS);
-
- fwcmd->params.request.port0_promiscuous = enable_port0;
- fwcmd->params.request.port1_promiscuous = enable_port1;
-
- /* Post the f/w command */
- status = be_function_post_mcc_wrb(pfob, wrb, generic_ctxt,
- cb, cb_context, NULL, NULL, fwcmd, NULL);
-
- if (status < 0) {
- TRACE(DL_ERR, "promiscuous fwcmd failed.");
- goto Error;
- }
-
-Error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
-
-/*
- *-------------------------------------------------------------------------
- * Function: be_rxf_filter_config
- * Configures BladeEngine ethernet receive filter settings.
- * pfob -
- * settings - Pointer to the requested filter settings.
- * The response from BladeEngine will be placed back
- * in this structure.
- * cb - optional
- * cb_context - optional
- * q_ctxt - Optional. Pointer to a previously allocated struct.
- * If the MCC WRB ring is full, this structure is
- * used to queue the operation. It will be posted
- * to the MCC ring when space becomes available. All
- * queued commands will be posted to the ring in
- * the order they are received. It is always valid
- * to pass a pointer to a generic
- * be_generic_q_ctxt. However, the specific
- * context structs are generally smaller than
- * the generic struct.
- * return pend_status - BE_SUCCESS (0) on success.
- * BE_PENDING (postive value) if the FWCMD
- * completion is pending. Negative error code on failure.
- *---------------------------------------------------------------------------
- */
-int
-be_rxf_filter_config(struct be_function_object *pfob,
- struct NTWK_RX_FILTER_SETTINGS *settings,
- mcc_wrb_cqe_callback cb, void *cb_context,
- struct be_rxf_filter_q_ctxt *q_ctxt)
-{
- struct FWCMD_COMMON_NTWK_RX_FILTER *fwcmd = NULL;
- struct MCC_WRB_AMAP *wrb = NULL;
- int status = 0;
- struct be_generic_q_ctxt *generic_ctxt = NULL;
- unsigned long irql;
- struct be_mcc_wrb_response_copy rc;
-
- ASSERT(settings);
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- wrb = be_function_peek_mcc_wrb(pfob);
-
- if (!wrb) {
- if (q_ctxt && cb) {
- wrb = (struct MCC_WRB_AMAP *) &q_ctxt->wrb_header;
- generic_ctxt = (struct be_generic_q_ctxt *) q_ctxt;
- generic_ctxt->context.bytes = sizeof(*q_ctxt);
- } else {
- status = BE_STATUS_NO_MCC_WRB;
- goto Error;
- }
- }
- /* Prepares an embedded fwcmd, including request/response sizes. */
- fwcmd = BE_PREPARE_EMBEDDED_FWCMD(pfob, wrb, COMMON_NTWK_RX_FILTER);
- memcpy(&fwcmd->params.request, settings, sizeof(*settings));
-
- rc.length = FIELD_SIZEOF(struct FWCMD_COMMON_NTWK_RX_FILTER,
- params.response);
- rc.fwcmd_offset = offsetof(struct FWCMD_COMMON_NTWK_RX_FILTER,
- params.response);
- rc.va = settings;
- /* Post or queue the f/w command */
- status = be_function_post_mcc_wrb(pfob, wrb, generic_ctxt,
- cb, cb_context, NULL, NULL, fwcmd, &rc);
-
- if (status < 0) {
- TRACE(DL_ERR, "RXF/ERX filter config fwcmd failed.");
- goto Error;
- }
-
-Error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * Autogenerated by srcgen version: 0127
- */
-#ifndef __etx_context_amap_h__
-#define __etx_context_amap_h__
-
-/* ETX ring context structure. */
-struct BE_ETX_CONTEXT_AMAP {
- u8 tx_cidx[11]; /* DWORD 0 */
- u8 rsvd0[5]; /* DWORD 0 */
- u8 rsvd1[16]; /* DWORD 0 */
- u8 tx_pidx[11]; /* DWORD 1 */
- u8 rsvd2; /* DWORD 1 */
- u8 tx_ring_size[4]; /* DWORD 1 */
- u8 pd_id[5]; /* DWORD 1 */
- u8 pd_id_not_valid; /* DWORD 1 */
- u8 cq_id_send[10]; /* DWORD 1 */
- u8 rsvd3[32]; /* DWORD 2 */
- u8 rsvd4[32]; /* DWORD 3 */
- u8 cur_bytes[32]; /* DWORD 4 */
- u8 max_bytes[32]; /* DWORD 5 */
- u8 time_stamp[32]; /* DWORD 6 */
- u8 rsvd5[11]; /* DWORD 7 */
- u8 func; /* DWORD 7 */
- u8 rsvd6[20]; /* DWORD 7 */
- u8 cur_txd_count[32]; /* DWORD 8 */
- u8 max_txd_count[32]; /* DWORD 9 */
- u8 rsvd7[32]; /* DWORD 10 */
- u8 rsvd8[32]; /* DWORD 11 */
- u8 rsvd9[32]; /* DWORD 12 */
- u8 rsvd10[32]; /* DWORD 13 */
- u8 rsvd11[32]; /* DWORD 14 */
- u8 rsvd12[32]; /* DWORD 15 */
-} __packed;
-struct ETX_CONTEXT_AMAP {
- u32 dw[16];
-};
-
-#endif /* __etx_context_amap_h__ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-#include "hwlib.h"
-#include "bestatus.h"
-
-
-int
-be_function_internal_query_firmware_config(struct be_function_object *pfob,
- struct BE_FIRMWARE_CONFIG *config)
-{
- struct FWCMD_COMMON_FIRMWARE_CONFIG *fwcmd = NULL;
- struct MCC_WRB_AMAP *wrb = NULL;
- int status = 0;
- unsigned long irql;
- struct be_mcc_wrb_response_copy rc;
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- wrb = be_function_peek_mcc_wrb(pfob);
- if (!wrb) {
- TRACE(DL_ERR, "MCC wrb peek failed.");
- status = BE_STATUS_NO_MCC_WRB;
- goto error;
- }
- /* Prepares an embedded fwcmd, including request/response sizes. */
- fwcmd = BE_PREPARE_EMBEDDED_FWCMD(pfob, wrb, COMMON_FIRMWARE_CONFIG);
-
- rc.length = FIELD_SIZEOF(struct FWCMD_COMMON_FIRMWARE_CONFIG,
- params.response);
- rc.fwcmd_offset = offsetof(struct FWCMD_COMMON_FIRMWARE_CONFIG,
- params.response);
- rc.va = config;
-
- /* Post the f/w command */
- status = be_function_post_mcc_wrb(pfob, wrb, NULL, NULL,
- NULL, NULL, NULL, fwcmd, &rc);
-error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
-/*
- This allocates and initializes a function object based on the information
- provided by upper layer drivers.
-
- Returns BE_SUCCESS on success and an appropriate int on failure.
-
- A function object represents a single BladeEngine (logical) PCI function.
- That is a function object either represents
- the networking side of BladeEngine or the iSCSI side of BladeEngine.
-
- This routine will also detect and create an appropriate PD object for the
- PCI function as needed.
-*/
-int
-be_function_object_create(u8 __iomem *csr_va, u8 __iomem *db_va,
- u8 __iomem *pci_va, u32 function_type,
- struct ring_desc *mailbox, struct be_function_object *pfob)
-{
- int status;
-
- ASSERT(pfob); /* not a magic assert */
- ASSERT(function_type <= 2);
-
- TRACE(DL_INFO, "Create function object. type:%s object:0x%p",
- (function_type == BE_FUNCTION_TYPE_ISCSI ? "iSCSI" :
- (function_type == BE_FUNCTION_TYPE_NETWORK ? "Network" :
- "Arm")), pfob);
-
- memset(pfob, 0, sizeof(*pfob));
-
- pfob->type = function_type;
- pfob->csr_va = csr_va;
- pfob->db_va = db_va;
- pfob->pci_va = pci_va;
-
- spin_lock_init(&pfob->cq_lock);
- spin_lock_init(&pfob->post_lock);
- spin_lock_init(&pfob->mcc_context_lock);
-
-
- pfob->pci_function_number = 1;
-
-
- pfob->emulate = false;
- TRACE(DL_NOTE, "Non-emulation mode");
- status = be_drive_POST(pfob);
- if (status != BE_SUCCESS) {
- TRACE(DL_ERR, "BladeEngine POST failed.");
- goto error;
- }
-
- /* Initialize the mailbox */
- status = be_mpu_init_mailbox(pfob, mailbox);
- if (status != BE_SUCCESS) {
- TRACE(DL_ERR, "Failed to initialize mailbox.");
- goto error;
- }
- /*
- * Cache the firmware config for ASSERTs in hwclib and later
- * driver queries.
- */
- status = be_function_internal_query_firmware_config(pfob,
- &pfob->fw_config);
- if (status != BE_SUCCESS) {
- TRACE(DL_ERR, "Failed to query firmware config.");
- goto error;
- }
-
-error:
- if (status != BE_SUCCESS) {
- /* No cleanup necessary */
- TRACE(DL_ERR, "Failed to create function.");
- memset(pfob, 0, sizeof(*pfob));
- }
- return status;
-}
-
-/*
- This routine drops the reference count on a given function object. Once
- the reference count falls to zero, the function object is destroyed and all
- resources held are freed.
-
- FunctionObject - The function object to drop the reference to.
-*/
-int be_function_object_destroy(struct be_function_object *pfob)
-{
- TRACE(DL_INFO, "Destroy pfob. Object:0x%p",
- pfob);
-
-
- ASSERT(pfob->mcc == NULL);
-
- return BE_SUCCESS;
-}
-
-int be_function_cleanup(struct be_function_object *pfob)
-{
- int status = 0;
- u32 isr;
- u32 host_intr;
- struct PCICFG_HOST_TIMER_INT_CTRL_CSR_AMAP ctrl;
-
-
- if (pfob->type == BE_FUNCTION_TYPE_NETWORK) {
- status = be_rxf_multicast_config(pfob, false, 0,
- NULL, NULL, NULL, NULL);
- ASSERT(status == BE_SUCCESS);
- }
- /* VLAN */
- status = be_rxf_vlan_config(pfob, false, 0, NULL, NULL, NULL, NULL);
- ASSERT(status == BE_SUCCESS);
- /*
- * MCC Queue -- Switches to mailbox mode. May want to destroy
- * all but the MCC CQ before this call if polling CQ is much better
- * performance than polling mailbox register.
- */
- if (pfob->mcc)
- status = be_mcc_ring_destroy(pfob->mcc);
- /*
- * If interrupts are disabled, clear any CEV interrupt assertions that
- * fired after we stopped processing EQs.
- */
- ctrl.dw[0] = PCICFG1_READ(pfob, host_timer_int_ctrl);
- host_intr = AMAP_GET_BITS_PTR(PCICFG_HOST_TIMER_INT_CTRL_CSR,
- hostintr, ctrl.dw);
- if (!host_intr)
- if (pfob->type == BE_FUNCTION_TYPE_NETWORK)
- isr = CSR_READ(pfob, cev.isr1);
- else
- isr = CSR_READ(pfob, cev.isr0);
- else
- /* This should never happen... */
- TRACE(DL_ERR, "function_cleanup called with interrupt enabled");
- /* Function object destroy */
- status = be_function_object_destroy(pfob);
- ASSERT(status == BE_SUCCESS);
-
- return status;
-}
-
-
-void *
-be_function_prepare_embedded_fwcmd(struct be_function_object *pfob,
- struct MCC_WRB_AMAP *wrb, u32 payld_len, u32 request_length,
- u32 response_length, u32 opcode, u32 subsystem)
-{
- struct FWCMD_REQUEST_HEADER *header = NULL;
- u32 n;
-
- ASSERT(wrb);
-
- n = offsetof(struct BE_MCC_WRB_AMAP, payload)/8;
- AMAP_SET_BITS_PTR(MCC_WRB, embedded, wrb, 1);
- AMAP_SET_BITS_PTR(MCC_WRB, payload_length, wrb, min(payld_len, n));
- header = (struct FWCMD_REQUEST_HEADER *)((u8 *)wrb + n);
-
- header->timeout = 0;
- header->domain = 0;
- header->request_length = max(request_length, response_length);
- header->opcode = opcode;
- header->subsystem = subsystem;
-
- return header;
-}
-
-void *
-be_function_prepare_nonembedded_fwcmd(struct be_function_object *pfob,
- struct MCC_WRB_AMAP *wrb,
- void *fwcmd_va, u64 fwcmd_pa,
- u32 payld_len,
- u32 request_length,
- u32 response_length,
- u32 opcode, u32 subsystem)
-{
- struct FWCMD_REQUEST_HEADER *header = NULL;
- u32 n;
- struct MCC_WRB_PAYLOAD_AMAP *plp;
-
- ASSERT(wrb);
- ASSERT(fwcmd_va);
-
- header = (struct FWCMD_REQUEST_HEADER *) fwcmd_va;
-
- AMAP_SET_BITS_PTR(MCC_WRB, embedded, wrb, 0);
- AMAP_SET_BITS_PTR(MCC_WRB, payload_length, wrb, payld_len);
-
- /*
- * Assume one fragment. The caller may override the SGL by
- * rewriting the 0th length and adding more entries. They
- * will also need to update the sge_count.
- */
- AMAP_SET_BITS_PTR(MCC_WRB, sge_count, wrb, 1);
-
- n = offsetof(struct BE_MCC_WRB_AMAP, payload)/8;
- plp = (struct MCC_WRB_PAYLOAD_AMAP *)((u8 *)wrb + n);
- AMAP_SET_BITS_PTR(MCC_WRB_PAYLOAD, sgl[0].length, plp, payld_len);
- AMAP_SET_BITS_PTR(MCC_WRB_PAYLOAD, sgl[0].pa_lo, plp, (u32)fwcmd_pa);
- AMAP_SET_BITS_PTR(MCC_WRB_PAYLOAD, sgl[0].pa_hi, plp,
- upper_32_bits(fwcmd_pa));
-
- header->timeout = 0;
- header->domain = 0;
- header->request_length = max(request_length, response_length);
- header->opcode = opcode;
- header->subsystem = subsystem;
-
- return header;
-}
-
-struct MCC_WRB_AMAP *
-be_function_peek_mcc_wrb(struct be_function_object *pfob)
-{
- struct MCC_WRB_AMAP *wrb = NULL;
- u32 offset;
-
- if (pfob->mcc)
- wrb = _be_mpu_peek_ring_wrb(pfob->mcc, false);
- else {
- offset = offsetof(struct BE_MCC_MAILBOX_AMAP, wrb)/8;
- wrb = (struct MCC_WRB_AMAP *) ((u8 *) pfob->mailbox.va +
- offset);
- }
-
- if (wrb)
- memset(wrb, 0, sizeof(struct MCC_WRB_AMAP));
-
- return wrb;
-}
-
-#if defined(BE_DEBUG)
-void be_function_debug_print_wrb(struct be_function_object *pfob,
- struct MCC_WRB_AMAP *wrb, void *optional_fwcmd_va,
- struct be_mcc_wrb_context *wrb_context)
-{
-
- struct FWCMD_REQUEST_HEADER *header = NULL;
- u8 embedded;
- u32 n;
-
- embedded = AMAP_GET_BITS_PTR(MCC_WRB, embedded, wrb);
-
- if (embedded) {
- n = offsetof(struct BE_MCC_WRB_AMAP, payload)/8;
- header = (struct FWCMD_REQUEST_HEADER *)((u8 *)wrb + n);
- } else {
- header = (struct FWCMD_REQUEST_HEADER *) optional_fwcmd_va;
- }
-
- /* Save the completed count before posting for a debug assert. */
-
- if (header) {
- wrb_context->opcode = header->opcode;
- wrb_context->subsystem = header->subsystem;
-
- } else {
- wrb_context->opcode = 0;
- wrb_context->subsystem = 0;
- }
-}
-#else
-#define be_function_debug_print_wrb(a_, b_, c_, d_)
-#endif
-
-int
-be_function_post_mcc_wrb(struct be_function_object *pfob,
- struct MCC_WRB_AMAP *wrb,
- struct be_generic_q_ctxt *q_ctxt,
- mcc_wrb_cqe_callback cb, void *cb_context,
- mcc_wrb_cqe_callback internal_cb,
- void *internal_cb_context, void *optional_fwcmd_va,
- struct be_mcc_wrb_response_copy *rc)
-{
- int status;
- struct be_mcc_wrb_context *wrb_context = NULL;
- u64 *p;
-
- if (q_ctxt) {
- /* Initialize context. */
- q_ctxt->context.internal_cb = internal_cb;
- q_ctxt->context.internal_cb_context = internal_cb_context;
- q_ctxt->context.cb = cb;
- q_ctxt->context.cb_context = cb_context;
- if (rc) {
- q_ctxt->context.copy.length = rc->length;
- q_ctxt->context.copy.fwcmd_offset = rc->fwcmd_offset;
- q_ctxt->context.copy.va = rc->va;
- } else
- q_ctxt->context.copy.length = 0;
-
- q_ctxt->context.optional_fwcmd_va = optional_fwcmd_va;
-
- /* Queue this request */
- status = be_function_queue_mcc_wrb(pfob, q_ctxt);
-
- goto Error;
- }
- /*
- * Allocate a WRB context struct to hold the callback pointers,
- * status, etc. This is required if commands complete out of order.
- */
- wrb_context = _be_mcc_allocate_wrb_context(pfob);
- if (!wrb_context) {
- TRACE(DL_WARN, "Failed to allocate MCC WRB context.");
- status = BE_STATUS_SYSTEM_RESOURCES;
- goto Error;
- }
- /* Initialize context. */
- memset(wrb_context, 0, sizeof(*wrb_context));
- wrb_context->internal_cb = internal_cb;
- wrb_context->internal_cb_context = internal_cb_context;
- wrb_context->cb = cb;
- wrb_context->cb_context = cb_context;
- if (rc) {
- wrb_context->copy.length = rc->length;
- wrb_context->copy.fwcmd_offset = rc->fwcmd_offset;
- wrb_context->copy.va = rc->va;
- } else
- wrb_context->copy.length = 0;
- wrb_context->wrb = wrb;
-
- /*
- * Copy the context pointer into the WRB opaque tag field.
- * Verify assumption of 64-bit tag with a compile time assert.
- */
- p = (u64 *) ((u8 *)wrb + offsetof(struct BE_MCC_WRB_AMAP, tag)/8);
- *p = (u64)(size_t)wrb_context;
-
- /* Print info about this FWCMD for debug builds. */
- be_function_debug_print_wrb(pfob, wrb, optional_fwcmd_va, wrb_context);
-
- /*
- * issue the WRB to the MPU as appropriate
- */
- if (pfob->mcc) {
- /*
- * we're in WRB mode, pass to the mcc layer
- */
- status = _be_mpu_post_wrb_ring(pfob->mcc, wrb, wrb_context);
- } else {
- /*
- * we're in mailbox mode
- */
- status = _be_mpu_post_wrb_mailbox(pfob, wrb, wrb_context);
-
- /* mailbox mode always completes synchronously */
- ASSERT(status != BE_STATUS_PENDING);
- }
-
-Error:
-
- return status;
-}
-
-int
-be_function_ring_destroy(struct be_function_object *pfob,
- u32 id, u32 ring_type, mcc_wrb_cqe_callback cb,
- void *cb_context, mcc_wrb_cqe_callback internal_cb,
- void *internal_cb_context)
-{
-
- struct FWCMD_COMMON_RING_DESTROY *fwcmd = NULL;
- struct MCC_WRB_AMAP *wrb = NULL;
- int status = 0;
- unsigned long irql;
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- TRACE(DL_INFO, "Destroy ring id:%d type:%d", id, ring_type);
-
- wrb = be_function_peek_mcc_wrb(pfob);
- if (!wrb) {
- ASSERT(wrb);
- TRACE(DL_ERR, "No free MCC WRBs in destroy ring.");
- status = BE_STATUS_NO_MCC_WRB;
- goto Error;
- }
- /* Prepares an embedded fwcmd, including request/response sizes. */
- fwcmd = BE_PREPARE_EMBEDDED_FWCMD(pfob, wrb, COMMON_RING_DESTROY);
-
- fwcmd->params.request.id = id;
- fwcmd->params.request.ring_type = ring_type;
-
- /* Post the f/w command */
- status = be_function_post_mcc_wrb(pfob, wrb, NULL, cb, cb_context,
- internal_cb, internal_cb_context, fwcmd, NULL);
- if (status != BE_SUCCESS && status != BE_PENDING) {
- TRACE(DL_ERR, "Ring destroy fwcmd failed. id:%d ring_type:%d",
- id, ring_type);
- goto Error;
- }
-
-Error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
-void
-be_rd_to_pa_list(struct ring_desc *rd, struct PHYS_ADDR *pa_list, u32 max_num)
-{
- u32 num_pages = PAGES_SPANNED(rd->va, rd->length);
- u32 i = 0;
- u64 pa = rd->pa;
- __le64 lepa;
-
- ASSERT(pa_list);
- ASSERT(pa);
-
- for (i = 0; i < min(num_pages, max_num); i++) {
- lepa = cpu_to_le64(pa);
- pa_list[i].lo = (u32)lepa;
- pa_list[i].hi = upper_32_bits(lepa);
- pa += PAGE_SIZE;
- }
-}
-
-
-
-/*-----------------------------------------------------------------------------
- * Function: be_function_get_fw_version
- * Retrieves the firmware version on the adpater. If the callback is
- * NULL this call executes synchronously. If the callback is not NULL,
- * the returned status will be BE_PENDING if the command was issued
- * successfully.
- * pfob -
- * fwv - Pointer to response buffer if callback is NULL.
- * cb - Callback function invoked when the FWCMD completes.
- * cb_context - Passed to the callback function.
- * return pend_status - BE_SUCCESS (0) on success.
- * BE_PENDING (postive value) if the FWCMD
- * completion is pending. Negative error code on failure.
- *---------------------------------------------------------------------------
- */
-int
-be_function_get_fw_version(struct be_function_object *pfob,
- struct FWCMD_COMMON_GET_FW_VERSION_RESPONSE_PAYLOAD *fwv,
- mcc_wrb_cqe_callback cb, void *cb_context)
-{
- int status = BE_SUCCESS;
- struct MCC_WRB_AMAP *wrb = NULL;
- struct FWCMD_COMMON_GET_FW_VERSION *fwcmd = NULL;
- unsigned long irql;
- struct be_mcc_wrb_response_copy rc;
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- wrb = be_function_peek_mcc_wrb(pfob);
- if (!wrb) {
- TRACE(DL_ERR, "MCC wrb peek failed.");
- status = BE_STATUS_NO_MCC_WRB;
- goto Error;
- }
-
- if (!cb && !fwv) {
- TRACE(DL_ERR, "callback and response buffer NULL!");
- status = BE_NOT_OK;
- goto Error;
- }
- /* Prepares an embedded fwcmd, including request/response sizes. */
- fwcmd = BE_PREPARE_EMBEDDED_FWCMD(pfob, wrb, COMMON_GET_FW_VERSION);
-
- rc.length = FIELD_SIZEOF(struct FWCMD_COMMON_GET_FW_VERSION,
- params.response);
- rc.fwcmd_offset = offsetof(struct FWCMD_COMMON_GET_FW_VERSION,
- params.response);
- rc.va = fwv;
-
- /* Post the f/w command */
- status = be_function_post_mcc_wrb(pfob, wrb, NULL, cb,
- cb_context, NULL, NULL, fwcmd, &rc);
-
-Error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
-int
-be_function_queue_mcc_wrb(struct be_function_object *pfob,
- struct be_generic_q_ctxt *q_ctxt)
-{
- int status;
-
- ASSERT(q_ctxt);
-
- /*
- * issue the WRB to the MPU as appropriate
- */
- if (pfob->mcc) {
-
- /* We're in ring mode. Queue this item. */
- pfob->mcc->backlog_length++;
- list_add_tail(&q_ctxt->context.list, &pfob->mcc->backlog);
- status = BE_PENDING;
- } else {
- status = BE_NOT_OK;
- }
- return status;
-}
-
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * Autogenerated by srcgen version: 0127
- */
-#ifndef __fwcmd_common_amap_h__
-#define __fwcmd_common_amap_h__
-#include "host_struct.h"
-
-/* --- PHY_LINK_DUPLEX_ENUM --- */
-#define PHY_LINK_DUPLEX_NONE (0)
-#define PHY_LINK_DUPLEX_HALF (1)
-#define PHY_LINK_DUPLEX_FULL (2)
-
-/* --- PHY_LINK_SPEED_ENUM --- */
-#define PHY_LINK_SPEED_ZERO (0) /* No link. */
-#define PHY_LINK_SPEED_10MBPS (1) /* 10 Mbps */
-#define PHY_LINK_SPEED_100MBPS (2) /* 100 Mbps */
-#define PHY_LINK_SPEED_1GBPS (3) /* 1 Gbps */
-#define PHY_LINK_SPEED_10GBPS (4) /* 10 Gbps */
-
-/* --- PHY_LINK_FAULT_ENUM --- */
-#define PHY_LINK_FAULT_NONE (0) /* No fault status
- available or detected */
-#define PHY_LINK_FAULT_LOCAL (1) /* Local fault detected */
-#define PHY_LINK_FAULT_REMOTE (2) /* Remote fault detected */
-
-/* --- BE_ULP_MASK --- */
-#define BE_ULP0_MASK (1)
-#define BE_ULP1_MASK (2)
-#define BE_ULP2_MASK (4)
-
-/* --- NTWK_ACTIVE_PORT --- */
-#define NTWK_PORT_A (0) /* Port A is currently active */
-#define NTWK_PORT_B (1) /* Port B is currently active */
-#define NTWK_NO_ACTIVE_PORT (15) /* Both ports have lost link */
-
-/* --- NTWK_LINK_TYPE --- */
-#define NTWK_LINK_TYPE_PHYSICAL (0) /* link up/down event
- applies to BladeEngine's
- Physical Ports
- */
-#define NTWK_LINK_TYPE_VIRTUAL (1) /* Virtual link up/down event
- reported by BladeExchange.
- This applies only when the
- VLD feature is enabled
- */
-
-/*
- * --- FWCMD_MAC_TYPE_ENUM ---
- * This enum defines the types of MAC addresses in the RXF MAC Address Table.
- */
-#define MAC_ADDRESS_TYPE_STORAGE (0) /* Storage MAC Address */
-#define MAC_ADDRESS_TYPE_NETWORK (1) /* Network MAC Address */
-#define MAC_ADDRESS_TYPE_PD (2) /* Protection Domain MAC Addr */
-#define MAC_ADDRESS_TYPE_MANAGEMENT (3) /* Managment MAC Address */
-
-
-/* --- FWCMD_RING_TYPE_ENUM --- */
-#define FWCMD_RING_TYPE_ETH_RX (1) /* Ring created with */
- /* FWCMD_COMMON_ETH_RX_CREATE. */
-#define FWCMD_RING_TYPE_ETH_TX (2) /* Ring created with */
- /* FWCMD_COMMON_ETH_TX_CREATE. */
-#define FWCMD_RING_TYPE_ISCSI_WRBQ (3) /* Ring created with */
- /* FWCMD_COMMON_ISCSI_WRBQ_CREATE. */
-#define FWCMD_RING_TYPE_ISCSI_DEFQ (4) /* Ring created with */
- /* FWCMD_COMMON_ISCSI_DEFQ_CREATE. */
-#define FWCMD_RING_TYPE_TPM_WRBQ (5) /* Ring created with */
- /* FWCMD_COMMON_TPM_WRBQ_CREATE. */
-#define FWCMD_RING_TYPE_TPM_DEFQ (6) /* Ring created with */
- /* FWCMD_COMMONTPM_TDEFQ_CREATE. */
-#define FWCMD_RING_TYPE_TPM_RQ (7) /* Ring created with */
- /* FWCMD_COMMON_TPM_RQ_CREATE. */
-#define FWCMD_RING_TYPE_MCC (8) /* Ring created with */
- /* FWCMD_COMMON_MCC_CREATE. */
-#define FWCMD_RING_TYPE_CQ (9) /* Ring created with */
- /* FWCMD_COMMON_CQ_CREATE. */
-#define FWCMD_RING_TYPE_EQ (10) /* Ring created with */
- /* FWCMD_COMMON_EQ_CREATE. */
-#define FWCMD_RING_TYPE_QP (11) /* Ring created with */
- /* FWCMD_RDMA_QP_CREATE. */
-
-
-/* --- ETH_TX_RING_TYPE_ENUM --- */
-#define ETH_TX_RING_TYPE_FORWARDING (1) /* Ethernet ring for
- forwarding packets */
-#define ETH_TX_RING_TYPE_STANDARD (2) /* Ethernet ring for sending
- network packets. */
-#define ETH_TX_RING_TYPE_BOUND (3) /* Ethernet ring bound to the
- port specified in the command
- header.port_number field.
- Rings of this type are
- NOT subject to the
- failover logic implemented
- in the BladeEngine.
- */
-
-/* --- FWCMD_COMMON_QOS_TYPE_ENUM --- */
-#define QOS_BITS_NIC (1) /* max_bits_per_second_NIC */
- /* field is valid. */
-#define QOS_PKTS_NIC (2) /* max_packets_per_second_NIC */
- /* field is valid. */
-#define QOS_IOPS_ISCSI (4) /* max_ios_per_second_iSCSI */
- /*field is valid. */
-#define QOS_VLAN_TAG (8) /* domain_VLAN_tag field
- is valid. */
-#define QOS_FABRIC_ID (16) /* fabric_domain_ID field
- is valid. */
-#define QOS_OEM_PARAMS (32) /* qos_params_oem field
- is valid. */
-#define QOS_TPUT_ISCSI (64) /* max_bytes_per_second_iSCSI
- field is valid. */
-
-
-/*
- * --- FAILOVER_CONFIG_ENUM ---
- * Failover configuration setting used in FWCMD_COMMON_FORCE_FAILOVER
- */
-#define FAILOVER_CONFIG_NO_CHANGE (0) /* No change to automatic */
- /* port failover setting. */
-#define FAILOVER_CONFIG_ON (1) /* Automatic port failover
- on link down is enabled. */
-#define FAILOVER_CONFIG_OFF (2) /* Automatic port failover
- on link down is disabled. */
-
-/*
- * --- FAILOVER_PORT_ENUM ---
- * Failover port setting used in FWCMD_COMMON_FORCE_FAILOVER
- */
-#define FAILOVER_PORT_A (0) /* Selects port A. */
-#define FAILOVER_PORT_B (1) /* Selects port B. */
-#define FAILOVER_PORT_NONE (15) /* No port change requested. */
-
-
-/*
- * --- MGMT_FLASHROM_OPCODE ---
- * Flash ROM operation code
- */
-#define MGMT_FLASHROM_OPCODE_FLASH (1) /* Commit downloaded data
- to Flash ROM */
-#define MGMT_FLASHROM_OPCODE_SAVE (2) /* Save downloaded data to
- ARM's DDR - do not flash */
-#define MGMT_FLASHROM_OPCODE_CLEAR (3) /* Erase specified component
- from FlashROM */
-#define MGMT_FLASHROM_OPCODE_REPORT (4) /* Read specified component
- from Flash ROM */
-#define MGMT_FLASHROM_OPCODE_IMAGE_INFO (5) /* Returns size of a
- component */
-
-/*
- * --- MGMT_FLASHROM_OPTYPE ---
- * Flash ROM operation type
- */
-#define MGMT_FLASHROM_OPTYPE_CODE_FIRMWARE (0) /* Includes ARM firmware,
- IPSec (optional) and EP
- firmware */
-#define MGMT_FLASHROM_OPTYPE_CODE_REDBOOT (1)
-#define MGMT_FLASHROM_OPTYPE_CODE_BIOS (2)
-#define MGMT_FLASHROM_OPTYPE_CODE_PXE_BIOS (3)
-#define MGMT_FLASHROM_OPTYPE_CODE_CTRLS (4)
-#define MGMT_FLASHROM_OPTYPE_CFG_IPSEC (5)
-#define MGMT_FLASHROM_OPTYPE_CFG_INI (6)
-#define MGMT_FLASHROM_OPTYPE_ROM_OFFSET_SPECIFIED (7)
-
-/*
- * --- FLASHROM_TYPE ---
- * Flash ROM manufacturers supported in the f/w
- */
-#define INTEL (0)
-#define SPANSION (1)
-#define MICRON (2)
-
-/* --- DDR_CAS_TYPE --- */
-#define CAS_3 (0)
-#define CAS_4 (1)
-#define CAS_5 (2)
-
-/* --- DDR_SIZE_TYPE --- */
-#define SIZE_256MB (0)
-#define SIZE_512MB (1)
-
-/* --- DDR_MODE_TYPE --- */
-#define DDR_NO_ECC (0)
-#define DDR_ECC (1)
-
-/* --- INTERFACE_10GB_TYPE --- */
-#define CX4_TYPE (0)
-#define XFP_TYPE (1)
-
-/* --- BE_CHIP_MAX_MTU --- */
-#define CHIP_MAX_MTU (9000)
-
-/* --- XAUI_STATE_ENUM --- */
-#define XAUI_STATE_ENABLE (0) /* This MUST be the default
- value for all requests
- which set/change
- equalization parameter. */
-#define XAUI_STATE_DISABLE (255) /* The XAUI for both ports
- may be disabled for EMI
- tests. There is no
- provision for turning off
- individual ports.
- */
-/* --- BE_ASIC_REVISION --- */
-#define BE_ASIC_REV_A0 (1)
-#define BE_ASIC_REV_A1 (2)
-
-#endif /* __fwcmd_common_amap_h__ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * Autogenerated by srcgen version: 0127
- */
-#ifndef __fwcmd_common_bmap_h__
-#define __fwcmd_common_bmap_h__
-#include "fwcmd_types_bmap.h"
-#include "fwcmd_hdr_bmap.h"
-
-#if defined(__BIG_ENDIAN)
- /* Physical Address. */
-struct PHYS_ADDR {
- union {
- struct {
- u32 lo; /* DWORD 0 */
- u32 hi; /* DWORD 1 */
- } __packed; /* unnamed struct */
- u32 dw[2]; /* dword union */
- }; /* unnamed union */
-} __packed ;
-
-
-#else
- /* Physical Address. */
-struct PHYS_ADDR {
- union {
- struct {
- u32 lo; /* DWORD 0 */
- u32 hi; /* DWORD 1 */
- } __packed; /* unnamed struct */
- u32 dw[2]; /* dword union */
- }; /* unnamed union */
-} __packed ;
-
-struct BE_LINK_STATUS {
- u8 mac0_duplex;
- u8 mac0_speed;
- u8 mac1_duplex;
- u8 mac1_speed;
- u8 mgmt_mac_duplex;
- u8 mgmt_mac_speed;
- u8 active_port;
- u8 rsvd0;
- u8 mac0_fault;
- u8 mac1_fault;
- u16 rsvd1;
-} __packed;
-#endif
-
-struct FWCMD_COMMON_ANON_170_REQUEST {
- u32 rsvd0;
-} __packed;
-
-union LINK_STATUS_QUERY_PARAMS {
- struct BE_LINK_STATUS response;
- struct FWCMD_COMMON_ANON_170_REQUEST request;
-} __packed;
-
-/*
- * Queries the the link status for all ports. The valid values below
- * DO NOT indicate that a particular duplex or speed is supported by
- * BladeEngine. These enumerations simply list all possible duplexes
- * and speeds for any port. Consult BladeEngine product documentation
- * for the supported parameters.
- */
-struct FWCMD_COMMON_NTWK_LINK_STATUS_QUERY {
- union FWCMD_HEADER header;
- union LINK_STATUS_QUERY_PARAMS params;
-} __packed;
-
-struct FWCMD_COMMON_ANON_171_REQUEST {
- u8 type;
- u8 port;
- u8 mac1;
- u8 permanent;
-} __packed;
-
-struct FWCMD_COMMON_ANON_172_RESPONSE {
- struct MAC_ADDRESS_FORMAT mac;
-} __packed;
-
-union NTWK_MAC_QUERY_PARAMS {
- struct FWCMD_COMMON_ANON_171_REQUEST request;
- struct FWCMD_COMMON_ANON_172_RESPONSE response;
-} __packed;
-
-/* Queries one MAC address. */
-struct FWCMD_COMMON_NTWK_MAC_QUERY {
- union FWCMD_HEADER header;
- union NTWK_MAC_QUERY_PARAMS params;
-} __packed;
-
-struct MAC_SET_PARAMS_IN {
- u8 type;
- u8 port;
- u8 mac1;
- u8 invalidate;
- struct MAC_ADDRESS_FORMAT mac;
-} __packed;
-
-struct MAC_SET_PARAMS_OUT {
- u32 rsvd0;
-} __packed;
-
-union MAC_SET_PARAMS {
- struct MAC_SET_PARAMS_IN request;
- struct MAC_SET_PARAMS_OUT response;
-} __packed;
-
-/* Sets a MAC address. */
-struct FWCMD_COMMON_NTWK_MAC_SET {
- union FWCMD_HEADER header;
- union MAC_SET_PARAMS params;
-} __packed;
-
-/* MAC address list. */
-struct NTWK_MULTICAST_MAC_LIST {
- u8 byte[6];
-} __packed;
-
-struct FWCMD_COMMON_NTWK_MULTICAST_SET_REQUEST_PAYLOAD {
- u16 num_mac;
- u8 promiscuous;
- u8 rsvd0;
- struct NTWK_MULTICAST_MAC_LIST mac[32];
-} __packed;
-
-struct FWCMD_COMMON_ANON_174_RESPONSE {
- u32 rsvd0;
-} __packed;
-
-union FWCMD_COMMON_ANON_173_PARAMS {
- struct FWCMD_COMMON_NTWK_MULTICAST_SET_REQUEST_PAYLOAD request;
- struct FWCMD_COMMON_ANON_174_RESPONSE response;
-} __packed;
-
-/*
- * Sets multicast address hash. The MPU will merge the MAC address lists
- * from all clients, including the networking and storage functions.
- * This command may fail if the final merged list of MAC addresses exceeds
- * 32 entries.
- */
-struct FWCMD_COMMON_NTWK_MULTICAST_SET {
- union FWCMD_HEADER header;
- union FWCMD_COMMON_ANON_173_PARAMS params;
-} __packed;
-
-struct FWCMD_COMMON_NTWK_VLAN_CONFIG_REQUEST_PAYLOAD {
- u16 num_vlan;
- u8 promiscuous;
- u8 rsvd0;
- u16 vlan_tag[32];
-} __packed;
-
-struct FWCMD_COMMON_ANON_176_RESPONSE {
- u32 rsvd0;
-} __packed;
-
-union FWCMD_COMMON_ANON_175_PARAMS {
- struct FWCMD_COMMON_NTWK_VLAN_CONFIG_REQUEST_PAYLOAD request;
- struct FWCMD_COMMON_ANON_176_RESPONSE response;
-} __packed;
-
-/*
- * Sets VLAN tag filter. The MPU will merge the VLAN tag list from all
- * clients, including the networking and storage functions. This command
- * may fail if the final vlan_tag array (from all functions) is longer
- * than 32 entries.
- */
-struct FWCMD_COMMON_NTWK_VLAN_CONFIG {
- union FWCMD_HEADER header;
- union FWCMD_COMMON_ANON_175_PARAMS params;
-} __packed;
-
-struct RING_DESTROY_REQUEST {
- u16 ring_type;
- u16 id;
- u8 bypass_flush;
- u8 rsvd0;
- u16 rsvd1;
-} __packed;
-
-struct FWCMD_COMMON_ANON_190_RESPONSE {
- u32 rsvd0;
-} __packed;
-
-union FWCMD_COMMON_ANON_189_PARAMS {
- struct RING_DESTROY_REQUEST request;
- struct FWCMD_COMMON_ANON_190_RESPONSE response;
-} __packed;
-/*
- * Command for destroying any ring. The connection(s) using the ring should
- * be quiesced before destroying the ring.
- */
-struct FWCMD_COMMON_RING_DESTROY {
- union FWCMD_HEADER header;
- union FWCMD_COMMON_ANON_189_PARAMS params;
-} __packed;
-
-struct FWCMD_COMMON_ANON_192_REQUEST {
- u16 num_pages;
- u16 rsvd0;
- struct CQ_CONTEXT_AMAP context;
- struct PHYS_ADDR pages[4];
-} __packed ;
-
-struct FWCMD_COMMON_ANON_193_RESPONSE {
- u16 cq_id;
-} __packed ;
-
-union FWCMD_COMMON_ANON_191_PARAMS {
- struct FWCMD_COMMON_ANON_192_REQUEST request;
- struct FWCMD_COMMON_ANON_193_RESPONSE response;
-} __packed ;
-
-/*
- * Command for creating a completion queue. A Completion Queue must span
- * at least 1 page and at most 4 pages. Each completion queue entry
- * is 16 bytes regardless of CQ entry format. Thus the ring must be
- * at least 256 entries deep (corresponding to 1 page) and can be at
- * most 1024 entries deep (corresponding to 4 pages). The number of
- * pages posted must contain the CQ ring size as encoded in the context.
- *
- */
-struct FWCMD_COMMON_CQ_CREATE {
- union FWCMD_HEADER header;
- union FWCMD_COMMON_ANON_191_PARAMS params;
-} __packed ;
-
-struct FWCMD_COMMON_ANON_198_REQUEST {
- u16 num_pages;
- u16 rsvd0;
- struct EQ_CONTEXT_AMAP context;
- struct PHYS_ADDR pages[8];
-} __packed ;
-
-struct FWCMD_COMMON_ANON_199_RESPONSE {
- u16 eq_id;
-} __packed ;
-
-union FWCMD_COMMON_ANON_197_PARAMS {
- struct FWCMD_COMMON_ANON_198_REQUEST request;
- struct FWCMD_COMMON_ANON_199_RESPONSE response;
-} __packed ;
-
-/*
- * Command for creating a event queue. An Event Queue must span at least
- * 1 page and at most 8 pages. The number of pages posted must contain
- * the EQ ring. The ring is defined by the size of the EQ entries (encoded
- * in the context) and the number of EQ entries (also encoded in the
- * context).
- */
-struct FWCMD_COMMON_EQ_CREATE {
- union FWCMD_HEADER header;
- union FWCMD_COMMON_ANON_197_PARAMS params;
-} __packed ;
-
-struct FWCMD_COMMON_ANON_201_REQUEST {
- u16 cq_id;
- u16 bcmc_cq_id;
- u16 num_pages;
- u16 rsvd0;
- struct PHYS_ADDR pages[2];
-} __packed;
-
-struct FWCMD_COMMON_ANON_202_RESPONSE {
- u16 id;
-} __packed;
-
-union FWCMD_COMMON_ANON_200_PARAMS {
- struct FWCMD_COMMON_ANON_201_REQUEST request;
- struct FWCMD_COMMON_ANON_202_RESPONSE response;
-} __packed;
-
-/*
- * Command for creating Ethernet receive ring. An ERX ring contains ETH_RX_D
- * entries (8 bytes each). An ERX ring must be 1024 entries deep
- * (corresponding to 2 pages).
- */
-struct FWCMD_COMMON_ETH_RX_CREATE {
- union FWCMD_HEADER header;
- union FWCMD_COMMON_ANON_200_PARAMS params;
-} __packed;
-
-struct FWCMD_COMMON_ANON_204_REQUEST {
- u16 num_pages;
- u8 ulp_num;
- u8 type;
- struct ETX_CONTEXT_AMAP context;
- struct PHYS_ADDR pages[8];
-} __packed ;
-
-struct FWCMD_COMMON_ANON_205_RESPONSE {
- u16 cid;
- u8 ulp_num;
- u8 rsvd0;
-} __packed ;
-
-union FWCMD_COMMON_ANON_203_PARAMS {
- struct FWCMD_COMMON_ANON_204_REQUEST request;
- struct FWCMD_COMMON_ANON_205_RESPONSE response;
-} __packed ;
-
-/*
- * Command for creating an Ethernet transmit ring. An ETX ring contains
- * ETH_WRB entries (16 bytes each). An ETX ring must be at least 256
- * entries deep (corresponding to 1 page) and at most 2k entries deep
- * (corresponding to 8 pages).
- */
-struct FWCMD_COMMON_ETH_TX_CREATE {
- union FWCMD_HEADER header;
- union FWCMD_COMMON_ANON_203_PARAMS params;
-} __packed ;
-
-struct FWCMD_COMMON_ANON_222_REQUEST {
- u16 num_pages;
- u16 rsvd0;
- struct MCC_RING_CONTEXT_AMAP context;
- struct PHYS_ADDR pages[8];
-} __packed ;
-
-struct FWCMD_COMMON_ANON_223_RESPONSE {
- u16 id;
-} __packed ;
-
-union FWCMD_COMMON_ANON_221_PARAMS {
- struct FWCMD_COMMON_ANON_222_REQUEST request;
- struct FWCMD_COMMON_ANON_223_RESPONSE response;
-} __packed ;
-
-/*
- * Command for creating the MCC ring. An MCC ring must be at least 16
- * entries deep (corresponding to 1 page) and at most 128 entries deep
- * (corresponding to 8 pages).
- */
-struct FWCMD_COMMON_MCC_CREATE {
- union FWCMD_HEADER header;
- union FWCMD_COMMON_ANON_221_PARAMS params;
-} __packed ;
-
-struct GET_QOS_IN {
- u32 qos_params_rsvd;
-} __packed;
-
-struct GET_QOS_OUT {
- u32 max_bits_per_second_NIC;
- u32 max_packets_per_second_NIC;
- u32 max_ios_per_second_iSCSI;
- u32 max_bytes_per_second_iSCSI;
- u16 domain_VLAN_tag;
- u16 fabric_domain_ID;
- u32 qos_params_oem[4];
-} __packed;
-
-union GET_QOS_PARAMS {
- struct GET_QOS_IN request;
- struct GET_QOS_OUT response;
-} __packed;
-
-/* QOS/Bandwidth settings per domain. Applicable only in VMs. */
-struct FWCMD_COMMON_GET_QOS {
- union FWCMD_HEADER header;
- union GET_QOS_PARAMS params;
-} __packed;
-
-struct SET_QOS_IN {
- u32 valid_flags;
- u32 max_bits_per_second_NIC;
- u32 max_packets_per_second_NIC;
- u32 max_ios_per_second_iSCSI;
- u32 max_bytes_per_second_iSCSI;
- u16 domain_VLAN_tag;
- u16 fabric_domain_ID;
- u32 qos_params_oem[4];
-} __packed;
-
-struct SET_QOS_OUT {
- u32 qos_params_rsvd;
-} __packed;
-
-union SET_QOS_PARAMS {
- struct SET_QOS_IN request;
- struct SET_QOS_OUT response;
-} __packed;
-
-/* QOS/Bandwidth settings per domain. Applicable only in VMs. */
-struct FWCMD_COMMON_SET_QOS {
- union FWCMD_HEADER header;
- union SET_QOS_PARAMS params;
-} __packed;
-
-struct SET_FRAME_SIZE_IN {
- u32 max_tx_frame_size;
- u32 max_rx_frame_size;
-} __packed;
-
-struct SET_FRAME_SIZE_OUT {
- u32 chip_max_tx_frame_size;
- u32 chip_max_rx_frame_size;
-} __packed;
-
-union SET_FRAME_SIZE_PARAMS {
- struct SET_FRAME_SIZE_IN request;
- struct SET_FRAME_SIZE_OUT response;
-} __packed;
-
-/* Set frame size command. Only host domain may issue this command. */
-struct FWCMD_COMMON_SET_FRAME_SIZE {
- union FWCMD_HEADER header;
- union SET_FRAME_SIZE_PARAMS params;
-} __packed;
-
-struct FORCE_FAILOVER_IN {
- u32 move_to_port;
- u32 failover_config;
-} __packed;
-
-struct FWCMD_COMMON_ANON_231_RESPONSE {
- u32 rsvd0;
-} __packed;
-
-union FWCMD_COMMON_ANON_230_PARAMS {
- struct FORCE_FAILOVER_IN request;
- struct FWCMD_COMMON_ANON_231_RESPONSE response;
-} __packed;
-
-/*
- * Use this command to control failover in BladeEngine. It may be used
- * to failback to a restored port or to forcibly move traffic from
- * one port to another. It may also be used to enable or disable the
- * automatic failover feature. This command can only be issued by domain
- * 0.
- */
-struct FWCMD_COMMON_FORCE_FAILOVER {
- union FWCMD_HEADER header;
- union FWCMD_COMMON_ANON_230_PARAMS params;
-} __packed;
-
-struct FWCMD_COMMON_ANON_240_REQUEST {
- u64 context;
-} __packed;
-
-struct FWCMD_COMMON_ANON_241_RESPONSE {
- u64 context;
-} __packed;
-
-union FWCMD_COMMON_ANON_239_PARAMS {
- struct FWCMD_COMMON_ANON_240_REQUEST request;
- struct FWCMD_COMMON_ANON_241_RESPONSE response;
-} __packed;
-
-/*
- * This command can be used by clients as a no-operation request. Typical
- * uses for drivers are as a heartbeat mechanism, or deferred processing
- * catalyst. The ARM will always complete this command with a good completion.
- * The 64-bit parameter is not touched by the ARM processor.
- */
-struct FWCMD_COMMON_NOP {
- union FWCMD_HEADER header;
- union FWCMD_COMMON_ANON_239_PARAMS params;
-} __packed;
-
-struct NTWK_RX_FILTER_SETTINGS {
- u8 promiscuous;
- u8 ip_cksum;
- u8 tcp_cksum;
- u8 udp_cksum;
- u8 pass_err;
- u8 pass_ckerr;
- u8 strip_crc;
- u8 mcast_en;
- u8 bcast_en;
- u8 mcast_promiscuous_en;
- u8 unicast_en;
- u8 vlan_promiscuous;
-} __packed;
-
-union FWCMD_COMMON_ANON_242_PARAMS {
- struct NTWK_RX_FILTER_SETTINGS request;
- struct NTWK_RX_FILTER_SETTINGS response;
-} __packed;
-
-/*
- * This command is used to modify the ethernet receive filter configuration.
- * Only domain 0 network function drivers may issue this command. The
- * applied configuration is returned in the response payload. Note:
- * Some receive packet filter settings are global on BladeEngine and
- * can affect both the storage and network function clients that the
- * BladeEngine hardware and firmware serve. Additionaly, depending
- * on the revision of BladeEngine, some ethernet receive filter settings
- * are dependent on others. If a dependency exists between settings
- * for the BladeEngine revision, and the command request settings do
- * not meet the dependency requirement, the invalid settings will not
- * be applied despite the comand succeeding. For example: a driver may
- * request to enable broadcast packets, but not enable multicast packets.
- * On early revisions of BladeEngine, there may be no distinction between
- * broadcast and multicast filters, so broadcast could not be enabled
- * without enabling multicast. In this scenario, the comand would still
- * succeed, but the response payload would indicate the previously
- * configured broadcast and multicast setting.
- */
-struct FWCMD_COMMON_NTWK_RX_FILTER {
- union FWCMD_HEADER header;
- union FWCMD_COMMON_ANON_242_PARAMS params;
-} __packed;
-
-
-struct FWCMD_COMMON_ANON_244_REQUEST {
- u32 rsvd0;
-} __packed;
-
-struct FWCMD_COMMON_GET_FW_VERSION_RESPONSE_PAYLOAD {
- u8 firmware_version_string[32];
- u8 fw_on_flash_version_string[32];
-} __packed;
-
-union FWCMD_COMMON_ANON_243_PARAMS {
- struct FWCMD_COMMON_ANON_244_REQUEST request;
- struct FWCMD_COMMON_GET_FW_VERSION_RESPONSE_PAYLOAD response;
-} __packed;
-
-/* This comand retrieves the firmware version. */
-struct FWCMD_COMMON_GET_FW_VERSION {
- union FWCMD_HEADER header;
- union FWCMD_COMMON_ANON_243_PARAMS params;
-} __packed;
-
-struct FWCMD_COMMON_ANON_246_REQUEST {
- u16 tx_flow_control;
- u16 rx_flow_control;
-} __packed;
-
-struct FWCMD_COMMON_ANON_247_RESPONSE {
- u32 rsvd0;
-} __packed;
-
-union FWCMD_COMMON_ANON_245_PARAMS {
- struct FWCMD_COMMON_ANON_246_REQUEST request;
- struct FWCMD_COMMON_ANON_247_RESPONSE response;
-} __packed;
-
-/*
- * This comand is used to program BladeEngine flow control behavior.
- * Only the host networking driver is allowed to use this comand.
- */
-struct FWCMD_COMMON_SET_FLOW_CONTROL {
- union FWCMD_HEADER header;
- union FWCMD_COMMON_ANON_245_PARAMS params;
-} __packed;
-
-struct FWCMD_COMMON_ANON_249_REQUEST {
- u32 rsvd0;
-} __packed;
-
-struct FWCMD_COMMON_ANON_250_RESPONSE {
- u16 tx_flow_control;
- u16 rx_flow_control;
-} __packed;
-
-union FWCMD_COMMON_ANON_248_PARAMS {
- struct FWCMD_COMMON_ANON_249_REQUEST request;
- struct FWCMD_COMMON_ANON_250_RESPONSE response;
-} __packed;
-
-/* This comand is used to read BladeEngine flow control settings. */
-struct FWCMD_COMMON_GET_FLOW_CONTROL {
- union FWCMD_HEADER header;
- union FWCMD_COMMON_ANON_248_PARAMS params;
-} __packed;
-
-struct EQ_DELAY_PARAMS {
- u32 eq_id;
- u32 delay_in_microseconds;
-} __packed;
-
-struct FWCMD_COMMON_ANON_257_REQUEST {
- u32 num_eq;
- u32 rsvd0;
- struct EQ_DELAY_PARAMS delay[16];
-} __packed;
-
-struct FWCMD_COMMON_ANON_258_RESPONSE {
- u32 delay_resolution_in_microseconds;
- u32 delay_max_in_microseconds;
-} __packed;
-
-union MODIFY_EQ_DELAY_PARAMS {
- struct FWCMD_COMMON_ANON_257_REQUEST request;
- struct FWCMD_COMMON_ANON_258_RESPONSE response;
-} __packed;
-
-/* This comand changes the EQ delay for a given set of EQs. */
-struct FWCMD_COMMON_MODIFY_EQ_DELAY {
- union FWCMD_HEADER header;
- union MODIFY_EQ_DELAY_PARAMS params;
-} __packed;
-
-struct FWCMD_COMMON_ANON_260_REQUEST {
- u32 rsvd0;
-} __packed;
-
-struct BE_FIRMWARE_CONFIG {
- u16 be_config_number;
- u16 asic_revision;
- u32 nic_ulp_mask;
- u32 tulp_mask;
- u32 iscsi_ulp_mask;
- u32 rdma_ulp_mask;
- u32 rsvd0[4];
- u32 eth_tx_id_start;
- u32 eth_tx_id_count;
- u32 eth_rx_id_start;
- u32 eth_rx_id_count;
- u32 tpm_wrbq_id_start;
- u32 tpm_wrbq_id_count;
- u32 tpm_defq_id_start;
- u32 tpm_defq_id_count;
- u32 iscsi_wrbq_id_start;
- u32 iscsi_wrbq_id_count;
- u32 iscsi_defq_id_start;
- u32 iscsi_defq_id_count;
- u32 rdma_qp_id_start;
- u32 rdma_qp_id_count;
- u32 rsvd1[8];
-} __packed;
-
-union FWCMD_COMMON_ANON_259_PARAMS {
- struct FWCMD_COMMON_ANON_260_REQUEST request;
- struct BE_FIRMWARE_CONFIG response;
-} __packed;
-
-/*
- * This comand queries the current firmware configuration parameters.
- * The static configuration type is defined by be_config_number. This
- * differentiates different BladeEngine builds, such as iSCSI Initiator
- * versus iSCSI Target. For a given static configuration, the Upper
- * Layer Protocol (ULP) processors may be reconfigured to support different
- * protocols. Each ULP processor supports one or more protocols. The
- * masks indicate which processors are configured for each protocol.
- * For a given static configuration, the number of TCP connections
- * supported for each protocol may vary. The *_id_start and *_id_count
- * variables define a linear range of IDs that are available for each
- * supported protocol. The *_id_count may be used by the driver to allocate
- * the appropriate number of connection resources. The *_id_start may
- * be used to map the arbitrary range of IDs to a zero-based range
- * of indices.
- */
-struct FWCMD_COMMON_FIRMWARE_CONFIG {
- union FWCMD_HEADER header;
- union FWCMD_COMMON_ANON_259_PARAMS params;
-} __packed;
-
-struct FWCMD_COMMON_PORT_EQUALIZATION_PARAMS {
- u32 emph_lev_sel_port0;
- u32 emph_lev_sel_port1;
- u8 xaui_vo_sel;
- u8 xaui_state;
- u16 rsvd0;
- u32 xaui_eq_vector;
-} __packed;
-
-struct FWCMD_COMMON_ANON_262_REQUEST {
- u32 rsvd0;
-} __packed;
-
-union FWCMD_COMMON_ANON_261_PARAMS {
- struct FWCMD_COMMON_ANON_262_REQUEST request;
- struct FWCMD_COMMON_PORT_EQUALIZATION_PARAMS response;
-} __packed;
-
-/*
- * This comand can be used to read XAUI equalization parameters. The
- * ARM firmware applies default equalization parameters during initialization.
- * These parameters may be customer-specific when derived from the
- * SEEPROM. See SEEPROM_DATA for equalization specific fields.
- */
-struct FWCMD_COMMON_GET_PORT_EQUALIZATION {
- union FWCMD_HEADER header;
- union FWCMD_COMMON_ANON_261_PARAMS params;
-} __packed;
-
-struct FWCMD_COMMON_ANON_264_RESPONSE {
- u32 rsvd0;
-} __packed;
-
-union FWCMD_COMMON_ANON_263_PARAMS {
- struct FWCMD_COMMON_PORT_EQUALIZATION_PARAMS request;
- struct FWCMD_COMMON_ANON_264_RESPONSE response;
-} __packed;
-
-/*
- * This comand can be used to set XAUI equalization parameters. The ARM
- * firmware applies default equalization parameters during initialization.
- * These parameters may be customer-specific when derived from the
- * SEEPROM. See SEEPROM_DATA for equalization specific fields.
- */
-struct FWCMD_COMMON_SET_PORT_EQUALIZATION {
- union FWCMD_HEADER header;
- union FWCMD_COMMON_ANON_263_PARAMS params;
-} __packed;
-
-#endif /* __fwcmd_common_bmap_h__ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * Autogenerated by srcgen version: 0127
- */
-#ifndef __fwcmd_eth_bmap_h__
-#define __fwcmd_eth_bmap_h__
-#include "fwcmd_hdr_bmap.h"
-#include "fwcmd_types_bmap.h"
-
-struct MIB_ETH_STATISTICS_PARAMS_IN {
- u32 rsvd0;
-} __packed;
-
-struct BE_RXF_STATS {
- u32 p0recvdtotalbytesLSD; /* DWORD 0 */
- u32 p0recvdtotalbytesMSD; /* DWORD 1 */
- u32 p0recvdtotalframes; /* DWORD 2 */
- u32 p0recvdunicastframes; /* DWORD 3 */
- u32 p0recvdmulticastframes; /* DWORD 4 */
- u32 p0recvdbroadcastframes; /* DWORD 5 */
- u32 p0crcerrors; /* DWORD 6 */
- u32 p0alignmentsymerrs; /* DWORD 7 */
- u32 p0pauseframesrecvd; /* DWORD 8 */
- u32 p0controlframesrecvd; /* DWORD 9 */
- u32 p0inrangelenerrors; /* DWORD 10 */
- u32 p0outrangeerrors; /* DWORD 11 */
- u32 p0frametoolongerrors; /* DWORD 12 */
- u32 p0droppedaddressmatch; /* DWORD 13 */
- u32 p0droppedvlanmismatch; /* DWORD 14 */
- u32 p0ipdroppedtoosmall; /* DWORD 15 */
- u32 p0ipdroppedtooshort; /* DWORD 16 */
- u32 p0ipdroppedhdrtoosmall; /* DWORD 17 */
- u32 p0tcpdroppedlen; /* DWORD 18 */
- u32 p0droppedrunt; /* DWORD 19 */
- u32 p0recvd64; /* DWORD 20 */
- u32 p0recvd65_127; /* DWORD 21 */
- u32 p0recvd128_256; /* DWORD 22 */
- u32 p0recvd256_511; /* DWORD 23 */
- u32 p0recvd512_1023; /* DWORD 24 */
- u32 p0recvd1518_1522; /* DWORD 25 */
- u32 p0recvd1522_2047; /* DWORD 26 */
- u32 p0recvd2048_4095; /* DWORD 27 */
- u32 p0recvd4096_8191; /* DWORD 28 */
- u32 p0recvd8192_9216; /* DWORD 29 */
- u32 p0rcvdipcksmerrs; /* DWORD 30 */
- u32 p0recvdtcpcksmerrs; /* DWORD 31 */
- u32 p0recvdudpcksmerrs; /* DWORD 32 */
- u32 p0recvdnonrsspackets; /* DWORD 33 */
- u32 p0recvdippackets; /* DWORD 34 */
- u32 p0recvdchute1packets; /* DWORD 35 */
- u32 p0recvdchute2packets; /* DWORD 36 */
- u32 p0recvdchute3packets; /* DWORD 37 */
- u32 p0recvdipsecpackets; /* DWORD 38 */
- u32 p0recvdmanagementpackets; /* DWORD 39 */
- u32 p0xmitbyteslsd; /* DWORD 40 */
- u32 p0xmitbytesmsd; /* DWORD 41 */
- u32 p0xmitunicastframes; /* DWORD 42 */
- u32 p0xmitmulticastframes; /* DWORD 43 */
- u32 p0xmitbroadcastframes; /* DWORD 44 */
- u32 p0xmitpauseframes; /* DWORD 45 */
- u32 p0xmitcontrolframes; /* DWORD 46 */
- u32 p0xmit64; /* DWORD 47 */
- u32 p0xmit65_127; /* DWORD 48 */
- u32 p0xmit128_256; /* DWORD 49 */
- u32 p0xmit256_511; /* DWORD 50 */
- u32 p0xmit512_1023; /* DWORD 51 */
- u32 p0xmit1518_1522; /* DWORD 52 */
- u32 p0xmit1522_2047; /* DWORD 53 */
- u32 p0xmit2048_4095; /* DWORD 54 */
- u32 p0xmit4096_8191; /* DWORD 55 */
- u32 p0xmit8192_9216; /* DWORD 56 */
- u32 p0rxfifooverflowdropped; /* DWORD 57 */
- u32 p0ipseclookupfaileddropped; /* DWORD 58 */
- u32 p1recvdtotalbytesLSD; /* DWORD 59 */
- u32 p1recvdtotalbytesMSD; /* DWORD 60 */
- u32 p1recvdtotalframes; /* DWORD 61 */
- u32 p1recvdunicastframes; /* DWORD 62 */
- u32 p1recvdmulticastframes; /* DWORD 63 */
- u32 p1recvdbroadcastframes; /* DWORD 64 */
- u32 p1crcerrors; /* DWORD 65 */
- u32 p1alignmentsymerrs; /* DWORD 66 */
- u32 p1pauseframesrecvd; /* DWORD 67 */
- u32 p1controlframesrecvd; /* DWORD 68 */
- u32 p1inrangelenerrors; /* DWORD 69 */
- u32 p1outrangeerrors; /* DWORD 70 */
- u32 p1frametoolongerrors; /* DWORD 71 */
- u32 p1droppedaddressmatch; /* DWORD 72 */
- u32 p1droppedvlanmismatch; /* DWORD 73 */
- u32 p1ipdroppedtoosmall; /* DWORD 74 */
- u32 p1ipdroppedtooshort; /* DWORD 75 */
- u32 p1ipdroppedhdrtoosmall; /* DWORD 76 */
- u32 p1tcpdroppedlen; /* DWORD 77 */
- u32 p1droppedrunt; /* DWORD 78 */
- u32 p1recvd64; /* DWORD 79 */
- u32 p1recvd65_127; /* DWORD 80 */
- u32 p1recvd128_256; /* DWORD 81 */
- u32 p1recvd256_511; /* DWORD 82 */
- u32 p1recvd512_1023; /* DWORD 83 */
- u32 p1recvd1518_1522; /* DWORD 84 */
- u32 p1recvd1522_2047; /* DWORD 85 */
- u32 p1recvd2048_4095; /* DWORD 86 */
- u32 p1recvd4096_8191; /* DWORD 87 */
- u32 p1recvd8192_9216; /* DWORD 88 */
- u32 p1rcvdipcksmerrs; /* DWORD 89 */
- u32 p1recvdtcpcksmerrs; /* DWORD 90 */
- u32 p1recvdudpcksmerrs; /* DWORD 91 */
- u32 p1recvdnonrsspackets; /* DWORD 92 */
- u32 p1recvdippackets; /* DWORD 93 */
- u32 p1recvdchute1packets; /* DWORD 94 */
- u32 p1recvdchute2packets; /* DWORD 95 */
- u32 p1recvdchute3packets; /* DWORD 96 */
- u32 p1recvdipsecpackets; /* DWORD 97 */
- u32 p1recvdmanagementpackets; /* DWORD 98 */
- u32 p1xmitbyteslsd; /* DWORD 99 */
- u32 p1xmitbytesmsd; /* DWORD 100 */
- u32 p1xmitunicastframes; /* DWORD 101 */
- u32 p1xmitmulticastframes; /* DWORD 102 */
- u32 p1xmitbroadcastframes; /* DWORD 103 */
- u32 p1xmitpauseframes; /* DWORD 104 */
- u32 p1xmitcontrolframes; /* DWORD 105 */
- u32 p1xmit64; /* DWORD 106 */
- u32 p1xmit65_127; /* DWORD 107 */
- u32 p1xmit128_256; /* DWORD 108 */
- u32 p1xmit256_511; /* DWORD 109 */
- u32 p1xmit512_1023; /* DWORD 110 */
- u32 p1xmit1518_1522; /* DWORD 111 */
- u32 p1xmit1522_2047; /* DWORD 112 */
- u32 p1xmit2048_4095; /* DWORD 113 */
- u32 p1xmit4096_8191; /* DWORD 114 */
- u32 p1xmit8192_9216; /* DWORD 115 */
- u32 p1rxfifooverflowdropped; /* DWORD 116 */
- u32 p1ipseclookupfaileddropped; /* DWORD 117 */
- u32 pxdroppednopbuf; /* DWORD 118 */
- u32 pxdroppednotxpb; /* DWORD 119 */
- u32 pxdroppednoipsecbuf; /* DWORD 120 */
- u32 pxdroppednoerxdescr; /* DWORD 121 */
- u32 pxdroppednotpredescr; /* DWORD 122 */
- u32 pxrecvdmanagementportpackets; /* DWORD 123 */
- u32 pxrecvdmanagementportbytes; /* DWORD 124 */
- u32 pxrecvdmanagementportpauseframes; /* DWORD 125 */
- u32 pxrecvdmanagementporterrors; /* DWORD 126 */
- u32 pxxmitmanagementportpackets; /* DWORD 127 */
- u32 pxxmitmanagementportbytes; /* DWORD 128 */
- u32 pxxmitmanagementportpause; /* DWORD 129 */
- u32 pxxmitmanagementportrxfifooverflow; /* DWORD 130 */
- u32 pxrecvdipsecipcksmerrs; /* DWORD 131 */
- u32 pxrecvdtcpsecipcksmerrs; /* DWORD 132 */
- u32 pxrecvdudpsecipcksmerrs; /* DWORD 133 */
- u32 pxipsecrunt; /* DWORD 134 */
- u32 pxipsecaddressmismatchdropped; /* DWORD 135 */
- u32 pxipsecrxfifooverflowdropped; /* DWORD 136 */
- u32 pxipsecframestoolong; /* DWORD 137 */
- u32 pxipsectotalipframes; /* DWORD 138 */
- u32 pxipseciptoosmall; /* DWORD 139 */
- u32 pxipseciptooshort; /* DWORD 140 */
- u32 pxipseciphdrtoosmall; /* DWORD 141 */
- u32 pxipsectcphdrbad; /* DWORD 142 */
- u32 pxrecvdipsecchute1; /* DWORD 143 */
- u32 pxrecvdipsecchute2; /* DWORD 144 */
- u32 pxrecvdipsecchute3; /* DWORD 145 */
- u32 pxdropped7frags; /* DWORD 146 */
- u32 pxdroppedfrags; /* DWORD 147 */
- u32 pxdroppedinvalidfragring; /* DWORD 148 */
- u32 pxnumforwardedpackets; /* DWORD 149 */
-} __packed;
-
-union MIB_ETH_STATISTICS_PARAMS {
- struct MIB_ETH_STATISTICS_PARAMS_IN request;
- struct BE_RXF_STATS response;
-} __packed;
-
-/*
- * Query ethernet statistics. All domains may issue this command. The
- * host domain drivers may optionally reset internal statistic counters
- * with a query.
- */
-struct FWCMD_ETH_GET_STATISTICS {
- union FWCMD_HEADER header;
- union MIB_ETH_STATISTICS_PARAMS params;
-} __packed;
-
-
-struct FWCMD_ETH_ANON_175_REQUEST {
- u8 port0_promiscuous;
- u8 port1_promiscuous;
- u16 rsvd0;
-} __packed;
-
-struct FWCMD_ETH_ANON_176_RESPONSE {
- u32 rsvd0;
-} __packed;
-
-union FWCMD_ETH_ANON_174_PARAMS {
- struct FWCMD_ETH_ANON_175_REQUEST request;
- struct FWCMD_ETH_ANON_176_RESPONSE response;
-} __packed;
-
-/* Enables/Disables promiscuous ethernet receive mode. */
-struct FWCMD_ETH_PROMISCUOUS {
- union FWCMD_HEADER header;
- union FWCMD_ETH_ANON_174_PARAMS params;
-} __packed;
-
-struct FWCMD_ETH_ANON_178_REQUEST {
- u32 new_fragsize_log2;
-} __packed;
-
-struct FWCMD_ETH_ANON_179_RESPONSE {
- u32 actual_fragsize_log2;
-} __packed;
-
-union FWCMD_ETH_ANON_177_PARAMS {
- struct FWCMD_ETH_ANON_178_REQUEST request;
- struct FWCMD_ETH_ANON_179_RESPONSE response;
-} __packed;
-
-/*
- * Sets the Ethernet RX fragment size. Only host (domain 0) networking
- * drivers may issue this command. This call will fail for non-host
- * protection domains. In this situation the MCC CQ status will indicate
- * a failure due to insufficient priviledges. The response should be
- * ignored, and the driver should use the FWCMD_ETH_GET_FRAG_SIZE to
- * query the existing ethernet receive fragment size. It must use this
- * fragment size for all fragments in the ethernet receive ring. If
- * the command succeeds, the driver must use the frag size indicated
- * in the command response since the requested frag size may not be applied
- * until the next reboot. When the requested fragsize matches the response
- * fragsize, this indicates the request was applied immediately.
- */
-struct FWCMD_ETH_SET_RX_FRAG_SIZE {
- union FWCMD_HEADER header;
- union FWCMD_ETH_ANON_177_PARAMS params;
-} __packed;
-
-struct FWCMD_ETH_ANON_181_REQUEST {
- u32 rsvd0;
-} __packed;
-
-struct FWCMD_ETH_ANON_182_RESPONSE {
- u32 actual_fragsize_log2;
-} __packed;
-
-union FWCMD_ETH_ANON_180_PARAMS {
- struct FWCMD_ETH_ANON_181_REQUEST request;
- struct FWCMD_ETH_ANON_182_RESPONSE response;
-} __packed;
-
-/*
- * Queries the Ethernet RX fragment size. All domains may issue this
- * command. The driver should call this command to determine the minimum
- * required fragment size for the ethernet RX ring buffers. Drivers
- * may choose to use a larger size for each fragment buffer, but BladeEngine
- * will use up to the configured minimum required fragsize in each ethernet
- * receive fragment buffer. For example, if the ethernet receive fragment
- * size is configured to 4kB, and a driver uses 8kB fragments, a 6kB
- * ethernet packet received by BladeEngine will be split accross two
- * of the driver's receive framgents (4kB in one fragment buffer, and
- * 2kB in the subsequent fragment buffer).
- */
-struct FWCMD_ETH_GET_RX_FRAG_SIZE {
- union FWCMD_HEADER header;
- union FWCMD_ETH_ANON_180_PARAMS params;
-} __packed;
-
-#endif /* __fwcmd_eth_bmap_h__ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * Autogenerated by srcgen version: 0127
- */
-#ifndef __fwcmd_hdr_bmap_h__
-#define __fwcmd_hdr_bmap_h__
-
-struct FWCMD_REQUEST_HEADER {
- u8 opcode;
- u8 subsystem;
- u8 port_number;
- u8 domain;
- u32 timeout;
- u32 request_length;
- u32 rsvd0;
-} __packed;
-
-struct FWCMD_RESPONSE_HEADER {
- u8 opcode;
- u8 subsystem;
- u8 rsvd0;
- u8 domain;
- u8 status;
- u8 additional_status;
- u16 rsvd1;
- u32 response_length;
- u32 actual_response_length;
-} __packed;
-
-/*
- * The firmware/driver overwrites the input FWCMD_REQUEST_HEADER with
- * the output FWCMD_RESPONSE_HEADER.
- */
-union FWCMD_HEADER {
- struct FWCMD_REQUEST_HEADER request;
- struct FWCMD_RESPONSE_HEADER response;
-} __packed;
-
-#endif /* __fwcmd_hdr_bmap_h__ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * Autogenerated by srcgen version: 0127
- */
-#ifndef __fwcmd_mcc_amap_h__
-#define __fwcmd_mcc_amap_h__
-#include "fwcmd_opcodes.h"
-/*
- * Where applicable, a WRB, may contain a list of Scatter-gather elements.
- * Each element supports a 64 bit address and a 32bit length field.
- */
-struct BE_MCC_SGE_AMAP {
- u8 pa_lo[32]; /* DWORD 0 */
- u8 pa_hi[32]; /* DWORD 1 */
- u8 length[32]; /* DWORD 2 */
-} __packed;
-struct MCC_SGE_AMAP {
- u32 dw[3];
-};
-/*
- * The design of an MCC_SGE allows up to 19 elements to be embedded
- * in a WRB, supporting 64KB data transfers (assuming a 4KB page size).
- */
-struct BE_MCC_WRB_PAYLOAD_AMAP {
- union {
- struct BE_MCC_SGE_AMAP sgl[19];
- u8 embedded[59][32]; /* DWORD 0 */
- };
-} __packed;
-struct MCC_WRB_PAYLOAD_AMAP {
- u32 dw[59];
-};
-
-/*
- * This is the structure of the MCC Command WRB for commands
- * sent to the Management Processing Unit (MPU). See section
- * for usage in embedded and non-embedded modes.
- */
-struct BE_MCC_WRB_AMAP {
- u8 embedded; /* DWORD 0 */
- u8 rsvd0[2]; /* DWORD 0 */
- u8 sge_count[5]; /* DWORD 0 */
- u8 rsvd1[16]; /* DWORD 0 */
- u8 special[8]; /* DWORD 0 */
- u8 payload_length[32]; /* DWORD 1 */
- u8 tag[2][32]; /* DWORD 2 */
- u8 rsvd2[32]; /* DWORD 4 */
- struct BE_MCC_WRB_PAYLOAD_AMAP payload;
-} __packed;
-struct MCC_WRB_AMAP {
- u32 dw[64];
-};
-
-/* This is the structure of the MCC Completion queue entry */
-struct BE_MCC_CQ_ENTRY_AMAP {
- u8 completion_status[16]; /* DWORD 0 */
- u8 extended_status[16]; /* DWORD 0 */
- u8 mcc_tag[2][32]; /* DWORD 1 */
- u8 rsvd0[27]; /* DWORD 3 */
- u8 consumed; /* DWORD 3 */
- u8 completed; /* DWORD 3 */
- u8 hpi_buffer_completion; /* DWORD 3 */
- u8 async_event; /* DWORD 3 */
- u8 valid; /* DWORD 3 */
-} __packed;
-struct MCC_CQ_ENTRY_AMAP {
- u32 dw[4];
-};
-
-/* Mailbox structures used by the MPU during bootstrap */
-struct BE_MCC_MAILBOX_AMAP {
- struct BE_MCC_WRB_AMAP wrb;
- struct BE_MCC_CQ_ENTRY_AMAP cq;
-} __packed;
-struct MCC_MAILBOX_AMAP {
- u32 dw[68];
-};
-
-#endif /* __fwcmd_mcc_amap_h__ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * Autogenerated by srcgen version: 0127
- */
-#ifndef __fwcmd_opcodes_amap_h__
-#define __fwcmd_opcodes_amap_h__
-
-/*
- * --- FWCMD_SUBSYSTEMS ---
- * The commands are grouped into the following subsystems. The subsystem
- * code along with the opcode uniquely identify a particular fwcmd.
- */
-#define FWCMD_SUBSYSTEM_RSVD (0) /* This subsystem is reserved. It is */
- /* never used. */
-#define FWCMD_SUBSYSTEM_COMMON (1) /* CMDs in this group are common to
- * all subsystems. See
- * COMMON_SUBSYSTEM_OPCODES for opcodes
- * and Common Host Configuration CMDs
- * for the FWCMD descriptions.
- */
-#define FWCMD_SUBSYSTEM_COMMON_ISCSI (2) /* CMDs in this group are */
- /*
- * common to Initiator and Target. See
- * COMMON_ISCSI_SUBSYSTEM_OPCODES and
- * Common iSCSI Initiator and Target
- * CMDs for the command descriptions.
- */
-#define FWCMD_SUBSYSTEM_ETH (3) /* This subsystem is used to
- execute Ethernet commands. */
-
-#define FWCMD_SUBSYSTEM_TPM (4) /* This subsystem is used
- to execute TPM commands. */
-#define FWCMD_SUBSYSTEM_PXE_UNDI (5) /* This subsystem is used
- * to execute PXE
- * and UNDI specific commands.
- */
-
-#define FWCMD_SUBSYSTEM_ISCSI_INI (6) /* This subsystem is used to
- execute ISCSI Initiator
- specific commands.
- */
-#define FWCMD_SUBSYSTEM_ISCSI_TGT (7) /* This subsystem is used
- to execute iSCSI Target
- specific commands.between
- PTL and ARM firmware.
- */
-#define FWCMD_SUBSYSTEM_MILI_PTL (8) /* This subsystem is used to
- execute iSCSI Target specific
- commands.between MILI
- and PTL. */
-#define FWCMD_SUBSYSTEM_MILI_TMD (9) /* This subsystem is used to
- execute iSCSI Target specific
- commands between MILI
- and TMD. */
-#define FWCMD_SUBSYSTEM_PROXY (11) /* This subsystem is used
- to execute proxied commands
- within the host at the
- explicit request of a
- non priviledged domain.
- This 'subsystem' is entirely
- virtual from the controller
- and firmware perspective as
- it is implemented in host
- drivers.
- */
-
-/*
- * --- COMMON_SUBSYSTEM_OPCODES ---
- * These opcodes are common to both networking and storage PCI
- * functions. They are used to reserve resources and configure
- * BladeEngine. These opcodes all use the FWCMD_SUBSYSTEM_COMMON
- * subsystem code.
- */
-#define OPCODE_COMMON_NTWK_MAC_QUERY (1)
-#define SUBSYSTEM_COMMON_NTWK_MAC_QUERY (1)
-#define SUBSYSTEM_COMMON_NTWK_MAC_SET (1)
-#define SUBSYSTEM_COMMON_NTWK_MULTICAST_SET (1)
-#define SUBSYSTEM_COMMON_NTWK_VLAN_CONFIG (1)
-#define SUBSYSTEM_COMMON_NTWK_LINK_STATUS_QUERY (1)
-#define SUBSYSTEM_COMMON_READ_FLASHROM (1)
-#define SUBSYSTEM_COMMON_WRITE_FLASHROM (1)
-#define SUBSYSTEM_COMMON_QUERY_MAX_FWCMD_BUFFER_SIZE (1)
-#define SUBSYSTEM_COMMON_ADD_PAGE_TABLES (1)
-#define SUBSYSTEM_COMMON_REMOVE_PAGE_TABLES (1)
-#define SUBSYSTEM_COMMON_RING_DESTROY (1)
-#define SUBSYSTEM_COMMON_CQ_CREATE (1)
-#define SUBSYSTEM_COMMON_EQ_CREATE (1)
-#define SUBSYSTEM_COMMON_ETH_RX_CREATE (1)
-#define SUBSYSTEM_COMMON_ETH_TX_CREATE (1)
-#define SUBSYSTEM_COMMON_ISCSI_DEFQ_CREATE (1)
-#define SUBSYSTEM_COMMON_ISCSI_WRBQ_CREATE (1)
-#define SUBSYSTEM_COMMON_MCC_CREATE (1)
-#define SUBSYSTEM_COMMON_JELL_CONFIG (1)
-#define SUBSYSTEM_COMMON_FORCE_FAILOVER (1)
-#define SUBSYSTEM_COMMON_ADD_TEMPLATE_HEADER_BUFFERS (1)
-#define SUBSYSTEM_COMMON_REMOVE_TEMPLATE_HEADER_BUFFERS (1)
-#define SUBSYSTEM_COMMON_POST_ZERO_BUFFER (1)
-#define SUBSYSTEM_COMMON_GET_QOS (1)
-#define SUBSYSTEM_COMMON_SET_QOS (1)
-#define SUBSYSTEM_COMMON_TCP_GET_STATISTICS (1)
-#define SUBSYSTEM_COMMON_SEEPROM_READ (1)
-#define SUBSYSTEM_COMMON_TCP_STATE_QUERY (1)
-#define SUBSYSTEM_COMMON_GET_CNTL_ATTRIBUTES (1)
-#define SUBSYSTEM_COMMON_NOP (1)
-#define SUBSYSTEM_COMMON_NTWK_RX_FILTER (1)
-#define SUBSYSTEM_COMMON_GET_FW_VERSION (1)
-#define SUBSYSTEM_COMMON_SET_FLOW_CONTROL (1)
-#define SUBSYSTEM_COMMON_GET_FLOW_CONTROL (1)
-#define SUBSYSTEM_COMMON_SET_TCP_PARAMETERS (1)
-#define SUBSYSTEM_COMMON_SET_FRAME_SIZE (1)
-#define SUBSYSTEM_COMMON_GET_FAT (1)
-#define SUBSYSTEM_COMMON_MODIFY_EQ_DELAY (1)
-#define SUBSYSTEM_COMMON_FIRMWARE_CONFIG (1)
-#define SUBSYSTEM_COMMON_ENABLE_DISABLE_DOMAINS (1)
-#define SUBSYSTEM_COMMON_GET_DOMAIN_CONFIG (1)
-#define SUBSYSTEM_COMMON_SET_VLD_CONFIG (1)
-#define SUBSYSTEM_COMMON_GET_VLD_CONFIG (1)
-#define SUBSYSTEM_COMMON_GET_PORT_EQUALIZATION (1)
-#define SUBSYSTEM_COMMON_SET_PORT_EQUALIZATION (1)
-#define SUBSYSTEM_COMMON_RED_CONFIG (1)
-#define OPCODE_COMMON_NTWK_MAC_SET (2)
-#define OPCODE_COMMON_NTWK_MULTICAST_SET (3)
-#define OPCODE_COMMON_NTWK_VLAN_CONFIG (4)
-#define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY (5)
-#define OPCODE_COMMON_READ_FLASHROM (6)
-#define OPCODE_COMMON_WRITE_FLASHROM (7)
-#define OPCODE_COMMON_QUERY_MAX_FWCMD_BUFFER_SIZE (8)
-#define OPCODE_COMMON_ADD_PAGE_TABLES (9)
-#define OPCODE_COMMON_REMOVE_PAGE_TABLES (10)
-#define OPCODE_COMMON_RING_DESTROY (11)
-#define OPCODE_COMMON_CQ_CREATE (12)
-#define OPCODE_COMMON_EQ_CREATE (13)
-#define OPCODE_COMMON_ETH_RX_CREATE (14)
-#define OPCODE_COMMON_ETH_TX_CREATE (15)
-#define OPCODE_COMMON_NET_RESERVED0 (16) /* Reserved */
-#define OPCODE_COMMON_NET_RESERVED1 (17) /* Reserved */
-#define OPCODE_COMMON_NET_RESERVED2 (18) /* Reserved */
-#define OPCODE_COMMON_ISCSI_DEFQ_CREATE (19)
-#define OPCODE_COMMON_ISCSI_WRBQ_CREATE (20)
-#define OPCODE_COMMON_MCC_CREATE (21)
-#define OPCODE_COMMON_JELL_CONFIG (22)
-#define OPCODE_COMMON_FORCE_FAILOVER (23)
-#define OPCODE_COMMON_ADD_TEMPLATE_HEADER_BUFFERS (24)
-#define OPCODE_COMMON_REMOVE_TEMPLATE_HEADER_BUFFERS (25)
-#define OPCODE_COMMON_POST_ZERO_BUFFER (26)
-#define OPCODE_COMMON_GET_QOS (27)
-#define OPCODE_COMMON_SET_QOS (28)
-#define OPCODE_COMMON_TCP_GET_STATISTICS (29)
-#define OPCODE_COMMON_SEEPROM_READ (30)
-#define OPCODE_COMMON_TCP_STATE_QUERY (31)
-#define OPCODE_COMMON_GET_CNTL_ATTRIBUTES (32)
-#define OPCODE_COMMON_NOP (33)
-#define OPCODE_COMMON_NTWK_RX_FILTER (34)
-#define OPCODE_COMMON_GET_FW_VERSION (35)
-#define OPCODE_COMMON_SET_FLOW_CONTROL (36)
-#define OPCODE_COMMON_GET_FLOW_CONTROL (37)
-#define OPCODE_COMMON_SET_TCP_PARAMETERS (38)
-#define OPCODE_COMMON_SET_FRAME_SIZE (39)
-#define OPCODE_COMMON_GET_FAT (40)
-#define OPCODE_COMMON_MODIFY_EQ_DELAY (41)
-#define OPCODE_COMMON_FIRMWARE_CONFIG (42)
-#define OPCODE_COMMON_ENABLE_DISABLE_DOMAINS (43)
-#define OPCODE_COMMON_GET_DOMAIN_CONFIG (44)
-#define OPCODE_COMMON_SET_VLD_CONFIG (45)
-#define OPCODE_COMMON_GET_VLD_CONFIG (46)
-#define OPCODE_COMMON_GET_PORT_EQUALIZATION (47)
-#define OPCODE_COMMON_SET_PORT_EQUALIZATION (48)
-#define OPCODE_COMMON_RED_CONFIG (49)
-
-
-
-/*
- * --- ETH_SUBSYSTEM_OPCODES ---
- * These opcodes are used for configuring the Ethernet interfaces. These
- * opcodes all use the FWCMD_SUBSYSTEM_ETH subsystem code.
- */
-#define OPCODE_ETH_RSS_CONFIG (1)
-#define OPCODE_ETH_ACPI_CONFIG (2)
-#define SUBSYSTEM_ETH_RSS_CONFIG (3)
-#define SUBSYSTEM_ETH_ACPI_CONFIG (3)
-#define OPCODE_ETH_PROMISCUOUS (3)
-#define SUBSYSTEM_ETH_PROMISCUOUS (3)
-#define SUBSYSTEM_ETH_GET_STATISTICS (3)
-#define SUBSYSTEM_ETH_GET_RX_FRAG_SIZE (3)
-#define SUBSYSTEM_ETH_SET_RX_FRAG_SIZE (3)
-#define OPCODE_ETH_GET_STATISTICS (4)
-#define OPCODE_ETH_GET_RX_FRAG_SIZE (5)
-#define OPCODE_ETH_SET_RX_FRAG_SIZE (6)
-
-
-
-
-
-/*
- * --- MCC_STATUS_CODE ---
- * These are the global status codes used by all subsystems
- */
-#define MCC_STATUS_SUCCESS (0) /* Indicates a successful
- completion of the command */
-#define MCC_STATUS_INSUFFICIENT_PRIVILEGES (1) /* The client does not have
- sufficient privileges to
- execute the command */
-#define MCC_STATUS_INVALID_PARAMETER (2) /* A parameter in the command
- was invalid. The extended
- status contains the index
- of the parameter */
-#define MCC_STATUS_INSUFFICIENT_RESOURCES (3) /* There are insufficient
- chip resources to execute
- the command */
-#define MCC_STATUS_QUEUE_FLUSHING (4) /* The command is completing
- because the queue was
- getting flushed */
-#define MCC_STATUS_DMA_FAILED (5) /* The command is completing
- with a DMA error */
-
-/*
- * --- MGMT_ERROR_CODES ---
- * Error Codes returned in the status field of the FWCMD response header
- */
-#define MGMT_STATUS_SUCCESS (0) /* The FWCMD completed
- without errors */
-#define MGMT_STATUS_FAILED (1) /* Error status in the Status
- field of the
- struct FWCMD_RESPONSE_HEADER */
-#define MGMT_STATUS_ILLEGAL_REQUEST (2) /* Invalid FWCMD opcode */
-#define MGMT_STATUS_ILLEGAL_FIELD (3) /* Invalid parameter in
- the FWCMD payload */
-
-#endif /* __fwcmd_opcodes_amap_h__ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * Autogenerated by srcgen version: 0127
- */
-#ifndef __fwcmd_types_bmap_h__
-#define __fwcmd_types_bmap_h__
-
-/* MAC address format */
-struct MAC_ADDRESS_FORMAT {
- u16 SizeOfStructure;
- u8 MACAddress[6];
-} __packed;
-
-#endif /* __fwcmd_types_bmap_h__ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * Autogenerated by srcgen version: 0127
- */
-#ifndef __host_struct_amap_h__
-#define __host_struct_amap_h__
-#include "be_cm.h"
-#include "be_common.h"
-#include "descriptors.h"
-
-/* --- EQ_COMPLETION_MAJOR_CODE_ENUM --- */
-#define EQ_MAJOR_CODE_COMPLETION (0) /* Completion event on a */
- /* qcompletion ueue. */
-#define EQ_MAJOR_CODE_ETH (1) /* Affiliated Ethernet Event. */
-#define EQ_MAJOR_CODE_RESERVED (2) /* Reserved */
-#define EQ_MAJOR_CODE_RDMA (3) /* Affiliated RDMA Event. */
-#define EQ_MAJOR_CODE_ISCSI (4) /* Affiliated ISCSI Event */
-#define EQ_MAJOR_CODE_UNAFFILIATED (5) /* Unaffiliated Event */
-
-/* --- EQ_COMPLETION_MINOR_CODE_ENUM --- */
-#define EQ_MINOR_CODE_COMPLETION (0) /* Completion event on a */
- /* completion queue. */
-#define EQ_MINOR_CODE_OTHER (1) /* Other Event (TBD). */
-
-/* Queue Entry Definition for all 4 byte event queue types. */
-struct BE_EQ_ENTRY_AMAP {
- u8 Valid; /* DWORD 0 */
- u8 MajorCode[3]; /* DWORD 0 */
- u8 MinorCode[12]; /* DWORD 0 */
- u8 ResourceID[16]; /* DWORD 0 */
-} __packed;
-struct EQ_ENTRY_AMAP {
- u32 dw[1];
-};
-
-/*
- * --- ETH_EVENT_CODE ---
- * These codes are returned by the MPU when one of these events has occurred,
- * and the event is configured to report to an Event Queue when an event
- * is detected.
- */
-#define ETH_EQ_LINK_STATUS (0) /* Link status change event */
- /* detected. */
-#define ETH_EQ_WATERMARK (1) /* watermark event detected. */
-#define ETH_EQ_MAGIC_PKT (2) /* magic pkt event detected. */
-#define ETH_EQ_ACPI_PKT0 (3) /* ACPI interesting packet */
- /* detected. */
-#define ETH_EQ_ACPI_PKT1 (3) /* ACPI interesting packet */
- /* detected. */
-#define ETH_EQ_ACPI_PKT2 (3) /* ACPI interesting packet */
- /* detected. */
-#define ETH_EQ_ACPI_PKT3 (3) /* ACPI interesting packet */
- /* detected. */
-
-/*
- * --- ETH_TX_COMPL_STATUS_ENUM ---
- * Status codes contained in Ethernet TX completion descriptors.
- */
-#define ETH_COMP_VALID (0)
-#define ETH_COMP_ERROR (1)
-#define ETH_COMP_INVALID (15)
-
-/*
- * --- ETH_TX_COMPL_PORT_ENUM ---
- * Port indicator contained in Ethernet TX completion descriptors.
- */
-#define ETH_COMP_PORT0 (0)
-#define ETH_COMP_PORT1 (1)
-#define ETH_COMP_MGMT (2)
-
-/*
- * --- ETH_TX_COMPL_CT_ENUM ---
- * Completion type indicator contained in Ethernet TX completion descriptors.
- */
-#define ETH_COMP_ETH (0)
-
-/*
- * Work request block that the driver issues to the chip for
- * Ethernet transmissions. All control fields must be valid in each WRB for
- * a message. The controller, as specified by the flags, optionally writes
- * an entry to the Completion Ring and generate an event.
- */
-struct BE_ETH_WRB_AMAP {
- u8 frag_pa_hi[32]; /* DWORD 0 */
- u8 frag_pa_lo[32]; /* DWORD 1 */
- u8 complete; /* DWORD 2 */
- u8 event; /* DWORD 2 */
- u8 crc; /* DWORD 2 */
- u8 forward; /* DWORD 2 */
- u8 ipsec; /* DWORD 2 */
- u8 mgmt; /* DWORD 2 */
- u8 ipcs; /* DWORD 2 */
- u8 udpcs; /* DWORD 2 */
- u8 tcpcs; /* DWORD 2 */
- u8 lso; /* DWORD 2 */
- u8 last; /* DWORD 2 */
- u8 vlan; /* DWORD 2 */
- u8 dbg[3]; /* DWORD 2 */
- u8 hash_val[3]; /* DWORD 2 */
- u8 lso_mss[14]; /* DWORD 2 */
- u8 frag_len[16]; /* DWORD 3 */
- u8 vlan_tag[16]; /* DWORD 3 */
-} __packed;
-struct ETH_WRB_AMAP {
- u32 dw[4];
-};
-
-/* This is an Ethernet transmit completion descriptor */
-struct BE_ETH_TX_COMPL_AMAP {
- u8 user_bytes[16]; /* DWORD 0 */
- u8 nwh_bytes[8]; /* DWORD 0 */
- u8 lso; /* DWORD 0 */
- u8 rsvd0[7]; /* DWORD 0 */
- u8 wrb_index[16]; /* DWORD 1 */
- u8 ct[2]; /* DWORD 1 */
- u8 port[2]; /* DWORD 1 */
- u8 rsvd1[8]; /* DWORD 1 */
- u8 status[4]; /* DWORD 1 */
- u8 rsvd2[16]; /* DWORD 2 */
- u8 ringid[11]; /* DWORD 2 */
- u8 hash_val[4]; /* DWORD 2 */
- u8 valid; /* DWORD 2 */
- u8 rsvd3[32]; /* DWORD 3 */
-} __packed;
-struct ETH_TX_COMPL_AMAP {
- u32 dw[4];
-};
-
-/* Ethernet Receive Buffer descriptor */
-struct BE_ETH_RX_D_AMAP {
- u8 fragpa_hi[32]; /* DWORD 0 */
- u8 fragpa_lo[32]; /* DWORD 1 */
-} __packed;
-struct ETH_RX_D_AMAP {
- u32 dw[2];
-};
-
-/* This is an Ethernet Receive Completion Descriptor */
-struct BE_ETH_RX_COMPL_AMAP {
- u8 vlan_tag[16]; /* DWORD 0 */
- u8 pktsize[14]; /* DWORD 0 */
- u8 port; /* DWORD 0 */
- u8 rsvd0; /* DWORD 0 */
- u8 err; /* DWORD 1 */
- u8 rsshp; /* DWORD 1 */
- u8 ipf; /* DWORD 1 */
- u8 tcpf; /* DWORD 1 */
- u8 udpf; /* DWORD 1 */
- u8 ipcksm; /* DWORD 1 */
- u8 tcpcksm; /* DWORD 1 */
- u8 udpcksm; /* DWORD 1 */
- u8 macdst[6]; /* DWORD 1 */
- u8 vtp; /* DWORD 1 */
- u8 vtm; /* DWORD 1 */
- u8 fragndx[10]; /* DWORD 1 */
- u8 ct[2]; /* DWORD 1 */
- u8 ipsec; /* DWORD 1 */
- u8 numfrags[3]; /* DWORD 1 */
- u8 rsvd1[31]; /* DWORD 2 */
- u8 valid; /* DWORD 2 */
- u8 rsshash[32]; /* DWORD 3 */
-} __packed;
-struct ETH_RX_COMPL_AMAP {
- u32 dw[4];
-};
-
-#endif /* __host_struct_amap_h__ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-#ifndef __hwlib_h__
-#define __hwlib_h__
-
-#include <linux/module.h>
-#include <linux/io.h>
-#include <linux/list.h>
-#include <linux/spinlock.h>
-
-#include "regmap.h" /* srcgen array map output */
-
-#include "asyncmesg.h"
-#include "fwcmd_opcodes.h"
-#include "post_codes.h"
-#include "fwcmd_mcc.h"
-
-#include "fwcmd_types_bmap.h"
-#include "fwcmd_common_bmap.h"
-#include "fwcmd_eth_bmap.h"
-#include "bestatus.h"
-/*
- *
- * Macros for reading/writing a protection domain or CSR registers
- * in BladeEngine.
- */
-#define PD_READ(fo, field) ioread32((fo)->db_va + \
- offsetof(struct BE_PROTECTION_DOMAIN_DBMAP_AMAP, field)/8)
-
-#define PD_WRITE(fo, field, val) iowrite32(val, (fo)->db_va + \
- offsetof(struct BE_PROTECTION_DOMAIN_DBMAP_AMAP, field)/8)
-
-#define CSR_READ(fo, field) ioread32((fo)->csr_va + \
- offsetof(struct BE_BLADE_ENGINE_CSRMAP_AMAP, field)/8)
-
-#define CSR_WRITE(fo, field, val) iowrite32(val, (fo)->csr_va + \
- offsetof(struct BE_BLADE_ENGINE_CSRMAP_AMAP, field)/8)
-
-#define PCICFG0_READ(fo, field) ioread32((fo)->pci_va + \
- offsetof(struct BE_PCICFG0_CSRMAP_AMAP, field)/8)
-
-#define PCICFG0_WRITE(fo, field, val) iowrite32(val, (fo)->pci_va + \
- offsetof(struct BE_PCICFG0_CSRMAP_AMAP, field)/8)
-
-#define PCICFG1_READ(fo, field) ioread32((fo)->pci_va + \
- offsetof(struct BE_PCICFG1_CSRMAP_AMAP, field)/8)
-
-#define PCICFG1_WRITE(fo, field, val) iowrite32(val, (fo)->pci_va + \
- offsetof(struct BE_PCICFG1_CSRMAP_AMAP, field)/8)
-
-#ifdef BE_DEBUG
-#define ASSERT(c) BUG_ON(!(c));
-#else
-#define ASSERT(c)
-#endif
-
-/* debug levels */
-enum BE_DEBUG_LEVELS {
- DL_ALWAYS = 0, /* cannot be masked */
- DL_ERR = 0x1, /* errors that should never happen */
- DL_WARN = 0x2, /* something questionable.
- recoverable errors */
- DL_NOTE = 0x4, /* infrequent, important debug info */
- DL_INFO = 0x8, /* debug information */
- DL_VERBOSE = 0x10, /* detailed info, such as buffer traces */
- BE_DL_MIN_VALUE = 0x1, /* this is the min value used */
- BE_DL_MAX_VALUE = 0x80 /* this is the higheset value used */
-} ;
-
-extern unsigned int trace_level;
-
-#define TRACE(lm, fmt, args...) { \
- if (trace_level & lm) { \
- printk(KERN_NOTICE "BE: %s:%d \n" fmt, \
- __FILE__ , __LINE__ , ## args); \
- } \
- }
-
-static inline unsigned int be_trace_set_level(unsigned int level)
-{
- unsigned int old_level = trace_level;
- trace_level = level;
- return old_level;
-}
-
-#define be_trace_get_level() trace_level
-/*
- * Returns number of pages spanned by the size of data
- * starting at the given address.
- */
-#define PAGES_SPANNED(_address, _size) \
- ((u32)((((size_t)(_address) & (PAGE_SIZE - 1)) + \
- (_size) + (PAGE_SIZE - 1)) >> PAGE_SHIFT))
-/* Byte offset into the page corresponding to given address */
-#define OFFSET_IN_PAGE(_addr_) ((size_t)(_addr_) & (PAGE_SIZE-1))
-
-/*
- * circular subtract.
- * Returns a - b assuming a circular number system, where a and b are
- * in range (0, maxValue-1). If a==b, zero is returned so the
- * highest value possible with this subtraction is maxValue-1.
- */
-static inline u32 be_subc(u32 a, u32 b, u32 max)
-{
- ASSERT(a <= max && b <= max);
- ASSERT(max > 0);
- return a >= b ? (a - b) : (max - b + a);
-}
-
-static inline u32 be_addc(u32 a, u32 b, u32 max)
-{
- ASSERT(a < max);
- ASSERT(max > 0);
- return (max - a > b) ? (a + b) : (b + a - max);
-}
-
-/* descriptor for a physically contiguous memory used for ring */
-struct ring_desc {
- u32 length; /* length in bytes */
- void *va; /* virtual address */
- u64 pa; /* bus address */
-} ;
-
-/*
- * This structure stores information about a ring shared between hardware
- * and software. Each ring is allocated by the driver in the uncached
- * extension and mapped into BladeEngine's unified table.
- */
-struct mp_ring {
- u32 pages; /* queue size in pages */
- u32 id; /* queue id assigned by beklib */
- u32 num; /* number of elements in queue */
- u32 cidx; /* consumer index */
- u32 pidx; /* producer index -- not used by most rings */
- u32 itemSize; /* size in bytes of one object */
-
- void *va; /* The virtual address of the ring.
- This should be last to allow 32 & 64
- bit debugger extensions to work. */
-} ;
-
-/*----------- amap bit filed get / set macros and functions -----*/
-/*
- * Structures defined in the map header files (under fw/amap/) with names
- * in the format BE_<name>_AMAP are pseudo structures with members
- * of type u8. These structures are templates that are used in
- * conjuntion with the structures with names in the format
- * <name>_AMAP to calculate the bit masks and bit offsets to get or set
- * bit fields in structures. The structures <name>_AMAP are arrays
- * of 32 bits words and have the correct size. The following macros
- * provide convenient ways to get and set the various members
- * in the structures without using strucctures with bit fields.
- * Always use the macros AMAP_GET_BITS_PTR and AMAP_SET_BITS_PTR
- * macros to extract and set various members.
- */
-
-/*
- * Returns the a bit mask for the register that is NOT shifted into location.
- * That means return values always look like: 0x1, 0xFF, 0x7FF, etc...
- */
-static inline u32 amap_mask(u32 bit_size)
-{
- return bit_size == 32 ? 0xFFFFFFFF : (1 << bit_size) - 1;
-}
-
-#define AMAP_BIT_MASK(_struct_, field) \
- amap_mask(AMAP_BIT_SIZE(_struct_, field))
-
-/*
- * non-optimized set bits function. First clears the bits and then assigns them.
- * This does not require knowledge of the particular DWORD you are setting.
- * e.g. AMAP_SET_BITS_PTR (struct, field1, &contextMemory, 123);
- */
-static inline void
-amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
-{
- u32 *dw = (u32 *)ptr;
- *(dw + dw_offset) &= ~(mask << offset);
- *(dw + dw_offset) |= (mask & value) << offset;
-}
-
-#define AMAP_SET_BITS_PTR(_struct_, field, _structPtr_, val) \
- amap_set(_structPtr_, AMAP_WORD_OFFSET(_struct_, field),\
- AMAP_BIT_MASK(_struct_, field), \
- AMAP_BIT_OFFSET(_struct_, field), val)
-/*
- * Non-optimized routine that gets the bits without knowing the correct DWORD.
- * e.g. fieldValue = AMAP_GET_BITS_PTR (struct, field1, &contextMemory);
- */
-static inline u32
-amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
-{
- u32 *dw = (u32 *)ptr;
- return mask & (*(dw + dw_offset) >> offset);
-}
-#define AMAP_GET_BITS_PTR(_struct_, field, _structPtr_) \
- amap_get(_structPtr_, AMAP_WORD_OFFSET(_struct_, field), \
- AMAP_BIT_MASK(_struct_, field), \
- AMAP_BIT_OFFSET(_struct_, field))
-
-/* Returns 0-31 representing bit offset within a DWORD of a bitfield. */
-#define AMAP_BIT_OFFSET(_struct_, field) \
- (offsetof(struct BE_ ## _struct_ ## _AMAP, field) % 32)
-
-/* Returns 0-n representing DWORD offset of bitfield within the structure. */
-#define AMAP_WORD_OFFSET(_struct_, field) \
- (offsetof(struct BE_ ## _struct_ ## _AMAP, field)/32)
-
-/* Returns size of bitfield in bits. */
-#define AMAP_BIT_SIZE(_struct_, field) \
- sizeof(((struct BE_ ## _struct_ ## _AMAP*)0)->field)
-
-struct be_mcc_wrb_response_copy {
- u16 length; /* bytes in response */
- u16 fwcmd_offset; /* offset within the wrb of the response */
- void *va; /* user's va to copy response into */
-
-} ;
-typedef void (*mcc_wrb_cqe_callback) (void *context, int status,
- struct MCC_WRB_AMAP *optional_wrb);
-struct be_mcc_wrb_context {
-
- mcc_wrb_cqe_callback internal_cb; /* Function to call on
- completion */
- void *internal_cb_context; /* Parameter to pass
- to completion function */
-
- mcc_wrb_cqe_callback cb; /* Function to call on completion */
- void *cb_context; /* Parameter to pass to completion function */
-
- int *users_final_status; /* pointer to a local
- variable for synchronous
- commands */
- struct MCC_WRB_AMAP *wrb; /* pointer to original wrb for embedded
- commands only */
- struct list_head next; /* links context structs together in
- free list */
-
- struct be_mcc_wrb_response_copy copy; /* Optional parameters to copy
- embedded response to user's va */
-
-#if defined(BE_DEBUG)
- u16 subsystem, opcode; /* Track this FWCMD for debug builds. */
- struct MCC_WRB_AMAP *ring_wrb;
- u32 consumed_count;
-#endif
-} ;
-
-/*
- Represents a function object for network or storage. This
- is used to manage per-function resources like MCC CQs, etc.
-*/
-struct be_function_object {
-
- u32 magic; /*!< magic for detecting memory corruption. */
-
- /* PCI BAR mapped addresses */
- u8 __iomem *csr_va; /* CSR */
- u8 __iomem *db_va; /* Door Bell */
- u8 __iomem *pci_va; /* PCI config space */
- u32 emulate; /* if set, MPU is not available.
- Emulate everything. */
- u32 pend_queue_driving; /* if set, drive the queued WRBs
- after releasing the WRB lock */
-
- spinlock_t post_lock; /* lock for verifying one thread posting wrbs */
- spinlock_t cq_lock; /* lock for verifying one thread
- processing cq */
- spinlock_t mcc_context_lock; /* lock for protecting mcc
- context free list */
- unsigned long post_irq;
- unsigned long cq_irq;
-
- u32 type;
- u32 pci_function_number;
-
- struct be_mcc_object *mcc; /* mcc rings. */
-
- struct {
- struct MCC_MAILBOX_AMAP *va; /* VA to the mailbox */
- u64 pa; /* PA to the mailbox */
- u32 length; /* byte length of mailbox */
-
- /* One default context struct used for posting at
- * least one MCC_WRB
- */
- struct be_mcc_wrb_context default_context;
- bool default_context_allocated;
- } mailbox;
-
- struct {
-
- /* Wake on lans configured. */
- u32 wol_bitmask; /* bits 0,1,2,3 are set if
- corresponding index is enabled */
- } config;
-
-
- struct BE_FIRMWARE_CONFIG fw_config;
-} ;
-
-/*
- Represents an Event Queue
-*/
-struct be_eq_object {
- u32 magic;
- atomic_t ref_count;
-
- struct be_function_object *parent_function;
-
- struct list_head eq_list;
- struct list_head cq_list_head;
-
- u32 eq_id;
- void *cb_context;
-
-} ;
-
-/*
- Manages a completion queue
-*/
-struct be_cq_object {
- u32 magic;
- atomic_t ref_count;
-
- struct be_function_object *parent_function;
- struct be_eq_object *eq_object;
-
- struct list_head cq_list;
- struct list_head cqlist_for_eq;
-
- void *va;
- u32 num_entries;
-
- void *cb_context;
-
- u32 cq_id;
-
-} ;
-
-/*
- Manages an ethernet send queue
-*/
-struct be_ethsq_object {
- u32 magic;
-
- struct list_head list;
-
- struct be_function_object *parent_function;
- struct be_cq_object *cq_object;
- u32 bid;
-
-} ;
-
-/*
-@brief
- Manages an ethernet receive queue
-*/
-struct be_ethrq_object {
- u32 magic;
- struct list_head list;
- struct be_function_object *parent_function;
- u32 rid;
- struct be_cq_object *cq_object;
- struct be_cq_object *rss_cq_object[4];
-
-} ;
-
-/*
- Manages an MCC
-*/
-typedef void (*mcc_async_event_callback) (void *context, u32 event_code,
- void *event);
-struct be_mcc_object {
- u32 magic;
-
- struct be_function_object *parent_function;
- struct list_head mcc_list;
-
- struct be_cq_object *cq_object;
-
- /* Async event callback for MCC CQ. */
- mcc_async_event_callback async_cb;
- void *async_context;
-
- struct {
- struct be_mcc_wrb_context *base;
- u32 num;
- struct list_head list_head;
- } wrb_context;
-
- struct {
- struct ring_desc *rd;
- struct mp_ring ring;
- } sq;
-
- struct {
- struct mp_ring ring;
- } cq;
-
- u32 processing; /* flag indicating that one thread
- is processing CQ */
- u32 rearm; /* doorbell rearm setting to make
- sure the active processing thread */
- /* rearms the CQ if any of the threads requested it. */
-
- struct list_head backlog;
- u32 backlog_length;
- u32 driving_backlog;
- u32 consumed_index;
-
-} ;
-
-
-/* Queue context header -- the required software information for
- * queueing a WRB.
- */
-struct be_queue_driver_context {
- mcc_wrb_cqe_callback internal_cb; /* Function to call on
- completion */
- void *internal_cb_context; /* Parameter to pass
- to completion function */
-
- mcc_wrb_cqe_callback cb; /* Function to call on completion */
- void *cb_context; /* Parameter to pass to completion function */
-
- struct be_mcc_wrb_response_copy copy; /* Optional parameters to copy
- embedded response to user's va */
- void *optional_fwcmd_va;
- struct list_head list;
- u32 bytes;
-} ;
-
-/*
- * Common MCC WRB header that all commands require.
- */
-struct be_mcc_wrb_header {
- u8 rsvd[offsetof(struct BE_MCC_WRB_AMAP, payload)/8];
-} ;
-
-/*
- * All non embedded commands supported by hwlib functions only allow
- * 1 SGE. This queue context handles them all.
- */
-struct be_nonembedded_q_ctxt {
- struct be_queue_driver_context context;
- struct be_mcc_wrb_header wrb_header;
- struct MCC_SGE_AMAP sge[1];
-} ;
-
-/*
- * ------------------------------------------------------------------------
- * This section contains the specific queue struct for each command.
- * The user could always provide a be_generic_q_ctxt but this is a
- * rather large struct. By using the specific struct, memory consumption
- * can be reduced.
- * ------------------------------------------------------------------------
- */
-
-struct be_link_status_q_ctxt {
- struct be_queue_driver_context context;
- struct be_mcc_wrb_header wrb_header;
- struct FWCMD_COMMON_NTWK_LINK_STATUS_QUERY fwcmd;
-} ;
-
-struct be_multicast_q_ctxt {
- struct be_queue_driver_context context;
- struct be_mcc_wrb_header wrb_header;
- struct FWCMD_COMMON_NTWK_MULTICAST_SET fwcmd;
-} ;
-
-
-struct be_vlan_q_ctxt {
- struct be_queue_driver_context context;
- struct be_mcc_wrb_header wrb_header;
- struct FWCMD_COMMON_NTWK_VLAN_CONFIG fwcmd;
-} ;
-
-struct be_promiscuous_q_ctxt {
- struct be_queue_driver_context context;
- struct be_mcc_wrb_header wrb_header;
- struct FWCMD_ETH_PROMISCUOUS fwcmd;
-} ;
-
-struct be_force_failover_q_ctxt {
- struct be_queue_driver_context context;
- struct be_mcc_wrb_header wrb_header;
- struct FWCMD_COMMON_FORCE_FAILOVER fwcmd;
-} ;
-
-
-struct be_rxf_filter_q_ctxt {
- struct be_queue_driver_context context;
- struct be_mcc_wrb_header wrb_header;
- struct FWCMD_COMMON_NTWK_RX_FILTER fwcmd;
-} ;
-
-struct be_eq_modify_delay_q_ctxt {
- struct be_queue_driver_context context;
- struct be_mcc_wrb_header wrb_header;
- struct FWCMD_COMMON_MODIFY_EQ_DELAY fwcmd;
-} ;
-
-/*
- * The generic context is the largest size that would be required.
- * It is the software context plus an entire WRB.
- */
-struct be_generic_q_ctxt {
- struct be_queue_driver_context context;
- struct be_mcc_wrb_header wrb_header;
- struct MCC_WRB_PAYLOAD_AMAP payload;
-} ;
-
-/*
- * Types for the BE_QUEUE_CONTEXT object.
- */
-#define BE_QUEUE_INVALID (0)
-#define BE_QUEUE_LINK_STATUS (0xA006)
-#define BE_QUEUE_ETH_STATS (0xA007)
-#define BE_QUEUE_TPM_STATS (0xA008)
-#define BE_QUEUE_TCP_STATS (0xA009)
-#define BE_QUEUE_MULTICAST (0xA00A)
-#define BE_QUEUE_VLAN (0xA00B)
-#define BE_QUEUE_RSS (0xA00C)
-#define BE_QUEUE_FORCE_FAILOVER (0xA00D)
-#define BE_QUEUE_PROMISCUOUS (0xA00E)
-#define BE_QUEUE_WAKE_ON_LAN (0xA00F)
-#define BE_QUEUE_NOP (0xA010)
-
-/* --- BE_FUNCTION_ENUM --- */
-#define BE_FUNCTION_TYPE_ISCSI (0)
-#define BE_FUNCTION_TYPE_NETWORK (1)
-#define BE_FUNCTION_TYPE_ARM (2)
-
-/* --- BE_ETH_TX_RING_TYPE_ENUM --- */
-#define BE_ETH_TX_RING_TYPE_FORWARDING (1) /* Ether ring for forwarding */
-#define BE_ETH_TX_RING_TYPE_STANDARD (2) /* Ether ring for sending */
- /* network packets. */
-#define BE_ETH_TX_RING_TYPE_BOUND (3) /* Ethernet ring for sending */
- /* network packets, bound */
- /* to a physical port. */
-/*
- * ----------------------------------------------------------------------
- * API MACROS
- * ----------------------------------------------------------------------
- */
-#define BE_FWCMD_NAME(_short_name_) struct FWCMD_##_short_name_
-#define BE_OPCODE_NAME(_short_name_) OPCODE_##_short_name_
-#define BE_SUBSYSTEM_NAME(_short_name_) SUBSYSTEM_##_short_name_
-
-
-#define BE_PREPARE_EMBEDDED_FWCMD(_pfob_, _wrb_, _short_name_) \
- ((BE_FWCMD_NAME(_short_name_) *) \
- be_function_prepare_embedded_fwcmd(_pfob_, _wrb_, \
- sizeof(BE_FWCMD_NAME(_short_name_)), \
- FIELD_SIZEOF(BE_FWCMD_NAME(_short_name_), params.request), \
- FIELD_SIZEOF(BE_FWCMD_NAME(_short_name_), params.response), \
- BE_OPCODE_NAME(_short_name_), \
- BE_SUBSYSTEM_NAME(_short_name_)));
-
-#define BE_PREPARE_NONEMBEDDED_FWCMD(_pfob_, _wrb_, _iva_, _ipa_, _short_name_)\
- ((BE_FWCMD_NAME(_short_name_) *) \
- be_function_prepare_nonembedded_fwcmd(_pfob_, _wrb_, (_iva_), (_ipa_), \
- sizeof(BE_FWCMD_NAME(_short_name_)), \
- FIELD_SIZEOF(BE_FWCMD_NAME(_short_name_), params.request), \
- FIELD_SIZEOF(BE_FWCMD_NAME(_short_name_), params.response), \
- BE_OPCODE_NAME(_short_name_), \
- BE_SUBSYSTEM_NAME(_short_name_)));
-
-int be_function_object_create(u8 __iomem *csr_va, u8 __iomem *db_va,
- u8 __iomem *pci_va, u32 function_type, struct ring_desc *mailbox_rd,
- struct be_function_object *pfob);
-
-int be_function_object_destroy(struct be_function_object *pfob);
-int be_function_cleanup(struct be_function_object *pfob);
-
-
-int be_function_get_fw_version(struct be_function_object *pfob,
- struct FWCMD_COMMON_GET_FW_VERSION_RESPONSE_PAYLOAD *fw_version,
- mcc_wrb_cqe_callback cb, void *cb_context);
-
-
-int be_eq_modify_delay(struct be_function_object *pfob,
- u32 num_eq, struct be_eq_object **eq_array,
- u32 *eq_delay_array, mcc_wrb_cqe_callback cb,
- void *cb_context,
- struct be_eq_modify_delay_q_ctxt *q_ctxt);
-
-
-
-int be_eq_create(struct be_function_object *pfob,
- struct ring_desc *rd, u32 eqe_size, u32 num_entries,
- u32 watermark, u32 timer_delay, struct be_eq_object *eq_object);
-
-int be_eq_destroy(struct be_eq_object *eq);
-
-int be_cq_create(struct be_function_object *pfob,
- struct ring_desc *rd, u32 length,
- bool solicited_eventable, bool no_delay,
- u32 wm_thresh, struct be_eq_object *eq_object,
- struct be_cq_object *cq_object);
-
-int be_cq_destroy(struct be_cq_object *cq);
-
-int be_mcc_ring_create(struct be_function_object *pfob,
- struct ring_desc *rd, u32 length,
- struct be_mcc_wrb_context *context_array,
- u32 num_context_entries,
- struct be_cq_object *cq, struct be_mcc_object *mcc);
-int be_mcc_ring_destroy(struct be_mcc_object *mcc_object);
-
-int be_mcc_process_cq(struct be_mcc_object *mcc_object, bool rearm);
-
-int be_mcc_add_async_event_callback(struct be_mcc_object *mcc_object,
- mcc_async_event_callback cb, void *cb_context);
-
-int be_pci_soft_reset(struct be_function_object *pfob);
-
-
-int be_drive_POST(struct be_function_object *pfob);
-
-
-int be_eth_sq_create(struct be_function_object *pfob,
- struct ring_desc *rd, u32 length_in_bytes,
- u32 type, u32 ulp, struct be_cq_object *cq_object,
- struct be_ethsq_object *eth_sq);
-
-struct be_eth_sq_parameters {
- u32 port;
- u32 rsvd0[2];
-} ;
-
-int be_eth_sq_create_ex(struct be_function_object *pfob,
- struct ring_desc *rd, u32 length_in_bytes,
- u32 type, u32 ulp, struct be_cq_object *cq_object,
- struct be_eth_sq_parameters *ex_parameters,
- struct be_ethsq_object *eth_sq);
-int be_eth_sq_destroy(struct be_ethsq_object *eth_sq);
-
-int be_eth_set_flow_control(struct be_function_object *pfob,
- bool txfc_enable, bool rxfc_enable);
-
-int be_eth_get_flow_control(struct be_function_object *pfob,
- bool *txfc_enable, bool *rxfc_enable);
-int be_eth_set_qos(struct be_function_object *pfob, u32 max_bps, u32 max_pps);
-
-int be_eth_get_qos(struct be_function_object *pfob, u32 *max_bps, u32 *max_pps);
-
-int be_eth_set_frame_size(struct be_function_object *pfob,
- u32 *tx_frame_size, u32 *rx_frame_size);
-
-int be_eth_rq_create(struct be_function_object *pfob,
- struct ring_desc *rd, struct be_cq_object *cq_object,
- struct be_cq_object *bcmc_cq_object,
- struct be_ethrq_object *eth_rq);
-
-int be_eth_rq_destroy(struct be_ethrq_object *eth_rq);
-
-int be_eth_rq_destroy_options(struct be_ethrq_object *eth_rq, bool flush,
- mcc_wrb_cqe_callback cb, void *cb_context);
-int be_eth_rq_set_frag_size(struct be_function_object *pfob,
- u32 new_frag_size_bytes, u32 *actual_frag_size_bytes);
-int be_eth_rq_get_frag_size(struct be_function_object *pfob,
- u32 *frag_size_bytes);
-
-void *be_function_prepare_embedded_fwcmd(struct be_function_object *pfob,
- struct MCC_WRB_AMAP *wrb,
- u32 payload_length, u32 request_length,
- u32 response_length, u32 opcode, u32 subsystem);
-void *be_function_prepare_nonembedded_fwcmd(struct be_function_object *pfob,
- struct MCC_WRB_AMAP *wrb, void *fwcmd_header_va, u64 fwcmd_header_pa,
- u32 payload_length, u32 request_length, u32 response_length,
- u32 opcode, u32 subsystem);
-
-
-struct MCC_WRB_AMAP *
-be_function_peek_mcc_wrb(struct be_function_object *pfob);
-
-int be_rxf_mac_address_read_write(struct be_function_object *pfob,
- bool port1, bool mac1, bool mgmt,
- bool write, bool permanent, u8 *mac_address,
- mcc_wrb_cqe_callback cb,
- void *cb_context);
-
-int be_rxf_multicast_config(struct be_function_object *pfob,
- bool promiscuous, u32 num, u8 *mac_table,
- mcc_wrb_cqe_callback cb,
- void *cb_context,
- struct be_multicast_q_ctxt *q_ctxt);
-
-int be_rxf_vlan_config(struct be_function_object *pfob,
- bool promiscuous, u32 num, u16 *vlan_tag_array,
- mcc_wrb_cqe_callback cb, void *cb_context,
- struct be_vlan_q_ctxt *q_ctxt);
-
-
-int be_rxf_link_status(struct be_function_object *pfob,
- struct BE_LINK_STATUS *link_status,
- mcc_wrb_cqe_callback cb,
- void *cb_context,
- struct be_link_status_q_ctxt *q_ctxt);
-
-
-int be_rxf_query_eth_statistics(struct be_function_object *pfob,
- struct FWCMD_ETH_GET_STATISTICS *va_for_fwcmd,
- u64 pa_for_fwcmd, mcc_wrb_cqe_callback cb,
- void *cb_context,
- struct be_nonembedded_q_ctxt *q_ctxt);
-
-int be_rxf_promiscuous(struct be_function_object *pfob,
- bool enable_port0, bool enable_port1,
- mcc_wrb_cqe_callback cb, void *cb_context,
- struct be_promiscuous_q_ctxt *q_ctxt);
-
-
-int be_rxf_filter_config(struct be_function_object *pfob,
- struct NTWK_RX_FILTER_SETTINGS *settings,
- mcc_wrb_cqe_callback cb,
- void *cb_context,
- struct be_rxf_filter_q_ctxt *q_ctxt);
-
-/*
- * ------------------------------------------------------
- * internal functions used by hwlib
- * ------------------------------------------------------
- */
-
-
-int be_function_ring_destroy(struct be_function_object *pfob,
- u32 id, u32 ring_type, mcc_wrb_cqe_callback cb,
- void *cb_context,
- mcc_wrb_cqe_callback internal_cb,
- void *internal_callback_context);
-
-int be_function_post_mcc_wrb(struct be_function_object *pfob,
- struct MCC_WRB_AMAP *wrb,
- struct be_generic_q_ctxt *q_ctxt,
- mcc_wrb_cqe_callback cb, void *cb_context,
- mcc_wrb_cqe_callback internal_cb,
- void *internal_cb_context, void *optional_fwcmd_va,
- struct be_mcc_wrb_response_copy *response_copy);
-
-int be_function_queue_mcc_wrb(struct be_function_object *pfob,
- struct be_generic_q_ctxt *q_ctxt);
-
-/*
- * ------------------------------------------------------
- * MCC QUEUE
- * ------------------------------------------------------
- */
-
-int be_mpu_init_mailbox(struct be_function_object *pfob, struct ring_desc *rd);
-
-
-struct MCC_WRB_AMAP *
-_be_mpu_peek_ring_wrb(struct be_mcc_object *mcc, bool driving_queue);
-
-struct be_mcc_wrb_context *
-_be_mcc_allocate_wrb_context(struct be_function_object *pfob);
-
-void _be_mcc_free_wrb_context(struct be_function_object *pfob,
- struct be_mcc_wrb_context *context);
-
-int _be_mpu_post_wrb_mailbox(struct be_function_object *pfob,
- struct MCC_WRB_AMAP *wrb, struct be_mcc_wrb_context *wrb_context);
-
-int _be_mpu_post_wrb_ring(struct be_mcc_object *mcc,
- struct MCC_WRB_AMAP *wrb, struct be_mcc_wrb_context *wrb_context);
-
-void be_drive_mcc_wrb_queue(struct be_mcc_object *mcc);
-
-
-/*
- * ------------------------------------------------------
- * Ring Sizes
- * ------------------------------------------------------
- */
-static inline u32 be_ring_encoding_to_length(u32 encoding, u32 object_size)
-{
-
- ASSERT(encoding != 1); /* 1 is rsvd */
- ASSERT(encoding < 16);
- ASSERT(object_size > 0);
-
- if (encoding == 0) /* 32k deep */
- encoding = 16;
-
- return (1 << (encoding - 1)) * object_size;
-}
-
-static inline
-u32 be_ring_length_to_encoding(u32 length_in_bytes, u32 object_size)
-{
-
- u32 count, encoding;
-
- ASSERT(object_size > 0);
- ASSERT(length_in_bytes % object_size == 0);
-
- count = length_in_bytes / object_size;
-
- ASSERT(count > 1);
- ASSERT(count <= 32 * 1024);
- ASSERT(length_in_bytes <= 8 * PAGE_SIZE); /* max ring size in UT */
-
- encoding = __ilog2_u32(count) + 1;
-
- if (encoding == 16)
- encoding = 0; /* 32k deep */
-
- return encoding;
-}
-
-void be_rd_to_pa_list(struct ring_desc *rd, struct PHYS_ADDR *pa_list,
- u32 max_num);
-#endif /* __hwlib_h__ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-#include <linux/delay.h>
-#include "hwlib.h"
-#include "bestatus.h"
-
-static
-inline void mp_ring_create(struct mp_ring *ring, u32 num, u32 size, void *va)
-{
- ASSERT(ring);
- memset(ring, 0, sizeof(struct mp_ring));
- ring->num = num;
- ring->pages = DIV_ROUND_UP(num * size, PAGE_SIZE);
- ring->itemSize = size;
- ring->va = va;
-}
-
-/*
- * -----------------------------------------------------------------------
- * Interface for 2 index rings. i.e. consumer/producer rings
- * --------------------------------------------------------------------------
- */
-
-/* Returns number items pending on ring. */
-static inline u32 mp_ring_num_pending(struct mp_ring *ring)
-{
- ASSERT(ring);
- if (ring->num == 0)
- return 0;
- return be_subc(ring->pidx, ring->cidx, ring->num);
-}
-
-/* Returns number items free on ring. */
-static inline u32 mp_ring_num_empty(struct mp_ring *ring)
-{
- ASSERT(ring);
- return ring->num - 1 - mp_ring_num_pending(ring);
-}
-
-/* Consume 1 item */
-static inline void mp_ring_consume(struct mp_ring *ring)
-{
- ASSERT(ring);
- ASSERT(ring->pidx != ring->cidx);
-
- ring->cidx = be_addc(ring->cidx, 1, ring->num);
-}
-
-/* Produce 1 item */
-static inline void mp_ring_produce(struct mp_ring *ring)
-{
- ASSERT(ring);
- ring->pidx = be_addc(ring->pidx, 1, ring->num);
-}
-
-/* Consume count items */
-static inline void mp_ring_consume_multiple(struct mp_ring *ring, u32 count)
-{
- ASSERT(ring);
- ASSERT(mp_ring_num_pending(ring) >= count);
- ring->cidx = be_addc(ring->cidx, count, ring->num);
-}
-
-static inline void *mp_ring_item(struct mp_ring *ring, u32 index)
-{
- ASSERT(ring);
- ASSERT(index < ring->num);
- ASSERT(ring->itemSize > 0);
- return (u8 *) ring->va + index * ring->itemSize;
-}
-
-/* Ptr to produce item */
-static inline void *mp_ring_producer_ptr(struct mp_ring *ring)
-{
- ASSERT(ring);
- return mp_ring_item(ring, ring->pidx);
-}
-
-/*
- * Returns a pointer to the current location in the ring.
- * This is used for rings with 1 index.
- */
-static inline void *mp_ring_current(struct mp_ring *ring)
-{
- ASSERT(ring);
- ASSERT(ring->pidx == 0); /* not used */
-
- return mp_ring_item(ring, ring->cidx);
-}
-
-/*
- * Increment index for rings with only 1 index.
- * This is used for rings with 1 index.
- */
-static inline void *mp_ring_next(struct mp_ring *ring)
-{
- ASSERT(ring);
- ASSERT(ring->num > 0);
- ASSERT(ring->pidx == 0); /* not used */
-
- ring->cidx = be_addc(ring->cidx, 1, ring->num);
- return mp_ring_current(ring);
-}
-
-/*
- This routine waits for a previously posted mailbox WRB to be completed.
- Specifically it waits for the mailbox to say that it's ready to accept
- more data by setting the LSB of the mailbox pd register to 1.
-
- pcontroller - The function object to post this data to
-
- IRQL < DISPATCH_LEVEL
-*/
-static void be_mcc_mailbox_wait(struct be_function_object *pfob)
-{
- struct MPU_MAILBOX_DB_AMAP mailbox_db;
- u32 i = 0;
- u32 ready;
-
- if (pfob->emulate) {
- /* No waiting for mailbox in emulated mode. */
- return;
- }
-
- mailbox_db.dw[0] = PD_READ(pfob, mcc_bootstrap_db);
- ready = AMAP_GET_BITS_PTR(MPU_MAILBOX_DB, ready, &mailbox_db);
-
- while (ready == false) {
- if ((++i & 0x3FFFF) == 0) {
- TRACE(DL_WARN, "Waiting for mailbox ready - %dk polls",
- i / 1000);
- }
- udelay(1);
- mailbox_db.dw[0] = PD_READ(pfob, mcc_bootstrap_db);
- ready = AMAP_GET_BITS_PTR(MPU_MAILBOX_DB, ready, &mailbox_db);
- }
-}
-
-/*
- This routine tells the MCC mailbox that there is data to processed
- in the mailbox. It does this by setting the physical address for the
- mailbox location and clearing the LSB. This routine returns immediately
- and does not wait for the WRB to be processed.
-
- pcontroller - The function object to post this data to
-
- IRQL < DISPATCH_LEVEL
-
-*/
-static void be_mcc_mailbox_notify(struct be_function_object *pfob)
-{
- struct MPU_MAILBOX_DB_AMAP mailbox_db;
- u32 pa;
-
- ASSERT(pfob->mailbox.pa);
- ASSERT(pfob->mailbox.va);
-
- /* If emulated, do not ring the mailbox */
- if (pfob->emulate) {
- TRACE(DL_WARN, "MPU disabled. Skipping mailbox notify.");
- return;
- }
-
- /* form the higher bits in the address */
- mailbox_db.dw[0] = 0; /* init */
- AMAP_SET_BITS_PTR(MPU_MAILBOX_DB, hi, &mailbox_db, 1);
- AMAP_SET_BITS_PTR(MPU_MAILBOX_DB, ready, &mailbox_db, 0);
-
- /* bits 34 to 63 */
- pa = (u32) (pfob->mailbox.pa >> 34);
- AMAP_SET_BITS_PTR(MPU_MAILBOX_DB, address, &mailbox_db, pa);
-
- /* Wait for the MPU to be ready */
- be_mcc_mailbox_wait(pfob);
-
- /* Ring doorbell 1st time */
- PD_WRITE(pfob, mcc_bootstrap_db, mailbox_db.dw[0]);
-
- /* Wait for 1st write to be acknowledged. */
- be_mcc_mailbox_wait(pfob);
-
- /* lower bits 30 bits from 4th bit (bits 4 to 33)*/
- pa = (u32) (pfob->mailbox.pa >> 4) & 0x3FFFFFFF;
-
- AMAP_SET_BITS_PTR(MPU_MAILBOX_DB, hi, &mailbox_db, 0);
- AMAP_SET_BITS_PTR(MPU_MAILBOX_DB, ready, &mailbox_db, 0);
- AMAP_SET_BITS_PTR(MPU_MAILBOX_DB, address, &mailbox_db, pa);
-
- /* Ring doorbell 2nd time */
- PD_WRITE(pfob, mcc_bootstrap_db, mailbox_db.dw[0]);
-}
-
-/*
- This routine tells the MCC mailbox that there is data to processed
- in the mailbox. It does this by setting the physical address for the
- mailbox location and clearing the LSB. This routine spins until the
- MPU writes a 1 into the LSB indicating that the data has been received
- and is ready to be processed.
-
- pcontroller - The function object to post this data to
-
- IRQL < DISPATCH_LEVEL
-*/
-static void
-be_mcc_mailbox_notify_and_wait(struct be_function_object *pfob)
-{
- /*
- * Notify it
- */
- be_mcc_mailbox_notify(pfob);
- /*
- * Now wait for completion of WRB
- */
- be_mcc_mailbox_wait(pfob);
-}
-
-void
-be_mcc_process_cqe(struct be_function_object *pfob,
- struct MCC_CQ_ENTRY_AMAP *cqe)
-{
- struct be_mcc_wrb_context *wrb_context = NULL;
- u32 offset, status;
- u8 *p;
-
- ASSERT(cqe);
- /*
- * A command completed. Commands complete out-of-order.
- * Determine which command completed from the TAG.
- */
- offset = offsetof(struct BE_MCC_CQ_ENTRY_AMAP, mcc_tag)/8;
- p = (u8 *) cqe + offset;
- wrb_context = (struct be_mcc_wrb_context *)(void *)(size_t)(*(u64 *)p);
- ASSERT(wrb_context);
-
- /*
- * Perform a response copy if requested.
- * Only copy data if the FWCMD is successful.
- */
- status = AMAP_GET_BITS_PTR(MCC_CQ_ENTRY, completion_status, cqe);
- if (status == MGMT_STATUS_SUCCESS && wrb_context->copy.length > 0) {
- ASSERT(wrb_context->wrb);
- ASSERT(wrb_context->copy.va);
- p = (u8 *)wrb_context->wrb +
- offsetof(struct BE_MCC_WRB_AMAP, payload)/8;
- memcpy(wrb_context->copy.va,
- (u8 *)p + wrb_context->copy.fwcmd_offset,
- wrb_context->copy.length);
- }
-
- if (status)
- status = BE_NOT_OK;
- /* internal callback */
- if (wrb_context->internal_cb) {
- wrb_context->internal_cb(wrb_context->internal_cb_context,
- status, wrb_context->wrb);
- }
-
- /* callback */
- if (wrb_context->cb) {
- wrb_context->cb(wrb_context->cb_context,
- status, wrb_context->wrb);
- }
- /* Free the context structure */
- _be_mcc_free_wrb_context(pfob, wrb_context);
-}
-
-void be_drive_mcc_wrb_queue(struct be_mcc_object *mcc)
-{
- struct be_function_object *pfob = NULL;
- int status = BE_PENDING;
- struct be_generic_q_ctxt *q_ctxt;
- struct MCC_WRB_AMAP *wrb;
- struct MCC_WRB_AMAP *queue_wrb;
- u32 length, payload_length, sge_count, embedded;
- unsigned long irql;
-
- BUILD_BUG_ON((sizeof(struct be_generic_q_ctxt) <
- sizeof(struct be_queue_driver_context) +
- sizeof(struct MCC_WRB_AMAP)));
- pfob = mcc->parent_function;
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- if (mcc->driving_backlog) {
- spin_unlock_irqrestore(&pfob->post_lock, irql);
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return;
- }
- /* Acquire the flag to limit 1 thread to redrive posts. */
- mcc->driving_backlog = 1;
-
- while (!list_empty(&mcc->backlog)) {
- wrb = _be_mpu_peek_ring_wrb(mcc, true); /* Driving the queue */
- if (!wrb)
- break; /* No space in the ring yet. */
- /* Get the next queued entry to process. */
- q_ctxt = list_first_entry(&mcc->backlog,
- struct be_generic_q_ctxt, context.list);
- list_del(&q_ctxt->context.list);
- pfob->mcc->backlog_length--;
- /*
- * Compute the required length of the WRB.
- * Since the queue element may be smaller than
- * the complete WRB, copy only the required number of bytes.
- */
- queue_wrb = (struct MCC_WRB_AMAP *) &q_ctxt->wrb_header;
- embedded = AMAP_GET_BITS_PTR(MCC_WRB, embedded, queue_wrb);
- if (embedded) {
- payload_length = AMAP_GET_BITS_PTR(MCC_WRB,
- payload_length, queue_wrb);
- length = sizeof(struct be_mcc_wrb_header) +
- payload_length;
- } else {
- sge_count = AMAP_GET_BITS_PTR(MCC_WRB, sge_count,
- queue_wrb);
- ASSERT(sge_count == 1); /* only 1 frag. */
- length = sizeof(struct be_mcc_wrb_header) +
- sge_count * sizeof(struct MCC_SGE_AMAP);
- }
-
- /*
- * Truncate the length based on the size of the
- * queue element. Some elements that have output parameters
- * can be smaller than the payload_length field would
- * indicate. We really only need to copy the request
- * parameters, not the response.
- */
- length = min(length, (u32) (q_ctxt->context.bytes -
- offsetof(struct be_generic_q_ctxt, wrb_header)));
-
- /* Copy the queue element WRB into the ring. */
- memcpy(wrb, &q_ctxt->wrb_header, length);
-
- /* Post the wrb. This should not fail assuming we have
- * enough context structs. */
- status = be_function_post_mcc_wrb(pfob, wrb, NULL,
- q_ctxt->context.cb, q_ctxt->context.cb_context,
- q_ctxt->context.internal_cb,
- q_ctxt->context.internal_cb_context,
- q_ctxt->context.optional_fwcmd_va,
- &q_ctxt->context.copy);
-
- if (status == BE_SUCCESS) {
- /*
- * Synchronous completion. Since it was queued,
- * we will invoke the callback.
- * To the user, this is an asynchronous request.
- */
- spin_unlock_irqrestore(&pfob->post_lock, irql);
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
-
- ASSERT(q_ctxt->context.cb);
-
- q_ctxt->context.cb(
- q_ctxt->context.cb_context,
- BE_SUCCESS, NULL);
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- } else if (status != BE_PENDING) {
- /*
- * Another resource failed. Should never happen
- * if we have sufficient MCC_WRB_CONTEXT structs.
- * Return to head of the queue.
- */
- TRACE(DL_WARN, "Failed to post a queued WRB. 0x%x",
- status);
- list_add(&q_ctxt->context.list, &mcc->backlog);
- pfob->mcc->backlog_length++;
- break;
- }
- }
-
- /* Free the flag to limit 1 thread to redrive posts. */
- mcc->driving_backlog = 0;
- spin_unlock_irqrestore(&pfob->post_lock, irql);
-}
-
-/* This function asserts that the WRB was consumed in order. */
-#ifdef BE_DEBUG
-u32 be_mcc_wrb_consumed_in_order(struct be_mcc_object *mcc,
- struct MCC_CQ_ENTRY_AMAP *cqe)
-{
- struct be_mcc_wrb_context *wrb_context = NULL;
- u32 wrb_index;
- u32 wrb_consumed_in_order;
- u32 offset;
- u8 *p;
-
- ASSERT(cqe);
- /*
- * A command completed. Commands complete out-of-order.
- * Determine which command completed from the TAG.
- */
- offset = offsetof(struct BE_MCC_CQ_ENTRY_AMAP, mcc_tag)/8;
- p = (u8 *) cqe + offset;
- wrb_context = (struct be_mcc_wrb_context *)(void *)(size_t)(*(u64 *)p);
-
- ASSERT(wrb_context);
-
- wrb_index = (u32) (((u64)(size_t)wrb_context->ring_wrb -
- (u64)(size_t)mcc->sq.ring.va) / sizeof(struct MCC_WRB_AMAP));
-
- ASSERT(wrb_index < mcc->sq.ring.num);
-
- wrb_consumed_in_order = (u32) (wrb_index == mcc->consumed_index);
- mcc->consumed_index = be_addc(mcc->consumed_index, 1, mcc->sq.ring.num);
- return wrb_consumed_in_order;
-}
-#endif
-
-int be_mcc_process_cq(struct be_mcc_object *mcc, bool rearm)
-{
- struct be_function_object *pfob = NULL;
- struct MCC_CQ_ENTRY_AMAP *cqe;
- struct CQ_DB_AMAP db;
- struct mp_ring *cq_ring = &mcc->cq.ring;
- struct mp_ring *mp_ring = &mcc->sq.ring;
- u32 num_processed = 0;
- u32 consumed = 0, valid, completed, cqe_consumed, async_event;
-
- pfob = mcc->parent_function;
-
- spin_lock_irqsave(&pfob->cq_lock, pfob->cq_irq);
-
- /*
- * Verify that only one thread is processing the CQ at once.
- * We cannot hold the lock while processing the CQ due to
- * the callbacks into the OS. Therefore, this flag is used
- * to control it. If any of the threads want to
- * rearm the CQ, we need to honor that.
- */
- if (mcc->processing != 0) {
- mcc->rearm = mcc->rearm || rearm;
- goto Error;
- } else {
- mcc->processing = 1; /* lock processing for this thread. */
- mcc->rearm = rearm; /* set our rearm setting */
- }
-
- spin_unlock_irqrestore(&pfob->cq_lock, pfob->cq_irq);
-
- cqe = mp_ring_current(cq_ring);
- valid = AMAP_GET_BITS_PTR(MCC_CQ_ENTRY, valid, cqe);
- while (valid) {
-
- if (num_processed >= 8) {
- /* coalesce doorbells, but free space in cq
- * ring while processing. */
- db.dw[0] = 0; /* clear */
- AMAP_SET_BITS_PTR(CQ_DB, qid, &db, cq_ring->id);
- AMAP_SET_BITS_PTR(CQ_DB, rearm, &db, false);
- AMAP_SET_BITS_PTR(CQ_DB, event, &db, false);
- AMAP_SET_BITS_PTR(CQ_DB, num_popped, &db,
- num_processed);
- num_processed = 0;
-
- PD_WRITE(pfob, cq_db, db.dw[0]);
- }
-
- async_event = AMAP_GET_BITS_PTR(MCC_CQ_ENTRY, async_event, cqe);
- if (async_event) {
- /* This is an asynchronous event. */
- struct ASYNC_EVENT_TRAILER_AMAP *async_trailer =
- (struct ASYNC_EVENT_TRAILER_AMAP *)
- ((u8 *) cqe + sizeof(struct MCC_CQ_ENTRY_AMAP) -
- sizeof(struct ASYNC_EVENT_TRAILER_AMAP));
- u32 event_code;
- async_event = AMAP_GET_BITS_PTR(ASYNC_EVENT_TRAILER,
- async_event, async_trailer);
- ASSERT(async_event == 1);
-
-
- valid = AMAP_GET_BITS_PTR(ASYNC_EVENT_TRAILER,
- valid, async_trailer);
- ASSERT(valid == 1);
-
- /* Call the async event handler if it is installed. */
- if (mcc->async_cb) {
- event_code =
- AMAP_GET_BITS_PTR(ASYNC_EVENT_TRAILER,
- event_code, async_trailer);
- mcc->async_cb(mcc->async_context,
- (u32) event_code, (void *) cqe);
- }
-
- } else {
- /* This is a completion entry. */
-
- /* No vm forwarding in this driver. */
-
- cqe_consumed = AMAP_GET_BITS_PTR(MCC_CQ_ENTRY,
- consumed, cqe);
- if (cqe_consumed) {
- /*
- * A command on the MCC ring was consumed.
- * Update the consumer index.
- * These occur in order.
- */
- ASSERT(be_mcc_wrb_consumed_in_order(mcc, cqe));
- consumed++;
- }
-
- completed = AMAP_GET_BITS_PTR(MCC_CQ_ENTRY,
- completed, cqe);
- if (completed) {
- /* A command completed. Use tag to
- * determine which command. */
- be_mcc_process_cqe(pfob, cqe);
- }
- }
-
- /* Reset the CQE */
- AMAP_SET_BITS_PTR(MCC_CQ_ENTRY, valid, cqe, false);
- num_processed++;
-
- /* Update our tracking for the CQ ring. */
- cqe = mp_ring_next(cq_ring);
- valid = AMAP_GET_BITS_PTR(MCC_CQ_ENTRY, valid, cqe);
- }
-
- TRACE(DL_INFO, "num_processed:0x%x, and consumed:0x%x",
- num_processed, consumed);
- /*
- * Grab the CQ lock to synchronize the "rearm" setting for
- * the doorbell, and for clearing the "processing" flag.
- */
- spin_lock_irqsave(&pfob->cq_lock, pfob->cq_irq);
-
- /*
- * Rearm the cq. This is done based on the global mcc->rearm
- * flag which combines the rearm parameter from the current
- * call to process_cq and any other threads
- * that tried to process the CQ while this one was active.
- * This handles the situation where a sync. fwcmd was processing
- * the CQ while the interrupt/dpc tries to process it.
- * The sync process gets to continue -- but it is now
- * responsible for the rearming.
- */
- if (num_processed > 0 || mcc->rearm == true) {
- db.dw[0] = 0; /* clear */
- AMAP_SET_BITS_PTR(CQ_DB, qid, &db, cq_ring->id);
- AMAP_SET_BITS_PTR(CQ_DB, rearm, &db, mcc->rearm);
- AMAP_SET_BITS_PTR(CQ_DB, event, &db, false);
- AMAP_SET_BITS_PTR(CQ_DB, num_popped, &db, num_processed);
-
- PD_WRITE(pfob, cq_db, db.dw[0]);
- }
- /*
- * Update the consumer index after ringing the CQ doorbell.
- * We don't want another thread to post more WRBs before we
- * have CQ space available.
- */
- mp_ring_consume_multiple(mp_ring, consumed);
-
- /* Clear the processing flag. */
- mcc->processing = 0;
-
-Error:
- spin_unlock_irqrestore(&pfob->cq_lock, pfob->cq_irq);
- /*
- * Use the local variable to detect if the current thread
- * holds the WRB post lock. If rearm is false, this is
- * either a synchronous command, or the upper layer driver is polling
- * from a thread. We do not drive the queue from that
- * context since the driver may hold the
- * wrb post lock already.
- */
- if (rearm)
- be_drive_mcc_wrb_queue(mcc);
- else
- pfob->pend_queue_driving = 1;
-
- return BE_SUCCESS;
-}
-
-/*
- *============================================================================
- * P U B L I C R O U T I N E S
- *============================================================================
- */
-
-/*
- This routine creates an MCC object. This object contains an MCC send queue
- and a CQ private to the MCC.
-
- pcontroller - Handle to a function object
-
- EqObject - EQ object that will be used to dispatch this MCC
-
- ppMccObject - Pointer to an internal Mcc Object returned.
-
- Returns BE_SUCCESS if successfull,, otherwise a useful error code
- is returned.
-
- IRQL < DISPATCH_LEVEL
-
-*/
-int
-be_mcc_ring_create(struct be_function_object *pfob,
- struct ring_desc *rd, u32 length,
- struct be_mcc_wrb_context *context_array,
- u32 num_context_entries,
- struct be_cq_object *cq, struct be_mcc_object *mcc)
-{
- int status = 0;
-
- struct FWCMD_COMMON_MCC_CREATE *fwcmd = NULL;
- struct MCC_WRB_AMAP *wrb = NULL;
- u32 num_entries_encoded, n, i;
- void *va = NULL;
- unsigned long irql;
-
- if (length < sizeof(struct MCC_WRB_AMAP) * 2) {
- TRACE(DL_ERR, "Invalid MCC ring length:%d", length);
- return BE_NOT_OK;
- }
- /*
- * Reduce the actual ring size to be less than the number
- * of context entries. This ensures that we run out of
- * ring WRBs first so the queuing works correctly. We never
- * queue based on context structs.
- */
- if (num_context_entries + 1 <
- length / sizeof(struct MCC_WRB_AMAP) - 1) {
-
- u32 max_length =
- (num_context_entries + 2) * sizeof(struct MCC_WRB_AMAP);
-
- if (is_power_of_2(max_length))
- length = __roundup_pow_of_two(max_length+1) / 2;
- else
- length = __roundup_pow_of_two(max_length) / 2;
-
- ASSERT(length <= max_length);
-
- TRACE(DL_WARN,
- "MCC ring length reduced based on context entries."
- " length:%d wrbs:%d context_entries:%d", length,
- (int) (length / sizeof(struct MCC_WRB_AMAP)),
- num_context_entries);
- }
-
- spin_lock_irqsave(&pfob->post_lock, irql);
-
- num_entries_encoded =
- be_ring_length_to_encoding(length, sizeof(struct MCC_WRB_AMAP));
-
- /* Init MCC object. */
- memset(mcc, 0, sizeof(*mcc));
- mcc->parent_function = pfob;
- mcc->cq_object = cq;
-
- INIT_LIST_HEAD(&mcc->backlog);
-
- wrb = be_function_peek_mcc_wrb(pfob);
- if (!wrb) {
- ASSERT(wrb);
- TRACE(DL_ERR, "No free MCC WRBs in create EQ.");
- status = BE_STATUS_NO_MCC_WRB;
- goto error;
- }
- /* Prepares an embedded fwcmd, including request/response sizes. */
- fwcmd = BE_PREPARE_EMBEDDED_FWCMD(pfob, wrb, COMMON_MCC_CREATE);
-
- fwcmd->params.request.num_pages = DIV_ROUND_UP(length, PAGE_SIZE);
- /*
- * Program MCC ring context
- */
- AMAP_SET_BITS_PTR(MCC_RING_CONTEXT, pdid,
- &fwcmd->params.request.context, 0);
- AMAP_SET_BITS_PTR(MCC_RING_CONTEXT, invalid,
- &fwcmd->params.request.context, false);
- AMAP_SET_BITS_PTR(MCC_RING_CONTEXT, ring_size,
- &fwcmd->params.request.context, num_entries_encoded);
-
- n = cq->cq_id;
- AMAP_SET_BITS_PTR(MCC_RING_CONTEXT,
- cq_id, &fwcmd->params.request.context, n);
- be_rd_to_pa_list(rd, fwcmd->params.request.pages,
- ARRAY_SIZE(fwcmd->params.request.pages));
- /* Post the f/w command */
- status = be_function_post_mcc_wrb(pfob, wrb, NULL, NULL, NULL,
- NULL, NULL, fwcmd, NULL);
- if (status != BE_SUCCESS) {
- TRACE(DL_ERR, "MCC to create CQ failed.");
- goto error;
- }
- /*
- * Create a linked list of context structures
- */
- mcc->wrb_context.base = context_array;
- mcc->wrb_context.num = num_context_entries;
- INIT_LIST_HEAD(&mcc->wrb_context.list_head);
- memset(context_array, 0,
- sizeof(struct be_mcc_wrb_context) * num_context_entries);
- for (i = 0; i < mcc->wrb_context.num; i++) {
- list_add_tail(&context_array[i].next,
- &mcc->wrb_context.list_head);
- }
-
- /*
- *
- * Create an mcc_ring for tracking WRB hw ring
- */
- va = rd->va;
- ASSERT(va);
- mp_ring_create(&mcc->sq.ring, length / sizeof(struct MCC_WRB_AMAP),
- sizeof(struct MCC_WRB_AMAP), va);
- mcc->sq.ring.id = fwcmd->params.response.id;
- /*
- * Init a mcc_ring for tracking the MCC CQ.
- */
- ASSERT(cq->va);
- mp_ring_create(&mcc->cq.ring, cq->num_entries,
- sizeof(struct MCC_CQ_ENTRY_AMAP), cq->va);
- mcc->cq.ring.id = cq->cq_id;
-
- /* Force zeroing of CQ. */
- memset(cq->va, 0, cq->num_entries * sizeof(struct MCC_CQ_ENTRY_AMAP));
-
- /* Initialize debug index. */
- mcc->consumed_index = 0;
-
- atomic_inc(&cq->ref_count);
- pfob->mcc = mcc;
-
- TRACE(DL_INFO, "MCC ring created. id:%d bytes:%d cq_id:%d cq_entries:%d"
- " num_context:%d", mcc->sq.ring.id, length,
- cq->cq_id, cq->num_entries, num_context_entries);
-
-error:
- spin_unlock_irqrestore(&pfob->post_lock, irql);
- if (pfob->pend_queue_driving && pfob->mcc) {
- pfob->pend_queue_driving = 0;
- be_drive_mcc_wrb_queue(pfob->mcc);
- }
- return status;
-}
-
-/*
- This routine destroys an MCC send queue
-
- MccObject - Internal Mcc Object to be destroyed.
-
- Returns BE_SUCCESS if successfull, otherwise an error code is returned.
-
- IRQL < DISPATCH_LEVEL
-
- The caller of this routine must ensure that no other WRB may be posted
- until this routine returns.
-
-*/
-int be_mcc_ring_destroy(struct be_mcc_object *mcc)
-{
- int status = 0;
- struct be_function_object *pfob = mcc->parent_function;
-
-
- ASSERT(mcc->processing == 0);
-
- /*
- * Remove the ring from the function object.
- * This transitions back to mailbox mode.
- */
- pfob->mcc = NULL;
-
- /* Send fwcmd to destroy the queue. (Using the mailbox.) */
- status = be_function_ring_destroy(mcc->parent_function, mcc->sq.ring.id,
- FWCMD_RING_TYPE_MCC, NULL, NULL, NULL, NULL);
- ASSERT(status == 0);
-
- /* Release the SQ reference to the CQ */
- atomic_dec(&mcc->cq_object->ref_count);
-
- return status;
-}
-
-static void
-mcc_wrb_sync_cb(void *context, int staus, struct MCC_WRB_AMAP *wrb)
-{
- struct be_mcc_wrb_context *wrb_context =
- (struct be_mcc_wrb_context *) context;
- ASSERT(wrb_context);
- *wrb_context->users_final_status = staus;
-}
-
-/*
- This routine posts a command to the MCC send queue
-
- mcc - Internal Mcc Object to be destroyed.
-
- wrb - wrb to post.
-
- Returns BE_SUCCESS if successfull, otherwise an error code is returned.
-
- IRQL < DISPATCH_LEVEL if CompletionCallback is not NULL
- IRQL <=DISPATCH_LEVEL if CompletionCallback is NULL
-
- If this routine is called with CompletionCallback != NULL the
- call is considered to be asynchronous and will return as soon
- as the WRB is posted to the MCC with BE_PENDING.
-
- If CompletionCallback is NULL, then this routine will not return until
- a completion for this MCC command has been processed.
- If called at DISPATCH_LEVEL the CompletionCallback must be NULL.
-
- This routine should only be called if the MPU has been boostraped past
- mailbox mode.
-
-
-*/
-int
-_be_mpu_post_wrb_ring(struct be_mcc_object *mcc, struct MCC_WRB_AMAP *wrb,
- struct be_mcc_wrb_context *wrb_context)
-{
-
- struct MCC_WRB_AMAP *ring_wrb = NULL;
- int status = BE_PENDING;
- int final_status = BE_PENDING;
- mcc_wrb_cqe_callback cb = NULL;
- struct MCC_DB_AMAP mcc_db;
- u32 embedded;
-
- ASSERT(mp_ring_num_empty(&mcc->sq.ring) > 0);
- /*
- * Input wrb is most likely the next wrb in the ring, since the client
- * can peek at the address.
- */
- ring_wrb = mp_ring_producer_ptr(&mcc->sq.ring);
- if (wrb != ring_wrb) {
- /* If not equal, copy it into the ring. */
- memcpy(ring_wrb, wrb, sizeof(struct MCC_WRB_AMAP));
- }
-#ifdef BE_DEBUG
- wrb_context->ring_wrb = ring_wrb;
-#endif
- embedded = AMAP_GET_BITS_PTR(MCC_WRB, embedded, ring_wrb);
- if (embedded) {
- /* embedded commands will have the response within the WRB. */
- wrb_context->wrb = ring_wrb;
- } else {
- /*
- * non-embedded commands will not have the response
- * within the WRB, and they may complete out-of-order.
- * The WRB will not be valid to inspect
- * during the completion.
- */
- wrb_context->wrb = NULL;
- }
- cb = wrb_context->cb;
-
- if (cb == NULL) {
- /* Assign our internal callback if this is a
- * synchronous call. */
- wrb_context->cb = mcc_wrb_sync_cb;
- wrb_context->cb_context = wrb_context;
- wrb_context->users_final_status = &final_status;
- }
- /* Increment producer index */
-
- mcc_db.dw[0] = 0; /* initialize */
- AMAP_SET_BITS_PTR(MCC_DB, rid, &mcc_db, mcc->sq.ring.id);
- AMAP_SET_BITS_PTR(MCC_DB, numPosted, &mcc_db, 1);
-
- mp_ring_produce(&mcc->sq.ring);
- PD_WRITE(mcc->parent_function, mpu_mcc_db, mcc_db.dw[0]);
- TRACE(DL_INFO, "pidx: %x and cidx: %x.", mcc->sq.ring.pidx,
- mcc->sq.ring.cidx);
-
- if (cb == NULL) {
- int polls = 0; /* At >= 1 us per poll */
- /* Wait until this command completes, polling the CQ. */
- do {
- TRACE(DL_INFO, "FWCMD submitted in the poll mode.");
- /* Do not rearm CQ in this context. */
- be_mcc_process_cq(mcc, false);
-
- if (final_status == BE_PENDING) {
- if ((++polls & 0x7FFFF) == 0) {
- TRACE(DL_WARN,
- "Warning : polling MCC CQ for %d"
- "ms.", polls / 1000);
- }
-
- udelay(1);
- }
-
- /* final_status changed when the command completes */
- } while (final_status == BE_PENDING);
-
- status = final_status;
- }
-
- return status;
-}
-
-struct MCC_WRB_AMAP *
-_be_mpu_peek_ring_wrb(struct be_mcc_object *mcc, bool driving_queue)
-{
- /* If we have queued items, do not allow a post to bypass the queue. */
- if (!driving_queue && !list_empty(&mcc->backlog))
- return NULL;
-
- if (mp_ring_num_empty(&mcc->sq.ring) <= 0)
- return NULL;
- return (struct MCC_WRB_AMAP *) mp_ring_producer_ptr(&mcc->sq.ring);
-}
-
-int
-be_mpu_init_mailbox(struct be_function_object *pfob, struct ring_desc *mailbox)
-{
- ASSERT(mailbox);
- pfob->mailbox.va = mailbox->va;
- pfob->mailbox.pa = cpu_to_le64(mailbox->pa);
- pfob->mailbox.length = mailbox->length;
-
- ASSERT(((u32)(size_t)pfob->mailbox.va & 0xf) == 0);
- ASSERT(((u32)(size_t)pfob->mailbox.pa & 0xf) == 0);
- /*
- * Issue the WRB to set MPU endianness
- */
- {
- u64 *endian_check = (u64 *) (pfob->mailbox.va +
- offsetof(struct BE_MCC_MAILBOX_AMAP, wrb)/8);
- *endian_check = 0xFF1234FFFF5678FFULL;
- }
-
- be_mcc_mailbox_notify_and_wait(pfob);
-
- return BE_SUCCESS;
-}
-
-
-/*
- This routine posts a command to the MCC mailbox.
-
- FuncObj - Function Object to post the WRB on behalf of.
- wrb - wrb to post.
- CompletionCallback - Address of a callback routine to invoke once the WRB
- is completed.
- CompletionCallbackContext - Opaque context to be passed during the call to
- the CompletionCallback.
- Returns BE_SUCCESS if successfull, otherwise an error code is returned.
-
- IRQL <=DISPATCH_LEVEL if CompletionCallback is NULL
-
- This routine will block until a completion for this MCC command has been
- processed. If called at DISPATCH_LEVEL the CompletionCallback must be NULL.
-
- This routine should only be called if the MPU has not been boostraped past
- mailbox mode.
-*/
-int
-_be_mpu_post_wrb_mailbox(struct be_function_object *pfob,
- struct MCC_WRB_AMAP *wrb, struct be_mcc_wrb_context *wrb_context)
-{
- struct MCC_MAILBOX_AMAP *mailbox = NULL;
- struct MCC_WRB_AMAP *mb_wrb;
- struct MCC_CQ_ENTRY_AMAP *mb_cq;
- u32 offset, status;
-
- ASSERT(pfob->mcc == NULL);
- mailbox = pfob->mailbox.va;
- ASSERT(mailbox);
-
- offset = offsetof(struct BE_MCC_MAILBOX_AMAP, wrb)/8;
- mb_wrb = (struct MCC_WRB_AMAP *) (u8 *)mailbox + offset;
- if (mb_wrb != wrb) {
- memset(mailbox, 0, sizeof(*mailbox));
- memcpy(mb_wrb, wrb, sizeof(struct MCC_WRB_AMAP));
- }
- /* The callback can inspect the final WRB to get output parameters. */
- wrb_context->wrb = mb_wrb;
-
- be_mcc_mailbox_notify_and_wait(pfob);
-
- /* A command completed. Use tag to determine which command. */
- offset = offsetof(struct BE_MCC_MAILBOX_AMAP, cq)/8;
- mb_cq = (struct MCC_CQ_ENTRY_AMAP *) ((u8 *)mailbox + offset);
- be_mcc_process_cqe(pfob, mb_cq);
-
- status = AMAP_GET_BITS_PTR(MCC_CQ_ENTRY, completion_status, mb_cq);
- if (status)
- status = BE_NOT_OK;
- return status;
-}
-
-struct be_mcc_wrb_context *
-_be_mcc_allocate_wrb_context(struct be_function_object *pfob)
-{
- struct be_mcc_wrb_context *context = NULL;
- unsigned long irq;
-
- spin_lock_irqsave(&pfob->mcc_context_lock, irq);
-
- if (!pfob->mailbox.default_context_allocated) {
- /* Use the single default context that we
- * always have allocated. */
- pfob->mailbox.default_context_allocated = true;
- context = &pfob->mailbox.default_context;
- } else if (pfob->mcc) {
- /* Get a context from the free list. If any are available. */
- if (!list_empty(&pfob->mcc->wrb_context.list_head)) {
- context = list_first_entry(
- &pfob->mcc->wrb_context.list_head,
- struct be_mcc_wrb_context, next);
- }
- }
-
- spin_unlock_irqrestore(&pfob->mcc_context_lock, irq);
-
- return context;
-}
-
-void
-_be_mcc_free_wrb_context(struct be_function_object *pfob,
- struct be_mcc_wrb_context *context)
-{
- unsigned long irq;
-
- ASSERT(context);
- /*
- * Zero during free to try and catch any bugs where the context
- * is accessed after a free.
- */
- memset(context, 0, sizeof(context));
-
- spin_lock_irqsave(&pfob->mcc_context_lock, irq);
-
- if (context == &pfob->mailbox.default_context) {
- /* Free the default context. */
- ASSERT(pfob->mailbox.default_context_allocated);
- pfob->mailbox.default_context_allocated = false;
- } else {
- /* Add to free list. */
- ASSERT(pfob->mcc);
- list_add_tail(&context->next,
- &pfob->mcc->wrb_context.list_head);
- }
-
- spin_unlock_irqrestore(&pfob->mcc_context_lock, irq);
-}
-
-int
-be_mcc_add_async_event_callback(struct be_mcc_object *mcc_object,
- mcc_async_event_callback cb, void *cb_context)
-{
- /* Lock against anyone trying to change the callback/context pointers
- * while being used. */
- spin_lock_irqsave(&mcc_object->parent_function->cq_lock,
- mcc_object->parent_function->cq_irq);
-
- /* Assign the async callback. */
- mcc_object->async_context = cb_context;
- mcc_object->async_cb = cb;
-
- spin_unlock_irqrestore(&mcc_object->parent_function->cq_lock,
- mcc_object->parent_function->cq_irq);
-
- return BE_SUCCESS;
-}
-
-#define MPU_EP_CONTROL 0
-#define MPU_EP_SEMAPHORE 0xac
-
-/*
- *-------------------------------------------------------------------
- * Function: be_wait_for_POST_complete
- * Waits until the BladeEngine POST completes (either in error or success).
- * pfob -
- * return status - BE_SUCCESS (0) on success. Negative error code on failure.
- *-------------------------------------------------------------------
- */
-static int be_wait_for_POST_complete(struct be_function_object *pfob)
-{
- struct MGMT_HBA_POST_STATUS_STRUCT_AMAP status;
- int s;
- u32 post_error, post_stage;
-
- const u32 us_per_loop = 1000; /* 1000us */
- const u32 print_frequency_loops = 1000000 / us_per_loop;
- const u32 max_loops = 60 * print_frequency_loops;
- u32 loops = 0;
-
- /*
- * Wait for arm fw indicating it is done or a fatal error happened.
- * Note: POST can take some time to complete depending on configuration
- * settings (consider ARM attempts to acquire an IP address
- * over DHCP!!!).
- *
- */
- do {
- status.dw[0] = ioread32(pfob->csr_va + MPU_EP_SEMAPHORE);
- post_error = AMAP_GET_BITS_PTR(MGMT_HBA_POST_STATUS_STRUCT,
- error, &status);
- post_stage = AMAP_GET_BITS_PTR(MGMT_HBA_POST_STATUS_STRUCT,
- stage, &status);
- if (0 == (loops % print_frequency_loops)) {
- /* Print current status */
- TRACE(DL_INFO, "POST status = 0x%x (stage = 0x%x)",
- status.dw[0], post_stage);
- }
- udelay(us_per_loop);
- } while ((post_error != 1) &&
- (post_stage != POST_STAGE_ARMFW_READY) &&
- (++loops < max_loops));
-
- if (post_error == 1) {
- TRACE(DL_ERR, "POST error! Status = 0x%x (stage = 0x%x)",
- status.dw[0], post_stage);
- s = BE_NOT_OK;
- } else if (post_stage != POST_STAGE_ARMFW_READY) {
- TRACE(DL_ERR, "POST time-out! Status = 0x%x (stage = 0x%x)",
- status.dw[0], post_stage);
- s = BE_NOT_OK;
- } else {
- s = BE_SUCCESS;
- }
- return s;
-}
-
-/*
- *-------------------------------------------------------------------
- * Function: be_kickoff_and_wait_for_POST
- * Interacts with the BladeEngine management processor to initiate POST, and
- * subsequently waits until POST completes (either in error or success).
- * The caller must acquire the reset semaphore before initiating POST
- * to prevent multiple drivers interacting with the management processor.
- * Once POST is complete the caller must release the reset semaphore.
- * Callers who only want to wait for POST complete may call
- * be_wait_for_POST_complete.
- * pfob -
- * return status - BE_SUCCESS (0) on success. Negative error code on failure.
- *-------------------------------------------------------------------
- */
-static int
-be_kickoff_and_wait_for_POST(struct be_function_object *pfob)
-{
- struct MGMT_HBA_POST_STATUS_STRUCT_AMAP status;
- int s;
-
- const u32 us_per_loop = 1000; /* 1000us */
- const u32 print_frequency_loops = 1000000 / us_per_loop;
- const u32 max_loops = 5 * print_frequency_loops;
- u32 loops = 0;
- u32 post_error, post_stage;
-
- /* Wait for arm fw awaiting host ready or a fatal error happened. */
- TRACE(DL_INFO, "Wait for BladeEngine ready to POST");
- do {
- status.dw[0] = ioread32(pfob->csr_va + MPU_EP_SEMAPHORE);
- post_error = AMAP_GET_BITS_PTR(MGMT_HBA_POST_STATUS_STRUCT,
- error, &status);
- post_stage = AMAP_GET_BITS_PTR(MGMT_HBA_POST_STATUS_STRUCT,
- stage, &status);
- if (0 == (loops % print_frequency_loops)) {
- /* Print current status */
- TRACE(DL_INFO, "POST status = 0x%x (stage = 0x%x)",
- status.dw[0], post_stage);
- }
- udelay(us_per_loop);
- } while ((post_error != 1) &&
- (post_stage < POST_STAGE_AWAITING_HOST_RDY) &&
- (++loops < max_loops));
-
- if (post_error == 1) {
- TRACE(DL_ERR, "Pre-POST error! Status = 0x%x (stage = 0x%x)",
- status.dw[0], post_stage);
- s = BE_NOT_OK;
- } else if (post_stage == POST_STAGE_AWAITING_HOST_RDY) {
- iowrite32(POST_STAGE_HOST_RDY, pfob->csr_va + MPU_EP_SEMAPHORE);
-
- /* Wait for POST to complete */
- s = be_wait_for_POST_complete(pfob);
- } else {
- /*
- * Either a timeout waiting for host ready signal or POST has
- * moved ahead without requiring a host ready signal.
- * Might as well give POST a chance to complete
- * (or timeout again).
- */
- s = be_wait_for_POST_complete(pfob);
- }
- return s;
-}
-
-/*
- *-------------------------------------------------------------------
- * Function: be_pci_soft_reset
- * This function is called to issue a BladeEngine soft reset.
- * Callers should acquire the soft reset semaphore before calling this
- * function. Additionaly, callers should ensure they cannot be pre-empted
- * while the routine executes. Upon completion of this routine, callers
- * should release the reset semaphore. This routine implicitly waits
- * for BladeEngine POST to complete.
- * pfob -
- * return status - BE_SUCCESS (0) on success. Negative error code on failure.
- *-------------------------------------------------------------------
- */
-int be_pci_soft_reset(struct be_function_object *pfob)
-{
- struct PCICFG_SOFT_RESET_CSR_AMAP soft_reset;
- struct PCICFG_ONLINE0_CSR_AMAP pciOnline0;
- struct PCICFG_ONLINE1_CSR_AMAP pciOnline1;
- struct EP_CONTROL_CSR_AMAP epControlCsr;
- int status = BE_SUCCESS;
- u32 i, soft_reset_bit;
-
- TRACE(DL_NOTE, "PCI reset...");
-
- /* Issue soft reset #1 to get BladeEngine into a known state. */
- soft_reset.dw[0] = PCICFG0_READ(pfob, soft_reset);
- AMAP_SET_BITS_PTR(PCICFG_SOFT_RESET_CSR, softreset, soft_reset.dw, 1);
- PCICFG0_WRITE(pfob, host_timer_int_ctrl, soft_reset.dw[0]);
- /*
- * wait til soft reset is deasserted - hardware
- * deasserts after some time.
- */
- i = 0;
- do {
- udelay(50);
- soft_reset.dw[0] = PCICFG0_READ(pfob, soft_reset);
- soft_reset_bit = AMAP_GET_BITS_PTR(PCICFG_SOFT_RESET_CSR,
- softreset, soft_reset.dw);
- } while (soft_reset_bit && (i++ < 1024));
- if (soft_reset_bit != 0) {
- TRACE(DL_ERR, "Soft-reset #1 did not deassert as expected.");
- status = BE_NOT_OK;
- goto Error_label;
- }
- /* Mask everything */
- PCICFG0_WRITE(pfob, ue_status_low_mask, 0xFFFFFFFF);
- PCICFG0_WRITE(pfob, ue_status_hi_mask, 0xFFFFFFFF);
- /*
- * Set everything offline except MPU IRAM (it is offline with
- * the soft-reset, but soft-reset does not reset the PCICFG registers!)
- */
- pciOnline0.dw[0] = 0;
- pciOnline1.dw[0] = 0;
- AMAP_SET_BITS_PTR(PCICFG_ONLINE1_CSR, mpu_iram_online,
- pciOnline1.dw, 1);
- PCICFG0_WRITE(pfob, online0, pciOnline0.dw[0]);
- PCICFG0_WRITE(pfob, online1, pciOnline1.dw[0]);
-
- udelay(20000);
-
- /* Issue soft reset #2. */
- AMAP_SET_BITS_PTR(PCICFG_SOFT_RESET_CSR, softreset, soft_reset.dw, 1);
- PCICFG0_WRITE(pfob, host_timer_int_ctrl, soft_reset.dw[0]);
- /*
- * wait til soft reset is deasserted - hardware
- * deasserts after some time.
- */
- i = 0;
- do {
- udelay(50);
- soft_reset.dw[0] = PCICFG0_READ(pfob, soft_reset);
- soft_reset_bit = AMAP_GET_BITS_PTR(PCICFG_SOFT_RESET_CSR,
- softreset, soft_reset.dw);
- } while (soft_reset_bit && (i++ < 1024));
- if (soft_reset_bit != 0) {
- TRACE(DL_ERR, "Soft-reset #1 did not deassert as expected.");
- status = BE_NOT_OK;
- goto Error_label;
- }
-
-
- udelay(20000);
-
- /* Take MPU out of reset. */
-
- epControlCsr.dw[0] = ioread32(pfob->csr_va + MPU_EP_CONTROL);
- AMAP_SET_BITS_PTR(EP_CONTROL_CSR, CPU_reset, &epControlCsr, 0);
- iowrite32((u32)epControlCsr.dw[0], pfob->csr_va + MPU_EP_CONTROL);
-
- /* Kickoff BE POST and wait for completion */
- status = be_kickoff_and_wait_for_POST(pfob);
-
-Error_label:
- return status;
-}
-
-
-/*
- *-------------------------------------------------------------------
- * Function: be_pci_reset_required
- * This private function is called to detect if a host entity is
- * required to issue a PCI soft reset and subsequently drive
- * BladeEngine POST. Scenarios where this is required:
- * 1) BIOS-less configuration
- * 2) Hot-swap/plug/power-on
- * pfob -
- * return true if a reset is required, false otherwise
- *-------------------------------------------------------------------
- */
-static bool be_pci_reset_required(struct be_function_object *pfob)
-{
- struct MGMT_HBA_POST_STATUS_STRUCT_AMAP status;
- bool do_reset = false;
- u32 post_error, post_stage;
-
- /*
- * Read the POST status register
- */
- status.dw[0] = ioread32(pfob->csr_va + MPU_EP_SEMAPHORE);
- post_error = AMAP_GET_BITS_PTR(MGMT_HBA_POST_STATUS_STRUCT, error,
- &status);
- post_stage = AMAP_GET_BITS_PTR(MGMT_HBA_POST_STATUS_STRUCT, stage,
- &status);
- if (post_stage <= POST_STAGE_AWAITING_HOST_RDY) {
- /*
- * If BladeEngine is waiting for host ready indication,
- * we want to do a PCI reset.
- */
- do_reset = true;
- }
-
- return do_reset;
-}
-
-/*
- *-------------------------------------------------------------------
- * Function: be_drive_POST
- * This function is called to drive BladeEngine POST. The
- * caller should ensure they cannot be pre-empted while this routine executes.
- * pfob -
- * return status - BE_SUCCESS (0) on success. Negative error code on failure.
- *-------------------------------------------------------------------
- */
-int be_drive_POST(struct be_function_object *pfob)
-{
- int status;
-
- if (false != be_pci_reset_required(pfob)) {
- /* PCI reset is needed (implicitly starts and waits for POST) */
- status = be_pci_soft_reset(pfob);
- } else {
- /* No PCI reset is needed, start POST */
- status = be_kickoff_and_wait_for_POST(pfob);
- }
-
- return status;
-}
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * Autogenerated by srcgen version: 0127
- */
-#ifndef __mpu_amap_h__
-#define __mpu_amap_h__
-#include "ep.h"
-
-/* Provide control parameters for the Managment Processor Unit. */
-struct BE_MPU_CSRMAP_AMAP {
- struct BE_EP_CSRMAP_AMAP ep;
- u8 rsvd0[128]; /* DWORD 64 */
- u8 rsvd1[32]; /* DWORD 68 */
- u8 rsvd2[192]; /* DWORD 69 */
- u8 rsvd3[192]; /* DWORD 75 */
- u8 rsvd4[32]; /* DWORD 81 */
- u8 rsvd5[32]; /* DWORD 82 */
- u8 rsvd6[32]; /* DWORD 83 */
- u8 rsvd7[32]; /* DWORD 84 */
- u8 rsvd8[32]; /* DWORD 85 */
- u8 rsvd9[32]; /* DWORD 86 */
- u8 rsvd10[32]; /* DWORD 87 */
- u8 rsvd11[32]; /* DWORD 88 */
- u8 rsvd12[32]; /* DWORD 89 */
- u8 rsvd13[32]; /* DWORD 90 */
- u8 rsvd14[32]; /* DWORD 91 */
- u8 rsvd15[32]; /* DWORD 92 */
- u8 rsvd16[32]; /* DWORD 93 */
- u8 rsvd17[32]; /* DWORD 94 */
- u8 rsvd18[32]; /* DWORD 95 */
- u8 rsvd19[32]; /* DWORD 96 */
- u8 rsvd20[32]; /* DWORD 97 */
- u8 rsvd21[32]; /* DWORD 98 */
- u8 rsvd22[32]; /* DWORD 99 */
- u8 rsvd23[32]; /* DWORD 100 */
- u8 rsvd24[32]; /* DWORD 101 */
- u8 rsvd25[32]; /* DWORD 102 */
- u8 rsvd26[32]; /* DWORD 103 */
- u8 rsvd27[32]; /* DWORD 104 */
- u8 rsvd28[96]; /* DWORD 105 */
- u8 rsvd29[32]; /* DWORD 108 */
- u8 rsvd30[32]; /* DWORD 109 */
- u8 rsvd31[32]; /* DWORD 110 */
- u8 rsvd32[32]; /* DWORD 111 */
- u8 rsvd33[32]; /* DWORD 112 */
- u8 rsvd34[96]; /* DWORD 113 */
- u8 rsvd35[32]; /* DWORD 116 */
- u8 rsvd36[32]; /* DWORD 117 */
- u8 rsvd37[32]; /* DWORD 118 */
- u8 rsvd38[32]; /* DWORD 119 */
- u8 rsvd39[32]; /* DWORD 120 */
- u8 rsvd40[32]; /* DWORD 121 */
- u8 rsvd41[134][32]; /* DWORD 122 */
-} __packed;
-struct MPU_CSRMAP_AMAP {
- u32 dw[256];
-};
-
-#endif /* __mpu_amap_h__ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * Autogenerated by srcgen version: 0127
- */
-#ifndef __mpu_context_amap_h__
-#define __mpu_context_amap_h__
-
-/*
- * Management command and control ring context. The MPUs BTLR_CTRL1 CSR
- * controls the writeback behavior of the producer and consumer index values.
- */
-struct BE_MCC_RING_CONTEXT_AMAP {
- u8 con_index[16]; /* DWORD 0 */
- u8 ring_size[4]; /* DWORD 0 */
- u8 cq_id[11]; /* DWORD 0 */
- u8 rsvd0; /* DWORD 0 */
- u8 prod_index[16]; /* DWORD 1 */
- u8 pdid[15]; /* DWORD 1 */
- u8 invalid; /* DWORD 1 */
- u8 cmd_pending_current[7]; /* DWORD 2 */
- u8 rsvd1[25]; /* DWORD 2 */
- u8 hpi_port_cq_id[11]; /* DWORD 3 */
- u8 rsvd2[5]; /* DWORD 3 */
- u8 cmd_pending_max[7]; /* DWORD 3 */
- u8 rsvd3[9]; /* DWORD 3 */
-} __packed;
-struct MCC_RING_CONTEXT_AMAP {
- u32 dw[4];
-};
-
-#endif /* __mpu_context_amap_h__ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * Autogenerated by srcgen version: 0127
- */
-#ifndef __pcicfg_amap_h__
-#define __pcicfg_amap_h__
-
-/* Vendor and Device ID Register. */
-struct BE_PCICFG_ID_CSR_AMAP {
- u8 vendorid[16]; /* DWORD 0 */
- u8 deviceid[16]; /* DWORD 0 */
-} __packed;
-struct PCICFG_ID_CSR_AMAP {
- u32 dw[1];
-};
-
-/* IO Bar Register. */
-struct BE_PCICFG_IOBAR_CSR_AMAP {
- u8 iospace; /* DWORD 0 */
- u8 rsvd0[7]; /* DWORD 0 */
- u8 iobar[24]; /* DWORD 0 */
-} __packed;
-struct PCICFG_IOBAR_CSR_AMAP {
- u32 dw[1];
-};
-
-/* Memory BAR 0 Register. */
-struct BE_PCICFG_MEMBAR0_CSR_AMAP {
- u8 memspace; /* DWORD 0 */
- u8 type[2]; /* DWORD 0 */
- u8 pf; /* DWORD 0 */
- u8 rsvd0[10]; /* DWORD 0 */
- u8 membar0[18]; /* DWORD 0 */
-} __packed;
-struct PCICFG_MEMBAR0_CSR_AMAP {
- u32 dw[1];
-};
-
-/* Memory BAR 1 - Low Address Register. */
-struct BE_PCICFG_MEMBAR1_LO_CSR_AMAP {
- u8 memspace; /* DWORD 0 */
- u8 type[2]; /* DWORD 0 */
- u8 pf; /* DWORD 0 */
- u8 rsvd0[13]; /* DWORD 0 */
- u8 membar1lo[15]; /* DWORD 0 */
-} __packed;
-struct PCICFG_MEMBAR1_LO_CSR_AMAP {
- u32 dw[1];
-};
-
-/* Memory BAR 1 - High Address Register. */
-struct BE_PCICFG_MEMBAR1_HI_CSR_AMAP {
- u8 membar1hi[32]; /* DWORD 0 */
-} __packed;
-struct PCICFG_MEMBAR1_HI_CSR_AMAP {
- u32 dw[1];
-};
-
-/* Memory BAR 2 - Low Address Register. */
-struct BE_PCICFG_MEMBAR2_LO_CSR_AMAP {
- u8 memspace; /* DWORD 0 */
- u8 type[2]; /* DWORD 0 */
- u8 pf; /* DWORD 0 */
- u8 rsvd0[17]; /* DWORD 0 */
- u8 membar2lo[11]; /* DWORD 0 */
-} __packed;
-struct PCICFG_MEMBAR2_LO_CSR_AMAP {
- u32 dw[1];
-};
-
-/* Memory BAR 2 - High Address Register. */
-struct BE_PCICFG_MEMBAR2_HI_CSR_AMAP {
- u8 membar2hi[32]; /* DWORD 0 */
-} __packed;
-struct PCICFG_MEMBAR2_HI_CSR_AMAP {
- u32 dw[1];
-};
-
-/* Subsystem Vendor and ID (Function 0) Register. */
-struct BE_PCICFG_SUBSYSTEM_ID_F0_CSR_AMAP {
- u8 subsys_vendor_id[16]; /* DWORD 0 */
- u8 subsys_id[16]; /* DWORD 0 */
-} __packed;
-struct PCICFG_SUBSYSTEM_ID_F0_CSR_AMAP {
- u32 dw[1];
-};
-
-/* Subsystem Vendor and ID (Function 1) Register. */
-struct BE_PCICFG_SUBSYSTEM_ID_F1_CSR_AMAP {
- u8 subsys_vendor_id[16]; /* DWORD 0 */
- u8 subsys_id[16]; /* DWORD 0 */
-} __packed;
-struct PCICFG_SUBSYSTEM_ID_F1_CSR_AMAP {
- u32 dw[1];
-};
-
-/* Semaphore Register. */
-struct BE_PCICFG_SEMAPHORE_CSR_AMAP {
- u8 locked; /* DWORD 0 */
- u8 rsvd0[31]; /* DWORD 0 */
-} __packed;
-struct PCICFG_SEMAPHORE_CSR_AMAP {
- u32 dw[1];
-};
-
-/* Soft Reset Register. */
-struct BE_PCICFG_SOFT_RESET_CSR_AMAP {
- u8 rsvd0[7]; /* DWORD 0 */
- u8 softreset; /* DWORD 0 */
- u8 rsvd1[16]; /* DWORD 0 */
- u8 nec_ll_rcvdetect_i[8]; /* DWORD 0 */
-} __packed;
-struct PCICFG_SOFT_RESET_CSR_AMAP {
- u32 dw[1];
-};
-
-/* Unrecoverable Error Status (Low) Register. Each bit corresponds to
- * an internal Unrecoverable Error. These are set by hardware and may be
- * cleared by writing a one to the respective bit(s) to be cleared. Any
- * bit being set that is also unmasked will result in Unrecoverable Error
- * interrupt notification to the host CPU and/or Server Management chip
- * and the transitioning of BladeEngine to an Offline state.
- */
-struct BE_PCICFG_UE_STATUS_LOW_CSR_AMAP {
- u8 cev_ue_status; /* DWORD 0 */
- u8 ctx_ue_status; /* DWORD 0 */
- u8 dbuf_ue_status; /* DWORD 0 */
- u8 erx_ue_status; /* DWORD 0 */
- u8 host_ue_status; /* DWORD 0 */
- u8 mpu_ue_status; /* DWORD 0 */
- u8 ndma_ue_status; /* DWORD 0 */
- u8 ptc_ue_status; /* DWORD 0 */
- u8 rdma_ue_status; /* DWORD 0 */
- u8 rxf_ue_status; /* DWORD 0 */
- u8 rxips_ue_status; /* DWORD 0 */
- u8 rxulp0_ue_status; /* DWORD 0 */
- u8 rxulp1_ue_status; /* DWORD 0 */
- u8 rxulp2_ue_status; /* DWORD 0 */
- u8 tim_ue_status; /* DWORD 0 */
- u8 tpost_ue_status; /* DWORD 0 */
- u8 tpre_ue_status; /* DWORD 0 */
- u8 txips_ue_status; /* DWORD 0 */
- u8 txulp0_ue_status; /* DWORD 0 */
- u8 txulp1_ue_status; /* DWORD 0 */
- u8 uc_ue_status; /* DWORD 0 */
- u8 wdma_ue_status; /* DWORD 0 */
- u8 txulp2_ue_status; /* DWORD 0 */
- u8 host1_ue_status; /* DWORD 0 */
- u8 p0_ob_link_ue_status; /* DWORD 0 */
- u8 p1_ob_link_ue_status; /* DWORD 0 */
- u8 host_gpio_ue_status; /* DWORD 0 */
- u8 mbox_netw_ue_status; /* DWORD 0 */
- u8 mbox_stor_ue_status; /* DWORD 0 */
- u8 axgmac0_ue_status; /* DWORD 0 */
- u8 axgmac1_ue_status; /* DWORD 0 */
- u8 mpu_intpend_ue_status; /* DWORD 0 */
-} __packed;
-struct PCICFG_UE_STATUS_LOW_CSR_AMAP {
- u32 dw[1];
-};
-
-/* Unrecoverable Error Status (High) Register. Each bit corresponds to
- * an internal Unrecoverable Error. These are set by hardware and may be
- * cleared by writing a one to the respective bit(s) to be cleared. Any
- * bit being set that is also unmasked will result in Unrecoverable Error
- * interrupt notification to the host CPU and/or Server Management chip;
- * and the transitioning of BladeEngine to an Offline state.
- */
-struct BE_PCICFG_UE_STATUS_HI_CSR_AMAP {
- u8 jtag_ue_status; /* DWORD 0 */
- u8 lpcmemhost_ue_status; /* DWORD 0 */
- u8 mgmt_mac_ue_status; /* DWORD 0 */
- u8 mpu_iram_ue_status; /* DWORD 0 */
- u8 pcs0online_ue_status; /* DWORD 0 */
- u8 pcs1online_ue_status; /* DWORD 0 */
- u8 pctl0_ue_status; /* DWORD 0 */
- u8 pctl1_ue_status; /* DWORD 0 */
- u8 pmem_ue_status; /* DWORD 0 */
- u8 rr_ue_status; /* DWORD 0 */
- u8 rxpp_ue_status; /* DWORD 0 */
- u8 txpb_ue_status; /* DWORD 0 */
- u8 txp_ue_status; /* DWORD 0 */
- u8 xaui_ue_status; /* DWORD 0 */
- u8 arm_ue_status; /* DWORD 0 */
- u8 ipc_ue_status; /* DWORD 0 */
- u8 rsvd0[16]; /* DWORD 0 */
-} __packed;
-struct PCICFG_UE_STATUS_HI_CSR_AMAP {
- u32 dw[1];
-};
-
-/* Unrecoverable Error Mask (Low) Register. Each bit, when set to one,
- * will mask the associated Unrecoverable Error status bit from notification
- * of Unrecoverable Error to the host CPU and/or Server Managment chip and the
- * transitioning of all BladeEngine units to an Offline state.
- */
-struct BE_PCICFG_UE_STATUS_LOW_MASK_CSR_AMAP {
- u8 cev_ue_mask; /* DWORD 0 */
- u8 ctx_ue_mask; /* DWORD 0 */
- u8 dbuf_ue_mask; /* DWORD 0 */
- u8 erx_ue_mask; /* DWORD 0 */
- u8 host_ue_mask; /* DWORD 0 */
- u8 mpu_ue_mask; /* DWORD 0 */
- u8 ndma_ue_mask; /* DWORD 0 */
- u8 ptc_ue_mask; /* DWORD 0 */
- u8 rdma_ue_mask; /* DWORD 0 */
- u8 rxf_ue_mask; /* DWORD 0 */
- u8 rxips_ue_mask; /* DWORD 0 */
- u8 rxulp0_ue_mask; /* DWORD 0 */
- u8 rxulp1_ue_mask; /* DWORD 0 */
- u8 rxulp2_ue_mask; /* DWORD 0 */
- u8 tim_ue_mask; /* DWORD 0 */
- u8 tpost_ue_mask; /* DWORD 0 */
- u8 tpre_ue_mask; /* DWORD 0 */
- u8 txips_ue_mask; /* DWORD 0 */
- u8 txulp0_ue_mask; /* DWORD 0 */
- u8 txulp1_ue_mask; /* DWORD 0 */
- u8 uc_ue_mask; /* DWORD 0 */
- u8 wdma_ue_mask; /* DWORD 0 */
- u8 txulp2_ue_mask; /* DWORD 0 */
- u8 host1_ue_mask; /* DWORD 0 */
- u8 p0_ob_link_ue_mask; /* DWORD 0 */
- u8 p1_ob_link_ue_mask; /* DWORD 0 */
- u8 host_gpio_ue_mask; /* DWORD 0 */
- u8 mbox_netw_ue_mask; /* DWORD 0 */
- u8 mbox_stor_ue_mask; /* DWORD 0 */
- u8 axgmac0_ue_mask; /* DWORD 0 */
- u8 axgmac1_ue_mask; /* DWORD 0 */
- u8 mpu_intpend_ue_mask; /* DWORD 0 */
-} __packed;
-struct PCICFG_UE_STATUS_LOW_MASK_CSR_AMAP {
- u32 dw[1];
-};
-
-/* Unrecoverable Error Mask (High) Register. Each bit, when set to one,
- * will mask the associated Unrecoverable Error status bit from notification
- * of Unrecoverable Error to the host CPU and/or Server Managment chip and the
- * transitioning of all BladeEngine units to an Offline state.
- */
-struct BE_PCICFG_UE_STATUS_HI_MASK_CSR_AMAP {
- u8 jtag_ue_mask; /* DWORD 0 */
- u8 lpcmemhost_ue_mask; /* DWORD 0 */
- u8 mgmt_mac_ue_mask; /* DWORD 0 */
- u8 mpu_iram_ue_mask; /* DWORD 0 */
- u8 pcs0online_ue_mask; /* DWORD 0 */
- u8 pcs1online_ue_mask; /* DWORD 0 */
- u8 pctl0_ue_mask; /* DWORD 0 */
- u8 pctl1_ue_mask; /* DWORD 0 */
- u8 pmem_ue_mask; /* DWORD 0 */
- u8 rr_ue_mask; /* DWORD 0 */
- u8 rxpp_ue_mask; /* DWORD 0 */
- u8 txpb_ue_mask; /* DWORD 0 */
- u8 txp_ue_mask; /* DWORD 0 */
- u8 xaui_ue_mask; /* DWORD 0 */
- u8 arm_ue_mask; /* DWORD 0 */
- u8 ipc_ue_mask; /* DWORD 0 */
- u8 rsvd0[16]; /* DWORD 0 */
-} __packed;
-struct PCICFG_UE_STATUS_HI_MASK_CSR_AMAP {
- u32 dw[1];
-};
-
-/* Online Control Register 0. This register controls various units within
- * BladeEngine being in an Online or Offline state.
- */
-struct BE_PCICFG_ONLINE0_CSR_AMAP {
- u8 cev_online; /* DWORD 0 */
- u8 ctx_online; /* DWORD 0 */
- u8 dbuf_online; /* DWORD 0 */
- u8 erx_online; /* DWORD 0 */
- u8 host_online; /* DWORD 0 */
- u8 mpu_online; /* DWORD 0 */
- u8 ndma_online; /* DWORD 0 */
- u8 ptc_online; /* DWORD 0 */
- u8 rdma_online; /* DWORD 0 */
- u8 rxf_online; /* DWORD 0 */
- u8 rxips_online; /* DWORD 0 */
- u8 rxulp0_online; /* DWORD 0 */
- u8 rxulp1_online; /* DWORD 0 */
- u8 rxulp2_online; /* DWORD 0 */
- u8 tim_online; /* DWORD 0 */
- u8 tpost_online; /* DWORD 0 */
- u8 tpre_online; /* DWORD 0 */
- u8 txips_online; /* DWORD 0 */
- u8 txulp0_online; /* DWORD 0 */
- u8 txulp1_online; /* DWORD 0 */
- u8 uc_online; /* DWORD 0 */
- u8 wdma_online; /* DWORD 0 */
- u8 txulp2_online; /* DWORD 0 */
- u8 host1_online; /* DWORD 0 */
- u8 p0_ob_link_online; /* DWORD 0 */
- u8 p1_ob_link_online; /* DWORD 0 */
- u8 host_gpio_online; /* DWORD 0 */
- u8 mbox_netw_online; /* DWORD 0 */
- u8 mbox_stor_online; /* DWORD 0 */
- u8 axgmac0_online; /* DWORD 0 */
- u8 axgmac1_online; /* DWORD 0 */
- u8 mpu_intpend_online; /* DWORD 0 */
-} __packed;
-struct PCICFG_ONLINE0_CSR_AMAP {
- u32 dw[1];
-};
-
-/* Online Control Register 1. This register controls various units within
- * BladeEngine being in an Online or Offline state.
- */
-struct BE_PCICFG_ONLINE1_CSR_AMAP {
- u8 jtag_online; /* DWORD 0 */
- u8 lpcmemhost_online; /* DWORD 0 */
- u8 mgmt_mac_online; /* DWORD 0 */
- u8 mpu_iram_online; /* DWORD 0 */
- u8 pcs0online_online; /* DWORD 0 */
- u8 pcs1online_online; /* DWORD 0 */
- u8 pctl0_online; /* DWORD 0 */
- u8 pctl1_online; /* DWORD 0 */
- u8 pmem_online; /* DWORD 0 */
- u8 rr_online; /* DWORD 0 */
- u8 rxpp_online; /* DWORD 0 */
- u8 txpb_online; /* DWORD 0 */
- u8 txp_online; /* DWORD 0 */
- u8 xaui_online; /* DWORD 0 */
- u8 arm_online; /* DWORD 0 */
- u8 ipc_online; /* DWORD 0 */
- u8 rsvd0[16]; /* DWORD 0 */
-} __packed;
-struct PCICFG_ONLINE1_CSR_AMAP {
- u32 dw[1];
-};
-
-/* Host Timer Register. */
-struct BE_PCICFG_HOST_TIMER_INT_CTRL_CSR_AMAP {
- u8 hosttimer[24]; /* DWORD 0 */
- u8 hostintr; /* DWORD 0 */
- u8 rsvd0[7]; /* DWORD 0 */
-} __packed;
-struct PCICFG_HOST_TIMER_INT_CTRL_CSR_AMAP {
- u32 dw[1];
-};
-
-/* Scratchpad Register (for software use). */
-struct BE_PCICFG_SCRATCHPAD_CSR_AMAP {
- u8 scratchpad[32]; /* DWORD 0 */
-} __packed;
-struct PCICFG_SCRATCHPAD_CSR_AMAP {
- u32 dw[1];
-};
-
-/* PCI Express Capabilities Register. */
-struct BE_PCICFG_PCIE_CAP_CSR_AMAP {
- u8 capid[8]; /* DWORD 0 */
- u8 nextcap[8]; /* DWORD 0 */
- u8 capver[4]; /* DWORD 0 */
- u8 devport[4]; /* DWORD 0 */
- u8 rsvd0[6]; /* DWORD 0 */
- u8 rsvd1[2]; /* DWORD 0 */
-} __packed;
-struct PCICFG_PCIE_CAP_CSR_AMAP {
- u32 dw[1];
-};
-
-/* PCI Express Device Capabilities Register. */
-struct BE_PCICFG_PCIE_DEVCAP_CSR_AMAP {
- u8 payload[3]; /* DWORD 0 */
- u8 rsvd0[3]; /* DWORD 0 */
- u8 lo_lat[3]; /* DWORD 0 */
- u8 l1_lat[3]; /* DWORD 0 */
- u8 rsvd1[3]; /* DWORD 0 */
- u8 rsvd2[3]; /* DWORD 0 */
- u8 pwr_value[8]; /* DWORD 0 */
- u8 pwr_scale[2]; /* DWORD 0 */
- u8 rsvd3[4]; /* DWORD 0 */
-} __packed;
-struct PCICFG_PCIE_DEVCAP_CSR_AMAP {
- u32 dw[1];
-};
-
-/* PCI Express Device Control/Status Registers. */
-struct BE_PCICFG_PCIE_CONTROL_STATUS_CSR_AMAP {
- u8 CorrErrReportEn; /* DWORD 0 */
- u8 NonFatalErrReportEn; /* DWORD 0 */
- u8 FatalErrReportEn; /* DWORD 0 */
- u8 UnsuppReqReportEn; /* DWORD 0 */
- u8 EnableRelaxOrder; /* DWORD 0 */
- u8 Max_Payload_Size[3]; /* DWORD 0 */
- u8 ExtendTagFieldEnable; /* DWORD 0 */
- u8 PhantomFnEnable; /* DWORD 0 */
- u8 AuxPwrPMEnable; /* DWORD 0 */
- u8 EnableNoSnoop; /* DWORD 0 */
- u8 Max_Read_Req_Size[3]; /* DWORD 0 */
- u8 rsvd0; /* DWORD 0 */
- u8 CorrErrDetect; /* DWORD 0 */
- u8 NonFatalErrDetect; /* DWORD 0 */
- u8 FatalErrDetect; /* DWORD 0 */
- u8 UnsuppReqDetect; /* DWORD 0 */
- u8 AuxPwrDetect; /* DWORD 0 */
- u8 TransPending; /* DWORD 0 */
- u8 rsvd1[10]; /* DWORD 0 */
-} __packed;
-struct PCICFG_PCIE_CONTROL_STATUS_CSR_AMAP {
- u32 dw[1];
-};
-
-/* PCI Express Link Capabilities Register. */
-struct BE_PCICFG_PCIE_LINK_CAP_CSR_AMAP {
- u8 MaxLinkSpeed[4]; /* DWORD 0 */
- u8 MaxLinkWidth[6]; /* DWORD 0 */
- u8 ASPMSupport[2]; /* DWORD 0 */
- u8 L0sExitLat[3]; /* DWORD 0 */
- u8 L1ExitLat[3]; /* DWORD 0 */
- u8 rsvd0[6]; /* DWORD 0 */
- u8 PortNum[8]; /* DWORD 0 */
-} __packed;
-struct PCICFG_PCIE_LINK_CAP_CSR_AMAP {
- u32 dw[1];
-};
-
-/* PCI Express Link Status Register. */
-struct BE_PCICFG_PCIE_LINK_STATUS_CSR_AMAP {
- u8 ASPMCtl[2]; /* DWORD 0 */
- u8 rsvd0; /* DWORD 0 */
- u8 ReadCmplBndry; /* DWORD 0 */
- u8 LinkDisable; /* DWORD 0 */
- u8 RetrainLink; /* DWORD 0 */
- u8 CommonClkConfig; /* DWORD 0 */
- u8 ExtendSync; /* DWORD 0 */
- u8 rsvd1[8]; /* DWORD 0 */
- u8 LinkSpeed[4]; /* DWORD 0 */
- u8 NegLinkWidth[6]; /* DWORD 0 */
- u8 LinkTrainErr; /* DWORD 0 */
- u8 LinkTrain; /* DWORD 0 */
- u8 SlotClkConfig; /* DWORD 0 */
- u8 rsvd2[3]; /* DWORD 0 */
-} __packed;
-struct PCICFG_PCIE_LINK_STATUS_CSR_AMAP {
- u32 dw[1];
-};
-
-/* PCI Express MSI Configuration Register. */
-struct BE_PCICFG_MSI_CSR_AMAP {
- u8 capid[8]; /* DWORD 0 */
- u8 nextptr[8]; /* DWORD 0 */
- u8 tablesize[11]; /* DWORD 0 */
- u8 rsvd0[3]; /* DWORD 0 */
- u8 funcmask; /* DWORD 0 */
- u8 en; /* DWORD 0 */
-} __packed;
-struct PCICFG_MSI_CSR_AMAP {
- u32 dw[1];
-};
-
-/* MSI-X Table Offset Register. */
-struct BE_PCICFG_MSIX_TABLE_CSR_AMAP {
- u8 tablebir[3]; /* DWORD 0 */
- u8 offset[29]; /* DWORD 0 */
-} __packed;
-struct PCICFG_MSIX_TABLE_CSR_AMAP {
- u32 dw[1];
-};
-
-/* MSI-X PBA Offset Register. */
-struct BE_PCICFG_MSIX_PBA_CSR_AMAP {
- u8 pbabir[3]; /* DWORD 0 */
- u8 offset[29]; /* DWORD 0 */
-} __packed;
-struct PCICFG_MSIX_PBA_CSR_AMAP {
- u32 dw[1];
-};
-
-/* PCI Express MSI-X Message Vector Control Register. */
-struct BE_PCICFG_MSIX_VECTOR_CONTROL_CSR_AMAP {
- u8 vector_control; /* DWORD 0 */
- u8 rsvd0[31]; /* DWORD 0 */
-} __packed;
-struct PCICFG_MSIX_VECTOR_CONTROL_CSR_AMAP {
- u32 dw[1];
-};
-
-/* PCI Express MSI-X Message Data Register. */
-struct BE_PCICFG_MSIX_MSG_DATA_CSR_AMAP {
- u8 data[16]; /* DWORD 0 */
- u8 rsvd0[16]; /* DWORD 0 */
-} __packed;
-struct PCICFG_MSIX_MSG_DATA_CSR_AMAP {
- u32 dw[1];
-};
-
-/* PCI Express MSI-X Message Address Register - High Part. */
-struct BE_PCICFG_MSIX_MSG_ADDR_HI_CSR_AMAP {
- u8 addr[32]; /* DWORD 0 */
-} __packed;
-struct PCICFG_MSIX_MSG_ADDR_HI_CSR_AMAP {
- u32 dw[1];
-};
-
-/* PCI Express MSI-X Message Address Register - Low Part. */
-struct BE_PCICFG_MSIX_MSG_ADDR_LO_CSR_AMAP {
- u8 rsvd0[2]; /* DWORD 0 */
- u8 addr[30]; /* DWORD 0 */
-} __packed;
-struct PCICFG_MSIX_MSG_ADDR_LO_CSR_AMAP {
- u32 dw[1];
-};
-
-struct BE_PCICFG_ANON_18_RSVD_AMAP {
- u8 rsvd0[32]; /* DWORD 0 */
-} __packed;
-struct PCICFG_ANON_18_RSVD_AMAP {
- u32 dw[1];
-};
-
-struct BE_PCICFG_ANON_19_RSVD_AMAP {
- u8 rsvd0[32]; /* DWORD 0 */
-} __packed;
-struct PCICFG_ANON_19_RSVD_AMAP {
- u32 dw[1];
-};
-
-struct BE_PCICFG_ANON_20_RSVD_AMAP {
- u8 rsvd0[32]; /* DWORD 0 */
- u8 rsvd1[25][32]; /* DWORD 1 */
-} __packed;
-struct PCICFG_ANON_20_RSVD_AMAP {
- u32 dw[26];
-};
-
-struct BE_PCICFG_ANON_21_RSVD_AMAP {
- u8 rsvd0[32]; /* DWORD 0 */
- u8 rsvd1[1919][32]; /* DWORD 1 */
-} __packed;
-struct PCICFG_ANON_21_RSVD_AMAP {
- u32 dw[1920];
-};
-
-struct BE_PCICFG_ANON_22_MESSAGE_AMAP {
- struct BE_PCICFG_MSIX_VECTOR_CONTROL_CSR_AMAP vec_ctrl;
- struct BE_PCICFG_MSIX_MSG_DATA_CSR_AMAP msg_data;
- struct BE_PCICFG_MSIX_MSG_ADDR_HI_CSR_AMAP addr_hi;
- struct BE_PCICFG_MSIX_MSG_ADDR_LO_CSR_AMAP addr_low;
-} __packed;
-struct PCICFG_ANON_22_MESSAGE_AMAP {
- u32 dw[4];
-};
-
-struct BE_PCICFG_ANON_23_RSVD_AMAP {
- u8 rsvd0[32]; /* DWORD 0 */
- u8 rsvd1[895][32]; /* DWORD 1 */
-} __packed;
-struct PCICFG_ANON_23_RSVD_AMAP {
- u32 dw[896];
-};
-
-/* These PCI Configuration Space registers are for the Storage Function of
- * BladeEngine (Function 0). In the memory map of the registers below their
- * table,
- */
-struct BE_PCICFG0_CSRMAP_AMAP {
- struct BE_PCICFG_ID_CSR_AMAP id;
- u8 rsvd0[32]; /* DWORD 1 */
- u8 rsvd1[32]; /* DWORD 2 */
- u8 rsvd2[32]; /* DWORD 3 */
- struct BE_PCICFG_IOBAR_CSR_AMAP iobar;
- struct BE_PCICFG_MEMBAR0_CSR_AMAP membar0;
- struct BE_PCICFG_MEMBAR1_LO_CSR_AMAP membar1_lo;
- struct BE_PCICFG_MEMBAR1_HI_CSR_AMAP membar1_hi;
- struct BE_PCICFG_MEMBAR2_LO_CSR_AMAP membar2_lo;
- struct BE_PCICFG_MEMBAR2_HI_CSR_AMAP membar2_hi;
- u8 rsvd3[32]; /* DWORD 10 */
- struct BE_PCICFG_SUBSYSTEM_ID_F0_CSR_AMAP subsystem_id;
- u8 rsvd4[32]; /* DWORD 12 */
- u8 rsvd5[32]; /* DWORD 13 */
- u8 rsvd6[32]; /* DWORD 14 */
- u8 rsvd7[32]; /* DWORD 15 */
- struct BE_PCICFG_SEMAPHORE_CSR_AMAP semaphore[4];
- struct BE_PCICFG_SOFT_RESET_CSR_AMAP soft_reset;
- u8 rsvd8[32]; /* DWORD 21 */
- struct BE_PCICFG_SCRATCHPAD_CSR_AMAP scratchpad;
- u8 rsvd9[32]; /* DWORD 23 */
- u8 rsvd10[32]; /* DWORD 24 */
- u8 rsvd11[32]; /* DWORD 25 */
- u8 rsvd12[32]; /* DWORD 26 */
- u8 rsvd13[32]; /* DWORD 27 */
- u8 rsvd14[2][32]; /* DWORD 28 */
- u8 rsvd15[32]; /* DWORD 30 */
- u8 rsvd16[32]; /* DWORD 31 */
- u8 rsvd17[8][32]; /* DWORD 32 */
- struct BE_PCICFG_UE_STATUS_LOW_CSR_AMAP ue_status_low;
- struct BE_PCICFG_UE_STATUS_HI_CSR_AMAP ue_status_hi;
- struct BE_PCICFG_UE_STATUS_LOW_MASK_CSR_AMAP ue_status_low_mask;
- struct BE_PCICFG_UE_STATUS_HI_MASK_CSR_AMAP ue_status_hi_mask;
- struct BE_PCICFG_ONLINE0_CSR_AMAP online0;
- struct BE_PCICFG_ONLINE1_CSR_AMAP online1;
- u8 rsvd18[32]; /* DWORD 46 */
- u8 rsvd19[32]; /* DWORD 47 */
- u8 rsvd20[32]; /* DWORD 48 */
- u8 rsvd21[32]; /* DWORD 49 */
- struct BE_PCICFG_HOST_TIMER_INT_CTRL_CSR_AMAP host_timer_int_ctrl;
- u8 rsvd22[32]; /* DWORD 51 */
- struct BE_PCICFG_PCIE_CAP_CSR_AMAP pcie_cap;
- struct BE_PCICFG_PCIE_DEVCAP_CSR_AMAP pcie_devcap;
- struct BE_PCICFG_PCIE_CONTROL_STATUS_CSR_AMAP pcie_control_status;
- struct BE_PCICFG_PCIE_LINK_CAP_CSR_AMAP pcie_link_cap;
- struct BE_PCICFG_PCIE_LINK_STATUS_CSR_AMAP pcie_link_status;
- struct BE_PCICFG_MSI_CSR_AMAP msi;
- struct BE_PCICFG_MSIX_TABLE_CSR_AMAP msix_table_offset;
- struct BE_PCICFG_MSIX_PBA_CSR_AMAP msix_pba_offset;
- u8 rsvd23[32]; /* DWORD 60 */
- u8 rsvd24[32]; /* DWORD 61 */
- u8 rsvd25[32]; /* DWORD 62 */
- u8 rsvd26[32]; /* DWORD 63 */
- u8 rsvd27[32]; /* DWORD 64 */
- u8 rsvd28[32]; /* DWORD 65 */
- u8 rsvd29[32]; /* DWORD 66 */
- u8 rsvd30[32]; /* DWORD 67 */
- u8 rsvd31[32]; /* DWORD 68 */
- u8 rsvd32[32]; /* DWORD 69 */
- u8 rsvd33[32]; /* DWORD 70 */
- u8 rsvd34[32]; /* DWORD 71 */
- u8 rsvd35[32]; /* DWORD 72 */
- u8 rsvd36[32]; /* DWORD 73 */
- u8 rsvd37[32]; /* DWORD 74 */
- u8 rsvd38[32]; /* DWORD 75 */
- u8 rsvd39[32]; /* DWORD 76 */
- u8 rsvd40[32]; /* DWORD 77 */
- u8 rsvd41[32]; /* DWORD 78 */
- u8 rsvd42[32]; /* DWORD 79 */
- u8 rsvd43[32]; /* DWORD 80 */
- u8 rsvd44[32]; /* DWORD 81 */
- u8 rsvd45[32]; /* DWORD 82 */
- u8 rsvd46[32]; /* DWORD 83 */
- u8 rsvd47[32]; /* DWORD 84 */
- u8 rsvd48[32]; /* DWORD 85 */
- u8 rsvd49[32]; /* DWORD 86 */
- u8 rsvd50[32]; /* DWORD 87 */
- u8 rsvd51[32]; /* DWORD 88 */
- u8 rsvd52[32]; /* DWORD 89 */
- u8 rsvd53[32]; /* DWORD 90 */
- u8 rsvd54[32]; /* DWORD 91 */
- u8 rsvd55[32]; /* DWORD 92 */
- u8 rsvd56[832]; /* DWORD 93 */
- u8 rsvd57[32]; /* DWORD 119 */
- u8 rsvd58[32]; /* DWORD 120 */
- u8 rsvd59[32]; /* DWORD 121 */
- u8 rsvd60[32]; /* DWORD 122 */
- u8 rsvd61[32]; /* DWORD 123 */
- u8 rsvd62[32]; /* DWORD 124 */
- u8 rsvd63[32]; /* DWORD 125 */
- u8 rsvd64[32]; /* DWORD 126 */
- u8 rsvd65[32]; /* DWORD 127 */
- u8 rsvd66[61440]; /* DWORD 128 */
- struct BE_PCICFG_ANON_22_MESSAGE_AMAP message[32];
- u8 rsvd67[28672]; /* DWORD 2176 */
- u8 rsvd68[32]; /* DWORD 3072 */
- u8 rsvd69[1023][32]; /* DWORD 3073 */
-} __packed;
-struct PCICFG0_CSRMAP_AMAP {
- u32 dw[4096];
-};
-
-struct BE_PCICFG_ANON_24_RSVD_AMAP {
- u8 rsvd0[32]; /* DWORD 0 */
-} __packed;
-struct PCICFG_ANON_24_RSVD_AMAP {
- u32 dw[1];
-};
-
-struct BE_PCICFG_ANON_25_RSVD_AMAP {
- u8 rsvd0[32]; /* DWORD 0 */
-} __packed;
-struct PCICFG_ANON_25_RSVD_AMAP {
- u32 dw[1];
-};
-
-struct BE_PCICFG_ANON_26_RSVD_AMAP {
- u8 rsvd0[32]; /* DWORD 0 */
-} __packed;
-struct PCICFG_ANON_26_RSVD_AMAP {
- u32 dw[1];
-};
-
-struct BE_PCICFG_ANON_27_RSVD_AMAP {
- u8 rsvd0[32]; /* DWORD 0 */
- u8 rsvd1[32]; /* DWORD 1 */
-} __packed;
-struct PCICFG_ANON_27_RSVD_AMAP {
- u32 dw[2];
-};
-
-struct BE_PCICFG_ANON_28_RSVD_AMAP {
- u8 rsvd0[32]; /* DWORD 0 */
- u8 rsvd1[3][32]; /* DWORD 1 */
-} __packed;
-struct PCICFG_ANON_28_RSVD_AMAP {
- u32 dw[4];
-};
-
-struct BE_PCICFG_ANON_29_RSVD_AMAP {
- u8 rsvd0[32]; /* DWORD 0 */
- u8 rsvd1[36][32]; /* DWORD 1 */
-} __packed;
-struct PCICFG_ANON_29_RSVD_AMAP {
- u32 dw[37];
-};
-
-struct BE_PCICFG_ANON_30_RSVD_AMAP {
- u8 rsvd0[32]; /* DWORD 0 */
- u8 rsvd1[1930][32]; /* DWORD 1 */
-} __packed;
-struct PCICFG_ANON_30_RSVD_AMAP {
- u32 dw[1931];
-};
-
-struct BE_PCICFG_ANON_31_MESSAGE_AMAP {
- struct BE_PCICFG_MSIX_VECTOR_CONTROL_CSR_AMAP vec_ctrl;
- struct BE_PCICFG_MSIX_MSG_DATA_CSR_AMAP msg_data;
- struct BE_PCICFG_MSIX_MSG_ADDR_HI_CSR_AMAP addr_hi;
- struct BE_PCICFG_MSIX_MSG_ADDR_LO_CSR_AMAP addr_low;
-} __packed;
-struct PCICFG_ANON_31_MESSAGE_AMAP {
- u32 dw[4];
-};
-
-struct BE_PCICFG_ANON_32_RSVD_AMAP {
- u8 rsvd0[32]; /* DWORD 0 */
- u8 rsvd1[895][32]; /* DWORD 1 */
-} __packed;
-struct PCICFG_ANON_32_RSVD_AMAP {
- u32 dw[896];
-};
-
-/* This PCI configuration space register map is for the Networking Function of
- * BladeEngine (Function 1).
- */
-struct BE_PCICFG1_CSRMAP_AMAP {
- struct BE_PCICFG_ID_CSR_AMAP id;
- u8 rsvd0[32]; /* DWORD 1 */
- u8 rsvd1[32]; /* DWORD 2 */
- u8 rsvd2[32]; /* DWORD 3 */
- struct BE_PCICFG_IOBAR_CSR_AMAP iobar;
- struct BE_PCICFG_MEMBAR0_CSR_AMAP membar0;
- struct BE_PCICFG_MEMBAR1_LO_CSR_AMAP membar1_lo;
- struct BE_PCICFG_MEMBAR1_HI_CSR_AMAP membar1_hi;
- struct BE_PCICFG_MEMBAR2_LO_CSR_AMAP membar2_lo;
- struct BE_PCICFG_MEMBAR2_HI_CSR_AMAP membar2_hi;
- u8 rsvd3[32]; /* DWORD 10 */
- struct BE_PCICFG_SUBSYSTEM_ID_F1_CSR_AMAP subsystem_id;
- u8 rsvd4[32]; /* DWORD 12 */
- u8 rsvd5[32]; /* DWORD 13 */
- u8 rsvd6[32]; /* DWORD 14 */
- u8 rsvd7[32]; /* DWORD 15 */
- struct BE_PCICFG_SEMAPHORE_CSR_AMAP semaphore[4];
- struct BE_PCICFG_SOFT_RESET_CSR_AMAP soft_reset;
- u8 rsvd8[32]; /* DWORD 21 */
- struct BE_PCICFG_SCRATCHPAD_CSR_AMAP scratchpad;
- u8 rsvd9[32]; /* DWORD 23 */
- u8 rsvd10[32]; /* DWORD 24 */
- u8 rsvd11[32]; /* DWORD 25 */
- u8 rsvd12[32]; /* DWORD 26 */
- u8 rsvd13[32]; /* DWORD 27 */
- u8 rsvd14[2][32]; /* DWORD 28 */
- u8 rsvd15[32]; /* DWORD 30 */
- u8 rsvd16[32]; /* DWORD 31 */
- u8 rsvd17[8][32]; /* DWORD 32 */
- struct BE_PCICFG_UE_STATUS_LOW_CSR_AMAP ue_status_low;
- struct BE_PCICFG_UE_STATUS_HI_CSR_AMAP ue_status_hi;
- struct BE_PCICFG_UE_STATUS_LOW_MASK_CSR_AMAP ue_status_low_mask;
- struct BE_PCICFG_UE_STATUS_HI_MASK_CSR_AMAP ue_status_hi_mask;
- struct BE_PCICFG_ONLINE0_CSR_AMAP online0;
- struct BE_PCICFG_ONLINE1_CSR_AMAP online1;
- u8 rsvd18[32]; /* DWORD 46 */
- u8 rsvd19[32]; /* DWORD 47 */
- u8 rsvd20[32]; /* DWORD 48 */
- u8 rsvd21[32]; /* DWORD 49 */
- struct BE_PCICFG_HOST_TIMER_INT_CTRL_CSR_AMAP host_timer_int_ctrl;
- u8 rsvd22[32]; /* DWORD 51 */
- struct BE_PCICFG_PCIE_CAP_CSR_AMAP pcie_cap;
- struct BE_PCICFG_PCIE_DEVCAP_CSR_AMAP pcie_devcap;
- struct BE_PCICFG_PCIE_CONTROL_STATUS_CSR_AMAP pcie_control_status;
- struct BE_PCICFG_PCIE_LINK_CAP_CSR_AMAP pcie_link_cap;
- struct BE_PCICFG_PCIE_LINK_STATUS_CSR_AMAP pcie_link_status;
- struct BE_PCICFG_MSI_CSR_AMAP msi;
- struct BE_PCICFG_MSIX_TABLE_CSR_AMAP msix_table_offset;
- struct BE_PCICFG_MSIX_PBA_CSR_AMAP msix_pba_offset;
- u8 rsvd23[64]; /* DWORD 60 */
- u8 rsvd24[32]; /* DWORD 62 */
- u8 rsvd25[32]; /* DWORD 63 */
- u8 rsvd26[32]; /* DWORD 64 */
- u8 rsvd27[32]; /* DWORD 65 */
- u8 rsvd28[32]; /* DWORD 66 */
- u8 rsvd29[32]; /* DWORD 67 */
- u8 rsvd30[32]; /* DWORD 68 */
- u8 rsvd31[32]; /* DWORD 69 */
- u8 rsvd32[32]; /* DWORD 70 */
- u8 rsvd33[32]; /* DWORD 71 */
- u8 rsvd34[32]; /* DWORD 72 */
- u8 rsvd35[32]; /* DWORD 73 */
- u8 rsvd36[32]; /* DWORD 74 */
- u8 rsvd37[128]; /* DWORD 75 */
- u8 rsvd38[32]; /* DWORD 79 */
- u8 rsvd39[1184]; /* DWORD 80 */
- u8 rsvd40[61792]; /* DWORD 117 */
- struct BE_PCICFG_ANON_31_MESSAGE_AMAP message[32];
- u8 rsvd41[28672]; /* DWORD 2176 */
- u8 rsvd42[32]; /* DWORD 3072 */
- u8 rsvd43[1023][32]; /* DWORD 3073 */
-} __packed;
-struct PCICFG1_CSRMAP_AMAP {
- u32 dw[4096];
-};
-
-#endif /* __pcicfg_amap_h__ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * Autogenerated by srcgen version: 0127
- */
-#ifndef __post_codes_amap_h__
-#define __post_codes_amap_h__
-
-/* --- MGMT_HBA_POST_STAGE_ENUM --- */
-#define POST_STAGE_POWER_ON_RESET (0) /* State after a cold or warm boot. */
-#define POST_STAGE_AWAITING_HOST_RDY (1) /* ARM boot code awaiting a
- go-ahed from the host. */
-#define POST_STAGE_HOST_RDY (2) /* Host has given go-ahed to ARM. */
-#define POST_STAGE_BE_RESET (3) /* Host wants to reset chip, this is a chip
- workaround */
-#define POST_STAGE_SEEPROM_CS_START (256) /* SEEPROM checksum
- test start. */
-#define POST_STAGE_SEEPROM_CS_DONE (257) /* SEEPROM checksum test
- done. */
-#define POST_STAGE_DDR_CONFIG_START (512) /* DDR configuration start. */
-#define POST_STAGE_DDR_CONFIG_DONE (513) /* DDR configuration done. */
-#define POST_STAGE_DDR_CALIBRATE_START (768) /* DDR calibration start. */
-#define POST_STAGE_DDR_CALIBRATE_DONE (769) /* DDR calibration done. */
-#define POST_STAGE_DDR_TEST_START (1024) /* DDR memory test start. */
-#define POST_STAGE_DDR_TEST_DONE (1025) /* DDR memory test done. */
-#define POST_STAGE_REDBOOT_INIT_START (1536) /* Redboot starts execution. */
-#define POST_STAGE_REDBOOT_INIT_DONE (1537) /* Redboot done execution. */
-#define POST_STAGE_FW_IMAGE_LOAD_START (1792) /* Firmware image load to
- DDR start. */
-#define POST_STAGE_FW_IMAGE_LOAD_DONE (1793) /* Firmware image load
- to DDR done. */
-#define POST_STAGE_ARMFW_START (2048) /* ARMfw runtime code
- starts execution. */
-#define POST_STAGE_DHCP_QUERY_START (2304) /* DHCP server query start. */
-#define POST_STAGE_DHCP_QUERY_DONE (2305) /* DHCP server query done. */
-#define POST_STAGE_BOOT_TARGET_DISCOVERY_START (2560) /* Boot Target
- Discovery Start. */
-#define POST_STAGE_BOOT_TARGET_DISCOVERY_DONE (2561) /* Boot Target
- Discovery Done. */
-#define POST_STAGE_RC_OPTION_SET (2816) /* Remote configuration
- option is set in SEEPROM */
-#define POST_STAGE_SWITCH_LINK (2817) /* Wait for link up on switch */
-#define POST_STAGE_SEND_ICDS_MESSAGE (2818) /* Send the ICDS message
- to switch */
-#define POST_STAGE_PERFROM_TFTP (2819) /* Download xml using TFTP */
-#define POST_STAGE_PARSE_XML (2820) /* Parse XML file */
-#define POST_STAGE_DOWNLOAD_IMAGE (2821) /* Download IMAGE from
- TFTP server */
-#define POST_STAGE_FLASH_IMAGE (2822) /* Flash the IMAGE */
-#define POST_STAGE_RC_DONE (2823) /* Remote configuration
- complete */
-#define POST_STAGE_REBOOT_SYSTEM (2824) /* Upgrade IMAGE done,
- reboot required */
-#define POST_STAGE_MAC_ADDRESS (3072) /* MAC Address Check */
-#define POST_STAGE_ARMFW_READY (49152) /* ARMfw is done with POST
- and ready. */
-#define POST_STAGE_ARMFW_UE (61440) /* ARMfw has asserted an
- unrecoverable error. The
- lower 3 hex digits of the
- stage code identify the
- unique error code.
- */
-
-/* This structure defines the format of the MPU semaphore
- * register when used for POST.
- */
-struct BE_MGMT_HBA_POST_STATUS_STRUCT_AMAP {
- u8 stage[16]; /* DWORD 0 */
- u8 rsvd0[10]; /* DWORD 0 */
- u8 iscsi_driver_loaded; /* DWORD 0 */
- u8 option_rom_installed; /* DWORD 0 */
- u8 iscsi_ip_conflict; /* DWORD 0 */
- u8 iscsi_no_ip; /* DWORD 0 */
- u8 backup_fw; /* DWORD 0 */
- u8 error; /* DWORD 0 */
-} __packed;
-struct MGMT_HBA_POST_STATUS_STRUCT_AMAP {
- u32 dw[1];
-};
-
-/* --- MGMT_HBA_POST_DUMMY_BITS_ENUM --- */
-#define POST_BIT_ISCSI_LOADED (26)
-#define POST_BIT_OPTROM_INST (27)
-#define POST_BIT_BAD_IP_ADDR (28)
-#define POST_BIT_NO_IP_ADDR (29)
-#define POST_BIT_BACKUP_FW (30)
-#define POST_BIT_ERROR (31)
-
-/* --- MGMT_HBA_POST_DUMMY_VALUES_ENUM --- */
-#define POST_ISCSI_DRIVER_LOADED (67108864)
-#define POST_OPTROM_INSTALLED (134217728)
-#define POST_ISCSI_IP_ADDRESS_CONFLICT (268435456)
-#define POST_ISCSI_NO_IP_ADDRESS (536870912)
-#define POST_BACKUP_FW_LOADED (1073741824)
-#define POST_FATAL_ERROR (2147483648)
-
-#endif /* __post_codes_amap_h__ */
+++ /dev/null
-/*
- * Copyright (C) 2005 - 2008 ServerEngines
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation. The full GNU General
- * Public License is included in this distribution in the file called COPYING.
- *
- * Contact Information:
- * linux-drivers@serverengines.com
- *
- * ServerEngines
- * 209 N. Fair Oaks Ave
- * Sunnyvale, CA 94085
- */
-/*
- * Autogenerated by srcgen version: 0127
- */
-#ifndef __regmap_amap_h__
-#define __regmap_amap_h__
-#include "pcicfg.h"
-#include "ep.h"
-#include "cev.h"
-#include "mpu.h"
-#include "doorbells.h"
-
-/*
- * This is the control and status register map for BladeEngine, showing
- * the relative size and offset of each sub-module. The CSR registers
- * are identical for the network and storage PCI functions. The
- * CSR map is shown below, followed by details of each block,
- * in sub-sections. The sub-sections begin with a description
- * of CSRs that are instantiated in multiple blocks.
- */
-struct BE_BLADE_ENGINE_CSRMAP_AMAP {
- struct BE_MPU_CSRMAP_AMAP mpu;
- u8 rsvd0[8192]; /* DWORD 256 */
- u8 rsvd1[8192]; /* DWORD 512 */
- struct BE_CEV_CSRMAP_AMAP cev;
- u8 rsvd2[8192]; /* DWORD 1024 */
- u8 rsvd3[8192]; /* DWORD 1280 */
- u8 rsvd4[8192]; /* DWORD 1536 */
- u8 rsvd5[8192]; /* DWORD 1792 */
- u8 rsvd6[8192]; /* DWORD 2048 */
- u8 rsvd7[8192]; /* DWORD 2304 */
- u8 rsvd8[8192]; /* DWORD 2560 */
- u8 rsvd9[8192]; /* DWORD 2816 */
- u8 rsvd10[8192]; /* DWORD 3072 */
- u8 rsvd11[8192]; /* DWORD 3328 */
- u8 rsvd12[8192]; /* DWORD 3584 */
- u8 rsvd13[8192]; /* DWORD 3840 */
- u8 rsvd14[8192]; /* DWORD 4096 */
- u8 rsvd15[8192]; /* DWORD 4352 */
- u8 rsvd16[8192]; /* DWORD 4608 */
- u8 rsvd17[8192]; /* DWORD 4864 */
- u8 rsvd18[8192]; /* DWORD 5120 */
- u8 rsvd19[8192]; /* DWORD 5376 */
- u8 rsvd20[8192]; /* DWORD 5632 */
- u8 rsvd21[8192]; /* DWORD 5888 */
- u8 rsvd22[8192]; /* DWORD 6144 */
- u8 rsvd23[17152][32]; /* DWORD 6400 */
-} __packed;
-struct BLADE_ENGINE_CSRMAP_AMAP {
- u32 dw[23552];
-};
-
-#endif /* __regmap_amap_h__ */
spin_lock_init(&gosnd->lock);
gosnd->hw_ptr = gosnd->w_idx = gosnd->avail = 0;
gosnd->capturing = 0;
- gosnd->card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (gosnd->card == NULL) {
+ ret = snd_card_create(index[dev], id[dev], THIS_MODULE, 0,
+ &gosnd->card);
+ if (ret < 0) {
kfree(gosnd);
- return -ENOMEM;
+ return ret;
}
ret = snd_device_new(gosnd->card, SNDRV_DEV_LOWLEVEL, go,
&go7007_snd_device_ops);
usb_err(instance->usbatm, "requested transfer size too large (%d, %d)\n",
wbuflen, rbuflen);
ret = -ENOMEM;
- goto fail;
+ goto err;
}
mutex_lock(&instance->cm_serialize);
dbg("cm %#x", cm);
fail:
mutex_unlock(&instance->cm_serialize);
+err:
return ret;
}
static struct usb_device_id usbtmc_devices[] = {
{ USB_INTERFACE_INFO(USB_CLASS_APP_SPEC, 3, 0), },
+ { USB_INTERFACE_INFO(USB_CLASS_APP_SPEC, 3, 1), },
{ 0, } /* terminating entry */
};
MODULE_DEVICE_TABLE(usb, usbtmc_devices);
{
struct usb_interface *intf;
struct usbtmc_device_data *data;
- int retval = -ENODEV;
+ int retval = 0;
intf = usb_find_interface(&usbtmc_driver, iminor(inode));
if (!intf) {
printk(KERN_ERR KBUILD_MODNAME
": can not find device for minor %d", iminor(inode));
+ retval = -ENODEV;
goto exit;
}
spin_lock_irqsave(&ps->lock, flags);
}
spin_unlock_irqrestore(&ps->lock, flags);
- as = async_getcompleted(ps);
- while (as) {
- free_async(as);
- as = async_getcompleted(ps);
- }
}
static void destroy_async_on_interface(struct dev_state *ps,
struct dev_state *ps = file->private_data;
struct usb_device *dev = ps->dev;
unsigned int ifnum;
+ struct async *as;
usb_lock_device(dev);
usb_unlock_device(dev);
usb_put_dev(dev);
put_pid(ps->disc_pid);
+
+ as = async_getcompleted(ps);
+ while (as) {
+ free_async(as);
+ as = async_getcompleted(ps);
+ }
kfree(ps);
return 0;
}
.dev_free = gmidi_snd_free,
};
- card = snd_card_new(index, id, THIS_MODULE, 0);
- if (!card) {
- ERROR(dev, "snd_card_new failed\n");
- err = -ENOMEM;
+ err = snd_card_create(index, id, THIS_MODULE, 0, &card);
+ if (err < 0) {
+ ERROR(dev, "snd_card_create failed\n");
goto fail;
}
dev->card = card;
prev->qh_next = qh->qh_next;
wmb ();
- if (unlikely (ehci_to_hcd(ehci)->state == HC_STATE_HALT)) {
+ /* If the controller isn't running, we don't have to wait for it */
+ if (unlikely(!HC_IS_RUNNING(ehci_to_hcd(ehci)->state))) {
/* if (unlikely (qh->reclaim != 0))
* this will recurse, probably not much
*/
struct ehci_itd, itd_list);
list_move_tail (&itd->itd_list, &stream->td_list);
itd->stream = iso_stream_get (stream);
- itd->urb = usb_get_urb (urb);
+ itd->urb = urb;
itd_init (ehci, stream, itd);
}
(void) disable_periodic(ehci);
ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
- if (unlikely (list_empty (&stream->td_list))) {
+ if (unlikely(list_is_singular(&stream->td_list))) {
ehci_to_hcd(ehci)->self.bandwidth_allocated
-= stream->bandwidth;
ehci_vdbg (ehci,
iso_stream_put (ehci, stream);
done:
- usb_put_urb(urb);
itd->urb = NULL;
if (ehci->clock_frame != itd->frame || itd->index[7] != -1) {
/* OK to recycle this ITD now. */
struct ehci_sitd, sitd_list);
list_move_tail (&sitd->sitd_list, &stream->td_list);
sitd->stream = iso_stream_get (stream);
- sitd->urb = usb_get_urb (urb);
+ sitd->urb = urb;
sitd_patch(ehci, stream, sitd, sched, packet);
sitd_link (ehci, (next_uframe >> 3) % ehci->periodic_size,
(void) disable_periodic(ehci);
ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
- if (list_empty (&stream->td_list)) {
+ if (list_is_singular(&stream->td_list)) {
ehci_to_hcd(ehci)->self.bandwidth_allocated
-= stream->bandwidth;
ehci_vdbg (ehci,
iso_stream_put (ehci, stream);
/* OK to recycle this SITD now that its completion callback ran. */
done:
- usb_put_urb(urb);
sitd->urb = NULL;
sitd->stream = NULL;
list_move(&sitd->sitd_list, &stream->free_list);
retval = usb_register_dev(intf, &mdc800_class);
if (retval) {
dev_err(&intf->dev, "Not able to get a minor for this device.\n");
+ mutex_unlock(&mdc800->io_lock);
return -ENODEV;
}
if (dev->open_count <= 0) {
dbg(1," %s : device not opened", __func__);
retval = -ENODEV;
- goto exit;
+ goto unlock;
}
adu_release_internal(dev);
if (!dev->open_count) /* ... and we're the last user */
adu_delete(dev);
}
-
-exit:
+unlock:
mutex_unlock(&adutux_mutex);
+exit:
dbg(2," %s : leave, return value %d", __func__, retval);
return retval;
}
}
if (copy_from_user(buf, buffer, count)) {
+ mutex_unlock(&vstdev->lock);
dev_err(&dev->dev, "%s: can't copy_from_user\n", __func__);
retval = -EFAULT;
goto exit;
{ USB_DEVICE(0x10C4, 0x814A) }, /* West Mountain Radio RIGblaster P&P */
{ USB_DEVICE(0x10C4, 0x814B) }, /* West Mountain Radio RIGtalk */
{ USB_DEVICE(0x10C4, 0x815E) }, /* Helicomm IP-Link 1220-DVM */
+ { USB_DEVICE(0x10C4, 0x819F) }, /* MJS USB Toslink Switcher */
{ USB_DEVICE(0x10C4, 0x81A6) }, /* ThinkOptics WavIt */
{ USB_DEVICE(0x10C4, 0x81AC) }, /* MSD Dash Hawk */
{ USB_DEVICE(0x10C4, 0x81C8) }, /* Lipowsky Industrie Elektronik GmbH, Baby-JTAG */
{ USB_DEVICE(ALTI2_VID, ALTI2_N3_PID) },
{ USB_DEVICE(FTDI_VID, DIEBOLD_BCS_SE923_PID) },
{ USB_DEVICE(FTDI_VID, FTDI_NDI_HUC_PID) },
+ { USB_DEVICE(ATMEL_VID, STK541_PID) },
+ { USB_DEVICE(DE_VID, STB_PID) },
+ { USB_DEVICE(DE_VID, WHT_PID) },
+ { USB_DEVICE(ADI_VID, ADI_GNICE_PID),
+ .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
{ }, /* Optional parameter entry */
{ } /* Terminating entry */
};
*/
#define DIEBOLD_BCS_SE923_PID 0xfb99
+/*
+ * Atmel STK541
+ */
+#define ATMEL_VID 0x03eb /* Vendor ID */
+#define STK541_PID 0x2109 /* Zigbee Controller */
+
+/*
+ * Dresden Elektronic Sensor Terminal Board
+ */
+#define DE_VID 0x1cf1 /* Vendor ID */
+#define STB_PID 0x0001 /* Sensor Terminal Board */
+#define WHT_PID 0x0004 /* Wireless Handheld Terminal */
+
+/*
+ * Blackfin gnICE JTAG
+ * http://docs.blackfin.uclinux.org/doku.php?id=hw:jtag:gnice
+ */
+#define ADI_VID 0x0456
+#define ADI_GNICE_PID 0xF000
+
/*
* BmRequestType: 1100 0000b
* bRequest: FTDI_E2_READ
#define OPTION_PRODUCT_ETNA_MODEM_GT 0x7041
#define OPTION_PRODUCT_ETNA_MODEM_EX 0x7061
#define OPTION_PRODUCT_ETNA_KOI_MODEM 0x7100
+#define OPTION_PRODUCT_GTM380_MODEM 0x7201
#define HUAWEI_VENDOR_ID 0x12D1
#define HUAWEI_PRODUCT_E600 0x1001
/* OVATION PRODUCTS */
#define NOVATELWIRELESS_PRODUCT_MC727 0x4100
#define NOVATELWIRELESS_PRODUCT_MC950D 0x4400
+#define NOVATELWIRELESS_PRODUCT_U727 0x5010
/* FUTURE NOVATEL PRODUCTS */
#define NOVATELWIRELESS_PRODUCT_EVDO_FULLSPEED 0X6000
/* ZTE PRODUCTS */
#define ZTE_VENDOR_ID 0x19d2
+#define ZTE_PRODUCT_MF622 0x0001
#define ZTE_PRODUCT_MF628 0x0015
#define ZTE_PRODUCT_MF626 0x0031
#define ZTE_PRODUCT_CDMA_TECH 0xfffe
-/* Ericsson products */
-#define ERICSSON_VENDOR_ID 0x0bdb
-#define ERICSSON_PRODUCT_F3507G_1 0x1900
-#define ERICSSON_PRODUCT_F3507G_2 0x1902
-
#define BENQ_VENDOR_ID 0x04a5
#define BENQ_PRODUCT_H10 0x4068
{ USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_ETNA_MODEM_GT) },
{ USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_ETNA_MODEM_EX) },
{ USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_ETNA_KOI_MODEM) },
+ { USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_GTM380_MODEM) },
{ USB_DEVICE(QUANTA_VENDOR_ID, QUANTA_PRODUCT_Q101) },
{ USB_DEVICE(QUANTA_VENDOR_ID, QUANTA_PRODUCT_Q111) },
{ USB_DEVICE(QUANTA_VENDOR_ID, QUANTA_PRODUCT_GLX) },
{ USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_EU870D) }, /* Novatel EU850D/EU860D/EU870D */
{ USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_MC950D) }, /* Novatel MC930D/MC950D */
{ USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_MC727) }, /* Novatel MC727/U727/USB727 */
+ { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_U727) }, /* Novatel MC727/U727/USB727 */
{ USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_EVDO_FULLSPEED) }, /* Novatel EVDO product */
{ USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_HSPA_FULLSPEED) }, /* Novatel HSPA product */
{ USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_EVDO_EMBEDDED_FULLSPEED) }, /* Novatel EVDO Embedded product */
{ USB_DEVICE(DELL_VENDOR_ID, DELL_PRODUCT_5520_MINICARD_CINGULAR) }, /* Dell Wireless HSDPA 5520 == Novatel Expedite EU860D */
{ USB_DEVICE(DELL_VENDOR_ID, DELL_PRODUCT_5520_MINICARD_GENERIC_L) }, /* Dell Wireless HSDPA 5520 */
{ USB_DEVICE(DELL_VENDOR_ID, DELL_PRODUCT_5520_MINICARD_GENERIC_I) }, /* Dell Wireless 5520 Voda I Mobile Broadband (3G HSDPA) Minicard */
- { USB_DEVICE(DELL_VENDOR_ID, 0x8147) }, /* Dell Wireless 5530 Mobile Broadband (3G HSPA) Mini-Card */
{ USB_DEVICE(DELL_VENDOR_ID, DELL_PRODUCT_5730_MINICARD_SPRINT) }, /* Dell Wireless 5730 Mobile Broadband EVDO/HSPA Mini-Card */
{ USB_DEVICE(DELL_VENDOR_ID, DELL_PRODUCT_5730_MINICARD_TELUS) }, /* Dell Wireless 5730 Mobile Broadband EVDO/HSPA Mini-Card */
{ USB_DEVICE(DELL_VENDOR_ID, DELL_PRODUCT_5730_MINICARD_VZW) }, /* Dell Wireless 5730 Mobile Broadband EVDO/HSPA Mini-Card */
{ USB_DEVICE(QUALCOMM_VENDOR_ID, 0x6613)}, /* Onda H600/ZTE MF330 */
{ USB_DEVICE(MAXON_VENDOR_ID, 0x6280) }, /* BP3-USB & BP3-EXT HSDPA */
{ USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_UC864E) },
+ { USB_DEVICE(ZTE_VENDOR_ID, ZTE_PRODUCT_MF622) },
{ USB_DEVICE(ZTE_VENDOR_ID, ZTE_PRODUCT_MF626) },
{ USB_DEVICE(ZTE_VENDOR_ID, ZTE_PRODUCT_MF628) },
{ USB_DEVICE(ZTE_VENDOR_ID, ZTE_PRODUCT_CDMA_TECH) },
- { USB_DEVICE(ERICSSON_VENDOR_ID, ERICSSON_PRODUCT_F3507G_1) },
- { USB_DEVICE(ERICSSON_VENDOR_ID, ERICSSON_PRODUCT_F3507G_2) },
{ USB_DEVICE(BENQ_VENDOR_ID, BENQ_PRODUCT_H10) },
{ USB_DEVICE(0x1da5, 0x4515) }, /* BenQ H20 */
{ } /* Terminating entry */
US_FL_MAX_SECTORS_64 ),
/* Reported by Manuel Osdoba <manuel.osdoba@tu-ilmenau.de> */
-UNUSUAL_DEV( 0x0421, 0x0492, 0x0452, 0x0452,
+UNUSUAL_DEV( 0x0421, 0x0492, 0x0452, 0x9999,
"Nokia",
"Nokia 6233",
US_SC_DEVICE, US_PR_DEVICE, NULL,
US_FL_FIX_CAPACITY ),
/* Reported by Richard -=[]=- <micro_flyer@hotmail.com> */
-UNUSUAL_DEV( 0x067b, 0x2507, 0x0100, 0x0100,
+/* Change to bcdDeviceMin (0x0100 to 0x0001) reported by
+ * Thomas Bartosik <tbartdev@gmx-topmail.de> */
+UNUSUAL_DEV( 0x067b, 0x2507, 0x0001, 0x0100,
"Prolific Technology Inc.",
"Mass Storage Device",
US_SC_DEVICE, US_PR_DEVICE, NULL,
US_SC_DEVICE, US_PR_DEVICE, NULL,
0 ),
+/* Reported by Jan Dumon <j.dumon@option.com>
+ * This device (wrongly) has a vendor-specific device descriptor.
+ * The entry is needed so usb-storage can bind to it's mass-storage
+ * interface as an interface driver */
+UNUSUAL_DEV( 0x0af0, 0x7501, 0x0000, 0x0000,
+ "Option",
+ "GI 0431 SD-Card",
+ US_SC_DEVICE, US_PR_DEVICE, NULL,
+ 0 ),
+
/* Reported by Ben Efros <ben@pc-doctor.com> */
UNUSUAL_DEV( 0x0bc2, 0x3010, 0x0000, 0x0000,
"Seagate",
result = -ENODEV;
/* FIXME: segmentation broken -- kills DWA */
mutex_lock(&wusbhc->mutex); /* get a WUSB dev */
- if (urb->dev == NULL)
+ if (urb->dev == NULL) {
+ mutex_unlock(&wusbhc->mutex);
goto error_dev_gone;
+ }
wusb_dev = __wusb_dev_get_by_usb_dev(wusbhc, urb->dev);
if (wusb_dev == NULL) {
mutex_unlock(&wusbhc->mutex);
#endif /* CONFIG_PPC_OF */
+static void radeonfb_whack_power_state(struct radeonfb_info *rinfo, pci_power_t state)
+{
+ u16 pwr_cmd;
+
+ for (;;) {
+ pci_read_config_word(rinfo->pdev,
+ rinfo->pm_reg+PCI_PM_CTRL,
+ &pwr_cmd);
+ if (pwr_cmd & 2)
+ break;
+ pwr_cmd = (pwr_cmd & ~PCI_PM_CTRL_STATE_MASK) | 2;
+ pci_write_config_word(rinfo->pdev,
+ rinfo->pm_reg+PCI_PM_CTRL,
+ pwr_cmd);
+ msleep(500);
+ }
+ rinfo->pdev->current_state = state;
+}
+
static void radeon_set_suspend(struct radeonfb_info *rinfo, int suspend)
{
u32 tmp;
/* Switch PCI power management to D2. */
pci_disable_device(rinfo->pdev);
pci_save_state(rinfo->pdev);
+ /* The chip seems to need us to whack the PM register
+ * repeatedly until it sticks. We do that -prior- to
+ * calling pci_set_power_state()
+ */
+ radeonfb_whack_power_state(rinfo, PCI_D2);
pci_set_power_state(rinfo->pdev, PCI_D2);
} else {
printk(KERN_DEBUG "radeonfb (%s): switching to D0 state...\n",
P3
-# Standard 224-color Linux logo
-80 80
+145 113
255
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 6 6 6 6 6 6 10 10 10 10 10 10
- 10 10 10 6 6 6 6 6 6 6 6 6
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 6 6 6 10 10 10 14 14 14
- 22 22 22 26 26 26 30 30 30 34 34 34
- 30 30 30 30 30 30 26 26 26 18 18 18
- 14 14 14 10 10 10 6 6 6 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 1 0 0 1 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 6 6 6 14 14 14 26 26 26 42 42 42
- 54 54 54 66 66 66 78 78 78 78 78 78
- 78 78 78 74 74 74 66 66 66 54 54 54
- 42 42 42 26 26 26 18 18 18 10 10 10
- 6 6 6 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 1 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 10 10 10
- 22 22 22 42 42 42 66 66 66 86 86 86
- 66 66 66 38 38 38 38 38 38 22 22 22
- 26 26 26 34 34 34 54 54 54 66 66 66
- 86 86 86 70 70 70 46 46 46 26 26 26
- 14 14 14 6 6 6 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 1 0 0 1 0 0 1 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 10 10 10 26 26 26
- 50 50 50 82 82 82 58 58 58 6 6 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 6 6 6 54 54 54 86 86 86 66 66 66
- 38 38 38 18 18 18 6 6 6 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 6 6 6 22 22 22 50 50 50
- 78 78 78 34 34 34 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 6 6 6 70 70 70
- 78 78 78 46 46 46 22 22 22 6 6 6
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 1 0 0 1 0 0 1 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 6 6 6 18 18 18 42 42 42 82 82 82
- 26 26 26 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 14 14 14
- 46 46 46 34 34 34 6 6 6 2 2 6
- 42 42 42 78 78 78 42 42 42 18 18 18
- 6 6 6 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 1 0 0 0 0 0 1 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 10 10 10 30 30 30 66 66 66 58 58 58
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 26 26 26
- 86 86 86 101 101 101 46 46 46 10 10 10
- 2 2 6 58 58 58 70 70 70 34 34 34
- 10 10 10 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 1 0 0 1 0 0 1 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 14 14 14 42 42 42 86 86 86 10 10 10
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 30 30 30
- 94 94 94 94 94 94 58 58 58 26 26 26
- 2 2 6 6 6 6 78 78 78 54 54 54
- 22 22 22 6 6 6 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 6 6 6
- 22 22 22 62 62 62 62 62 62 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 26 26 26
- 54 54 54 38 38 38 18 18 18 10 10 10
- 2 2 6 2 2 6 34 34 34 82 82 82
- 38 38 38 14 14 14 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 1 0 0 1 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 6 6 6
- 30 30 30 78 78 78 30 30 30 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 10 10 10
- 10 10 10 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 78 78 78
- 50 50 50 18 18 18 6 6 6 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 1 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 10 10 10
- 38 38 38 86 86 86 14 14 14 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 54 54 54
- 66 66 66 26 26 26 6 6 6 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 1 0 0 1 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 14 14 14
- 42 42 42 82 82 82 2 2 6 2 2 6
- 2 2 6 6 6 6 10 10 10 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 6 6 6
- 14 14 14 10 10 10 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 18 18 18
- 82 82 82 34 34 34 10 10 10 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 1 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 14 14 14
- 46 46 46 86 86 86 2 2 6 2 2 6
- 6 6 6 6 6 6 22 22 22 34 34 34
- 6 6 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 18 18 18 34 34 34
- 10 10 10 50 50 50 22 22 22 2 2 6
- 2 2 6 2 2 6 2 2 6 10 10 10
- 86 86 86 42 42 42 14 14 14 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 1 0 0 1 0 0 1 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 14 14 14
- 46 46 46 86 86 86 2 2 6 2 2 6
- 38 38 38 116 116 116 94 94 94 22 22 22
- 22 22 22 2 2 6 2 2 6 2 2 6
- 14 14 14 86 86 86 138 138 138 162 162 162
-154 154 154 38 38 38 26 26 26 6 6 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 86 86 86 46 46 46 14 14 14 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 14 14 14
- 46 46 46 86 86 86 2 2 6 14 14 14
-134 134 134 198 198 198 195 195 195 116 116 116
- 10 10 10 2 2 6 2 2 6 6 6 6
-101 98 89 187 187 187 210 210 210 218 218 218
-214 214 214 134 134 134 14 14 14 6 6 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 86 86 86 50 50 50 18 18 18 6 6 6
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 1 0 0 0
- 0 0 1 0 0 1 0 0 1 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 14 14 14
- 46 46 46 86 86 86 2 2 6 54 54 54
-218 218 218 195 195 195 226 226 226 246 246 246
- 58 58 58 2 2 6 2 2 6 30 30 30
-210 210 210 253 253 253 174 174 174 123 123 123
-221 221 221 234 234 234 74 74 74 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 70 70 70 58 58 58 22 22 22 6 6 6
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 14 14 14
- 46 46 46 82 82 82 2 2 6 106 106 106
-170 170 170 26 26 26 86 86 86 226 226 226
-123 123 123 10 10 10 14 14 14 46 46 46
-231 231 231 190 190 190 6 6 6 70 70 70
- 90 90 90 238 238 238 158 158 158 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 70 70 70 58 58 58 22 22 22 6 6 6
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 1 0 0 0
- 0 0 1 0 0 1 0 0 1 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 14 14 14
- 42 42 42 86 86 86 6 6 6 116 116 116
-106 106 106 6 6 6 70 70 70 149 149 149
-128 128 128 18 18 18 38 38 38 54 54 54
-221 221 221 106 106 106 2 2 6 14 14 14
- 46 46 46 190 190 190 198 198 198 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 74 74 74 62 62 62 22 22 22 6 6 6
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 1 0 0 0
- 0 0 1 0 0 0 0 0 1 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 14 14 14
- 42 42 42 94 94 94 14 14 14 101 101 101
-128 128 128 2 2 6 18 18 18 116 116 116
-118 98 46 121 92 8 121 92 8 98 78 10
-162 162 162 106 106 106 2 2 6 2 2 6
- 2 2 6 195 195 195 195 195 195 6 6 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 74 74 74 62 62 62 22 22 22 6 6 6
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 1 0 0 1
- 0 0 1 0 0 0 0 0 1 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 10 10 10
- 38 38 38 90 90 90 14 14 14 58 58 58
-210 210 210 26 26 26 54 38 6 154 114 10
-226 170 11 236 186 11 225 175 15 184 144 12
-215 174 15 175 146 61 37 26 9 2 2 6
- 70 70 70 246 246 246 138 138 138 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 70 70 70 66 66 66 26 26 26 6 6 6
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 10 10 10
- 38 38 38 86 86 86 14 14 14 10 10 10
-195 195 195 188 164 115 192 133 9 225 175 15
-239 182 13 234 190 10 232 195 16 232 200 30
-245 207 45 241 208 19 232 195 16 184 144 12
-218 194 134 211 206 186 42 42 42 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 50 50 50 74 74 74 30 30 30 6 6 6
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 10 10 10
- 34 34 34 86 86 86 14 14 14 2 2 6
-121 87 25 192 133 9 219 162 10 239 182 13
-236 186 11 232 195 16 241 208 19 244 214 54
-246 218 60 246 218 38 246 215 20 241 208 19
-241 208 19 226 184 13 121 87 25 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 50 50 50 82 82 82 34 34 34 10 10 10
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 10 10 10
- 34 34 34 82 82 82 30 30 30 61 42 6
-180 123 7 206 145 10 230 174 11 239 182 13
-234 190 10 238 202 15 241 208 19 246 218 74
-246 218 38 246 215 20 246 215 20 246 215 20
-226 184 13 215 174 15 184 144 12 6 6 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 26 26 26 94 94 94 42 42 42 14 14 14
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 10 10 10
- 30 30 30 78 78 78 50 50 50 104 69 6
-192 133 9 216 158 10 236 178 12 236 186 11
-232 195 16 241 208 19 244 214 54 245 215 43
-246 215 20 246 215 20 241 208 19 198 155 10
-200 144 11 216 158 10 156 118 10 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 6 6 6 90 90 90 54 54 54 18 18 18
- 6 6 6 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 10 10 10
- 30 30 30 78 78 78 46 46 46 22 22 22
-137 92 6 210 162 10 239 182 13 238 190 10
-238 202 15 241 208 19 246 215 20 246 215 20
-241 208 19 203 166 17 185 133 11 210 150 10
-216 158 10 210 150 10 102 78 10 2 2 6
- 6 6 6 54 54 54 14 14 14 2 2 6
- 2 2 6 62 62 62 74 74 74 30 30 30
- 10 10 10 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 10 10 10
- 34 34 34 78 78 78 50 50 50 6 6 6
- 94 70 30 139 102 15 190 146 13 226 184 13
-232 200 30 232 195 16 215 174 15 190 146 13
-168 122 10 192 133 9 210 150 10 213 154 11
-202 150 34 182 157 106 101 98 89 2 2 6
- 2 2 6 78 78 78 116 116 116 58 58 58
- 2 2 6 22 22 22 90 90 90 46 46 46
- 18 18 18 6 6 6 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 10 10 10
- 38 38 38 86 86 86 50 50 50 6 6 6
-128 128 128 174 154 114 156 107 11 168 122 10
-198 155 10 184 144 12 197 138 11 200 144 11
-206 145 10 206 145 10 197 138 11 188 164 115
-195 195 195 198 198 198 174 174 174 14 14 14
- 2 2 6 22 22 22 116 116 116 116 116 116
- 22 22 22 2 2 6 74 74 74 70 70 70
- 30 30 30 10 10 10 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 6 6 6 18 18 18
- 50 50 50 101 101 101 26 26 26 10 10 10
-138 138 138 190 190 190 174 154 114 156 107 11
-197 138 11 200 144 11 197 138 11 192 133 9
-180 123 7 190 142 34 190 178 144 187 187 187
-202 202 202 221 221 221 214 214 214 66 66 66
- 2 2 6 2 2 6 50 50 50 62 62 62
- 6 6 6 2 2 6 10 10 10 90 90 90
- 50 50 50 18 18 18 6 6 6 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 10 10 10 34 34 34
- 74 74 74 74 74 74 2 2 6 6 6 6
-144 144 144 198 198 198 190 190 190 178 166 146
-154 121 60 156 107 11 156 107 11 168 124 44
-174 154 114 187 187 187 190 190 190 210 210 210
-246 246 246 253 253 253 253 253 253 182 182 182
- 6 6 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 62 62 62
- 74 74 74 34 34 34 14 14 14 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 10 10 10 22 22 22 54 54 54
- 94 94 94 18 18 18 2 2 6 46 46 46
-234 234 234 221 221 221 190 190 190 190 190 190
-190 190 190 187 187 187 187 187 187 190 190 190
-190 190 190 195 195 195 214 214 214 242 242 242
-253 253 253 253 253 253 253 253 253 253 253 253
- 82 82 82 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 14 14 14
- 86 86 86 54 54 54 22 22 22 6 6 6
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 6 6 6 18 18 18 46 46 46 90 90 90
- 46 46 46 18 18 18 6 6 6 182 182 182
-253 253 253 246 246 246 206 206 206 190 190 190
-190 190 190 190 190 190 190 190 190 190 190 190
-206 206 206 231 231 231 250 250 250 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-202 202 202 14 14 14 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 42 42 42 86 86 86 42 42 42 18 18 18
- 6 6 6 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 6 6 6
- 14 14 14 38 38 38 74 74 74 66 66 66
- 2 2 6 6 6 6 90 90 90 250 250 250
-253 253 253 253 253 253 238 238 238 198 198 198
-190 190 190 190 190 190 195 195 195 221 221 221
-246 246 246 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 82 82 82 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 78 78 78 70 70 70 34 34 34
- 14 14 14 6 6 6 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 14 14 14
- 34 34 34 66 66 66 78 78 78 6 6 6
- 2 2 6 18 18 18 218 218 218 253 253 253
-253 253 253 253 253 253 253 253 253 246 246 246
-226 226 226 231 231 231 246 246 246 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 178 178 178 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 18 18 18 90 90 90 62 62 62
- 30 30 30 10 10 10 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 10 10 10 26 26 26
- 58 58 58 90 90 90 18 18 18 2 2 6
- 2 2 6 110 110 110 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-250 250 250 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 231 231 231 18 18 18 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 18 18 18 94 94 94
- 54 54 54 26 26 26 10 10 10 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 6 6 6 22 22 22 50 50 50
- 90 90 90 26 26 26 2 2 6 2 2 6
- 14 14 14 195 195 195 250 250 250 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-250 250 250 242 242 242 54 54 54 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 38 38 38
- 86 86 86 50 50 50 22 22 22 6 6 6
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 6 6 6 14 14 14 38 38 38 82 82 82
- 34 34 34 2 2 6 2 2 6 2 2 6
- 42 42 42 195 195 195 246 246 246 253 253 253
-253 253 253 253 253 253 253 253 253 250 250 250
-242 242 242 242 242 242 250 250 250 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 250 250 250 246 246 246 238 238 238
-226 226 226 231 231 231 101 101 101 6 6 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 38 38 38 82 82 82 42 42 42 14 14 14
- 6 6 6 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 10 10 10 26 26 26 62 62 62 66 66 66
- 2 2 6 2 2 6 2 2 6 6 6 6
- 70 70 70 170 170 170 206 206 206 234 234 234
-246 246 246 250 250 250 250 250 250 238 238 238
-226 226 226 231 231 231 238 238 238 250 250 250
-250 250 250 250 250 250 246 246 246 231 231 231
-214 214 214 206 206 206 202 202 202 202 202 202
-198 198 198 202 202 202 182 182 182 18 18 18
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 62 62 62 66 66 66 30 30 30
- 10 10 10 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 14 14 14 42 42 42 82 82 82 18 18 18
- 2 2 6 2 2 6 2 2 6 10 10 10
- 94 94 94 182 182 182 218 218 218 242 242 242
-250 250 250 253 253 253 253 253 253 250 250 250
-234 234 234 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 246 246 246
-238 238 238 226 226 226 210 210 210 202 202 202
-195 195 195 195 195 195 210 210 210 158 158 158
- 6 6 6 14 14 14 50 50 50 14 14 14
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 6 6 6 86 86 86 46 46 46
- 18 18 18 6 6 6 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 6 6 6
- 22 22 22 54 54 54 70 70 70 2 2 6
- 2 2 6 10 10 10 2 2 6 22 22 22
-166 166 166 231 231 231 250 250 250 253 253 253
-253 253 253 253 253 253 253 253 253 250 250 250
-242 242 242 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 246 246 246
-231 231 231 206 206 206 198 198 198 226 226 226
- 94 94 94 2 2 6 6 6 6 38 38 38
- 30 30 30 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 62 62 62 66 66 66
- 26 26 26 10 10 10 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 10 10 10
- 30 30 30 74 74 74 50 50 50 2 2 6
- 26 26 26 26 26 26 2 2 6 106 106 106
-238 238 238 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 246 246 246 218 218 218 202 202 202
-210 210 210 14 14 14 2 2 6 2 2 6
- 30 30 30 22 22 22 2 2 6 2 2 6
- 2 2 6 2 2 6 18 18 18 86 86 86
- 42 42 42 14 14 14 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 14 14 14
- 42 42 42 90 90 90 22 22 22 2 2 6
- 42 42 42 2 2 6 18 18 18 218 218 218
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 250 250 250 221 221 221
-218 218 218 101 101 101 2 2 6 14 14 14
- 18 18 18 38 38 38 10 10 10 2 2 6
- 2 2 6 2 2 6 2 2 6 78 78 78
- 58 58 58 22 22 22 6 6 6 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 6 6 6 18 18 18
- 54 54 54 82 82 82 2 2 6 26 26 26
- 22 22 22 2 2 6 123 123 123 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 250 250 250
-238 238 238 198 198 198 6 6 6 38 38 38
- 58 58 58 26 26 26 38 38 38 2 2 6
- 2 2 6 2 2 6 2 2 6 46 46 46
- 78 78 78 30 30 30 10 10 10 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 10 10 10 30 30 30
- 74 74 74 58 58 58 2 2 6 42 42 42
- 2 2 6 22 22 22 231 231 231 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 250 250 250
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 246 246 246 46 46 46 38 38 38
- 42 42 42 14 14 14 38 38 38 14 14 14
- 2 2 6 2 2 6 2 2 6 6 6 6
- 86 86 86 46 46 46 14 14 14 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 6 6 6 14 14 14 42 42 42
- 90 90 90 18 18 18 18 18 18 26 26 26
- 2 2 6 116 116 116 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 250 250 250 238 238 238
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 94 94 94 6 6 6
- 2 2 6 2 2 6 10 10 10 34 34 34
- 2 2 6 2 2 6 2 2 6 2 2 6
- 74 74 74 58 58 58 22 22 22 6 6 6
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 10 10 10 26 26 26 66 66 66
- 82 82 82 2 2 6 38 38 38 6 6 6
- 14 14 14 210 210 210 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 246 246 246 242 242 242
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 144 144 144 2 2 6
- 2 2 6 2 2 6 2 2 6 46 46 46
- 2 2 6 2 2 6 2 2 6 2 2 6
- 42 42 42 74 74 74 30 30 30 10 10 10
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 6 6 6 14 14 14 42 42 42 90 90 90
- 26 26 26 6 6 6 42 42 42 2 2 6
- 74 74 74 250 250 250 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 242 242 242 242 242 242
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 182 182 182 2 2 6
- 2 2 6 2 2 6 2 2 6 46 46 46
- 2 2 6 2 2 6 2 2 6 2 2 6
- 10 10 10 86 86 86 38 38 38 10 10 10
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 10 10 10 26 26 26 66 66 66 82 82 82
- 2 2 6 22 22 22 18 18 18 2 2 6
-149 149 149 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 234 234 234 242 242 242
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 206 206 206 2 2 6
- 2 2 6 2 2 6 2 2 6 38 38 38
- 2 2 6 2 2 6 2 2 6 2 2 6
- 6 6 6 86 86 86 46 46 46 14 14 14
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 6 6 6
- 18 18 18 46 46 46 86 86 86 18 18 18
- 2 2 6 34 34 34 10 10 10 6 6 6
-210 210 210 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 234 234 234 242 242 242
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 221 221 221 6 6 6
- 2 2 6 2 2 6 6 6 6 30 30 30
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 82 82 82 54 54 54 18 18 18
- 6 6 6 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 10 10 10
- 26 26 26 66 66 66 62 62 62 2 2 6
- 2 2 6 38 38 38 10 10 10 26 26 26
-238 238 238 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 231 231 231 238 238 238
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 231 231 231 6 6 6
- 2 2 6 2 2 6 10 10 10 30 30 30
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 66 66 66 58 58 58 22 22 22
- 6 6 6 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 10 10 10
- 38 38 38 78 78 78 6 6 6 2 2 6
- 2 2 6 46 46 46 14 14 14 42 42 42
-246 246 246 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 231 231 231 242 242 242
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 234 234 234 10 10 10
- 2 2 6 2 2 6 22 22 22 14 14 14
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 66 66 66 62 62 62 22 22 22
- 6 6 6 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 6 6 6 18 18 18
- 50 50 50 74 74 74 2 2 6 2 2 6
- 14 14 14 70 70 70 34 34 34 62 62 62
-250 250 250 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 231 231 231 246 246 246
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 234 234 234 14 14 14
- 2 2 6 2 2 6 30 30 30 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 66 66 66 62 62 62 22 22 22
- 6 6 6 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 6 6 6 18 18 18
- 54 54 54 62 62 62 2 2 6 2 2 6
- 2 2 6 30 30 30 46 46 46 70 70 70
-250 250 250 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 231 231 231 246 246 246
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 226 226 226 10 10 10
- 2 2 6 6 6 6 30 30 30 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 66 66 66 58 58 58 22 22 22
- 6 6 6 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 6 6 6 22 22 22
- 58 58 58 62 62 62 2 2 6 2 2 6
- 2 2 6 2 2 6 30 30 30 78 78 78
-250 250 250 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 231 231 231 246 246 246
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 206 206 206 2 2 6
- 22 22 22 34 34 34 18 14 6 22 22 22
- 26 26 26 18 18 18 6 6 6 2 2 6
- 2 2 6 82 82 82 54 54 54 18 18 18
- 6 6 6 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 6 6 6 26 26 26
- 62 62 62 106 106 106 74 54 14 185 133 11
-210 162 10 121 92 8 6 6 6 62 62 62
-238 238 238 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 231 231 231 246 246 246
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 158 158 158 18 18 18
- 14 14 14 2 2 6 2 2 6 2 2 6
- 6 6 6 18 18 18 66 66 66 38 38 38
- 6 6 6 94 94 94 50 50 50 18 18 18
- 6 6 6 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 6 6 6
- 10 10 10 10 10 10 18 18 18 38 38 38
- 78 78 78 142 134 106 216 158 10 242 186 14
-246 190 14 246 190 14 156 118 10 10 10 10
- 90 90 90 238 238 238 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 231 231 231 250 250 250
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 246 230 190
-238 204 91 238 204 91 181 142 44 37 26 9
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 38 38 38 46 46 46
- 26 26 26 106 106 106 54 54 54 18 18 18
- 6 6 6 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 6 6 6 14 14 14 22 22 22
- 30 30 30 38 38 38 50 50 50 70 70 70
-106 106 106 190 142 34 226 170 11 242 186 14
-246 190 14 246 190 14 246 190 14 154 114 10
- 6 6 6 74 74 74 226 226 226 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 231 231 231 250 250 250
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 228 184 62
-241 196 14 241 208 19 232 195 16 38 30 10
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 6 6 6 30 30 30 26 26 26
-203 166 17 154 142 90 66 66 66 26 26 26
- 6 6 6 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 6 6 6 18 18 18 38 38 38 58 58 58
- 78 78 78 86 86 86 101 101 101 123 123 123
-175 146 61 210 150 10 234 174 13 246 186 14
-246 190 14 246 190 14 246 190 14 238 190 10
-102 78 10 2 2 6 46 46 46 198 198 198
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 234 234 234 242 242 242
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 224 178 62
-242 186 14 241 196 14 210 166 10 22 18 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 6 6 6 121 92 8
-238 202 15 232 195 16 82 82 82 34 34 34
- 10 10 10 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 14 14 14 38 38 38 70 70 70 154 122 46
-190 142 34 200 144 11 197 138 11 197 138 11
-213 154 11 226 170 11 242 186 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-225 175 15 46 32 6 2 2 6 22 22 22
-158 158 158 250 250 250 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 250 250 250 242 242 242 224 178 62
-239 182 13 236 186 11 213 154 11 46 32 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 61 42 6 225 175 15
-238 190 10 236 186 11 112 100 78 42 42 42
- 14 14 14 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 6 6 6
- 22 22 22 54 54 54 154 122 46 213 154 11
-226 170 11 230 174 11 226 170 11 226 170 11
-236 178 12 242 186 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-241 196 14 184 144 12 10 10 10 2 2 6
- 6 6 6 116 116 116 242 242 242 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 231 231 231 198 198 198 214 170 54
-236 178 12 236 178 12 210 150 10 137 92 6
- 18 14 6 2 2 6 2 2 6 2 2 6
- 6 6 6 70 47 6 200 144 11 236 178 12
-239 182 13 239 182 13 124 112 88 58 58 58
- 22 22 22 6 6 6 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 10 10 10
- 30 30 30 70 70 70 180 133 36 226 170 11
-239 182 13 242 186 14 242 186 14 246 186 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 232 195 16 98 70 6 2 2 6
- 2 2 6 2 2 6 66 66 66 221 221 221
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 206 206 206 198 198 198 214 166 58
-230 174 11 230 174 11 216 158 10 192 133 9
-163 110 8 116 81 8 102 78 10 116 81 8
-167 114 7 197 138 11 226 170 11 239 182 13
-242 186 14 242 186 14 162 146 94 78 78 78
- 34 34 34 14 14 14 6 6 6 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 6 6 6
- 30 30 30 78 78 78 190 142 34 226 170 11
-239 182 13 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 241 196 14 203 166 17 22 18 6
- 2 2 6 2 2 6 2 2 6 38 38 38
-218 218 218 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-250 250 250 206 206 206 198 198 198 202 162 69
-226 170 11 236 178 12 224 166 10 210 150 10
-200 144 11 197 138 11 192 133 9 197 138 11
-210 150 10 226 170 11 242 186 14 246 190 14
-246 190 14 246 186 14 225 175 15 124 112 88
- 62 62 62 30 30 30 14 14 14 6 6 6
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 10 10 10
- 30 30 30 78 78 78 174 135 50 224 166 10
-239 182 13 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 241 196 14 139 102 15
- 2 2 6 2 2 6 2 2 6 2 2 6
- 78 78 78 250 250 250 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-250 250 250 214 214 214 198 198 198 190 150 46
-219 162 10 236 178 12 234 174 13 224 166 10
-216 158 10 213 154 11 213 154 11 216 158 10
-226 170 11 239 182 13 246 190 14 246 190 14
-246 190 14 246 190 14 242 186 14 206 162 42
-101 101 101 58 58 58 30 30 30 14 14 14
- 6 6 6 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 10 10 10
- 30 30 30 74 74 74 174 135 50 216 158 10
-236 178 12 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 241 196 14 226 184 13
- 61 42 6 2 2 6 2 2 6 2 2 6
- 22 22 22 238 238 238 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 226 226 226 187 187 187 180 133 36
-216 158 10 236 178 12 239 182 13 236 178 12
-230 174 11 226 170 11 226 170 11 230 174 11
-236 178 12 242 186 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 186 14 239 182 13
-206 162 42 106 106 106 66 66 66 34 34 34
- 14 14 14 6 6 6 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 6 6 6
- 26 26 26 70 70 70 163 133 67 213 154 11
-236 178 12 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 241 196 14
-190 146 13 18 14 6 2 2 6 2 2 6
- 46 46 46 246 246 246 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 221 221 221 86 86 86 156 107 11
-216 158 10 236 178 12 242 186 14 246 186 14
-242 186 14 239 182 13 239 182 13 242 186 14
-242 186 14 246 186 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-242 186 14 225 175 15 142 122 72 66 66 66
- 30 30 30 10 10 10 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 6 6 6
- 26 26 26 70 70 70 163 133 67 210 150 10
-236 178 12 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-232 195 16 121 92 8 34 34 34 106 106 106
-221 221 221 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-242 242 242 82 82 82 18 14 6 163 110 8
-216 158 10 236 178 12 242 186 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 242 186 14 163 133 67
- 46 46 46 18 18 18 6 6 6 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 10 10 10
- 30 30 30 78 78 78 163 133 67 210 150 10
-236 178 12 246 186 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-241 196 14 215 174 15 190 178 144 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 218 218 218
- 58 58 58 2 2 6 22 18 6 167 114 7
-216 158 10 236 178 12 246 186 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 186 14 242 186 14 190 150 46
- 54 54 54 22 22 22 6 6 6 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 14 14 14
- 38 38 38 86 86 86 180 133 36 213 154 11
-236 178 12 246 186 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 232 195 16 190 146 13 214 214 214
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 250 250 250 170 170 170 26 26 26
- 2 2 6 2 2 6 37 26 9 163 110 8
-219 162 10 239 182 13 246 186 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 186 14 236 178 12 224 166 10 142 122 72
- 46 46 46 18 18 18 6 6 6 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 6 6 6 18 18 18
- 50 50 50 109 106 95 192 133 9 224 166 10
-242 186 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-242 186 14 226 184 13 210 162 10 142 110 46
-226 226 226 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-253 253 253 253 253 253 253 253 253 253 253 253
-198 198 198 66 66 66 2 2 6 2 2 6
- 2 2 6 2 2 6 50 34 6 156 107 11
-219 162 10 239 182 13 246 186 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 242 186 14
-234 174 13 213 154 11 154 122 46 66 66 66
- 30 30 30 10 10 10 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 6 6 6 22 22 22
- 58 58 58 154 121 60 206 145 10 234 174 13
-242 186 14 246 186 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 186 14 236 178 12 210 162 10 163 110 8
- 61 42 6 138 138 138 218 218 218 250 250 250
-253 253 253 253 253 253 253 253 253 250 250 250
-242 242 242 210 210 210 144 144 144 66 66 66
- 6 6 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 61 42 6 163 110 8
-216 158 10 236 178 12 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 239 182 13 230 174 11 216 158 10
-190 142 34 124 112 88 70 70 70 38 38 38
- 18 18 18 6 6 6 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 6 6 6 22 22 22
- 62 62 62 168 124 44 206 145 10 224 166 10
-236 178 12 239 182 13 242 186 14 242 186 14
-246 186 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 236 178 12 216 158 10 175 118 6
- 80 54 7 2 2 6 6 6 6 30 30 30
- 54 54 54 62 62 62 50 50 50 38 38 38
- 14 14 14 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 6 6 6 80 54 7 167 114 7
-213 154 11 236 178 12 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 190 14 242 186 14 239 182 13 239 182 13
-230 174 11 210 150 10 174 135 50 124 112 88
- 82 82 82 54 54 54 34 34 34 18 18 18
- 6 6 6 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 6 6 6 18 18 18
- 50 50 50 158 118 36 192 133 9 200 144 11
-216 158 10 219 162 10 224 166 10 226 170 11
-230 174 11 236 178 12 239 182 13 239 182 13
-242 186 14 246 186 14 246 190 14 246 190 14
-246 190 14 246 190 14 246 190 14 246 190 14
-246 186 14 230 174 11 210 150 10 163 110 8
-104 69 6 10 10 10 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 6 6 6 91 60 6 167 114 7
-206 145 10 230 174 11 242 186 14 246 190 14
-246 190 14 246 190 14 246 186 14 242 186 14
-239 182 13 230 174 11 224 166 10 213 154 11
-180 133 36 124 112 88 86 86 86 58 58 58
- 38 38 38 22 22 22 10 10 10 6 6 6
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 14 14 14
- 34 34 34 70 70 70 138 110 50 158 118 36
-167 114 7 180 123 7 192 133 9 197 138 11
-200 144 11 206 145 10 213 154 11 219 162 10
-224 166 10 230 174 11 239 182 13 242 186 14
-246 186 14 246 186 14 246 186 14 246 186 14
-239 182 13 216 158 10 185 133 11 152 99 6
-104 69 6 18 14 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 2 2 6 2 2 6 2 2 6
- 2 2 6 6 6 6 80 54 7 152 99 6
-192 133 9 219 162 10 236 178 12 239 182 13
-246 186 14 242 186 14 239 182 13 236 178 12
-224 166 10 206 145 10 192 133 9 154 121 60
- 94 94 94 62 62 62 42 42 42 22 22 22
- 14 14 14 6 6 6 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 6 6 6
- 18 18 18 34 34 34 58 58 58 78 78 78
-101 98 89 124 112 88 142 110 46 156 107 11
-163 110 8 167 114 7 175 118 6 180 123 7
-185 133 11 197 138 11 210 150 10 219 162 10
-226 170 11 236 178 12 236 178 12 234 174 13
-219 162 10 197 138 11 163 110 8 130 83 6
- 91 60 6 10 10 10 2 2 6 2 2 6
- 18 18 18 38 38 38 38 38 38 38 38 38
- 38 38 38 38 38 38 38 38 38 38 38 38
- 38 38 38 38 38 38 26 26 26 2 2 6
- 2 2 6 6 6 6 70 47 6 137 92 6
-175 118 6 200 144 11 219 162 10 230 174 11
-234 174 13 230 174 11 219 162 10 210 150 10
-192 133 9 163 110 8 124 112 88 82 82 82
- 50 50 50 30 30 30 14 14 14 6 6 6
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 6 6 6 14 14 14 22 22 22 34 34 34
- 42 42 42 58 58 58 74 74 74 86 86 86
-101 98 89 122 102 70 130 98 46 121 87 25
-137 92 6 152 99 6 163 110 8 180 123 7
-185 133 11 197 138 11 206 145 10 200 144 11
-180 123 7 156 107 11 130 83 6 104 69 6
- 50 34 6 54 54 54 110 110 110 101 98 89
- 86 86 86 82 82 82 78 78 78 78 78 78
- 78 78 78 78 78 78 78 78 78 78 78 78
- 78 78 78 82 82 82 86 86 86 94 94 94
-106 106 106 101 101 101 86 66 34 124 80 6
-156 107 11 180 123 7 192 133 9 200 144 11
-206 145 10 200 144 11 192 133 9 175 118 6
-139 102 15 109 106 95 70 70 70 42 42 42
- 22 22 22 10 10 10 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 6 6 6 10 10 10
- 14 14 14 22 22 22 30 30 30 38 38 38
- 50 50 50 62 62 62 74 74 74 90 90 90
-101 98 89 112 100 78 121 87 25 124 80 6
-137 92 6 152 99 6 152 99 6 152 99 6
-138 86 6 124 80 6 98 70 6 86 66 30
-101 98 89 82 82 82 58 58 58 46 46 46
- 38 38 38 34 34 34 34 34 34 34 34 34
- 34 34 34 34 34 34 34 34 34 34 34 34
- 34 34 34 34 34 34 38 38 38 42 42 42
- 54 54 54 82 82 82 94 86 76 91 60 6
-134 86 6 156 107 11 167 114 7 175 118 6
-175 118 6 167 114 7 152 99 6 121 87 25
-101 98 89 62 62 62 34 34 34 18 18 18
- 6 6 6 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 6 6 6 6 6 6 10 10 10
- 18 18 18 22 22 22 30 30 30 42 42 42
- 50 50 50 66 66 66 86 86 86 101 98 89
-106 86 58 98 70 6 104 69 6 104 69 6
-104 69 6 91 60 6 82 62 34 90 90 90
- 62 62 62 38 38 38 22 22 22 14 14 14
- 10 10 10 10 10 10 10 10 10 10 10 10
- 10 10 10 10 10 10 6 6 6 10 10 10
- 10 10 10 10 10 10 10 10 10 14 14 14
- 22 22 22 42 42 42 70 70 70 89 81 66
- 80 54 7 104 69 6 124 80 6 137 92 6
-134 86 6 116 81 8 100 82 52 86 86 86
- 58 58 58 30 30 30 14 14 14 6 6 6
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 6 6 6 10 10 10 14 14 14
- 18 18 18 26 26 26 38 38 38 54 54 54
- 70 70 70 86 86 86 94 86 76 89 81 66
- 89 81 66 86 86 86 74 74 74 50 50 50
- 30 30 30 14 14 14 6 6 6 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 6 6 6 18 18 18 34 34 34 58 58 58
- 82 82 82 89 81 66 89 81 66 89 81 66
- 94 86 66 94 86 76 74 74 74 50 50 50
- 26 26 26 14 14 14 6 6 6 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 6 6 6 6 6 6 14 14 14 18 18 18
- 30 30 30 38 38 38 46 46 46 54 54 54
- 50 50 50 42 42 42 30 30 30 18 18 18
- 10 10 10 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 6 6 6 14 14 14 26 26 26
- 38 38 38 50 50 50 58 58 58 58 58 58
- 54 54 54 42 42 42 30 30 30 18 18 18
- 10 10 10 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 6 6 6
- 6 6 6 10 10 10 14 14 14 18 18 18
- 18 18 18 14 14 14 10 10 10 6 6 6
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 6 6 6
- 14 14 14 18 18 18 22 22 22 22 22 22
- 18 18 18 14 14 14 10 10 10 6 6 6
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 3 4 4 6 7 7
+8 10 10 8 10 10 6 8 8 6 7 7 3 4 4 2 2 2
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 4 5 5 17 18 17
+27 29 28 35 37 36 40 43 41 43 45 43 40 43 41 37 39 37
+32 34 33 27 30 29 23 25 24 17 21 21 15 18 18 12 15 15
+11 13 13 8 10 10 6 7 7 3 4 4 1 1 1 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 13 13 13 32 34 33 49 51 48 60 60 56 58 59 55
+55 57 54 55 56 53 49 51 48 43 45 43 39 40 39 33 37 35
+28 31 30 23 27 26 20 23 23 17 20 20 14 17 17 13 16 16
+11 14 14 10 13 13 10 12 12 9 11 11 8 10 10 6 7 7
+2 3 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 6 7 7 12 15 15
+12 15 15 8 9 9 2 3 3 0 0 0 1 1 1 25 27 26
+55 56 53 68 70 65 65 66 61 65 66 61 63 64 60 63 64 60
+58 59 55 51 52 50 47 48 46 41 42 42 35 37 36 30 32 31
+26 28 27 20 24 24 18 22 22 16 19 19 14 17 17 13 16 16
+12 15 15 11 14 14 10 13 13 10 12 12 9 11 11 8 10 10
+8 9 9 6 8 8 3 3 3 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 6 7 7 20 24 24 23 27 26
+23 27 26 18 22 22 11 13 13 23 24 24 61 63 57 72 73 67
+72 73 67 68 70 65 68 70 65 68 70 65 63 64 60 58 59 55
+55 56 53 47 48 46 41 42 42 35 37 36 30 32 31 26 28 27
+20 24 24 18 22 22 16 20 20 15 19 19 14 17 17 13 16 16
+12 15 15 12 15 15 11 14 14 10 13 13 10 12 12 9 11 11
+8 10 10 8 9 9 7 9 9 6 7 7 1 2 2 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 1 1 1 4 5 5 5 6 5 4 5 5
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 15 19 19 40 41 39 53 55 47
+33 36 34 27 30 29 51 52 50 72 73 67 72 73 67 72 73 67
+72 73 67 68 70 65 68 70 65 63 64 60 58 59 55 51 52 50
+47 48 46 40 43 41 33 37 35 30 32 31 26 28 27 20 24 24
+18 22 22 17 21 21 16 19 19 14 18 18 14 17 17 13 17 17
+13 16 16 12 15 15 12 15 15 11 14 14 10 13 13 10 12 12
+9 11 11 8 10 10 8 9 9 7 9 9 6 8 8 3 4 4
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+2 2 2 6 8 8 10 12 12 10 12 12 10 12 12 10 12 12
+6 8 8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 20 23 23 71 71 57 131 127 93
+115 113 82 63 64 60 72 73 67 72 73 67 72 73 67 72 73 67
+68 70 65 65 66 61 61 63 57 55 57 54 49 51 48 43 45 43
+39 40 39 33 36 34 28 31 30 23 27 26 20 24 24 20 23 23
+17 21 21 16 20 20 15 19 19 15 18 18 14 18 18 14 17 17
+13 17 17 13 16 16 12 15 15 12 15 15 11 14 14 10 13 13
+10 12 12 9 11 11 8 10 10 7 9 9 7 9 9 6 8 8
+4 5 5 0 0 0 0 0 0 0 0 0 1 1 1 6 7 7
+10 12 12 10 12 12 10 12 12 10 12 12 10 12 12 10 12 12
+10 12 12 3 4 4 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 18 22 22 71 71 57 144 139 99
+84 83 72 68 70 65 72 73 67 72 73 67 68 70 65 65 66 61
+63 64 60 55 57 54 51 52 50 47 48 46 40 43 41 35 37 36
+30 32 31 27 29 28 23 27 26 20 24 24 18 22 22 17 21 21
+16 20 20 15 19 19 15 19 19 15 19 19 15 18 18 14 18 18
+14 17 17 13 17 17 13 16 16 12 15 15 12 15 15 11 14 14
+10 13 13 9 12 12 9 11 11 8 10 10 7 9 9 6 8 8
+6 8 8 3 4 4 0 0 0 2 2 2 8 10 10 10 12 12
+10 12 12 10 12 12 11 13 13 36 38 35 61 61 53 48 49 45
+10 12 12 7 9 9 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 15 19 19 61 61 53 84 83 72
+68 70 65 72 73 67 68 70 65 68 70 65 63 64 60 58 59 55
+51 52 50 47 48 46 41 42 42 37 39 37 32 35 33 28 31 30
+23 27 26 20 24 24 20 23 23 18 22 22 17 21 21 17 21 21
+17 21 21 17 21 21 17 20 20 16 20 20 16 20 20 16 19 19
+15 18 18 14 18 18 13 17 17 13 16 16 12 15 15 12 15 15
+11 14 14 10 13 13 9 12 12 9 11 11 8 10 10 7 9 9
+6 8 8 6 8 8 5 6 5 9 11 11 10 12 12 10 12 12
+19 20 18 82 81 62 149 145 103 160 154 106 142 137 94 96 95 69
+10 12 12 10 12 12 1 1 1 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 10 12 12 44 46 43 68 70 65
+72 73 67 68 70 65 68 70 65 63 64 60 55 57 54 49 51 48
+43 45 43 39 40 39 33 37 35 30 32 31 26 28 27 23 27 26
+20 24 24 18 22 22 18 22 22 18 22 22 18 22 22 20 23 23
+20 24 24 23 25 24 23 25 24 22 24 23 20 23 23 18 22 22
+17 20 20 15 19 19 15 18 18 14 17 17 13 16 16 12 15 15
+11 14 14 11 13 13 10 12 12 9 11 11 8 10 10 8 9 9
+7 9 9 7 9 9 10 12 12 10 12 12 10 12 12 71 71 57
+164 159 111 186 182 128 186 182 128 171 165 117 151 147 98 96 95 69
+10 12 12 10 12 12 3 3 3 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 8 10 10 63 64 60 68 70 65
+72 73 67 68 70 65 63 64 60 55 57 54 47 48 46 40 43 41
+33 37 35 30 32 31 27 29 28 23 27 26 20 24 24 20 23 23
+18 22 22 18 22 22 20 23 22 21 25 23 23 27 26 27 29 28
+28 31 30 31 33 31 31 33 31 31 33 31 28 31 30 26 28 27
+23 25 24 20 23 22 16 20 20 15 18 18 14 17 17 13 16 16
+12 15 15 11 14 14 10 13 13 10 12 12 9 11 11 8 10 10
+10 12 12 10 13 13 10 12 12 12 14 14 96 95 69 165 161 109
+186 182 128 192 187 134 192 187 134 176 171 126 160 154 106 103 101 77
+10 12 12 10 12 12 5 6 5 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 35 37 36 68 70 65 72 73 67
+68 70 65 65 66 61 58 59 55 49 51 48 40 43 41 33 37 35
+28 31 30 23 27 26 20 24 24 20 23 23 18 22 22 18 22 22
+18 22 22 20 23 23 23 27 26 27 30 29 32 35 33 37 39 37
+40 43 41 44 46 43 46 47 43 44 46 43 40 43 41 36 38 35
+31 33 31 27 29 28 22 24 23 17 21 21 15 18 18 14 17 17
+13 16 16 12 15 15 11 14 14 11 14 14 11 13 13 13 16 16
+13 16 16 11 14 14 10 12 12 79 78 62 142 137 94 164 159 111
+178 174 128 192 187 134 192 187 134 176 171 126 160 154 106 96 95 69
+10 12 12 10 12 12 6 7 7 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 55 57 54 68 70 65 72 73 67
+68 70 65 63 64 60 55 56 53 43 45 43 35 37 36 28 31 30
+23 27 26 20 24 24 18 22 22 17 21 21 17 21 21 17 21 21
+20 24 24 25 27 26 31 33 31 38 39 37 46 47 43 53 55 47
+61 61 53 66 65 55 66 65 55 66 65 55 61 61 53 53 55 47
+46 47 43 37 39 37 30 33 30 24 26 24 17 21 21 15 18 18
+13 17 17 12 15 15 12 15 15 13 16 16 14 18 18 14 18 18
+14 17 17 12 15 15 30 31 28 118 116 76 134 131 96 160 154 106
+174 170 121 178 174 128 178 174 128 171 165 117 151 147 98 96 95 69
+10 12 12 10 12 12 6 8 8 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 63 64 60 68 70 65 68 70 65
+65 66 61 58 59 55 49 51 48 39 40 39 30 32 31 23 27 26
+20 24 24 18 22 22 17 21 21 16 20 20 17 21 21 20 23 23
+25 27 26 32 35 33 43 44 41 53 55 47 66 65 55 75 75 61
+82 81 62 84 83 72 87 86 72 87 86 72 82 81 62 75 75 61
+66 65 55 53 55 47 40 41 39 31 33 31 23 25 24 17 20 20
+14 18 18 13 16 16 12 15 15 12 15 15 13 17 17 14 18 18
+14 18 18 13 16 16 46 47 43 96 95 69 125 122 87 142 137 94
+160 154 106 165 161 109 164 159 111 155 149 109 142 137 94 75 75 61
+10 12 12 10 12 12 6 8 8 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 60 60 56 68 70 65 68 70 65
+63 64 60 55 57 54 46 47 45 35 37 36 27 30 29 23 25 24
+18 22 22 17 21 21 16 20 20 17 21 21 18 22 22 23 27 26
+31 33 31 43 44 41 55 56 53 71 71 57 84 83 72 92 91 72
+103 101 77 92 91 72 82 81 62 82 81 62 87 86 72 92 91 72
+84 83 72 71 71 57 55 56 53 43 44 41 30 33 30 22 24 23
+16 19 19 14 17 17 12 15 15 12 15 15 13 16 16 14 18 18
+14 18 18 14 17 17 43 44 41 82 81 62 118 116 76 125 122 87
+142 137 94 144 139 99 144 139 99 134 131 96 118 116 76 53 55 47
+10 12 12 10 12 12 6 8 8 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 47 48 46 63 64 60 63 64 60
+55 57 54 49 51 48 40 43 41 32 34 33 26 28 27 20 24 24
+18 22 22 16 20 20 16 20 20 17 21 21 20 24 24 28 31 30
+40 41 39 53 55 47 75 75 61 90 89 73 87 86 72 48 49 45
+14 14 13 2 2 2 1 2 2 1 1 1 1 1 1 2 2 2
+19 20 18 43 44 41 66 65 55 53 55 47 38 39 37 26 28 27
+18 22 22 14 18 18 13 16 16 12 15 15 12 15 15 13 17 17
+14 18 18 14 18 18 30 31 28 66 65 55 96 95 69 103 101 77
+118 116 76 118 116 76 118 116 76 118 116 76 103 101 77 36 38 35
+10 12 12 10 12 12 6 7 7 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 28 31 30 55 57 54 51 52 50
+49 51 48 41 42 42 35 37 36 28 31 30 23 27 26 20 23 23
+17 21 21 16 20 20 16 20 20 18 22 22 23 27 26 33 36 34
+48 49 45 71 71 57 82 81 62 43 44 41 8 9 9 6 7 7
+6 7 7 6 7 7 6 7 7 5 6 5 4 5 5 3 4 4
+2 3 3 1 2 2 4 5 4 36 38 35 48 49 45 32 35 33
+21 25 23 16 19 19 13 17 17 12 15 15 12 15 15 13 16 16
+14 18 18 14 18 18 16 18 16 36 38 35 61 61 53 82 81 62
+96 95 69 96 95 69 96 95 69 96 95 69 79 78 62 19 20 18
+10 12 12 10 12 12 4 5 5 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 13 13 13 46 47 45 43 45 43
+40 43 41 35 37 36 30 32 31 23 27 26 20 24 24 18 22 22
+17 21 21 16 20 20 17 21 21 20 23 23 27 30 29 40 41 39
+61 61 53 53 55 47 16 17 16 9 11 11 10 12 12 10 12 12
+10 12 12 10 12 12 10 12 12 9 11 11 8 10 10 8 9 9
+6 8 8 5 6 5 4 5 5 2 3 3 19 20 18 38 39 37
+26 28 27 17 21 21 14 17 17 13 16 16 12 15 15 12 15 15
+13 17 17 14 18 18 12 15 15 13 12 7 30 31 28 46 47 43
+53 55 47 66 65 55 66 65 55 53 55 47 36 38 35 10 12 12
+10 12 12 10 12 12 2 3 3 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 1 1 1 33 37 35 35 37 36
+32 35 33 28 31 30 23 27 26 20 24 24 18 22 22 17 21 21
+16 20 20 16 20 20 17 21 21 21 25 23 31 33 31 44 46 43
+31 33 31 11 13 13 12 14 14 12 15 15 13 16 16 14 17 17
+14 17 17 14 17 17 14 17 17 13 16 16 12 15 15 12 14 14
+11 13 13 9 11 11 8 10 10 6 8 8 4 5 5 17 18 17
+30 33 30 20 23 22 15 18 18 13 16 16 12 15 15 12 14 14
+13 16 16 14 17 17 14 18 18 11 12 11 7 7 5 16 17 12
+21 22 20 30 31 28 25 27 25 21 22 20 14 14 13 10 12 12
+10 12 12 9 11 11 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 18 22 22 27 30 29
+27 29 28 40 41 39 53 55 47 53 55 47 53 55 47 46 47 43
+25 27 25 16 20 20 17 21 21 23 25 24 31 33 31 20 20 20
+12 15 15 14 17 17 15 19 19 16 20 20 17 21 21 18 22 22
+18 22 22 18 22 22 18 22 22 17 21 21 17 21 21 16 19 19
+15 18 18 13 16 16 12 15 15 10 12 12 8 10 10 6 8 8
+21 22 21 22 24 23 15 19 19 13 17 17 13 16 16 12 15 15
+12 15 15 13 17 17 14 18 18 14 18 18 13 15 14 10 9 6
+7 7 5 7 7 5 7 7 5 9 11 11 10 12 12 10 12 12
+10 12 12 6 7 7 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 16 17 12 82 81 62
+118 116 76 118 116 76 161 156 96 161 156 96 161 156 96 118 116 76
+118 116 76 96 95 69 53 55 47 22 24 23 14 17 17 13 16 16
+15 19 19 17 21 21 18 22 22 20 24 24 20 24 24 23 27 26
+23 27 26 23 27 26 23 27 26 23 27 26 23 27 26 20 24 24
+20 23 23 17 21 21 16 19 19 14 17 17 12 15 15 10 12 12
+9 11 11 20 23 22 16 19 19 14 17 17 13 16 16 12 15 15
+11 14 14 13 16 16 14 17 17 14 18 18 14 17 17 12 15 15
+10 12 12 10 12 12 10 12 12 10 12 12 10 12 12 10 12 12
+9 11 11 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 53 55 47 161 156 96
+161 156 96 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 161 156 96 118 116 76 96 95 69 21 22 20 16 19 19
+18 22 22 20 24 24 23 27 26 23 27 26 26 28 27 27 30 29
+27 30 29 18 22 22 12 14 14 8 10 10 9 11 11 17 21 21
+23 27 26 23 27 26 20 24 24 18 22 22 16 20 20 14 17 17
+12 14 14 14 17 17 16 20 20 14 17 17 13 17 17 13 16 16
+12 15 15 12 15 15 13 17 17 14 18 18 14 17 17 13 16 16
+11 13 13 10 12 12 10 12 12 10 12 12 10 12 12 10 12 12
+4 5 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 13 12 7 118 116 76 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 161 156 96 118 116 76 30 31 28
+20 24 24 23 27 26 27 30 29 28 31 30 30 32 31 23 27 26
+16 19 19 17 21 21 12 15 15 9 11 11 10 12 12 9 11 11
+20 24 24 28 31 30 26 28 27 23 27 26 20 24 24 17 21 21
+15 19 19 13 16 16 16 19 19 14 18 18 14 17 17 13 16 16
+12 15 15 11 14 14 13 16 16 14 17 17 14 18 18 14 17 17
+12 15 15 10 12 12 10 12 12 10 12 12 10 12 12 8 9 9
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 82 81 62 161 156 96 230 229 82
+230 229 82 233 233 100 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 161 156 96 118 116 76
+27 29 28 27 30 29 30 32 31 30 32 31 23 27 26 20 24 24
+26 28 27 17 21 21 6 7 7 72 73 67 145 141 105 15 15 15
+14 17 17 33 37 35 30 32 31 28 31 30 26 28 27 23 27 26
+20 23 23 16 20 20 15 19 19 14 18 18 14 17 17 13 16 16
+12 15 15 11 14 14 12 15 15 13 17 17 14 18 18 14 17 17
+13 16 16 11 13 13 10 12 12 10 12 12 9 11 11 1 1 1
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 16 17 12 161 156 96 230 229 82 230 229 82
+243 242 120 235 234 117 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 161 156 96
+82 81 62 28 31 30 28 31 30 27 30 29 28 31 30 30 32 31
+33 37 35 13 16 16 3 3 3 105 104 92 210 208 158 12 14 14
+17 21 21 33 37 35 33 37 35 32 35 33 30 32 31 27 30 29
+23 27 26 20 23 23 17 20 20 15 18 18 14 18 18 13 17 17
+13 16 16 12 15 15 11 14 14 13 16 16 14 17 17 14 18 18
+13 17 17 12 15 15 10 12 12 10 12 12 3 4 4 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 96 95 69 230 229 82 230 229 82 244 244 132
+241 241 143 243 242 120 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+161 156 96 46 47 43 32 35 33 33 37 35 33 37 35 33 37 35
+40 43 41 23 27 26 1 1 1 2 2 2 24 26 24 14 17 17
+23 27 26 33 37 35 33 37 35 33 37 35 33 37 35 30 32 31
+27 30 29 23 27 26 20 23 23 15 18 18 14 18 18 14 17 17
+13 16 16 12 15 15 11 14 14 12 15 15 13 17 17 14 17 17
+14 17 17 13 16 16 11 13 13 6 8 8 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 16 17 12 161 156 96 230 229 82 235 234 117 239 239 170
+239 239 170 236 236 101 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 118 116 76 33 37 35 33 37 35 37 39 37 37 39 37
+43 45 43 49 51 48 20 24 24 8 10 10 17 20 20 35 37 36
+33 37 35 40 43 41 37 39 37 35 37 36 33 37 35 33 37 35
+30 32 31 27 30 29 23 27 26 15 19 19 14 18 18 14 17 17
+13 17 17 13 16 16 12 15 15 11 14 14 13 16 16 14 17 17
+14 17 17 13 17 17 11 14 14 4 5 5 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 96 95 69 230 229 82 230 229 82 239 239 170 251 251 187
+241 241 143 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 161 156 96 36 38 35 33 37 35 33 37 35 33 37 35
+37 39 37 47 48 46 55 57 54 55 57 54 49 51 48 43 45 43
+43 45 43 43 45 43 40 43 41 40 43 41 37 39 37 33 37 35
+33 37 35 28 31 30 26 28 27 16 20 20 15 18 18 14 18 18
+14 17 17 13 16 16 12 15 15 11 14 14 12 15 15 13 17 17
+14 17 17 14 17 17 8 10 10 5 7 7 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+16 17 12 230 229 82 230 229 82 243 242 120 251 251 187 251 251 187
+246 246 123 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 66 65 55 30 32 31 32 35 33 33 37 35
+33 37 35 37 39 37 40 43 41 47 48 46 49 51 48 51 52 50
+55 57 54 55 57 54 51 52 50 47 48 46 43 45 43 39 40 39
+33 37 35 30 32 31 26 28 27 17 21 21 15 19 19 14 18 18
+14 17 17 13 16 16 12 15 15 12 14 14 11 14 14 13 16 16
+14 17 17 12 15 15 7 9 9 6 8 8 1 1 1 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+96 95 69 230 229 82 230 229 82 239 239 170 251 251 187 239 239 170
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 96 95 69 27 30 29 28 31 30 30 32 31
+33 37 35 40 43 41 46 47 45 55 57 54 63 64 60 72 73 67
+72 73 67 72 73 67 72 73 67 65 66 61 55 57 54 47 48 46
+39 40 39 32 35 33 27 30 29 17 21 21 15 19 19 15 18 18
+14 18 18 13 17 17 13 16 16 12 15 15 11 14 14 12 14 14
+13 16 16 9 11 11 7 9 9 9 11 11 66 65 55 115 113 82
+21 22 20 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 13 12 7
+230 229 82 230 229 82 236 236 101 251 251 187 251 251 187 246 246 123
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 118 116 76 23 27 26 26 28 27 32 35 33
+51 52 50 90 89 73 110 109 94 145 141 105 168 163 120 177 172 135
+177 172 135 188 184 146 188 184 146 181 176 137 194 191 148 188 184 146
+184 179 149 188 184 146 188 184 146 156 151 111 177 172 135 181 176 137
+177 172 135 168 163 120 168 163 120 158 153 112 156 151 111 158 153 112
+156 151 111 158 153 112 177 172 135 188 184 146 188 184 146 194 189 146
+36 38 35 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 82 81 62
+230 229 82 230 229 82 244 244 132 251 251 187 244 244 132 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 161 156 96 82 81 62
+96 95 69 230 229 82 181 178 103 110 109 94 156 151 111 188 184 146
+188 184 146 197 193 154 188 184 146 184 181 136 188 184 146 168 163 120
+168 163 120 178 174 128 156 151 111 158 153 112 174 170 121 156 151 111
+156 151 111 158 153 112 156 151 111 168 163 120 178 174 128 181 176 137
+176 171 126 178 174 128 184 181 136 176 171 126 178 174 128 184 181 136
+176 171 126 178 174 128 184 181 136 164 159 111 155 149 109 96 95 69
+1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 2 2 1 161 156 96
+230 229 82 230 229 82 244 244 132 244 244 132 236 236 101 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 46 47 43 82 81 62
+158 153 112 197 193 154 194 189 146 184 181 136 188 184 146 168 163 120
+156 151 111 137 133 100 131 127 93 137 133 100 137 133 100 158 153 112
+121 119 87 137 133 100 156 151 111 145 141 105 99 98 80 84 83 72
+63 64 60 52 53 49 40 43 41 33 36 34 36 38 35 36 38 35
+38 39 37 43 44 41 43 44 41 46 47 43 48 49 45 48 49 45
+46 47 43 36 38 35 30 31 28 19 20 18 6 7 7 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 36 38 35 230 229 82
+230 229 82 230 229 82 246 246 123 236 236 101 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 53 55 47 121 119 87
+176 171 126 171 165 117 161 156 96 82 81 62 53 55 47 33 37 35
+39 40 39 63 64 60 99 98 80 121 119 87 137 133 100 177 172 135
+176 171 126 184 181 136 131 127 93 131 127 93 110 109 94 84 83 72
+51 52 50 39 40 39 27 29 28 18 22 22 16 19 19 15 19 19
+15 19 19 14 18 18 14 17 17 13 16 16 12 15 15 11 14 14
+10 13 13 9 12 12 9 11 11 8 9 9 7 9 9 1 1 1
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 118 116 76 230 229 82
+230 229 82 230 229 82 236 236 101 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 96 95 69 71 71 57
+36 38 35 118 116 76 118 116 76 12 15 15 15 18 18 20 24 24
+33 37 35 55 56 53 84 83 72 110 109 94 145 141 105 110 109 94
+168 163 120 121 119 87 156 151 111 131 127 93 87 86 72 61 63 57
+47 48 46 28 31 30 18 22 22 15 19 19 15 18 18 15 19 19
+15 19 19 14 18 18 14 17 17 13 17 17 13 16 16 12 15 15
+11 13 13 10 12 12 9 11 11 8 10 10 7 9 9 3 3 3
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 1 1 0 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 161 156 96
+161 156 96 230 229 82 118 116 76 11 14 14 14 17 17 18 22 22
+27 30 29 40 43 41 60 60 56 84 83 72 105 104 92 110 109 94
+110 109 94 110 109 94 99 98 80 90 89 73 68 70 65 47 48 46
+32 34 33 23 25 24 20 23 23 17 21 21 15 19 19 14 17 17
+15 19 19 15 18 18 14 18 18 13 17 17 13 16 16 12 15 15
+11 14 14 10 12 12 9 11 11 8 10 10 7 9 9 4 5 5
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 16 17 12 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 161 156 96 118 116 76 11 13 13 13 16 16 15 19 19
+20 24 24 30 32 31 40 43 41 51 52 50 63 64 60 72 73 67
+65 66 61 65 66 61 65 66 61 55 57 54 46 47 45 33 37 35
+27 29 28 20 24 24 17 21 21 16 20 20 16 20 20 15 19 19
+15 19 19 15 19 19 14 18 18 14 17 17 13 16 16 12 15 15
+11 14 14 10 13 13 9 12 12 8 10 10 7 9 9 6 7 7
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 53 55 47 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+161 156 96 118 116 76 53 55 47 10 13 13 12 15 15 14 17 17
+17 20 20 20 24 24 27 29 28 32 34 33 37 39 37 40 43 41
+43 45 43 41 42 42 35 37 36 30 32 31 28 31 30 23 27 26
+20 23 23 17 21 21 16 20 20 16 20 20 16 20 20 16 19 19
+15 19 19 15 19 19 14 18 18 14 17 17 13 16 16 12 15 15
+11 14 14 10 13 13 9 12 12 9 11 11 8 10 10 10 12 12
+1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 82 81 62 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 161 156 96 161 156 96
+118 116 76 82 81 62 13 14 12 10 13 13 12 15 15 13 17 17
+15 19 19 16 20 20 20 23 23 20 24 24 23 27 26 26 28 27
+26 28 27 26 28 27 23 27 26 18 22 22 20 23 23 17 21 21
+17 21 21 16 20 20 16 20 20 16 20 20 16 20 20 16 19 19
+15 19 19 15 19 19 15 18 18 14 17 17 13 17 17 13 16 16
+12 15 15 12 14 14 12 14 14 12 14 14 12 14 14 23 24 24
+6 8 8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 118 116 76 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 161 156 96 161 156 96 118 116 76
+71 71 57 13 14 12 9 12 12 10 13 13 12 15 15 13 17 17
+15 18 18 15 19 19 16 20 20 17 21 21 17 21 21 18 22 22
+18 22 22 18 22 22 17 21 21 16 19 19 15 18 18 14 18 18
+16 19 19 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
+15 19 19 15 19 19 15 18 18 14 18 18 16 20 20 23 25 24
+17 21 21 25 27 26 47 48 46 47 48 46 51 52 50 72 73 67
+33 36 34 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 118 116 76 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 161 156 96 118 116 76 118 116 76 46 47 43
+9 11 11 9 11 11 10 12 12 11 13 13 12 15 15 14 17 17
+15 18 18 15 19 19 16 20 20 16 20 20 16 20 20 16 20 20
+16 20 20 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
+15 19 19 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
+15 19 19 16 20 20 20 24 24 55 56 53 32 34 33 84 83 72
+90 89 73 110 109 94 110 109 94 105 104 92 110 109 94 110 109 94
+72 73 67 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 96 95 69 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 161 156 96 118 116 76 82 81 62 16 17 12 9 11 11
+9 11 11 9 12 12 10 13 13 12 14 14 13 16 16 14 18 18
+15 19 19 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
+16 20 20 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
+16 20 20 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
+16 19 19 33 36 34 99 98 80 156 151 111 145 141 105 184 179 149
+168 163 120 184 179 149 177 172 135 156 151 111 145 141 105 110 109 94
+90 89 73 2 2 2 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 71 71 57 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 230 229 82
+230 229 82 161 156 96 230 229 82 230 229 82 230 229 82 161 156 96
+118 116 76 82 81 62 30 31 28 9 11 11 9 11 11 9 11 11
+10 12 12 10 13 13 11 14 14 13 16 16 14 17 17 15 18 18
+15 19 19 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
+16 20 20 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
+16 20 20 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
+18 22 22 58 59 55 137 133 100 197 193 154 214 212 158 210 208 158
+197 193 154 184 179 149 184 179 149 137 133 100 110 109 94 99 98 80
+84 83 72 10 10 9 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 16 17 12 230 229 82 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 230 229 82 161 156 96
+161 156 96 161 156 96 161 156 96 161 156 96 118 116 76 71 71 57
+21 22 20 12 14 14 11 13 13 10 12 12 10 12 12 10 13 13
+11 13 13 12 15 15 13 16 16 14 17 17 14 18 18 15 19 19
+16 20 20 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
+16 20 20 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
+16 20 20 16 20 20 16 20 20 16 20 20 16 20 20 17 21 21
+23 27 26 84 83 72 184 179 149 251 251 187 210 208 158 184 179 149
+184 179 149 156 151 111 110 109 94 84 83 72 63 64 60 51 52 50
+18 22 22 6 8 8 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 118 116 76 230 229 82
+230 229 82 230 229 82 230 229 82 230 229 82 161 156 96 161 156 96
+161 156 96 161 156 96 118 116 76 53 55 47 20 23 22 16 19 19
+13 16 16 12 15 15 12 14 14 11 14 14 11 14 14 11 14 14
+12 15 15 13 16 16 14 17 17 15 19 19 16 20 20 17 21 21
+23 27 26 18 22 22 20 24 24 23 27 26 30 32 31 17 21 21
+16 20 20 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
+16 20 20 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
+23 27 26 33 37 35 137 133 100 156 151 111 158 153 112 105 104 92
+105 104 92 68 70 65 39 40 39 18 22 22 12 14 14 12 15 15
+9 11 11 4 5 5 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 16 17 12 230 229 82
+230 229 82 230 229 82 230 229 82 161 156 96 118 116 76 118 116 76
+118 116 76 66 65 55 43 45 43 32 34 33 25 27 26 20 23 22
+17 20 20 15 18 18 14 17 17 15 18 18 13 16 16 14 17 17
+14 18 18 16 20 20 32 34 33 55 57 54 58 59 55 72 73 67
+105 104 92 55 57 54 65 66 61 63 64 60 40 43 41 33 37 35
+41 42 42 20 24 24 16 20 20 16 20 20 16 20 20 16 20 20
+16 20 20 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
+17 21 21 26 28 27 30 32 31 35 37 36 68 70 65 39 40 39
+23 27 26 15 18 18 13 16 16 11 14 14 9 12 12 8 10 10
+7 9 9 6 7 7 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 36 38 35
+230 229 82 230 229 82 230 229 82 96 95 69 30 31 28 49 51 48
+90 89 73 68 70 65 55 57 54 47 48 46 47 48 46 43 45 43
+32 34 33 43 45 43 43 45 43 23 27 26 25 27 26 40 43 41
+40 43 41 90 89 73 110 109 94 145 141 105 156 151 111 156 151 111
+184 179 149 184 179 149 177 172 135 184 179 149 137 133 100 84 83 72
+105 104 92 63 64 60 49 51 48 47 48 46 28 31 30 18 22 22
+16 20 20 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
+16 20 20 15 19 19 15 19 19 15 19 19 18 22 22 15 19 19
+13 16 16 12 15 15 11 14 14 10 13 13 9 12 12 9 11 11
+8 10 10 6 8 8 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+30 31 28 230 229 82 71 71 57 2 2 1 0 0 0 58 59 55
+105 104 92 84 83 72 65 66 61 84 83 72 110 109 94 110 109 94
+145 141 105 105 104 92 110 109 94 110 109 94 84 83 72 110 109 94
+158 153 112 197 193 154 197 193 154 239 239 170 251 251 187 251 251 187
+251 251 187 251 251 187 251 251 187 251 251 187 210 208 158 197 193 154
+197 193 154 184 179 149 145 141 105 137 133 100 105 104 92 47 48 46
+20 23 23 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
+16 20 20 16 19 19 15 19 19 15 19 19 14 18 18 14 17 17
+13 17 17 13 16 16 12 14 14 12 14 14 13 13 13 13 13 13
+13 13 13 12 12 12 10 10 9 6 7 7 2 2 2 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 65 66 61
+105 104 92 84 83 72 84 83 72 110 109 94 184 179 149 210 208 158
+210 208 158 210 208 158 214 212 158 197 193 154 214 212 158 210 208 158
+251 251 187 251 251 187 251 251 187 251 251 187 251 251 187 251 251 187
+251 251 187 251 251 187 251 251 187 251 251 187 251 251 187 251 251 187
+251 251 187 251 251 187 239 239 170 251 251 187 184 179 149 84 83 72
+26 28 27 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
+16 20 20 16 20 20 15 19 19 15 19 19 15 18 18 14 18 18
+13 17 17 13 16 16 15 15 15 14 14 13 14 14 13 14 14 13
+13 13 13 13 13 13 12 12 12 12 12 12 12 12 12 3 4 4
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 72 73 67
+105 104 92 99 98 80 84 83 72 99 98 80 177 172 135 197 193 154
+251 251 187 251 251 187 251 251 187 251 251 187 251 251 187 251 251 187
+251 251 187 251 251 187 251 251 187 251 251 187 251 251 187 251 251 187
+251 251 187 251 251 187 251 251 187 251 251 187 251 251 187 251 251 187
+251 251 187 251 251 187 251 251 187 214 212 158 197 193 154 99 98 80
+23 27 26 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
+16 20 20 16 20 20 15 19 19 15 19 19 15 18 18 14 18 18
+14 17 17 16 16 16 16 16 16 16 16 16 15 15 15 14 14 13
+14 14 13 13 13 13 13 13 13 12 12 12 12 12 12 12 12 12
+3 3 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 84 83 72
+110 109 94 99 98 80 72 73 67 63 64 60 99 98 80 177 172 135
+184 179 149 210 208 158 251 251 187 251 251 187 251 251 187 251 251 187
+251 251 187 251 251 187 251 251 187 251 251 187 251 251 187 251 251 187
+251 251 187 251 251 187 251 251 187 251 251 187 251 251 187 251 251 187
+251 251 187 210 208 158 184 179 149 177 172 135 110 109 94 33 37 35
+17 21 21 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
+16 20 20 16 20 20 15 19 19 15 19 19 15 19 19 14 18 18
+15 18 18 18 19 18 18 19 18 17 17 17 16 16 16 15 15 15
+14 14 13 13 13 13 13 13 13 12 12 12 12 12 12 12 12 12
+10 10 9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 2 2 2 105 104 92
+108 107 93 99 98 80 72 73 67 63 64 60 51 52 50 87 86 72
+105 104 92 110 109 94 108 107 93 156 151 111 184 179 149 184 179 149
+197 193 154 197 193 154 197 193 154 184 179 149 184 179 149 177 172 135
+197 193 154 156 151 111 177 172 135 184 179 149 168 163 120 137 133 100
+145 141 105 110 109 94 99 98 80 47 48 46 55 57 54 15 19 19
+16 19 19 16 20 20 16 20 20 16 20 20 16 20 20 16 20 20
+17 20 20 17 21 21 16 20 20 16 19 19 15 19 19 16 19 19
+20 20 20 21 22 21 20 20 20 19 20 19 18 19 18 16 16 16
+15 15 15 14 14 13 13 13 13 13 13 13 12 12 12 12 12 12
+12 12 12 4 5 5 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 58 59 55 110 109 94
+105 104 92 90 89 73 72 73 67 55 57 54 43 45 43 39 40 39
+43 45 43 46 47 45 43 45 43 68 70 65 65 66 61 63 64 60
+108 107 93 72 73 67 105 104 92 90 89 73 72 73 67 40 43 41
+72 73 67 68 70 65 68 70 65 58 59 55 63 64 60 49 51 48
+43 45 43 33 36 34 27 30 29 20 24 24 16 20 20 15 19 19
+15 19 19 15 19 19 15 19 19 16 19 19 16 20 20 16 20 20
+17 21 21 20 24 24 20 23 22 17 21 21 17 20 20 20 20 20
+21 22 21 21 22 21 21 22 21 21 22 21 20 20 20 18 19 18
+16 16 16 15 15 15 13 13 13 13 13 13 12 12 12 12 12 12
+12 12 12 10 10 9 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 21 22 21 110 109 94 110 109 94
+105 104 92 84 83 72 68 70 65 51 52 50 41 42 42 33 37 35
+28 31 30 23 27 26 20 23 23 18 22 22 17 20 20 25 27 26
+26 28 27 27 30 29 25 27 26 20 23 23 23 27 26 30 32 31
+20 24 24 17 21 21 18 22 22 15 19 19 26 28 27 20 23 23
+14 18 18 15 19 19 15 18 18 15 19 19 15 19 19 15 19 19
+15 19 19 15 19 19 15 19 19 15 19 19 15 19 19 16 19 19
+16 20 20 22 24 23 24 26 24 22 24 23 20 23 22 22 24 23
+24 26 24 24 26 24 23 24 24 22 24 23 21 22 21 19 20 19
+17 17 17 15 15 15 14 14 13 13 13 13 12 12 12 12 12 12
+12 12 12 12 12 12 2 2 2 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 2 2 2 99 98 80 110 109 94 108 107 93
+105 104 92 84 83 72 63 64 60 49 51 48 39 40 39 32 34 33
+27 30 29 23 25 24 20 23 23 17 20 20 15 19 19 14 18 18
+14 17 17 13 17 17 13 17 17 13 17 17 13 17 17 13 17 17
+14 17 17 14 17 17 14 17 17 14 17 17 14 17 17 14 17 17
+14 18 18 14 18 18 14 18 18 14 18 18 15 18 18 15 19 19
+15 19 19 15 19 19 15 19 19 15 19 19 15 19 19 15 19 19
+15 19 19 17 21 21 27 29 28 26 28 27 25 27 26 25 27 26
+27 29 28 27 29 28 26 28 27 24 26 24 21 22 21 20 20 20
+18 19 18 16 16 16 14 14 13 13 13 13 12 12 12 12 12 12
+12 12 12 12 12 12 4 5 5 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 51 52 50 110 109 94 110 109 94 105 104 92
+90 89 73 72 73 67 55 57 54 43 45 43 35 37 36 30 32 31
+26 28 27 20 24 24 17 21 21 16 19 19 15 18 18 14 17 17
+13 16 16 13 16 16 13 16 16 13 16 16 13 16 16 13 16 16
+13 16 16 13 16 16 13 16 16 13 17 17 13 17 17 14 17 17
+14 17 17 14 17 17 14 17 17 14 18 18 14 18 18 14 18 18
+15 18 18 15 18 18 15 19 19 15 19 19 15 19 19 15 19 19
+15 19 19 15 19 19 27 29 28 32 34 33 28 31 30 27 29 28
+30 32 31 30 32 31 30 31 28 26 28 27 23 24 24 21 22 21
+19 20 19 16 16 16 14 14 13 13 13 13 12 12 12 12 12 12
+12 12 12 12 12 12 6 7 7 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 3 3 3 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 10 10 9 108 107 93 110 109 94 108 107 93 99 98 80
+84 83 72 63 64 60 49 51 48 40 43 41 33 36 34 27 30 29
+23 27 26 18 22 22 17 20 20 15 18 18 14 17 17 13 16 16
+13 16 16 13 16 16 12 15 15 12 15 15 12 15 15 12 15 15
+13 16 16 13 16 16 13 16 16 13 16 16 13 16 16 13 16 16
+13 17 17 13 17 17 14 17 17 14 17 17 14 17 17 14 18 18
+14 18 18 14 18 18 15 18 18 15 18 18 15 19 19 15 19 19
+15 19 19 15 19 19 17 21 21 33 36 34 32 34 33 31 33 31
+33 36 34 33 36 34 31 33 31 27 29 28 25 27 26 21 22 21
+19 20 19 17 17 17 15 15 15 13 13 13 12 12 12 12 12 12
+12 12 12 12 12 12 8 8 7 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 63 64 60 137 133 100 43 45 43 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 68 70 65 110 109 94 110 109 94 105 104 92 84 83 72
+68 70 65 55 57 54 43 45 43 35 37 36 30 32 31 26 28 27
+20 24 24 17 21 21 16 19 19 14 17 17 13 16 16 12 15 15
+12 15 15 12 15 15 12 15 15 12 15 15 12 15 15 12 15 15
+12 15 15 12 15 15 12 15 15 12 15 15 12 15 15 13 16 16
+13 16 16 13 16 16 13 16 16 13 17 17 13 17 17 14 17 17
+14 17 17 14 17 17 14 18 18 14 18 18 14 18 18 15 18 18
+15 19 19 15 19 19 15 19 19 20 24 24 32 34 33 35 37 36
+37 39 37 35 37 36 33 36 34 30 32 31 26 28 27 22 24 23
+20 20 20 17 17 17 15 15 15 13 13 13 12 12 12 12 12 12
+12 12 12 12 12 12 8 8 7 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+1 1 1 99 98 80 184 179 149 184 179 149 68 70 65 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+15 15 15 110 109 94 110 109 94 108 107 93 99 98 80 72 73 67
+61 63 57 49 51 48 39 40 39 33 36 34 27 30 29 23 25 24
+18 22 22 16 19 19 14 17 17 13 16 16 12 15 15 12 15 15
+11 14 14 11 14 14 11 14 14 11 14 14 11 14 14 11 14 14
+11 14 14 11 14 14 12 14 14 12 15 15 12 15 15 12 15 15
+12 15 15 13 16 16 13 16 16 13 16 16 13 16 16 13 16 16
+13 17 17 14 17 17 14 17 17 14 17 17 14 18 18 14 18 18
+14 18 18 15 18 18 15 19 19 15 19 19 30 32 31 38 39 37
+39 40 39 39 40 39 35 37 36 31 33 31 27 29 28 22 24 23
+20 20 20 17 17 17 15 15 15 13 13 13 12 12 12 12 12 12
+12 12 12 12 12 12 8 8 7 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 3 3
+110 109 94 197 193 154 210 208 158 184 179 149 68 70 65 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+68 70 65 110 109 94 110 109 94 105 104 92 84 83 72 65 66 61
+51 52 50 43 45 43 35 37 36 30 32 31 25 27 26 20 23 23
+17 20 20 15 18 18 13 16 16 12 15 15 12 15 15 11 14 14
+11 14 14 11 14 14 11 13 13 11 13 13 11 13 13 11 13 13
+11 14 14 11 14 14 11 14 14 11 14 14 11 14 14 11 14 14
+12 15 15 12 15 15 12 15 15 12 15 15 13 16 16 13 16 16
+13 16 16 13 16 16 13 17 17 13 17 17 14 17 17 14 17 17
+14 18 18 14 18 18 14 18 18 16 19 19 37 39 37 41 42 42
+41 42 42 41 42 42 38 39 37 32 34 33 27 29 28 23 24 24
+21 22 21 17 17 17 15 15 15 13 13 13 12 12 12 12 12 12
+12 12 12 12 12 12 8 8 7 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 11 11 11 137 133 100
+197 193 154 251 251 187 239 239 170 184 179 149 31 33 31 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12 12 12
+110 109 94 110 109 94 105 104 92 90 89 73 72 73 67 58 59 55
+46 47 45 37 39 37 31 33 31 26 28 27 20 24 24 17 21 21
+15 18 18 13 16 16 12 15 15 12 14 14 11 13 13 11 13 13
+10 13 13 10 13 13 10 13 13 10 13 13 10 13 13 10 13 13
+10 13 13 10 13 13 11 13 13 11 13 13 11 14 14 11 14 14
+11 14 14 11 14 14 12 14 14 12 15 15 12 15 15 12 15 15
+13 16 16 13 16 16 13 16 16 13 16 16 13 17 17 13 17 17
+14 17 17 14 17 17 14 18 18 23 27 26 41 42 42 41 42 42
+43 45 43 41 42 42 39 40 39 33 36 34 27 29 28 23 24 24
+21 22 21 17 17 17 15 15 15 13 13 13 12 12 12 12 12 12
+12 12 12 12 12 12 6 7 7 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 27 29 28 168 163 120 210 208 158
+251 251 187 251 251 187 210 208 158 137 133 100 1 1 1 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60 60 56
+110 109 94 105 104 92 105 104 92 84 83 72 65 66 61 51 52 50
+40 43 41 33 36 34 27 30 29 23 25 24 18 22 22 16 19 19
+14 17 17 12 15 15 11 14 14 11 14 14 10 13 13 10 13 13
+10 13 13 10 12 12 10 12 12 10 12 12 10 12 12 10 12 12
+10 12 12 10 12 12 10 13 13 10 13 13 10 13 13 11 13 13
+11 13 13 11 14 14 11 14 14 11 14 14 11 14 14 12 15 15
+12 15 15 12 15 15 12 15 15 13 16 16 13 16 16 13 16 16
+13 17 17 13 17 17 14 17 17 32 34 33 43 45 43 43 45 43
+43 45 43 43 45 43 39 40 39 33 36 34 27 29 28 23 24 24
+21 22 21 17 17 17 15 15 15 13 13 13 12 12 12 12 12 12
+12 12 12 12 12 12 6 7 7 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 1 1 1 68 70 65 184 179 149 210 208 158 251 251 187
+251 251 187 214 212 158 184 179 149 37 39 37 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 6 7 7 105 104 92
+105 104 92 105 104 92 99 98 80 72 73 67 58 59 55 46 47 45
+35 37 36 30 32 31 25 27 26 20 23 23 16 19 19 14 17 17
+12 15 15 12 14 14 11 13 13 10 13 13 10 12 12 10 12 12
+10 12 12 10 12 12 9 12 12 9 12 12 9 12 12 9 12 12
+10 12 12 10 12 12 10 12 12 10 12 12 10 12 12 10 13 13
+10 13 13 10 13 13 11 13 13 11 13 13 11 14 14 11 14 14
+11 14 14 12 15 15 12 15 15 12 15 15 12 15 15 13 16 16
+13 16 16 13 16 16 17 20 20 41 42 42 46 47 45 46 47 45
+46 47 45 43 45 43 40 41 39 33 36 34 27 29 28 23 24 24
+20 20 20 17 17 17 15 15 15 13 13 13 12 12 12 12 12 12
+12 12 12 12 12 12 4 5 5 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+15 15 15 110 109 94 197 193 154 214 212 158 251 251 187 251 251 187
+239 239 170 184 179 149 84 83 72 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 47 48 46 105 104 92
+105 104 92 99 98 80 84 83 72 68 70 65 51 52 50 40 43 41
+32 34 33 27 29 28 22 24 23 17 21 21 15 18 18 13 16 16
+12 15 15 11 13 13 10 13 13 10 12 12 9 12 12 9 12 12
+9 12 12 9 12 12 9 11 11 9 11 11 9 11 11 9 11 11
+9 12 12 9 12 12 9 12 12 9 12 12 10 12 12 10 12 12
+10 12 12 10 12 12 10 13 13 10 13 13 10 13 13 11 13 13
+11 14 14 11 14 14 11 14 14 12 14 14 12 15 15 12 15 15
+12 15 15 13 16 16 28 31 30 43 45 43 47 48 46 47 48 46
+47 48 46 43 45 43 40 41 39 33 36 34 27 29 28 22 24 23
+20 20 20 17 17 17 15 15 15 13 13 13 12 12 12 12 12 12
+12 12 12 12 12 12 3 4 4 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 60 60 56
+177 172 135 197 193 154 251 251 187 251 251 187 251 251 187 251 251 187
+184 179 149 110 109 94 3 4 4 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 1 1 1 99 98 80 105 104 92
+99 98 80 87 86 72 84 83 72 63 64 60 46 47 45 35 37 36
+30 32 31 25 27 26 18 22 22 16 19 19 14 17 17 12 15 15
+11 14 14 10 13 13 9 12 12 9 12 12 9 11 11 9 11 11
+9 11 11 9 11 11 9 11 11 9 11 11 9 11 11 9 11 11
+9 11 11 9 11 11 9 11 11 9 11 11 9 12 12 9 12 12
+9 12 12 10 12 12 10 12 12 10 12 12 10 13 13 10 13 13
+10 13 13 11 13 13 11 14 14 11 14 14 11 14 14 12 15 15
+12 15 15 14 17 17 41 42 42 47 48 46 49 51 48 51 52 50
+47 48 46 43 45 43 40 41 39 33 36 34 27 29 28 22 24 23
+19 20 19 16 16 16 14 14 13 13 13 13 12 12 12 12 12 12
+12 12 12 12 12 12 2 2 2 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 23 24 24 137 133 100 184 179 149
+210 208 158 251 251 187 251 251 187 251 251 187 251 251 187 184 179 149
+110 109 94 13 13 13 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 30 32 31 105 104 92 99 98 80
+84 83 72 84 83 72 72 73 67 55 57 54 41 42 42 32 34 33
+27 29 28 20 24 24 17 20 20 14 17 17 13 16 16 12 14 14
+10 13 13 10 12 12 9 11 11 9 11 11 9 11 11 9 11 11
+9 11 11 9 11 11 9 11 11 9 11 11 9 11 11 9 11 11
+9 11 11 9 11 11 9 11 11 9 11 11 9 11 11 9 11 11
+9 11 11 9 12 12 9 12 12 10 12 12 10 12 12 10 12 12
+10 13 13 10 13 13 10 13 13 11 13 13 11 14 14 11 14 14
+11 14 14 27 29 28 55 56 53 72 73 67 51 52 50 51 52 50
+49 51 48 43 45 43 39 40 39 32 34 33 26 28 27 21 22 21
+19 20 19 16 16 16 18 19 17 13 13 13 12 12 12 12 12 12
+12 12 12 12 12 12 1 1 1 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 8 8 7 84 83 72 184 179 149 197 193 154 251 251 187
+251 251 187 251 251 187 251 251 187 251 251 187 184 179 149 145 141 105
+19 20 19 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 14 14 13 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 72 73 67 105 104 92 84 83 72
+72 73 67 84 83 72 68 70 65 49 51 48 39 40 39 30 32 31
+25 27 26 18 22 22 15 18 18 13 16 16 12 15 15 11 13 13
+10 12 12 9 11 11 9 11 11 9 11 11 9 11 11 9 11 11
+9 11 11 9 11 11 9 11 11 9 11 11 9 11 11 9 11 11
+9 11 11 9 11 11 9 11 11 9 11 11 9 11 11 9 11 11
+9 11 11 9 11 11 9 11 11 9 12 12 9 12 12 9 12 12
+10 12 12 10 12 12 10 12 12 10 13 13 10 13 13 11 13 13
+13 16 16 41 42 42 99 98 80 158 153 112 65 66 61 51 52 50
+49 51 48 43 45 43 39 40 39 31 33 31 25 27 26 21 22 21
+21 22 21 68 70 65 55 56 53 13 13 13 12 12 12 12 12 12
+12 12 12 11 11 11 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 3 3
+63 64 60 158 153 112 184 179 149 210 208 158 251 251 187 251 251 187
+251 251 187 251 251 187 251 251 187 184 179 149 137 133 100 27 29 28
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+21 22 21 110 109 94 5 6 5 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 13 13 13 105 104 92 90 89 73 72 73 67
+68 70 65 84 83 72 63 64 60 46 47 45 35 37 36 27 29 28
+22 24 23 17 20 20 14 17 17 12 15 15 11 14 14 10 12 12
+10 12 12 9 11 11 9 11 11 9 11 11 9 11 11 9 11 11
+9 11 11 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 9 11 11 9 11 11 9 11 11 9 11 11 9 11 11
+9 11 11 9 11 11 9 11 11 9 11 11 9 11 11 9 11 11
+9 12 12 9 12 12 10 12 12 10 12 12 10 13 13 10 13 13
+30 32 31 47 48 46 177 172 135 210 208 158 137 133 100 55 56 53
+49 51 48 43 45 43 38 39 37 31 33 31 25 27 26 22 24 23
+110 109 94 184 179 149 63 64 60 13 13 13 12 12 12 12 12 12
+12 12 12 8 9 9 0 0 0 1 1 1 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 21 22 21 105 104 92
+184 179 149 210 208 158 251 251 187 251 251 187 251 251 187 251 251 187
+251 251 187 251 251 187 184 179 149 145 141 105 23 24 24 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+68 70 65 184 179 149 105 104 92 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 51 52 50 99 98 80 84 83 72 63 64 60
+68 70 65 72 73 67 55 57 54 41 42 42 32 34 33 25 27 26
+20 23 23 16 19 19 13 16 16 12 14 14 10 13 13 10 12 12
+9 11 11 9 11 11 9 11 11 9 11 11 9 11 11 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 9 11 11 9 11 11
+9 11 11 9 11 11 9 11 11 9 11 11 9 11 11 9 11 11
+9 11 11 9 11 11 9 12 12 9 12 12 10 12 12 17 20 20
+46 47 45 72 73 67 210 208 158 251 251 187 210 208 158 63 64 60
+49 51 48 43 45 43 37 39 37 30 32 31 24 26 24 105 104 92
+210 208 158 197 193 154 47 48 46 13 13 13 12 12 12 12 12 12
+12 12 12 6 7 7 33 36 34 48 49 45 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 8 8 7 23 24 24 55 56 53 110 109 94
+210 208 158 251 251 187 251 251 187 251 251 187 251 251 187 251 251 187
+251 251 187 184 179 149 110 109 94 20 20 20 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+110 109 94 251 251 187 210 208 158 47 48 46 0 0 0 0 0 0
+0 0 0 1 1 1 90 89 73 90 89 73 72 73 67 55 56 53
+72 73 67 68 70 65 51 52 50 37 39 37 28 31 30 23 25 24
+17 21 21 15 18 18 12 15 15 11 14 14 10 13 13 9 12 12
+9 11 11 9 11 11 9 11 11 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 9 11 11 9 11 11 9 11 11 9 11 11 9 11 11
+9 11 11 9 11 11 9 11 11 9 12 12 13 16 16 41 42 42
+49 51 48 110 109 94 251 251 187 251 251 187 251 251 187 105 104 92
+49 51 48 43 45 43 35 37 36 30 31 28 47 48 46 197 193 154
+251 251 187 197 193 154 31 33 31 12 12 12 12 12 12 12 12 12
+12 12 12 51 52 50 184 179 149 72 73 67 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 2 2
+11 11 11 21 22 21 30 32 31 40 41 39 60 60 56 145 141 105
+251 251 187 251 251 187 251 251 187 251 251 187 251 251 187 214 212 158
+184 179 149 110 109 94 13 13 13 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 4 5 4 61 61 53 48 49 45 3 4 3
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+156 151 111 251 251 187 251 251 187 184 179 149 11 11 11 0 0 0
+0 0 0 26 28 27 99 98 80 84 83 72 60 60 56 43 45 43
+72 73 67 65 66 61 49 51 48 35 37 36 27 29 28 20 24 24
+17 20 20 14 17 17 12 15 15 11 13 13 10 12 12 9 11 11
+9 11 11 9 11 11 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 9 11 11 9 11 11
+9 11 11 9 11 11 9 11 11 11 13 13 37 39 37 47 48 46
+51 52 50 184 179 149 251 251 187 251 251 187 251 251 187 145 141 105
+47 48 46 41 42 42 35 37 36 27 29 28 137 133 100 251 251 187
+251 251 187 197 193 154 19 20 19 12 12 12 12 12 12 12 12 12
+27 29 28 184 179 149 214 212 158 63 64 60 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 1 1 1 6 7 7 16 16 16 24 26 24
+30 32 31 38 39 37 47 48 46 55 57 54 68 70 65 110 109 94
+197 193 154 251 251 187 251 251 187 251 251 187 210 208 158 184 179 149
+105 104 92 8 8 7 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 65 66 61 184 179 149 156 151 111
+30 32 31 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+168 163 120 251 251 187 251 251 187 251 251 187 110 109 94 0 0 0
+0 0 0 60 60 56 84 83 72 68 70 65 51 52 50 38 39 37
+84 83 72 63 64 60 43 45 43 33 36 34 25 27 26 20 23 22
+15 18 18 13 16 16 12 14 14 10 13 13 9 12 12 9 11 11
+9 11 11 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+9 11 11 9 11 11 10 12 12 33 36 34 46 47 45 51 52 50
+72 73 67 210 208 158 251 251 187 251 251 187 251 251 187 177 172 135
+47 48 46 41 42 42 35 37 36 37 39 37 184 179 149 251 251 187
+251 251 187 197 193 154 13 13 13 12 12 12 12 12 12 12 12 12
+110 109 94 251 251 187 251 251 187 37 39 37 0 0 0 0 0 0
+0 0 0 21 22 20 2 2 1 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+4 5 5 12 12 12 21 22 21 25 27 26 30 32 31 38 39 37
+46 47 45 55 56 53 60 60 56 65 66 61 68 70 65 105 104 92
+110 109 94 197 193 154 210 208 158 197 193 154 184 179 149 84 83 72
+2 2 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 13 13 13 184 179 149 251 251 187
+197 193 154 43 44 41 0 0 0 0 0 0 0 0 0 0 0 0
+145 141 105 251 251 187 251 251 187 251 251 187 214 212 158 43 45 43
+2 2 2 84 83 72 72 73 67 58 59 55 41 42 42 38 39 37
+72 73 67 58 59 55 41 42 42 31 33 31 25 27 26 18 22 22
+14 17 17 12 15 15 12 14 14 10 12 12 9 12 12 9 11 11
+9 11 11 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 9 12 12 31 33 31 43 45 43 49 51 48 55 56 53
+110 109 94 251 251 187 251 251 187 251 251 187 251 251 187 168 163 120
+47 48 46 41 42 42 33 36 34 63 64 60 197 193 154 251 251 187
+251 251 187 184 179 149 13 13 13 12 12 12 12 12 12 16 16 16
+197 193 154 251 251 187 239 239 170 20 20 20 0 0 0 2 2 1
+108 107 93 110 109 94 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 1 1 1 4 5 5 11 11 11 18 19 18
+22 24 23 26 28 27 32 34 33 39 40 39 46 47 45 51 52 50
+55 57 54 60 60 56 63 64 60 63 64 60 63 64 60 58 59 55
+63 64 60 99 98 80 145 141 105 137 133 100 43 45 43 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 3 4 3 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 110 109 94 251 251 187
+251 251 187 184 179 149 25 27 26 0 0 0 0 0 0 0 0 0
+99 98 80 251 251 187 251 251 187 251 251 187 251 251 187 156 151 111
+25 27 26 84 83 72 65 66 61 47 48 46 32 34 33 39 40 39
+72 73 67 55 57 54 40 41 39 30 32 31 23 25 24 18 22 22
+14 17 17 12 15 15 11 13 13 10 12 12 9 11 11 9 11 11
+9 11 11 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+9 11 11 28 31 30 41 42 42 47 48 46 55 56 53 58 59 55
+137 133 100 251 251 187 251 251 187 251 251 187 210 208 158 137 133 100
+47 48 46 40 41 39 32 34 33 75 75 61 184 179 149 239 239 170
+251 251 187 177 172 135 13 13 13 12 12 12 12 12 12 43 44 41
+197 193 154 251 251 187 210 208 158 10 10 9 0 0 0 84 83 72
+251 251 187 84 83 72 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1
+6 7 7 11 11 11 17 17 17 20 20 20 23 24 24 27 29 28
+32 34 33 38 39 37 43 45 43 47 48 46 51 52 50 55 56 53
+58 59 55 58 59 55 55 57 54 55 56 53 47 48 46 41 42 42
+35 37 36 31 33 31 47 48 46 14 14 13 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 66 65 55 99 98 80 20 20 20
+0 0 0 0 0 0 0 0 0 0 0 0 43 45 43 214 212 158
+251 251 187 251 251 187 145 141 105 3 3 3 0 0 0 0 0 0
+48 49 45 184 179 149 239 239 170 251 251 187 239 239 170 177 172 135
+84 83 72 72 73 67 55 56 53 39 40 39 26 28 27 39 40 39
+68 70 65 51 52 50 39 40 39 28 31 30 22 24 23 17 20 20
+14 17 17 12 14 14 10 13 13 9 11 11 9 11 11 9 11 11
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+27 29 28 40 41 39 46 47 45 51 52 50 55 57 54 63 64 60
+131 127 93 197 193 154 210 208 158 197 193 154 168 163 120 96 95 69
+47 48 46 40 41 39 32 34 33 71 71 57 145 141 105 184 179 149
+184 179 149 131 127 93 13 13 13 12 12 12 12 12 12 48 49 45
+168 163 120 184 179 149 156 151 111 6 7 7 14 14 13 177 172 135
+239 239 170 40 41 39 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 3 3 3 6 7 7 11 11 11 16 16 16
+18 19 18 21 22 21 23 24 24 27 29 28 32 34 33 37 39 37
+41 42 42 43 45 43 47 48 46 51 52 50 51 52 50 51 52 50
+51 52 50 49 51 48 46 47 45 40 41 39 32 34 33 25 27 26
+20 20 20 14 14 13 2 2 2 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 33 36 34 197 193 154 184 179 149
+41 42 42 0 0 0 0 0 0 0 0 0 3 3 3 184 179 149
+251 251 187 251 251 187 184 179 149 48 49 45 0 0 0 0 0 0
+16 17 12 121 119 87 177 172 135 194 189 146 188 184 146 145 141 105
+82 81 62 63 64 60 46 47 45 31 33 31 21 22 21 35 37 36
+68 70 65 51 52 50 37 39 37 27 30 29 22 24 23 17 20 20
+13 16 16 12 14 14 10 13 13 9 11 11 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 25 27 26
+38 39 37 43 45 43 51 52 50 55 56 53 60 60 56 63 64 60
+92 91 72 158 153 112 176 171 126 171 165 117 149 143 98 82 81 62
+44 46 43 38 39 37 30 32 31 71 71 57 131 127 93 160 154 106
+149 143 98 82 81 62 13 13 13 12 12 12 12 12 12 46 47 43
+121 119 87 134 131 96 96 95 69 7 7 6 38 39 37 131 127 93
+145 141 105 12 13 12 0 0 0 1 1 1 3 3 3 6 7 7
+10 10 9 12 12 12 14 14 13 16 16 16 18 19 18 21 22 21
+22 24 23 26 28 27 30 31 28 33 36 34 37 39 37 40 41 39
+41 42 42 43 45 43 46 47 45 46 47 45 46 47 45 43 45 43
+41 42 42 37 39 37 31 33 31 26 28 27 21 22 21 16 16 16
+6 7 7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 177 172 135 251 251 187
+197 193 154 27 29 28 0 0 0 0 0 0 0 0 0 110 109 94
+239 239 170 239 239 170 184 179 149 87 86 72 2 2 1 0 0 0
+1 1 1 82 81 62 142 137 94 165 161 109 165 161 109 131 127 93
+75 75 61 55 56 53 37 39 37 25 27 26 19 20 19 32 34 33
+65 66 61 49 51 48 35 37 36 27 29 28 20 23 23 16 19 19
+13 16 16 13 13 13 10 12 12 9 11 11 8 10 10 8 10 10
+8 9 9 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 22 24 23 35 37 36
+41 42 42 47 48 46 55 56 53 58 59 55 63 64 60 65 66 61
+71 71 57 131 127 93 160 154 106 160 154 106 142 137 94 82 81 62
+46 47 43 40 41 39 33 36 34 66 65 55 125 122 87 149 143 98
+142 137 94 82 81 62 17 17 17 18 19 17 14 14 13 46 47 43
+118 116 76 125 122 87 96 95 69 16 17 12 71 71 57 103 101 77
+82 81 62 11 11 11 11 11 11 13 13 13 14 14 13 14 14 13
+15 15 15 16 16 16 17 17 17 19 20 19 21 22 21 23 24 24
+26 28 27 27 29 28 31 33 31 33 36 34 35 37 36 38 39 37
+39 40 39 39 40 39 38 39 37 37 39 37 35 37 36 31 33 31
+27 29 28 24 26 24 21 22 21 17 17 17 12 12 12 2 2 2
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 68 70 65 251 251 187
+251 251 187 156 151 111 2 2 1 0 0 0 0 0 0 43 44 41
+177 172 135 184 179 149 158 153 112 103 101 77 19 20 18 0 0 0
+0 0 0 46 47 43 131 127 93 160 154 106 160 154 106 131 127 93
+71 71 57 43 45 43 30 32 31 21 22 21 16 16 16 26 28 27
+63 64 60 47 48 46 35 37 36 26 28 27 20 23 23 16 19 19
+13 16 16 13 13 13 10 12 12 9 11 11 8 10 10 8 10 10
+7 9 9 7 9 9 8 9 9 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 20 20 20 33 36 34 40 41 39
+46 47 45 51 52 50 55 57 54 60 60 56 63 64 60 65 66 61
+66 65 55 118 116 76 151 147 98 165 161 109 151 147 98 121 119 87
+96 95 69 96 95 69 96 95 69 103 101 77 142 137 94 151 147 98
+142 137 94 103 101 77 82 81 62 82 81 62 82 81 62 96 95 69
+131 127 93 142 137 94 103 101 77 46 47 43 96 95 69 118 116 76
+71 71 57 14 14 13 14 14 13 15 15 15 15 15 15 16 16 16
+16 16 16 17 17 17 18 19 18 20 20 20 21 22 21 23 24 24
+25 27 26 27 29 28 30 31 28 30 32 31 31 33 31 31 33 31
+31 33 31 31 33 31 30 31 28 27 29 28 25 27 26 22 24 23
+20 20 20 16 16 16 13 13 13 6 7 7 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+58 59 55 68 70 65 8 8 7 0 0 0 10 10 9 210 208 158
+251 251 187 184 179 149 38 39 37 0 0 0 0 0 0 8 8 7
+103 101 77 149 143 98 149 143 98 118 116 76 40 41 39 25 27 25
+53 55 47 82 81 62 144 139 99 165 161 109 165 161 109 142 137 94
+71 71 57 35 37 36 24 26 24 18 19 18 15 15 15 22 24 23
+63 64 60 46 47 45 33 36 34 26 28 27 20 23 22 17 18 17
+12 15 15 11 13 13 10 12 12 9 11 11 8 10 10 8 10 10
+7 9 9 7 9 9 7 9 9 7 9 9 8 9 9 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 16 16 16 30 31 28 35 37 36 41 42 42
+47 48 46 55 56 53 58 59 55 63 64 60 65 66 61 65 66 61
+61 61 53 103 101 77 151 147 98 171 165 117 171 165 117 168 163 120
+158 153 112 158 153 112 155 149 109 151 147 98 151 147 98 160 154 106
+151 147 98 149 143 98 142 137 94 149 143 98 149 143 98 149 143 98
+155 149 109 151 147 98 131 127 93 103 101 77 125 122 87 118 116 76
+71 71 57 16 16 16 16 16 16 16 16 16 17 17 17 17 17 17
+17 17 17 17 17 17 18 19 18 19 20 19 20 20 20 21 22 21
+23 24 24 24 26 24 25 27 26 26 28 27 26 28 27 26 28 27
+25 27 26 24 26 24 22 24 23 21 22 21 19 20 19 16 16 16
+14 14 13 8 8 7 1 1 1 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+20 20 20 184 179 149 168 163 120 21 22 21 0 0 0 105 104 92
+177 172 135 145 141 105 71 71 57 0 0 0 0 0 0 0 0 0
+66 65 55 131 127 93 151 147 98 142 137 94 118 116 76 121 119 87
+145 141 105 158 153 112 176 171 126 178 174 128 176 171 126 149 145 103
+96 95 69 31 33 31 21 22 21 16 16 16 14 14 13 18 19 18
+60 60 56 46 47 45 33 36 34 25 27 26 21 22 21 15 18 18
+12 15 15 11 13 13 9 11 11 8 10 10 8 10 10 8 9 9
+7 9 9 7 9 9 7 9 9 7 9 9 7 9 9 8 9 9
+8 9 9 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 10 12 12 26 28 27 31 33 31 38 39 37 43 45 43
+51 52 50 55 56 53 60 60 56 63 64 60 65 66 61 68 70 65
+63 64 60 96 95 69 158 153 112 178 174 128 188 184 146 194 189 146
+194 189 146 188 184 146 184 181 136 176 171 126 171 165 117 173 167 111
+173 167 111 165 161 109 171 165 117 174 170 121 176 171 126 178 174 128
+178 174 128 174 170 121 160 154 106 149 143 98 149 143 98 125 122 87
+71 71 57 16 16 16 16 16 16 17 17 17 17 17 17 17 17 17
+17 17 17 17 17 17 17 17 17 18 19 18 19 20 19 20 20 20
+21 22 21 21 22 21 21 22 21 22 24 23 21 22 21 21 22 21
+21 22 21 19 20 19 18 19 18 16 16 16 14 14 13 11 11 11
+3 3 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 105 104 92 197 193 154 110 109 94 9 9 8 36 38 35
+121 119 87 131 127 93 96 95 69 18 19 17 30 31 28 66 65 55
+96 95 69 142 137 94 160 154 106 160 154 106 160 154 106 168 163 120
+184 181 136 194 191 148 197 193 154 197 193 154 194 189 146 168 163 120
+125 122 87 46 47 43 18 19 18 15 15 15 13 13 13 14 14 13
+55 57 54 43 45 43 32 34 33 25 27 26 18 22 22 17 17 17
+12 14 14 10 12 12 9 11 11 8 10 10 8 9 9 7 9 9
+6 8 8 7 9 9 7 9 9 7 9 9 7 9 9 7 9 9
+7 9 9 8 9 9 8 9 9 8 10 10 8 10 10 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 32 34 33 41 42 42 35 37 36 39 40 39 37 39 37
+35 37 36 55 57 54 60 60 56 63 64 60 65 66 61 65 66 61
+61 63 57 115 113 82 168 163 120 194 191 148 204 201 155 210 208 158
+210 208 158 210 208 158 197 193 154 194 189 146 186 182 128 176 171 126
+174 170 121 176 171 126 186 182 128 190 186 136 194 191 148 197 193 154
+197 193 154 188 184 146 181 176 137 174 170 121 165 161 109 142 137 94
+82 81 62 24 26 24 16 16 16 16 16 16 16 16 16 16 16 16
+17 17 17 17 17 17 17 17 17 17 17 17 18 19 18 19 20 19
+19 20 19 19 20 19 20 20 20 19 20 19 19 20 19 18 19 18
+17 17 17 15 15 15 13 13 13 12 12 12 6 7 7 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 17 18 17 137 133 100 115 113 82 53 55 47 19 20 18
+103 101 77 144 139 99 137 133 100 115 113 82 137 133 100 156 151 111
+158 153 112 164 159 111 171 165 117 174 170 121 178 174 128 194 189 146
+204 201 155 214 212 158 214 212 158 214 212 158 210 208 158 188 184 146
+158 153 112 87 86 72 17 17 17 13 13 13 13 13 13 15 15 15
+55 56 53 43 45 43 32 34 33 24 26 24 17 20 20 16 16 16
+12 14 14 10 12 12 8 10 10 8 10 10 7 9 9 6 8 8
+6 8 8 6 8 8 6 8 8 7 9 9 7 9 9 7 9 9
+7 9 9 7 9 9 7 9 9 7 9 9 8 9 9 8 10 10
+8 10 10 8 10 10 8 10 10 8 10 10 8 10 10 8 10 10
+8 10 10 110 109 94 84 83 72 49 51 48 26 28 27 8 10 10
+8 9 9 51 52 50 58 59 55 63 64 60 63 64 60 63 64 60
+66 65 55 134 131 96 181 176 137 210 208 158 214 212 158 239 239 170
+239 239 170 224 223 159 210 208 158 204 201 155 194 189 146 186 182 128
+186 182 128 184 181 136 194 189 146 204 201 155 210 208 158 210 208 158
+210 208 158 210 208 158 197 193 154 190 186 136 176 171 126 155 149 109
+118 116 76 36 38 35 15 15 15 16 16 16 16 16 16 16 16 16
+16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 17 17 17
+17 17 17 17 17 17 17 17 17 16 16 16 16 16 16 15 15 15
+13 13 13 12 12 12 8 8 7 2 2 2 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 53 55 47 103 101 77 96 95 69 53 55 47
+103 101 77 158 153 112 177 172 135 184 179 149 188 184 146 197 193 154
+194 189 146 190 186 136 184 181 136 184 181 136 194 189 146 210 208 158
+214 212 158 239 239 170 251 251 187 251 251 187 224 223 159 204 201 155
+177 172 135 121 119 87 30 31 28 13 13 13 12 12 12 39 40 39
+60 60 56 43 45 43 32 34 33 23 25 24 18 19 18 13 16 16
+13 13 13 9 11 11 8 10 10 8 9 9 6 8 8 6 8 8
+6 8 8 6 8 8 6 8 8 6 8 8 6 8 8 7 9 9
+7 9 9 7 9 9 7 9 9 7 9 9 7 9 9 7 9 9
+7 9 9 8 9 9 8 9 9 8 10 10 8 10 10 8 10 10
+14 17 17 197 193 154 158 153 112 55 57 54 7 9 9 7 9 9
+8 10 10 51 52 50 58 59 55 60 60 56 63 64 60 63 64 60
+71 71 57 155 149 109 194 191 148 214 212 158 251 251 187 251 251 187
+251 251 187 251 251 187 239 239 170 210 208 158 197 193 154 190 186 136
+190 186 136 194 189 146 204 201 155 210 208 158 224 223 159 239 239 170
+239 239 170 224 223 159 210 208 158 204 201 155 190 186 136 164 159 111
+125 122 87 40 41 39 15 15 15 15 15 15 15 15 15 15 15 15
+16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16
+16 16 16 16 16 16 15 15 15 14 14 13 13 13 13 12 12 12
+8 9 9 3 3 3 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 21 22 20 96 95 69 125 122 87 121 119 87
+144 139 99 177 172 135 197 193 154 210 208 158 214 212 158 214 212 158
+210 208 158 204 201 155 194 191 148 194 189 146 204 201 155 214 212 158
+239 239 170 251 251 187 251 251 187 251 251 187 251 251 187 214 212 158
+188 184 146 145 141 105 53 55 47 12 12 12 15 15 15 63 64 60
+63 64 60 41 42 42 31 33 31 23 24 24 17 18 17 12 15 15
+11 13 13 9 11 11 8 9 9 7 9 9 6 8 8 6 8 8
+6 7 7 6 7 7 6 8 8 6 8 8 6 8 8 6 8 8
+6 8 8 7 9 9 7 9 9 7 9 9 7 9 9 7 9 9
+7 9 9 7 9 9 7 9 9 7 9 9 7 9 9 8 8 7
+43 45 43 251 251 187 156 151 111 8 10 10 7 9 9 7 9 9
+21 22 21 51 52 50 55 56 53 55 57 54 58 59 55 58 59 55
+75 75 61 158 153 112 197 193 154 224 223 159 251 251 187 251 251 187
+251 251 187 251 251 187 251 251 187 214 212 158 204 201 155 194 189 146
+190 186 136 197 193 154 210 208 158 224 223 159 251 251 187 251 251 187
+251 251 187 251 251 187 239 239 170 210 208 158 197 193 154 176 171 126
+125 122 87 36 38 35 14 14 13 14 14 13 15 15 15 15 15 15
+15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15
+15 15 15 14 14 13 13 13 13 12 12 12 10 10 9 3 4 4
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 7 7 5 71 71 57 131 127 93 158 153 112
+177 172 135 197 193 154 214 212 158 239 239 170 251 251 187 251 251 187
+238 237 168 210 208 158 204 201 155 197 193 154 204 201 155 214 212 158
+251 251 187 251 251 187 251 251 187 251 251 187 251 251 187 214 212 158
+197 193 154 156 151 111 66 65 55 12 12 12 37 39 37 58 59 55
+58 59 55 41 42 42 31 33 31 22 24 23 17 17 17 12 14 14
+10 12 12 8 10 10 6 8 8 6 8 8 6 7 7 6 7 7
+6 7 7 5 7 7 6 7 7 6 7 7 6 8 8 6 8 8
+6 8 8 6 8 8 6 8 8 7 9 9 7 9 9 7 9 9
+7 9 9 6 8 8 6 8 8 6 8 8 6 8 8 6 8 8
+61 63 57 197 193 154 16 19 19 6 8 8 6 8 8 8 9 9
+41 42 42 47 48 46 51 52 50 51 52 50 55 56 53 55 56 53
+71 71 57 158 153 112 197 193 154 224 223 159 251 251 187 251 251 187
+251 251 187 251 251 187 239 239 170 214 212 158 204 201 155 194 189 146
+190 186 136 197 193 154 210 208 158 239 239 170 251 251 187 251 251 187
+251 251 187 251 251 187 251 251 187 224 223 159 204 201 155 177 172 135
+121 119 87 30 31 28 13 13 13 14 14 13 14 14 13 14 14 13
+14 14 13 14 14 13 15 15 15 15 15 15 14 14 13 13 13 13
+12 12 12 12 12 12 10 10 9 4 5 5 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 48 49 45 131 127 93 174 170 121
+194 189 146 210 208 158 239 239 170 251 251 187 251 251 187 251 251 187
+251 251 187 214 212 158 204 201 155 197 193 154 204 201 155 210 208 158
+239 239 170 251 251 187 251 251 187 251 251 187 239 239 170 214 212 158
+194 191 148 156 151 111 71 71 57 19 20 19 51 52 50 51 52 50
+51 52 50 41 42 42 30 32 31 21 22 21 17 17 17 13 13 13
+9 11 11 8 9 9 6 8 8 6 7 7 6 7 7 5 7 7
+5 6 5 5 6 5 5 7 7 5 7 7 6 7 7 6 7 7
+6 8 8 6 8 8 6 8 8 6 7 7 6 7 7 6 7 7
+6 7 7 6 8 8 6 8 8 6 8 8 6 8 8 6 8 8
+55 56 53 43 45 43 6 8 8 6 8 8 6 8 8 47 48 46
+60 60 56 47 48 46 46 47 45 47 48 46 38 39 37 10 12 12
+66 65 55 145 141 105 197 193 154 214 212 158 251 251 187 251 251 187
+251 251 187 251 251 187 224 223 159 210 208 158 194 191 148 184 181 136
+184 181 136 194 189 146 204 201 155 224 223 159 251 251 187 251 251 187
+251 251 187 251 251 187 251 251 187 239 239 170 210 208 158 181 176 137
+115 113 82 21 22 20 13 13 13 13 13 13 13 13 13 13 13 13
+14 14 13 13 13 13 13 13 13 13 13 13 12 12 12 11 11 11
+10 10 9 6 7 7 1 1 1 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 2 2 1 66 65 55 144 139 99 178 174 128
+204 201 155 214 212 158 251 251 187 251 251 187 251 251 187 251 251 187
+251 251 187 214 212 158 204 201 155 194 191 148 197 193 154 204 201 155
+214 212 158 239 239 170 239 239 170 239 239 170 214 212 158 210 208 158
+184 181 136 149 145 103 66 65 55 41 42 42 47 48 46 46 47 45
+43 45 43 39 40 39 28 31 30 21 22 21 16 16 16 10 12 12
+8 10 10 6 8 8 6 7 7 6 7 7 5 6 5 5 6 5
+5 6 5 5 6 5 5 6 5 5 6 5 5 7 7 5 7 7
+6 7 7 6 7 7 6 7 7 5 7 7 5 7 7 5 7 7
+5 7 7 6 7 7 6 7 7 6 7 7 6 7 7 6 8 8
+6 8 8 6 8 8 6 7 7 6 7 7 46 47 45 156 151 111
+105 104 92 58 59 55 43 45 43 32 34 33 6 8 8 6 8 8
+49 51 48 125 122 87 181 176 137 204 201 155 214 212 158 239 239 170
+239 239 170 214 212 158 210 208 158 197 193 154 181 176 137 176 171 126
+176 171 126 184 181 136 197 193 154 210 208 158 239 239 170 251 251 187
+251 251 187 251 251 187 251 251 187 251 251 187 210 208 158 177 172 135
+99 98 80 13 13 13 12 12 12 12 12 12 13 13 13 12 12 12
+12 12 12 12 12 12 11 11 11 11 11 11 8 9 9 4 5 5
+1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 1 1 0 61 61 53 142 137 94 181 176 137
+204 201 155 224 223 159 251 251 187 251 251 187 251 251 187 251 251 187
+251 251 187 214 212 158 197 193 154 190 186 136 184 181 136 188 184 146
+197 193 154 204 201 155 210 208 158 210 208 158 204 201 155 194 189 146
+176 171 126 134 131 96 66 65 55 43 45 43 41 42 42 39 40 39
+35 37 36 33 36 34 27 29 28 20 20 20 15 15 15 9 11 11
+8 9 9 6 7 7 5 6 5 5 6 5 4 5 5 4 5 5
+4 5 5 4 5 5 4 5 5 4 5 5 5 6 5 4 5 5
+4 5 5 5 6 5 4 5 5 5 6 5 5 6 5 5 6 5
+5 7 7 5 7 7 5 7 7 5 7 7 5 7 7 5 7 7
+6 7 7 6 7 7 6 7 7 28 31 30 184 179 149 184 179 149
+145 141 105 84 83 72 27 29 28 5 7 7 5 6 5 16 16 16
+43 44 41 96 95 69 158 153 112 188 184 146 204 201 155 210 208 158
+204 201 155 197 193 154 184 179 149 177 172 135 168 163 120 164 159 111
+164 159 111 174 170 121 184 181 136 197 193 154 214 212 158 251 251 187
+251 251 187 251 251 187 251 251 187 251 251 187 210 208 158 177 172 135
+71 71 57 11 11 11 12 12 12 11 11 11 11 11 11 11 11 11
+10 10 9 10 10 9 8 8 7 3 4 4 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 31 33 31 121 119 87 176 171 126
+197 193 154 214 212 158 251 251 187 251 251 187 251 251 187 251 251 187
+239 239 170 210 208 158 194 189 146 178 174 128 174 170 121 176 171 126
+177 172 135 181 176 137 184 179 149 184 179 149 181 176 137 178 174 128
+158 153 112 121 119 87 53 55 47 37 39 37 33 36 34 30 32 31
+27 29 28 25 27 26 24 26 24 19 20 19 13 13 13 8 10 10
+6 8 8 6 7 7 5 6 5 4 5 5 4 5 5 4 5 5
+4 5 5 4 5 5 4 5 5 3 4 4 3 4 4 4 5 5
+4 5 5 4 5 5 4 5 5 4 5 5 4 5 5 4 5 5
+5 6 5 5 6 5 5 6 5 5 6 5 5 6 5 5 6 5
+5 6 5 5 6 5 12 14 14 145 141 105 184 179 149 177 172 135
+90 89 73 21 22 21 5 6 5 5 6 5 4 5 5 37 39 37
+38 39 37 61 61 53 134 131 96 168 163 120 184 181 136 188 184 146
+184 179 149 177 172 135 168 163 120 164 159 111 155 149 109 151 147 98
+151 147 98 164 159 111 176 171 126 184 179 149 210 208 158 239 239 170
+251 251 187 251 251 187 251 251 187 239 239 170 210 208 158 158 153 112
+46 47 43 10 10 9 10 10 9 10 10 9 8 9 9 8 9 9
+6 7 7 3 3 3 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 13 12 7 82 81 62 158 153 112
+188 184 146 210 208 158 239 239 170 251 251 187 251 251 187 251 251 187
+224 223 159 204 201 155 184 181 136 171 165 117 164 159 111 160 154 106
+158 153 112 164 159 111 168 163 120 168 163 120 168 163 120 164 159 111
+142 137 94 96 95 69 43 44 41 27 29 28 26 28 27 23 24 24
+21 22 21 18 19 18 17 17 17 18 19 18 13 13 13 8 8 7
+6 7 7 5 6 5 4 5 5 3 4 4 3 4 4 3 4 4
+3 4 4 3 4 4 3 3 3 3 3 3 3 4 4 3 4 4
+3 4 4 3 4 4 4 5 5 4 5 5 4 5 5 4 5 5
+4 5 5 4 5 5 4 5 5 4 5 5 4 5 5 4 5 5
+4 5 5 4 5 5 4 5 5 4 5 5 4 5 5 4 5 5
+4 5 5 4 5 5 4 5 5 4 5 5 31 33 31 65 66 61
+37 39 37 38 39 37 96 95 69 144 139 99 168 163 120 174 170 121
+168 163 120 164 159 111 155 149 109 149 145 103 149 143 98 142 137 94
+149 143 98 151 147 98 164 159 111 177 172 135 197 193 154 210 208 158
+251 251 187 251 251 187 251 251 187 239 239 170 197 193 154 137 133 100
+24 26 24 8 9 9 8 9 9 8 8 7 6 7 7 2 2 2
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 46 47 43 125 122 87
+176 171 126 197 193 154 210 208 158 239 239 170 251 251 187 239 239 170
+214 212 158 197 193 154 181 176 137 164 159 111 151 147 98 149 143 98
+149 143 98 149 143 98 149 145 103 155 149 109 160 154 106 149 143 98
+118 116 76 82 81 62 30 31 28 21 22 21 19 20 19 17 17 17
+14 14 13 12 12 12 10 10 9 12 12 12 10 12 12 6 8 8
+4 5 5 3 4 4 3 4 4 3 4 4 3 3 3 3 3 3
+3 3 3 3 3 3 3 3 3 3 3 3 2 3 3 2 3 3
+3 4 4 3 4 4 3 4 4 3 4 4 3 4 4 4 5 5
+4 5 5 3 4 4 3 4 4 3 4 4 3 4 4 3 4 4
+4 5 5 4 5 5 4 5 5 4 5 5 4 5 5 4 5 5
+4 5 5 3 4 4 3 4 4 23 24 24 110 109 94 72 73 67
+39 40 39 22 24 23 46 47 43 103 101 77 142 137 94 155 149 109
+160 154 106 155 149 109 149 143 98 142 137 94 142 137 94 142 137 94
+142 137 94 149 143 98 155 149 109 176 171 126 184 179 149 210 208 158
+239 239 170 251 251 187 251 251 187 214 212 158 184 179 149 105 104 92
+10 10 9 6 7 7 3 4 4 1 1 1 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 12 12 9 82 81 62
+149 145 103 181 176 137 197 193 154 210 208 158 214 212 158 214 212 158
+210 208 158 197 193 154 177 172 135 158 153 112 149 143 98 142 137 94
+142 137 94 142 137 94 149 143 98 151 147 98 151 147 98 131 127 93
+103 101 77 71 71 57 22 24 23 15 15 15 13 13 13 11 11 11
+8 9 9 6 7 7 6 7 7 4 5 5 8 9 9 6 7 7
+4 5 5 3 3 3 3 3 3 3 3 3 3 3 3 2 2 2
+2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 3 3
+2 3 3 2 3 3 2 3 3 3 4 4 3 4 4 3 4 4
+3 4 4 3 4 4 3 3 3 3 4 4 3 4 4 3 4 4
+3 4 4 3 4 4 3 4 4 3 4 4 3 4 4 3 4 4
+3 4 4 3 4 4 21 22 21 145 141 105 145 141 105 72 73 67
+17 18 17 3 4 4 21 22 20 66 65 55 118 116 76 142 137 94
+149 143 98 151 147 98 149 143 98 142 137 94 142 137 94 142 137 94
+142 137 94 149 143 98 155 149 109 168 163 120 184 179 149 210 208 158
+239 239 170 251 251 187 251 251 187 210 208 158 177 172 135 71 71 57
+3 3 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 36 38 35
+115 113 82 158 153 112 181 176 137 197 193 154 204 201 155 210 208 158
+204 201 155 188 184 146 177 172 135 164 159 111 149 145 103 142 137 94
+142 137 94 142 137 94 149 143 98 151 147 98 149 143 98 125 122 87
+96 95 69 61 61 53 16 17 12 8 9 9 8 8 7 6 7 7
+4 5 5 3 4 4 3 3 3 3 3 3 3 3 3 5 6 5
+3 4 4 2 3 3 2 2 2 2 2 2 2 2 2 2 2 2
+2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2
+2 2 2 2 2 2 2 3 3 2 3 3 2 3 3 2 3 3
+3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3
+3 3 3 2 3 3 2 3 3 3 4 4 3 4 4 3 4 4
+3 4 4 3 4 4 3 4 4 8 9 9 8 8 7 3 3 3
+3 3 3 3 3 3 9 9 8 36 38 35 82 81 62 118 116 76
+142 137 94 151 147 98 151 147 98 151 147 98 149 143 98 149 143 98
+149 143 98 151 147 98 160 154 106 176 171 126 188 184 146 210 208 158
+239 239 170 251 251 187 239 239 170 210 208 158 156 151 111 31 33 31
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7 7 5
+66 65 55 125 122 87 158 153 112 181 176 137 194 189 146 197 193 154
+197 193 154 184 179 149 177 172 135 168 163 120 156 151 111 151 147 98
+151 147 98 151 147 98 151 147 98 161 156 96 149 143 98 118 116 76
+82 81 62 53 55 47 12 12 9 4 5 5 3 4 4 3 3 3
+3 3 3 3 3 3 2 2 2 2 2 2 1 1 1 1 2 2
+3 3 3 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
+1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 1 2 2
+1 2 2 1 2 2 1 2 2 2 2 2 2 2 2 2 3 3
+2 3 3 2 3 3 2 3 3 2 3 3 2 2 2 2 2 2
+2 3 3 2 3 3 2 3 3 2 3 3 2 3 3 2 3 3
+2 3 3 2 3 3 2 3 3 2 3 3 2 3 3 3 3 3
+3 3 3 3 3 3 72 73 67 61 61 53 53 55 47 96 95 69
+131 127 93 151 147 98 161 156 96 161 156 96 151 147 98 151 147 98
+161 156 96 160 154 106 164 159 111 177 172 135 197 193 154 210 208 158
+239 239 170 251 251 187 224 223 159 197 193 154 131 127 93 9 9 8
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+24 26 24 82 81 62 131 127 93 164 159 111 178 174 128 188 184 146
+188 184 146 188 184 146 181 176 137 176 171 126 168 163 120 164 159 111
+160 154 106 160 154 106 160 154 106 160 154 106 151 147 98 125 122 87
+82 81 62 61 61 53 12 12 9 3 3 3 3 3 3 2 2 2
+2 2 2 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0
+0 0 0 2 2 2 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 2 2 1 2 2 1 2 2 1 2 2
+1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
+2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
+2 3 3 2 3 3 2 3 3 2 3 3 2 3 3 2 3 3
+2 3 3 30 32 31 72 73 67 31 33 31 36 38 35 82 81 62
+118 116 76 149 143 98 161 156 96 161 156 96 161 156 96 160 154 106
+165 161 109 165 161 109 176 171 126 188 184 146 204 201 155 214 212 158
+239 239 170 239 239 170 214 212 158 184 179 149 82 81 62 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+2 2 2 43 44 41 96 95 69 131 127 93 160 154 106 176 171 126
+184 181 136 184 181 136 184 181 136 181 176 137 178 174 128 174 170 121
+171 165 117 173 167 111 173 167 111 173 167 111 160 154 106 131 127 93
+96 95 69 66 65 55 16 17 12 2 2 2 1 1 1 1 1 1
+1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 2 2 1 2 2 1 2 2 1 2 2 1 2 2 2 2 2
+2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
+2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
+2 2 2 2 2 2 2 2 2 10 9 6 30 31 28 71 71 57
+118 116 76 149 143 98 165 161 109 165 161 109 165 161 109 173 167 111
+173 167 111 176 171 126 184 181 136 197 193 154 210 208 158 224 223 159
+251 251 187 239 239 170 210 208 158 168 163 120 40 41 39 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 13 12 7 61 61 53 96 95 69 131 127 93 160 154 106
+176 171 126 184 181 136 184 181 136 188 184 146 184 181 136 184 181 136
+184 181 136 186 182 128 186 182 128 178 174 128 174 170 121 149 145 103
+118 116 76 82 81 62 21 22 20 1 1 1 1 1 1 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2
+1 2 2 1 2 2 1 2 2 1 2 2 1 2 2 2 2 2
+2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
+2 2 2 2 2 2 2 2 2 3 3 3 30 31 28 66 65 55
+118 116 76 149 143 98 165 161 109 173 167 111 173 167 111 174 170 121
+186 182 128 190 186 136 197 193 154 210 208 158 224 223 159 251 251 187
+251 251 187 239 239 170 197 193 154 137 133 100 12 12 9 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 30 31 28 71 71 57 103 101 77 134 131 96
+164 159 111 176 171 126 184 181 136 188 184 146 194 189 146 197 193 154
+197 193 154 197 193 154 194 191 148 194 189 146 190 186 136 176 171 126
+145 141 105 103 101 77 40 41 39 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 1 2 2
+1 2 2 1 2 2 1 2 2 1 2 2 1 2 2 1 2 2
+1 2 2 1 2 2 1 2 2 1 2 2 30 31 28 71 71 57
+118 116 76 160 154 106 173 167 111 178 174 128 186 182 128 190 186 136
+194 191 148 204 201 155 210 208 158 224 223 159 251 251 187 251 251 187
+251 251 187 214 212 158 184 179 149 84 83 72 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 5 5 3 43 44 41 82 81 62 103 101 77
+142 137 94 165 161 109 178 174 128 190 186 136 197 193 154 204 201 155
+210 208 158 210 208 158 210 208 158 210 208 158 210 208 158 197 193 154
+177 172 135 145 141 105 79 78 62 5 4 3 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 2 2 1 2 2 30 31 28 82 81 62
+142 137 94 165 161 109 178 174 128 190 186 136 194 191 148 204 201 155
+210 208 158 214 212 158 239 239 170 251 251 187 251 251 187 251 251 187
+251 251 187 210 208 158 168 163 120 36 38 35 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 16 17 12 53 55 47 82 81 62
+118 116 76 151 147 98 171 165 117 184 181 136 194 191 148 210 208 158
+214 212 158 224 223 159 239 239 170 239 239 170 224 223 159 214 212 158
+197 193 154 176 171 126 115 113 82 24 26 24 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 40 41 39 103 101 77
+151 147 98 176 171 126 190 186 136 197 193 154 210 208 158 214 212 158
+239 239 170 251 251 187 251 251 187 251 251 187 251 251 187 251 251 187
+239 239 170 197 193 154 110 109 94 3 4 3 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 30 31 28 66 65 55
+96 95 69 125 122 87 160 154 106 178 174 128 194 189 146 204 201 155
+214 212 158 239 239 170 251 251 187 251 251 187 251 251 187 239 239 170
+210 208 158 188 184 146 149 145 103 61 61 53 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 61 61 53 131 127 93
+164 159 111 184 181 136 197 193 154 210 208 158 224 223 159 251 251 187
+251 251 187 251 251 187 251 251 187 251 251 187 251 251 187 251 251 187
+210 208 158 168 163 120 43 44 41 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 4 3 2 36 38 35
+71 71 57 96 95 69 142 137 94 165 161 109 184 181 136 197 193 154
+210 208 158 239 239 170 251 251 187 251 251 187 251 251 187 251 251 187
+214 212 158 197 193 154 168 163 120 103 101 77 7 7 5 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+1 1 1 0 0 0 0 0 0 0 0 0 82 81 62 142 137 94
+174 170 121 194 189 146 210 208 158 224 223 159 251 251 187 251 251 187
+251 251 187 251 251 187 251 251 187 251 251 187 251 251 187 224 223 159
+184 179 149 99 98 80 3 3 3 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7 7 5
+43 44 41 82 81 62 118 116 76 142 137 94 171 165 117 190 186 136
+204 201 155 224 223 159 251 251 187 251 251 187 251 251 187 251 251 187
+214 212 158 197 193 154 174 170 121 125 122 87 30 31 28 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1
+1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 3 4 3 82 81 62 149 143 98
+176 171 126 194 191 148 210 208 158 239 239 170 251 251 187 251 251 187
+251 251 187 251 251 187 251 251 187 251 251 187 239 239 170 204 201 155
+145 141 105 30 31 28 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+10 9 6 46 47 43 82 81 62 118 116 76 149 143 98 174 170 121
+194 189 146 210 208 158 224 223 159 251 251 187 251 251 187 224 223 159
+210 208 158 194 191 148 174 170 121 134 131 96 53 55 47 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 7 7 5 96 95 69 149 143 98
+176 171 126 194 191 148 210 208 158 239 239 170 251 251 187 251 251 187
+251 251 187 251 251 187 251 251 187 239 239 170 210 208 158 177 172 135
+75 75 61 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 10 9 6 46 47 43 82 81 62 118 116 76 149 143 98
+176 171 126 194 191 148 210 208 158 214 212 158 214 212 158 210 208 158
+197 193 154 184 181 136 164 159 111 131 127 93 53 55 47 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 7 7 5 96 95 69 149 143 98
+174 170 121 194 189 146 204 201 155 214 212 158 239 239 170 251 251 187
+251 251 187 251 251 187 239 239 170 210 208 158 184 179 149 110 109 94
+12 12 9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 10 9 6 43 44 41 82 81 62 115 113 82
+144 139 99 168 163 120 188 184 146 197 193 154 197 193 154 194 189 146
+184 181 136 174 170 121 151 147 98 118 116 76 36 38 35 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 4 3 2 82 81 62 142 137 94
+171 165 117 186 182 128 194 191 148 210 208 158 214 212 158 224 223 159
+239 239 170 224 223 159 210 208 158 184 179 149 137 133 100 36 38 35
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 7 7 5 36 38 35 71 71 57
+103 101 77 131 127 93 155 149 109 168 163 120 168 163 120 168 163 120
+164 159 111 149 143 98 125 122 87 82 81 62 13 12 7 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 61 61 53 125 122 87
+160 154 106 174 170 121 184 181 136 194 189 146 204 201 155 210 208 158
+210 208 158 204 201 155 184 179 149 145 141 105 61 61 53 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 3 3 2 30 31 28
+61 61 53 82 81 62 103 101 77 121 119 87 125 122 87 125 122 87
+118 116 76 103 101 77 79 78 62 24 26 24 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 25 27 25 96 95 69
+142 137 94 160 154 106 171 165 117 178 174 128 184 181 136 184 181 136
+181 176 137 177 172 135 145 141 105 75 75 61 5 5 3 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+16 17 12 40 41 39 61 61 53 71 71 57 71 71 57 71 71 57
+66 65 55 43 44 41 12 12 9 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 46 47 43
+96 95 69 125 122 87 142 137 94 149 145 103 155 149 109 155 149 109
+145 141 105 121 119 87 66 65 55 7 7 5 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 1 1 1 16 17 12 24 26 24 25 27 25 19 20 18
+7 7 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 2 1
+25 27 25 61 61 53 82 81 62 96 95 69 96 95 69 82 81 62
+61 61 53 25 27 25 2 2 1 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 5 6 5 13 12 7 10 9 6 3 4 3
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0
P3
-# Standard 16-color Linux logo
-80 80
+142 114
255
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 85 85 85 85 85 85 85 85 85
- 85 85 85 85 85 85 85 85 85 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 85 85 85 85 85 85
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 85 85 85 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 85 85 85 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 170 170 170 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 85 85 85 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
-170 170 170 170 170 170 85 85 85 0 0 0
- 0 0 0 0 0 0 85 85 85 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 85 85 85 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 85 85 85 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 85 85 85 170 170 170 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 170 170 170 170 170 170
-170 170 170 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 85 85 85 170 170 170 170 170 170 170 170 170
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 170 170 170 255 255 255 255 255 255
-255 255 255 170 170 170 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 85 85 85
-170 170 170 170 170 170 255 255 255 255 255 255
- 0 0 0 0 0 0 0 0 0 0 0 0
-170 170 170 255 255 255 170 170 170 170 170 170
-255 255 255 170 170 170 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 85 85 85
-170 170 170 0 0 0 0 0 0 255 255 255
- 85 85 85 0 0 0 0 0 0 0 0 0
-255 255 255 170 170 170 0 0 0 85 85 85
-170 170 170 255 255 255 170 170 170 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 85 85 85
- 85 85 85 0 0 0 0 0 0 170 170 170
- 85 85 85 0 0 0 0 0 0 0 0 0
-255 255 255 85 85 85 0 0 0 0 0 0
- 85 85 85 255 255 255 170 170 170 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 85 85 85
-170 170 170 0 0 0 0 0 0 170 170 170
- 85 85 85 85 85 85 85 85 85 85 85 85
-255 255 255 85 85 85 0 0 0 0 0 0
- 85 85 85 255 255 255 170 170 170 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
-255 255 255 0 0 0 0 0 0 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 0 0 0 0 0 0
- 85 85 85 255 255 255 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
-170 170 170 170 170 170 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 170 170 170 170 170 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 85 85 85 0 0 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 170 85 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 85 85 85 0 0 0
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 170 85 0
-170 85 0 170 85 0 85 85 85 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 85 85 85 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 85 85 85 0 0 0
- 85 85 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-170 85 0 170 85 0 170 85 0 170 85 0
-170 85 0 170 85 0 85 85 85 0 0 0
- 0 0 0 85 85 85 170 170 170 85 85 85
- 0 0 0 0 0 0 85 85 85 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 85 85 85 0 0 0
- 85 85 85 170 85 0 170 85 0 170 85 0
-170 85 0 170 85 0 170 85 0 170 85 0
-170 85 0 170 85 0 170 85 0 170 85 0
-170 170 170 170 170 170 170 170 170 0 0 0
- 0 0 0 0 0 0 170 170 170 170 170 170
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 85 85 85 170 170 170 170 85 0 170 85 0
-170 85 0 170 85 0 170 85 0 170 85 0
-170 85 0 170 85 0 170 170 170 170 170 170
-170 170 170 170 170 170 170 170 170 85 85 85
- 0 0 0 0 0 0 85 85 85 85 85 85
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 85 85 85 170 170 170 170 170 170 170 85 0
-170 85 0 170 85 0 170 85 0 170 85 0
-170 170 170 170 170 170 170 170 170 170 170 170
-255 255 255 255 255 255 255 255 255 170 170 170
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 85 85 85
-255 255 255 255 255 255 170 170 170 170 170 170
-170 170 170 170 170 170 170 170 170 170 170 170
-170 170 170 170 170 170 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 170 170 170
-255 255 255 255 255 255 170 170 170 170 170 170
-170 170 170 170 170 170 170 170 170 170 170 170
-170 170 170 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-170 170 170 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 85 85 85 255 255 255
-255 255 255 255 255 255 255 255 255 170 170 170
-170 170 170 170 170 170 170 170 170 170 170 170
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 85 85 85 0 0 0
- 0 0 0 85 85 85 170 170 170 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 85 85 85 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 85 85 85 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 170 170 170 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 85 85 85 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 0 0 0
- 85 85 85 170 170 170 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 85 85 85 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 170 170 170 170 170 170 170 170 170
-255 255 255 255 255 255 255 255 255 170 170 170
-170 170 170 170 170 170 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-170 170 170 170 170 170 170 170 170 170 170 170
-170 170 170 170 170 170 170 170 170 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
-170 170 170 170 170 170 170 170 170 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-170 170 170 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 170 170 170 170 170 170
-170 170 170 170 170 170 170 170 170 85 85 85
- 0 0 0 0 0 0 85 85 85 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 85 85 85 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 85 85 85 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
-170 170 170 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 170 170 170 170 170 170 170 170 170
- 0 0 0 0 0 0 0 0 0 85 85 85
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 85 85 85 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 85 85 85 0 0 0
- 85 85 85 0 0 0 0 0 0 85 85 85
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 170 170 170 170 170 170
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 170 170 170
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-170 170 170 85 85 85 0 0 0 0 0 0
- 0 0 0 85 85 85 85 85 85 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 85 85 85
- 0 0 0 0 0 0 85 85 85 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 170 170 170 0 0 0 85 85 85
- 85 85 85 0 0 0 85 85 85 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 85 85 85
- 0 0 0 85 85 85 170 170 170 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 170 170 170 0 0 0 85 85 85
- 85 85 85 0 0 0 85 85 85 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 85 85 85
- 0 0 0 170 170 170 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 85 85 85 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 85 85 85 0 0 0
- 0 0 0 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 170 170 170 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 85 85 85 0 0 0
- 85 85 85 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 170 170 170 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 85 85 85 0 0 0 0 0 0
-170 170 170 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 170 170 170 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 85 85 85 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 170 170 170 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 170 170 170 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 85 85 85
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 170 170 170 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 85 85 85
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 170 170 170 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 85 85 85 85 85 85
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 170 170 170 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 170 170 170 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 0 0 0
- 85 85 85 85 85 85 85 85 85 85 85 85
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 0 0 0 170 85 0
-255 255 85 170 85 0 0 0 0 0 0 0
- 85 85 85 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 170 170 170 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 85 85 85 85 85 85 0 0 0
- 0 0 0 85 85 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 0 0 0
- 0 0 0 85 85 85 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 170 170 170 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 85 170 85 0 255 255 85 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 85 85 85 85 85 85
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
- 0 0 0 0 0 0 85 85 85 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 85
-170 85 0 255 255 85 170 85 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
-170 85 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 0 0 0 0 0 0 85 85 85
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 170 85 0
-255 255 85 170 85 0 255 255 85 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 170 85 0
-255 255 85 170 85 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 0 0 0 0 0 0 0 0 0
- 85 85 85 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 85
-170 85 0 255 255 85 170 85 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 255 255 85
-170 85 0 255 255 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 0 0 0 0 0 0
- 0 0 0 85 85 85 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 170 170 170 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 255 255 85 170 85 0
-255 255 85 170 85 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 0 0 0
- 0 0 0 0 0 0 85 85 85 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 170 170 170 170 170 170 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 170 170 170 170 170 170 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 170 170 170 170 170 170 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 0 0 0 0 0 0 0 0 0
- 0 0 0 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 170 170 170 170 170 170 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 0 0 0 0 0 0 0 0 0
- 85 85 85 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 170 170 170 85 85 85 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 85 85 85 85 85 85
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-170 170 170 85 85 85 85 85 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 170 170 170
- 85 85 85 0 0 0 0 0 0 170 85 0
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 170 170 170 85 85 85
- 0 0 0 0 0 0 0 0 0 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-170 170 170 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-170 170 170 85 85 85 85 85 85 0 0 0
- 0 0 0 0 0 0 0 0 0 170 85 0
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 170 85 0
-170 85 0 170 170 170 255 255 255 255 255 255
-255 255 255 255 255 255 255 255 255 255 255 255
-255 255 255 255 255 255 170 170 170 85 85 85
- 85 85 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 85 85 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-170 85 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 85 85 85 170 85 0
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 170 85 0 170 85 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 170 85 0
-170 85 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 85 85 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-170 85 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-170 85 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 85 85 85 170 85 0
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 170 85 0 170 85 0 170 85 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 170 85 0 170 85 0
-170 85 0 170 85 0 170 85 0 170 85 0
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 170 85 0
-170 85 0 0 0 0 0 0 0 0 0 0
- 85 85 85 85 85 85 85 85 85 85 85 85
- 85 85 85 85 85 85 85 85 85 85 85 85
- 85 85 85 85 85 85 85 85 85 0 0 0
- 0 0 0 0 0 0 0 0 0 170 85 0
-170 85 0 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 255 255 85 170 85 0
-170 85 0 170 85 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 170 85 0 170 85 0
-170 85 0 170 85 0 170 85 0 170 85 0
-170 85 0 170 85 0 255 255 85 170 85 0
-255 255 85 170 85 0 170 85 0 170 85 0
- 85 85 85 85 85 85 85 85 85 85 85 85
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 85 85 85
- 85 85 85 85 85 85 85 85 85 170 85 0
-170 85 0 170 85 0 170 85 0 255 255 85
-170 85 0 255 255 85 170 85 0 170 85 0
-170 85 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 170 85 0
-170 85 0 170 85 0 170 85 0 170 85 0
-170 85 0 170 85 0 170 85 0 170 85 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 170 85 0
-170 85 0 170 85 0 170 85 0 170 85 0
-170 85 0 170 85 0 170 85 0 170 85 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 170 85 0 170 85 0 170 85 0
-170 85 0 170 85 0 170 85 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
-170 85 0 170 85 0 170 85 0 170 85 0
-170 85 0 170 85 0 170 85 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
- 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
+85 85 85 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 85 85 85 85 85 85 0 0 0 85 85 85 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 0 0 0
+85 85 85 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 85 85 85 85 85 85 85 85 85 85 85 85
+0 0 0 85 85 85 85 85 85 0 0 0 85 85 85 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
+85 85 85 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170
+85 85 85 85 85 85 85 85 85 85 85 85 0 0 0 85 85 85
+0 0 0 85 85 85 85 85 85 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
+85 85 85 0 0 0 85 85 85 85 85 85 85 85 85 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 85 85 85 170 170 170 170 85 0 170 170 170 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+85 85 85 85 85 85 85 85 85 85 85 85 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+170 170 170 255 255 85 170 170 170 170 170 170 170 170 170 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170
+255 255 85 170 170 170 170 170 170 170 85 0 85 255 85 170 85 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 85 85 85 170 170 170 170 85 0
+170 170 170 170 170 170 255 255 85 170 170 170 170 170 170 85 85 85
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 85 85 85 170 85 0 170 170 170
+170 170 170 170 85 0 170 170 170 170 170 170 170 85 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
+85 85 85 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 85 85 85 85 85 85 85 255 85
+255 85 85 85 255 85 170 170 170 170 85 0 170 170 170 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
+85 85 85 85 85 85 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 170 85 0 85 85 85 85 85 85
+170 170 170 170 85 0 170 170 170 85 85 85 170 85 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 85 85 85 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 85 85 85 85 85 85 170 85 0
+85 85 85 85 85 85 170 85 0 85 255 85 85 85 85 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+85 85 85 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
+0 0 0 85 85 85 85 85 85 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 170 85 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 85 85 85 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 0 170 0 85 85 85 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+170 85 0 85 255 85 170 85 0 170 85 0 170 85 0 85 255 85
+170 85 0 170 85 0 0 170 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 170 0 170 85 0
+255 255 85 170 85 0 255 255 85 255 255 85 255 255 85 170 85 0
+255 255 85 85 255 85 170 85 0 170 85 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 170 85 0 255 255 85
+85 255 85 255 255 85 255 255 85 170 85 0 255 255 85 255 255 85
+255 255 85 170 85 0 255 255 85 85 255 85 170 85 0 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 255 255 85 170 85 0
+255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 170 85 0
+255 255 85 255 255 85 255 255 85 255 255 85 170 85 0 85 255 85
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 85 85 85 170 170 170 0 0 0
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 170 85 0 255 255 85 255 255 85
+255 255 85 255 255 85 170 85 0 255 255 85 85 255 85 255 255 85
+255 255 85 170 85 0 255 255 85 170 85 0 255 255 85 170 85 0
+170 85 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 0 0 0 85 85 85 170 170 170 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 170 85 0 255 255 85 85 255 85 255 255 85
+170 170 170 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
+255 255 85 255 255 85 85 255 85 255 255 85 255 255 85 255 255 85
+85 255 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 170 85 0 255 255 85 255 255 85 255 255 85
+255 255 255 255 255 85 255 255 85 170 85 0 255 255 85 170 85 0
+255 255 85 255 255 85 255 255 85 255 255 85 170 85 0 255 255 85
+170 85 0 170 85 0 0 170 0 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 170 85 0 85 255 85 255 255 85 170 170 170 255 255 255
+255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
+255 255 85 255 255 85 170 85 0 255 255 85 85 255 85 255 255 85
+255 255 85 85 255 85 0 0 0 85 85 85 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 85 85 85 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 255 255 85 255 255 85 255 255 85 255 255 255 255 255 85
+255 255 85 255 255 85 85 255 85 255 255 85 255 255 85 85 255 85
+255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 170 85 0
+255 255 85 170 85 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
+85 85 85 0 0 0 85 85 85 85 85 85 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+170 85 0 170 85 0 255 255 85 255 255 85 255 255 255 170 170 170
+255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
+170 85 0 255 255 85 255 255 85 170 85 0 255 255 85 255 255 85
+255 255 85 85 255 85 170 85 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 0 0 0
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+255 255 85 85 255 85 255 255 85 170 170 170 255 255 255 255 255 85
+255 255 85 255 255 85 170 85 0 255 255 85 255 255 85 255 255 85
+255 255 85 255 255 85 255 255 85 255 255 85 85 255 85 170 85 0
+255 255 85 170 85 0 170 85 0 0 0 0 85 85 85 0 0 0
+85 85 85 85 85 85 85 85 85 170 170 170 170 170 170 170 170 170
+85 255 85 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170
+170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170
+170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170
+170 170 170 170 170 170 170 170 170 170 170 170 255 255 85 170 170 170
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 170 0
+170 85 0 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
+255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
+255 255 85 255 255 85 85 255 85 255 255 85 170 85 0 170 85 0
+170 85 0 85 255 85 255 255 85 85 85 85 170 170 170 170 170 170
+170 170 170 170 170 170 170 170 170 85 255 85 170 170 170 170 170 170
+85 85 85 170 170 170 170 170 170 170 85 0 170 170 170 170 170 170
+85 255 85 170 170 170 170 85 0 170 170 170 85 255 85 255 85 85
+85 255 85 170 170 170 255 255 85 85 85 85 255 255 85 170 170 170
+85 255 85 170 170 170 255 255 85 170 170 170 170 170 170 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 255 255 85
+255 255 85 255 255 85 255 255 85 255 255 255 255 255 85 255 255 85
+255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 170 85 0
+255 255 85 255 255 85 255 255 85 170 85 0 0 170 0 85 85 85
+170 170 170 170 170 170 255 255 85 170 170 170 170 170 170 85 255 85
+255 85 85 85 255 85 85 85 85 255 85 85 85 85 85 170 170 170
+170 85 0 170 170 170 85 85 85 85 255 85 85 85 85 85 85 85
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 255 255 85
+170 85 0 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
+255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
+255 255 85 255 255 85 170 85 0 255 255 85 85 85 85 85 85 85
+255 255 85 170 170 170 85 85 85 85 85 85 0 0 0 85 85 85
+0 0 0 85 85 85 85 85 85 170 170 170 170 85 0 170 170 170
+170 170 170 255 255 85 170 170 170 85 85 85 85 85 85 85 85 85
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 170 85 0 255 255 85
+255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
+255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
+255 255 85 255 255 85 255 255 85 170 85 0 170 85 0 0 170 0
+0 0 0 170 85 0 170 85 0 0 170 0 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 85 85 85 170 170 170 85 85 85
+170 170 170 85 85 85 85 85 85 170 170 170 170 85 0 85 85 85
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 255 255 85 170 85 0
+255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 170 85 0
+255 255 85 255 255 85 255 255 85 170 85 0 255 255 85 255 255 85
+170 85 0 255 255 85 85 255 85 255 255 85 255 255 85 170 85 0
+170 85 0 255 255 85 170 85 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 85 85 85 85 85 85 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 255 255 85 255 255 85
+255 255 85 255 255 85 170 85 0 255 255 85 255 255 85 255 255 85
+255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
+255 255 85 255 255 85 255 255 85 170 85 0 255 255 85 255 255 85
+85 255 85 170 85 0 0 170 0 85 85 85 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 85 85 85 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 170 0 170 85 0 255 255 85
+85 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
+255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
+170 85 0 255 255 85 85 255 85 255 255 85 255 255 85 170 85 0
+85 255 85 170 85 0 170 85 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 170 85 0 255 255 85 255 255 85
+255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
+255 255 85 170 85 0 255 255 85 85 255 85 255 255 85 170 85 0
+255 255 85 255 255 85 170 85 0 255 255 85 170 85 0 85 255 85
+170 85 0 170 85 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 255 255 85 170 85 0
+255 255 85 170 85 0 255 255 85 170 85 0 255 255 85 85 255 85
+255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
+255 255 85 170 85 0 255 255 85 85 255 85 170 85 0 170 85 0
+0 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 85 85 85 85 85 85 85 85 85 85 85 85
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 170 85 0 255 255 85 255 255 85
+255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85
+255 255 85 255 255 85 170 85 0 255 255 85 170 85 0 85 255 85
+255 255 85 85 255 85 170 85 0 170 85 0 85 255 85 170 85 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 255 255 85 85 255 85
+255 255 85 255 255 85 85 255 85 255 255 85 255 255 85 255 255 85
+255 255 85 170 85 0 255 255 85 85 255 85 255 255 85 255 255 85
+170 85 0 170 85 0 85 255 85 170 85 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 85 85 85 170 170 170 170 170 170 170 170 170
+170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 85 85 85
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 255 255 85 255 255 85
+170 85 0 255 255 85 255 255 85 170 85 0 255 255 85 170 85 0
+255 255 85 85 255 85 170 85 0 255 255 85 170 85 0 85 255 85
+170 85 0 170 85 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 170 170 170 170 170 170 170 170 170 170 170 170
+170 170 170 170 170 170 170 170 170 85 85 85 85 85 85 85 85 85
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 170 85 0 255 255 85
+255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 85 255 85
+170 85 0 255 255 85 170 85 0 85 255 85 170 85 0 170 85 0
+0 170 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 170 170 170 170 170 170 255 255 255 170 170 170
+170 170 170 170 170 170 85 85 85 85 85 85 85 85 85 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 255 85 255 255 85
+170 85 0 255 255 85 255 255 85 170 85 0 85 255 85 170 85 0
+255 255 85 170 85 0 0 170 0 170 85 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 170 170 170 170 170 170 170 170 170 85 85 85
+85 85 85 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 255 255 85
+255 255 85 255 255 85 255 255 85 255 255 85 170 85 0 170 85 0
+0 170 0 85 85 85 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+255 255 85 255 255 85 170 85 0 0 170 0 85 85 85 85 85 85
+85 85 85 85 85 85 0 0 0 85 85 85 85 85 85 0 0 0
+85 85 85 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 85 85 85 85 85 85 170 170 170 170 170 170 85 85 85
+170 170 170 170 170 170 170 170 170 170 170 170 85 85 85 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 170 85 0 85 85 85 0 0 0 0 0 0 0 0 0
+85 85 85 85 85 85 85 85 85 85 85 85 170 170 170 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
+170 170 170 170 170 170 170 170 170 170 170 170 255 255 255 255 255 255
+255 255 255 255 255 255 255 255 255 170 170 170 255 255 255 170 170 170
+170 170 170 170 170 170 170 170 170 85 85 85 85 85 85 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 170 170 170 170 170 170
+255 255 255 255 255 255 255 255 255 170 170 170 255 255 255 170 170 170
+255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
+255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
+255 255 255 255 255 255 170 170 170 255 255 255 170 170 170 85 85 85
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 170 170 170 170 170 170
+255 255 255 170 170 170 255 255 255 255 255 255 255 255 255 255 255 255
+255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 170 170 170
+255 255 255 255 255 255 170 170 170 255 255 255 255 255 255 255 255 255
+255 255 255 255 255 255 255 255 255 255 255 255 170 170 170 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 170 170 170
+170 170 170 170 170 170 255 255 255 170 170 170 255 255 255 170 170 170
+255 255 255 170 170 170 255 255 255 170 170 170 255 255 255 255 255 255
+255 255 255 170 170 170 255 255 255 170 170 170 255 255 255 170 170 170
+170 170 170 170 170 170 170 170 170 170 170 170 85 85 85 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+85 85 85 85 85 85 85 85 85 0 0 0 85 85 85 85 85 85
+85 85 85 85 85 85 85 85 85 170 170 170 170 170 170 170 170 170
+170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170
+170 170 170 170 170 170 170 170 170 170 170 170 85 85 85 170 170 170
+170 170 170 170 170 170 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
+170 170 170 85 85 85 85 85 85 85 85 85 0 0 0 85 85 85
+0 0 0 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 0 0 0
+85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 85 85 85
+85 85 85 85 85 85 85 85 85 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 85 85 85 170 170 170 85 85 85
+85 85 85 85 85 85 85 85 85 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 85 85 85 85 85 85 85 85 85
+85 85 85 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 85 85 85 170 170 170 85 85 85 85 85 85
+85 85 85 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 170 170 170 170 170 170
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 170 170 170 85 85 85 85 85 85 85 85 85
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 170 170 170 255 255 255 170 170 170
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 170 170 170
+170 170 170 255 255 255 170 170 170 170 170 170
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 170 170 170 85 85 85 85 85 85 85 85 85 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 170 170 170
+255 255 255 255 255 255 170 170 170 170 170 170
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 170 170 170 170 170 170 255 255 255
+255 255 255 170 170 170 170 170 170 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+170 170 170 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 170 170 170 255 255 255 255 255 255 255 255 255
+170 170 170 170 170 170 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+170 170 170 170 170 170 255 255 255 255 255 255 255 255 255 170 170 170
+170 170 170 170 170 170 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 170 170 170
+170 170 170 255 255 255 255 255 255 255 255 255 170 170 170 170 170 170
+170 170 170 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
+85 85 85 85 85 85 85 85 85 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 85 85 85 85 85 85 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 170 170 170 170 170 170 170 170 170
+255 255 255 255 255 255 255 255 255 255 255 255 170 170 170 170 170 170
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
+85 85 85 85 85 85 85 85 85 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 85 85 85 85 85 85 85 85 85 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+85 85 85 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 170 170 170 170 170 170 255 255 255 255 255 255 255 255 255
+255 255 255 255 255 255 170 170 170 170 170 170 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
+85 85 85 85 85 85 85 85 85 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 170 170 170 255 255 255 85 85 85 85 85 85
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+85 85 85 170 170 170 85 85 85 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+170 170 170 170 170 170 255 255 255 170 170 170 255 255 255 255 255 255
+255 255 255 255 255 255 170 170 170 170 170 170 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 170 170 170 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 85 85 85 85 85 85 85 85 85
+85 85 85 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 85 85 85 170 170 170 255 255 255 170 170 170 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
+255 255 255 170 170 170 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
+255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
+170 170 170 170 170 170 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 255 255 255 170 170 170 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 85 85 85 85 85 85 0 0 0
+85 85 85 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 85 85 85 255 255 255 255 255 255 255 255 255 85 85 85
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 170 170 170
+255 255 255 170 170 170 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 170 170 170 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 170 170 170
+170 170 170 255 255 255 255 255 255 255 255 255 255 255 255 170 170 170
+170 170 170 170 170 170 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+170 170 170 255 255 255 255 255 255 170 170 170 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 85 85 85 85 85 85 0 0 0
+85 85 85 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
+85 85 85 170 170 170 255 255 255 255 255 255 255 255 255 85 85 85
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 255 255 255
+255 255 255 170 170 170 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 170 170 170 170 170 170 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 85 85 85 85 85 85 85 85 85
+170 170 170 255 255 255 255 255 255 255 255 255 170 170 170 170 170 170
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 170 170 170 170 170 170
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+170 170 170 255 255 255 255 255 255 255 255 255 85 85 85 0 0 0
+0 0 0 85 85 85 85 85 85 85 85 85 85 85 85 0 0 0
+85 85 85 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+85 85 85 170 170 170 255 255 255 255 255 255 255 255 255 170 170 170
+0 0 0 85 85 85 0 0 0 85 85 85 170 170 170 255 255 255
+255 255 255 170 170 170 85 85 85 0 0 0 0 0 0 0 0 0
+85 85 85 255 255 255 255 255 255 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
+0 0 0 85 85 85 85 85 85 0 0 0 85 85 85 85 85 85
+170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 255 255 255
+170 170 170 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 255 255 255 255 255 255 255 255 255 255 255 255 0 0 0
+0 0 0 85 85 85 85 85 85 0 0 0 85 85 85 0 0 0
+85 85 85 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
+85 85 85 255 255 255 255 255 255 255 255 255 170 170 170 170 170 170
+85 85 85 0 0 0 0 0 0 85 85 85 170 170 170 255 255 255
+255 255 255 170 170 170 0 0 0 0 0 0 0 0 0 0 0 0
+170 170 170 255 255 255 170 170 170 0 0 0 0 0 0 0 0 0
+85 85 85 170 170 170 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+85 85 85 85 85 85 0 0 0 85 85 85 85 85 85 0 0 0
+85 85 85 85 85 85 170 170 170 85 85 85 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170
+255 255 255 170 170 170 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 170 170 170 255 255 255 255 255 255 255 255 255 170 170 170
+0 0 0 85 85 85 85 85 85 85 85 85 0 0 0 0 0 0
+85 85 85 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+170 170 170 170 170 170 255 255 255 170 170 170 255 255 255 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 170 170 170 255 255 255
+170 170 170 170 170 170 0 0 0 0 0 0 0 0 0 85 85 85
+170 170 170 255 255 255 255 255 255 0 0 0 0 0 0 85 85 85
+255 255 255 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 85 85 85
+85 85 85 0 0 0 85 85 85 85 85 85 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 255 255 255
+255 255 255 255 255 255 170 170 170 0 0 0 0 0 0 0 0 0
+85 85 85 170 170 170 255 255 255 170 170 170 170 170 170 170 170 170
+85 85 85 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 85 85 85
+85 85 85 170 170 170 255 255 255 170 170 170 170 170 170 85 85 85
+85 85 85 0 0 0 85 85 85 85 85 85 85 85 85 170 170 170
+170 170 170 85 85 85 85 85 85 0 0 0 0 0 0 85 85 85
+170 170 170 170 170 170 85 85 85 0 0 0 0 0 0 170 170 170
+170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 170 170 170
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 170 170 170
+255 255 255 170 170 170 170 170 170 85 85 85 0 0 0 0 0 0
+0 0 0 85 85 85 170 170 170 170 170 170 255 255 85 85 85 85
+85 85 85 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
+85 85 85 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 85 85 85 0 0 0 85 85 85
+85 85 85 170 170 170 170 170 170 170 170 170 170 85 0 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 170 170 170 170 85 0
+170 170 170 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+170 85 0 170 170 170 85 85 85 0 0 0 85 85 85 85 85 85
+170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 255 255 255
+170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+255 255 255 170 170 170 170 170 170 85 85 85 0 0 0 0 0 0
+0 0 0 85 85 85 170 85 0 170 170 170 170 170 170 85 85 85
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 85 85 85
+85 85 85 170 85 0 85 255 85 170 85 0 170 170 170 85 85 85
+85 85 85 0 0 0 0 0 0 85 85 85 170 85 0 85 255 85
+170 85 0 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
+85 85 85 85 85 85 170 85 0 0 0 0 85 85 85 85 85 85
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 255 255 255
+255 255 255 170 170 170 0 0 0 0 0 0 0 0 0 0 0 0
+170 170 170 170 170 170 170 170 170 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 170 170 170 170 85 0 170 170 170 170 85 0
+85 85 85 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 85 85 85 85 85 85 0 0 0
+85 85 85 85 85 85 255 85 85 170 170 170 85 255 85 170 85 0
+85 85 85 85 85 85 170 85 0 85 85 85 170 170 170 85 85 85
+170 170 170 170 85 0 85 85 85 85 85 85 85 85 85 85 85 85
+170 85 0 85 255 85 85 85 85 85 85 85 85 85 85 170 85 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 85 85 85 0 0 0 0 0 0 0 0 0 170 170 170
+255 255 255 170 170 170 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 170 85 0 170 170 170 170 85 0 85 85 85 0 0 0
+85 85 85 85 85 85 85 255 85 170 170 170 170 170 170 170 85 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
+0 0 0 85 85 85 85 85 85 0 0 0 85 85 85 85 85 85
+85 85 85 85 85 85 85 255 85 255 85 85 170 170 170 170 170 170
+170 170 170 85 255 85 170 170 170 170 85 0 170 170 170 170 85 0
+170 170 170 85 85 85 85 255 85 170 85 0 170 170 170 170 85 0
+170 170 170 170 170 170 170 85 0 85 85 85 85 85 85 85 255 85
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 170 170 170 170 170 170 0 0 0 0 0 0 85 85 85
+170 170 170 170 170 170 85 85 85 0 0 0 0 0 0 0 0 0
+85 85 85 85 85 85 255 255 85 85 85 85 85 85 85 85 85 85
+85 255 85 255 85 85 170 170 170 170 85 0 170 170 170 85 255 85
+85 85 85 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 85 85 85 85 85 85 0 0 0
+85 85 85 85 85 85 170 85 0 170 170 170 170 170 170 255 255 85
+170 170 170 255 85 85 170 170 170 170 170 170 255 255 85 170 170 170
+85 255 85 170 170 170 255 85 85 170 170 170 170 170 170 170 170 170
+170 170 170 170 170 170 170 170 170 170 85 0 170 170 170 170 85 0
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 170 170 170 85 85 85 0 0 0 85 85 85
+85 85 85 170 85 0 85 85 85 0 0 0 85 85 85 85 85 85
+85 85 85 170 85 0 170 170 170 170 170 170 255 255 85 170 170 170
+170 170 170 170 170 170 255 255 85 170 170 170 170 170 170 255 85 85
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+85 85 85 85 85 85 0 0 0 85 85 85 85 85 85 85 85 85
+85 85 85 85 85 85 170 170 170 255 255 85 170 170 170 170 170 170
+170 170 170 255 255 85 170 170 170 170 170 170 170 170 170 170 85 0
+170 170 170 255 255 85 170 170 170 255 255 85 170 170 170 255 255 85
+170 170 170 255 255 85 170 170 170 170 170 170 85 255 85 170 85 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 170 170 170 85 85 85 85 85 85 0 0 0
+85 85 85 85 85 85 170 170 170 85 85 85 170 170 170 170 85 0
+170 170 170 85 255 85 170 170 170 170 85 0 170 170 170 170 170 170
+255 255 85 170 170 170 170 170 170 255 255 255 255 255 85 170 170 170
+255 255 85 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 85 85 85 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+85 85 85 170 85 0 170 170 170 170 170 170 170 170 170 255 255 255
+170 170 170 255 255 255 255 255 85 170 170 170 255 255 85 170 170 170
+255 255 85 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170
+170 170 170 170 170 170 170 170 170 255 85 85 170 170 170 170 170 170
+85 85 85 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 85 85 85 170 85 0 85 85 85
+85 85 85 255 255 85 170 170 170 170 170 170 170 170 170 170 170 170
+255 255 85 170 170 170 170 170 170 255 255 85 170 170 170 170 170 170
+170 170 170 255 255 255 255 255 255 170 170 170 255 255 255 170 170 170
+170 170 170 85 85 85 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 170 170 170 170 170 170 85 85 85 0 0 0 0 0 0
+0 0 0 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
+85 85 85 85 255 85 170 170 170 255 255 85 255 255 255 255 255 255
+255 255 255 170 170 170 255 255 255 170 170 170 170 170 170 170 170 170
+170 170 170 170 170 170 255 255 85 170 170 170 255 255 85 255 255 255
+255 255 85 255 255 255 255 255 85 170 170 170 170 170 170 170 85 0
+170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
+85 85 85 170 170 170 255 255 85 170 170 170 255 255 85 170 170 170
+170 170 170 255 255 85 170 170 170 170 170 170 170 170 170 255 255 85
+255 255 255 255 255 255 255 255 85 255 255 255 255 255 255 170 170 170
+255 255 85 85 85 85 85 85 85 0 0 0 0 0 0 85 85 85
+85 85 85 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+85 85 85 170 170 170 170 170 170 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+85 85 85 170 170 170 170 170 170 170 170 170 255 255 255 170 170 170
+255 255 255 255 255 255 255 255 255 170 170 170 170 170 170 255 255 85
+170 170 170 255 255 85 170 170 170 255 255 255 170 170 170 255 255 255
+255 255 255 255 255 255 170 170 170 255 255 85 170 170 170 255 255 85
+85 85 85 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 170 85 0 170 170 170
+255 255 85 170 170 170 170 170 170 255 255 255 255 255 255 255 255 255
+170 170 170 170 170 170 170 170 170 255 255 85 170 170 170 170 170 170
+255 255 255 170 170 170 255 255 255 255 255 255 170 170 170 255 255 255
+170 170 170 170 170 170 85 85 85 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 170 170 170 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 85 85 85 85 85 85 0 0 0
+85 85 85 170 85 0 255 255 255 170 170 170 255 255 255 255 255 255
+255 255 85 255 255 255 170 170 170 255 255 85 170 170 170 170 170 170
+170 170 170 170 170 170 170 170 170 255 255 85 255 255 255 255 255 255
+170 170 170 255 255 255 255 255 255 170 170 170 170 170 170 170 170 170
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 85 255 85 170 170 170
+170 170 170 255 255 85 170 170 170 255 255 255 170 170 170 255 255 255
+255 255 255 255 255 255 255 255 85 170 170 170 170 170 170 255 255 255
+170 170 170 255 255 255 255 255 255 170 170 170 255 255 255 255 255 85
+170 170 170 170 85 0 85 85 85 0 0 0 0 0 0 85 85 85
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 85 85 85 0 0 0 0 0 0 0 0 0 85 85 85
+85 85 85 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 170 170 170 170 170 170 255 255 85 170 170 170 255 255 255
+255 255 255 170 170 170 255 255 255 170 170 170 170 170 170 255 255 85
+170 170 170 255 255 85 170 170 170 255 255 255 170 170 170 255 255 255
+255 255 255 255 255 255 255 255 255 255 255 255 170 170 170 255 255 85
+85 85 85 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 170 85 0 170 170 170
+170 170 170 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
+170 170 170 170 170 170 170 170 170 170 170 170 255 255 85 170 170 170
+255 255 85 255 255 255 170 170 170 255 255 255 170 170 170 170 170 170
+170 170 170 170 170 170 85 85 85 0 0 0 85 85 85 85 85 85
+0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
+85 85 85 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+85 85 85 85 85 85 170 170 170 170 170 170 255 255 255 170 170 170
+255 255 255 170 170 170 255 255 85 170 170 170 170 170 170 170 170 170
+255 85 85 170 170 170 170 170 170 170 170 170 255 255 255 255 255 255
+170 170 170 255 255 255 255 255 255 170 170 170 255 255 255 170 170 170
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 170 170 170
+255 255 85 170 170 170 255 255 255 170 170 170 255 255 255 255 255 255
+255 255 85 255 255 255 170 170 170 255 255 85 170 170 170 170 170 170
+170 170 170 170 170 170 255 255 85 170 170 170 170 170 170 255 255 85
+170 170 170 170 85 0 85 85 85 0 0 0 85 85 85 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 170 170 170
+170 170 170 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 170 170 170 255 255 85 170 170 170 170 170 170
+255 255 85 170 170 170 170 170 170 170 170 170 170 170 170 255 85 85
+85 255 85 170 170 170 170 170 170 170 170 170 255 255 85 170 170 170
+255 255 255 255 255 255 255 255 255 255 255 85 170 170 170 170 170 170
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 255 255 85
+170 170 170 170 170 170 255 255 255 255 255 255 255 255 255 170 170 170
+255 255 255 170 170 170 170 170 170 170 170 170 170 170 170 255 85 85
+170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170
+170 170 170 85 85 85 85 85 85 0 0 0 85 85 85 0 0 0
+85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 170 170 170 170 170 170 170 170 170
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 85 85 85 170 85 0 170 170 170 170 170 170 170 170 170
+170 170 170 170 170 170 170 170 170 170 85 0 170 170 170 85 255 85
+255 85 85 170 170 170 255 255 85 170 170 170 170 170 170 255 255 255
+255 255 255 170 170 170 255 255 255 255 255 255 170 170 170 170 170 170
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170
+170 170 170 255 255 85 170 170 170 255 255 85 255 255 255 255 255 255
+170 170 170 170 170 170 255 255 85 170 170 170 255 85 85 85 255 85
+170 170 170 170 85 0 170 170 170 170 170 170 255 255 85 170 170 170
+170 85 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 85 85 85 85 85 85 85 85 85 170 170 170 255 255 85
+170 170 170 170 85 0 170 170 170 170 170 170 170 85 0 85 85 85
+170 170 170 170 85 0 85 85 85 170 170 170 170 170 170 170 170 170
+170 170 170 255 255 255 255 255 255 255 255 85 170 170 170 170 170 170
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 85 0
+170 170 170 170 170 170 255 255 255 170 170 170 255 255 255 170 170 170
+255 255 255 170 170 170 170 170 170 170 85 0 170 170 170 85 85 85
+170 170 170 170 170 170 170 85 0 170 170 170 170 85 0 85 85 85
+85 255 85 85 85 85 0 0 0 0 0 0 0 0 0 85 85 85
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
+85 85 85 0 0 0 85 85 85 170 85 0 85 85 85 170 170 170
+170 85 0 170 170 170 85 255 85 170 85 0 170 170 170 85 85 85
+170 85 0 170 170 170 170 170 170 255 255 85 170 170 170 255 255 255
+255 255 85 255 255 255 170 170 170 170 170 170 170 170 170 170 85 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 255 255 85
+170 170 170 255 255 85 170 170 170 170 170 170 85 255 85 170 170 170
+170 85 0 170 85 0 170 170 170 85 255 85 85 85 85 170 170 170
+170 85 0 85 85 85 0 0 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 170 170 170 85 85 85
+0 0 0 0 0 0 0 0 0 85 85 85 170 85 0 85 85 85
+170 170 170 170 85 0 170 170 170 85 85 85 170 170 170 170 85 0
+170 170 170 85 255 85 170 85 0 170 170 170 170 170 170 170 170 170
+255 255 255 170 170 170 255 255 255 255 255 255 170 170 170 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+170 85 0 170 170 170 255 255 85 170 170 170 255 255 255 170 170 170
+170 170 170 170 170 170 170 170 170 170 85 0 170 170 170 170 85 0
+170 170 170 85 255 85 170 85 0 170 170 170 170 85 0 85 85 85
+85 85 85 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
+85 255 85 170 170 170 170 85 0 170 170 170 170 85 0 85 255 85
+170 170 170 170 85 0 170 170 170 170 170 170 170 170 170 255 255 85
+170 170 170 255 255 255 170 170 170 170 170 170 170 170 170 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 170 85 0 85 85 85 170 170 170 255 255 85 170 170 170
+170 170 170 255 255 85 170 170 170 170 170 170 170 170 170 170 85 0
+170 170 170 85 85 85 170 170 170 170 85 0 170 170 170 85 85 85
+170 85 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 170 85 0
+85 85 85 255 85 85 85 255 85 170 85 0 170 170 170 170 170 170
+170 85 0 170 170 170 85 85 85 255 255 85 170 170 170 170 170 170
+255 255 255 170 170 170 255 255 255 255 255 85 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 170 170 170 170 85 0 170 170 170 170 170 170
+170 170 170 170 170 170 170 170 170 255 255 85 85 85 85 170 170 170
+85 255 85 255 85 85 170 170 170 85 255 85 255 85 85 85 255 85
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 85 85 85 0 0 0 85 85 85
+85 85 85 85 255 85 255 85 85 170 170 170 85 255 85 170 85 0
+170 170 170 170 170 170 255 255 85 170 170 170 170 170 170 255 255 255
+170 170 170 255 255 255 170 170 170 170 170 170 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 170 170 170 85 85 85 255 255 85
+170 170 170 255 255 85 170 170 170 170 170 170 170 170 170 255 255 85
+85 85 85 255 255 85 170 170 170 170 85 0 170 170 170 85 85 85
+170 85 0 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+170 170 170 170 85 0 170 170 170 170 85 0 170 170 170 170 170 170
+170 85 0 170 170 170 170 170 170 170 170 170 255 255 85 170 170 170
+255 255 85 255 255 255 170 170 170 170 170 170 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 170 85 0 85 85 85 170 170 170
+170 85 0 170 170 170 170 170 170 255 255 85 170 170 170 170 170 170
+170 170 170 170 170 170 170 170 170 255 255 85 170 170 170 170 85 0
+85 85 85 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
+170 85 0 85 255 85 170 170 170 170 170 170 255 255 85 170 170 170
+255 255 85 170 170 170 170 170 170 170 170 170 255 255 255 255 255 255
+255 255 255 170 170 170 255 255 85 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 170 85 0
+170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 255 255 85
+170 170 170 255 255 85 170 170 170 170 170 170 170 170 170 170 170 170
+170 170 170 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+85 85 85 170 85 0 170 170 170 170 85 0 170 170 170 170 170 170
+170 170 170 255 255 85 170 170 170 255 255 85 170 170 170 255 255 255
+170 170 170 255 255 255 170 170 170 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85
+170 85 0 170 170 170 170 85 0 255 255 85 170 170 170 170 170 170
+170 170 170 170 170 170 255 255 85 170 170 170 255 255 85 170 170 170
+255 255 85 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
+85 85 85 170 170 170 255 255 85 170 170 170 255 255 85 170 170 170
+170 170 170 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255
+170 170 170 170 170 170 170 170 170 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 170 0 85 85 85
+170 85 0 85 255 85 170 170 170 170 170 170 170 170 170 255 255 85
+255 255 255 170 170 170 255 255 255 170 170 170 255 255 255 170 170 170
+170 170 170 255 255 85 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+170 85 0 170 170 170 170 170 170 170 170 170 170 170 170 255 255 85
+170 170 170 255 255 255 170 170 170 255 255 255 170 170 170 255 255 255
+255 255 255 255 255 85 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+85 85 85 170 85 0 170 170 170 170 170 170 255 255 85 170 170 170
+170 170 170 255 255 255 255 255 255 255 255 255 170 170 170 255 255 255
+170 170 170 170 170 170 170 170 170 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 255 85
+170 170 170 255 255 85 170 170 170 255 255 85 255 255 255 255 255 255
+255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 170 170 170
+170 170 170 170 170 170 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 85 85 85 85 85 85 170 85 0 170 170 170 170 170 170
+255 255 85 170 170 170 255 255 255 255 255 85 255 255 255 255 255 255
+170 170 170 255 255 85 170 170 170 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 85 0
+170 170 170 170 170 170 170 170 170 255 255 255 170 170 170 255 255 255
+170 170 170 255 255 255 170 170 170 255 255 255 255 255 85 255 255 255
+170 170 170 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 170 85 0 85 85 85 170 170 170 170 170 170 170 170 170
+170 170 170 255 255 255 170 170 170 255 255 255 255 255 255 170 170 170
+255 255 85 170 170 170 170 170 170 170 85 0 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170
+255 255 85 170 170 170 255 255 85 170 170 170 255 255 255 255 255 255
+255 255 255 255 255 255 255 255 255 255 255 255 170 170 170 170 170 170
+170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 85 85 85 85 85 85 170 85 0 170 170 170
+255 255 85 170 170 170 255 255 85 255 255 255 170 170 170 255 255 255
+170 170 170 170 170 170 170 170 170 170 170 170 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170
+170 85 0 170 170 170 255 255 255 170 170 170 255 255 255 170 170 170
+255 255 255 255 255 255 170 170 170 255 255 255 255 255 85 170 170 170
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 85 85 85 170 85 0 85 85 85 170 170 170
+170 170 170 170 170 170 170 170 170 170 170 170 255 255 85 170 170 170
+255 255 85 170 170 170 170 85 0 85 255 85 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 85 0
+170 170 170 170 170 170 255 255 85 170 170 170 255 255 255 255 255 255
+255 255 85 255 255 255 170 170 170 255 255 255 170 170 170 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
+170 85 0 170 170 170 170 170 170 255 255 85 170 170 170 170 170 170
+170 170 170 170 170 170 170 170 170 170 85 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
+255 255 85 170 170 170 170 170 170 170 170 170 255 255 85 170 170 170
+255 255 255 170 170 170 255 255 85 170 170 170 85 85 85 85 85 85
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
+85 85 85 170 85 0 170 170 170 170 170 170 170 170 170 170 170 170
+170 85 0 170 170 170 170 85 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85
+170 170 170 170 170 170 255 255 85 170 170 170 170 170 170 170 170 170
+170 170 170 255 255 255 170 170 170 170 170 170 85 85 85 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+85 85 85 85 85 85 85 85 85 170 85 0 85 85 85 170 85 0
+85 85 85 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 170 85 0
+85 85 85 170 85 0 170 170 170 170 170 170 170 170 170 255 255 85
+170 170 170 170 170 170 170 85 0 85 85 85 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
+85 85 85 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85
+85 85 85 85 255 85 170 85 0 170 170 170 170 85 0 170 170 170
+85 85 85 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85
+85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+0 0 0 0 0 0 0 0 0 0 0 0
req->private = NULL;
req->ki_iovec = NULL;
INIT_LIST_HEAD(&req->ki_run_list);
- req->ki_eventfd = ERR_PTR(-EINVAL);
+ req->ki_eventfd = NULL;
/* Check if the completion queue has enough free space to
* accept an event from this io.
{
assert_spin_locked(&ctx->ctx_lock);
- if (!IS_ERR(req->ki_eventfd))
- fput(req->ki_eventfd);
if (req->ki_dtor)
req->ki_dtor(req);
if (req->ki_iovec != &req->ki_inline_vec)
list_del(&req->ki_list);
spin_unlock_irq(&fput_lock);
- /* Complete the fput */
- __fput(req->ki_filp);
+ /* Complete the fput(s) */
+ if (req->ki_filp != NULL)
+ __fput(req->ki_filp);
+ if (req->ki_eventfd != NULL)
+ __fput(req->ki_eventfd);
/* Link the iocb into the context's free list */
spin_lock_irq(&ctx->ctx_lock);
*/
static int __aio_put_req(struct kioctx *ctx, struct kiocb *req)
{
+ int schedule_putreq = 0;
+
dprintk(KERN_DEBUG "aio_put(%p): f_count=%ld\n",
req, atomic_long_read(&req->ki_filp->f_count));
assert_spin_locked(&ctx->ctx_lock);
- req->ki_users --;
+ req->ki_users--;
BUG_ON(req->ki_users < 0);
if (likely(req->ki_users))
return 0;
req->ki_cancel = NULL;
req->ki_retry = NULL;
- /* Must be done under the lock to serialise against cancellation.
- * Call this aio_fput as it duplicates fput via the fput_work.
+ /*
+ * Try to optimize the aio and eventfd file* puts, by avoiding to
+ * schedule work in case it is not __fput() time. In normal cases,
+ * we would not be holding the last reference to the file*, so
+ * this function will be executed w/out any aio kthread wakeup.
*/
- if (unlikely(atomic_long_dec_and_test(&req->ki_filp->f_count))) {
+ if (unlikely(atomic_long_dec_and_test(&req->ki_filp->f_count)))
+ schedule_putreq++;
+ else
+ req->ki_filp = NULL;
+ if (req->ki_eventfd != NULL) {
+ if (unlikely(atomic_long_dec_and_test(&req->ki_eventfd->f_count)))
+ schedule_putreq++;
+ else
+ req->ki_eventfd = NULL;
+ }
+ if (unlikely(schedule_putreq)) {
get_ioctx(ctx);
spin_lock(&fput_lock);
list_add(&req->ki_list, &fput_head);
static struct kioctx *lookup_ioctx(unsigned long ctx_id)
{
struct mm_struct *mm = current->mm;
- struct kioctx *ctx = NULL;
+ struct kioctx *ctx, *ret = NULL;
struct hlist_node *n;
rcu_read_lock();
hlist_for_each_entry_rcu(ctx, n, &mm->ioctx_list, list) {
if (ctx->user_id == ctx_id && !ctx->dead) {
get_ioctx(ctx);
+ ret = ctx;
break;
}
}
rcu_read_unlock();
- return ctx;
+ return ret;
}
/*
* eventfd. The eventfd_signal() function is safe to be called
* from IRQ context.
*/
- if (!IS_ERR(iocb->ki_eventfd))
+ if (iocb->ki_eventfd != NULL)
eventfd_signal(iocb->ki_eventfd, 1);
put_rq:
req->ki_eventfd = eventfd_fget((int) iocb->aio_resfd);
if (IS_ERR(req->ki_eventfd)) {
ret = PTR_ERR(req->ki_eventfd);
+ req->ki_eventfd = NULL;
goto out_put_req;
}
}
* bio_integrity_clone - Callback for cloning bios with integrity metadata
* @bio: New bio
* @bio_src: Original bio
+ * @gfp_mask: Memory allocation mask
* @bs: bio_set to allocate bip from
*
* Description: Called to allocate a bip when cloning a bio
*/
int bio_integrity_clone(struct bio *bio, struct bio *bio_src,
- struct bio_set *bs)
+ gfp_t gfp_mask, struct bio_set *bs)
{
struct bio_integrity_payload *bip_src = bio_src->bi_integrity;
struct bio_integrity_payload *bip;
BUG_ON(bip_src == NULL);
- bip = bio_integrity_alloc_bioset(bio, GFP_NOIO, bip_src->bip_vcnt, bs);
+ bip = bio_integrity_alloc_bioset(bio, gfp_mask, bip_src->bip_vcnt, bs);
if (bip == NULL)
return -EIO;
if (bio_integrity(bio)) {
int ret;
- ret = bio_integrity_clone(b, bio, fs_bio_set);
+ ret = bio_integrity_clone(b, bio, gfp_mask, fs_bio_set);
- if (ret < 0)
+ if (ret < 0) {
+ bio_put(b);
return NULL;
+ }
}
return b;
struct list_head dirty_cowonly_roots;
struct btrfs_fs_devices *fs_devices;
+
+ /*
+ * the space_info list is almost entirely read only. It only changes
+ * when we add a new raid type to the FS, and that happens
+ * very rarely. RCU is used to protect it.
+ */
struct list_head space_info;
+
spinlock_t delalloc_lock;
spinlock_t new_trans_lock;
u64 delalloc_bytes;
int btrfs_reloc_clone_csums(struct inode *inode, u64 file_pos, u64 len);
u64 btrfs_reduce_alloc_profile(struct btrfs_root *root, u64 flags);
void btrfs_set_inode_space_info(struct btrfs_root *root, struct inode *ionde);
+void btrfs_clear_space_info_full(struct btrfs_fs_info *info);
+
int btrfs_check_metadata_free_space(struct btrfs_root *root);
int btrfs_check_data_free_space(struct btrfs_root *root, struct inode *inode,
u64 bytes);
#include <linux/writeback.h>
#include <linux/blkdev.h>
#include <linux/sort.h>
+#include <linux/rcupdate.h>
#include "compat.h"
#include "hash.h"
#include "crc32c.h"
{
struct list_head *head = &info->space_info;
struct btrfs_space_info *found;
- list_for_each_entry(found, head, list) {
- if (found->flags == flags)
+
+ rcu_read_lock();
+ list_for_each_entry_rcu(found, head, list) {
+ if (found->flags == flags) {
+ rcu_read_unlock();
return found;
+ }
}
+ rcu_read_unlock();
return NULL;
}
+/*
+ * after adding space to the filesystem, we need to clear the full flags
+ * on all the space infos.
+ */
+void btrfs_clear_space_info_full(struct btrfs_fs_info *info)
+{
+ struct list_head *head = &info->space_info;
+ struct btrfs_space_info *found;
+
+ rcu_read_lock();
+ list_for_each_entry_rcu(found, head, list)
+ found->full = 0;
+ rcu_read_unlock();
+}
+
static u64 div_factor(u64 num, int factor)
{
if (factor == 10)
if (!found)
return -ENOMEM;
- list_add(&found->list, &info->space_info);
INIT_LIST_HEAD(&found->block_groups);
init_rwsem(&found->groups_sem);
spin_lock_init(&found->lock);
found->full = 0;
found->force_alloc = 0;
*space_info = found;
+ list_add_rcu(&found->list, &info->space_info);
return 0;
}
int btrfs_free_block_groups(struct btrfs_fs_info *info)
{
struct btrfs_block_group_cache *block_group;
+ struct btrfs_space_info *space_info;
struct rb_node *n;
spin_lock(&info->block_group_cache_lock);
spin_lock(&info->block_group_cache_lock);
}
spin_unlock(&info->block_group_cache_lock);
+
+ /* now that all the block groups are freed, go through and
+ * free all the space_info structs. This is only called during
+ * the final stages of unmount, and so we know nobody is
+ * using them. We call synchronize_rcu() once before we start,
+ * just to be on the safe side.
+ */
+ synchronize_rcu();
+
+ while(!list_empty(&info->space_info)) {
+ space_info = list_entry(info->space_info.next,
+ struct btrfs_space_info,
+ list);
+
+ list_del(&space_info->list);
+ kfree(space_info);
+ }
return 0;
}
ret = btrfs_add_device(trans, root, device);
}
+ /*
+ * we've got more storage, clear any full flags on the space
+ * infos
+ */
+ btrfs_clear_space_info_full(root->fs_info);
+
unlock_chunks(root);
btrfs_commit_transaction(trans, root);
device->fs_devices->total_rw_bytes += diff;
device->total_bytes = new_size;
+ btrfs_clear_space_info_full(device->dev_root->fs_info);
+
return btrfs_update_device(trans, device);
}
* If warn is true, then emit a warning if the page is not uptodate and has
* not been truncated.
*/
-static int __set_page_dirty(struct page *page,
+static void __set_page_dirty(struct page *page,
struct address_space *mapping, int warn)
{
- if (unlikely(!mapping))
- return !TestSetPageDirty(page);
-
- if (TestSetPageDirty(page))
- return 0;
-
spin_lock_irq(&mapping->tree_lock);
if (page->mapping) { /* Race with truncate? */
WARN_ON_ONCE(warn && !PageUptodate(page));
}
spin_unlock_irq(&mapping->tree_lock);
__mark_inode_dirty(mapping->host, I_DIRTY_PAGES);
-
- return 1;
}
/*
*/
int __set_page_dirty_buffers(struct page *page)
{
+ int newly_dirty;
struct address_space *mapping = page_mapping(page);
if (unlikely(!mapping))
bh = bh->b_this_page;
} while (bh != head);
}
+ newly_dirty = !TestSetPageDirty(page);
spin_unlock(&mapping->private_lock);
- return __set_page_dirty(page, mapping, 1);
+ if (newly_dirty)
+ __set_page_dirty(page, mapping, 1);
+ return newly_dirty;
}
EXPORT_SYMBOL(__set_page_dirty_buffers);
return;
}
- if (!test_set_buffer_dirty(bh))
- __set_page_dirty(bh->b_page, page_mapping(bh->b_page), 0);
+ if (!test_set_buffer_dirty(bh)) {
+ struct page *page = bh->b_page;
+ if (!TestSetPageDirty(page))
+ __set_page_dirty(page, page_mapping(page), 0);
+ }
}
/*
list_for_each_entry(global_auth_tok,
&mount_crypt_stat->global_auth_tok_list,
mount_crypt_stat_list) {
+ if (global_auth_tok->flags & ECRYPTFS_AUTH_TOK_FNEK)
+ continue;
rc = ecryptfs_add_keysig(crypt_stat, global_auth_tok->sig);
if (rc) {
printk(KERN_ERR "Error adding keysig; rc = [%d]\n", rc);
}
static int
-ecryptfs_write_metadata_to_contents(struct ecryptfs_crypt_stat *crypt_stat,
- struct dentry *ecryptfs_dentry,
- char *virt)
+ecryptfs_write_metadata_to_contents(struct dentry *ecryptfs_dentry,
+ char *virt, size_t virt_len)
{
int rc;
rc = ecryptfs_write_lower(ecryptfs_dentry->d_inode, virt,
- 0, crypt_stat->num_header_bytes_at_front);
+ 0, virt_len);
if (rc)
printk(KERN_ERR "%s: Error attempting to write header "
"information to lower file; rc = [%d]\n", __func__,
static int
ecryptfs_write_metadata_to_xattr(struct dentry *ecryptfs_dentry,
- struct ecryptfs_crypt_stat *crypt_stat,
char *page_virt, size_t size)
{
int rc;
return rc;
}
+static unsigned long ecryptfs_get_zeroed_pages(gfp_t gfp_mask,
+ unsigned int order)
+{
+ struct page *page;
+
+ page = alloc_pages(gfp_mask | __GFP_ZERO, order);
+ if (page)
+ return (unsigned long) page_address(page);
+ return 0;
+}
+
/**
* ecryptfs_write_metadata
* @ecryptfs_dentry: The eCryptfs dentry
{
struct ecryptfs_crypt_stat *crypt_stat =
&ecryptfs_inode_to_private(ecryptfs_dentry->d_inode)->crypt_stat;
+ unsigned int order;
char *virt;
+ size_t virt_len;
size_t size = 0;
int rc = 0;
rc = -EINVAL;
goto out;
}
+ virt_len = crypt_stat->num_header_bytes_at_front;
+ order = get_order(virt_len);
/* Released in this function */
- virt = (char *)get_zeroed_page(GFP_KERNEL);
+ virt = (char *)ecryptfs_get_zeroed_pages(GFP_KERNEL, order);
if (!virt) {
printk(KERN_ERR "%s: Out of memory\n", __func__);
rc = -ENOMEM;
goto out;
}
- rc = ecryptfs_write_headers_virt(virt, PAGE_CACHE_SIZE, &size,
- crypt_stat, ecryptfs_dentry);
+ rc = ecryptfs_write_headers_virt(virt, virt_len, &size, crypt_stat,
+ ecryptfs_dentry);
if (unlikely(rc)) {
printk(KERN_ERR "%s: Error whilst writing headers; rc = [%d]\n",
__func__, rc);
goto out_free;
}
if (crypt_stat->flags & ECRYPTFS_METADATA_IN_XATTR)
- rc = ecryptfs_write_metadata_to_xattr(ecryptfs_dentry,
- crypt_stat, virt, size);
+ rc = ecryptfs_write_metadata_to_xattr(ecryptfs_dentry, virt,
+ size);
else
- rc = ecryptfs_write_metadata_to_contents(crypt_stat,
- ecryptfs_dentry, virt);
+ rc = ecryptfs_write_metadata_to_contents(ecryptfs_dentry, virt,
+ virt_len);
if (rc) {
printk(KERN_ERR "%s: Error writing metadata out to lower file; "
"rc = [%d]\n", __func__, rc);
goto out_free;
}
out_free:
- free_page((unsigned long)virt);
+ free_pages((unsigned long)virt, order);
out:
return rc;
}
struct dentry *ecryptfs_dir_dentry,
const char *name, size_t name_size)
{
+ struct ecryptfs_mount_crypt_stat *mount_crypt_stat =
+ &ecryptfs_superblock_to_private(
+ ecryptfs_dir_dentry->d_sb)->mount_crypt_stat;
char *decoded_name;
size_t decoded_name_size;
size_t packet_size;
int rc = 0;
- if ((name_size > ECRYPTFS_FNEK_ENCRYPTED_FILENAME_PREFIX_SIZE)
+ if ((mount_crypt_stat->flags & ECRYPTFS_GLOBAL_ENCRYPT_FILENAMES)
+ && !(mount_crypt_stat->flags & ECRYPTFS_ENCRYPTED_VIEW_ENABLED)
+ && (name_size > ECRYPTFS_FNEK_ENCRYPTED_FILENAME_PREFIX_SIZE)
&& (strncmp(name, ECRYPTFS_FNEK_ENCRYPTED_FILENAME_PREFIX,
ECRYPTFS_FNEK_ENCRYPTED_FILENAME_PREFIX_SIZE) == 0)) {
- struct ecryptfs_mount_crypt_stat *mount_crypt_stat =
- &ecryptfs_superblock_to_private(
- ecryptfs_dir_dentry->d_sb)->mount_crypt_stat;
const char *orig_name = name;
size_t orig_name_size = name_size;
*/
struct ecryptfs_global_auth_tok {
#define ECRYPTFS_AUTH_TOK_INVALID 0x00000001
+#define ECRYPTFS_AUTH_TOK_FNEK 0x00000002
u32 flags;
struct list_head mount_crypt_stat_list;
struct key *global_auth_tok_key;
u32 flags);
int ecryptfs_lookup_and_interpose_lower(struct dentry *ecryptfs_dentry,
struct dentry *lower_dentry,
- struct ecryptfs_crypt_stat *crypt_stat,
struct inode *ecryptfs_dir_inode,
struct nameidata *ecryptfs_nd);
int ecryptfs_decode_and_decrypt_filename(char **decrypted_name,
int ecryptfs_add_keysig(struct ecryptfs_crypt_stat *crypt_stat, char *sig);
int
ecryptfs_add_global_auth_tok(struct ecryptfs_mount_crypt_stat *mount_crypt_stat,
- char *sig);
+ char *sig, u32 global_auth_tok_flags);
int ecryptfs_get_global_auth_tok_for_sig(
struct ecryptfs_global_auth_tok **global_auth_tok,
struct ecryptfs_mount_crypt_stat *mount_crypt_stat, char *sig);
*/
int ecryptfs_lookup_and_interpose_lower(struct dentry *ecryptfs_dentry,
struct dentry *lower_dentry,
- struct ecryptfs_crypt_stat *crypt_stat,
struct inode *ecryptfs_dir_inode,
struct nameidata *ecryptfs_nd)
{
struct vfsmount *lower_mnt;
struct inode *lower_inode;
struct ecryptfs_mount_crypt_stat *mount_crypt_stat;
+ struct ecryptfs_crypt_stat *crypt_stat;
char *page_virt = NULL;
u64 file_size;
int rc = 0;
goto out_free_kmem;
}
}
+ crypt_stat = &ecryptfs_inode_to_private(
+ ecryptfs_dentry->d_inode)->crypt_stat;
+ /* TODO: lock for crypt_stat comparison */
+ if (!(crypt_stat->flags & ECRYPTFS_POLICY_APPLIED))
+ ecryptfs_set_default_sizes(crypt_stat);
rc = ecryptfs_read_and_validate_header_region(page_virt,
ecryptfs_dentry->d_inode);
if (rc) {
{
char *encrypted_and_encoded_name = NULL;
size_t encrypted_and_encoded_name_size;
- struct ecryptfs_crypt_stat *crypt_stat = NULL;
struct ecryptfs_mount_crypt_stat *mount_crypt_stat = NULL;
- struct ecryptfs_inode_info *inode_info;
struct dentry *lower_dir_dentry, *lower_dentry;
int rc = 0;
}
if (lower_dentry->d_inode)
goto lookup_and_interpose;
- inode_info = ecryptfs_inode_to_private(ecryptfs_dentry->d_inode);
- if (inode_info) {
- crypt_stat = &inode_info->crypt_stat;
- /* TODO: lock for crypt_stat comparison */
- if (!(crypt_stat->flags & ECRYPTFS_POLICY_APPLIED))
- ecryptfs_set_default_sizes(crypt_stat);
- }
- if (crypt_stat)
- mount_crypt_stat = crypt_stat->mount_crypt_stat;
- else
- mount_crypt_stat = &ecryptfs_superblock_to_private(
- ecryptfs_dentry->d_sb)->mount_crypt_stat;
- if (!(crypt_stat && (crypt_stat->flags & ECRYPTFS_ENCRYPT_FILENAMES))
- && !(mount_crypt_stat && (mount_crypt_stat->flags
- & ECRYPTFS_GLOBAL_ENCRYPT_FILENAMES)))
+ mount_crypt_stat = &ecryptfs_superblock_to_private(
+ ecryptfs_dentry->d_sb)->mount_crypt_stat;
+ if (!(mount_crypt_stat
+ && (mount_crypt_stat->flags & ECRYPTFS_GLOBAL_ENCRYPT_FILENAMES)))
goto lookup_and_interpose;
dput(lower_dentry);
rc = ecryptfs_encrypt_and_encode_filename(
&encrypted_and_encoded_name, &encrypted_and_encoded_name_size,
- crypt_stat, mount_crypt_stat, ecryptfs_dentry->d_name.name,
+ NULL, mount_crypt_stat, ecryptfs_dentry->d_name.name,
ecryptfs_dentry->d_name.len);
if (rc) {
printk(KERN_ERR "%s: Error attempting to encrypt and encode "
}
lookup_and_interpose:
rc = ecryptfs_lookup_and_interpose_lower(ecryptfs_dentry, lower_dentry,
- crypt_stat, ecryptfs_dir_inode,
+ ecryptfs_dir_inode,
ecryptfs_nd);
goto out;
out_d_drop:
int
ecryptfs_add_global_auth_tok(struct ecryptfs_mount_crypt_stat *mount_crypt_stat,
- char *sig)
+ char *sig, u32 global_auth_tok_flags)
{
struct ecryptfs_global_auth_tok *new_auth_tok;
int rc = 0;
goto out;
}
memcpy(new_auth_tok->sig, sig, ECRYPTFS_SIG_SIZE_HEX);
+ new_auth_tok->flags = global_auth_tok_flags;
new_auth_tok->sig[ECRYPTFS_SIG_SIZE_HEX] = '\0';
mutex_lock(&mount_crypt_stat->global_auth_tok_list_mutex);
list_add(&new_auth_tok->mount_crypt_stat_list,
case ecryptfs_opt_ecryptfs_sig:
sig_src = args[0].from;
rc = ecryptfs_add_global_auth_tok(mount_crypt_stat,
- sig_src);
+ sig_src, 0);
if (rc) {
printk(KERN_ERR "Error attempting to register "
"global sig; rc = [%d]\n", rc);
ECRYPTFS_SIG_SIZE_HEX] = '\0';
rc = ecryptfs_add_global_auth_tok(
mount_crypt_stat,
- mount_crypt_stat->global_default_fnek_sig);
+ mount_crypt_stat->global_default_fnek_sig,
+ ECRYPTFS_AUTH_TOK_FNEK);
if (rc) {
printk(KERN_ERR "Error attempting to register "
"global fnek sig [%s]; rc = [%d]\n",
struct ext4_extent_idx *ix;
struct ext4_extent *ex;
ext4_fsblk_t block;
- int depth, ee_len;
+ int depth; /* Note, NOT eh_depth; depth from top of tree */
+ int ee_len;
BUG_ON(path == NULL);
depth = path->p_depth;
if (bh == NULL)
return -EIO;
eh = ext_block_hdr(bh);
- if (ext4_ext_check_header(inode, eh, depth)) {
+ /* subtract from p_depth to get proper eh_depth */
+ if (ext4_ext_check_header(inode, eh, path->p_depth - depth)) {
put_bh(bh);
return -EIO;
}
struct inode *ret;
ext4_group_t i;
int free = 0;
+ static int once = 1;
ext4_group_t flex_group;
/* Cannot create files in a deleted directory */
ret2 = find_group_flex(sb, dir, &group);
if (ret2 == -1) {
ret2 = find_group_other(sb, dir, &group);
- if (ret2 == 0 && printk_ratelimit())
+ if (ret2 == 0 && once)
+ once = 0;
printk(KERN_NOTICE "ext4: find_group_flex "
"failed, fallback succeeded dir %lu\n",
dir->i_ino);
struct ext4_free_extent *gex = &ac->ac_g_ex;
BUG_ON(ex->fe_len <= 0);
- BUG_ON(ex->fe_len >= EXT4_BLOCKS_PER_GROUP(ac->ac_sb));
+ BUG_ON(ex->fe_len > EXT4_BLOCKS_PER_GROUP(ac->ac_sb));
BUG_ON(ex->fe_start >= EXT4_BLOCKS_PER_GROUP(ac->ac_sb));
BUG_ON(ac->ac_status != AC_STATUS_CONTINUE);
}
BUG_ON(start + size <= ac->ac_o_ex.fe_logical &&
start > ac->ac_o_ex.fe_logical);
- BUG_ON(size <= 0 || size >= EXT4_BLOCKS_PER_GROUP(ac->ac_sb));
+ BUG_ON(size <= 0 || size > EXT4_BLOCKS_PER_GROUP(ac->ac_sb));
/* now prepare goal request */
struct super_block *sb, struct ext4_prealloc_space *pa)
{
ext4_group_t grp;
+ ext4_fsblk_t grp_blk;
if (!atomic_dec_and_test(&pa->pa_count) || pa->pa_free != 0)
return;
pa->pa_deleted = 1;
spin_unlock(&pa->pa_lock);
- /* -1 is to protect from crossing allocation group */
- ext4_get_group_no_and_offset(sb, pa->pa_pstart - 1, &grp, NULL);
+ grp_blk = pa->pa_pstart;
+ /* If linear, pa_pstart may be in the next group when pa is used up */
+ if (pa->pa_linear)
+ grp_blk--;
+
+ ext4_get_group_no_and_offset(sb, grp_blk, &grp, NULL);
/*
* possible race:
return 0;
}
+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
+static const struct in6_addr *nlmclnt_map_v4addr(const struct sockaddr *sap,
+ struct in6_addr *addr_mapped)
+{
+ const struct sockaddr_in *sin = (const struct sockaddr_in *)sap;
+
+ switch (sap->sa_family) {
+ case AF_INET6:
+ return &((const struct sockaddr_in6 *)sap)->sin6_addr;
+ case AF_INET:
+ ipv6_addr_set_v4mapped(sin->sin_addr.s_addr, addr_mapped);
+ return addr_mapped;
+ }
+
+ return NULL;
+}
+
+/*
+ * If lockd is using a PF_INET6 listener, all incoming requests appear
+ * to come from AF_INET6 remotes. The address of AF_INET remotes are
+ * mapped to AF_INET6 automatically by the network layer. In case the
+ * user passed an AF_INET server address at mount time, ensure both
+ * addresses are AF_INET6 before comparing them.
+ */
+static int nlmclnt_cmp_addr(const struct nlm_host *host,
+ const struct sockaddr *sap)
+{
+ const struct in6_addr *addr1;
+ const struct in6_addr *addr2;
+ struct in6_addr addr1_mapped;
+ struct in6_addr addr2_mapped;
+
+ addr1 = nlmclnt_map_v4addr(nlm_addr(host), &addr1_mapped);
+ if (likely(addr1 != NULL)) {
+ addr2 = nlmclnt_map_v4addr(sap, &addr2_mapped);
+ if (likely(addr2 != NULL))
+ return ipv6_addr_equal(addr1, addr2);
+ }
+
+ return 0;
+}
+#else /* !(CONFIG_IPV6 || CONFIG_IPV6_MODULE) */
+static int nlmclnt_cmp_addr(const struct nlm_host *host,
+ const struct sockaddr *sap)
+{
+ return nlm_cmp_addr(nlm_addr(host), sap);
+}
+#endif /* !(CONFIG_IPV6 || CONFIG_IPV6_MODULE) */
+
/*
* The server lockd has called us back to tell us the lock was granted
*/
*/
if (fl_blocked->fl_u.nfs_fl.owner->pid != lock->svid)
continue;
- if (!nlm_cmp_addr(nlm_addr(block->b_host), addr))
+ if (!nlmclnt_cmp_addr(block->b_host, addr))
continue;
if (nfs_compare_fh(NFS_FH(fl_blocked->fl_file->f_path.dentry->d_inode) ,fh) != 0)
continue;
*
* Copyright (C) 1991, 1992 Linus Torvalds
*
- * Copyright (C) 1996 Gertjan van Wingerde (gertjan@cs.vu.nl)
+ * Copyright (C) 1996 Gertjan van Wingerde
* Minix V2 fs support.
*
* Modified for 680x0 by Andreas Schwab
}
return 0;
}
+
+/*
+ * Test if two ip6 socket addresses refer to the same socket by
+ * comparing relevant fields. The padding bytes specifically, are not
+ * compared. sin6_flowinfo is not compared because it only affects QoS
+ * and sin6_scope_id is only compared if the address is "link local"
+ * because "link local" addresses need only be unique to a specific
+ * link. Conversely, ordinary unicast addresses might have different
+ * sin6_scope_id.
+ *
+ * The caller should ensure both socket addresses are AF_INET6.
+ */
+static int nfs_sockaddr_cmp_ip6(const struct sockaddr *sa1,
+ const struct sockaddr *sa2)
+{
+ const struct sockaddr_in6 *saddr1 = (const struct sockaddr_in6 *)sa1;
+ const struct sockaddr_in6 *saddr2 = (const struct sockaddr_in6 *)sa2;
+
+ if (!ipv6_addr_equal(&saddr1->sin6_addr,
+ &saddr1->sin6_addr))
+ return 0;
+ if (ipv6_addr_scope(&saddr1->sin6_addr) == IPV6_ADDR_SCOPE_LINKLOCAL &&
+ saddr1->sin6_scope_id != saddr2->sin6_scope_id)
+ return 0;
+ return saddr1->sin6_port == saddr2->sin6_port;
+}
#else
static int nfs_sockaddr_match_ipaddr4(const struct sockaddr_in *sa1,
const struct sockaddr_in *sa2)
return nfs_sockaddr_match_ipaddr4((const struct sockaddr_in *)sa1,
(const struct sockaddr_in *)sa2);
}
+
+static int nfs_sockaddr_cmp_ip6(const struct sockaddr * sa1,
+ const struct sockaddr * sa2)
+{
+ return 0;
+}
#endif
+/*
+ * Test if two ip4 socket addresses refer to the same socket, by
+ * comparing relevant fields. The padding bytes specifically, are
+ * not compared.
+ *
+ * The caller should ensure both socket addresses are AF_INET.
+ */
+static int nfs_sockaddr_cmp_ip4(const struct sockaddr *sa1,
+ const struct sockaddr *sa2)
+{
+ const struct sockaddr_in *saddr1 = (const struct sockaddr_in *)sa1;
+ const struct sockaddr_in *saddr2 = (const struct sockaddr_in *)sa2;
+
+ if (saddr1->sin_addr.s_addr != saddr2->sin_addr.s_addr)
+ return 0;
+ return saddr1->sin_port == saddr2->sin_port;
+}
+
+/*
+ * Test if two socket addresses represent the same actual socket,
+ * by comparing (only) relevant fields.
+ */
+static int nfs_sockaddr_cmp(const struct sockaddr *sa1,
+ const struct sockaddr *sa2)
+{
+ if (sa1->sa_family != sa2->sa_family)
+ return 0;
+
+ switch (sa1->sa_family) {
+ case AF_INET:
+ return nfs_sockaddr_cmp_ip4(sa1, sa2);
+ case AF_INET6:
+ return nfs_sockaddr_cmp_ip6(sa1, sa2);
+ }
+ return 0;
+}
+
/*
* Find a client by IP address and protocol version
* - returns NULL if no such client
static struct nfs_client *nfs_match_client(const struct nfs_client_initdata *data)
{
struct nfs_client *clp;
+ const struct sockaddr *sap = data->addr;
list_for_each_entry(clp, &nfs_client_list, cl_share_link) {
+ const struct sockaddr *clap = (struct sockaddr *)&clp->cl_addr;
/* Don't match clients that failed to initialise properly */
if (clp->cl_cons_state < 0)
continue;
continue;
/* Match the full socket address */
- if (memcmp(&clp->cl_addr, data->addr, sizeof(clp->cl_addr)) != 0)
+ if (!nfs_sockaddr_cmp(sap, clap))
continue;
atomic_inc(&clp->cl_count);
cache.cred = cred;
cache.jiffies = jiffies;
status = NFS_PROTO(inode)->access(inode, &cache);
- if (status != 0)
+ if (status != 0) {
+ if (status == -ESTALE) {
+ nfs_zap_caches(inode);
+ if (!S_ISDIR(inode->i_mode))
+ set_bit(NFS_INO_STALE, &NFS_I(inode)->flags);
+ }
return status;
+ }
nfs_access_add_cache(inode, &cache);
out:
if ((mask & ~cache.mask & (MAY_READ | MAY_WRITE | MAY_EXEC)) == 0)
{
struct nfs_server *server = NFS_SERVER(inode);
struct nfs_fattr fattr;
- struct page *pages[NFSACL_MAXPAGES] = { };
+ struct page *pages[NFSACL_MAXPAGES];
struct nfs3_setaclargs args = {
.inode = inode,
.mask = NFS_ACL,
.rpc_argp = &args,
.rpc_resp = &fattr,
};
- int status, count;
+ int status;
status = -EOPNOTSUPP;
if (!nfs_server_capable(inode, NFS_CAP_ACLS))
if (S_ISDIR(inode->i_mode)) {
args.mask |= NFS_DFACL;
args.acl_default = dfacl;
+ args.len = nfsacl_size(acl, dfacl);
+ } else
+ args.len = nfsacl_size(acl, NULL);
+
+ if (args.len > NFS_ACL_INLINE_BUFSIZE) {
+ unsigned int npages = 1 + ((args.len - 1) >> PAGE_SHIFT);
+
+ status = -ENOMEM;
+ do {
+ args.pages[args.npages] = alloc_page(GFP_KERNEL);
+ if (args.pages[args.npages] == NULL)
+ goto out_freepages;
+ args.npages++;
+ } while (args.npages < npages);
}
dprintk("NFS call setacl\n");
nfs_zap_acl_cache(inode);
dprintk("NFS reply setacl: %d\n", status);
- /* pages may have been allocated at the xdr layer. */
- for (count = 0; count < NFSACL_MAXPAGES && args.pages[count]; count++)
- __free_page(args.pages[count]);
-
switch (status) {
case 0:
status = nfs_refresh_inode(inode, &fattr);
case -ENOTSUPP:
status = -EOPNOTSUPP;
}
+out_freepages:
+ while (args.npages != 0) {
+ args.npages--;
+ __free_page(args.pages[args.npages]);
+ }
out:
return status;
}
#define NFS3_commitres_sz (1+NFS3_wcc_data_sz+2)
#define ACL3_getaclargs_sz (NFS3_fh_sz+1)
-#define ACL3_setaclargs_sz (NFS3_fh_sz+1+2*(2+5*3))
-#define ACL3_getaclres_sz (1+NFS3_post_op_attr_sz+1+2*(2+5*3))
+#define ACL3_setaclargs_sz (NFS3_fh_sz+1+ \
+ XDR_QUADLEN(NFS_ACL_INLINE_BUFSIZE))
+#define ACL3_getaclres_sz (1+NFS3_post_op_attr_sz+1+ \
+ XDR_QUADLEN(NFS_ACL_INLINE_BUFSIZE))
#define ACL3_setaclres_sz (1+NFS3_post_op_attr_sz)
/*
struct nfs3_setaclargs *args)
{
struct xdr_buf *buf = &req->rq_snd_buf;
- unsigned int base, len_in_head, len = nfsacl_size(
- (args->mask & NFS_ACL) ? args->acl_access : NULL,
- (args->mask & NFS_DFACL) ? args->acl_default : NULL);
- int count, err;
+ unsigned int base;
+ int err;
p = xdr_encode_fhandle(p, NFS_FH(args->inode));
*p++ = htonl(args->mask);
- base = (char *)p - (char *)buf->head->iov_base;
- /* put as much of the acls into head as possible. */
- len_in_head = min_t(unsigned int, buf->head->iov_len - base, len);
- len -= len_in_head;
- req->rq_slen = xdr_adjust_iovec(req->rq_svec, p + (len_in_head >> 2));
-
- for (count = 0; (count << PAGE_SHIFT) < len; count++) {
- args->pages[count] = alloc_page(GFP_KERNEL);
- if (!args->pages[count]) {
- while (count)
- __free_page(args->pages[--count]);
- return -ENOMEM;
- }
- }
- xdr_encode_pages(buf, args->pages, 0, len);
+ req->rq_slen = xdr_adjust_iovec(req->rq_svec, p);
+ base = req->rq_slen;
+
+ if (args->npages != 0)
+ xdr_encode_pages(buf, args->pages, 0, args->len);
+ else
+ req->rq_slen += args->len;
err = nfsacl_encode(buf, base, args->inode,
(args->mask & NFS_ACL) ?
#define NFSDBG_FACILITY NFSDBG_VFS
/*
- * Check if fs_root is valid
+ * Convert the NFSv4 pathname components into a standard posix path.
+ *
+ * Note that the resulting string will be placed at the end of the buffer
*/
static inline char *nfs4_pathname_string(const struct nfs4_pathname *pathname,
char *buffer, ssize_t buflen)
{
struct vfsmount *mnt = ERR_PTR(-ENOENT);
char *mnt_path;
- int page2len;
+ unsigned int maxbuflen;
unsigned int s;
mnt_path = nfs4_pathname_string(&location->rootpath, page2, PAGE_SIZE);
if (IS_ERR(mnt_path))
return mnt;
mountdata->mnt_path = mnt_path;
- page2 += strlen(mnt_path) + 1;
- page2len = PAGE_SIZE - strlen(mnt_path) - 1;
+ maxbuflen = mnt_path - 1 - page2;
for (s = 0; s < location->nservers; s++) {
const struct nfs4_string *buf = &location->servers[s];
struct sockaddr_storage addr;
- if (buf->len <= 0 || buf->len >= PAGE_SIZE)
+ if (buf->len <= 0 || buf->len >= maxbuflen)
continue;
mountdata->addr = (struct sockaddr *)&addr;
continue;
nfs_set_port(mountdata->addr, NFS_PORT);
- strncpy(page2, buf->data, page2len);
- page2[page2len] = '\0';
+ memcpy(page2, buf->data, buf->len);
+ page2[buf->len] = '\0';
mountdata->hostname = page2;
snprintf(page, PAGE_SIZE, "%s:%s",
[OP_LOOKUPP] = (nfsd4_enc)nfsd4_encode_noop,
[OP_NVERIFY] = (nfsd4_enc)nfsd4_encode_noop,
[OP_OPEN] = (nfsd4_enc)nfsd4_encode_open,
+ [OP_OPENATTR] = (nfsd4_enc)nfsd4_encode_noop,
[OP_OPEN_CONFIRM] = (nfsd4_enc)nfsd4_encode_open_confirm,
[OP_OPEN_DOWNGRADE] = (nfsd4_enc)nfsd4_encode_open_downgrade,
[OP_PUTFH] = (nfsd4_enc)nfsd4_encode_noop,
BUG_ON(OCFS2_I(inode)->ip_dyn_features & OCFS2_INLINE_DATA_FL);
mlog_bug_on_msg(!ocfs2_sparse_alloc(osb) &&
- (OCFS2_I(inode)->ip_clusters != rec->e_cpos),
+ (OCFS2_I(inode)->ip_clusters !=
+ le32_to_cpu(rec->e_cpos)),
"Device %s, asking for sparse allocation: inode %llu, "
"cpos %u, clusters %u\n",
osb->dev_str,
size = i_size_read(inode);
if (size > PAGE_CACHE_SIZE ||
- size > ocfs2_max_inline_data(inode->i_sb)) {
+ size > ocfs2_max_inline_data_with_xattr(inode->i_sb, di)) {
ocfs2_error(inode->i_sb,
"Inode %llu has with inline data has bad size: %Lu",
(unsigned long long)OCFS2_I(inode)->ip_blkno,
int ret, written = 0;
loff_t end = pos + len;
struct ocfs2_inode_info *oi = OCFS2_I(inode);
+ struct ocfs2_dinode *di = NULL;
mlog(0, "Inode %llu, write of %u bytes at off %llu. features: 0x%x\n",
(unsigned long long)oi->ip_blkno, len, (unsigned long long)pos,
/*
* Check whether the write can fit.
*/
- if (mmap_page || end > ocfs2_max_inline_data(inode->i_sb))
+ di = (struct ocfs2_dinode *)wc->w_di_bh->b_data;
+ if (mmap_page ||
+ end > ocfs2_max_inline_data_with_xattr(inode->i_sb, di))
return 0;
do_inline_write:
fe->i_dyn_features = cpu_to_le16(feat | OCFS2_INLINE_DATA_FL);
- fe->id2.i_data.id_count = cpu_to_le16(ocfs2_max_inline_data(osb->sb));
+ fe->id2.i_data.id_count = cpu_to_le16(
+ ocfs2_max_inline_data_with_xattr(osb->sb, fe));
} else {
fel = &fe->id2.i_list;
fel->l_tree_depth = 0;
offsetof(struct ocfs2_dinode, id2.i_symlink);
}
-static inline int ocfs2_max_inline_data(struct super_block *sb)
-{
- return sb->s_blocksize -
- offsetof(struct ocfs2_dinode, id2.i_data.id_data);
-}
-
static inline int ocfs2_max_inline_data_with_xattr(struct super_block *sb,
struct ocfs2_dinode *di)
{
* when blocksize = 512, may reserve one more cluser for
* xattr bucket, otherwise reserve one metadata block
* for them is ok.
+ * If this is a new directory with inline data,
+ * we choose to reserve the entire inline area for
+ * directory contents and force an external xattr block.
*/
if (dir->i_sb->s_blocksize == OCFS2_MIN_BLOCKSIZE ||
+ (S_ISDIR(mode) && ocfs2_supports_inline_data(osb)) ||
(s_size + a_size) > OCFS2_XATTR_FREE_IN_IBODY) {
ret = ocfs2_reserve_new_metadata_blocks(osb, 1, xattr_ac);
if (ret) {
char *val,
int value_len)
{
- int offset;
+ int ret, offset, block_off;
struct ocfs2_xattr_value_root *xv;
struct ocfs2_xattr_entry *xe = xs->here;
+ struct ocfs2_xattr_header *xh = bucket_xh(xs->bucket);
+ void *base;
BUG_ON(!xs->base || !xe || ocfs2_xattr_is_local(xe));
- offset = le16_to_cpu(xe->xe_name_offset) +
- OCFS2_XATTR_SIZE(xe->xe_name_len);
+ ret = ocfs2_xattr_bucket_get_name_value(inode, xh,
+ xe - xh->xh_entries,
+ &block_off,
+ &offset);
+ if (ret) {
+ mlog_errno(ret);
+ goto out;
+ }
- xv = (struct ocfs2_xattr_value_root *)(xs->base + offset);
+ base = bucket_block(xs->bucket, block_off);
+ xv = (struct ocfs2_xattr_value_root *)(base + offset +
+ OCFS2_XATTR_SIZE(xe->xe_name_len));
- return __ocfs2_xattr_set_value_outside(inode, handle,
- xv, val, value_len);
+ ret = __ocfs2_xattr_set_value_outside(inode, handle,
+ xv, val, value_len);
+ if (ret)
+ mlog_errno(ret);
+out:
+ return ret;
}
static int ocfs2_rm_xattr_cluster(struct inode *inode,
int retval = -ENOENT;
ino_t ino;
int tid;
- unsigned long pos = filp->f_pos; /* avoiding "long long" filp->f_pos */
struct pid_namespace *ns;
task = get_proc_task(inode);
goto out_no_task;
retval = 0;
- switch (pos) {
+ switch ((unsigned long)filp->f_pos) {
case 0:
ino = inode->i_ino;
- if (filldir(dirent, ".", 1, pos, ino, DT_DIR) < 0)
+ if (filldir(dirent, ".", 1, filp->f_pos, ino, DT_DIR) < 0)
goto out;
- pos++;
+ filp->f_pos++;
/* fall through */
case 1:
ino = parent_ino(dentry);
- if (filldir(dirent, "..", 2, pos, ino, DT_DIR) < 0)
+ if (filldir(dirent, "..", 2, filp->f_pos, ino, DT_DIR) < 0)
goto out;
- pos++;
+ filp->f_pos++;
/* fall through */
}
ns = filp->f_dentry->d_sb->s_fs_info;
tid = (int)filp->f_version;
filp->f_version = 0;
- for (task = first_tid(leader, tid, pos - 2, ns);
+ for (task = first_tid(leader, tid, filp->f_pos - 2, ns);
task;
- task = next_tid(task), pos++) {
+ task = next_tid(task), filp->f_pos++) {
tid = task_pid_nr_ns(task, ns);
if (proc_task_fill_cache(filp, dirent, filldir, task, tid) < 0) {
/* returning this tgid failed, save it as the first
}
}
out:
- filp->f_pos = pos;
put_task_struct(leader);
out_no_task:
return retval;
if (!pagevec_add(&lru_pvec, page))
__pagevec_lru_add_file(&lru_pvec);
+ /* prevent the page from being discarded on memory pressure */
+ SetPageDirty(page);
+
unlock_page(page);
}
return -EFBIG;
add_error:
+ pagevec_lru_add_file(&lru_pvec);
page_cache_release(pages + loop);
for (loop++; loop < npages; loop++)
__free_page(pages + loop);
* Stefan Reinauer <stepan@home.culture.mipt.ru>
*
* Module usage counts added on 96/04/29 by
- * Gertjan van Wingerde <gertjan@cs.vu.nl>
+ * Gertjan van Wingerde <gwingerde@gmail.com>
*
* Clean swab support on 19970406 by
* Francois-Rene Rideau <fare@tunes.org>
extern void bio_integrity_advance(struct bio *, unsigned int);
extern void bio_integrity_trim(struct bio *, unsigned int, unsigned int);
extern void bio_integrity_split(struct bio *, struct bio_pair *, int);
-extern int bio_integrity_clone(struct bio *, struct bio *, struct bio_set *);
+extern int bio_integrity_clone(struct bio *, struct bio *, gfp_t, struct bio_set *);
extern int bioset_integrity_create(struct bio_set *, int);
extern void bioset_integrity_free(struct bio_set *);
extern void bio_integrity_init_slab(void);
#define bioset_integrity_create(a, b) (0)
#define bio_integrity_prep(a) (0)
#define bio_integrity_enabled(a) (0)
-#define bio_integrity_clone(a, b, c) (0)
+#define bio_integrity_clone(a, b, c,d ) (0)
#define bioset_integrity_free(a) do { } while (0)
#define bio_integrity_free(a, b) do { } while (0)
#define bio_integrity_endio(a, b) do { } while (0)
# define CAP_FULL_SET ((kernel_cap_t){{ ~0, ~0 }})
# define CAP_INIT_EFF_SET ((kernel_cap_t){{ ~CAP_TO_MASK(CAP_SETPCAP), ~0 }})
# define CAP_FS_SET ((kernel_cap_t){{ CAP_FS_MASK_B0, CAP_FS_MASK_B1 } })
-# define CAP_NFSD_SET ((kernel_cap_t){{ CAP_FS_MASK_B0|CAP_TO_MASK(CAP_SYS_RESOURCE), \
- CAP_FS_MASK_B1 } })
+# define CAP_NFSD_SET ((kernel_cap_t){{ CAP_FS_MASK_B0 \
+ | CAP_TO_MASK(CAP_SYS_RESOURCE) \
+ | CAP_TO_MASK(CAP_MKNOD), \
+ CAP_FS_MASK_B1 } })
#endif /* _KERNEL_CAPABILITY_U32S != 2 */
#define __deprecated __attribute__((deprecated))
#define __packed __attribute__((packed))
#define __weak __attribute__((weak))
-#define __naked __attribute__((naked))
+
+/*
+ * it doesn't make sense on ARM (currently the only user of __naked) to trace
+ * naked functions because then mcount is called without stack and frame pointer
+ * being set up and there is no chance to restore the lr register to the value
+ * before mcount was called.
+ */
+#define __naked __attribute__((naked)) notrace
+
#define __noreturn __attribute__((noreturn))
/*
+/*
+ * Copyright(c) 2007 - 2009 Intel Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc., 59
+ * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ * The full GNU General Public License is included in this distribution in the
+ * file called COPYING.
+ */
#ifndef DCA_H
#define DCA_H
/* DCA Provider API */
struct scatterlist *sg_table;
int sg_max_nents; /* Maximum number of entries in it */
int sg_nents; /* Current number of entries in it */
+ int orig_sg_nents;
int sg_dma_direction; /* dma transfer direction */
/* data phase of the active command (currently only valid for PIO/DMA) */
#define SW_DOCK 0x05 /* set = plugged into dock */
#define SW_LINEOUT_INSERT 0x06 /* set = inserted */
#define SW_JACK_PHYSICAL_INSERT 0x07 /* set = mechanical switch set */
+#define SW_VIDEOOUT_INSERT 0x08 /* set = inserted */
#define SW_MAX 0x0f
#define SW_CNT (SW_MAX+1)
return sin1->sin_addr.s_addr == sin2->sin_addr.s_addr;
}
+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
static inline int __nlm_cmp_addr6(const struct sockaddr *sap1,
const struct sockaddr *sap2)
{
const struct sockaddr_in6 *sin2 = (const struct sockaddr_in6 *)sap2;
return ipv6_addr_equal(&sin1->sin6_addr, &sin2->sin6_addr);
}
+#else /* !(CONFIG_IPV6 || CONFIG_IPV6_MODULE) */
+static inline int __nlm_cmp_addr6(const struct sockaddr *sap1,
+ const struct sockaddr *sap2)
+{
+ return 0;
+}
+#endif /* !(CONFIG_IPV6 || CONFIG_IPV6_MODULE) */
/*
* Compare two host addresses
/*
* R231 (0xE7) - Jack Status
*/
+#define WM8350_JACK_L_LVL 0x0800
#define WM8350_JACK_R_LVL 0x0400
/*
#define WM8400_FLL_OUTDIV_SHIFT 0 /* FLL_OUTDIV - [2:0] */
#define WM8400_FLL_OUTDIV_WIDTH 3 /* FLL_OUTDIV - [2:0] */
+struct wm8400;
void wm8400_reset_codec_reg_cache(struct wm8400 *wm8400);
#endif
int mask;
struct posix_acl * acl_access;
struct posix_acl * acl_default;
+ size_t len;
+ unsigned int npages;
struct page ** pages;
};
#define NFSACL_MAXPAGES ((2*(8+12*NFS_ACL_MAX_ENTRIES) + PAGE_SIZE-1) \
>> PAGE_SHIFT)
+#define NFS_ACL_MAX_ENTRIES_INLINE (5)
+#define NFS_ACL_INLINE_BUFSIZE ((2*(2+3*NFS_ACL_MAX_ENTRIES_INLINE)) << 2)
+
static inline unsigned int
nfsacl_size(struct posix_acl *acl_access, struct posix_acl *acl_default)
{
#define PCI_DEVICE_ID_MELLANOX_SINAI_OLD 0x5e8c
#define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274
+#define PCI_VENDOR_ID_DFI 0x15bd
+
#define PCI_VENDOR_ID_QUICKNET 0x15e2
#define PCI_DEVICE_ID_QUICKNET_XJ 0x0500
if (ct && ct != &nf_conntrack_untracked) {
if (!nf_ct_is_confirmed(ct) && !nf_ct_is_dying(ct))
ret = __nf_conntrack_confirm(skb);
- nf_ct_deliver_cached_events(ct);
+ if (likely(ret == NF_ACCEPT))
+ nf_ct_deliver_cached_events(ct);
}
return ret;
}
#define ETH_P_FCOE 0x8906 /* FCOE ether type */
#endif
-#ifndef ETH_P_8021Q
-#define ETH_P_8021Q 0x8100
-#endif
-
/*
* FC_FCOE_OUI hasn't been standardized yet. XXX TBD.
*/
FC_RJT_VENDOR = 0xff, /* vendor specific reject */
};
+/* default timeout values */
+
+#define FC_DEF_E_D_TOV 2000UL
+#define FC_DEF_R_A_TOV 10000UL
+
#endif /* _FC_FS_H_ */
/*
* FC HBA status
*/
-#define FC_PAUSE (1 << 1)
-#define FC_LINK_UP (1 << 0)
-
enum fc_lport_state {
LPORT_ST_NONE = 0,
LPORT_ST_FLOGI,
struct libfc_function_template {
- /**
- * Mandatory Fields
- *
- * These handlers must be implemented by the LLD.
- */
-
/*
* Interface to send a FC frame
- */
- int (*frame_send)(struct fc_lport *lp, struct fc_frame *fp);
-
- /**
- * Optional Fields
*
- * The LLD may choose to implement any of the following handlers.
- * If LLD doesn't specify hander and leaves its pointer NULL then
- * the default libfc function will be used for that handler.
- */
-
- /**
- * ELS/CT interfaces
+ * STATUS: REQUIRED
*/
+ int (*frame_send)(struct fc_lport *lp, struct fc_frame *fp);
/*
- * elsct_send - sends ELS/CT frame
+ * Interface to send ELS/CT frames
+ *
+ * STATUS: OPTIONAL
*/
struct fc_seq *(*elsct_send)(struct fc_lport *lport,
struct fc_rport *rport,
struct fc_frame *fp,
void *arg),
void *arg, u32 timer_msec);
- /**
- * Exhance Manager interfaces
- */
/*
* Send the FC frame payload using a new exchange and sequence.
* timer_msec argument is specified. The timer is canceled when
* it fires or when the exchange is done. The exchange timeout handler
* is registered by EM layer.
+ *
+ * STATUS: OPTIONAL
*/
struct fc_seq *(*exch_seq_send)(struct fc_lport *lp,
struct fc_frame *fp,
void *arg, unsigned int timer_msec);
/*
- * send a frame using existing sequence and exchange.
+ * Send a frame using an existing sequence and exchange.
+ *
+ * STATUS: OPTIONAL
*/
int (*seq_send)(struct fc_lport *lp, struct fc_seq *sp,
struct fc_frame *fp);
/*
- * Send ELS response using mainly infomation
- * in exchange and sequence in EM layer.
+ * Send an ELS response using infomation from a previous
+ * exchange and sequence.
+ *
+ * STATUS: OPTIONAL
*/
void (*seq_els_rsp_send)(struct fc_seq *sp, enum fc_els_cmd els_cmd,
struct fc_seq_els_data *els_data);
* A timer_msec can be specified for abort timeout, if non-zero
* timer_msec value is specified then exchange resp handler
* will be called with timeout error if no response to abort.
+ *
+ * STATUS: OPTIONAL
*/
int (*seq_exch_abort)(const struct fc_seq *req_sp,
unsigned int timer_msec);
/*
* Indicate that an exchange/sequence tuple is complete and the memory
* allocated for the related objects may be freed.
+ *
+ * STATUS: OPTIONAL
*/
void (*exch_done)(struct fc_seq *sp);
* Assigns a EM and a free XID for an new exchange and then
* allocates a new exchange and sequence pair.
* The fp can be used to determine free XID.
+ *
+ * STATUS: OPTIONAL
*/
struct fc_exch *(*exch_get)(struct fc_lport *lp, struct fc_frame *fp);
* Release previously assigned XID by exch_get API.
* The LLD may implement this if XID is assigned by LLD
* in exch_get().
+ *
+ * STATUS: OPTIONAL
*/
void (*exch_put)(struct fc_lport *lp, struct fc_exch_mgr *mp,
u16 ex_id);
/*
* Start a new sequence on the same exchange/sequence tuple.
+ *
+ * STATUS: OPTIONAL
*/
struct fc_seq *(*seq_start_next)(struct fc_seq *sp);
* Reset an exchange manager, completing all sequences and exchanges.
* If s_id is non-zero, reset only exchanges originating from that FID.
* If d_id is non-zero, reset only exchanges sending to that FID.
+ *
+ * STATUS: OPTIONAL
*/
- void (*exch_mgr_reset)(struct fc_exch_mgr *,
+ void (*exch_mgr_reset)(struct fc_lport *,
u32 s_id, u32 d_id);
- void (*rport_flush_queue)(void);
- /**
- * Local Port interfaces
+ /*
+ * Flush the rport work queue. Generally used before shutdown.
+ *
+ * STATUS: OPTIONAL
*/
+ void (*rport_flush_queue)(void);
/*
- * Receive a frame to a local port.
+ * Receive a frame for a local port.
+ *
+ * STATUS: OPTIONAL
*/
void (*lport_recv)(struct fc_lport *lp, struct fc_seq *sp,
struct fc_frame *fp);
+ /*
+ * Reset the local port.
+ *
+ * STATUS: OPTIONAL
+ */
int (*lport_reset)(struct fc_lport *);
- /**
- * Remote Port interfaces
+ /*
+ * Create a remote port
*/
+ struct fc_rport *(*rport_create)(struct fc_disc_port *);
/*
* Initiates the RP state machine. It is called from the LP module.
* - PLOGI
* - PRLI
* - RTV
+ *
+ * STATUS: OPTIONAL
*/
int (*rport_login)(struct fc_rport *rport);
/*
* Logoff, and remove the rport from the transport if
* it had been added. This will send a LOGO to the target.
+ *
+ * STATUS: OPTIONAL
*/
int (*rport_logoff)(struct fc_rport *rport);
/*
* Recieve a request from a remote port.
+ *
+ * STATUS: OPTIONAL
*/
void (*rport_recv_req)(struct fc_seq *, struct fc_frame *,
struct fc_rport *);
- struct fc_rport *(*rport_lookup)(const struct fc_lport *, u32);
-
- /**
- * FCP interfaces
+ /*
+ * lookup an rport by it's port ID.
+ *
+ * STATUS: OPTIONAL
*/
+ struct fc_rport *(*rport_lookup)(const struct fc_lport *, u32);
/*
* Send a fcp cmd from fsp pkt.
*
* The resp handler is called when FCP_RSP received.
*
+ * STATUS: OPTIONAL
*/
int (*fcp_cmd_send)(struct fc_lport *lp, struct fc_fcp_pkt *fsp,
void (*resp)(struct fc_seq *, struct fc_frame *fp,
void *arg));
/*
- * Used at least durring linkdown and reset
+ * Cleanup the FCP layer, used durring link down and reset
+ *
+ * STATUS: OPTIONAL
*/
void (*fcp_cleanup)(struct fc_lport *lp);
/*
* Abort all I/O on a local port
+ *
+ * STATUS: OPTIONAL
*/
void (*fcp_abort_io)(struct fc_lport *lp);
- /**
- * Discovery interfaces
+ /*
+ * Receive a request for the discovery layer.
+ *
+ * STATUS: OPTIONAL
*/
-
void (*disc_recv_req)(struct fc_seq *,
struct fc_frame *, struct fc_lport *);
/*
* Start discovery for a local port.
+ *
+ * STATUS: OPTIONAL
*/
void (*disc_start)(void (*disc_callback)(struct fc_lport *,
enum fc_disc_event),
/*
* Stop discovery for a given lport. This will remove
* all discovered rports
+ *
+ * STATUS: OPTIONAL
*/
void (*disc_stop) (struct fc_lport *);
* Stop discovery for a given lport. This will block
* until all discovered rports are deleted from the
* FC transport class
+ *
+ * STATUS: OPTIONAL
*/
void (*disc_stop_final) (struct fc_lport *);
};
/* Operational Information */
struct libfc_function_template tt;
- u16 link_status;
+ u8 link_up;
+ u8 qfull;
enum fc_lport_state state;
unsigned long boot_time;
struct delayed_work disc_work;
};
-/**
+/*
* FC_LPORT HELPER FUNCTIONS
*****************************/
static inline void *lport_priv(const struct fc_lport *lp)
}
-/**
+/*
* LOCAL PORT LAYER
*****************************/
int fc_lport_init(struct fc_lport *lp);
*/
void fc_linkdown(struct fc_lport *);
-/*
- * Pause and unpause traffic.
- */
-void fc_pause(struct fc_lport *);
-void fc_unpause(struct fc_lport *);
-
/*
* Configure the local port.
*/
int fc_set_mfs(struct fc_lport *lp, u32 mfs);
-/**
+/*
* REMOTE PORT LAYER
*****************************/
int fc_rport_init(struct fc_lport *lp);
void fc_rport_terminate_io(struct fc_rport *rp);
-/**
+/*
* DISCOVERY LAYER
*****************************/
int fc_disc_init(struct fc_lport *lp);
-/**
+/*
* SCSI LAYER
*****************************/
/*
*/
void fc_fcp_destroy(struct fc_lport *);
-/**
+/*
* ELS/CT interface
*****************************/
/*
int fc_elsct_init(struct fc_lport *lp);
-/**
+/*
* EXCHANGE MANAGER LAYER
*****************************/
/*
* If s_id is non-zero, reset only exchanges originating from that FID.
* If d_id is non-zero, reset only exchanges sending to that FID.
*/
-void fc_exch_mgr_reset(struct fc_exch_mgr *, u32 s_id, u32 d_id);
+void fc_exch_mgr_reset(struct fc_lport *, u32 s_id, u32 d_id);
/*
* Functions for fc_functions_template
struct net_device *phys_dev; /* device with ethtool_ops */
struct packet_type fcoe_packet_type;
struct sk_buff_head fcoe_pending_queue;
+ u8 fcoe_pending_queue_active;
u8 dest_addr[ETH_ALEN];
u8 ctl_src_addr[ETH_ALEN];
u8 address_mode;
};
-static inline struct fcoe_softc *fcoe_softc(
- const struct fc_lport *lp)
-{
- return (struct fcoe_softc *)lport_priv(lp);
-}
-
static inline struct net_device *fcoe_netdev(
const struct fc_lport *lp)
{
- return fcoe_softc(lp)->real_dev;
+ return ((struct fcoe_softc *)lport_priv(lp))->real_dev;
}
static inline struct fcoe_hdr *skb_fcoe_header(const struct sk_buff *skb)
unsigned long driver_data; /* W: driver-specific data */
};
-enum {
- SNDRV_HWDEP_IOCTL_PVERSION = _IOR ('H', 0x00, int),
- SNDRV_HWDEP_IOCTL_INFO = _IOR ('H', 0x01, struct snd_hwdep_info),
- SNDRV_HWDEP_IOCTL_DSP_STATUS = _IOR('H', 0x02, struct snd_hwdep_dsp_status),
- SNDRV_HWDEP_IOCTL_DSP_LOAD = _IOW('H', 0x03, struct snd_hwdep_dsp_image)
-};
+#define SNDRV_HWDEP_IOCTL_PVERSION _IOR ('H', 0x00, int)
+#define SNDRV_HWDEP_IOCTL_INFO _IOR ('H', 0x01, struct snd_hwdep_info)
+#define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status)
+#define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image)
/*****************************************************************************
* *
SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC,
};
-enum {
- SNDRV_PCM_IOCTL_PVERSION = _IOR('A', 0x00, int),
- SNDRV_PCM_IOCTL_INFO = _IOR('A', 0x01, struct snd_pcm_info),
- SNDRV_PCM_IOCTL_TSTAMP = _IOW('A', 0x02, int),
- SNDRV_PCM_IOCTL_TTSTAMP = _IOW('A', 0x03, int),
- SNDRV_PCM_IOCTL_HW_REFINE = _IOWR('A', 0x10, struct snd_pcm_hw_params),
- SNDRV_PCM_IOCTL_HW_PARAMS = _IOWR('A', 0x11, struct snd_pcm_hw_params),
- SNDRV_PCM_IOCTL_HW_FREE = _IO('A', 0x12),
- SNDRV_PCM_IOCTL_SW_PARAMS = _IOWR('A', 0x13, struct snd_pcm_sw_params),
- SNDRV_PCM_IOCTL_STATUS = _IOR('A', 0x20, struct snd_pcm_status),
- SNDRV_PCM_IOCTL_DELAY = _IOR('A', 0x21, snd_pcm_sframes_t),
- SNDRV_PCM_IOCTL_HWSYNC = _IO('A', 0x22),
- SNDRV_PCM_IOCTL_SYNC_PTR = _IOWR('A', 0x23, struct snd_pcm_sync_ptr),
- SNDRV_PCM_IOCTL_CHANNEL_INFO = _IOR('A', 0x32, struct snd_pcm_channel_info),
- SNDRV_PCM_IOCTL_PREPARE = _IO('A', 0x40),
- SNDRV_PCM_IOCTL_RESET = _IO('A', 0x41),
- SNDRV_PCM_IOCTL_START = _IO('A', 0x42),
- SNDRV_PCM_IOCTL_DROP = _IO('A', 0x43),
- SNDRV_PCM_IOCTL_DRAIN = _IO('A', 0x44),
- SNDRV_PCM_IOCTL_PAUSE = _IOW('A', 0x45, int),
- SNDRV_PCM_IOCTL_REWIND = _IOW('A', 0x46, snd_pcm_uframes_t),
- SNDRV_PCM_IOCTL_RESUME = _IO('A', 0x47),
- SNDRV_PCM_IOCTL_XRUN = _IO('A', 0x48),
- SNDRV_PCM_IOCTL_FORWARD = _IOW('A', 0x49, snd_pcm_uframes_t),
- SNDRV_PCM_IOCTL_WRITEI_FRAMES = _IOW('A', 0x50, struct snd_xferi),
- SNDRV_PCM_IOCTL_READI_FRAMES = _IOR('A', 0x51, struct snd_xferi),
- SNDRV_PCM_IOCTL_WRITEN_FRAMES = _IOW('A', 0x52, struct snd_xfern),
- SNDRV_PCM_IOCTL_READN_FRAMES = _IOR('A', 0x53, struct snd_xfern),
- SNDRV_PCM_IOCTL_LINK = _IOW('A', 0x60, int),
- SNDRV_PCM_IOCTL_UNLINK = _IO('A', 0x61),
-};
-
-/* Trick to make alsa-lib/acinclude.m4 happy */
-#define SNDRV_PCM_IOCTL_REWIND SNDRV_PCM_IOCTL_REWIND
+#define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int)
+#define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info)
+#define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int)
+#define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int)
+#define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params)
+#define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params)
+#define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12)
+#define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params)
+#define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status)
+#define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t)
+#define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22)
+#define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr)
+#define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info)
+#define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40)
+#define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41)
+#define SNDRV_PCM_IOCTL_START _IO('A', 0x42)
+#define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43)
+#define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44)
+#define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int)
+#define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t)
+#define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47)
+#define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48)
+#define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t)
+#define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi)
+#define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi)
+#define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern)
+#define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern)
+#define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int)
+#define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61)
/*****************************************************************************
* *
unsigned char reserved[16]; /* reserved for future use */
};
-enum {
- SNDRV_RAWMIDI_IOCTL_PVERSION = _IOR('W', 0x00, int),
- SNDRV_RAWMIDI_IOCTL_INFO = _IOR('W', 0x01, struct snd_rawmidi_info),
- SNDRV_RAWMIDI_IOCTL_PARAMS = _IOWR('W', 0x10, struct snd_rawmidi_params),
- SNDRV_RAWMIDI_IOCTL_STATUS = _IOWR('W', 0x20, struct snd_rawmidi_status),
- SNDRV_RAWMIDI_IOCTL_DROP = _IOW('W', 0x30, int),
- SNDRV_RAWMIDI_IOCTL_DRAIN = _IOW('W', 0x31, int),
-};
+#define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int)
+#define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info)
+#define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params)
+#define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status)
+#define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int)
+#define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int)
/*
* Timer section - /dev/snd/timer
unsigned char reserved[64]; /* reserved */
};
-enum {
- SNDRV_TIMER_IOCTL_PVERSION = _IOR('T', 0x00, int),
- SNDRV_TIMER_IOCTL_NEXT_DEVICE = _IOWR('T', 0x01, struct snd_timer_id),
- SNDRV_TIMER_IOCTL_TREAD = _IOW('T', 0x02, int),
- SNDRV_TIMER_IOCTL_GINFO = _IOWR('T', 0x03, struct snd_timer_ginfo),
- SNDRV_TIMER_IOCTL_GPARAMS = _IOW('T', 0x04, struct snd_timer_gparams),
- SNDRV_TIMER_IOCTL_GSTATUS = _IOWR('T', 0x05, struct snd_timer_gstatus),
- SNDRV_TIMER_IOCTL_SELECT = _IOW('T', 0x10, struct snd_timer_select),
- SNDRV_TIMER_IOCTL_INFO = _IOR('T', 0x11, struct snd_timer_info),
- SNDRV_TIMER_IOCTL_PARAMS = _IOW('T', 0x12, struct snd_timer_params),
- SNDRV_TIMER_IOCTL_STATUS = _IOR('T', 0x14, struct snd_timer_status),
- /* The following four ioctls are changed since 1.0.9 due to confliction */
- SNDRV_TIMER_IOCTL_START = _IO('T', 0xa0),
- SNDRV_TIMER_IOCTL_STOP = _IO('T', 0xa1),
- SNDRV_TIMER_IOCTL_CONTINUE = _IO('T', 0xa2),
- SNDRV_TIMER_IOCTL_PAUSE = _IO('T', 0xa3),
-};
+#define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int)
+#define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id)
+#define SNDRV_TIMER_IOCTL_TREAD _IOW('T', 0x02, int)
+#define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo)
+#define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams)
+#define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus)
+#define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select)
+#define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info)
+#define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params)
+#define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status)
+/* The following four ioctls are changed since 1.0.9 due to confliction */
+#define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0)
+#define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1)
+#define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2)
+#define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3)
struct snd_timer_read {
unsigned int resolution;
unsigned int tlv[0]; /* first TLV */
};
-enum {
- SNDRV_CTL_IOCTL_PVERSION = _IOR('U', 0x00, int),
- SNDRV_CTL_IOCTL_CARD_INFO = _IOR('U', 0x01, struct snd_ctl_card_info),
- SNDRV_CTL_IOCTL_ELEM_LIST = _IOWR('U', 0x10, struct snd_ctl_elem_list),
- SNDRV_CTL_IOCTL_ELEM_INFO = _IOWR('U', 0x11, struct snd_ctl_elem_info),
- SNDRV_CTL_IOCTL_ELEM_READ = _IOWR('U', 0x12, struct snd_ctl_elem_value),
- SNDRV_CTL_IOCTL_ELEM_WRITE = _IOWR('U', 0x13, struct snd_ctl_elem_value),
- SNDRV_CTL_IOCTL_ELEM_LOCK = _IOW('U', 0x14, struct snd_ctl_elem_id),
- SNDRV_CTL_IOCTL_ELEM_UNLOCK = _IOW('U', 0x15, struct snd_ctl_elem_id),
- SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS = _IOWR('U', 0x16, int),
- SNDRV_CTL_IOCTL_ELEM_ADD = _IOWR('U', 0x17, struct snd_ctl_elem_info),
- SNDRV_CTL_IOCTL_ELEM_REPLACE = _IOWR('U', 0x18, struct snd_ctl_elem_info),
- SNDRV_CTL_IOCTL_ELEM_REMOVE = _IOWR('U', 0x19, struct snd_ctl_elem_id),
- SNDRV_CTL_IOCTL_TLV_READ = _IOWR('U', 0x1a, struct snd_ctl_tlv),
- SNDRV_CTL_IOCTL_TLV_WRITE = _IOWR('U', 0x1b, struct snd_ctl_tlv),
- SNDRV_CTL_IOCTL_TLV_COMMAND = _IOWR('U', 0x1c, struct snd_ctl_tlv),
- SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE = _IOWR('U', 0x20, int),
- SNDRV_CTL_IOCTL_HWDEP_INFO = _IOR('U', 0x21, struct snd_hwdep_info),
- SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE = _IOR('U', 0x30, int),
- SNDRV_CTL_IOCTL_PCM_INFO = _IOWR('U', 0x31, struct snd_pcm_info),
- SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE = _IOW('U', 0x32, int),
- SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE = _IOWR('U', 0x40, int),
- SNDRV_CTL_IOCTL_RAWMIDI_INFO = _IOWR('U', 0x41, struct snd_rawmidi_info),
- SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE = _IOW('U', 0x42, int),
- SNDRV_CTL_IOCTL_POWER = _IOWR('U', 0xd0, int),
- SNDRV_CTL_IOCTL_POWER_STATE = _IOR('U', 0xd1, int),
-};
+#define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int)
+#define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info)
+#define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list)
+#define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info)
+#define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value)
+#define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value)
+#define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id)
+#define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id)
+#define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int)
+#define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info)
+#define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info)
+#define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id)
+#define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv)
+#define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv)
+#define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv)
+#define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int)
+#define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info)
+#define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int)
+#define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info)
+#define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int)
+#define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int)
+#define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info)
+#define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int)
+#define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int)
+#define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int)
/*
* Read interface.
#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what
-/*
- *
- */
-
-struct snd_xferv {
- const struct iovec *vector;
- unsigned long count;
-};
-
-enum {
- SNDRV_IOCTL_READV = _IOW('K', 0x00, struct snd_xferv),
- SNDRV_IOCTL_WRITEV = _IOW('K', 0x01, struct snd_xferv),
-};
-
#endif /* __SOUND_ASOUND_H */
--- /dev/null
+/*
+ * Driver for the Atmel Audio Bitstream DAC (ABDAC)
+ *
+ * Copyright (C) 2009 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+#ifndef __INCLUDE_SOUND_ATMEL_ABDAC_H
+#define __INCLUDE_SOUND_ATMEL_ABDAC_H
+
+#include <linux/dw_dmac.h>
+
+/**
+ * struct atmel_abdac_pdata - board specific ABDAC configuration
+ * @dws: DMA slave interface to use for sound playback.
+ */
+struct atmel_abdac_pdata {
+ struct dw_dma_slave dws;
+};
+
+#endif /* __INCLUDE_SOUND_ATMEL_ABDAC_H */
--- /dev/null
+/*
+ * Driver for the Atmel AC97C controller
+ *
+ * Copyright (C) 2005-2009 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+#ifndef __INCLUDE_SOUND_ATMEL_AC97C_H
+#define __INCLUDE_SOUND_ATMEL_AC97C_H
+
+#include <linux/dw_dmac.h>
+
+#define AC97C_CAPTURE 0x01
+#define AC97C_PLAYBACK 0x02
+#define AC97C_BOTH (AC97C_CAPTURE | AC97C_PLAYBACK)
+
+/**
+ * struct atmel_ac97c_pdata - board specific AC97C configuration
+ * @rx_dws: DMA slave interface to use for sound capture.
+ * @tx_dws: DMA slave interface to use for sound playback.
+ * @reset_pin: GPIO pin wired to the reset input on the external AC97 codec,
+ * optional to use, set to -ENODEV if not in use. AC97 layer will
+ * try to do a software reset of the external codec anyway.
+ * @flags: Flags for which directions should be enabled.
+ *
+ * If the user do not want to use a DMA channel for playback or capture, i.e.
+ * only one feature is required on the board. The slave for playback or capture
+ * can be set to NULL. The AC97C driver will take use of this when setting up
+ * the sound streams.
+ */
+struct ac97c_platform_data {
+ struct dw_dma_slave rx_dws;
+ struct dw_dma_slave tx_dws;
+ unsigned int flags;
+ int reset_pin;
+};
+
+#endif /* __INCLUDE_SOUND_ATMEL_AC97C_H */
*/
struct snd_kcontrol *snd_ctl_make_virtual_master(char *name,
const unsigned int *tlv);
-int snd_ctl_add_slave(struct snd_kcontrol *master, struct snd_kcontrol *slave);
-
+int _snd_ctl_add_slave(struct snd_kcontrol *master, struct snd_kcontrol *slave,
+ unsigned int flags);
+/* optional flags for slave */
+#define SND_CTL_SLAVE_NEED_UPDATE (1 << 0)
+
+/**
+ * snd_ctl_add_slave - Add a virtual slave control
+ * @master: vmaster element
+ * @slave: slave element to add
+ *
+ * Add a virtual slave control to the given master element created via
+ * snd_ctl_create_virtual_master() beforehand.
+ * Returns zero if successful or a negative error code.
+ *
+ * All slaves must be the same type (returning the same information
+ * via info callback). The fucntion doesn't check it, so it's your
+ * responsibility.
+ *
+ * Also, some additional limitations:
+ * at most two channels,
+ * logarithmic volume control (dB level) thus no linear volume,
+ * master can only attenuate the volume without gain
+ */
+static inline int
+snd_ctl_add_slave(struct snd_kcontrol *master, struct snd_kcontrol *slave)
+{
+ return _snd_ctl_add_slave(master, slave, 0);
+}
+
+/**
+ * snd_ctl_add_slave_uncached - Add a virtual slave control
+ * @master: vmaster element
+ * @slave: slave element to add
+ *
+ * Add a virtual slave control to the given master.
+ * Unlike snd_ctl_add_slave(), the element added via this function
+ * is supposed to have volatile values, and get callback is called
+ * at each time quried from the master.
+ *
+ * When the control peeks the hardware values directly and the value
+ * can be changed by other means than the put callback of the element,
+ * this function should be used to keep the value always up-to-date.
+ */
+static inline int
+snd_ctl_add_slave_uncached(struct snd_kcontrol *master,
+ struct snd_kcontrol *slave)
+{
+ return _snd_ctl_add_slave(master, slave, SND_CTL_SLAVE_NEED_UPDATE);
+}
+
#endif /* __SOUND_CONTROL_H */
struct snd_monitor_file {
struct file *file;
- struct snd_monitor_file *next;
const struct file_operations *disconnected_f_op;
- struct list_head shutdown_list;
+ struct list_head shutdown_list; /* still need to shutdown */
+ struct list_head list; /* link of monitor files */
};
/* main structure for soundcard */
struct snd_info_entry *proc_id; /* the card id */
struct proc_dir_entry *proc_root_link; /* number link to real id */
- struct snd_monitor_file *files; /* all files associated to this card */
+ struct list_head files_list; /* all files associated to this card */
struct snd_shutdown_f_ops *s_f_ops; /* file operations in the shutdown
state */
spinlock_t files_lock; /* lock the files for this card */
extern int (*snd_mixer_oss_notify_callback)(struct snd_card *card, int cmd);
#endif
+int snd_card_create(int idx, const char *id,
+ struct module *module, int extra_size,
+ struct snd_card **card_ret);
+
+static inline __deprecated
struct snd_card *snd_card_new(int idx, const char *id,
- struct module *module, int extra_size);
+ struct module *module, int extra_size)
+{
+ struct snd_card *card;
+ if (snd_card_create(idx, id, module, extra_size, &card) < 0)
+ return NULL;
+ return card;
+}
+
int snd_card_disconnect(struct snd_card *card);
int snd_card_free(struct snd_card *card);
int snd_card_free_when_closed(struct snd_card *card);
struct snd_pci_quirk {
unsigned short subvendor; /* PCI subvendor ID */
unsigned short subdevice; /* PCI subdevice ID */
+ unsigned short subdevice_mask; /* bitmask to match */
int value; /* value */
#ifdef CONFIG_SND_DEBUG_VERBOSE
const char *name; /* name of the device (optional) */
#endif
};
-#define _SND_PCI_QUIRK_ID(vend,dev) \
- .subvendor = (vend), .subdevice = (dev)
+#define _SND_PCI_QUIRK_ID_MASK(vend, mask, dev) \
+ .subvendor = (vend), .subdevice = (dev), .subdevice_mask = (mask)
+#define _SND_PCI_QUIRK_ID(vend, dev) \
+ _SND_PCI_QUIRK_ID_MASK(vend, 0xffff, dev)
#define SND_PCI_QUIRK_ID(vend,dev) {_SND_PCI_QUIRK_ID(vend, dev)}
#ifdef CONFIG_SND_DEBUG_VERBOSE
#define SND_PCI_QUIRK(vend,dev,xname,val) \
{_SND_PCI_QUIRK_ID(vend, dev), .value = (val), .name = (xname)}
+#define SND_PCI_QUIRK_VENDOR(vend, xname, val) \
+ {_SND_PCI_QUIRK_ID_MASK(vend, 0, 0), .value = (val), .name = (xname)}
+#define SND_PCI_QUIRK_MASK(vend, mask, dev, xname, val) \
+ {_SND_PCI_QUIRK_ID_MASK(vend, mask, dev), \
+ .value = (val), .name = (xname)}
#else
#define SND_PCI_QUIRK(vend,dev,xname,val) \
{_SND_PCI_QUIRK_ID(vend, dev), .value = (val)}
+#define SND_PCI_QUIRK_MASK(vend, mask, dev, xname, val) \
+ {_SND_PCI_QUIRK_ID_MASK(vend, mask, dev), .value = (val)}
+#define SND_PCI_QUIRK_VENDOR(vend, xname, val) \
+ {_SND_PCI_QUIRK_ID_MASK(vend, 0, 0), .value = (val)}
#endif
const struct snd_pci_quirk *
struct snd_hwdep;
+/* hwdep file ops; all ops can be NULL */
struct snd_hwdep_ops {
- long long (*llseek) (struct snd_hwdep *hw, struct file * file, long long offset, int orig);
- long (*read) (struct snd_hwdep *hw, char __user *buf, long count, loff_t *offset);
- long (*write) (struct snd_hwdep *hw, const char __user *buf, long count, loff_t *offset);
- int (*open) (struct snd_hwdep * hw, struct file * file);
- int (*release) (struct snd_hwdep *hw, struct file * file);
- unsigned int (*poll) (struct snd_hwdep *hw, struct file * file, poll_table * wait);
- int (*ioctl) (struct snd_hwdep *hw, struct file * file, unsigned int cmd, unsigned long arg);
- int (*ioctl_compat) (struct snd_hwdep *hw, struct file * file, unsigned int cmd, unsigned long arg);
- int (*mmap) (struct snd_hwdep *hw, struct file * file, struct vm_area_struct * vma);
- int (*dsp_status) (struct snd_hwdep *hw, struct snd_hwdep_dsp_status *status);
- int (*dsp_load) (struct snd_hwdep *hw, struct snd_hwdep_dsp_image *image);
+ long long (*llseek)(struct snd_hwdep *hw, struct file *file,
+ long long offset, int orig);
+ long (*read)(struct snd_hwdep *hw, char __user *buf,
+ long count, loff_t *offset);
+ long (*write)(struct snd_hwdep *hw, const char __user *buf,
+ long count, loff_t *offset);
+ int (*open)(struct snd_hwdep *hw, struct file * file);
+ int (*release)(struct snd_hwdep *hw, struct file * file);
+ unsigned int (*poll)(struct snd_hwdep *hw, struct file *file,
+ poll_table *wait);
+ int (*ioctl)(struct snd_hwdep *hw, struct file *file,
+ unsigned int cmd, unsigned long arg);
+ int (*ioctl_compat)(struct snd_hwdep *hw, struct file *file,
+ unsigned int cmd, unsigned long arg);
+ int (*mmap)(struct snd_hwdep *hw, struct file *file,
+ struct vm_area_struct *vma);
+ int (*dsp_status)(struct snd_hwdep *hw,
+ struct snd_hwdep_dsp_status *status);
+ int (*dsp_load)(struct snd_hwdep *hw,
+ struct snd_hwdep_dsp_image *image);
};
struct snd_hwdep {
void (*private_free) (struct snd_hwdep *hwdep);
struct mutex open_mutex;
- int used;
- unsigned int dsp_loaded;
- unsigned int exclusive: 1;
+ int used; /* reference counter */
+ unsigned int dsp_loaded; /* bit fields of loaded dsp indices */
+ unsigned int exclusive:1; /* exclusive access mode */
};
extern int snd_hwdep_new(struct snd_card *card, char *id, int device,
/**
* Jack types which can be reported. These values are used as a
* bitmask.
+ *
+ * Note that this must be kept in sync with the lookup table in
+ * sound/core/jack.c.
*/
enum snd_jack_types {
SND_JACK_HEADPHONE = 0x0001,
SND_JACK_HEADSET = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE,
SND_JACK_LINEOUT = 0x0004,
SND_JACK_MECHANICAL = 0x0008, /* If detected separately */
+ SND_JACK_VIDEOOUT = 0x0010,
+ SND_JACK_AVOUT = SND_JACK_LINEOUT | SND_JACK_VIDEOOUT,
};
struct snd_jack {
/* -- timer section -- */
struct snd_timer *timer; /* timer */
unsigned timer_running: 1; /* time is running */
- spinlock_t timer_lock;
/* -- next substream -- */
struct snd_pcm_substream *next;
/* -- linked substreams -- */
extern const struct file_operations snd_pcm_f_ops[2];
-int snd_pcm_new(struct snd_card *card, char *id, int device,
+int snd_pcm_new(struct snd_card *card, const char *id, int device,
int playback_count, int capture_count,
struct snd_pcm **rpcm);
int snd_pcm_new_stream(struct snd_pcm *pcm, int stream, int substream_count);
extern int pxa2xx_ac97_hw_probe(struct platform_device *dev);
extern void pxa2xx_ac97_hw_remove(struct platform_device *dev);
+/* AC97 platform_data */
+/**
+ * struct pxa2xx_ac97_platform_data - pxa ac97 platform data
+ * @reset_gpio: AC97 reset gpio (normally gpio113 or gpio95)
+ * a -1 value means no gpio will be used for reset
+ *
+ * Platform data should only be specified for pxa27x CPUs where a silicon bug
+ * prevents correct operation of the reset line. If not specified, the default
+ * behaviour is to consider gpio 113 as the AC97 reset line, which is the
+ * default on most boards.
+ */
+struct pxa2xx_ac97_platform_data {
+ int reset_gpio;
+};
+
#endif
#define SNDRV_RAWMIDI_LFLG_INPUT (1<<1)
#define SNDRV_RAWMIDI_LFLG_OPEN (3<<0)
#define SNDRV_RAWMIDI_LFLG_APPEND (1<<2)
-#define SNDRV_RAWMIDI_LFLG_NOOPENLOCK (1<<3)
struct snd_rawmidi;
struct snd_rawmidi_substream;
int value2; /* reserved */
};
-enum {
- SNDRV_EMUX_IOCTL_VERSION = _IOR('H', 0x80, unsigned int),
- SNDRV_EMUX_IOCTL_LOAD_PATCH = _IOWR('H', 0x81, struct soundfont_patch_info),
- SNDRV_EMUX_IOCTL_RESET_SAMPLES = _IO('H', 0x82),
- SNDRV_EMUX_IOCTL_REMOVE_LAST_SAMPLES = _IO('H', 0x83),
- SNDRV_EMUX_IOCTL_MEM_AVAIL = _IOW('H', 0x84, int),
- SNDRV_EMUX_IOCTL_MISC_MODE = _IOWR('H', 0x84, struct snd_emux_misc_mode),
-};
+#define SNDRV_EMUX_IOCTL_VERSION _IOR('H', 0x80, unsigned int)
+#define SNDRV_EMUX_IOCTL_LOAD_PATCH _IOWR('H', 0x81, struct soundfont_patch_info)
+#define SNDRV_EMUX_IOCTL_RESET_SAMPLES _IO('H', 0x82)
+#define SNDRV_EMUX_IOCTL_REMOVE_LAST_SAMPLES _IO('H', 0x83)
+#define SNDRV_EMUX_IOCTL_MEM_AVAIL _IOW('H', 0x84, int)
+#define SNDRV_EMUX_IOCTL_MISC_MODE _IOWR('H', 0x84, struct snd_emux_misc_mode)
#endif /* __SOUND_SFNT_INFO_H */
int (*resume)(struct snd_soc_dai *dai);
/* ops */
- struct snd_soc_dai_ops ops;
+ struct snd_soc_dai_ops *ops;
/* DAI capabilities */
struct snd_soc_pcm_stream capture;
wcontrols, wncontrols)\
{ .id = snd_soc_dapm_mixer, .name = wname, .reg = wreg, .shift = wshift, \
.invert = winvert, .kcontrols = wcontrols, .num_kcontrols = wncontrols}
+#define SND_SOC_DAPM_MIXER_NAMED_CTL(wname, wreg, wshift, winvert, \
+ wcontrols, wncontrols)\
+{ .id = snd_soc_dapm_mixer_named_ctl, .name = wname, .reg = wreg, \
+ .shift = wshift, .invert = winvert, .kcontrols = wcontrols, \
+ .num_kcontrols = wncontrols}
#define SND_SOC_DAPM_MICBIAS(wname, wreg, wshift, winvert) \
{ .id = snd_soc_dapm_micbias, .name = wname, .reg = wreg, .shift = wshift, \
.invert = winvert, .kcontrols = NULL, .num_kcontrols = 0}
{ .id = snd_soc_dapm_mixer, .name = wname, .reg = wreg, .shift = wshift, \
.invert = winvert, .kcontrols = wcontrols, .num_kcontrols = wncontrols, \
.event = wevent, .event_flags = wflags}
+#define SND_SOC_DAPM_MIXER_NAMED_CTL_E(wname, wreg, wshift, winvert, \
+ wcontrols, wncontrols, wevent, wflags) \
+{ .id = snd_soc_dapm_mixer, .name = wname, .reg = wreg, .shift = wshift, \
+ .invert = winvert, .kcontrols = wcontrols, \
+ .num_kcontrols = wncontrols, .event = wevent, .event_flags = wflags}
#define SND_SOC_DAPM_MICBIAS_E(wname, wreg, wshift, winvert, wevent, wflags) \
{ .id = snd_soc_dapm_micbias, .name = wname, .reg = wreg, .shift = wshift, \
.invert = winvert, .kcontrols = NULL, .num_kcontrols = 0, \
.get = snd_soc_dapm_get_value_enum_double, \
.put = snd_soc_dapm_put_value_enum_double, \
.private_value = (unsigned long)&xenum }
+#define SOC_DAPM_PIN_SWITCH(xname) \
+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname " Switch", \
+ .info = snd_soc_dapm_info_pin_switch, \
+ .get = snd_soc_dapm_get_pin_switch, \
+ .put = snd_soc_dapm_put_pin_switch, \
+ .private_value = (unsigned long)xname }
/* dapm stream operations */
#define SND_SOC_DAPM_STREAM_NOP 0x0
struct snd_ctl_elem_value *ucontrol);
int snd_soc_dapm_put_value_enum_double(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
+int snd_soc_dapm_info_pin_switch(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_info *uinfo);
+int snd_soc_dapm_get_pin_switch(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *uncontrol);
+int snd_soc_dapm_put_pin_switch(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *uncontrol);
int snd_soc_dapm_new_control(struct snd_soc_codec *codec,
const struct snd_soc_dapm_widget *widget);
int snd_soc_dapm_new_controls(struct snd_soc_codec *codec,
int snd_soc_dapm_sys_add(struct device *dev);
/* dapm audio pin control and status */
-int snd_soc_dapm_enable_pin(struct snd_soc_codec *codec, char *pin);
-int snd_soc_dapm_disable_pin(struct snd_soc_codec *codec, char *pin);
-int snd_soc_dapm_nc_pin(struct snd_soc_codec *codec, char *pin);
-int snd_soc_dapm_get_pin_status(struct snd_soc_codec *codec, char *pin);
+int snd_soc_dapm_enable_pin(struct snd_soc_codec *codec, const char *pin);
+int snd_soc_dapm_disable_pin(struct snd_soc_codec *codec, const char *pin);
+int snd_soc_dapm_nc_pin(struct snd_soc_codec *codec, const char *pin);
+int snd_soc_dapm_get_pin_status(struct snd_soc_codec *codec, const char *pin);
int snd_soc_dapm_sync(struct snd_soc_codec *codec);
/* dapm widget types */
snd_soc_dapm_mux, /* selects 1 analog signal from many inputs */
snd_soc_dapm_value_mux, /* selects 1 analog signal from many inputs */
snd_soc_dapm_mixer, /* mixes several analog signals together */
+ snd_soc_dapm_mixer_named_ctl, /* mixer with named controls */
snd_soc_dapm_pga, /* programmable gain/attenuation (volume) */
snd_soc_dapm_adc, /* analog to digital converter */
snd_soc_dapm_dac, /* digital to analog converter */
#include <linux/platform_device.h>
#include <linux/types.h>
#include <linux/workqueue.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/control.h>
SND_SOC_BIAS_OFF,
};
+struct snd_jack;
+struct snd_soc_card;
struct snd_soc_device;
struct snd_soc_pcm_stream;
struct snd_soc_ops;
struct snd_soc_codec;
struct soc_enum;
struct snd_soc_ac97_ops;
+struct snd_soc_jack;
+struct snd_soc_jack_pin;
+#ifdef CONFIG_GPIOLIB
+struct snd_soc_jack_gpio;
+#endif
typedef int (*hw_write_t)(void *,const char* ,int);
typedef int (*hw_read_t)(void *,char* ,int);
int snd_soc_set_runtime_hwparams(struct snd_pcm_substream *substream,
const struct snd_pcm_hardware *hw);
+/* Jack reporting */
+int snd_soc_jack_new(struct snd_soc_card *card, const char *id, int type,
+ struct snd_soc_jack *jack);
+void snd_soc_jack_report(struct snd_soc_jack *jack, int status, int mask);
+int snd_soc_jack_add_pins(struct snd_soc_jack *jack, int count,
+ struct snd_soc_jack_pin *pins);
+#ifdef CONFIG_GPIOLIB
+int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count,
+ struct snd_soc_jack_gpio *gpios);
+void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
+ struct snd_soc_jack_gpio *gpios);
+#endif
+
/* codec IO */
#define snd_soc_read(codec, reg) codec->read(codec, reg)
#define snd_soc_write(codec, reg, value) codec->write(codec, reg, value)
*/
struct snd_kcontrol *snd_soc_cnew(const struct snd_kcontrol_new *_template,
void *data, char *long_name);
+int snd_soc_add_controls(struct snd_soc_codec *codec,
+ const struct snd_kcontrol_new *controls, int num_controls);
int snd_soc_info_enum_double(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo);
int snd_soc_info_enum_ext(struct snd_kcontrol *kcontrol,
int snd_soc_put_volsw_s8(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
+/**
+ * struct snd_soc_jack_pin - Describes a pin to update based on jack detection
+ *
+ * @pin: name of the pin to update
+ * @mask: bits to check for in reported jack status
+ * @invert: if non-zero then pin is enabled when status is not reported
+ */
+struct snd_soc_jack_pin {
+ struct list_head list;
+ const char *pin;
+ int mask;
+ bool invert;
+};
+
+/**
+ * struct snd_soc_jack_gpio - Describes a gpio pin for jack detection
+ *
+ * @gpio: gpio number
+ * @name: gpio name
+ * @report: value to report when jack detected
+ * @invert: report presence in low state
+ * @debouce_time: debouce time in ms
+ */
+#ifdef CONFIG_GPIOLIB
+struct snd_soc_jack_gpio {
+ unsigned int gpio;
+ const char *name;
+ int report;
+ int invert;
+ int debounce_time;
+ struct snd_soc_jack *jack;
+ struct work_struct work;
+};
+#endif
+
+struct snd_soc_jack {
+ struct snd_jack *jack;
+ struct snd_soc_card *card;
+ struct list_head pins;
+ int status;
+};
+
/* SoC PCM stream information */
struct snd_soc_pcm_stream {
char *stream_name;
struct snd_soc_device *socdev;
+ struct snd_soc_codec *codec;
+
struct snd_soc_platform *platform;
struct delayed_work delayed_work;
struct work_struct deferred_resume_work;
struct snd_soc_device {
struct device *dev;
struct snd_soc_card *card;
- struct snd_soc_codec *codec;
struct snd_soc_codec_device *codec_dev;
void *codec_data;
};
+++ /dev/null
-/*
- * linux/include/linux/l3/uda1341.h
- *
- * Philips UDA1341 mixer device driver for ALSA
- *
- * Copyright (c) 2002 Tomas Kasparek <tomas.kasparek@seznam.cz>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License.
- *
- * History:
- *
- * 2002-03-13 Tomas Kasparek Initial release - based on uda1341.h from OSS
- * 2002-03-30 Tomas Kasparek Proc filesystem support, complete mixer and DSP
- * features support
- */
-
-#define UDA1341_ALSA_NAME "snd-uda1341"
-
-/*
- * Default rate set after inicialization
- */
-#define AUDIO_RATE_DEFAULT 44100
-
-/*
- * UDA1341 L3 address and command types
- */
-#define UDA1341_L3ADDR 5
-#define UDA1341_DATA0 (UDA1341_L3ADDR << 2 | 0)
-#define UDA1341_DATA1 (UDA1341_L3ADDR << 2 | 1)
-#define UDA1341_STATUS (UDA1341_L3ADDR << 2 | 2)
-
-enum uda1341_onoff {
- OFF=0,
- ON,
-};
-
-enum uda1341_format {
- I2S=0,
- LSB16,
- LSB18,
- LSB20,
- MSB,
- LSB16MSB,
- LSB18MSB,
- LSB20MSB,
-};
-
-enum uda1341_fs {
- F512=0,
- F384,
- F256,
- Funused,
-};
-
-enum uda1341_peak {
- BEFORE=0,
- AFTER,
-};
-
-enum uda1341_filter {
- FLAT=0,
- MIN,
- MIN2,
- MAX,
-};
-
-enum uda1341_mixer {
- DOUBLE,
- LINE,
- MIC,
- MIXER,
-};
-
-enum uda1341_deemp {
- NONE,
- D32,
- D44,
- D48,
-};
-
-enum uda1341_config {
- CMD_READ_REG = 0,
- CMD_RESET,
- CMD_FS,
- CMD_FORMAT,
- CMD_OGAIN,
- CMD_IGAIN,
- CMD_DAC,
- CMD_ADC,
- CMD_VOLUME,
- CMD_BASS,
- CMD_TREBBLE,
- CMD_PEAK,
- CMD_DEEMP,
- CMD_MUTE,
- CMD_FILTER,
- CMD_CH1,
- CMD_CH2,
- CMD_MIC,
- CMD_MIXER,
- CMD_AGC,
- CMD_IG,
- CMD_AGC_TIME,
- CMD_AGC_LEVEL,
-#ifdef CONFIG_PM
- CMD_SUSPEND,
- CMD_RESUME,
-#endif
- CMD_LAST,
-};
-
-enum write_through {
- //used in update_bits (write_cfg) to avoid l3_write - just update local copy of regs.
- REGS_ONLY=0,
- //update local regs and write value to uda1341 - do l3_write
- FLUSH,
-};
-
-int __init snd_chip_uda1341_mixer_new(struct snd_card *card, struct l3_client **clnt);
-
-/*
- * Local variables:
- * indent-tabs-mode: t
- * End:
- */
/* include/version.h */
-#define CONFIG_SND_VERSION "1.0.18a"
+#define CONFIG_SND_VERSION "1.0.19"
#define CONFIG_SND_DATE ""
unsigned short hardware,
unsigned short hwshare,
struct snd_wss **rchip);
+int snd_wss_free(struct snd_wss *chip);
int snd_wss_pcm(struct snd_wss *chip, int device, struct snd_pcm **rpcm);
int snd_wss_timer(struct snd_wss *chip, int device, struct snd_timer **rtimer);
int snd_wss_mixer(struct snd_wss *chip);
if (err < 0)
goto free_mod;
-#if defined(CONFIG_MODULE_UNLOAD) && defined(CONFIG_SMP)
- mod->refptr = percpu_modalloc(sizeof(local_t), __alignof__(local_t),
- mod->name);
- if (!mod->refptr) {
- err = -ENOMEM;
- goto free_mod;
- }
-#endif
if (pcpuindex) {
/* We have a special allocation for this section. */
percpu = percpu_modalloc(sechdrs[pcpuindex].sh_size,
mod->name);
if (!percpu) {
err = -ENOMEM;
- goto free_percpu;
+ goto free_mod;
}
sechdrs[pcpuindex].sh_flags &= ~(unsigned long)SHF_ALLOC;
mod->percpu = percpu;
/* Module has been moved. */
mod = (void *)sechdrs[modindex].sh_addr;
+#if defined(CONFIG_MODULE_UNLOAD) && defined(CONFIG_SMP)
+ mod->refptr = percpu_modalloc(sizeof(local_t), __alignof__(local_t),
+ mod->name);
+ if (!mod->refptr) {
+ err = -ENOMEM;
+ goto free_init;
+ }
+#endif
/* Now we've moved module, initialize linked lists, etc. */
module_unload_init(mod);
ftrace_release(mod->module_core, mod->core_size);
free_unload:
module_unload_free(mod);
+ free_init:
+#if defined(CONFIG_MODULE_UNLOAD) && defined(CONFIG_SMP)
+ percpu_modfree(mod->refptr);
+#endif
module_free(mod, mod->module_init);
free_core:
module_free(mod, mod->module_core);
+ /* mod will be freed with core. Don't access it beyond this line! */
free_percpu:
if (percpu)
percpu_modfree(percpu);
-#if defined(CONFIG_MODULE_UNLOAD) && defined(CONFIG_SMP)
- percpu_modfree(mod->refptr);
-#endif
free_mod:
kfree(args);
free_hdr:
read_lock(&tasklist_lock);
if (may_ptrace_stop()) {
do_notify_parent_cldstop(current, CLD_TRAPPED);
+ /*
+ * Don't want to allow preemption here, because
+ * sys_ptrace() needs this task to be inactive.
+ *
+ * XXX: implement read_unlock_no_resched().
+ */
+ preempt_disable();
read_unlock(&tasklist_lock);
+ preempt_enable_no_resched();
schedule();
} else {
/*
* Move the pages to the [file or anon] inactive list.
*/
pagevec_init(&pvec, 1);
- pgmoved = 0;
lru = LRU_BASE + file * LRU_FILE;
spin_lock_irq(&zone->lru_lock);
*/
reclaim_stat->recent_rotated[!!file] += pgmoved;
+ pgmoved = 0;
while (!list_empty(&l_inactive)) {
page = lru_to_page(&l_inactive);
prefetchw_prev_lru_page(page, &l_inactive, flags);
local_irq_disable();
skb = __skb_dequeue(&queue->input_pkt_queue);
if (!skb) {
- __napi_complete(napi);
local_irq_enable();
- break;
+ napi_complete(napi);
+ goto out;
}
local_irq_enable();
napi_gro_flush(napi);
+out:
return work;
}
struct sk_buff *skb, *next;
list_del_init(&napi->dev_list);
- kfree(napi->skb);
+ kfree_skb(napi->skb);
for (skb = napi->gro_list; skb; skb = next) {
next = skb->next;
static int ip_frag_reasm(struct ipq *qp, struct sk_buff *prev,
struct net_device *dev)
{
+ struct net *net = container_of(qp->q.net, struct net, ipv4.frags);
struct iphdr *iph;
struct sk_buff *fp, *head = qp->q.fragments;
int len;
iph = ip_hdr(head);
iph->frag_off = 0;
iph->tot_len = htons(len);
- IP_INC_STATS_BH(dev_net(dev), IPSTATS_MIB_REASMOKS);
+ IP_INC_STATS_BH(net, IPSTATS_MIB_REASMOKS);
qp->q.fragments = NULL;
return 0;
static void __exit inet6_exit(void)
{
+ if (disable_ipv6)
+ return;
+
/* First of all disallow new sockets creation. */
sock_unregister(PF_INET6);
/* Disallow any further netlink messages */
if (!ipv6_ext_hdr(nexthdr)) {
return -1;
}
- if (len < (int)sizeof(struct ipv6_opt_hdr)) {
- pr_debug("too short\n");
- return -1;
- }
if (nexthdr == NEXTHDR_NONE) {
pr_debug("next header is none\n");
return -1;
}
+ if (len < (int)sizeof(struct ipv6_opt_hdr)) {
+ pr_debug("too short\n");
+ return -1;
+ }
if (skb_copy_bits(skb, start, &hdr, sizeof(hdr)))
BUG();
if (nexthdr == NEXTHDR_AUTH)
static int ip6_frag_reasm(struct frag_queue *fq, struct sk_buff *prev,
struct net_device *dev)
{
+ struct net *net = container_of(fq->q.net, struct net, ipv6.frags);
struct sk_buff *fp, *head = fq->q.fragments;
int payload_len;
unsigned int nhoff;
head->csum);
rcu_read_lock();
- IP6_INC_STATS_BH(dev_net(dev),
- __in6_dev_get(dev), IPSTATS_MIB_REASMOKS);
+ IP6_INC_STATS_BH(net, __in6_dev_get(dev), IPSTATS_MIB_REASMOKS);
rcu_read_unlock();
fq->q.fragments = NULL;
return 1;
printk(KERN_DEBUG "ip6_frag_reasm: no memory for reassembly\n");
out_fail:
rcu_read_lock();
- IP6_INC_STATS_BH(dev_net(dev),
- __in6_dev_get(dev), IPSTATS_MIB_REASMFAILS);
+ IP6_INC_STATS_BH(net, __in6_dev_get(dev), IPSTATS_MIB_REASMFAILS);
rcu_read_unlock();
return -1;
}
}
nt = netdev_priv(dev);
- ipip6_tunnel_init(dev);
nt->parms = *parms;
+ ipip6_tunnel_init(dev);
if (parms->i_flags & SIT_ISATAP)
dev->priv_flags |= IFF_ISATAP;
skb_copy_queue_mapping(frag, first);
frag->do_not_encrypt = first->do_not_encrypt;
+ frag->dev = first->dev;
+ frag->iif = first->iif;
pos += copylen;
left -= copylen;
NF_CT_ASSERT(skb->nfct);
ret = l4proto->packet(ct, skb, dataoff, ctinfo, pf, hooknum);
- if (ret < 0) {
+ if (ret <= 0) {
/* Invalid: inverse of the return code tells
* the netfilter core what to do */
pr_debug("nf_conntrack_in: Can't track with proto module\n");
goto out;
}
+ exp->class = 0;
exp->expectfn = NULL;
exp->flags = 0;
exp->master = ct;
*/
if (nf_ct_kill(ct))
return -NF_REPEAT;
- return -NF_DROP;
+ return NF_DROP;
}
/* Fall through */
case TCP_CONNTRACK_IGNORE:
nf_log_packet(pf, 0, skb, NULL, NULL, NULL,
"nf_ct_tcp: killing out of sync session ");
nf_ct_kill(ct);
- return -NF_DROP;
+ return NF_DROP;
}
ct->proto.tcp.last_index = index;
ct->proto.tcp.last_dir = dir;
if (sctp_addip_enable) {
auth_chunks->chunks[0] = SCTP_CID_ASCONF;
auth_chunks->chunks[1] = SCTP_CID_ASCONF_ACK;
- auth_chunks->param_hdr.length += htons(2);
+ auth_chunks->param_hdr.length =
+ htons(sizeof(sctp_paramhdr_t) + 2);
}
}
rpc_clear_queued(task);
if (rpc_test_and_set_running(task))
return;
- /* We might have raced */
- if (RPC_IS_QUEUED(task)) {
- rpc_clear_running(task);
- return;
- }
if (RPC_IS_ASYNC(task)) {
int status;
*/
static void __rpc_execute(struct rpc_task *task)
{
- int status = 0;
+ struct rpc_wait_queue *queue;
+ int task_is_async = RPC_IS_ASYNC(task);
+ int status = 0;
dprintk("RPC: %5u __rpc_execute flags=0x%x\n",
task->tk_pid, task->tk_flags);
*/
if (!RPC_IS_QUEUED(task))
continue;
- rpc_clear_running(task);
- if (RPC_IS_ASYNC(task)) {
- /* Careful! we may have raced... */
- if (RPC_IS_QUEUED(task))
- return;
- if (rpc_test_and_set_running(task))
- return;
+ /*
+ * The queue->lock protects against races with
+ * rpc_make_runnable().
+ *
+ * Note that once we clear RPC_TASK_RUNNING on an asynchronous
+ * rpc_task, rpc_make_runnable() can assign it to a
+ * different workqueue. We therefore cannot assume that the
+ * rpc_task pointer may still be dereferenced.
+ */
+ queue = task->tk_waitqueue;
+ spin_lock_bh(&queue->lock);
+ if (!RPC_IS_QUEUED(task)) {
+ spin_unlock_bh(&queue->lock);
continue;
}
+ rpc_clear_running(task);
+ spin_unlock_bh(&queue->lock);
+ if (task_is_async)
+ return;
/* sync task: sleep here */
dprintk("RPC: %5u sync task going to sleep\n", task->tk_pid);
xprt, (xprt_connected(xprt) ? "is" : "is not"));
if (!xprt_bound(xprt)) {
- task->tk_status = -EIO;
+ task->tk_status = -EAGAIN;
return;
}
if (!xprt_lock_write(xprt, task))
int err, sent = 0;
if (unlikely(!sock))
- return -ENOTCONN;
+ return -ENOTSOCK;
clear_bit(SOCK_ASYNC_NOSPACE, &sock->flags);
if (base != 0) {
req->rq_svec->iov_base,
req->rq_svec->iov_len);
+ if (!xprt_bound(xprt))
+ return -ENOTCONN;
status = xs_sendpages(transport->sock,
xs_addr(xprt),
xprt->addrlen, xdr,
}
switch (status) {
+ case -ENOTSOCK:
+ status = -ENOTCONN;
+ /* Should we call xs_close() here? */
+ break;
case -EAGAIN:
xs_nospace(task);
break;
}
switch (status) {
+ case -ENOTSOCK:
+ status = -ENOTCONN;
+ /* Should we call xs_close() here? */
+ break;
case -EAGAIN:
xs_nospace(task);
break;
struct socket *sock = transport->sock;
int err, status = -EIO;
- if (xprt->shutdown || !xprt_bound(xprt))
+ if (xprt->shutdown)
goto out;
/* Start by resetting any existing state */
struct socket *sock = transport->sock;
int err, status = -EIO;
- if (xprt->shutdown || !xprt_bound(xprt))
+ if (xprt->shutdown)
goto out;
/* Start by resetting any existing state */
write_unlock_bh(&sk->sk_callback_lock);
}
+ if (!xprt_bound(xprt))
+ return -ENOTCONN;
+
/* Tell the socket layer to start connecting... */
xprt->stat.connect_count++;
xprt->stat.connect_start = jiffies;
struct socket *sock = transport->sock;
int err, status = -EIO;
- if (xprt->shutdown || !xprt_bound(xprt))
+ if (xprt->shutdown)
goto out;
if (!sock) {
struct socket *sock = transport->sock;
int err, status = -EIO;
- if (xprt->shutdown || !xprt_bound(xprt))
+ if (xprt->shutdown)
goto out;
if (!sock) {
config LIB80211_CRYPT_TKIP
tristate
+
+config LIB80211_DEBUG
+ bool "lib80211 debugging messages"
+ depends on LIB80211
+ default n
+ ---help---
+ You can enable this if you want verbose debugging messages
+ from lib80211.
+
+ If unsure, say N.
pos += 8;
if (ccmp_replay_check(pn, key->rx_pn)) {
+#ifdef CONFIG_LIB80211_DEBUG
if (net_ratelimit()) {
printk(KERN_DEBUG "CCMP: replay detected: STA=%pM "
"previous PN %02x%02x%02x%02x%02x%02x "
key->rx_pn[3], key->rx_pn[4], key->rx_pn[5],
pn[0], pn[1], pn[2], pn[3], pn[4], pn[5]);
}
+#endif
key->dot11RSNAStatsCCMPReplays++;
return -4;
}
pos += 8;
if (tkip_replay_check(iv32, iv16, tkey->rx_iv32, tkey->rx_iv16)) {
+#ifdef CONFIG_LIB80211_DEBUG
if (net_ratelimit()) {
printk(KERN_DEBUG "TKIP: replay detected: STA=%pM"
" previous TSC %08x%04x received TSC "
"%08x%04x\n", hdr->addr2,
tkey->rx_iv32, tkey->rx_iv16, iv32, iv16);
}
+#endif
tkey->dot11RSNAStatsTKIPReplays++;
return -4;
}
* it needs to be recalculated for the next packet. */
tkey->rx_phase1_done = 0;
}
+#ifdef CONFIG_LIB80211_DEBUG
if (net_ratelimit()) {
printk(KERN_DEBUG "TKIP: ICV error detected: STA="
"%pM\n", hdr->addr2);
}
+#endif
tkey->dot11RSNAStatsTKIPICVErrors++;
return -5;
}
if (err)
return err;
+ if (!drv->ops->get_mesh_params) {
+ err = -EOPNOTSUPP;
+ goto out;
+ }
+
/* Get the mesh params */
rtnl_lock();
err = drv->ops->get_mesh_params(&drv->wiphy, dev, &cur_params);
if (err)
return err;
+ if (!drv->ops->set_mesh_params) {
+ err = -EOPNOTSUPP;
+ goto out;
+ }
+
/* This makes sure that there aren't more than 32 mesh config
* parameters (otherwise our bitfield scheme would not work.) */
BUILD_BUG_ON(NL80211_MESHCONF_ATTR_MAX > 32);
err = drv->ops->set_mesh_params(&drv->wiphy, dev, &cfg, mask);
rtnl_unlock();
+ out:
/* cleanup */
cfg80211_put_dev(drv);
dev_put(dev);
schedule_work(&net->xfrm.state_hash_work);
}
+static void xfrm_state_look_at(struct xfrm_policy *pol, struct xfrm_state *x,
+ struct flowi *fl, unsigned short family,
+ xfrm_address_t *daddr, xfrm_address_t *saddr,
+ struct xfrm_state **best, int *acq_in_progress,
+ int *error)
+{
+ /* Resolution logic:
+ * 1. There is a valid state with matching selector. Done.
+ * 2. Valid state with inappropriate selector. Skip.
+ *
+ * Entering area of "sysdeps".
+ *
+ * 3. If state is not valid, selector is temporary, it selects
+ * only session which triggered previous resolution. Key
+ * manager will do something to install a state with proper
+ * selector.
+ */
+ if (x->km.state == XFRM_STATE_VALID) {
+ if ((x->sel.family &&
+ !xfrm_selector_match(&x->sel, fl, x->sel.family)) ||
+ !security_xfrm_state_pol_flow_match(x, pol, fl))
+ return;
+
+ if (!*best ||
+ (*best)->km.dying > x->km.dying ||
+ ((*best)->km.dying == x->km.dying &&
+ (*best)->curlft.add_time < x->curlft.add_time))
+ *best = x;
+ } else if (x->km.state == XFRM_STATE_ACQ) {
+ *acq_in_progress = 1;
+ } else if (x->km.state == XFRM_STATE_ERROR ||
+ x->km.state == XFRM_STATE_EXPIRED) {
+ if (xfrm_selector_match(&x->sel, fl, x->sel.family) &&
+ security_xfrm_state_pol_flow_match(x, pol, fl))
+ *error = -ESRCH;
+ }
+}
+
struct xfrm_state *
xfrm_state_find(xfrm_address_t *daddr, xfrm_address_t *saddr,
struct flowi *fl, struct xfrm_tmpl *tmpl,
struct xfrm_policy *pol, int *err,
unsigned short family)
{
+ static xfrm_address_t saddr_wildcard = { };
struct net *net = xp_net(pol);
unsigned int h;
struct hlist_node *entry;
xfrm_state_addr_check(x, daddr, saddr, family) &&
tmpl->mode == x->props.mode &&
tmpl->id.proto == x->id.proto &&
- (tmpl->id.spi == x->id.spi || !tmpl->id.spi)) {
- /* Resolution logic:
- 1. There is a valid state with matching selector.
- Done.
- 2. Valid state with inappropriate selector. Skip.
-
- Entering area of "sysdeps".
-
- 3. If state is not valid, selector is temporary,
- it selects only session which triggered
- previous resolution. Key manager will do
- something to install a state with proper
- selector.
- */
- if (x->km.state == XFRM_STATE_VALID) {
- if ((x->sel.family && !xfrm_selector_match(&x->sel, fl, x->sel.family)) ||
- !security_xfrm_state_pol_flow_match(x, pol, fl))
- continue;
- if (!best ||
- best->km.dying > x->km.dying ||
- (best->km.dying == x->km.dying &&
- best->curlft.add_time < x->curlft.add_time))
- best = x;
- } else if (x->km.state == XFRM_STATE_ACQ) {
- acquire_in_progress = 1;
- } else if (x->km.state == XFRM_STATE_ERROR ||
- x->km.state == XFRM_STATE_EXPIRED) {
- if (xfrm_selector_match(&x->sel, fl, x->sel.family) &&
- security_xfrm_state_pol_flow_match(x, pol, fl))
- error = -ESRCH;
- }
- }
+ (tmpl->id.spi == x->id.spi || !tmpl->id.spi))
+ xfrm_state_look_at(pol, x, fl, family, daddr, saddr,
+ &best, &acquire_in_progress, &error);
+ }
+ if (best)
+ goto found;
+
+ h = xfrm_dst_hash(net, daddr, &saddr_wildcard, tmpl->reqid, family);
+ hlist_for_each_entry(x, entry, net->xfrm.state_bydst+h, bydst) {
+ if (x->props.family == family &&
+ x->props.reqid == tmpl->reqid &&
+ !(x->props.flags & XFRM_STATE_WILDRECV) &&
+ xfrm_state_addr_check(x, daddr, saddr, family) &&
+ tmpl->mode == x->props.mode &&
+ tmpl->id.proto == x->id.proto &&
+ (tmpl->id.spi == x->id.spi || !tmpl->id.spi))
+ xfrm_state_look_at(pol, x, fl, family, daddr, saddr,
+ &best, &acquire_in_progress, &error);
}
+found:
x = best;
if (!x && !error && !acquire_in_progress) {
if (tmpl->id.spi &&
#include <time.h>
#include <unistd.h>
#include <sys/stat.h>
+#include <sys/time.h>
#define LKC_DIRECT_LINK
#include "lkc.h"
input_mode = set_yes;
break;
case 'r':
+ {
+ struct timeval now;
+ unsigned int seed;
+
+ /*
+ * Use microseconds derived seed,
+ * compensate for systems where it may be zero
+ */
+ gettimeofday(&now, NULL);
+
+ seed = (unsigned int)((now.tv_sec + 1) * (now.tv_usec + 1));
+ srand(seed);
+
input_mode = set_random;
- srand(time(NULL));
break;
+ }
case 'h':
printf(_("See README for usage info\n"));
exit(0);
default:
continue;
}
- if (!sym_is_choice(sym) || mode != def_random)
+ if (!(sym_is_choice(sym) && mode == def_random))
sym->flags |= SYMBOL_DEF_USER;
break;
default:
if (mode != def_random)
return;
-
+ /*
+ * We have different type of choice blocks.
+ * If curr.tri equal to mod then we can select several
+ * choice symbols in one block.
+ * In this case we do nothing.
+ * If curr.tri equal yes then only one symbol can be
+ * selected in a choice block and we set it to yes,
+ * and the rest to no.
+ */
for_all_symbols(i, csym) {
if (sym_has_value(csym) || !sym_is_choice(csym))
continue;
sym_calc_value(csym);
+
+ if (csym->curr.tri != yes)
+ continue;
+
prop = sym_get_choice_prop(csym);
- def = -1;
- while (1) {
- cnt = 0;
- expr_list_for_each_sym(prop->expr, e, sym) {
- if (sym->visible == no)
- continue;
- if (def == cnt++) {
- csym->def[S_DEF_USER].val = sym;
- break;
- }
+
+ /* count entries in choice block */
+ cnt = 0;
+ expr_list_for_each_sym(prop->expr, e, sym)
+ cnt++;
+
+ /*
+ * find a random value and set it to yes,
+ * set the rest to no so we have only one set
+ */
+ def = (rand() % cnt);
+
+ cnt = 0;
+ expr_list_for_each_sym(prop->expr, e, sym) {
+ if (def == cnt++) {
+ sym->def[S_DEF_USER].tri = yes;
+ csym->def[S_DEF_USER].val = sym;
+ }
+ else {
+ sym->def[S_DEF_USER].tri = no;
}
- if (def >= 0 || cnt < 2)
- break;
- def = (rand() % cnt) + 1;
}
csym->flags |= SYMBOL_DEF_USER;
+ /* clear VALID to get value calculated */
+ csym->flags &= ~(SYMBOL_VALID);
}
}
source "sound/arm/Kconfig"
+source "sound/atmel/Kconfig"
+
source "sound/spi/Kconfig"
source "sound/mips/Kconfig"
obj-$(CONFIG_SOUND_PRIME) += oss/
obj-$(CONFIG_DMASOUND) += oss/
obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ sh/ synth/ usb/ \
- sparc/ spi/ parisc/ pcmcia/ mips/ soc/
+ sparc/ spi/ parisc/ pcmcia/ mips/ soc/ atmel/
obj-$(CONFIG_SND_AOA) += aoa/
# This one must be compilable even if sound is configured out
void (*set_headphone)(struct gpio_runtime *rt, int on);
void (*set_speakers)(struct gpio_runtime *rt, int on);
void (*set_lineout)(struct gpio_runtime *rt, int on);
+ void (*set_master)(struct gpio_runtime *rt, int on);
int (*get_headphone)(struct gpio_runtime *rt);
int (*get_speakers)(struct gpio_runtime *rt);
int (*get_lineout)(struct gpio_runtime *rt);
+ int (*get_master)(struct gpio_runtime *rt);
void (*set_hw_reset)(struct gpio_runtime *rt, int on);
/* cannot be EEXIST due to usage in aoa_fabric_register */
return -EBUSY;
- alsa_card = snd_card_new(index, name, mod, sizeof(struct aoa_card));
- if (!alsa_card)
- return -ENOMEM;
+ err = snd_card_create(index, name, mod, sizeof(struct aoa_card),
+ &alsa_card);
+ if (err < 0)
+ return err;
aoa_card = alsa_card->private_data;
aoa_card->alsa_card = alsa_card;
alsa_card->dev = dev;
#include <linux/interrupt.h>
#include "../aoa.h"
-/* TODO: these are 20 global variables
+/* TODO: these are lots of global variables
* that aren't used on most machines...
* Move them into a dynamically allocated
* structure and use that.
/* these are the GPIO numbers (register addresses as offsets into
* the GPIO space) */
static int headphone_mute_gpio;
+static int master_mute_gpio;
static int amp_mute_gpio;
static int lineout_mute_gpio;
static int hw_reset_gpio;
/* see the SWITCH_GPIO macro */
static int headphone_mute_gpio_activestate;
+static int master_mute_gpio_activestate;
static int amp_mute_gpio_activestate;
static int lineout_mute_gpio_activestate;
static int hw_reset_gpio_activestate;
FTR_GPIO(headphone, 0);
FTR_GPIO(amp, 1);
FTR_GPIO(lineout, 2);
+FTR_GPIO(master, 3);
static void ftr_gpio_set_hw_reset(struct gpio_runtime *rt, int on)
{
hw_reset_gpio, v);
}
+static struct gpio_methods methods;
+
static void ftr_gpio_all_amps_off(struct gpio_runtime *rt)
{
int saved;
ftr_gpio_set_headphone(rt, 0);
ftr_gpio_set_amp(rt, 0);
ftr_gpio_set_lineout(rt, 0);
+ if (methods.set_master)
+ ftr_gpio_set_master(rt, 0);
rt->implementation_private = saved;
}
ftr_gpio_set_headphone(rt, (s>>0)&1);
ftr_gpio_set_amp(rt, (s>>1)&1);
ftr_gpio_set_lineout(rt, (s>>2)&1);
+ if (methods.set_master)
+ ftr_gpio_set_master(rt, (s>>3)&1);
}
static void ftr_handle_notify(struct work_struct *work)
get_gpio("hw-reset", "audio-hw-reset",
&hw_reset_gpio,
&hw_reset_gpio_activestate);
+ if (get_gpio("master-mute", NULL,
+ &master_mute_gpio,
+ &master_mute_gpio_activestate)) {
+ methods.set_master = ftr_gpio_set_master;
+ methods.get_master = ftr_gpio_get_master;
+ }
headphone_detect_node = get_gpio("headphone-detect", NULL,
&headphone_detect_gpio,
/*
- * Apple Onboard Audio driver -- layout fabric
+ * Apple Onboard Audio driver -- layout/machine id fabric
*
- * Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
+ * Copyright 2006-2008 Johannes Berg <johannes@sipsolutions.net>
*
* GPL v2, can be found in COPYING.
*
*
- * This fabric module looks for sound codecs
- * based on the layout-id property in the device tree.
- *
+ * This fabric module looks for sound codecs based on the
+ * layout-id or device-id property in the device tree.
*/
-
#include <asm/prom.h>
#include <linux/list.h>
#include <linux/module.h>
#define LAYOUT_FLAG_COMBO_LINEOUT_SPDIF (1<<0)
struct layout {
- unsigned int layout_id;
+ unsigned int layout_id, device_id;
struct codec_connect_info codecs[MAX_CODECS_PER_BUS];
int flags;
MODULE_ALIAS("sound-layout-98");
MODULE_ALIAS("sound-layout-100");
+MODULE_ALIAS("aoa-device-id-14");
+MODULE_ALIAS("aoa-device-id-22");
+MODULE_ALIAS("aoa-device-id-35");
+
/* onyx with all but microphone connected */
static struct codec_connection onyx_connections_nomic[] = {
{
.connections = onyx_connections_noheadphones,
},
},
+ /* PowerMac3,4 */
+ { .device_id = 14,
+ .codecs[0] = {
+ .name = "tas",
+ .connections = tas_connections_noline,
+ },
+ },
+ /* PowerMac3,6 */
+ { .device_id = 22,
+ .codecs[0] = {
+ .name = "tas",
+ .connections = tas_connections_all,
+ },
+ },
+ /* PowerBook5,2 */
+ { .device_id = 35,
+ .codecs[0] = {
+ .name = "tas",
+ .connections = tas_connections_all,
+ },
+ },
{}
};
struct layout *l;
l = layouts;
- while (l->layout_id) {
+ while (l->codecs[0].name) {
if (l->layout_id == id)
return l;
l++;
return NULL;
}
+static struct layout *find_layout_by_device(unsigned int id)
+{
+ struct layout *l;
+
+ l = layouts;
+ while (l->codecs[0].name) {
+ if (l->device_id == id)
+ return l;
+ l++;
+ }
+ return NULL;
+}
+
static void use_layout(struct layout *l)
{
int i;
struct snd_kcontrol *headphone_ctrl;
struct snd_kcontrol *lineout_ctrl;
struct snd_kcontrol *speaker_ctrl;
+ struct snd_kcontrol *master_ctrl;
struct snd_kcontrol *headphone_detected_ctrl;
struct snd_kcontrol *lineout_detected_ctrl;
AMP_CONTROL(headphone, "Headphone Switch");
AMP_CONTROL(speakers, "Speakers Switch");
AMP_CONTROL(lineout, "Line-Out Switch");
+AMP_CONTROL(master, "Master Switch");
static int detect_choice_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
lineout = codec->gpio->methods->get_detect(codec->gpio,
AOA_NOTIFY_LINE_OUT);
+ if (codec->gpio->methods->set_master) {
+ ctl = snd_ctl_new1(&master_ctl, codec->gpio);
+ ldev->master_ctrl = ctl;
+ aoa_snd_ctl_add(ctl);
+ }
while (cc->connected) {
if (cc->connected & CC_SPEAKERS) {
if (headphones <= 0 && lineout <= 0)
static int aoa_fabric_layout_probe(struct soundbus_dev *sdev)
{
struct device_node *sound = NULL;
- const unsigned int *layout_id;
- struct layout *layout;
+ const unsigned int *id;
+ struct layout *layout = NULL;
struct layout_dev *ldev = NULL;
int err;
if (sound->type && strcasecmp(sound->type, "soundchip") == 0)
break;
}
- if (!sound) return -ENODEV;
+ if (!sound)
+ return -ENODEV;
- layout_id = of_get_property(sound, "layout-id", NULL);
- if (!layout_id)
- goto outnodev;
- printk(KERN_INFO "snd-aoa-fabric-layout: found bus with layout %d\n",
- *layout_id);
+ id = of_get_property(sound, "layout-id", NULL);
+ if (id) {
+ layout = find_layout_by_id(*id);
+ } else {
+ id = of_get_property(sound, "device-id", NULL);
+ if (id)
+ layout = find_layout_by_device(*id);
+ }
- layout = find_layout_by_id(*layout_id);
if (!layout) {
printk(KERN_ERR "snd-aoa-fabric-layout: unknown layout\n");
goto outnodev;
ldev->layout = layout;
ldev->gpio.node = sound->parent;
switch (layout->layout_id) {
+ case 0: /* anything with device_id, not layout_id */
case 41: /* that unknown machine no one seems to have */
case 51: /* PowerBook5,4 */
case 58: /* Mac Mini */
/*
* i2sbus driver
*
- * Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
+ * Copyright 2006-2008 Johannes Berg <johannes@sipsolutions.net>
*
* GPL v2, can be found in COPYING.
*/
}
}
if (i == 1) {
- const u32 *layout_id =
- of_get_property(sound, "layout-id", NULL);
- if (layout_id) {
- layout = *layout_id;
+ const u32 *id = of_get_property(sound, "layout-id", NULL);
+
+ if (id) {
+ layout = *id;
snprintf(dev->sound.modalias, 32,
"sound-layout-%d", layout);
ok = 1;
+ } else {
+ id = of_get_property(sound, "device-id", NULL);
+ /*
+ * We probably cannot handle all device-id machines,
+ * so restrict to those we do handle for now.
+ */
+ if (id && (*id == 22 || *id == 14 || *id == 35)) {
+ snprintf(dev->sound.modalias, 32,
+ "aoa-device-id-%d", *id);
+ ok = 1;
+ layout = -1;
+ }
}
}
/* for the time being, until we can handle non-layout-id
if SND_ARM
-config SND_SA11XX_UDA1341
- tristate "SA11xx UDA1341TS driver (iPaq H3600)"
- depends on ARCH_SA1100 && L3
- select SND_PCM
- help
- Say Y here if you have a Compaq iPaq H3x00 handheld computer
- and want to use its Philips UDA 1341 audio chip.
-
- To compile this driver as a module, choose M here: the module
- will be called snd-sa11xx-uda1341.
-
config SND_ARMAACI
tristate "ARM PrimeCell PL041 AC Link support"
depends on ARM_AMBA
# Makefile for ALSA
#
-obj-$(CONFIG_SND_SA11XX_UDA1341) += snd-sa11xx-uda1341.o
-snd-sa11xx-uda1341-objs := sa11xx-uda1341.o
-
obj-$(CONFIG_SND_ARMAACI) += snd-aaci.o
snd-aaci-objs := aaci.o devdma.o
{
struct aaci *aaci;
struct snd_card *card;
+ int err;
- card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
- THIS_MODULE, sizeof(struct aaci));
- if (card == NULL)
+ err = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
+ THIS_MODULE, sizeof(struct aaci), &card);
+ if (err < 0)
return NULL;
card->private_free = aaci_free_card;
static volatile long gsr_bits;
static struct clk *ac97_clk;
static struct clk *ac97conf_clk;
+static int reset_gpio;
/*
* Beware PXA27x bugs:
* 1 jiffy timeout if interrupt never comes).
*/
+enum {
+ RESETGPIO_FORCE_HIGH,
+ RESETGPIO_FORCE_LOW,
+ RESETGPIO_NORMAL_ALTFUNC
+};
+
+/**
+ * set_resetgpio_mode - computes and sets the AC97_RESET gpio mode on PXA
+ * @mode: chosen action
+ *
+ * As the PXA27x CPUs suffer from a AC97 bug, a manual control of the reset line
+ * must be done to insure proper work of AC97 reset line. This function
+ * computes the correct gpio_mode for further use by reset functions, and
+ * applied the change through pxa_gpio_mode.
+ */
+static void set_resetgpio_mode(int resetgpio_action)
+{
+ int mode = 0;
+
+ if (reset_gpio)
+ switch (resetgpio_action) {
+ case RESETGPIO_NORMAL_ALTFUNC:
+ if (reset_gpio == 113)
+ mode = 113 | GPIO_OUT | GPIO_DFLT_LOW;
+ if (reset_gpio == 95)
+ mode = 95 | GPIO_ALT_FN_1_OUT;
+ break;
+ case RESETGPIO_FORCE_LOW:
+ mode = reset_gpio | GPIO_OUT | GPIO_DFLT_LOW;
+ break;
+ case RESETGPIO_FORCE_HIGH:
+ mode = reset_gpio | GPIO_OUT | GPIO_DFLT_HIGH;
+ break;
+ };
+
+ if (mode)
+ pxa_gpio_mode(mode);
+}
+
unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
{
unsigned short val = -1;
/* warm reset broken on Bulverde,
so manually keep AC97 reset high */
- pxa_gpio_mode(113 | GPIO_OUT | GPIO_DFLT_HIGH);
+ set_resetgpio_mode(RESETGPIO_FORCE_HIGH);
udelay(10);
GCR |= GCR_WARM_RST;
- pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
+ set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC);
udelay(500);
}
pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD);
}
if (cpu_is_pxa27x()) {
- /* Use GPIO 113 as AC97 Reset on Bulverde */
- pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
+ /* Use GPIO 113 or 95 as AC97 Reset on Bulverde */
+ set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC);
}
clk_enable(ac97_clk);
return 0;
int __devinit pxa2xx_ac97_hw_probe(struct platform_device *dev)
{
int ret;
+ struct pxa2xx_ac97_platform_data *pdata = dev->dev.platform_data;
+
+ if (pdata) {
+ switch (pdata->reset_gpio) {
+ case 95:
+ case 113:
+ reset_gpio = pdata->reset_gpio;
+ break;
+ case 0:
+ reset_gpio = 113;
+ break;
+ case -1:
+ break;
+ default:
+ dev_err(&dev->dev, "Invalid reset GPIO %d\n",
+ pdata->reset_gpio);
+ }
+ } else {
+ if (cpu_is_pxa27x())
+ reset_gpio = 113;
+ }
if (cpu_is_pxa25x() || cpu_is_pxa27x()) {
pxa_gpio_mode(GPIO31_SYNC_AC97_MD);
if (cpu_is_pxa27x()) {
/* Use GPIO 113 as AC97 Reset on Bulverde */
- pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
+ set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC);
ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK");
if (IS_ERR(ac97conf_clk)) {
ret = PTR_ERR(ac97conf_clk);
struct snd_ac97_template ac97_template;
int ret;
- ret = -ENOMEM;
- card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
- THIS_MODULE, 0);
- if (!card)
+ ret = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
+ THIS_MODULE, 0, &card);
+ if (ret < 0)
goto err;
card->dev = &dev->dev;
+++ /dev/null
-/*
- * Driver for Philips UDA1341TS on Compaq iPAQ H3600 soundcard
- * Copyright (C) 2002 Tomas Kasparek <tomas.kasparek@seznam.cz>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License.
- *
- * History:
- *
- * 2002-03-13 Tomas Kasparek initial release - based on h3600-uda1341.c from OSS
- * 2002-03-20 Tomas Kasparek playback over ALSA is working
- * 2002-03-28 Tomas Kasparek playback over OSS emulation is working
- * 2002-03-29 Tomas Kasparek basic capture is working (native ALSA)
- * 2002-03-29 Tomas Kasparek capture is working (OSS emulation)
- * 2002-04-04 Tomas Kasparek better rates handling (allow non-standard rates)
- * 2003-02-14 Brian Avery fixed full duplex mode, other updates
- * 2003-02-20 Tomas Kasparek merged updates by Brian (except HAL)
- * 2003-04-19 Jaroslav Kysela recoded DMA stuff to follow 2.4.18rmk3-hh24 kernel
- * working suspend and resume
- * 2003-04-28 Tomas Kasparek updated work by Jaroslav to compile it under 2.5.x again
- * merged HAL layer (patches from Brian)
- */
-
-/***************************************************************************************************
-*
-* To understand what Alsa Drivers should be doing look at "Writing an Alsa Driver" by Takashi Iwai
-* available in the Alsa doc section on the website
-*
-* A few notes to make things clearer. The UDA1341 is hooked up to Serial port 4 on the SA1100.
-* We are using SSP mode to talk to the UDA1341. The UDA1341 bit & wordselect clocks are generated
-* by this UART. Unfortunately, the clock only runs if the transmit buffer has something in it.
-* So, if we are just recording, we feed the transmit DMA stream a bunch of 0x0000 so that the
-* transmit buffer is full and the clock keeps going. The zeroes come from FLUSH_BASE_PHYS which
-* is a mem loc that always decodes to 0's w/ no off chip access.
-*
-* Some alsa terminology:
-* frame => num_channels * sample_size e.g stereo 16 bit is 2 * 16 = 32 bytes
-* period => the least number of bytes that will generate an interrupt e.g. we have a 1024 byte
-* buffer and 4 periods in the runtime structure this means we'll get an int every 256
-* bytes or 4 times per buffer.
-* A number of the sizes are in frames rather than bytes, use frames_to_bytes and
-* bytes_to_frames to convert. The easiest way to tell the units is to look at the
-* type i.e. runtime-> buffer_size is in frames and its type is snd_pcm_uframes_t
-*
-* Notes about the pointer fxn:
-* The pointer fxn needs to return the offset into the dma buffer in frames.
-* Interrupts must be blocked before calling the dma_get_pos fxn to avoid race with interrupts.
-*
-* Notes about pause/resume
-* Implementing this would be complicated so it's skipped. The problem case is:
-* A full duplex connection is going, then play is paused. At this point you need to start xmitting
-* 0's to keep the record active which means you cant just freeze the dma and resume it later you'd
-* need to save off the dma info, and restore it properly on a resume. Yeach!
-*
-* Notes about transfer methods:
-* The async write calls fail. I probably need to implement something else to support them?
-*
-***************************************************************************************************/
-
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/init.h>
-#include <linux/err.h>
-#include <linux/platform_device.h>
-#include <linux/errno.h>
-#include <linux/ioctl.h>
-#include <linux/delay.h>
-#include <linux/slab.h>
-
-#ifdef CONFIG_PM
-#include <linux/pm.h>
-#endif
-
-#include <mach/hardware.h>
-#include <mach/h3600.h>
-#include <asm/mach-types.h>
-#include <asm/dma.h>
-
-#include <sound/core.h>
-#include <sound/pcm.h>
-#include <sound/initval.h>
-
-#include <linux/l3/l3.h>
-
-#undef DEBUG_MODE
-#undef DEBUG_FUNCTION_NAMES
-#include <sound/uda1341.h>
-
-/*
- * FIXME: Is this enough as autodetection of 2.4.X-rmkY-hhZ kernels?
- * We use DMA stuff from 2.4.18-rmk3-hh24 here to be able to compile this
- * module for Familiar 0.6.1
- */
-
-/* {{{ Type definitions */
-
-MODULE_AUTHOR("Tomas Kasparek <tomas.kasparek@seznam.cz>");
-MODULE_LICENSE("GPL");
-MODULE_DESCRIPTION("SA1100/SA1111 + UDA1341TS driver for ALSA");
-MODULE_SUPPORTED_DEVICE("{{UDA1341,iPAQ H3600 UDA1341TS}}");
-
-static char *id; /* ID for this card */
-
-module_param(id, charp, 0444);
-MODULE_PARM_DESC(id, "ID string for SA1100/SA1111 + UDA1341TS soundcard.");
-
-struct audio_stream {
- char *id; /* identification string */
- int stream_id; /* numeric identification */
- dma_device_t dma_dev; /* device identifier for DMA */
-#ifdef HH_VERSION
- dmach_t dmach; /* dma channel identification */
-#else
- dma_regs_t *dma_regs; /* points to our DMA registers */
-#endif
- unsigned int active:1; /* we are using this stream for transfer now */
- int period; /* current transfer period */
- int periods; /* current count of periods registerd in the DMA engine */
- int tx_spin; /* are we recoding - flag used to do DMA trans. for sync */
- unsigned int old_offset;
- spinlock_t dma_lock; /* for locking in DMA operations (see dma-sa1100.c in the kernel) */
- struct snd_pcm_substream *stream;
-};
-
-struct sa11xx_uda1341 {
- struct snd_card *card;
- struct l3_client *uda1341;
- struct snd_pcm *pcm;
- long samplerate;
- struct audio_stream s[2]; /* playback & capture */
-};
-
-static unsigned int rates[] = {
- 8000, 10666, 10985, 14647,
- 16000, 21970, 22050, 24000,
- 29400, 32000, 44100, 48000,
-};
-
-static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
- .count = ARRAY_SIZE(rates),
- .list = rates,
- .mask = 0,
-};
-
-static struct platform_device *device;
-
-/* }}} */
-
-/* {{{ Clock and sample rate stuff */
-
-/*
- * Stop-gap solution until rest of hh.org HAL stuff is merged.
- */
-#define GPIO_H3600_CLK_SET0 GPIO_GPIO (12)
-#define GPIO_H3600_CLK_SET1 GPIO_GPIO (13)
-
-#ifdef CONFIG_SA1100_H3XXX
-#define clr_sa11xx_uda1341_egpio(x) clr_h3600_egpio(x)
-#define set_sa11xx_uda1341_egpio(x) set_h3600_egpio(x)
-#else
-#error This driver could serve H3x00 handhelds only!
-#endif
-
-static void sa11xx_uda1341_set_audio_clock(long val)
-{
- switch (val) {
- case 24000: case 32000: case 48000: /* 00: 12.288 MHz */
- GPCR = GPIO_H3600_CLK_SET0 | GPIO_H3600_CLK_SET1;
- break;
-
- case 22050: case 29400: case 44100: /* 01: 11.2896 MHz */
- GPSR = GPIO_H3600_CLK_SET0;
- GPCR = GPIO_H3600_CLK_SET1;
- break;
-
- case 8000: case 10666: case 16000: /* 10: 4.096 MHz */
- GPCR = GPIO_H3600_CLK_SET0;
- GPSR = GPIO_H3600_CLK_SET1;
- break;
-
- case 10985: case 14647: case 21970: /* 11: 5.6245 MHz */
- GPSR = GPIO_H3600_CLK_SET0 | GPIO_H3600_CLK_SET1;
- break;
- }
-}
-
-static void sa11xx_uda1341_set_samplerate(struct sa11xx_uda1341 *sa11xx_uda1341, long rate)
-{
- int clk_div = 0;
- int clk=0;
-
- /* We don't want to mess with clocks when frames are in flight */
- Ser4SSCR0 &= ~SSCR0_SSE;
- /* wait for any frame to complete */
- udelay(125);
-
- /*
- * We have the following clock sources:
- * 4.096 MHz, 5.6245 MHz, 11.2896 MHz, 12.288 MHz
- * Those can be divided either by 256, 384 or 512.
- * This makes up 12 combinations for the following samplerates...
- */
- if (rate >= 48000)
- rate = 48000;
- else if (rate >= 44100)
- rate = 44100;
- else if (rate >= 32000)
- rate = 32000;
- else if (rate >= 29400)
- rate = 29400;
- else if (rate >= 24000)
- rate = 24000;
- else if (rate >= 22050)
- rate = 22050;
- else if (rate >= 21970)
- rate = 21970;
- else if (rate >= 16000)
- rate = 16000;
- else if (rate >= 14647)
- rate = 14647;
- else if (rate >= 10985)
- rate = 10985;
- else if (rate >= 10666)
- rate = 10666;
- else
- rate = 8000;
-
- /* Set the external clock generator */
-
- sa11xx_uda1341_set_audio_clock(rate);
-
- /* Select the clock divisor */
- switch (rate) {
- case 8000:
- case 10985:
- case 22050:
- case 24000:
- clk = F512;
- clk_div = SSCR0_SerClkDiv(16);
- break;
- case 16000:
- case 21970:
- case 44100:
- case 48000:
- clk = F256;
- clk_div = SSCR0_SerClkDiv(8);
- break;
- case 10666:
- case 14647:
- case 29400:
- case 32000:
- clk = F384;
- clk_div = SSCR0_SerClkDiv(12);
- break;
- }
-
- /* FMT setting should be moved away when other FMTs are added (FIXME) */
- l3_command(sa11xx_uda1341->uda1341, CMD_FORMAT, (void *)LSB16);
-
- l3_command(sa11xx_uda1341->uda1341, CMD_FS, (void *)clk);
- Ser4SSCR0 = (Ser4SSCR0 & ~0xff00) + clk_div + SSCR0_SSE;
- sa11xx_uda1341->samplerate = rate;
-}
-
-/* }}} */
-
-/* {{{ HW init and shutdown */
-
-static void sa11xx_uda1341_audio_init(struct sa11xx_uda1341 *sa11xx_uda1341)
-{
- unsigned long flags;
-
- /* Setup DMA stuff */
- sa11xx_uda1341->s[SNDRV_PCM_STREAM_PLAYBACK].id = "UDA1341 out";
- sa11xx_uda1341->s[SNDRV_PCM_STREAM_PLAYBACK].stream_id = SNDRV_PCM_STREAM_PLAYBACK;
- sa11xx_uda1341->s[SNDRV_PCM_STREAM_PLAYBACK].dma_dev = DMA_Ser4SSPWr;
-
- sa11xx_uda1341->s[SNDRV_PCM_STREAM_CAPTURE].id = "UDA1341 in";
- sa11xx_uda1341->s[SNDRV_PCM_STREAM_CAPTURE].stream_id = SNDRV_PCM_STREAM_CAPTURE;
- sa11xx_uda1341->s[SNDRV_PCM_STREAM_CAPTURE].dma_dev = DMA_Ser4SSPRd;
-
- /* Initialize the UDA1341 internal state */
-
- /* Setup the uarts */
- local_irq_save(flags);
- GAFR |= (GPIO_SSP_CLK);
- GPDR &= ~(GPIO_SSP_CLK);
- Ser4SSCR0 = 0;
- Ser4SSCR0 = SSCR0_DataSize(16) + SSCR0_TI + SSCR0_SerClkDiv(8);
- Ser4SSCR1 = SSCR1_SClkIactL + SSCR1_SClk1P + SSCR1_ExtClk;
- Ser4SSCR0 |= SSCR0_SSE;
- local_irq_restore(flags);
-
- /* Enable the audio power */
-
- clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_CODEC_NRESET);
- set_sa11xx_uda1341_egpio(IPAQ_EGPIO_AUDIO_ON);
- set_sa11xx_uda1341_egpio(IPAQ_EGPIO_QMUTE);
-
- /* Wait for the UDA1341 to wake up */
- mdelay(1); //FIXME - was removed by Perex - Why?
-
- /* Initialize the UDA1341 internal state */
- l3_open(sa11xx_uda1341->uda1341);
-
- /* external clock configuration (after l3_open - regs must be initialized */
- sa11xx_uda1341_set_samplerate(sa11xx_uda1341, sa11xx_uda1341->samplerate);
-
- /* Wait for the UDA1341 to wake up */
- set_sa11xx_uda1341_egpio(IPAQ_EGPIO_CODEC_NRESET);
- mdelay(1);
-
- /* make the left and right channels unswapped (flip the WS latch) */
- Ser4SSDR = 0;
-
- clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_QMUTE);
-}
-
-static void sa11xx_uda1341_audio_shutdown(struct sa11xx_uda1341 *sa11xx_uda1341)
-{
- /* mute on */
- set_sa11xx_uda1341_egpio(IPAQ_EGPIO_QMUTE);
-
- /* disable the audio power and all signals leading to the audio chip */
- l3_close(sa11xx_uda1341->uda1341);
- Ser4SSCR0 = 0;
- clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_CODEC_NRESET);
-
- /* power off and mute off */
- /* FIXME - is muting off necesary??? */
-
- clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_AUDIO_ON);
- clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_QMUTE);
-}
-
-/* }}} */
-
-/* {{{ DMA staff */
-
-/*
- * these are the address and sizes used to fill the xmit buffer
- * so we can get a clock in record only mode
- */
-#define FORCE_CLOCK_ADDR (dma_addr_t)FLUSH_BASE_PHYS
-#define FORCE_CLOCK_SIZE 4096 // was 2048
-
-// FIXME Why this value exactly - wrote comment
-#define DMA_BUF_SIZE 8176 /* <= MAX_DMA_SIZE from asm/arch-sa1100/dma.h */
-
-#ifdef HH_VERSION
-
-static int audio_dma_request(struct audio_stream *s, void (*callback)(void *, int))
-{
- int ret;
-
- ret = sa1100_request_dma(&s->dmach, s->id, s->dma_dev);
- if (ret < 0) {
- printk(KERN_ERR "unable to grab audio dma 0x%x\n", s->dma_dev);
- return ret;
- }
- sa1100_dma_set_callback(s->dmach, callback);
- return 0;
-}
-
-static inline void audio_dma_free(struct audio_stream *s)
-{
- sa1100_free_dma(s->dmach);
- s->dmach = -1;
-}
-
-#else
-
-static int audio_dma_request(struct audio_stream *s, void (*callback)(void *))
-{
- int ret;
-
- ret = sa1100_request_dma(s->dma_dev, s->id, callback, s, &s->dma_regs);
- if (ret < 0)
- printk(KERN_ERR "unable to grab audio dma 0x%x\n", s->dma_dev);
- return ret;
-}
-
-static void audio_dma_free(struct audio_stream *s)
-{
- sa1100_free_dma(s->dma_regs);
- s->dma_regs = 0;
-}
-
-#endif
-
-static u_int audio_get_dma_pos(struct audio_stream *s)
-{
- struct snd_pcm_substream *substream = s->stream;
- struct snd_pcm_runtime *runtime = substream->runtime;
- unsigned int offset;
- unsigned long flags;
- dma_addr_t addr;
-
- // this must be called w/ interrupts locked out see dma-sa1100.c in the kernel
- spin_lock_irqsave(&s->dma_lock, flags);
-#ifdef HH_VERSION
- sa1100_dma_get_current(s->dmach, NULL, &addr);
-#else
- addr = sa1100_get_dma_pos((s)->dma_regs);
-#endif
- offset = addr - runtime->dma_addr;
- spin_unlock_irqrestore(&s->dma_lock, flags);
-
- offset = bytes_to_frames(runtime,offset);
- if (offset >= runtime->buffer_size)
- offset = 0;
-
- return offset;
-}
-
-/*
- * this stops the dma and clears the dma ptrs
- */
-static void audio_stop_dma(struct audio_stream *s)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&s->dma_lock, flags);
- s->active = 0;
- s->period = 0;
- /* this stops the dma channel and clears the buffer ptrs */
-#ifdef HH_VERSION
- sa1100_dma_flush_all(s->dmach);
-#else
- sa1100_clear_dma(s->dma_regs);
-#endif
- spin_unlock_irqrestore(&s->dma_lock, flags);
-}
-
-static void audio_process_dma(struct audio_stream *s)
-{
- struct snd_pcm_substream *substream = s->stream;
- struct snd_pcm_runtime *runtime;
- unsigned int dma_size;
- unsigned int offset;
- int ret;
-
- /* we are requested to process synchronization DMA transfer */
- if (s->tx_spin) {
- if (snd_BUG_ON(s->stream_id != SNDRV_PCM_STREAM_PLAYBACK))
- return;
- /* fill the xmit dma buffers and return */
-#ifdef HH_VERSION
- sa1100_dma_set_spin(s->dmach, FORCE_CLOCK_ADDR, FORCE_CLOCK_SIZE);
-#else
- while (1) {
- ret = sa1100_start_dma(s->dma_regs, FORCE_CLOCK_ADDR, FORCE_CLOCK_SIZE);
- if (ret)
- return;
- }
-#endif
- return;
- }
-
- /* must be set here - only valid for running streams, not for forced_clock dma fills */
- runtime = substream->runtime;
- while (s->active && s->periods < runtime->periods) {
- dma_size = frames_to_bytes(runtime, runtime->period_size);
- if (s->old_offset) {
- /* a little trick, we need resume from old position */
- offset = frames_to_bytes(runtime, s->old_offset - 1);
- s->old_offset = 0;
- s->periods = 0;
- s->period = offset / dma_size;
- offset %= dma_size;
- dma_size = dma_size - offset;
- if (!dma_size)
- continue; /* special case */
- } else {
- offset = dma_size * s->period;
- snd_BUG_ON(dma_size > DMA_BUF_SIZE);
- }
-#ifdef HH_VERSION
- ret = sa1100_dma_queue_buffer(s->dmach, s, runtime->dma_addr + offset, dma_size);
- if (ret)
- return; //FIXME
-#else
- ret = sa1100_start_dma((s)->dma_regs, runtime->dma_addr + offset, dma_size);
- if (ret) {
- printk(KERN_ERR "audio_process_dma: cannot queue DMA buffer (%i)\n", ret);
- return;
- }
-#endif
-
- s->period++;
- s->period %= runtime->periods;
- s->periods++;
- }
-}
-
-#ifdef HH_VERSION
-static void audio_dma_callback(void *data, int size)
-#else
-static void audio_dma_callback(void *data)
-#endif
-{
- struct audio_stream *s = data;
-
- /*
- * If we are getting a callback for an active stream then we inform
- * the PCM middle layer we've finished a period
- */
- if (s->active)
- snd_pcm_period_elapsed(s->stream);
-
- spin_lock(&s->dma_lock);
- if (!s->tx_spin && s->periods > 0)
- s->periods--;
- audio_process_dma(s);
- spin_unlock(&s->dma_lock);
-}
-
-/* }}} */
-
-/* {{{ PCM setting */
-
-/* {{{ trigger & timer */
-
-static int snd_sa11xx_uda1341_trigger(struct snd_pcm_substream *substream, int cmd)
-{
- struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
- int stream_id = substream->pstr->stream;
- struct audio_stream *s = &chip->s[stream_id];
- struct audio_stream *s1 = &chip->s[stream_id ^ 1];
- int err = 0;
-
- /* note local interrupts are already disabled in the midlevel code */
- spin_lock(&s->dma_lock);
- switch (cmd) {
- case SNDRV_PCM_TRIGGER_START:
- /* now we need to make sure a record only stream has a clock */
- if (stream_id == SNDRV_PCM_STREAM_CAPTURE && !s1->active) {
- /* we need to force fill the xmit DMA with zeros */
- s1->tx_spin = 1;
- audio_process_dma(s1);
- }
- /* this case is when you were recording then you turn on a
- * playback stream so we stop (also clears it) the dma first,
- * clear the sync flag and then we let it turned on
- */
- else {
- s->tx_spin = 0;
- }
-
- /* requested stream startup */
- s->active = 1;
- audio_process_dma(s);
- break;
- case SNDRV_PCM_TRIGGER_STOP:
- /* requested stream shutdown */
- audio_stop_dma(s);
-
- /*
- * now we need to make sure a record only stream has a clock
- * so if we're stopping a playback with an active capture
- * we need to turn the 0 fill dma on for the xmit side
- */
- if (stream_id == SNDRV_PCM_STREAM_PLAYBACK && s1->active) {
- /* we need to force fill the xmit DMA with zeros */
- s->tx_spin = 1;
- audio_process_dma(s);
- }
- /*
- * we killed a capture only stream, so we should also kill
- * the zero fill transmit
- */
- else {
- if (s1->tx_spin) {
- s1->tx_spin = 0;
- audio_stop_dma(s1);
- }
- }
-
- break;
- case SNDRV_PCM_TRIGGER_SUSPEND:
- s->active = 0;
-#ifdef HH_VERSION
- sa1100_dma_stop(s->dmach);
-#else
- //FIXME - DMA API
-#endif
- s->old_offset = audio_get_dma_pos(s) + 1;
-#ifdef HH_VERSION
- sa1100_dma_flush_all(s->dmach);
-#else
- //FIXME - DMA API
-#endif
- s->periods = 0;
- break;
- case SNDRV_PCM_TRIGGER_RESUME:
- s->active = 1;
- s->tx_spin = 0;
- audio_process_dma(s);
- if (stream_id == SNDRV_PCM_STREAM_CAPTURE && !s1->active) {
- s1->tx_spin = 1;
- audio_process_dma(s1);
- }
- break;
- case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
-#ifdef HH_VERSION
- sa1100_dma_stop(s->dmach);
-#else
- //FIXME - DMA API
-#endif
- s->active = 0;
- if (stream_id == SNDRV_PCM_STREAM_PLAYBACK) {
- if (s1->active) {
- s->tx_spin = 1;
- s->old_offset = audio_get_dma_pos(s) + 1;
-#ifdef HH_VERSION
- sa1100_dma_flush_all(s->dmach);
-#else
- //FIXME - DMA API
-#endif
- audio_process_dma(s);
- }
- } else {
- if (s1->tx_spin) {
- s1->tx_spin = 0;
-#ifdef HH_VERSION
- sa1100_dma_flush_all(s1->dmach);
-#else
- //FIXME - DMA API
-#endif
- }
- }
- break;
- case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
- s->active = 1;
- if (s->old_offset) {
- s->tx_spin = 0;
- audio_process_dma(s);
- break;
- }
- if (stream_id == SNDRV_PCM_STREAM_CAPTURE && !s1->active) {
- s1->tx_spin = 1;
- audio_process_dma(s1);
- }
-#ifdef HH_VERSION
- sa1100_dma_resume(s->dmach);
-#else
- //FIXME - DMA API
-#endif
- break;
- default:
- err = -EINVAL;
- break;
- }
- spin_unlock(&s->dma_lock);
- return err;
-}
-
-static int snd_sa11xx_uda1341_prepare(struct snd_pcm_substream *substream)
-{
- struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
- struct snd_pcm_runtime *runtime = substream->runtime;
- struct audio_stream *s = &chip->s[substream->pstr->stream];
-
- /* set requested samplerate */
- sa11xx_uda1341_set_samplerate(chip, runtime->rate);
-
- /* set requestd format when available */
- /* set FMT here !!! FIXME */
-
- s->period = 0;
- s->periods = 0;
-
- return 0;
-}
-
-static snd_pcm_uframes_t snd_sa11xx_uda1341_pointer(struct snd_pcm_substream *substream)
-{
- struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
- return audio_get_dma_pos(&chip->s[substream->pstr->stream]);
-}
-
-/* }}} */
-
-static struct snd_pcm_hardware snd_sa11xx_uda1341_capture =
-{
- .info = (SNDRV_PCM_INFO_INTERLEAVED |
- SNDRV_PCM_INFO_BLOCK_TRANSFER |
- SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
- SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME),
- .formats = SNDRV_PCM_FMTBIT_S16_LE,
- .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
- SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |\
- SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
- SNDRV_PCM_RATE_KNOT),
- .rate_min = 8000,
- .rate_max = 48000,
- .channels_min = 2,
- .channels_max = 2,
- .buffer_bytes_max = 64*1024,
- .period_bytes_min = 64,
- .period_bytes_max = DMA_BUF_SIZE,
- .periods_min = 2,
- .periods_max = 255,
- .fifo_size = 0,
-};
-
-static struct snd_pcm_hardware snd_sa11xx_uda1341_playback =
-{
- .info = (SNDRV_PCM_INFO_INTERLEAVED |
- SNDRV_PCM_INFO_BLOCK_TRANSFER |
- SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
- SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME),
- .formats = SNDRV_PCM_FMTBIT_S16_LE,
- .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
- SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |\
- SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
- SNDRV_PCM_RATE_KNOT),
- .rate_min = 8000,
- .rate_max = 48000,
- .channels_min = 2,
- .channels_max = 2,
- .buffer_bytes_max = 64*1024,
- .period_bytes_min = 64,
- .period_bytes_max = DMA_BUF_SIZE,
- .periods_min = 2,
- .periods_max = 255,
- .fifo_size = 0,
-};
-
-static int snd_card_sa11xx_uda1341_open(struct snd_pcm_substream *substream)
-{
- struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
- struct snd_pcm_runtime *runtime = substream->runtime;
- int stream_id = substream->pstr->stream;
- int err;
-
- chip->s[stream_id].stream = substream;
-
- if (stream_id == SNDRV_PCM_STREAM_PLAYBACK)
- runtime->hw = snd_sa11xx_uda1341_playback;
- else
- runtime->hw = snd_sa11xx_uda1341_capture;
- if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
- return err;
- if ((err = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates)) < 0)
- return err;
-
- return 0;
-}
-
-static int snd_card_sa11xx_uda1341_close(struct snd_pcm_substream *substream)
-{
- struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
-
- chip->s[substream->pstr->stream].stream = NULL;
- return 0;
-}
-
-/* {{{ HW params & free */
-
-static int snd_sa11xx_uda1341_hw_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *hw_params)
-{
-
- return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
-}
-
-static int snd_sa11xx_uda1341_hw_free(struct snd_pcm_substream *substream)
-{
- return snd_pcm_lib_free_pages(substream);
-}
-
-/* }}} */
-
-static struct snd_pcm_ops snd_card_sa11xx_uda1341_playback_ops = {
- .open = snd_card_sa11xx_uda1341_open,
- .close = snd_card_sa11xx_uda1341_close,
- .ioctl = snd_pcm_lib_ioctl,
- .hw_params = snd_sa11xx_uda1341_hw_params,
- .hw_free = snd_sa11xx_uda1341_hw_free,
- .prepare = snd_sa11xx_uda1341_prepare,
- .trigger = snd_sa11xx_uda1341_trigger,
- .pointer = snd_sa11xx_uda1341_pointer,
-};
-
-static struct snd_pcm_ops snd_card_sa11xx_uda1341_capture_ops = {
- .open = snd_card_sa11xx_uda1341_open,
- .close = snd_card_sa11xx_uda1341_close,
- .ioctl = snd_pcm_lib_ioctl,
- .hw_params = snd_sa11xx_uda1341_hw_params,
- .hw_free = snd_sa11xx_uda1341_hw_free,
- .prepare = snd_sa11xx_uda1341_prepare,
- .trigger = snd_sa11xx_uda1341_trigger,
- .pointer = snd_sa11xx_uda1341_pointer,
-};
-
-static int __init snd_card_sa11xx_uda1341_pcm(struct sa11xx_uda1341 *sa11xx_uda1341, int device)
-{
- struct snd_pcm *pcm;
- int err;
-
- if ((err = snd_pcm_new(sa11xx_uda1341->card, "UDA1341 PCM", device, 1, 1, &pcm)) < 0)
- return err;
-
- /*
- * this sets up our initial buffers and sets the dma_type to isa.
- * isa works but I'm not sure why (or if) it's the right choice
- * this may be too large, trying it for now
- */
- snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
- snd_dma_isa_data(),
- 64*1024, 64*1024);
-
- snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_card_sa11xx_uda1341_playback_ops);
- snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_card_sa11xx_uda1341_capture_ops);
- pcm->private_data = sa11xx_uda1341;
- pcm->info_flags = 0;
- strcpy(pcm->name, "UDA1341 PCM");
-
- sa11xx_uda1341_audio_init(sa11xx_uda1341);
-
- /* setup DMA controller */
- audio_dma_request(&sa11xx_uda1341->s[SNDRV_PCM_STREAM_PLAYBACK], audio_dma_callback);
- audio_dma_request(&sa11xx_uda1341->s[SNDRV_PCM_STREAM_CAPTURE], audio_dma_callback);
-
- sa11xx_uda1341->pcm = pcm;
-
- return 0;
-}
-
-/* }}} */
-
-/* {{{ module init & exit */
-
-#ifdef CONFIG_PM
-
-static int snd_sa11xx_uda1341_suspend(struct platform_device *devptr,
- pm_message_t state)
-{
- struct snd_card *card = platform_get_drvdata(devptr);
- struct sa11xx_uda1341 *chip = card->private_data;
-
- snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
- snd_pcm_suspend_all(chip->pcm);
-#ifdef HH_VERSION
- sa1100_dma_sleep(chip->s[SNDRV_PCM_STREAM_PLAYBACK].dmach);
- sa1100_dma_sleep(chip->s[SNDRV_PCM_STREAM_CAPTURE].dmach);
-#else
- //FIXME
-#endif
- l3_command(chip->uda1341, CMD_SUSPEND, NULL);
- sa11xx_uda1341_audio_shutdown(chip);
-
- return 0;
-}
-
-static int snd_sa11xx_uda1341_resume(struct platform_device *devptr)
-{
- struct snd_card *card = platform_get_drvdata(devptr);
- struct sa11xx_uda1341 *chip = card->private_data;
-
- sa11xx_uda1341_audio_init(chip);
- l3_command(chip->uda1341, CMD_RESUME, NULL);
-#ifdef HH_VERSION
- sa1100_dma_wakeup(chip->s[SNDRV_PCM_STREAM_PLAYBACK].dmach);
- sa1100_dma_wakeup(chip->s[SNDRV_PCM_STREAM_CAPTURE].dmach);
-#else
- //FIXME
-#endif
- snd_power_change_state(card, SNDRV_CTL_POWER_D0);
- return 0;
-}
-#endif /* COMFIG_PM */
-
-void snd_sa11xx_uda1341_free(struct snd_card *card)
-{
- struct sa11xx_uda1341 *chip = card->private_data;
-
- audio_dma_free(&chip->s[SNDRV_PCM_STREAM_PLAYBACK]);
- audio_dma_free(&chip->s[SNDRV_PCM_STREAM_CAPTURE]);
-}
-
-static int __devinit sa11xx_uda1341_probe(struct platform_device *devptr)
-{
- int err;
- struct snd_card *card;
- struct sa11xx_uda1341 *chip;
-
- /* register the soundcard */
- card = snd_card_new(-1, id, THIS_MODULE, sizeof(struct sa11xx_uda1341));
- if (card == NULL)
- return -ENOMEM;
-
- chip = card->private_data;
- spin_lock_init(&chip->s[0].dma_lock);
- spin_lock_init(&chip->s[1].dma_lock);
-
- card->private_free = snd_sa11xx_uda1341_free;
- chip->card = card;
- chip->samplerate = AUDIO_RATE_DEFAULT;
-
- // mixer
- if ((err = snd_chip_uda1341_mixer_new(card, &chip->uda1341)))
- goto nodev;
-
- // PCM
- if ((err = snd_card_sa11xx_uda1341_pcm(chip, 0)) < 0)
- goto nodev;
-
- strcpy(card->driver, "UDA1341");
- strcpy(card->shortname, "H3600 UDA1341TS");
- sprintf(card->longname, "Compaq iPAQ H3600 with Philips UDA1341TS");
-
- snd_card_set_dev(card, &devptr->dev);
-
- if ((err = snd_card_register(card)) == 0) {
- printk( KERN_INFO "iPAQ audio support initialized\n" );
- platform_set_drvdata(devptr, card);
- return 0;
- }
-
- nodev:
- snd_card_free(card);
- return err;
-}
-
-static int __devexit sa11xx_uda1341_remove(struct platform_device *devptr)
-{
- snd_card_free(platform_get_drvdata(devptr));
- platform_set_drvdata(devptr, NULL);
- return 0;
-}
-
-#define SA11XX_UDA1341_DRIVER "sa11xx_uda1341"
-
-static struct platform_driver sa11xx_uda1341_driver = {
- .probe = sa11xx_uda1341_probe,
- .remove = __devexit_p(sa11xx_uda1341_remove),
-#ifdef CONFIG_PM
- .suspend = snd_sa11xx_uda1341_suspend,
- .resume = snd_sa11xx_uda1341_resume,
-#endif
- .driver = {
- .name = SA11XX_UDA1341_DRIVER,
- },
-};
-
-static int __init sa11xx_uda1341_init(void)
-{
- int err;
-
- if (!machine_is_h3xxx())
- return -ENODEV;
- if ((err = platform_driver_register(&sa11xx_uda1341_driver)) < 0)
- return err;
- device = platform_device_register_simple(SA11XX_UDA1341_DRIVER, -1, NULL, 0);
- if (!IS_ERR(device)) {
- if (platform_get_drvdata(device))
- return 0;
- platform_device_unregister(device);
- err = -ENODEV;
- } else
- err = PTR_ERR(device);
- platform_driver_unregister(&sa11xx_uda1341_driver);
- return err;
-}
-
-static void __exit sa11xx_uda1341_exit(void)
-{
- platform_device_unregister(device);
- platform_driver_unregister(&sa11xx_uda1341_driver);
-}
-
-module_init(sa11xx_uda1341_init);
-module_exit(sa11xx_uda1341_exit);
-
-/* }}} */
-
-/*
- * Local variables:
- * indent-tabs-mode: t
- * End:
- */
--- /dev/null
+menu "Atmel devices (AVR32 and AT91)"
+ depends on AVR32 || ARCH_AT91
+
+config SND_ATMEL_ABDAC
+ tristate "Atmel Audio Bitstream DAC (ABDAC) driver"
+ select SND_PCM
+ depends on DW_DMAC && AVR32
+ help
+ ALSA sound driver for the Atmel Audio Bitstream DAC (ABDAC).
+
+config SND_ATMEL_AC97C
+ tristate "Atmel AC97 Controller (AC97C) driver"
+ select SND_PCM
+ select SND_AC97_CODEC
+ depends on DW_DMAC && AVR32
+ help
+ ALSA sound driver for the Atmel AC97 controller.
+
+endmenu
--- /dev/null
+snd-atmel-abdac-objs := abdac.o
+snd-atmel-ac97c-objs := ac97c.o
+
+obj-$(CONFIG_SND_ATMEL_ABDAC) += snd-atmel-abdac.o
+obj-$(CONFIG_SND_ATMEL_AC97C) += snd-atmel-ac97c.o
--- /dev/null
+/*
+ * Driver for the Atmel on-chip Audio Bitstream DAC (ABDAC)
+ *
+ * Copyright (C) 2006-2009 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#include <linux/clk.h>
+#include <linux/bitmap.h>
+#include <linux/dw_dmac.h>
+#include <linux/dmaengine.h>
+#include <linux/dma-mapping.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+
+#include <sound/core.h>
+#include <sound/initval.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/atmel-abdac.h>
+
+/* DAC register offsets */
+#define DAC_DATA 0x0000
+#define DAC_CTRL 0x0008
+#define DAC_INT_MASK 0x000c
+#define DAC_INT_EN 0x0010
+#define DAC_INT_DIS 0x0014
+#define DAC_INT_CLR 0x0018
+#define DAC_INT_STATUS 0x001c
+
+/* Bitfields in CTRL */
+#define DAC_SWAP_OFFSET 30
+#define DAC_SWAP_SIZE 1
+#define DAC_EN_OFFSET 31
+#define DAC_EN_SIZE 1
+
+/* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */
+#define DAC_UNDERRUN_OFFSET 28
+#define DAC_UNDERRUN_SIZE 1
+#define DAC_TX_READY_OFFSET 29
+#define DAC_TX_READY_SIZE 1
+
+/* Bit manipulation macros */
+#define DAC_BIT(name) \
+ (1 << DAC_##name##_OFFSET)
+#define DAC_BF(name, value) \
+ (((value) & ((1 << DAC_##name##_SIZE) - 1)) \
+ << DAC_##name##_OFFSET)
+#define DAC_BFEXT(name, value) \
+ (((value) >> DAC_##name##_OFFSET) \
+ & ((1 << DAC_##name##_SIZE) - 1))
+#define DAC_BFINS(name, value, old) \
+ (((old) & ~(((1 << DAC_##name##_SIZE) - 1) \
+ << DAC_##name##_OFFSET)) \
+ | DAC_BF(name, value))
+
+/* Register access macros */
+#define dac_readl(port, reg) \
+ __raw_readl((port)->regs + DAC_##reg)
+#define dac_writel(port, reg, value) \
+ __raw_writel((value), (port)->regs + DAC_##reg)
+
+/*
+ * ABDAC supports a maximum of 6 different rates from a generic clock. The
+ * generic clock has a power of two divider, which gives 6 steps from 192 kHz
+ * to 5112 Hz.
+ */
+#define MAX_NUM_RATES 6
+/* ALSA seems to use rates between 192000 Hz and 5112 Hz. */
+#define RATE_MAX 192000
+#define RATE_MIN 5112
+
+enum {
+ DMA_READY = 0,
+};
+
+struct atmel_abdac_dma {
+ struct dma_chan *chan;
+ struct dw_cyclic_desc *cdesc;
+};
+
+struct atmel_abdac {
+ struct clk *pclk;
+ struct clk *sample_clk;
+ struct platform_device *pdev;
+ struct atmel_abdac_dma dma;
+
+ struct snd_pcm_hw_constraint_list constraints_rates;
+ struct snd_pcm_substream *substream;
+ struct snd_card *card;
+ struct snd_pcm *pcm;
+
+ void __iomem *regs;
+ unsigned long flags;
+ unsigned int rates[MAX_NUM_RATES];
+ unsigned int rates_num;
+ int irq;
+};
+
+#define get_dac(card) ((struct atmel_abdac *)(card)->private_data)
+
+/* This function is called by the DMA driver. */
+static void atmel_abdac_dma_period_done(void *arg)
+{
+ struct atmel_abdac *dac = arg;
+ snd_pcm_period_elapsed(dac->substream);
+}
+
+static int atmel_abdac_prepare_dma(struct atmel_abdac *dac,
+ struct snd_pcm_substream *substream,
+ enum dma_data_direction direction)
+{
+ struct dma_chan *chan = dac->dma.chan;
+ struct dw_cyclic_desc *cdesc;
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ unsigned long buffer_len, period_len;
+
+ /*
+ * We don't do DMA on "complex" transfers, i.e. with
+ * non-halfword-aligned buffers or lengths.
+ */
+ if (runtime->dma_addr & 1 || runtime->buffer_size & 1) {
+ dev_dbg(&dac->pdev->dev, "too complex transfer\n");
+ return -EINVAL;
+ }
+
+ buffer_len = frames_to_bytes(runtime, runtime->buffer_size);
+ period_len = frames_to_bytes(runtime, runtime->period_size);
+
+ cdesc = dw_dma_cyclic_prep(chan, runtime->dma_addr, buffer_len,
+ period_len, DMA_TO_DEVICE);
+ if (IS_ERR(cdesc)) {
+ dev_dbg(&dac->pdev->dev, "could not prepare cyclic DMA\n");
+ return PTR_ERR(cdesc);
+ }
+
+ cdesc->period_callback = atmel_abdac_dma_period_done;
+ cdesc->period_callback_param = dac;
+
+ dac->dma.cdesc = cdesc;
+
+ set_bit(DMA_READY, &dac->flags);
+
+ return 0;
+}
+
+static struct snd_pcm_hardware atmel_abdac_hw = {
+ .info = (SNDRV_PCM_INFO_MMAP
+ | SNDRV_PCM_INFO_MMAP_VALID
+ | SNDRV_PCM_INFO_INTERLEAVED
+ | SNDRV_PCM_INFO_BLOCK_TRANSFER
+ | SNDRV_PCM_INFO_RESUME
+ | SNDRV_PCM_INFO_PAUSE),
+ .formats = (SNDRV_PCM_FMTBIT_S16_BE),
+ .rates = (SNDRV_PCM_RATE_KNOT),
+ .rate_min = RATE_MIN,
+ .rate_max = RATE_MAX,
+ .channels_min = 2,
+ .channels_max = 2,
+ .buffer_bytes_max = 64 * 4096,
+ .period_bytes_min = 4096,
+ .period_bytes_max = 4096,
+ .periods_min = 4,
+ .periods_max = 64,
+};
+
+static int atmel_abdac_open(struct snd_pcm_substream *substream)
+{
+ struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
+
+ dac->substream = substream;
+ atmel_abdac_hw.rate_max = dac->rates[dac->rates_num - 1];
+ atmel_abdac_hw.rate_min = dac->rates[0];
+ substream->runtime->hw = atmel_abdac_hw;
+
+ return snd_pcm_hw_constraint_list(substream->runtime, 0,
+ SNDRV_PCM_HW_PARAM_RATE, &dac->constraints_rates);
+}
+
+static int atmel_abdac_close(struct snd_pcm_substream *substream)
+{
+ struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
+ dac->substream = NULL;
+ return 0;
+}
+
+static int atmel_abdac_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *hw_params)
+{
+ struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
+ int retval;
+
+ retval = snd_pcm_lib_malloc_pages(substream,
+ params_buffer_bytes(hw_params));
+ if (retval < 0)
+ return retval;
+ /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
+ if (retval == 1)
+ if (test_and_clear_bit(DMA_READY, &dac->flags))
+ dw_dma_cyclic_free(dac->dma.chan);
+
+ return retval;
+}
+
+static int atmel_abdac_hw_free(struct snd_pcm_substream *substream)
+{
+ struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
+ if (test_and_clear_bit(DMA_READY, &dac->flags))
+ dw_dma_cyclic_free(dac->dma.chan);
+ return snd_pcm_lib_free_pages(substream);
+}
+
+static int atmel_abdac_prepare(struct snd_pcm_substream *substream)
+{
+ struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
+ int retval;
+
+ retval = clk_set_rate(dac->sample_clk, 256 * substream->runtime->rate);
+ if (retval)
+ return retval;
+
+ if (!test_bit(DMA_READY, &dac->flags))
+ retval = atmel_abdac_prepare_dma(dac, substream, DMA_TO_DEVICE);
+
+ return retval;
+}
+
+static int atmel_abdac_trigger(struct snd_pcm_substream *substream, int cmd)
+{
+ struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
+ int retval = 0;
+
+ switch (cmd) {
+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
+ case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
+ case SNDRV_PCM_TRIGGER_START:
+ clk_enable(dac->sample_clk);
+ retval = dw_dma_cyclic_start(dac->dma.chan);
+ if (retval)
+ goto out;
+ dac_writel(dac, CTRL, DAC_BIT(EN));
+ break;
+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
+ case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
+ case SNDRV_PCM_TRIGGER_STOP:
+ dw_dma_cyclic_stop(dac->dma.chan);
+ dac_writel(dac, DATA, 0);
+ dac_writel(dac, CTRL, 0);
+ clk_disable(dac->sample_clk);
+ break;
+ default:
+ retval = -EINVAL;
+ break;
+ }
+out:
+ return retval;
+}
+
+static snd_pcm_uframes_t
+atmel_abdac_pointer(struct snd_pcm_substream *substream)
+{
+ struct atmel_abdac *dac = snd_pcm_substream_chip(substream);
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ snd_pcm_uframes_t frames;
+ unsigned long bytes;
+
+ bytes = dw_dma_get_src_addr(dac->dma.chan);
+ bytes -= runtime->dma_addr;
+
+ frames = bytes_to_frames(runtime, bytes);
+ if (frames >= runtime->buffer_size)
+ frames -= runtime->buffer_size;
+
+ return frames;
+}
+
+static irqreturn_t abdac_interrupt(int irq, void *dev_id)
+{
+ struct atmel_abdac *dac = dev_id;
+ u32 status;
+
+ status = dac_readl(dac, INT_STATUS);
+ if (status & DAC_BIT(UNDERRUN)) {
+ dev_err(&dac->pdev->dev, "underrun detected\n");
+ dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN));
+ } else {
+ dev_err(&dac->pdev->dev, "spurious interrupt (status=0x%x)\n",
+ status);
+ dac_writel(dac, INT_CLR, status);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static struct snd_pcm_ops atmel_abdac_ops = {
+ .open = atmel_abdac_open,
+ .close = atmel_abdac_close,
+ .ioctl = snd_pcm_lib_ioctl,
+ .hw_params = atmel_abdac_hw_params,
+ .hw_free = atmel_abdac_hw_free,
+ .prepare = atmel_abdac_prepare,
+ .trigger = atmel_abdac_trigger,
+ .pointer = atmel_abdac_pointer,
+};
+
+static int __devinit atmel_abdac_pcm_new(struct atmel_abdac *dac)
+{
+ struct snd_pcm_hardware hw = atmel_abdac_hw;
+ struct snd_pcm *pcm;
+ int retval;
+
+ retval = snd_pcm_new(dac->card, dac->card->shortname,
+ dac->pdev->id, 1, 0, &pcm);
+ if (retval)
+ return retval;
+
+ strcpy(pcm->name, dac->card->shortname);
+ pcm->private_data = dac;
+ pcm->info_flags = 0;
+ dac->pcm = pcm;
+
+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &atmel_abdac_ops);
+
+ retval = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
+ &dac->pdev->dev, hw.periods_min * hw.period_bytes_min,
+ hw.buffer_bytes_max);
+
+ return retval;
+}
+
+static bool filter(struct dma_chan *chan, void *slave)
+{
+ struct dw_dma_slave *dws = slave;
+
+ if (dws->dma_dev == chan->device->dev) {
+ chan->private = dws;
+ return true;
+ } else
+ return false;
+}
+
+static int set_sample_rates(struct atmel_abdac *dac)
+{
+ long new_rate = RATE_MAX;
+ int retval = -EINVAL;
+ int index = 0;
+
+ /* we start at 192 kHz and work our way down to 5112 Hz */
+ while (new_rate >= RATE_MIN && index < (MAX_NUM_RATES + 1)) {
+ new_rate = clk_round_rate(dac->sample_clk, 256 * new_rate);
+ if (new_rate < 0)
+ break;
+ /* make sure we are below the ABDAC clock */
+ if (new_rate <= clk_get_rate(dac->pclk)) {
+ dac->rates[index] = new_rate / 256;
+ index++;
+ }
+ /* divide by 256 and then by two to get next rate */
+ new_rate /= 256 * 2;
+ }
+
+ if (index) {
+ int i;
+
+ /* reverse array, smallest go first */
+ for (i = 0; i < (index / 2); i++) {
+ unsigned int tmp = dac->rates[index - 1 - i];
+ dac->rates[index - 1 - i] = dac->rates[i];
+ dac->rates[i] = tmp;
+ }
+
+ dac->constraints_rates.count = index;
+ dac->constraints_rates.list = dac->rates;
+ dac->constraints_rates.mask = 0;
+ dac->rates_num = index;
+
+ retval = 0;
+ }
+
+ return retval;
+}
+
+static int __devinit atmel_abdac_probe(struct platform_device *pdev)
+{
+ struct snd_card *card;
+ struct atmel_abdac *dac;
+ struct resource *regs;
+ struct atmel_abdac_pdata *pdata;
+ struct clk *pclk;
+ struct clk *sample_clk;
+ int retval;
+ int irq;
+
+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!regs) {
+ dev_dbg(&pdev->dev, "no memory resource\n");
+ return -ENXIO;
+ }
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0) {
+ dev_dbg(&pdev->dev, "could not get IRQ number\n");
+ return irq;
+ }
+
+ pdata = pdev->dev.platform_data;
+ if (!pdata) {
+ dev_dbg(&pdev->dev, "no platform data\n");
+ return -ENXIO;
+ }
+
+ pclk = clk_get(&pdev->dev, "pclk");
+ if (IS_ERR(pclk)) {
+ dev_dbg(&pdev->dev, "no peripheral clock\n");
+ return PTR_ERR(pclk);
+ }
+ sample_clk = clk_get(&pdev->dev, "sample_clk");
+ if (IS_ERR(pclk)) {
+ dev_dbg(&pdev->dev, "no sample clock\n");
+ retval = PTR_ERR(pclk);
+ goto out_put_pclk;
+ }
+ clk_enable(pclk);
+
+ retval = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
+ THIS_MODULE, sizeof(struct atmel_abdac), &card);
+ if (retval) {
+ dev_dbg(&pdev->dev, "could not create sound card device\n");
+ goto out_put_sample_clk;
+ }
+
+ dac = get_dac(card);
+
+ dac->irq = irq;
+ dac->card = card;
+ dac->pclk = pclk;
+ dac->sample_clk = sample_clk;
+ dac->pdev = pdev;
+
+ retval = set_sample_rates(dac);
+ if (retval < 0) {
+ dev_dbg(&pdev->dev, "could not set supported rates\n");
+ goto out_free_card;
+ }
+
+ dac->regs = ioremap(regs->start, regs->end - regs->start + 1);
+ if (!dac->regs) {
+ dev_dbg(&pdev->dev, "could not remap register memory\n");
+ goto out_free_card;
+ }
+
+ /* make sure the DAC is silent and disabled */
+ dac_writel(dac, DATA, 0);
+ dac_writel(dac, CTRL, 0);
+
+ retval = request_irq(irq, abdac_interrupt, 0, "abdac", dac);
+ if (retval) {
+ dev_dbg(&pdev->dev, "could not request irq\n");
+ goto out_unmap_regs;
+ }
+
+ snd_card_set_dev(card, &pdev->dev);
+
+ if (pdata->dws.dma_dev) {
+ struct dw_dma_slave *dws = &pdata->dws;
+ dma_cap_mask_t mask;
+
+ dws->tx_reg = regs->start + DAC_DATA;
+
+ dma_cap_zero(mask);
+ dma_cap_set(DMA_SLAVE, mask);
+
+ dac->dma.chan = dma_request_channel(mask, filter, dws);
+ }
+ if (!pdata->dws.dma_dev || !dac->dma.chan) {
+ dev_dbg(&pdev->dev, "DMA not available\n");
+ retval = -ENODEV;
+ goto out_unset_card_dev;
+ }
+
+ strcpy(card->driver, "Atmel ABDAC");
+ strcpy(card->shortname, "Atmel ABDAC");
+ sprintf(card->longname, "Atmel Audio Bitstream DAC");
+
+ retval = atmel_abdac_pcm_new(dac);
+ if (retval) {
+ dev_dbg(&pdev->dev, "could not register ABDAC pcm device\n");
+ goto out_release_dma;
+ }
+
+ retval = snd_card_register(card);
+ if (retval) {
+ dev_dbg(&pdev->dev, "could not register sound card\n");
+ goto out_release_dma;
+ }
+
+ platform_set_drvdata(pdev, card);
+
+ dev_info(&pdev->dev, "Atmel ABDAC at 0x%p using %s\n",
+ dac->regs, dac->dma.chan->dev->device.bus_id);
+
+ return retval;
+
+out_release_dma:
+ dma_release_channel(dac->dma.chan);
+ dac->dma.chan = NULL;
+out_unset_card_dev:
+ snd_card_set_dev(card, NULL);
+ free_irq(irq, dac);
+out_unmap_regs:
+ iounmap(dac->regs);
+out_free_card:
+ snd_card_free(card);
+out_put_sample_clk:
+ clk_put(sample_clk);
+ clk_disable(pclk);
+out_put_pclk:
+ clk_put(pclk);
+ return retval;
+}
+
+#ifdef CONFIG_PM
+static int atmel_abdac_suspend(struct platform_device *pdev, pm_message_t msg)
+{
+ struct snd_card *card = platform_get_drvdata(pdev);
+ struct atmel_abdac *dac = card->private_data;
+
+ dw_dma_cyclic_stop(dac->dma.chan);
+ clk_disable(dac->sample_clk);
+ clk_disable(dac->pclk);
+
+ return 0;
+}
+
+static int atmel_abdac_resume(struct platform_device *pdev)
+{
+ struct snd_card *card = platform_get_drvdata(pdev);
+ struct atmel_abdac *dac = card->private_data;
+
+ clk_enable(dac->pclk);
+ clk_enable(dac->sample_clk);
+ if (test_bit(DMA_READY, &dac->flags))
+ dw_dma_cyclic_start(dac->dma.chan);
+
+ return 0;
+}
+#else
+#define atmel_abdac_suspend NULL
+#define atmel_abdac_resume NULL
+#endif
+
+static int __devexit atmel_abdac_remove(struct platform_device *pdev)
+{
+ struct snd_card *card = platform_get_drvdata(pdev);
+ struct atmel_abdac *dac = get_dac(card);
+
+ clk_put(dac->sample_clk);
+ clk_disable(dac->pclk);
+ clk_put(dac->pclk);
+
+ dma_release_channel(dac->dma.chan);
+ dac->dma.chan = NULL;
+ snd_card_set_dev(card, NULL);
+ iounmap(dac->regs);
+ free_irq(dac->irq, dac);
+ snd_card_free(card);
+
+ platform_set_drvdata(pdev, NULL);
+
+ return 0;
+}
+
+static struct platform_driver atmel_abdac_driver = {
+ .remove = __devexit_p(atmel_abdac_remove),
+ .driver = {
+ .name = "atmel_abdac",
+ },
+ .suspend = atmel_abdac_suspend,
+ .resume = atmel_abdac_resume,
+};
+
+static int __init atmel_abdac_init(void)
+{
+ return platform_driver_probe(&atmel_abdac_driver,
+ atmel_abdac_probe);
+}
+module_init(atmel_abdac_init);
+
+static void __exit atmel_abdac_exit(void)
+{
+ platform_driver_unregister(&atmel_abdac_driver);
+}
+module_exit(atmel_abdac_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Driver for Atmel Audio Bitstream DAC (ABDAC)");
+MODULE_AUTHOR("Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>");
--- /dev/null
+/*
+ * Driver for the Atmel AC97C controller
+ *
+ * Copyright (C) 2005-2009 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/bitmap.h>
+#include <linux/dmaengine.h>
+#include <linux/dma-mapping.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/mutex.h>
+#include <linux/gpio.h>
+#include <linux/io.h>
+
+#include <sound/core.h>
+#include <sound/initval.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/ac97_codec.h>
+#include <sound/atmel-ac97c.h>
+#include <sound/memalloc.h>
+
+#include <linux/dw_dmac.h>
+
+#include "ac97c.h"
+
+enum {
+ DMA_TX_READY = 0,
+ DMA_RX_READY,
+ DMA_TX_CHAN_PRESENT,
+ DMA_RX_CHAN_PRESENT,
+};
+
+/* Serialize access to opened variable */
+static DEFINE_MUTEX(opened_mutex);
+
+struct atmel_ac97c_dma {
+ struct dma_chan *rx_chan;
+ struct dma_chan *tx_chan;
+};
+
+struct atmel_ac97c {
+ struct clk *pclk;
+ struct platform_device *pdev;
+ struct atmel_ac97c_dma dma;
+
+ struct snd_pcm_substream *playback_substream;
+ struct snd_pcm_substream *capture_substream;
+ struct snd_card *card;
+ struct snd_pcm *pcm;
+ struct snd_ac97 *ac97;
+ struct snd_ac97_bus *ac97_bus;
+
+ u64 cur_format;
+ unsigned int cur_rate;
+ unsigned long flags;
+ /* Serialize access to opened variable */
+ spinlock_t lock;
+ void __iomem *regs;
+ int opened;
+ int reset_pin;
+};
+
+#define get_chip(card) ((struct atmel_ac97c *)(card)->private_data)
+
+#define ac97c_writel(chip, reg, val) \
+ __raw_writel((val), (chip)->regs + AC97C_##reg)
+#define ac97c_readl(chip, reg) \
+ __raw_readl((chip)->regs + AC97C_##reg)
+
+/* This function is called by the DMA driver. */
+static void atmel_ac97c_dma_playback_period_done(void *arg)
+{
+ struct atmel_ac97c *chip = arg;
+ snd_pcm_period_elapsed(chip->playback_substream);
+}
+
+static void atmel_ac97c_dma_capture_period_done(void *arg)
+{
+ struct atmel_ac97c *chip = arg;
+ snd_pcm_period_elapsed(chip->capture_substream);
+}
+
+static int atmel_ac97c_prepare_dma(struct atmel_ac97c *chip,
+ struct snd_pcm_substream *substream,
+ enum dma_data_direction direction)
+{
+ struct dma_chan *chan;
+ struct dw_cyclic_desc *cdesc;
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ unsigned long buffer_len, period_len;
+
+ /*
+ * We don't do DMA on "complex" transfers, i.e. with
+ * non-halfword-aligned buffers or lengths.
+ */
+ if (runtime->dma_addr & 1 || runtime->buffer_size & 1) {
+ dev_dbg(&chip->pdev->dev, "too complex transfer\n");
+ return -EINVAL;
+ }
+
+ if (direction == DMA_TO_DEVICE)
+ chan = chip->dma.tx_chan;
+ else
+ chan = chip->dma.rx_chan;
+
+ buffer_len = frames_to_bytes(runtime, runtime->buffer_size);
+ period_len = frames_to_bytes(runtime, runtime->period_size);
+
+ cdesc = dw_dma_cyclic_prep(chan, runtime->dma_addr, buffer_len,
+ period_len, direction);
+ if (IS_ERR(cdesc)) {
+ dev_dbg(&chip->pdev->dev, "could not prepare cyclic DMA\n");
+ return PTR_ERR(cdesc);
+ }
+
+ if (direction == DMA_TO_DEVICE) {
+ cdesc->period_callback = atmel_ac97c_dma_playback_period_done;
+ set_bit(DMA_TX_READY, &chip->flags);
+ } else {
+ cdesc->period_callback = atmel_ac97c_dma_capture_period_done;
+ set_bit(DMA_RX_READY, &chip->flags);
+ }
+
+ cdesc->period_callback_param = chip;
+
+ return 0;
+}
+
+static struct snd_pcm_hardware atmel_ac97c_hw = {
+ .info = (SNDRV_PCM_INFO_MMAP
+ | SNDRV_PCM_INFO_MMAP_VALID
+ | SNDRV_PCM_INFO_INTERLEAVED
+ | SNDRV_PCM_INFO_BLOCK_TRANSFER
+ | SNDRV_PCM_INFO_JOINT_DUPLEX
+ | SNDRV_PCM_INFO_RESUME
+ | SNDRV_PCM_INFO_PAUSE),
+ .formats = (SNDRV_PCM_FMTBIT_S16_BE
+ | SNDRV_PCM_FMTBIT_S16_LE),
+ .rates = (SNDRV_PCM_RATE_CONTINUOUS),
+ .rate_min = 4000,
+ .rate_max = 48000,
+ .channels_min = 1,
+ .channels_max = 2,
+ .buffer_bytes_max = 64 * 4096,
+ .period_bytes_min = 4096,
+ .period_bytes_max = 4096,
+ .periods_min = 4,
+ .periods_max = 64,
+};
+
+static int atmel_ac97c_playback_open(struct snd_pcm_substream *substream)
+{
+ struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
+ struct snd_pcm_runtime *runtime = substream->runtime;
+
+ mutex_lock(&opened_mutex);
+ chip->opened++;
+ runtime->hw = atmel_ac97c_hw;
+ if (chip->cur_rate) {
+ runtime->hw.rate_min = chip->cur_rate;
+ runtime->hw.rate_max = chip->cur_rate;
+ }
+ if (chip->cur_format)
+ runtime->hw.formats = (1ULL << chip->cur_format);
+ mutex_unlock(&opened_mutex);
+ chip->playback_substream = substream;
+ return 0;
+}
+
+static int atmel_ac97c_capture_open(struct snd_pcm_substream *substream)
+{
+ struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
+ struct snd_pcm_runtime *runtime = substream->runtime;
+
+ mutex_lock(&opened_mutex);
+ chip->opened++;
+ runtime->hw = atmel_ac97c_hw;
+ if (chip->cur_rate) {
+ runtime->hw.rate_min = chip->cur_rate;
+ runtime->hw.rate_max = chip->cur_rate;
+ }
+ if (chip->cur_format)
+ runtime->hw.formats = (1ULL << chip->cur_format);
+ mutex_unlock(&opened_mutex);
+ chip->capture_substream = substream;
+ return 0;
+}
+
+static int atmel_ac97c_playback_close(struct snd_pcm_substream *substream)
+{
+ struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
+
+ mutex_lock(&opened_mutex);
+ chip->opened--;
+ if (!chip->opened) {
+ chip->cur_rate = 0;
+ chip->cur_format = 0;
+ }
+ mutex_unlock(&opened_mutex);
+
+ chip->playback_substream = NULL;
+
+ return 0;
+}
+
+static int atmel_ac97c_capture_close(struct snd_pcm_substream *substream)
+{
+ struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
+
+ mutex_lock(&opened_mutex);
+ chip->opened--;
+ if (!chip->opened) {
+ chip->cur_rate = 0;
+ chip->cur_format = 0;
+ }
+ mutex_unlock(&opened_mutex);
+
+ chip->capture_substream = NULL;
+
+ return 0;
+}
+
+static int atmel_ac97c_playback_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *hw_params)
+{
+ struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
+ int retval;
+
+ retval = snd_pcm_lib_malloc_pages(substream,
+ params_buffer_bytes(hw_params));
+ if (retval < 0)
+ return retval;
+ /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
+ if (retval == 1)
+ if (test_and_clear_bit(DMA_TX_READY, &chip->flags))
+ dw_dma_cyclic_free(chip->dma.tx_chan);
+
+ /* Set restrictions to params. */
+ mutex_lock(&opened_mutex);
+ chip->cur_rate = params_rate(hw_params);
+ chip->cur_format = params_format(hw_params);
+ mutex_unlock(&opened_mutex);
+
+ return retval;
+}
+
+static int atmel_ac97c_capture_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *hw_params)
+{
+ struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
+ int retval;
+
+ retval = snd_pcm_lib_malloc_pages(substream,
+ params_buffer_bytes(hw_params));
+ if (retval < 0)
+ return retval;
+ /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
+ if (retval == 1)
+ if (test_and_clear_bit(DMA_RX_READY, &chip->flags))
+ dw_dma_cyclic_free(chip->dma.rx_chan);
+
+ /* Set restrictions to params. */
+ mutex_lock(&opened_mutex);
+ chip->cur_rate = params_rate(hw_params);
+ chip->cur_format = params_format(hw_params);
+ mutex_unlock(&opened_mutex);
+
+ return retval;
+}
+
+static int atmel_ac97c_playback_hw_free(struct snd_pcm_substream *substream)
+{
+ struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
+ if (test_and_clear_bit(DMA_TX_READY, &chip->flags))
+ dw_dma_cyclic_free(chip->dma.tx_chan);
+ return snd_pcm_lib_free_pages(substream);
+}
+
+static int atmel_ac97c_capture_hw_free(struct snd_pcm_substream *substream)
+{
+ struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
+ if (test_and_clear_bit(DMA_RX_READY, &chip->flags))
+ dw_dma_cyclic_free(chip->dma.rx_chan);
+ return snd_pcm_lib_free_pages(substream);
+}
+
+static int atmel_ac97c_playback_prepare(struct snd_pcm_substream *substream)
+{
+ struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ unsigned long word = 0;
+ int retval;
+
+ /* assign channels to AC97C channel A */
+ switch (runtime->channels) {
+ case 1:
+ word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
+ break;
+ case 2:
+ word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
+ | AC97C_CH_ASSIGN(PCM_RIGHT, A);
+ break;
+ default:
+ /* TODO: support more than two channels */
+ return -EINVAL;
+ break;
+ }
+ ac97c_writel(chip, OCA, word);
+
+ /* configure sample format and size */
+ word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
+
+ switch (runtime->format) {
+ case SNDRV_PCM_FORMAT_S16_LE:
+ word |= AC97C_CMR_CEM_LITTLE;
+ break;
+ case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
+ default:
+ word &= ~(AC97C_CMR_CEM_LITTLE);
+ break;
+ }
+
+ ac97c_writel(chip, CAMR, word);
+
+ /* set variable rate if needed */
+ if (runtime->rate != 48000) {
+ word = ac97c_readl(chip, MR);
+ word |= AC97C_MR_VRA;
+ ac97c_writel(chip, MR, word);
+ } else {
+ word = ac97c_readl(chip, MR);
+ word &= ~(AC97C_MR_VRA);
+ ac97c_writel(chip, MR, word);
+ }
+
+ retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE,
+ runtime->rate);
+ if (retval)
+ dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n",
+ runtime->rate);
+
+ if (!test_bit(DMA_TX_READY, &chip->flags))
+ retval = atmel_ac97c_prepare_dma(chip, substream,
+ DMA_TO_DEVICE);
+
+ return retval;
+}
+
+static int atmel_ac97c_capture_prepare(struct snd_pcm_substream *substream)
+{
+ struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ unsigned long word = 0;
+ int retval;
+
+ /* assign channels to AC97C channel A */
+ switch (runtime->channels) {
+ case 1:
+ word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
+ break;
+ case 2:
+ word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
+ | AC97C_CH_ASSIGN(PCM_RIGHT, A);
+ break;
+ default:
+ /* TODO: support more than two channels */
+ return -EINVAL;
+ break;
+ }
+ ac97c_writel(chip, ICA, word);
+
+ /* configure sample format and size */
+ word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
+
+ switch (runtime->format) {
+ case SNDRV_PCM_FORMAT_S16_LE:
+ word |= AC97C_CMR_CEM_LITTLE;
+ break;
+ case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
+ default:
+ word &= ~(AC97C_CMR_CEM_LITTLE);
+ break;
+ }
+
+ ac97c_writel(chip, CAMR, word);
+
+ /* set variable rate if needed */
+ if (runtime->rate != 48000) {
+ word = ac97c_readl(chip, MR);
+ word |= AC97C_MR_VRA;
+ ac97c_writel(chip, MR, word);
+ } else {
+ word = ac97c_readl(chip, MR);
+ word &= ~(AC97C_MR_VRA);
+ ac97c_writel(chip, MR, word);
+ }
+
+ retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE,
+ runtime->rate);
+ if (retval)
+ dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n",
+ runtime->rate);
+
+ if (!test_bit(DMA_RX_READY, &chip->flags))
+ retval = atmel_ac97c_prepare_dma(chip, substream,
+ DMA_FROM_DEVICE);
+
+ return retval;
+}
+
+static int
+atmel_ac97c_playback_trigger(struct snd_pcm_substream *substream, int cmd)
+{
+ struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
+ unsigned long camr;
+ int retval = 0;
+
+ camr = ac97c_readl(chip, CAMR);
+
+ switch (cmd) {
+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
+ case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
+ case SNDRV_PCM_TRIGGER_START:
+ retval = dw_dma_cyclic_start(chip->dma.tx_chan);
+ if (retval)
+ goto out;
+ camr |= AC97C_CMR_CENA;
+ break;
+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
+ case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
+ case SNDRV_PCM_TRIGGER_STOP:
+ dw_dma_cyclic_stop(chip->dma.tx_chan);
+ if (chip->opened <= 1)
+ camr &= ~AC97C_CMR_CENA;
+ break;
+ default:
+ retval = -EINVAL;
+ goto out;
+ }
+
+ ac97c_writel(chip, CAMR, camr);
+out:
+ return retval;
+}
+
+static int
+atmel_ac97c_capture_trigger(struct snd_pcm_substream *substream, int cmd)
+{
+ struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
+ unsigned long camr;
+ int retval = 0;
+
+ camr = ac97c_readl(chip, CAMR);
+
+ switch (cmd) {
+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
+ case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
+ case SNDRV_PCM_TRIGGER_START:
+ retval = dw_dma_cyclic_start(chip->dma.rx_chan);
+ if (retval)
+ goto out;
+ camr |= AC97C_CMR_CENA;
+ break;
+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
+ case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
+ case SNDRV_PCM_TRIGGER_STOP:
+ dw_dma_cyclic_stop(chip->dma.rx_chan);
+ if (chip->opened <= 1)
+ camr &= ~AC97C_CMR_CENA;
+ break;
+ default:
+ retval = -EINVAL;
+ break;
+ }
+
+ ac97c_writel(chip, CAMR, camr);
+out:
+ return retval;
+}
+
+static snd_pcm_uframes_t
+atmel_ac97c_playback_pointer(struct snd_pcm_substream *substream)
+{
+ struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ snd_pcm_uframes_t frames;
+ unsigned long bytes;
+
+ bytes = dw_dma_get_src_addr(chip->dma.tx_chan);
+ bytes -= runtime->dma_addr;
+
+ frames = bytes_to_frames(runtime, bytes);
+ if (frames >= runtime->buffer_size)
+ frames -= runtime->buffer_size;
+ return frames;
+}
+
+static snd_pcm_uframes_t
+atmel_ac97c_capture_pointer(struct snd_pcm_substream *substream)
+{
+ struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ snd_pcm_uframes_t frames;
+ unsigned long bytes;
+
+ bytes = dw_dma_get_dst_addr(chip->dma.rx_chan);
+ bytes -= runtime->dma_addr;
+
+ frames = bytes_to_frames(runtime, bytes);
+ if (frames >= runtime->buffer_size)
+ frames -= runtime->buffer_size;
+ return frames;
+}
+
+static struct snd_pcm_ops atmel_ac97_playback_ops = {
+ .open = atmel_ac97c_playback_open,
+ .close = atmel_ac97c_playback_close,
+ .ioctl = snd_pcm_lib_ioctl,
+ .hw_params = atmel_ac97c_playback_hw_params,
+ .hw_free = atmel_ac97c_playback_hw_free,
+ .prepare = atmel_ac97c_playback_prepare,
+ .trigger = atmel_ac97c_playback_trigger,
+ .pointer = atmel_ac97c_playback_pointer,
+};
+
+static struct snd_pcm_ops atmel_ac97_capture_ops = {
+ .open = atmel_ac97c_capture_open,
+ .close = atmel_ac97c_capture_close,
+ .ioctl = snd_pcm_lib_ioctl,
+ .hw_params = atmel_ac97c_capture_hw_params,
+ .hw_free = atmel_ac97c_capture_hw_free,
+ .prepare = atmel_ac97c_capture_prepare,
+ .trigger = atmel_ac97c_capture_trigger,
+ .pointer = atmel_ac97c_capture_pointer,
+};
+
+static int __devinit atmel_ac97c_pcm_new(struct atmel_ac97c *chip)
+{
+ struct snd_pcm *pcm;
+ struct snd_pcm_hardware hw = atmel_ac97c_hw;
+ int capture, playback, retval;
+
+ capture = test_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
+ playback = test_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
+
+ retval = snd_pcm_new(chip->card, chip->card->shortname,
+ chip->pdev->id, playback, capture, &pcm);
+ if (retval)
+ return retval;
+
+ if (capture)
+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
+ &atmel_ac97_capture_ops);
+ if (playback)
+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
+ &atmel_ac97_playback_ops);
+
+ retval = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
+ &chip->pdev->dev, hw.periods_min * hw.period_bytes_min,
+ hw.buffer_bytes_max);
+ if (retval)
+ return retval;
+
+ pcm->private_data = chip;
+ pcm->info_flags = 0;
+ strcpy(pcm->name, chip->card->shortname);
+ chip->pcm = pcm;
+
+ return 0;
+}
+
+static int atmel_ac97c_mixer_new(struct atmel_ac97c *chip)
+{
+ struct snd_ac97_template template;
+ memset(&template, 0, sizeof(template));
+ template.private_data = chip;
+ return snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
+}
+
+static void atmel_ac97c_write(struct snd_ac97 *ac97, unsigned short reg,
+ unsigned short val)
+{
+ struct atmel_ac97c *chip = get_chip(ac97);
+ unsigned long word;
+ int timeout = 40;
+
+ word = (reg & 0x7f) << 16 | val;
+
+ do {
+ if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
+ ac97c_writel(chip, COTHR, word);
+ return;
+ }
+ udelay(1);
+ } while (--timeout);
+
+ dev_dbg(&chip->pdev->dev, "codec write timeout\n");
+}
+
+static unsigned short atmel_ac97c_read(struct snd_ac97 *ac97,
+ unsigned short reg)
+{
+ struct atmel_ac97c *chip = get_chip(ac97);
+ unsigned long word;
+ int timeout = 40;
+ int write = 10;
+
+ word = (0x80 | (reg & 0x7f)) << 16;
+
+ if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
+ ac97c_readl(chip, CORHR);
+
+retry_write:
+ timeout = 40;
+
+ do {
+ if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
+ ac97c_writel(chip, COTHR, word);
+ goto read_reg;
+ }
+ udelay(10);
+ } while (--timeout);
+
+ if (!--write)
+ goto timed_out;
+ goto retry_write;
+
+read_reg:
+ do {
+ if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
+ unsigned short val = ac97c_readl(chip, CORHR);
+ return val;
+ }
+ udelay(10);
+ } while (--timeout);
+
+ if (!--write)
+ goto timed_out;
+ goto retry_write;
+
+timed_out:
+ dev_dbg(&chip->pdev->dev, "codec read timeout\n");
+ return 0xffff;
+}
+
+static bool filter(struct dma_chan *chan, void *slave)
+{
+ struct dw_dma_slave *dws = slave;
+
+ if (dws->dma_dev == chan->device->dev) {
+ chan->private = dws;
+ return true;
+ } else
+ return false;
+}
+
+static void atmel_ac97c_reset(struct atmel_ac97c *chip)
+{
+ ac97c_writel(chip, MR, AC97C_MR_WRST);
+
+ if (gpio_is_valid(chip->reset_pin)) {
+ gpio_set_value(chip->reset_pin, 0);
+ /* AC97 v2.2 specifications says minimum 1 us. */
+ udelay(10);
+ gpio_set_value(chip->reset_pin, 1);
+ }
+
+ udelay(1);
+ ac97c_writel(chip, MR, AC97C_MR_ENA);
+}
+
+static int __devinit atmel_ac97c_probe(struct platform_device *pdev)
+{
+ struct snd_card *card;
+ struct atmel_ac97c *chip;
+ struct resource *regs;
+ struct ac97c_platform_data *pdata;
+ struct clk *pclk;
+ static struct snd_ac97_bus_ops ops = {
+ .write = atmel_ac97c_write,
+ .read = atmel_ac97c_read,
+ };
+ int retval;
+
+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!regs) {
+ dev_dbg(&pdev->dev, "no memory resource\n");
+ return -ENXIO;
+ }
+
+ pdata = pdev->dev.platform_data;
+ if (!pdata) {
+ dev_dbg(&pdev->dev, "no platform data\n");
+ return -ENXIO;
+ }
+
+ pclk = clk_get(&pdev->dev, "pclk");
+ if (IS_ERR(pclk)) {
+ dev_dbg(&pdev->dev, "no peripheral clock\n");
+ return PTR_ERR(pclk);
+ }
+ clk_enable(pclk);
+
+ retval = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
+ THIS_MODULE, sizeof(struct atmel_ac97c), &card);
+ if (retval) {
+ dev_dbg(&pdev->dev, "could not create sound card device\n");
+ goto err_snd_card_new;
+ }
+
+ chip = get_chip(card);
+
+ spin_lock_init(&chip->lock);
+
+ strcpy(card->driver, "Atmel AC97C");
+ strcpy(card->shortname, "Atmel AC97C");
+ sprintf(card->longname, "Atmel AC97 controller");
+
+ chip->card = card;
+ chip->pclk = pclk;
+ chip->pdev = pdev;
+ chip->regs = ioremap(regs->start, regs->end - regs->start + 1);
+
+ if (!chip->regs) {
+ dev_dbg(&pdev->dev, "could not remap register memory\n");
+ goto err_ioremap;
+ }
+
+ if (gpio_is_valid(pdata->reset_pin)) {
+ if (gpio_request(pdata->reset_pin, "reset_pin")) {
+ dev_dbg(&pdev->dev, "reset pin not available\n");
+ chip->reset_pin = -ENODEV;
+ } else {
+ gpio_direction_output(pdata->reset_pin, 1);
+ chip->reset_pin = pdata->reset_pin;
+ }
+ }
+
+ snd_card_set_dev(card, &pdev->dev);
+
+ retval = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
+ if (retval) {
+ dev_dbg(&pdev->dev, "could not register on ac97 bus\n");
+ goto err_ac97_bus;
+ }
+
+ atmel_ac97c_reset(chip);
+
+ retval = atmel_ac97c_mixer_new(chip);
+ if (retval) {
+ dev_dbg(&pdev->dev, "could not register ac97 mixer\n");
+ goto err_ac97_bus;
+ }
+
+ if (pdata->rx_dws.dma_dev) {
+ struct dw_dma_slave *dws = &pdata->rx_dws;
+ dma_cap_mask_t mask;
+
+ dws->rx_reg = regs->start + AC97C_CARHR + 2;
+
+ dma_cap_zero(mask);
+ dma_cap_set(DMA_SLAVE, mask);
+
+ chip->dma.rx_chan = dma_request_channel(mask, filter, dws);
+
+ dev_info(&chip->pdev->dev, "using %s for DMA RX\n",
+ chip->dma.rx_chan->dev->device.bus_id);
+ set_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
+ }
+
+ if (pdata->tx_dws.dma_dev) {
+ struct dw_dma_slave *dws = &pdata->tx_dws;
+ dma_cap_mask_t mask;
+
+ dws->tx_reg = regs->start + AC97C_CATHR + 2;
+
+ dma_cap_zero(mask);
+ dma_cap_set(DMA_SLAVE, mask);
+
+ chip->dma.tx_chan = dma_request_channel(mask, filter, dws);
+
+ dev_info(&chip->pdev->dev, "using %s for DMA TX\n",
+ chip->dma.tx_chan->dev->device.bus_id);
+ set_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
+ }
+
+ if (!test_bit(DMA_RX_CHAN_PRESENT, &chip->flags) &&
+ !test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) {
+ dev_dbg(&pdev->dev, "DMA not available\n");
+ retval = -ENODEV;
+ goto err_dma;
+ }
+
+ retval = atmel_ac97c_pcm_new(chip);
+ if (retval) {
+ dev_dbg(&pdev->dev, "could not register ac97 pcm device\n");
+ goto err_dma;
+ }
+
+ retval = snd_card_register(card);
+ if (retval) {
+ dev_dbg(&pdev->dev, "could not register sound card\n");
+ goto err_ac97_bus;
+ }
+
+ platform_set_drvdata(pdev, card);
+
+ dev_info(&pdev->dev, "Atmel AC97 controller at 0x%p\n",
+ chip->regs);
+
+ return 0;
+
+err_dma:
+ if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags))
+ dma_release_channel(chip->dma.rx_chan);
+ if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags))
+ dma_release_channel(chip->dma.tx_chan);
+ clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
+ clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
+ chip->dma.rx_chan = NULL;
+ chip->dma.tx_chan = NULL;
+err_ac97_bus:
+ snd_card_set_dev(card, NULL);
+
+ if (gpio_is_valid(chip->reset_pin))
+ gpio_free(chip->reset_pin);
+
+ iounmap(chip->regs);
+err_ioremap:
+ snd_card_free(card);
+err_snd_card_new:
+ clk_disable(pclk);
+ clk_put(pclk);
+ return retval;
+}
+
+#ifdef CONFIG_PM
+static int atmel_ac97c_suspend(struct platform_device *pdev, pm_message_t msg)
+{
+ struct snd_card *card = platform_get_drvdata(pdev);
+ struct atmel_ac97c *chip = card->private_data;
+
+ if (test_bit(DMA_RX_READY, &chip->flags))
+ dw_dma_cyclic_stop(chip->dma.rx_chan);
+ if (test_bit(DMA_TX_READY, &chip->flags))
+ dw_dma_cyclic_stop(chip->dma.tx_chan);
+ clk_disable(chip->pclk);
+
+ return 0;
+}
+
+static int atmel_ac97c_resume(struct platform_device *pdev)
+{
+ struct snd_card *card = platform_get_drvdata(pdev);
+ struct atmel_ac97c *chip = card->private_data;
+
+ clk_enable(chip->pclk);
+ if (test_bit(DMA_RX_READY, &chip->flags))
+ dw_dma_cyclic_start(chip->dma.rx_chan);
+ if (test_bit(DMA_TX_READY, &chip->flags))
+ dw_dma_cyclic_start(chip->dma.tx_chan);
+
+ return 0;
+}
+#else
+#define atmel_ac97c_suspend NULL
+#define atmel_ac97c_resume NULL
+#endif
+
+static int __devexit atmel_ac97c_remove(struct platform_device *pdev)
+{
+ struct snd_card *card = platform_get_drvdata(pdev);
+ struct atmel_ac97c *chip = get_chip(card);
+
+ if (gpio_is_valid(chip->reset_pin))
+ gpio_free(chip->reset_pin);
+
+ clk_disable(chip->pclk);
+ clk_put(chip->pclk);
+ iounmap(chip->regs);
+
+ if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags))
+ dma_release_channel(chip->dma.rx_chan);
+ if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags))
+ dma_release_channel(chip->dma.tx_chan);
+ clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
+ clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
+ chip->dma.rx_chan = NULL;
+ chip->dma.tx_chan = NULL;
+
+ snd_card_set_dev(card, NULL);
+ snd_card_free(card);
+
+ platform_set_drvdata(pdev, NULL);
+
+ return 0;
+}
+
+static struct platform_driver atmel_ac97c_driver = {
+ .remove = __devexit_p(atmel_ac97c_remove),
+ .driver = {
+ .name = "atmel_ac97c",
+ },
+ .suspend = atmel_ac97c_suspend,
+ .resume = atmel_ac97c_resume,
+};
+
+static int __init atmel_ac97c_init(void)
+{
+ return platform_driver_probe(&atmel_ac97c_driver,
+ atmel_ac97c_probe);
+}
+module_init(atmel_ac97c_init);
+
+static void __exit atmel_ac97c_exit(void)
+{
+ platform_driver_unregister(&atmel_ac97c_driver);
+}
+module_exit(atmel_ac97c_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Driver for Atmel AC97 controller");
+MODULE_AUTHOR("Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>");
--- /dev/null
+/*
+ * Register definitions for the Atmel AC97C controller
+ *
+ * Copyright (C) 2005-2009 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+#ifndef __SOUND_ATMEL_AC97C_H
+#define __SOUND_ATMEL_AC97C_H
+
+#define AC97C_MR 0x08
+#define AC97C_ICA 0x10
+#define AC97C_OCA 0x14
+#define AC97C_CARHR 0x20
+#define AC97C_CATHR 0x24
+#define AC97C_CASR 0x28
+#define AC97C_CAMR 0x2c
+#define AC97C_CBRHR 0x30
+#define AC97C_CBTHR 0x34
+#define AC97C_CBSR 0x38
+#define AC97C_CBMR 0x3c
+#define AC97C_CORHR 0x40
+#define AC97C_COTHR 0x44
+#define AC97C_COSR 0x48
+#define AC97C_COMR 0x4c
+#define AC97C_SR 0x50
+#define AC97C_IER 0x54
+#define AC97C_IDR 0x58
+#define AC97C_IMR 0x5c
+#define AC97C_VERSION 0xfc
+
+#define AC97C_CATPR PDC_TPR
+#define AC97C_CATCR PDC_TCR
+#define AC97C_CATNPR PDC_TNPR
+#define AC97C_CATNCR PDC_TNCR
+#define AC97C_CARPR PDC_RPR
+#define AC97C_CARCR PDC_RCR
+#define AC97C_CARNPR PDC_RNPR
+#define AC97C_CARNCR PDC_RNCR
+#define AC97C_PTCR PDC_PTCR
+
+#define AC97C_MR_ENA (1 << 0)
+#define AC97C_MR_WRST (1 << 1)
+#define AC97C_MR_VRA (1 << 2)
+
+#define AC97C_CSR_TXRDY (1 << 0)
+#define AC97C_CSR_UNRUN (1 << 2)
+#define AC97C_CSR_RXRDY (1 << 4)
+#define AC97C_CSR_ENDTX (1 << 10)
+#define AC97C_CSR_ENDRX (1 << 14)
+
+#define AC97C_CMR_SIZE_20 (0 << 16)
+#define AC97C_CMR_SIZE_18 (1 << 16)
+#define AC97C_CMR_SIZE_16 (2 << 16)
+#define AC97C_CMR_SIZE_10 (3 << 16)
+#define AC97C_CMR_CEM_LITTLE (1 << 18)
+#define AC97C_CMR_CEM_BIG (0 << 18)
+#define AC97C_CMR_CENA (1 << 21)
+#define AC97C_CMR_DMAEN (1 << 22)
+
+#define AC97C_SR_CAEVT (1 << 3)
+
+#define AC97C_CH_ASSIGN(slot, channel) \
+ (AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3)))
+#define AC97C_CHANNEL_NONE 0x0
+#define AC97C_CHANNEL_A 0x1
+#define AC97C_CHANNEL_B 0x2
+
+#endif /* __SOUND_ATMEL_AC97C_H */
if (hw == NULL)
return -ENODEV;
- if (!hw->ops.open)
- return -ENXIO;
-
if (!try_module_get(hw->card->module))
return -EFAULT;
err = -EBUSY;
break;
}
+ if (!hw->ops.open) {
+ err = 0;
+ break;
+ }
err = hw->ops.open(hw, file);
if (err >= 0)
break;
static int snd_hwdep_release(struct inode *inode, struct file * file)
{
- int err = -ENXIO;
+ int err = 0;
struct snd_hwdep *hw = file->private_data;
struct module *mod = hw->card->module;
#endif
/**
- * snd_card_new - create and initialize a soundcard structure
+ * snd_card_create - create and initialize a soundcard structure
* @idx: card index (address) [0 ... (SNDRV_CARDS-1)]
* @xid: card identification (ASCII string)
* @module: top level module for locking
* @extra_size: allocate this extra size after the main soundcard structure
+ * @card_ret: the pointer to store the created card instance
*
* Creates and initializes a soundcard structure.
*
- * Returns kmallocated snd_card structure. Creates the ALSA control interface
- * (which is blocked until snd_card_register function is called).
+ * The function allocates snd_card instance via kzalloc with the given
+ * space for the driver to use freely. The allocated struct is stored
+ * in the given card_ret pointer.
+ *
+ * Returns zero if successful or a negative error code.
*/
-struct snd_card *snd_card_new(int idx, const char *xid,
- struct module *module, int extra_size)
+int snd_card_create(int idx, const char *xid,
+ struct module *module, int extra_size,
+ struct snd_card **card_ret)
{
struct snd_card *card;
int err, idx2;
+ if (snd_BUG_ON(!card_ret))
+ return -EINVAL;
+ *card_ret = NULL;
+
if (extra_size < 0)
extra_size = 0;
card = kzalloc(sizeof(*card) + extra_size, GFP_KERNEL);
- if (card == NULL)
- return NULL;
+ if (!card)
+ return -ENOMEM;
if (xid) {
- if (!snd_info_check_reserved_words(xid))
+ if (!snd_info_check_reserved_words(xid)) {
+ snd_printk(KERN_ERR
+ "given id string '%s' is reserved.\n", xid);
+ err = -EBUSY;
goto __error;
+ }
strlcpy(card->id, xid, sizeof(card->id));
}
err = 0;
INIT_LIST_HEAD(&card->controls);
INIT_LIST_HEAD(&card->ctl_files);
spin_lock_init(&card->files_lock);
+ INIT_LIST_HEAD(&card->files_list);
init_waitqueue_head(&card->shutdown_sleep);
#ifdef CONFIG_PM
mutex_init(&card->power_lock);
#endif
/* the control interface cannot be accessed from the user space until */
/* snd_cards_bitmask and snd_cards are set with snd_card_register */
- if ((err = snd_ctl_create(card)) < 0) {
- snd_printd("unable to register control minors\n");
+ err = snd_ctl_create(card);
+ if (err < 0) {
+ snd_printk(KERN_ERR "unable to register control minors\n");
goto __error;
}
- if ((err = snd_info_card_create(card)) < 0) {
- snd_printd("unable to create card info\n");
+ err = snd_info_card_create(card);
+ if (err < 0) {
+ snd_printk(KERN_ERR "unable to create card info\n");
goto __error_ctl;
}
if (extra_size > 0)
card->private_data = (char *)card + sizeof(struct snd_card);
- return card;
+ *card_ret = card;
+ return 0;
__error_ctl:
snd_device_free_all(card, SNDRV_DEV_CMD_PRE);
__error:
kfree(card);
- return NULL;
+ return err;
}
-
-EXPORT_SYMBOL(snd_card_new);
+EXPORT_SYMBOL(snd_card_create);
/* return non-zero if a card is already locked */
int snd_card_locked(int card)
list_for_each_entry(_df, &shutdown_files, shutdown_list) {
if (_df->file == file) {
df = _df;
+ list_del_init(&df->shutdown_list);
break;
}
}
/* phase 2: replace file->f_op with special dummy operations */
spin_lock(&card->files_lock);
- mfile = card->files;
- while (mfile) {
+ list_for_each_entry(mfile, &card->files_list, list) {
file = mfile->file;
/* it's critical part, use endless loop */
mfile->file->f_op = &snd_shutdown_f_ops;
fops_get(mfile->file->f_op);
-
- mfile = mfile->next;
}
spin_unlock(&card->files_lock);
return ret;
spin_lock(&card->files_lock);
- if (card->files == NULL)
+ if (list_empty(&card->files_list))
free_now = 1;
else
card->free_on_last_close = 1;
return ret;
/* wait, until all devices are ready for the free operation */
- wait_event(card->shutdown_sleep, card->files == NULL);
+ wait_event(card->shutdown_sleep, list_empty(&card->files_list));
snd_card_do_free(card);
return 0;
}
return -ENOMEM;
mfile->file = file;
mfile->disconnected_f_op = NULL;
- mfile->next = NULL;
spin_lock(&card->files_lock);
if (card->shutdown) {
spin_unlock(&card->files_lock);
kfree(mfile);
return -ENODEV;
}
- mfile->next = card->files;
- card->files = mfile;
+ list_add(&mfile->list, &card->files_list);
spin_unlock(&card->files_lock);
return 0;
}
*/
int snd_card_file_remove(struct snd_card *card, struct file *file)
{
- struct snd_monitor_file *mfile, *pfile = NULL;
+ struct snd_monitor_file *mfile, *found = NULL;
int last_close = 0;
spin_lock(&card->files_lock);
- mfile = card->files;
- while (mfile) {
+ list_for_each_entry(mfile, &card->files_list, list) {
if (mfile->file == file) {
- if (pfile)
- pfile->next = mfile->next;
- else
- card->files = mfile->next;
+ list_del(&mfile->list);
+ if (mfile->disconnected_f_op)
+ fops_put(mfile->disconnected_f_op);
+ found = mfile;
break;
}
- pfile = mfile;
- mfile = mfile->next;
- }
- if (mfile && mfile->disconnected_f_op) {
- fops_put(mfile->disconnected_f_op);
- spin_lock(&shutdown_lock);
- list_del(&mfile->shutdown_list);
- spin_unlock(&shutdown_lock);
}
- if (card->files == NULL)
+ if (list_empty(&card->files_list))
last_close = 1;
spin_unlock(&card->files_lock);
if (last_close) {
if (card->free_on_last_close)
snd_card_do_free(card);
}
- if (!mfile) {
+ if (!found) {
snd_printk(KERN_ERR "ALSA card file remove problem (%p)\n", file);
return -ENOENT;
}
- kfree(mfile);
+ kfree(found);
return 0;
}
#include <sound/jack.h>
#include <sound/core.h>
+static int jack_types[] = {
+ SW_HEADPHONE_INSERT,
+ SW_MICROPHONE_INSERT,
+ SW_LINEOUT_INSERT,
+ SW_JACK_PHYSICAL_INSERT,
+ SW_VIDEOOUT_INSERT,
+};
+
static int snd_jack_dev_free(struct snd_device *device)
{
struct snd_jack *jack = device->device_data;
{
struct snd_jack *jack;
int err;
+ int i;
static struct snd_device_ops ops = {
.dev_free = snd_jack_dev_free,
.dev_register = snd_jack_dev_register,
jack->type = type;
- if (type & SND_JACK_HEADPHONE)
- input_set_capability(jack->input_dev, EV_SW,
- SW_HEADPHONE_INSERT);
- if (type & SND_JACK_LINEOUT)
- input_set_capability(jack->input_dev, EV_SW,
- SW_LINEOUT_INSERT);
- if (type & SND_JACK_MICROPHONE)
- input_set_capability(jack->input_dev, EV_SW,
- SW_MICROPHONE_INSERT);
- if (type & SND_JACK_MECHANICAL)
- input_set_capability(jack->input_dev, EV_SW,
- SW_JACK_PHYSICAL_INSERT);
+ for (i = 0; i < ARRAY_SIZE(jack_types); i++)
+ if (type & (1 << i))
+ input_set_capability(jack->input_dev, EV_SW,
+ jack_types[i]);
err = snd_device_new(card, SNDRV_DEV_JACK, jack, &ops);
if (err < 0)
*/
void snd_jack_report(struct snd_jack *jack, int status)
{
+ int i;
+
if (!jack)
return;
- if (jack->type & SND_JACK_HEADPHONE)
- input_report_switch(jack->input_dev, SW_HEADPHONE_INSERT,
- status & SND_JACK_HEADPHONE);
- if (jack->type & SND_JACK_LINEOUT)
- input_report_switch(jack->input_dev, SW_LINEOUT_INSERT,
- status & SND_JACK_LINEOUT);
- if (jack->type & SND_JACK_MICROPHONE)
- input_report_switch(jack->input_dev, SW_MICROPHONE_INSERT,
- status & SND_JACK_MICROPHONE);
- if (jack->type & SND_JACK_MECHANICAL)
- input_report_switch(jack->input_dev, SW_JACK_PHYSICAL_INSERT,
- status & SND_JACK_MECHANICAL);
+ for (i = 0; i < ARRAY_SIZE(jack_types); i++) {
+ int testbit = 1 << i;
+ if (jack->type & testbit)
+ input_report_switch(jack->input_dev, jack_types[i],
+ status & testbit);
+ }
input_sync(jack->input_dev);
}
{
const struct snd_pci_quirk *q;
- for (q = list; q->subvendor; q++)
- if (q->subvendor == pci->subsystem_vendor &&
- (!q->subdevice || q->subdevice == pci->subsystem_device))
+ for (q = list; q->subvendor; q++) {
+ if (q->subvendor != pci->subsystem_vendor)
+ continue;
+ if (!q->subdevice ||
+ (pci->subsystem_device & q->subdevice_mask) == q->subdevice)
return q;
+ }
return NULL;
}
-
EXPORT_SYMBOL(snd_pci_quirk_lookup);
#endif
snd_mixer_oss_put_volume1_vol(fmixer, pslot, slot->numid[SNDRV_MIXER_OSS_ITEM_PVOLUME], left, right);
if (slot->present & SNDRV_MIXER_OSS_PRESENT_CVOLUME)
snd_mixer_oss_put_volume1_vol(fmixer, pslot, slot->numid[SNDRV_MIXER_OSS_ITEM_CVOLUME], left, right);
+ } else if (slot->present & SNDRV_MIXER_OSS_PRESENT_CVOLUME) {
+ snd_mixer_oss_put_volume1_vol(fmixer, pslot,
+ slot->numid[SNDRV_MIXER_OSS_ITEM_CVOLUME], left, right);
} else if (slot->present & SNDRV_MIXER_OSS_PRESENT_GVOLUME) {
snd_mixer_oss_put_volume1_vol(fmixer, pslot, slot->numid[SNDRV_MIXER_OSS_ITEM_GVOLUME], left, right);
} else if (slot->present & SNDRV_MIXER_OSS_PRESENT_GLOBAL) {
runtime->status->state == SNDRV_PCM_STATE_SUSPENDED) {
#ifdef OSS_DEBUG
if (runtime->status->state == SNDRV_PCM_STATE_XRUN)
- printk("pcm_oss: write: recovering from XRUN\n");
+ printk(KERN_DEBUG "pcm_oss: write: "
+ "recovering from XRUN\n");
else
- printk("pcm_oss: write: recovering from SUSPEND\n");
+ printk(KERN_DEBUG "pcm_oss: write: "
+ "recovering from SUSPEND\n");
#endif
ret = snd_pcm_oss_prepare(substream);
if (ret < 0)
runtime->status->state == SNDRV_PCM_STATE_SUSPENDED) {
#ifdef OSS_DEBUG
if (runtime->status->state == SNDRV_PCM_STATE_XRUN)
- printk("pcm_oss: read: recovering from XRUN\n");
+ printk(KERN_DEBUG "pcm_oss: read: "
+ "recovering from XRUN\n");
else
- printk("pcm_oss: read: recovering from SUSPEND\n");
+ printk(KERN_DEBUG "pcm_oss: read: "
+ "recovering from SUSPEND\n");
#endif
ret = snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_DRAIN, NULL);
if (ret < 0)
runtime->status->state == SNDRV_PCM_STATE_SUSPENDED) {
#ifdef OSS_DEBUG
if (runtime->status->state == SNDRV_PCM_STATE_XRUN)
- printk("pcm_oss: writev: recovering from XRUN\n");
+ printk(KERN_DEBUG "pcm_oss: writev: "
+ "recovering from XRUN\n");
else
- printk("pcm_oss: writev: recovering from SUSPEND\n");
+ printk(KERN_DEBUG "pcm_oss: writev: "
+ "recovering from SUSPEND\n");
#endif
ret = snd_pcm_oss_prepare(substream);
if (ret < 0)
runtime->status->state == SNDRV_PCM_STATE_SUSPENDED) {
#ifdef OSS_DEBUG
if (runtime->status->state == SNDRV_PCM_STATE_XRUN)
- printk("pcm_oss: readv: recovering from XRUN\n");
+ printk(KERN_DEBUG "pcm_oss: readv: "
+ "recovering from XRUN\n");
else
- printk("pcm_oss: readv: recovering from SUSPEND\n");
+ printk(KERN_DEBUG "pcm_oss: readv: "
+ "recovering from SUSPEND\n");
#endif
ret = snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_DRAIN, NULL);
if (ret < 0)
init_waitqueue_entry(&wait, current);
add_wait_queue(&runtime->sleep, &wait);
#ifdef OSS_DEBUG
- printk("sync1: size = %li\n", size);
+ printk(KERN_DEBUG "sync1: size = %li\n", size);
#endif
while (1) {
result = snd_pcm_oss_write2(substream, runtime->oss.buffer, size, 1);
mutex_lock(&runtime->oss.params_lock);
if (runtime->oss.buffer_used > 0) {
#ifdef OSS_DEBUG
- printk("sync: buffer_used\n");
+ printk(KERN_DEBUG "sync: buffer_used\n");
#endif
size = (8 * (runtime->oss.period_bytes - runtime->oss.buffer_used) + 7) / width;
snd_pcm_format_set_silence(format,
}
} else if (runtime->oss.period_ptr > 0) {
#ifdef OSS_DEBUG
- printk("sync: period_ptr\n");
+ printk(KERN_DEBUG "sync: period_ptr\n");
#endif
size = runtime->oss.period_bytes - runtime->oss.period_ptr;
snd_pcm_format_set_silence(format,
int err, cmd;
#ifdef OSS_DEBUG
- printk("pcm_oss: trigger = 0x%x\n", trigger);
+ printk(KERN_DEBUG "pcm_oss: trigger = 0x%x\n", trigger);
#endif
psubstream = pcm_oss_file->streams[SNDRV_PCM_STREAM_PLAYBACK];
}
#ifdef OSS_DEBUG
- printk("pcm_oss: space: bytes = %i, fragments = %i, fragstotal = %i, fragsize = %i\n", info.bytes, info.fragments, info.fragstotal, info.fragsize);
+ printk(KERN_DEBUG "pcm_oss: space: bytes = %i, fragments = %i, "
+ "fragstotal = %i, fragsize = %i\n",
+ info.bytes, info.fragments, info.fragstotal, info.fragsize);
#endif
if (copy_to_user(_info, &info, sizeof(info)))
return -EFAULT;
if (((cmd >> 8) & 0xff) != 'P')
return -EINVAL;
#ifdef OSS_DEBUG
- printk("pcm_oss: ioctl = 0x%x\n", cmd);
+ printk(KERN_DEBUG "pcm_oss: ioctl = 0x%x\n", cmd);
#endif
switch (cmd) {
case SNDCTL_DSP_RESET:
#else
{
ssize_t res = snd_pcm_oss_read1(substream, buf, count);
- printk("pcm_oss: read %li bytes (returned %li bytes)\n", (long)count, (long)res);
+ printk(KERN_DEBUG "pcm_oss: read %li bytes "
+ "(returned %li bytes)\n", (long)count, (long)res);
return res;
}
#endif
substream->f_flags = file->f_flags & O_NONBLOCK;
result = snd_pcm_oss_write1(substream, buf, count);
#ifdef OSS_DEBUG
- printk("pcm_oss: write %li bytes (wrote %li bytes)\n", (long)count, (long)result);
+ printk(KERN_DEBUG "pcm_oss: write %li bytes (wrote %li bytes)\n",
+ (long)count, (long)result);
#endif
return result;
}
int err;
#ifdef OSS_DEBUG
- printk("pcm_oss: mmap begin\n");
+ printk(KERN_DEBUG "pcm_oss: mmap begin\n");
#endif
pcm_oss_file = file->private_data;
switch ((area->vm_flags & (VM_READ | VM_WRITE))) {
runtime->silence_threshold = 0;
runtime->silence_size = 0;
#ifdef OSS_DEBUG
- printk("pcm_oss: mmap ok, bytes = 0x%x\n", runtime->oss.mmap_bytes);
+ printk(KERN_DEBUG "pcm_oss: mmap ok, bytes = 0x%x\n",
+ runtime->oss.mmap_bytes);
#endif
/* In mmap mode we never stop */
runtime->stop_threshold = runtime->boundary;
setup = kmalloc(sizeof(*setup), GFP_KERNEL);
if (! setup) {
buffer->error = -ENOMEM;
- mutex_lock(&pstr->oss.setup_mutex);
+ mutex_unlock(&pstr->oss.setup_mutex);
return;
}
if (pstr->oss.setup_list == NULL)
if (! template.task_name) {
kfree(setup);
buffer->error = -ENOMEM;
- mutex_lock(&pstr->oss.setup_mutex);
+ mutex_unlock(&pstr->oss.setup_mutex);
return;
}
}
#endif
#ifdef PLUGIN_DEBUG
-#define pdprintf( fmt, args... ) printk( "plugin: " fmt, ##args)
+#define pdprintf(fmt, args...) printk(KERN_DEBUG "plugin: " fmt, ##args)
#else
-#define pdprintf( fmt, args... )
+#define pdprintf(fmt, args...)
#endif
#endif /* __PCM_PLUGIN_H */
spin_lock_init(&substream->self_group.lock);
INIT_LIST_HEAD(&substream->self_group.substreams);
list_add_tail(&substream->link_list, &substream->self_group.substreams);
- spin_lock_init(&substream->timer_lock);
atomic_set(&substream->mmap_count, 0);
prev = substream;
}
*
* Returns zero if successful, or a negative error code on failure.
*/
-int snd_pcm_new(struct snd_card *card, char *id, int device,
+int snd_pcm_new(struct snd_card *card, const char *id, int device,
int playback_count, int capture_count,
struct snd_pcm ** rpcm)
{
}
}
+#ifdef CONFIG_SND_PCM_XRUN_DEBUG
+#define xrun_debug(substream) ((substream)->pstr->xrun_debug)
+#else
+#define xrun_debug(substream) 0
+#endif
+
+#define dump_stack_on_xrun(substream) do { \
+ if (xrun_debug(substream) > 1) \
+ dump_stack(); \
+ } while (0)
+
static void xrun(struct snd_pcm_substream *substream)
{
snd_pcm_stop(substream, SNDRV_PCM_STATE_XRUN);
-#ifdef CONFIG_SND_PCM_XRUN_DEBUG
- if (substream->pstr->xrun_debug) {
+ if (xrun_debug(substream)) {
snd_printd(KERN_DEBUG "XRUN: pcmC%dD%d%c\n",
substream->pcm->card->number,
substream->pcm->device,
substream->stream ? 'c' : 'p');
- if (substream->pstr->xrun_debug > 1)
- dump_stack();
+ dump_stack_on_xrun(substream);
}
-#endif
}
-static inline snd_pcm_uframes_t snd_pcm_update_hw_ptr_pos(struct snd_pcm_substream *substream,
- struct snd_pcm_runtime *runtime)
+static snd_pcm_uframes_t
+snd_pcm_update_hw_ptr_pos(struct snd_pcm_substream *substream,
+ struct snd_pcm_runtime *runtime)
{
snd_pcm_uframes_t pos;
pos = substream->ops->pointer(substream);
if (pos == SNDRV_PCM_POS_XRUN)
return pos; /* XRUN */
-#ifdef CONFIG_SND_DEBUG
if (pos >= runtime->buffer_size) {
- snd_printk(KERN_ERR "BUG: stream = %i, pos = 0x%lx, buffer size = 0x%lx, period size = 0x%lx\n", substream->stream, pos, runtime->buffer_size, runtime->period_size);
+ if (printk_ratelimit()) {
+ snd_printd(KERN_ERR "BUG: stream = %i, pos = 0x%lx, "
+ "buffer size = 0x%lx, period size = 0x%lx\n",
+ substream->stream, pos, runtime->buffer_size,
+ runtime->period_size);
+ }
+ pos = 0;
}
-#endif
pos -= pos % runtime->min_align;
return pos;
}
-static inline int snd_pcm_update_hw_ptr_post(struct snd_pcm_substream *substream,
- struct snd_pcm_runtime *runtime)
+static int snd_pcm_update_hw_ptr_post(struct snd_pcm_substream *substream,
+ struct snd_pcm_runtime *runtime)
{
snd_pcm_uframes_t avail;
return 0;
}
-static inline int snd_pcm_update_hw_ptr_interrupt(struct snd_pcm_substream *substream)
+#define hw_ptr_error(substream, fmt, args...) \
+ do { \
+ if (xrun_debug(substream)) { \
+ if (printk_ratelimit()) { \
+ snd_printd("PCM: " fmt, ##args); \
+ } \
+ dump_stack_on_xrun(substream); \
+ } \
+ } while (0)
+
+static int snd_pcm_update_hw_ptr_interrupt(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
snd_pcm_uframes_t pos;
- snd_pcm_uframes_t new_hw_ptr, hw_ptr_interrupt;
+ snd_pcm_uframes_t new_hw_ptr, hw_ptr_interrupt, hw_base;
snd_pcm_sframes_t delta;
pos = snd_pcm_update_hw_ptr_pos(substream, runtime);
xrun(substream);
return -EPIPE;
}
- if (runtime->period_size == runtime->buffer_size)
- goto __next_buf;
- new_hw_ptr = runtime->hw_ptr_base + pos;
+ hw_base = runtime->hw_ptr_base;
+ new_hw_ptr = hw_base + pos;
hw_ptr_interrupt = runtime->hw_ptr_interrupt + runtime->period_size;
-
- delta = hw_ptr_interrupt - new_hw_ptr;
- if (delta > 0) {
- if ((snd_pcm_uframes_t)delta < runtime->buffer_size / 2) {
-#ifdef CONFIG_SND_PCM_XRUN_DEBUG
- if (runtime->periods > 1 && substream->pstr->xrun_debug) {
- snd_printd(KERN_ERR "Unexpected hw_pointer value [1] (stream = %i, delta: -%ld, max jitter = %ld): wrong interrupt acknowledge?\n", substream->stream, (long) delta, runtime->buffer_size / 2);
- if (substream->pstr->xrun_debug > 1)
- dump_stack();
- }
-#endif
- return 0;
+ delta = new_hw_ptr - hw_ptr_interrupt;
+ if (hw_ptr_interrupt >= runtime->boundary) {
+ hw_ptr_interrupt -= runtime->boundary;
+ if (hw_base < runtime->boundary / 2)
+ /* hw_base was already lapped; recalc delta */
+ delta = new_hw_ptr - hw_ptr_interrupt;
+ }
+ if (delta < 0) {
+ delta += runtime->buffer_size;
+ if (delta < 0) {
+ hw_ptr_error(substream,
+ "Unexpected hw_pointer value "
+ "(stream=%i, pos=%ld, intr_ptr=%ld)\n",
+ substream->stream, (long)pos,
+ (long)hw_ptr_interrupt);
+ /* rebase to interrupt position */
+ hw_base = new_hw_ptr = hw_ptr_interrupt;
+ /* align hw_base to buffer_size */
+ hw_base -= hw_base % runtime->buffer_size;
+ delta = 0;
+ } else {
+ hw_base += runtime->buffer_size;
+ if (hw_base >= runtime->boundary)
+ hw_base = 0;
+ new_hw_ptr = hw_base + pos;
}
- __next_buf:
- runtime->hw_ptr_base += runtime->buffer_size;
- if (runtime->hw_ptr_base == runtime->boundary)
- runtime->hw_ptr_base = 0;
- new_hw_ptr = runtime->hw_ptr_base + pos;
}
-
+ if (delta > runtime->period_size) {
+ hw_ptr_error(substream,
+ "Lost interrupts? "
+ "(stream=%i, delta=%ld, intr_ptr=%ld)\n",
+ substream->stream, (long)delta,
+ (long)hw_ptr_interrupt);
+ /* rebase hw_ptr_interrupt */
+ hw_ptr_interrupt =
+ new_hw_ptr - new_hw_ptr % runtime->period_size;
+ }
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
runtime->silence_size > 0)
snd_pcm_playback_silence(substream, new_hw_ptr);
+ runtime->hw_ptr_base = hw_base;
runtime->status->hw_ptr = new_hw_ptr;
- runtime->hw_ptr_interrupt = new_hw_ptr - new_hw_ptr % runtime->period_size;
+ runtime->hw_ptr_interrupt = hw_ptr_interrupt;
return snd_pcm_update_hw_ptr_post(substream, runtime);
}
{
struct snd_pcm_runtime *runtime = substream->runtime;
snd_pcm_uframes_t pos;
- snd_pcm_uframes_t old_hw_ptr, new_hw_ptr;
+ snd_pcm_uframes_t old_hw_ptr, new_hw_ptr, hw_base;
snd_pcm_sframes_t delta;
old_hw_ptr = runtime->status->hw_ptr;
xrun(substream);
return -EPIPE;
}
- new_hw_ptr = runtime->hw_ptr_base + pos;
-
- delta = old_hw_ptr - new_hw_ptr;
- if (delta > 0) {
- if ((snd_pcm_uframes_t)delta < runtime->buffer_size / 2) {
-#ifdef CONFIG_SND_PCM_XRUN_DEBUG
- if (runtime->periods > 2 && substream->pstr->xrun_debug) {
- snd_printd(KERN_ERR "Unexpected hw_pointer value [2] (stream = %i, delta: -%ld, max jitter = %ld): wrong interrupt acknowledge?\n", substream->stream, (long) delta, runtime->buffer_size / 2);
- if (substream->pstr->xrun_debug > 1)
- dump_stack();
- }
-#endif
+ hw_base = runtime->hw_ptr_base;
+ new_hw_ptr = hw_base + pos;
+
+ delta = new_hw_ptr - old_hw_ptr;
+ if (delta < 0) {
+ delta += runtime->buffer_size;
+ if (delta < 0) {
+ hw_ptr_error(substream,
+ "Unexpected hw_pointer value [2] "
+ "(stream=%i, pos=%ld, old_ptr=%ld)\n",
+ substream->stream, (long)pos,
+ (long)old_hw_ptr);
return 0;
}
- runtime->hw_ptr_base += runtime->buffer_size;
- if (runtime->hw_ptr_base == runtime->boundary)
- runtime->hw_ptr_base = 0;
- new_hw_ptr = runtime->hw_ptr_base + pos;
+ hw_base += runtime->buffer_size;
+ if (hw_base >= runtime->boundary)
+ hw_base = 0;
+ new_hw_ptr = hw_base + pos;
+ }
+ if (delta > runtime->period_size && runtime->periods > 1) {
+ hw_ptr_error(substream,
+ "hw_ptr skipping! "
+ "(pos=%ld, delta=%ld, period=%ld)\n",
+ (long)pos, (long)delta,
+ (long)runtime->period_size);
+ return 0;
}
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
runtime->silence_size > 0)
snd_pcm_playback_silence(substream, new_hw_ptr);
+ runtime->hw_ptr_base = hw_base;
runtime->status->hw_ptr = new_hw_ptr;
return snd_pcm_update_hw_ptr_post(substream, runtime);
if (!(params->rmask & (1 << k)))
continue;
#ifdef RULES_DEBUG
- printk("%s = ", snd_pcm_hw_param_names[k]);
+ printk(KERN_DEBUG "%s = ", snd_pcm_hw_param_names[k]);
printk("%04x%04x%04x%04x -> ", m->bits[3], m->bits[2], m->bits[1], m->bits[0]);
#endif
changed = snd_mask_refine(m, constrs_mask(constrs, k));
if (!(params->rmask & (1 << k)))
continue;
#ifdef RULES_DEBUG
- printk("%s = ", snd_pcm_hw_param_names[k]);
+ printk(KERN_DEBUG "%s = ", snd_pcm_hw_param_names[k]);
if (i->empty)
printk("empty");
else
if (!doit)
continue;
#ifdef RULES_DEBUG
- printk("Rule %d [%p]: ", k, r->func);
+ printk(KERN_DEBUG "Rule %d [%p]: ", k, r->func);
if (r->var >= 0) {
printk("%s = ", snd_pcm_hw_param_names[r->var]);
if (hw_is_mask(r->var)) {
static int snd_pcm_timer_start(struct snd_timer * timer)
{
- unsigned long flags;
struct snd_pcm_substream *substream;
substream = snd_timer_chip(timer);
- spin_lock_irqsave(&substream->timer_lock, flags);
substream->timer_running = 1;
- spin_unlock_irqrestore(&substream->timer_lock, flags);
return 0;
}
static int snd_pcm_timer_stop(struct snd_timer * timer)
{
- unsigned long flags;
struct snd_pcm_substream *substream;
substream = snd_timer_chip(timer);
- spin_lock_irqsave(&substream->timer_lock, flags);
substream->timer_running = 0;
- spin_unlock_irqrestore(&substream->timer_lock, flags);
return 0;
}
return 0;
}
-int snd_rawmidi_kernel_open(struct snd_card *card, int device, int subdevice,
- int mode, struct snd_rawmidi_file * rfile)
+/* look for an available substream for the given stream direction;
+ * if a specific subdevice is given, try to assign it
+ */
+static int assign_substream(struct snd_rawmidi *rmidi, int subdevice,
+ int stream, int mode,
+ struct snd_rawmidi_substream **sub_ret)
+{
+ struct snd_rawmidi_substream *substream;
+ struct snd_rawmidi_str *s = &rmidi->streams[stream];
+ static unsigned int info_flags[2] = {
+ [SNDRV_RAWMIDI_STREAM_OUTPUT] = SNDRV_RAWMIDI_INFO_OUTPUT,
+ [SNDRV_RAWMIDI_STREAM_INPUT] = SNDRV_RAWMIDI_INFO_INPUT,
+ };
+
+ if (!(rmidi->info_flags & info_flags[stream]))
+ return -ENXIO;
+ if (subdevice >= 0 && subdevice >= s->substream_count)
+ return -ENODEV;
+ if (s->substream_opened >= s->substream_count)
+ return -EAGAIN;
+
+ list_for_each_entry(substream, &s->substreams, list) {
+ if (substream->opened) {
+ if (stream == SNDRV_RAWMIDI_STREAM_INPUT ||
+ !(mode & SNDRV_RAWMIDI_LFLG_APPEND))
+ continue;
+ }
+ if (subdevice < 0 || subdevice == substream->number) {
+ *sub_ret = substream;
+ return 0;
+ }
+ }
+ return -EAGAIN;
+}
+
+/* open and do ref-counting for the given substream */
+static int open_substream(struct snd_rawmidi *rmidi,
+ struct snd_rawmidi_substream *substream,
+ int mode)
+{
+ int err;
+
+ err = snd_rawmidi_runtime_create(substream);
+ if (err < 0)
+ return err;
+ err = substream->ops->open(substream);
+ if (err < 0)
+ return err;
+ substream->opened = 1;
+ if (substream->use_count++ == 0)
+ substream->active_sensing = 1;
+ if (mode & SNDRV_RAWMIDI_LFLG_APPEND)
+ substream->append = 1;
+ rmidi->streams[substream->stream].substream_opened++;
+ return 0;
+}
+
+static void close_substream(struct snd_rawmidi *rmidi,
+ struct snd_rawmidi_substream *substream,
+ int cleanup);
+
+static int rawmidi_open_priv(struct snd_rawmidi *rmidi, int subdevice, int mode,
+ struct snd_rawmidi_file *rfile)
{
- struct snd_rawmidi *rmidi;
- struct list_head *list1, *list2;
struct snd_rawmidi_substream *sinput = NULL, *soutput = NULL;
- struct snd_rawmidi_runtime *input = NULL, *output = NULL;
int err;
- if (rfile)
- rfile->input = rfile->output = NULL;
- mutex_lock(®ister_mutex);
- rmidi = snd_rawmidi_search(card, device);
- mutex_unlock(®ister_mutex);
- if (rmidi == NULL) {
- err = -ENODEV;
- goto __error1;
- }
- if (!try_module_get(rmidi->card->module)) {
- err = -EFAULT;
- goto __error1;
- }
- if (!(mode & SNDRV_RAWMIDI_LFLG_NOOPENLOCK))
- mutex_lock(&rmidi->open_mutex);
+ rfile->input = rfile->output = NULL;
if (mode & SNDRV_RAWMIDI_LFLG_INPUT) {
- if (!(rmidi->info_flags & SNDRV_RAWMIDI_INFO_INPUT)) {
- err = -ENXIO;
- goto __error;
- }
- if (subdevice >= 0 && (unsigned int)subdevice >= rmidi->streams[SNDRV_RAWMIDI_STREAM_INPUT].substream_count) {
- err = -ENODEV;
- goto __error;
- }
- if (rmidi->streams[SNDRV_RAWMIDI_STREAM_INPUT].substream_opened >=
- rmidi->streams[SNDRV_RAWMIDI_STREAM_INPUT].substream_count) {
- err = -EAGAIN;
+ err = assign_substream(rmidi, subdevice,
+ SNDRV_RAWMIDI_STREAM_INPUT,
+ mode, &sinput);
+ if (err < 0)
goto __error;
- }
}
if (mode & SNDRV_RAWMIDI_LFLG_OUTPUT) {
- if (!(rmidi->info_flags & SNDRV_RAWMIDI_INFO_OUTPUT)) {
- err = -ENXIO;
- goto __error;
- }
- if (subdevice >= 0 && (unsigned int)subdevice >= rmidi->streams[SNDRV_RAWMIDI_STREAM_OUTPUT].substream_count) {
- err = -ENODEV;
- goto __error;
- }
- if (rmidi->streams[SNDRV_RAWMIDI_STREAM_OUTPUT].substream_opened >=
- rmidi->streams[SNDRV_RAWMIDI_STREAM_OUTPUT].substream_count) {
- err = -EAGAIN;
+ err = assign_substream(rmidi, subdevice,
+ SNDRV_RAWMIDI_STREAM_OUTPUT,
+ mode, &soutput);
+ if (err < 0)
goto __error;
- }
- }
- list1 = rmidi->streams[SNDRV_RAWMIDI_STREAM_INPUT].substreams.next;
- while (1) {
- if (list1 == &rmidi->streams[SNDRV_RAWMIDI_STREAM_INPUT].substreams) {
- sinput = NULL;
- if (mode & SNDRV_RAWMIDI_LFLG_INPUT) {
- err = -EAGAIN;
- goto __error;
- }
- break;
- }
- sinput = list_entry(list1, struct snd_rawmidi_substream, list);
- if ((mode & SNDRV_RAWMIDI_LFLG_INPUT) && sinput->opened)
- goto __nexti;
- if (subdevice < 0 || (subdevice >= 0 && subdevice == sinput->number))
- break;
- __nexti:
- list1 = list1->next;
}
- list2 = rmidi->streams[SNDRV_RAWMIDI_STREAM_OUTPUT].substreams.next;
- while (1) {
- if (list2 == &rmidi->streams[SNDRV_RAWMIDI_STREAM_OUTPUT].substreams) {
- soutput = NULL;
- if (mode & SNDRV_RAWMIDI_LFLG_OUTPUT) {
- err = -EAGAIN;
- goto __error;
- }
- break;
- }
- soutput = list_entry(list2, struct snd_rawmidi_substream, list);
- if (mode & SNDRV_RAWMIDI_LFLG_OUTPUT) {
- if (mode & SNDRV_RAWMIDI_LFLG_APPEND) {
- if (soutput->opened && !soutput->append)
- goto __nexto;
- } else {
- if (soutput->opened)
- goto __nexto;
- }
- }
- if (subdevice < 0 || (subdevice >= 0 && subdevice == soutput->number))
- break;
- __nexto:
- list2 = list2->next;
- }
- if (mode & SNDRV_RAWMIDI_LFLG_INPUT) {
- if ((err = snd_rawmidi_runtime_create(sinput)) < 0)
- goto __error;
- input = sinput->runtime;
- if ((err = sinput->ops->open(sinput)) < 0)
+
+ if (sinput) {
+ err = open_substream(rmidi, sinput, mode);
+ if (err < 0)
goto __error;
- sinput->opened = 1;
- rmidi->streams[SNDRV_RAWMIDI_STREAM_INPUT].substream_opened++;
- } else {
- sinput = NULL;
}
- if (mode & SNDRV_RAWMIDI_LFLG_OUTPUT) {
- if (soutput->opened)
- goto __skip_output;
- if ((err = snd_rawmidi_runtime_create(soutput)) < 0) {
- if (mode & SNDRV_RAWMIDI_LFLG_INPUT)
- sinput->ops->close(sinput);
- goto __error;
- }
- output = soutput->runtime;
- if ((err = soutput->ops->open(soutput)) < 0) {
- if (mode & SNDRV_RAWMIDI_LFLG_INPUT)
- sinput->ops->close(sinput);
+ if (soutput) {
+ err = open_substream(rmidi, soutput, mode);
+ if (err < 0) {
+ if (sinput)
+ close_substream(rmidi, sinput, 0);
goto __error;
}
- __skip_output:
- soutput->opened = 1;
- if (mode & SNDRV_RAWMIDI_LFLG_APPEND)
- soutput->append = 1;
- if (soutput->use_count++ == 0)
- soutput->active_sensing = 1;
- rmidi->streams[SNDRV_RAWMIDI_STREAM_OUTPUT].substream_opened++;
- } else {
- soutput = NULL;
- }
- if (!(mode & SNDRV_RAWMIDI_LFLG_NOOPENLOCK))
- mutex_unlock(&rmidi->open_mutex);
- if (rfile) {
- rfile->rmidi = rmidi;
- rfile->input = sinput;
- rfile->output = soutput;
}
+
+ rfile->rmidi = rmidi;
+ rfile->input = sinput;
+ rfile->output = soutput;
return 0;
__error:
- if (input != NULL)
+ if (sinput && sinput->runtime)
snd_rawmidi_runtime_free(sinput);
- if (output != NULL)
+ if (soutput && soutput->runtime)
snd_rawmidi_runtime_free(soutput);
- module_put(rmidi->card->module);
- if (!(mode & SNDRV_RAWMIDI_LFLG_NOOPENLOCK))
- mutex_unlock(&rmidi->open_mutex);
- __error1:
+ return err;
+}
+
+/* called from sound/core/seq/seq_midi.c */
+int snd_rawmidi_kernel_open(struct snd_card *card, int device, int subdevice,
+ int mode, struct snd_rawmidi_file * rfile)
+{
+ struct snd_rawmidi *rmidi;
+ int err;
+
+ if (snd_BUG_ON(!rfile))
+ return -EINVAL;
+
+ mutex_lock(®ister_mutex);
+ rmidi = snd_rawmidi_search(card, device);
+ if (rmidi == NULL) {
+ mutex_unlock(®ister_mutex);
+ return -ENODEV;
+ }
+ if (!try_module_get(rmidi->card->module)) {
+ mutex_unlock(®ister_mutex);
+ return -ENXIO;
+ }
+ mutex_unlock(®ister_mutex);
+
+ mutex_lock(&rmidi->open_mutex);
+ err = rawmidi_open_priv(rmidi, subdevice, mode, rfile);
+ mutex_unlock(&rmidi->open_mutex);
+ if (err < 0)
+ module_put(rmidi->card->module);
return err;
}
unsigned short fflags;
int err;
struct snd_rawmidi *rmidi;
- struct snd_rawmidi_file *rawmidi_file;
+ struct snd_rawmidi_file *rawmidi_file = NULL;
wait_queue_t wait;
struct snd_ctl_file *kctl;
+ if ((file->f_flags & O_APPEND) && !(file->f_flags & O_NONBLOCK))
+ return -EINVAL; /* invalid combination */
+
if (maj == snd_major) {
rmidi = snd_lookup_minor_data(iminor(inode),
SNDRV_DEVICE_TYPE_RAWMIDI);
if (rmidi == NULL)
return -ENODEV;
- if ((file->f_flags & O_APPEND) && !(file->f_flags & O_NONBLOCK))
- return -EINVAL; /* invalid combination */
+
+ if (!try_module_get(rmidi->card->module))
+ return -ENXIO;
+
+ mutex_lock(&rmidi->open_mutex);
card = rmidi->card;
err = snd_card_file_add(card, file);
if (err < 0)
- return -ENODEV;
+ goto __error_card;
fflags = snd_rawmidi_file_flags(file);
if ((file->f_flags & O_APPEND) || maj == SOUND_MAJOR) /* OSS emul? */
fflags |= SNDRV_RAWMIDI_LFLG_APPEND;
- fflags |= SNDRV_RAWMIDI_LFLG_NOOPENLOCK;
rawmidi_file = kmalloc(sizeof(*rawmidi_file), GFP_KERNEL);
if (rawmidi_file == NULL) {
- snd_card_file_remove(card, file);
- return -ENOMEM;
+ err = -ENOMEM;
+ goto __error;
}
init_waitqueue_entry(&wait, current);
add_wait_queue(&rmidi->open_wait, &wait);
- mutex_lock(&rmidi->open_mutex);
while (1) {
subdevice = -1;
read_lock(&card->ctl_files_rwlock);
}
}
read_unlock(&card->ctl_files_rwlock);
- err = snd_rawmidi_kernel_open(rmidi->card, rmidi->device,
- subdevice, fflags, rawmidi_file);
+ err = rawmidi_open_priv(rmidi, subdevice, fflags, rawmidi_file);
if (err >= 0)
break;
if (err == -EAGAIN) {
break;
}
}
+ remove_wait_queue(&rmidi->open_wait, &wait);
+ if (err < 0) {
+ kfree(rawmidi_file);
+ goto __error;
+ }
#ifdef CONFIG_SND_OSSEMUL
if (rawmidi_file->input && rawmidi_file->input->runtime)
rawmidi_file->input->runtime->oss = (maj == SOUND_MAJOR);
if (rawmidi_file->output && rawmidi_file->output->runtime)
rawmidi_file->output->runtime->oss = (maj == SOUND_MAJOR);
#endif
- remove_wait_queue(&rmidi->open_wait, &wait);
- if (err >= 0) {
- file->private_data = rawmidi_file;
- } else {
- snd_card_file_remove(card, file);
- kfree(rawmidi_file);
- }
+ file->private_data = rawmidi_file;
+ mutex_unlock(&rmidi->open_mutex);
+ return 0;
+
+ __error:
+ snd_card_file_remove(card, file);
+ __error_card:
mutex_unlock(&rmidi->open_mutex);
+ module_put(rmidi->card->module);
return err;
}
-int snd_rawmidi_kernel_release(struct snd_rawmidi_file * rfile)
+static void close_substream(struct snd_rawmidi *rmidi,
+ struct snd_rawmidi_substream *substream,
+ int cleanup)
{
- struct snd_rawmidi *rmidi;
- struct snd_rawmidi_substream *substream;
- struct snd_rawmidi_runtime *runtime;
+ rmidi->streams[substream->stream].substream_opened--;
+ if (--substream->use_count)
+ return;
- if (snd_BUG_ON(!rfile))
- return -ENXIO;
- rmidi = rfile->rmidi;
- mutex_lock(&rmidi->open_mutex);
- if (rfile->input != NULL) {
- substream = rfile->input;
- rfile->input = NULL;
- runtime = substream->runtime;
- snd_rawmidi_input_trigger(substream, 0);
- substream->ops->close(substream);
- if (runtime->private_free != NULL)
- runtime->private_free(substream);
- snd_rawmidi_runtime_free(substream);
- substream->opened = 0;
- rmidi->streams[SNDRV_RAWMIDI_STREAM_INPUT].substream_opened--;
- }
- if (rfile->output != NULL) {
- substream = rfile->output;
- rfile->output = NULL;
- if (--substream->use_count == 0) {
- runtime = substream->runtime;
+ if (cleanup) {
+ if (substream->stream == SNDRV_RAWMIDI_STREAM_INPUT)
+ snd_rawmidi_input_trigger(substream, 0);
+ else {
if (substream->active_sensing) {
unsigned char buf = 0xfe;
- /* sending single active sensing message to shut the device up */
+ /* sending single active sensing message
+ * to shut the device up
+ */
snd_rawmidi_kernel_write(substream, &buf, 1);
}
if (snd_rawmidi_drain_output(substream) == -ERESTARTSYS)
snd_rawmidi_output_trigger(substream, 0);
- substream->ops->close(substream);
- if (runtime->private_free != NULL)
- runtime->private_free(substream);
- snd_rawmidi_runtime_free(substream);
- substream->opened = 0;
- substream->append = 0;
}
- rmidi->streams[SNDRV_RAWMIDI_STREAM_OUTPUT].substream_opened--;
}
+ substream->ops->close(substream);
+ if (substream->runtime->private_free)
+ substream->runtime->private_free(substream);
+ snd_rawmidi_runtime_free(substream);
+ substream->opened = 0;
+ substream->append = 0;
+}
+
+static void rawmidi_release_priv(struct snd_rawmidi_file *rfile)
+{
+ struct snd_rawmidi *rmidi;
+
+ rmidi = rfile->rmidi;
+ mutex_lock(&rmidi->open_mutex);
+ if (rfile->input) {
+ close_substream(rmidi, rfile->input, 1);
+ rfile->input = NULL;
+ }
+ if (rfile->output) {
+ close_substream(rmidi, rfile->output, 1);
+ rfile->output = NULL;
+ }
+ rfile->rmidi = NULL;
mutex_unlock(&rmidi->open_mutex);
+ wake_up(&rmidi->open_wait);
+}
+
+/* called from sound/core/seq/seq_midi.c */
+int snd_rawmidi_kernel_release(struct snd_rawmidi_file *rfile)
+{
+ struct snd_rawmidi *rmidi;
+
+ if (snd_BUG_ON(!rfile))
+ return -ENXIO;
+
+ rmidi = rfile->rmidi;
+ rawmidi_release_priv(rfile);
module_put(rmidi->card->module);
return 0;
}
{
struct snd_rawmidi_file *rfile;
struct snd_rawmidi *rmidi;
- int err;
rfile = file->private_data;
- err = snd_rawmidi_kernel_release(rfile);
rmidi = rfile->rmidi;
- wake_up(&rmidi->open_wait);
+ rawmidi_release_priv(rfile);
kfree(rfile);
snd_card_file_remove(rmidi->card, file);
- return err;
+ module_put(rmidi->card->module);
+ return 0;
}
static int snd_rawmidi_info(struct snd_rawmidi_substream *substream,
/* for debug */
#ifdef SNDRV_SEQ_OSS_DEBUG
extern int seq_oss_debug;
-#define debug_printk(x) do { if (seq_oss_debug > 0) snd_printk x; } while (0)
+#define debug_printk(x) do { if (seq_oss_debug > 0) snd_printd x; } while (0)
#else
#define debug_printk(x) /**/
#endif
freeprev = cell;
} else {
#if 0
- printk("type = %i, source = %i, dest = %i, client = %i\n",
+ printk(KERN_DEBUG "type = %i, source = %i, dest = %i, "
+ "client = %i\n",
cell->event.type,
cell->event.source.client,
cell->event.dest.client,
if (! sgbuf)
return -EINVAL;
+ if (dmab->area)
+ vunmap(dmab->area);
+ dmab->area = NULL;
+
tmpb.dev.type = SNDRV_DMA_TYPE_DEV;
tmpb.dev.dev = sgbuf->dev;
for (i = 0; i < sgbuf->pages; i++) {
tmpb.bytes = (sgbuf->table[i].addr & ~PAGE_MASK) << PAGE_SHIFT;
snd_dma_free_pages(&tmpb);
}
- if (dmab->area)
- vunmap(dmab->area);
- dmab->area = NULL;
kfree(sgbuf->table);
kfree(sgbuf->page_table);
struct link_master *master;
struct link_ctl_info info;
int vals[2]; /* current values */
+ unsigned int flags;
struct snd_kcontrol slave; /* the copy of original control entry */
};
+static int slave_update(struct link_slave *slave)
+{
+ struct snd_ctl_elem_value *uctl;
+ int err, ch;
+
+ uctl = kmalloc(sizeof(*uctl), GFP_KERNEL);
+ if (!uctl)
+ return -ENOMEM;
+ uctl->id = slave->slave.id;
+ err = slave->slave.get(&slave->slave, uctl);
+ for (ch = 0; ch < slave->info.count; ch++)
+ slave->vals[ch] = uctl->value.integer.value[ch];
+ kfree(uctl);
+ return 0;
+}
+
/* get the slave ctl info and save the initial values */
static int slave_init(struct link_slave *slave)
{
struct snd_ctl_elem_info *uinfo;
- struct snd_ctl_elem_value *uctl;
- int err, ch;
+ int err;
- if (slave->info.count)
- return 0; /* already initialized */
+ if (slave->info.count) {
+ /* already initialized */
+ if (slave->flags & SND_CTL_SLAVE_NEED_UPDATE)
+ return slave_update(slave);
+ return 0;
+ }
uinfo = kmalloc(sizeof(*uinfo), GFP_KERNEL);
if (!uinfo)
slave->info.max_val = uinfo->value.integer.max;
kfree(uinfo);
- uctl = kmalloc(sizeof(*uctl), GFP_KERNEL);
- if (!uctl)
- return -ENOMEM;
- uctl->id = slave->slave.id;
- err = slave->slave.get(&slave->slave, uctl);
- for (ch = 0; ch < slave->info.count; ch++)
- slave->vals[ch] = uctl->value.integer.value[ch];
- kfree(uctl);
- return 0;
+ return slave_update(slave);
}
/* initialize master volume */
* - logarithmic volume control (dB level), no linear volume
* - master can only attenuate the volume, no gain
*/
-int snd_ctl_add_slave(struct snd_kcontrol *master, struct snd_kcontrol *slave)
+int _snd_ctl_add_slave(struct snd_kcontrol *master, struct snd_kcontrol *slave,
+ unsigned int flags)
{
struct link_master *master_link = snd_kcontrol_chip(master);
struct link_slave *srec;
srec->slave = *slave;
memcpy(srec->slave.vd, slave->vd, slave->count * sizeof(*slave->vd));
srec->master = master_link;
+ srec->flags = flags;
/* override callbacks */
slave->info = slave_info;
list_add_tail(&srec->list, &master_link->slaves);
return 0;
}
-
-EXPORT_SYMBOL(snd_ctl_add_slave);
+EXPORT_SYMBOL(_snd_ctl_add_slave);
/*
* ctl callbacks for master controls
}
-/*
- * Create a virtual master control with the given name
+/**
+ * snd_ctl_make_virtual_master - Create a virtual master control
+ * @name: name string of the control element to create
+ * @tlv: optional TLV int array for dB information
+ *
+ * Creates a virtual matster control with the given name string.
+ * Returns the created control element, or NULL for errors (ENOMEM).
+ *
+ * After creating a vmaster element, you can add the slave controls
+ * via snd_ctl_add_slave() or snd_ctl_add_slave_uncached().
+ *
+ * The optional argument @tlv can be used to specify the TLV information
+ * for dB scale of the master control. It should be a single element
+ * with #SNDRV_CTL_TLVT_DB_SCALE type, and should be the max 0dB.
*/
struct snd_kcontrol *snd_ctl_make_virtual_master(char *name,
const unsigned int *tlv)
return kctl;
}
-
EXPORT_SYMBOL(snd_ctl_make_virtual_master);
int idx, err;
int dev = devptr->id;
- card = snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(struct snd_dummy));
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct snd_dummy), &card);
+ if (err < 0)
+ return err;
dummy = card->private_data;
dummy->card = card;
for (idx = 0; idx < MAX_PCM_DEVICES && idx < pcm_devs[dev]; idx++) {
if (!enable[dev])
return -ENOENT;
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
err = snd_ml403_ac97cr_create(card, pfdev, &ml403_ac97cr);
if (err < 0) {
PDEBUG(INIT_FAILURE, "probe(): create failed!\n");
snd_printk(KERN_ERR "the uart_enter option is obsolete; remove it\n");
*rcard = NULL;
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
strcpy(card->driver, "MPU-401 UART");
strcpy(card->shortname, card->driver);
sprintf(card->longname, "%s at %#lx, ", card->shortname, port[dev]);
snd_mtpav_send_byte(mtp_card, 0xf5);
snd_mtpav_send_byte(mtp_card, portp->hwport);
- //snd_printk("new outport: 0x%x\n", (unsigned int) portp->hwport);
-
+ /*
+ snd_printk(KERN_DEBUG "new outport: 0x%x\n",
+ (unsigned int) portp->hwport);
+ */
if (!(outbyte & 0x80) && portp->running_status)
snd_mtpav_send_byte(mtp_card, portp->running_status);
}
u8 sbyt = snd_mtpav_getreg(mcrd, SREG);
- //printk("snd_mtpav_read_bytes() sbyt: 0x%x\n", sbyt);
+ /* printk(KERN_DEBUG "snd_mtpav_read_bytes() sbyt: 0x%x\n", sbyt); */
if (!(sbyt & SIGS_BYTE))
return;
static int __devinit snd_mtpav_get_ISA(struct mtpav * mcard)
{
if ((mcard->res_port = request_region(port, 3, "MotuMTPAV MIDI")) == NULL) {
- snd_printk("MTVAP port 0x%lx is busy\n", port);
+ snd_printk(KERN_ERR "MTVAP port 0x%lx is busy\n", port);
return -EBUSY;
}
mcard->port = port;
if (request_irq(irq, snd_mtpav_irqh, IRQF_DISABLED, "MOTU MTPAV", mcard)) {
- snd_printk("MTVAP IRQ %d busy\n", irq);
+ snd_printk(KERN_ERR "MTVAP IRQ %d busy\n", irq);
return -EBUSY;
}
mcard->irq = irq;
int err;
struct mtpav *mtp_card;
- card = snd_card_new(index, id, THIS_MODULE, sizeof(*mtp_card));
- if (! card)
- return -ENOMEM;
+ err = snd_card_create(index, id, THIS_MODULE, sizeof(*mtp_card), &card);
+ if (err < 0)
+ return err;
mtp_card = card->private_data;
spin_lock_init(&mtp_card->spinlock);
if ((err = snd_mts64_probe_port(p)) < 0)
return err;
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL) {
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0) {
snd_printd("Cannot create card\n");
- return -ENOMEM;
+ return err;
}
strcpy(card->driver, DRIVER_NAME);
strcpy(card->shortname, "ESI " CARD_NAME);
goto __err;
}
- snd_printk("ESI Miditerminal 4140 on 0x%lx\n", p->base);
+ snd_printk(KERN_INFO "ESI Miditerminal 4140 on 0x%lx\n", p->base);
return 0;
__err:
opl3 = hw->private_data;
status = inb(opl3->l_port);
#if 0
- snd_printk("AdLib IRQ status = 0x%x\n", status);
+ snd_printk(KERN_DEBUG "AdLib IRQ status = 0x%x\n", status);
#endif
if (!(status & 0x80))
return;
int i;
char *str = "x.24";
- printk("time %.5i: %s [%.2i]: ", opl3->use_time, s, voice);
+ printk(KERN_DEBUG "time %.5i: %s [%.2i]: ", opl3->use_time, s, voice);
for (i = 0; i < opl3->max_voices; i++)
printk("%c", *(str + opl3->voices[i].state + 1));
printk("\n");
for (i = 0; i < END; i++) {
if (best[i].voice >= 0) {
#ifdef DEBUG_ALLOC
- printk("%s %iop allocation on voice %i\n",
+ printk(KERN_DEBUG "%s %iop allocation on voice %i\n",
alloc_type[i], instr_4op ? 4 : 2,
best[i].voice);
#endif
opl3 = p;
#ifdef DEBUG_MIDI
- snd_printk("Note on, ch %i, inst %i, note %i, vel %i\n",
+ snd_printk(KERN_DEBUG "Note on, ch %i, inst %i, note %i, vel %i\n",
chan->number, chan->midi_program, note, vel);
#endif
return;
}
#ifdef DEBUG_MIDI
- snd_printk(" --> OPL%i instrument: %s\n",
+ snd_printk(KERN_DEBUG " --> OPL%i instrument: %s\n",
instr_4op ? 3 : 2, patch->name);
#endif
/* in SYNTH mode, application takes care of voices */
}
#ifdef DEBUG_MIDI
- snd_printk(" --> setting OPL3 connection: 0x%x\n",
+ snd_printk(KERN_DEBUG " --> setting OPL3 connection: 0x%x\n",
opl3->connection_reg);
#endif
/*
/* Program the FM voice characteristics */
for (i = 0; i < (instr_4op ? 4 : 2); i++) {
#ifdef DEBUG_MIDI
- snd_printk(" --> programming operator %i\n", i);
+ snd_printk(KERN_DEBUG " --> programming operator %i\n", i);
#endif
op_offset = snd_opl3_regmap[voice_offset][i];
blocknum |= OPL3_KEYON_BIT;
#ifdef DEBUG_MIDI
- snd_printk(" --> trigger voice %i\n", voice);
+ snd_printk(KERN_DEBUG " --> trigger voice %i\n", voice);
#endif
/* Set OPL3 KEYON_BLOCK register of requested voice */
opl3_reg = reg_side | (OPL3_REG_KEYON_BLOCK + voice_offset);
prg = extra_prg - 1;
}
#ifdef DEBUG_MIDI
- snd_printk(" *** allocating extra program\n");
+ snd_printk(KERN_DEBUG " *** allocating extra program\n");
#endif
goto __extra_prg;
}
/* kill voice */
#ifdef DEBUG_MIDI
- snd_printk(" --> kill voice %i\n", voice);
+ snd_printk(KERN_DEBUG " --> kill voice %i\n", voice);
#endif
opl3_reg = reg_side | (OPL3_REG_KEYON_BLOCK + voice_offset);
/* clear Key ON bit */
opl3 = p;
#ifdef DEBUG_MIDI
- snd_printk("Note off, ch %i, inst %i, note %i\n",
+ snd_printk(KERN_DEBUG "Note off, ch %i, inst %i, note %i\n",
chan->number, chan->midi_program, note);
#endif
opl3 = p;
#ifdef DEBUG_MIDI
- snd_printk("Key pressure, ch#: %i, inst#: %i\n",
+ snd_printk(KERN_DEBUG "Key pressure, ch#: %i, inst#: %i\n",
chan->number, chan->midi_program);
#endif
}
opl3 = p;
#ifdef DEBUG_MIDI
- snd_printk("Terminate note, ch#: %i, inst#: %i\n",
+ snd_printk(KERN_DEBUG "Terminate note, ch#: %i, inst#: %i\n",
chan->number, chan->midi_program);
#endif
}
opl3 = p;
#ifdef DEBUG_MIDI
- snd_printk("Controller, TYPE = %i, ch#: %i, inst#: %i\n",
+ snd_printk(KERN_DEBUG "Controller, TYPE = %i, ch#: %i, inst#: %i\n",
type, chan->number, chan->midi_program);
#endif
opl3 = p;
#ifdef DEBUG_MIDI
- snd_printk("NRPN, ch#: %i, inst#: %i\n",
+ snd_printk(KERN_DEBUG "NRPN, ch#: %i, inst#: %i\n",
chan->number, chan->midi_program);
#endif
}
opl3 = p;
#ifdef DEBUG_MIDI
- snd_printk("SYSEX\n");
+ snd_printk(KERN_DEBUG "SYSEX\n");
#endif
}
return -EINVAL;
if (count < (int)sizeof(sbi)) {
- snd_printk("FM Error: Patch record too short\n");
+ snd_printk(KERN_ERR "FM Error: Patch record too short\n");
return -EINVAL;
}
if (copy_from_user(&sbi, buf, sizeof(sbi)))
return -EFAULT;
if (sbi.channel < 0 || sbi.channel >= SBFM_MAXINSTR) {
- snd_printk("FM Error: Invalid instrument number %d\n",
+ snd_printk(KERN_ERR "FM Error: Invalid instrument number %d\n",
sbi.channel);
return -EINVAL;
}
opl3 = arg->private_data;
switch (cmd) {
case SNDCTL_FM_LOAD_INSTR:
- snd_printk("OPL3: Obsolete ioctl(SNDCTL_FM_LOAD_INSTR) used. Fix the program.\n");
+ snd_printk(KERN_ERR "OPL3: "
+ "Obsolete ioctl(SNDCTL_FM_LOAD_INSTR) used. "
+ "Fix the program.\n");
return -EINVAL;
case SNDCTL_SYNTH_MEMAVL:
#ifdef CONFIG_SND_DEBUG
default:
- snd_printk("unknown IOCTL: 0x%x\n", cmd);
+ snd_printk(KERN_WARNING "unknown IOCTL: 0x%x\n", cmd);
#endif
}
return -ENOTTY;
else
min_div = MAX_DIV;
#if PCSP_DEBUG
- printk("PCSP: lpj=%li, min_div=%i, res=%li\n",
+ printk(KERN_DEBUG "PCSP: lpj=%li, min_div=%i, res=%li\n",
loops_per_jiffy, min_div, tp.tv_nsec);
#endif
hrtimer_init(&pcsp_chip.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
pcsp_chip.timer.function = pcsp_do_timer;
- card = snd_card_new(index, id, THIS_MODULE, 0);
- if (!card)
- return -ENOMEM;
+ err = snd_card_create(index, id, THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
err = snd_pcsp_create(card);
if (err < 0) {
if ((err = snd_portman_probe_port(p)) < 0)
return err;
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL) {
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0) {
snd_printd("Cannot create card\n");
- return -ENOMEM;
+ return err;
}
strcpy(card->driver, DRIVER_NAME);
strcpy(card->shortname, CARD_NAME);
snd_rawmidi_receive(uart->midi_input[substream], &c, 1);
if (status & UART_LSR_OE)
- snd_printk("%s: Overrun on device at 0x%lx\n",
+ snd_printk(KERN_WARNING
+ "%s: Overrun on device at 0x%lx\n",
uart->rmidi->name, uart->base);
}
}
} else {
if (!snd_uart16550_write_buffer(uart, midi_byte)) {
- snd_printk("%s: Buffer overrun on device at 0x%lx\n",
+ snd_printk(KERN_WARNING
+ "%s: Buffer overrun on device at 0x%lx\n",
uart->rmidi->name, uart->base);
return 0;
}
if (irq >= 0 && irq != SNDRV_AUTO_IRQ) {
if (request_irq(irq, snd_uart16550_interrupt,
IRQF_DISABLED, "Serial MIDI", uart)) {
- snd_printk("irq %d busy. Using Polling.\n", irq);
+ snd_printk(KERN_WARNING
+ "irq %d busy. Using Polling.\n", irq);
} else {
uart->irq = irq;
}
case SNDRV_SERIAL_GENERIC:
break;
default:
- snd_printk("Adaptor type is out of range 0-%d (%d)\n",
+ snd_printk(KERN_ERR
+ "Adaptor type is out of range 0-%d (%d)\n",
SNDRV_SERIAL_MAX_ADAPTOR, adaptor[dev]);
return -ENODEV;
}
if (outs[dev] < 1 || outs[dev] > SNDRV_SERIAL_MAX_OUTS) {
- snd_printk("Count of outputs is out of range 1-%d (%d)\n",
+ snd_printk(KERN_ERR
+ "Count of outputs is out of range 1-%d (%d)\n",
SNDRV_SERIAL_MAX_OUTS, outs[dev]);
return -ENODEV;
}
if (ins[dev] < 1 || ins[dev] > SNDRV_SERIAL_MAX_INS) {
- snd_printk("Count of inputs is out of range 1-%d (%d)\n",
+ snd_printk(KERN_ERR
+ "Count of inputs is out of range 1-%d (%d)\n",
SNDRV_SERIAL_MAX_INS, ins[dev]);
return -ENODEV;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
strcpy(card->driver, "Serial");
strcpy(card->shortname, "Serial MIDI (UART16550A)");
int idx, err;
int dev = devptr->id;
- card = snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(struct snd_card_virmidi));
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct snd_card_virmidi), &card);
+ if (err < 0)
+ return err;
vmidi = (struct snd_card_virmidi *)card->private_data;
vmidi->card = card;
if (midi_devs[dev] > MAX_MIDI_DEVICES) {
- snd_printk("too much midi devices for virmidi %d: force to use %d\n", dev, MAX_MIDI_DEVICES);
+ snd_printk(KERN_WARNING
+ "too much midi devices for virmidi %d: "
+ "force to use %d\n", dev, MAX_MIDI_DEVICES);
midi_devs[dev] = MAX_MIDI_DEVICES;
}
for (idx = 0; idx < midi_devs[dev]; idx++) {
image = dsp->data + i;
/* Wait DSP ready for a new read */
if ((err = vx_wait_isr_bit(chip, ISR_TX_EMPTY)) < 0) {
- printk("dsp loading error at position %d\n", i);
+ printk(KERN_ERR
+ "dsp loading error at position %d\n", i);
return err;
}
cptr = image;
#else /* old style firmware loading */
-static int vx_hwdep_open(struct snd_hwdep *hw, struct file *file)
-{
- return 0;
-}
-
-static int vx_hwdep_release(struct snd_hwdep *hw, struct file *file)
-{
- return 0;
-}
-
static int vx_hwdep_dsp_status(struct snd_hwdep *hw,
struct snd_hwdep_dsp_status *info)
{
hw->iface = SNDRV_HWDEP_IFACE_VX;
hw->private_data = chip;
- hw->ops.open = vx_hwdep_open;
- hw->ops.release = vx_hwdep_release;
hw->ops.dsp_status = vx_hwdep_dsp_status;
hw->ops.dsp_load = vx_hwdep_dsp_load;
hw->exclusive = 1;
* returns the frequency of UER, or 0 if not sync,
* or a negative error code.
*/
-static int vx_read_uer_status(struct vx_core *chip, int *mode)
+static int vx_read_uer_status(struct vx_core *chip, unsigned int *mode)
{
int val, freq;
snd-cs8427-objs := cs8427.o
snd-tea6330t-objs := tea6330t.o
-obj-$(CONFIG_L3) += l3/
-
obj-$(CONFIG_SND) += other/
# Toplevel Module Dependency
+++ /dev/null
-#
-# Makefile for ALSA
-#
-
-snd-uda1341-objs := uda1341.o
-
-# Module Dependency
-obj-$(CONFIG_SND_SA11XX_UDA1341) += snd-uda1341.o
+++ /dev/null
-/*
- * Philips UDA1341 mixer device driver
- * Copyright (c) 2002 Tomas Kasparek <tomas.kasparek@seznam.cz>
- *
- * Portions are Copyright (C) 2000 Lernout & Hauspie Speech Products, N.V.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License.
- *
- * History:
- *
- * 2002-03-13 Tomas Kasparek initial release - based on uda1341.c from OSS
- * 2002-03-28 Tomas Kasparek basic mixer is working (volume, bass, treble)
- * 2002-03-30 Tomas Kasparek proc filesystem support, complete mixer and DSP
- * features support
- * 2002-04-12 Tomas Kasparek proc interface update, code cleanup
- * 2002-05-12 Tomas Kasparek another code cleanup
- */
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/errno.h>
-#include <linux/ioctl.h>
-
-#include <asm/uaccess.h>
-
-#include <sound/core.h>
-#include <sound/control.h>
-#include <sound/initval.h>
-#include <sound/info.h>
-
-#include <linux/l3/l3.h>
-
-#include <sound/uda1341.h>
-
-/* {{{ HW regs definition */
-
-#define STAT0 0x00
-#define STAT1 0x80
-#define STAT_MASK 0x80
-
-#define DATA0_0 0x00
-#define DATA0_1 0x40
-#define DATA0_2 0x80
-#define DATA_MASK 0xc0
-
-#define IS_DATA0(x) ((x) >= data0_0 && (x) <= data0_2)
-#define IS_DATA1(x) ((x) == data1)
-#define IS_STATUS(x) ((x) == stat0 || (x) == stat1)
-#define IS_EXTEND(x) ((x) >= ext0 && (x) <= ext6)
-
-/* }}} */
-
-
-static const char *peak_names[] = {
- "before",
- "after",
-};
-
-static const char *filter_names[] = {
- "flat",
- "min",
- "min",
- "max",
-};
-
-static const char *mixer_names[] = {
- "double differential",
- "input channel 1 (line in)",
- "input channel 2 (microphone)",
- "digital mixer",
-};
-
-static const char *deemp_names[] = {
- "none",
- "32 kHz",
- "44.1 kHz",
- "48 kHz",
-};
-
-enum uda1341_regs_names {
- stat0,
- stat1,
- data0_0,
- data0_1,
- data0_2,
- data1,
- ext0,
- ext1,
- ext2,
- empty,
- ext4,
- ext5,
- ext6,
- uda1341_reg_last,
-};
-
-static const char *uda1341_reg_names[] = {
- "stat 0 ",
- "stat 1 ",
- "data 00",
- "data 01",
- "data 02",
- "data 1 ",
- "ext 0",
- "ext 1",
- "ext 2",
- "empty",
- "ext 4",
- "ext 5",
- "ext 6",
-};
-
-static const int uda1341_enum_items[] = {
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 2, //peak - before/after
- 4, //deemp - none/32/44.1/48
- 0,
- 4, //filter - flat/min/min/max
- 0, 0, 0,
- 4, //mixer - differ/line/mic/mixer
- 0, 0, 0, 0, 0,
-};
-
-static const char ** uda1341_enum_names[] = {
- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
- peak_names, //peak - before/after
- deemp_names, //deemp - none/32/44.1/48
- NULL,
- filter_names, //filter - flat/min/min/max
- NULL, NULL, NULL,
- mixer_names, //mixer - differ/line/mic/mixer
- NULL, NULL, NULL, NULL, NULL,
-};
-
-typedef int uda1341_cfg[CMD_LAST];
-
-struct uda1341 {
- int (*write) (struct l3_client *uda1341, unsigned short reg, unsigned short val);
- int (*read) (struct l3_client *uda1341, unsigned short reg);
- unsigned char regs[uda1341_reg_last];
- int active;
- spinlock_t reg_lock;
- struct snd_card *card;
- uda1341_cfg cfg;
-#ifdef CONFIG_PM
- unsigned char suspend_regs[uda1341_reg_last];
- uda1341_cfg suspend_cfg;
-#endif
-};
-
-/* transfer 8bit integer into string with binary representation */
-static void int2str_bin8(uint8_t val, char *buf)
-{
- const int size = sizeof(val) * 8;
- int i;
-
- for (i= 0; i < size; i++){
- *(buf++) = (val >> (size - 1)) ? '1' : '0';
- val <<= 1;
- }
- *buf = '\0'; //end the string with zero
-}
-
-/* {{{ HW manipulation routines */
-
-static int snd_uda1341_codec_write(struct l3_client *clnt, unsigned short reg, unsigned short val)
-{
- struct uda1341 *uda = clnt->driver_data;
- unsigned char buf[2] = { 0xc0, 0xe0 }; // for EXT addressing
- int err = 0;
-
- uda->regs[reg] = val;
-
- if (uda->active) {
- if (IS_DATA0(reg)) {
- err = l3_write(clnt, UDA1341_DATA0, (const unsigned char *)&val, 1);
- } else if (IS_DATA1(reg)) {
- err = l3_write(clnt, UDA1341_DATA1, (const unsigned char *)&val, 1);
- } else if (IS_STATUS(reg)) {
- err = l3_write(clnt, UDA1341_STATUS, (const unsigned char *)&val, 1);
- } else if (IS_EXTEND(reg)) {
- buf[0] |= (reg - ext0) & 0x7; //EXT address
- buf[1] |= val; //EXT data
- err = l3_write(clnt, UDA1341_DATA0, (const unsigned char *)buf, 2);
- }
- } else
- printk(KERN_ERR "UDA1341 codec not active!\n");
- return err;
-}
-
-static int snd_uda1341_codec_read(struct l3_client *clnt, unsigned short reg)
-{
- unsigned char val;
- int err;
-
- err = l3_read(clnt, reg, &val, 1);
- if (err == 1)
- // use just 6bits - the rest is address of the reg
- return val & 63;
- return err < 0 ? err : -EIO;
-}
-
-static inline int snd_uda1341_valid_reg(struct l3_client *clnt, unsigned short reg)
-{
- return reg < uda1341_reg_last;
-}
-
-static int snd_uda1341_update_bits(struct l3_client *clnt, unsigned short reg,
- unsigned short mask, unsigned short shift,
- unsigned short value, int flush)
-{
- int change;
- unsigned short old, new;
- struct uda1341 *uda = clnt->driver_data;
-
-#if 0
- printk(KERN_DEBUG "update_bits: reg: %s mask: %d shift: %d val: %d\n",
- uda1341_reg_names[reg], mask, shift, value);
-#endif
-
- if (!snd_uda1341_valid_reg(clnt, reg))
- return -EINVAL;
- spin_lock(&uda->reg_lock);
- old = uda->regs[reg];
- new = (old & ~(mask << shift)) | (value << shift);
- change = old != new;
- if (change) {
- if (flush) uda->write(clnt, reg, new);
- uda->regs[reg] = new;
- }
- spin_unlock(&uda->reg_lock);
- return change;
-}
-
-static int snd_uda1341_cfg_write(struct l3_client *clnt, unsigned short what,
- unsigned short value, int flush)
-{
- struct uda1341 *uda = clnt->driver_data;
- int ret = 0;
-#ifdef CONFIG_PM
- int reg;
-#endif
-
-#if 0
- printk(KERN_DEBUG "cfg_write what: %d value: %d\n", what, value);
-#endif
-
- uda->cfg[what] = value;
-
- switch(what) {
- case CMD_RESET:
- ret = snd_uda1341_update_bits(clnt, data0_2, 1, 2, 1, flush); // MUTE
- ret = snd_uda1341_update_bits(clnt, stat0, 1, 6, 1, flush); // RESET
- ret = snd_uda1341_update_bits(clnt, stat0, 1, 6, 0, flush); // RESTORE
- uda->cfg[CMD_RESET]=0;
- break;
- case CMD_FS:
- ret = snd_uda1341_update_bits(clnt, stat0, 3, 4, value, flush);
- break;
- case CMD_FORMAT:
- ret = snd_uda1341_update_bits(clnt, stat0, 7, 1, value, flush);
- break;
- case CMD_OGAIN:
- ret = snd_uda1341_update_bits(clnt, stat1, 1, 6, value, flush);
- break;
- case CMD_IGAIN:
- ret = snd_uda1341_update_bits(clnt, stat1, 1, 5, value, flush);
- break;
- case CMD_DAC:
- ret = snd_uda1341_update_bits(clnt, stat1, 1, 0, value, flush);
- break;
- case CMD_ADC:
- ret = snd_uda1341_update_bits(clnt, stat1, 1, 1, value, flush);
- break;
- case CMD_VOLUME:
- ret = snd_uda1341_update_bits(clnt, data0_0, 63, 0, value, flush);
- break;
- case CMD_BASS:
- ret = snd_uda1341_update_bits(clnt, data0_1, 15, 2, value, flush);
- break;
- case CMD_TREBBLE:
- ret = snd_uda1341_update_bits(clnt, data0_1, 3, 0, value, flush);
- break;
- case CMD_PEAK:
- ret = snd_uda1341_update_bits(clnt, data0_2, 1, 5, value, flush);
- break;
- case CMD_DEEMP:
- ret = snd_uda1341_update_bits(clnt, data0_2, 3, 3, value, flush);
- break;
- case CMD_MUTE:
- ret = snd_uda1341_update_bits(clnt, data0_2, 1, 2, value, flush);
- break;
- case CMD_FILTER:
- ret = snd_uda1341_update_bits(clnt, data0_2, 3, 0, value, flush);
- break;
- case CMD_CH1:
- ret = snd_uda1341_update_bits(clnt, ext0, 31, 0, value, flush);
- break;
- case CMD_CH2:
- ret = snd_uda1341_update_bits(clnt, ext1, 31, 0, value, flush);
- break;
- case CMD_MIC:
- ret = snd_uda1341_update_bits(clnt, ext2, 7, 2, value, flush);
- break;
- case CMD_MIXER:
- ret = snd_uda1341_update_bits(clnt, ext2, 3, 0, value, flush);
- break;
- case CMD_AGC:
- ret = snd_uda1341_update_bits(clnt, ext4, 1, 4, value, flush);
- break;
- case CMD_IG:
- ret = snd_uda1341_update_bits(clnt, ext4, 3, 0, value & 0x3, flush);
- ret = snd_uda1341_update_bits(clnt, ext5, 31, 0, value >> 2, flush);
- break;
- case CMD_AGC_TIME:
- ret = snd_uda1341_update_bits(clnt, ext6, 7, 2, value, flush);
- break;
- case CMD_AGC_LEVEL:
- ret = snd_uda1341_update_bits(clnt, ext6, 3, 0, value, flush);
- break;
-#ifdef CONFIG_PM
- case CMD_SUSPEND:
- for (reg = stat0; reg < uda1341_reg_last; reg++)
- uda->suspend_regs[reg] = uda->regs[reg];
- for (reg = 0; reg < CMD_LAST; reg++)
- uda->suspend_cfg[reg] = uda->cfg[reg];
- break;
- case CMD_RESUME:
- for (reg = stat0; reg < uda1341_reg_last; reg++)
- snd_uda1341_codec_write(clnt, reg, uda->suspend_regs[reg]);
- for (reg = 0; reg < CMD_LAST; reg++)
- uda->cfg[reg] = uda->suspend_cfg[reg];
- break;
-#endif
- default:
- ret = -EINVAL;
- break;
- }
-
- if (!uda->active)
- printk(KERN_ERR "UDA1341 codec not active!\n");
- return ret;
-}
-
-/* }}} */
-
-/* {{{ Proc interface */
-#ifdef CONFIG_PROC_FS
-
-static const char *format_names[] = {
- "I2S-bus",
- "LSB 16bits",
- "LSB 18bits",
- "LSB 20bits",
- "MSB",
- "in LSB 16bits/out MSB",
- "in LSB 18bits/out MSB",
- "in LSB 20bits/out MSB",
-};
-
-static const char *fs_names[] = {
- "512*fs",
- "384*fs",
- "256*fs",
- "Unused - bad value!",
-};
-
-static const char* bass_values[][16] = {
- {"0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB",
- "0 dB", "0 dB", "0 dB", "0 dB", "undefined", }, //flat
- {"0 dB", "2 dB", "4 dB", "6 dB", "8 dB", "10 dB", "12 dB", "14 dB", "16 dB", "18 dB", "18 dB",
- "18 dB", "18 dB", "18 dB", "18 dB", "undefined",}, // min
- {"0 dB", "2 dB", "4 dB", "6 dB", "8 dB", "10 dB", "12 dB", "14 dB", "16 dB", "18 dB", "18 dB",
- "18 dB", "18 dB", "18 dB", "18 dB", "undefined",}, // min
- {"0 dB", "2 dB", "4 dB", "6 dB", "8 dB", "10 dB", "12 dB", "14 dB", "16 dB", "18 dB", "20 dB",
- "22 dB", "24 dB", "24 dB", "24 dB", "undefined",}, // max
-};
-
-static const char *mic_sens_value[] = {
- "-3 dB", "0 dB", "3 dB", "9 dB", "15 dB", "21 dB", "27 dB", "not used",
-};
-
-static const unsigned short AGC_atime[] = {
- 11, 16, 11, 16, 21, 11, 16, 21,
-};
-
-static const unsigned short AGC_dtime[] = {
- 100, 100, 200, 200, 200, 400, 400, 400,
-};
-
-static const char *AGC_level[] = {
- "-9.0", "-11.5", "-15.0", "-17.5",
-};
-
-static const char *ig_small_value[] = {
- "-3.0", "-2.5", "-2.0", "-1.5", "-1.0", "-0.5",
-};
-
-/*
- * this was computed as peak_value[i] = pow((63-i)*1.42,1.013)
- *
- * UDA1341 datasheet on page 21: Peak value (dB) = (Peak level - 63.5)*5*log2
- * There is an table with these values [level]=value: [3]=-90.31, [7]=-84.29
- * [61]=-2.78, [62] = -1.48, [63] = 0.0
- * I tried to compute it, but using but even using logarithm with base either 10 or 2
- * i was'n able to get values in the table from the formula. So I constructed another
- * formula (see above) to interpolate the values as good as possible. If there is some
- * mistake, please contact me on tomas.kasparek@seznam.cz. Thanks.
- * UDA1341TS datasheet is available at:
- * http://www-us9.semiconductors.com/acrobat/datasheets/UDA1341TS_3.pdf
- */
-static const char *peak_value[] = {
- "-INF dB", "N.A.", "N.A", "90.31 dB", "N.A.", "N.A.", "N.A.", "-84.29 dB",
- "-82.65 dB", "-81.13 dB", "-79.61 dB", "-78.09 dB", "-76.57 dB", "-75.05 dB", "-73.53 dB",
- "-72.01 dB", "-70.49 dB", "-68.97 dB", "-67.45 dB", "-65.93 dB", "-64.41 dB", "-62.90 dB",
- "-61.38 dB", "-59.86 dB", "-58.35 dB", "-56.83 dB", "-55.32 dB", "-53.80 dB", "-52.29 dB",
- "-50.78 dB", "-49.26 dB", "-47.75 dB", "-46.24 dB", "-44.73 dB", "-43.22 dB", "-41.71 dB",
- "-40.20 dB", "-38.69 dB", "-37.19 dB", "-35.68 dB", "-34.17 dB", "-32.67 dB", "-31.17 dB",
- "-29.66 dB", "-28.16 dB", "-26.66 dB", "-25.16 dB", "-23.66 dB", "-22.16 dB", "-20.67 dB",
- "-19.17 dB", "-17.68 dB", "-16.19 dB", "-14.70 dB", "-13.21 dB", "-11.72 dB", "-10.24 dB",
- "-8.76 dB", "-7.28 dB", "-5.81 dB", "-4.34 dB", "-2.88 dB", "-1.43 dB", "0.00 dB",
-};
-
-static void snd_uda1341_proc_read(struct snd_info_entry *entry,
- struct snd_info_buffer *buffer)
-{
- struct l3_client *clnt = entry->private_data;
- struct uda1341 *uda = clnt->driver_data;
- int peak;
-
- peak = snd_uda1341_codec_read(clnt, UDA1341_DATA1);
- if (peak < 0)
- peak = 0;
-
- snd_iprintf(buffer, "%s\n\n", uda->card->longname);
-
- // for information about computed values see UDA1341TS datasheet pages 15 - 21
- snd_iprintf(buffer, "DAC power : %s\n", uda->cfg[CMD_DAC] ? "on" : "off");
- snd_iprintf(buffer, "ADC power : %s\n", uda->cfg[CMD_ADC] ? "on" : "off");
- snd_iprintf(buffer, "Clock frequency : %s\n", fs_names[uda->cfg[CMD_FS]]);
- snd_iprintf(buffer, "Data format : %s\n\n", format_names[uda->cfg[CMD_FORMAT]]);
-
- snd_iprintf(buffer, "Filter mode : %s\n", filter_names[uda->cfg[CMD_FILTER]]);
- snd_iprintf(buffer, "Mixer mode : %s\n", mixer_names[uda->cfg[CMD_MIXER]]);
- snd_iprintf(buffer, "De-emphasis : %s\n", deemp_names[uda->cfg[CMD_DEEMP]]);
- snd_iprintf(buffer, "Peak detection pos. : %s\n", uda->cfg[CMD_PEAK] ? "after" : "before");
- snd_iprintf(buffer, "Peak value : %s\n\n", peak_value[peak]);
-
- snd_iprintf(buffer, "Automatic Gain Ctrl : %s\n", uda->cfg[CMD_AGC] ? "on" : "off");
- snd_iprintf(buffer, "AGC attack time : %d ms\n", AGC_atime[uda->cfg[CMD_AGC_TIME]]);
- snd_iprintf(buffer, "AGC decay time : %d ms\n", AGC_dtime[uda->cfg[CMD_AGC_TIME]]);
- snd_iprintf(buffer, "AGC output level : %s dB\n\n", AGC_level[uda->cfg[CMD_AGC_LEVEL]]);
-
- snd_iprintf(buffer, "Mute : %s\n", uda->cfg[CMD_MUTE] ? "on" : "off");
-
- if (uda->cfg[CMD_VOLUME] == 0)
- snd_iprintf(buffer, "Volume : 0 dB\n");
- else if (uda->cfg[CMD_VOLUME] < 62)
- snd_iprintf(buffer, "Volume : %d dB\n", -1*uda->cfg[CMD_VOLUME] +1);
- else
- snd_iprintf(buffer, "Volume : -INF dB\n");
- snd_iprintf(buffer, "Bass : %s\n", bass_values[uda->cfg[CMD_FILTER]][uda->cfg[CMD_BASS]]);
- snd_iprintf(buffer, "Trebble : %d dB\n", uda->cfg[CMD_FILTER] ? 2*uda->cfg[CMD_TREBBLE] : 0);
- snd_iprintf(buffer, "Input Gain (6dB) : %s\n", uda->cfg[CMD_IGAIN] ? "on" : "off");
- snd_iprintf(buffer, "Output Gain (6dB) : %s\n", uda->cfg[CMD_OGAIN] ? "on" : "off");
- snd_iprintf(buffer, "Mic sensitivity : %s\n", mic_sens_value[uda->cfg[CMD_MIC]]);
-
-
- if(uda->cfg[CMD_CH1] < 31)
- snd_iprintf(buffer, "Mixer gain channel 1: -%d.%c dB\n",
- ((uda->cfg[CMD_CH1] >> 1) * 3) + (uda->cfg[CMD_CH1] & 1),
- uda->cfg[CMD_CH1] & 1 ? '5' : '0');
- else
- snd_iprintf(buffer, "Mixer gain channel 1: -INF dB\n");
- if(uda->cfg[CMD_CH2] < 31)
- snd_iprintf(buffer, "Mixer gain channel 2: -%d.%c dB\n",
- ((uda->cfg[CMD_CH2] >> 1) * 3) + (uda->cfg[CMD_CH2] & 1),
- uda->cfg[CMD_CH2] & 1 ? '5' : '0');
- else
- snd_iprintf(buffer, "Mixer gain channel 2: -INF dB\n");
-
- if(uda->cfg[CMD_IG] > 5)
- snd_iprintf(buffer, "Input Amp. Gain ch 2: %d.%c dB\n",
- (uda->cfg[CMD_IG] >> 1) -3, uda->cfg[CMD_IG] & 1 ? '5' : '0');
- else
- snd_iprintf(buffer, "Input Amp. Gain ch 2: %s dB\n", ig_small_value[uda->cfg[CMD_IG]]);
-}
-
-static void snd_uda1341_proc_regs_read(struct snd_info_entry *entry,
- struct snd_info_buffer *buffer)
-{
- struct l3_client *clnt = entry->private_data;
- struct uda1341 *uda = clnt->driver_data;
- int reg;
- char buf[12];
-
- for (reg = 0; reg < uda1341_reg_last; reg ++) {
- if (reg == empty)
- continue;
- int2str_bin8(uda->regs[reg], buf);
- snd_iprintf(buffer, "%s = %s\n", uda1341_reg_names[reg], buf);
- }
-
- int2str_bin8(snd_uda1341_codec_read(clnt, UDA1341_DATA1), buf);
- snd_iprintf(buffer, "DATA1 = %s\n", buf);
-}
-#endif /* CONFIG_PROC_FS */
-
-static void __devinit snd_uda1341_proc_init(struct snd_card *card, struct l3_client *clnt)
-{
- struct snd_info_entry *entry;
-
- if (! snd_card_proc_new(card, "uda1341", &entry))
- snd_info_set_text_ops(entry, clnt, snd_uda1341_proc_read);
- if (! snd_card_proc_new(card, "uda1341-regs", &entry))
- snd_info_set_text_ops(entry, clnt, snd_uda1341_proc_regs_read);
-}
-
-/* }}} */
-
-/* {{{ Mixer controls setting */
-
-/* {{{ UDA1341 single functions */
-
-#define UDA1341_SINGLE(xname, where, reg, shift, mask, invert) \
-{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_uda1341_info_single, \
- .get = snd_uda1341_get_single, .put = snd_uda1341_put_single, \
- .private_value = where | (reg << 5) | (shift << 9) | (mask << 12) | (invert << 18) \
-}
-
-static int snd_uda1341_info_single(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_info *uinfo)
-{
- int mask = (kcontrol->private_value >> 12) & 63;
-
- uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
- uinfo->count = 1;
- uinfo->value.integer.min = 0;
- uinfo->value.integer.max = mask;
- return 0;
-}
-
-static int snd_uda1341_get_single(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
- struct uda1341 *uda = clnt->driver_data;
- int where = kcontrol->private_value & 31;
- int mask = (kcontrol->private_value >> 12) & 63;
- int invert = (kcontrol->private_value >> 18) & 1;
-
- ucontrol->value.integer.value[0] = uda->cfg[where];
- if (invert)
- ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
-
- return 0;
-}
-
-static int snd_uda1341_put_single(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
- struct uda1341 *uda = clnt->driver_data;
- int where = kcontrol->private_value & 31;
- int reg = (kcontrol->private_value >> 5) & 15;
- int shift = (kcontrol->private_value >> 9) & 7;
- int mask = (kcontrol->private_value >> 12) & 63;
- int invert = (kcontrol->private_value >> 18) & 1;
- unsigned short val;
-
- val = (ucontrol->value.integer.value[0] & mask);
- if (invert)
- val = mask - val;
-
- uda->cfg[where] = val;
- return snd_uda1341_update_bits(clnt, reg, mask, shift, val, FLUSH);
-}
-
-/* }}} */
-
-/* {{{ UDA1341 enum functions */
-
-#define UDA1341_ENUM(xname, where, reg, shift, mask, invert) \
-{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_uda1341_info_enum, \
- .get = snd_uda1341_get_enum, .put = snd_uda1341_put_enum, \
- .private_value = where | (reg << 5) | (shift << 9) | (mask << 12) | (invert << 18) \
-}
-
-static int snd_uda1341_info_enum(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_info *uinfo)
-{
- int where = kcontrol->private_value & 31;
- const char **texts;
-
- // this register we don't handle this way
- if (!uda1341_enum_items[where])
- return -EINVAL;
-
- uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
- uinfo->count = 1;
- uinfo->value.enumerated.items = uda1341_enum_items[where];
-
- if (uinfo->value.enumerated.item >= uda1341_enum_items[where])
- uinfo->value.enumerated.item = uda1341_enum_items[where] - 1;
-
- texts = uda1341_enum_names[where];
- strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
- return 0;
-}
-
-static int snd_uda1341_get_enum(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
- struct uda1341 *uda = clnt->driver_data;
- int where = kcontrol->private_value & 31;
-
- ucontrol->value.enumerated.item[0] = uda->cfg[where];
- return 0;
-}
-
-static int snd_uda1341_put_enum(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
- struct uda1341 *uda = clnt->driver_data;
- int where = kcontrol->private_value & 31;
- int reg = (kcontrol->private_value >> 5) & 15;
- int shift = (kcontrol->private_value >> 9) & 7;
- int mask = (kcontrol->private_value >> 12) & 63;
-
- uda->cfg[where] = (ucontrol->value.enumerated.item[0] & mask);
-
- return snd_uda1341_update_bits(clnt, reg, mask, shift, uda->cfg[where], FLUSH);
-}
-
-/* }}} */
-
-/* {{{ UDA1341 2regs functions */
-
-#define UDA1341_2REGS(xname, where, reg_1, reg_2, shift_1, shift_2, mask_1, mask_2, invert) \
-{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .info = snd_uda1341_info_2regs, \
- .get = snd_uda1341_get_2regs, .put = snd_uda1341_put_2regs, \
- .private_value = where | (reg_1 << 5) | (reg_2 << 9) | (shift_1 << 13) | (shift_2 << 16) | \
- (mask_1 << 19) | (mask_2 << 25) | (invert << 31) \
-}
-
-
-static int snd_uda1341_info_2regs(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_info *uinfo)
-{
- int mask_1 = (kcontrol->private_value >> 19) & 63;
- int mask_2 = (kcontrol->private_value >> 25) & 63;
- int mask;
-
- mask = (mask_2 + 1) * (mask_1 + 1) - 1;
- uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
- uinfo->count = 1;
- uinfo->value.integer.min = 0;
- uinfo->value.integer.max = mask;
- return 0;
-}
-
-static int snd_uda1341_get_2regs(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
- struct uda1341 *uda = clnt->driver_data;
- int where = kcontrol->private_value & 31;
- int mask_1 = (kcontrol->private_value >> 19) & 63;
- int mask_2 = (kcontrol->private_value >> 25) & 63;
- int invert = (kcontrol->private_value >> 31) & 1;
- int mask;
-
- mask = (mask_2 + 1) * (mask_1 + 1) - 1;
-
- ucontrol->value.integer.value[0] = uda->cfg[where];
- if (invert)
- ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
- return 0;
-}
-
-static int snd_uda1341_put_2regs(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
- struct uda1341 *uda = clnt->driver_data;
- int where = kcontrol->private_value & 31;
- int reg_1 = (kcontrol->private_value >> 5) & 15;
- int reg_2 = (kcontrol->private_value >> 9) & 15;
- int shift_1 = (kcontrol->private_value >> 13) & 7;
- int shift_2 = (kcontrol->private_value >> 16) & 7;
- int mask_1 = (kcontrol->private_value >> 19) & 63;
- int mask_2 = (kcontrol->private_value >> 25) & 63;
- int invert = (kcontrol->private_value >> 31) & 1;
- int mask;
- unsigned short val1, val2, val;
-
- val = ucontrol->value.integer.value[0];
-
- mask = (mask_2 + 1) * (mask_1 + 1) - 1;
-
- val1 = val & mask_1;
- val2 = (val / (mask_1 + 1)) & mask_2;
-
- if (invert) {
- val1 = mask_1 - val1;
- val2 = mask_2 - val2;
- }
-
- uda->cfg[where] = invert ? mask - val : val;
-
- //FIXME - return value
- snd_uda1341_update_bits(clnt, reg_1, mask_1, shift_1, val1, FLUSH);
- return snd_uda1341_update_bits(clnt, reg_2, mask_2, shift_2, val2, FLUSH);
-}
-
-/* }}} */
-
-static struct snd_kcontrol_new snd_uda1341_controls[] = {
- UDA1341_SINGLE("Master Playback Switch", CMD_MUTE, data0_2, 2, 1, 1),
- UDA1341_SINGLE("Master Playback Volume", CMD_VOLUME, data0_0, 0, 63, 1),
-
- UDA1341_SINGLE("Bass Playback Volume", CMD_BASS, data0_1, 2, 15, 0),
- UDA1341_SINGLE("Treble Playback Volume", CMD_TREBBLE, data0_1, 0, 3, 0),
-
- UDA1341_SINGLE("Input Gain Switch", CMD_IGAIN, stat1, 5, 1, 0),
- UDA1341_SINGLE("Output Gain Switch", CMD_OGAIN, stat1, 6, 1, 0),
-
- UDA1341_SINGLE("Mixer Gain Channel 1 Volume", CMD_CH1, ext0, 0, 31, 1),
- UDA1341_SINGLE("Mixer Gain Channel 2 Volume", CMD_CH2, ext1, 0, 31, 1),
-
- UDA1341_SINGLE("Mic Sensitivity Volume", CMD_MIC, ext2, 2, 7, 0),
-
- UDA1341_SINGLE("AGC Output Level", CMD_AGC_LEVEL, ext6, 0, 3, 0),
- UDA1341_SINGLE("AGC Time Constant", CMD_AGC_TIME, ext6, 2, 7, 0),
- UDA1341_SINGLE("AGC Time Constant Switch", CMD_AGC, ext4, 4, 1, 0),
-
- UDA1341_SINGLE("DAC Power", CMD_DAC, stat1, 0, 1, 0),
- UDA1341_SINGLE("ADC Power", CMD_ADC, stat1, 1, 1, 0),
-
- UDA1341_ENUM("Peak detection", CMD_PEAK, data0_2, 5, 1, 0),
- UDA1341_ENUM("De-emphasis", CMD_DEEMP, data0_2, 3, 3, 0),
- UDA1341_ENUM("Mixer mode", CMD_MIXER, ext2, 0, 3, 0),
- UDA1341_ENUM("Filter mode", CMD_FILTER, data0_2, 0, 3, 0),
-
- UDA1341_2REGS("Gain Input Amplifier Gain (channel 2)", CMD_IG, ext4, ext5, 0, 0, 3, 31, 0),
-};
-
-static void uda1341_free(struct l3_client *clnt)
-{
- l3_detach_client(clnt); // calls kfree for driver_data (struct uda1341)
- kfree(clnt);
-}
-
-static int uda1341_dev_free(struct snd_device *device)
-{
- struct l3_client *clnt = device->device_data;
- uda1341_free(clnt);
- return 0;
-}
-
-int __init snd_chip_uda1341_mixer_new(struct snd_card *card, struct l3_client **clntp)
-{
- static struct snd_device_ops ops = {
- .dev_free = uda1341_dev_free,
- };
- struct l3_client *clnt;
- int idx, err;
-
- if (snd_BUG_ON(!card))
- return -EINVAL;
-
- clnt = kzalloc(sizeof(*clnt), GFP_KERNEL);
- if (clnt == NULL)
- return -ENOMEM;
-
- if ((err = l3_attach_client(clnt, "l3-bit-sa1100-gpio", UDA1341_ALSA_NAME))) {
- kfree(clnt);
- return err;
- }
-
- for (idx = 0; idx < ARRAY_SIZE(snd_uda1341_controls); idx++) {
- if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_uda1341_controls[idx], clnt))) < 0) {
- uda1341_free(clnt);
- return err;
- }
- }
-
- if ((err = snd_device_new(card, SNDRV_DEV_CODEC, clnt, &ops)) < 0) {
- uda1341_free(clnt);
- return err;
- }
-
- *clntp = clnt;
- strcpy(card->mixername, "UDA1341TS Mixer");
- ((struct uda1341 *)clnt->driver_data)->card = card;
-
- snd_uda1341_proc_init(card, clnt);
-
- return 0;
-}
-
-/* }}} */
-
-/* {{{ L3 operations */
-
-static int uda1341_attach(struct l3_client *clnt)
-{
- struct uda1341 *uda;
-
- uda = kzalloc(sizeof(*uda), 0, GFP_KERNEL);
- if (!uda)
- return -ENOMEM;
-
- /* init fixed parts of my copy of registers */
- uda->regs[stat0] = STAT0;
- uda->regs[stat1] = STAT1;
-
- uda->regs[data0_0] = DATA0_0;
- uda->regs[data0_1] = DATA0_1;
- uda->regs[data0_2] = DATA0_2;
-
- uda->write = snd_uda1341_codec_write;
- uda->read = snd_uda1341_codec_read;
-
- spin_lock_init(&uda->reg_lock);
-
- clnt->driver_data = uda;
- return 0;
-}
-
-static void uda1341_detach(struct l3_client *clnt)
-{
- kfree(clnt->driver_data);
-}
-
-static int
-uda1341_command(struct l3_client *clnt, int cmd, void *arg)
-{
- if (cmd != CMD_READ_REG)
- return snd_uda1341_cfg_write(clnt, cmd, (int) arg, FLUSH);
-
- return snd_uda1341_codec_read(clnt, (int) arg);
-}
-
-static int uda1341_open(struct l3_client *clnt)
-{
- struct uda1341 *uda = clnt->driver_data;
-
- uda->active = 1;
-
- /* init default configuration */
- snd_uda1341_cfg_write(clnt, CMD_RESET, 0, REGS_ONLY);
- snd_uda1341_cfg_write(clnt, CMD_FS, F256, FLUSH); // unknown state after reset
- snd_uda1341_cfg_write(clnt, CMD_FORMAT, LSB16, FLUSH); // unknown state after reset
- snd_uda1341_cfg_write(clnt, CMD_OGAIN, ON, FLUSH); // default off after reset
- snd_uda1341_cfg_write(clnt, CMD_IGAIN, ON, FLUSH); // default off after reset
- snd_uda1341_cfg_write(clnt, CMD_DAC, ON, FLUSH); // ??? default value after reset
- snd_uda1341_cfg_write(clnt, CMD_ADC, ON, FLUSH); // ??? default value after reset
- snd_uda1341_cfg_write(clnt, CMD_VOLUME, 20, FLUSH); // default 0dB after reset
- snd_uda1341_cfg_write(clnt, CMD_BASS, 0, REGS_ONLY); // default value after reset
- snd_uda1341_cfg_write(clnt, CMD_TREBBLE, 0, REGS_ONLY); // default value after reset
- snd_uda1341_cfg_write(clnt, CMD_PEAK, AFTER, REGS_ONLY);// default value after reset
- snd_uda1341_cfg_write(clnt, CMD_DEEMP, NONE, REGS_ONLY);// default value after reset
- //at this moment should be QMUTED by h3600_audio_init
- snd_uda1341_cfg_write(clnt, CMD_MUTE, OFF, REGS_ONLY); // default value after reset
- snd_uda1341_cfg_write(clnt, CMD_FILTER, MAX, FLUSH); // defaul flat after reset
- snd_uda1341_cfg_write(clnt, CMD_CH1, 31, FLUSH); // default value after reset
- snd_uda1341_cfg_write(clnt, CMD_CH2, 4, FLUSH); // default value after reset
- snd_uda1341_cfg_write(clnt, CMD_MIC, 4, FLUSH); // default 0dB after reset
- snd_uda1341_cfg_write(clnt, CMD_MIXER, MIXER, FLUSH); // default doub.dif.mode
- snd_uda1341_cfg_write(clnt, CMD_AGC, OFF, FLUSH); // default value after reset
- snd_uda1341_cfg_write(clnt, CMD_IG, 0, FLUSH); // unknown state after reset
- snd_uda1341_cfg_write(clnt, CMD_AGC_TIME, 0, FLUSH); // default value after reset
- snd_uda1341_cfg_write(clnt, CMD_AGC_LEVEL, 0, FLUSH); // default value after reset
-
- return 0;
-}
-
-static void uda1341_close(struct l3_client *clnt)
-{
- struct uda1341 *uda = clnt->driver_data;
-
- uda->active = 0;
-}
-
-/* }}} */
-
-/* {{{ Module and L3 initialization */
-
-static struct l3_ops uda1341_ops = {
- .open = uda1341_open,
- .command = uda1341_command,
- .close = uda1341_close,
-};
-
-static struct l3_driver uda1341_driver = {
- .name = UDA1341_ALSA_NAME,
- .attach_client = uda1341_attach,
- .detach_client = uda1341_detach,
- .ops = &uda1341_ops,
- .owner = THIS_MODULE,
-};
-
-static int __init uda1341_init(void)
-{
- return l3_add_driver(&uda1341_driver);
-}
-
-static void __exit uda1341_exit(void)
-{
- l3_del_driver(&uda1341_driver);
-}
-
-module_init(uda1341_init);
-module_exit(uda1341_exit);
-
-MODULE_AUTHOR("Tomas Kasparek <tomas.kasparek@seznam.cz>");
-MODULE_LICENSE("GPL");
-MODULE_DESCRIPTION("Philips UDA1341 CODEC driver for ALSA");
-MODULE_SUPPORTED_DEVICE("{{UDA1341,UDA1341TS}}");
-
-EXPORT_SYMBOL(snd_chip_uda1341_mixer_new);
-
-/* }}} */
-
-/*
- * Local variables:
- * indent-tabs-mode: t
- * End:
- */
Say Y here to include support for AD1848 (Analog Devices) or
CS4248 (Cirrus Logic - Crystal Semiconductors) chips.
- For newer chips from Cirrus Logic, use the CS4231, CS4232 or
- CS4236+ drivers.
+ For newer chips from Cirrus Logic, use the CS4231 or CS4232+
+ drivers.
To compile this driver as a module, choose M here: the module
will be called snd-ad1848.
To compile this driver as a module, choose M here: the module
will be called snd-cs4231.
-config SND_CS4232
- tristate "Generic Cirrus Logic CS4232 driver"
- select SND_OPL3_LIB
- select SND_MPU401_UART
- select SND_WSS_LIB
- help
- Say Y here to include support for CS4232 chips from Cirrus
- Logic - Crystal Semiconductors.
-
- To compile this driver as a module, choose M here: the module
- will be called snd-cs4232.
-
config SND_CS4236
- tristate "Generic Cirrus Logic CS4236+ driver"
+ tristate "Generic Cirrus Logic CS4232/CS4236+ driver"
select SND_OPL3_LIB
select SND_MPU401_UART
select SND_WSS_LIB
help
- Say Y to include support for CS4235,CS4236,CS4237B,CS4238B,
- CS4239 chips from Cirrus Logic - Crystal Semiconductors.
+ Say Y to include support for CS4232,CS4235,CS4236,CS4237B,
+ CS4238B,CS4239 chips from Cirrus Logic - Crystal
+ Semiconductors.
To compile this driver as a module, choose M here: the module
will be called snd-cs4236.
struct snd_opl3 *opl3;
struct snd_timer *timer;
- if ((card = snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(struct snd_card_ad1816a))) == NULL)
- return -ENOMEM;
+ error = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct snd_card_ad1816a), &card);
+ if (error < 0)
+ return error;
acard = (struct snd_card_ad1816a *)card->private_data;
if ((error = snd_card_ad1816a_pnp(dev, acard, pcard, pid))) {
struct snd_pcm *pcm;
int error;
- card = snd_card_new(index[n], id[n], THIS_MODULE, 0);
- if (!card)
- return -EINVAL;
+ error = snd_card_create(index[n], id[n], THIS_MODULE, 0, &card);
+ if (error < 0)
+ return error;
error = snd_wss_create(card, port[n], -1, irq[n], dma1[n], -1,
thinkpad[n] ? WSS_HW_THINKPAD : WSS_HW_DETECT,
struct snd_opl3 *opl3;
int error;
- card = snd_card_new(index[n], id[n], THIS_MODULE, 0);
- if (!card) {
+ error = snd_card_create(index[n], id[n], THIS_MODULE, 0, &card);
+ if (error < 0) {
dev_err(dev, "could not create card\n");
- return -EINVAL;
+ return error;
}
card->private_data = request_region(port[n], 4, CRD_NAME);
struct snd_card_als100 *acard;
struct snd_opl3 *opl3;
- if ((card = snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(struct snd_card_als100))) == NULL)
- return -ENOMEM;
+ error = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct snd_card_als100), &card);
+ if (error < 0)
+ return error;
acard = card->private_data;
if ((error = snd_card_als100_pnp(dev, acard, pcard, pid))) {
struct snd_wss *chip;
struct snd_opl3 *opl3;
- if ((card = snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(struct snd_card_azt2320))) == NULL)
- return -ENOMEM;
+ error = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct snd_card_azt2320), &card);
+ if (error < 0)
+ return error;
acard = (struct snd_card_azt2320 *)card->private_data;
if ((error = snd_card_azt2320_pnp(dev, acard, pcard, pid))) {
#define PFX "cmi8330: "
-static struct snd_card *snd_cmi8330_card_new(int dev)
+static int snd_cmi8330_card_new(int dev, struct snd_card **cardp)
{
struct snd_card *card;
struct snd_cmi8330 *acard;
+ int err;
- card = snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(struct snd_cmi8330));
- if (card == NULL) {
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct snd_cmi8330), &card);
+ if (err < 0) {
snd_printk(KERN_ERR PFX "could not get a new card\n");
- return NULL;
+ return err;
}
acard = card->private_data;
acard->card = card;
- return card;
+ *cardp = card;
+ return 0;
}
static int __devinit snd_cmi8330_probe(struct snd_card *card, int dev)
struct snd_card *card;
int err;
- card = snd_cmi8330_card_new(dev);
- if (! card)
- return -ENOMEM;
+ err = snd_cmi8330_card_new(dev, &card);
+ if (err < 0)
+ return err;
snd_card_set_dev(card, pdev);
if ((err = snd_cmi8330_probe(card, dev)) < 0) {
snd_card_free(card);
if (dev >= SNDRV_CARDS)
return -ENODEV;
- card = snd_cmi8330_card_new(dev);
- if (! card)
- return -ENOMEM;
+ res = snd_cmi8330_card_new(dev, &card);
+ if (res < 0)
+ return res;
if ((res = snd_cmi8330_pnp(dev, card->private_data, pcard, pid)) < 0) {
snd_printk(KERN_ERR PFX "PnP detection failed\n");
snd_card_free(card);
# Copyright (c) 2001 by Jaroslav Kysela <perex@perex.cz>
#
-snd-cs4236-lib-objs := cs4236_lib.o
snd-cs4231-objs := cs4231.o
-snd-cs4232-objs := cs4232.o
-snd-cs4236-objs := cs4236.o
+snd-cs4236-objs := cs4236.o cs4236_lib.o
# Toplevel Module Dependency
obj-$(CONFIG_SND_CS4231) += snd-cs4231.o
-obj-$(CONFIG_SND_CS4232) += snd-cs4232.o
-obj-$(CONFIG_SND_CS4236) += snd-cs4236.o snd-cs4236-lib.o
+obj-$(CONFIG_SND_CS4236) += snd-cs4236.o
+
struct snd_pcm *pcm;
int error;
- card = snd_card_new(index[n], id[n], THIS_MODULE, 0);
- if (!card)
- return -EINVAL;
+ error = snd_card_create(index[n], id[n], THIS_MODULE, 0, &card);
+ if (error < 0)
+ return error;
error = snd_wss_create(card, port[n], -1, irq[n], dma1[n], dma2[n],
WSS_HW_DETECT, 0, &chip);
+++ /dev/null
-#define CS4232
-#include "cs4236.c"
MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
MODULE_LICENSE("GPL");
-#ifdef CS4232
-MODULE_DESCRIPTION("Cirrus Logic CS4232");
+MODULE_DESCRIPTION("Cirrus Logic CS4232-9");
MODULE_SUPPORTED_DEVICE("{{Turtle Beach,TBS-2000},"
"{Turtle Beach,Tropez Plus},"
"{SIC CrystalWave 32},"
"{Hewlett Packard,Omnibook 5500},"
"{TerraTec,Maestro 32/96},"
- "{Philips,PCA70PS}}");
-#else
-MODULE_DESCRIPTION("Cirrus Logic CS4235-9");
-MODULE_SUPPORTED_DEVICE("{{Crystal Semiconductors,CS4235},"
+ "{Philips,PCA70PS}},"
+ "{{Crystal Semiconductors,CS4235},"
"{Crystal Semiconductors,CS4236},"
"{Crystal Semiconductors,CS4237},"
"{Crystal Semiconductors,CS4238},"
"{Typhoon Soundsystem,CS4236B},"
"{Turtle Beach,Malibu},"
"{Unknown,Digital PC 5000 Onboard}}");
-#endif
-#ifdef CS4232
-#define IDENT "CS4232"
-#define DEV_NAME "cs4232"
-#else
-#define IDENT "CS4236+"
-#define DEV_NAME "cs4236"
-#endif
+MODULE_ALIAS("snd_cs4232");
+
+#define IDENT "CS4232+"
+#define DEV_NAME "cs4232+"
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
#ifdef CONFIG_PNP
static int isa_registered;
static int pnpc_registered;
-#ifdef CS4232
static int pnp_registered;
-#endif
#endif /* CONFIG_PNP */
struct snd_card_cs4236 {
#ifdef CONFIG_PNP
-#ifdef CS4232
/*
* PNP BIOS
*/
-static const struct pnp_device_id snd_cs4232_pnpbiosids[] = {
+static const struct pnp_device_id snd_cs423x_pnpbiosids[] = {
{ .id = "CSC0100" },
{ .id = "CSC0000" },
/* Guillemot Turtlebeach something appears to be cs4232 compatible
{ .id = "GIM0100" },
{ .id = "" }
};
-MODULE_DEVICE_TABLE(pnp, snd_cs4232_pnpbiosids);
-#endif /* CS4232 */
+MODULE_DEVICE_TABLE(pnp, snd_cs423x_pnpbiosids);
-#ifdef CS4232
#define CS423X_ISAPNP_DRIVER "cs4232_isapnp"
static struct pnp_card_device_id snd_cs423x_pnpids[] = {
/* Philips PCA70PS */
{ .id = "CSCf032", .devs = { { "CSC0000" }, { "CSC0010" }, { "CSC0003" } } },
/* Netfinity 3000 on-board soundcard */
{ .id = "CSCe825", .devs = { { "CSC0100" }, { "CSC0110" }, { "CSC010f" } } },
- /* --- */
- { .id = "" } /* end */
-};
-#else /* CS4236 */
-#define CS423X_ISAPNP_DRIVER "cs4236_isapnp"
-static struct pnp_card_device_id snd_cs423x_pnpids[] = {
/* Intel Marlin Spike Motherboard - CS4235 */
{ .id = "CSC0225", .devs = { { "CSC0000" }, { "CSC0010" }, { "CSC0003" } } },
/* Intel Marlin Spike Motherboard (#2) - CS4235 */
/* --- */
{ .id = "" } /* end */
};
-#endif
MODULE_DEVICE_TABLE(pnp_card, snd_cs423x_pnpids);
return 0;
}
-#ifdef CS4232
-static int __devinit snd_card_cs4232_pnp(int dev, struct snd_card_cs4236 *acard,
- struct pnp_dev *pdev)
+static int __devinit snd_card_cs423x_pnp(int dev, struct snd_card_cs4236 *acard,
+ struct pnp_dev *pdev,
+ struct pnp_dev *cdev)
{
acard->wss = pdev;
if (snd_cs423x_pnp_init_wss(dev, acard->wss) < 0)
return -EBUSY;
- cport[dev] = -1;
+ if (cdev)
+ cport[dev] = pnp_port_start(cdev, 0);
+ else
+ cport[dev] = -1;
return 0;
}
-#endif
static int __devinit snd_card_cs423x_pnpc(int dev, struct snd_card_cs4236 *acard,
struct pnp_card_link *card,
release_and_free_resource(acard->res_sb_port);
}
-static struct snd_card *snd_cs423x_card_new(int dev)
+static int snd_cs423x_card_new(int dev, struct snd_card **cardp)
{
struct snd_card *card;
+ int err;
- card = snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(struct snd_card_cs4236));
- if (card == NULL)
- return NULL;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct snd_card_cs4236), &card);
+ if (err < 0)
+ return err;
card->private_free = snd_card_cs4236_free;
- return card;
+ *cardp = card;
+ return 0;
}
static int __devinit snd_cs423x_probe(struct snd_card *card, int dev)
return -EBUSY;
}
-#ifdef CS4232
err = snd_wss_create(card, port[dev], cport[dev],
irq[dev],
dma1[dev], dma2[dev],
- WSS_HW_DETECT, 0, &chip);
- if (err < 0)
- return err;
- acard->chip = chip;
-
- err = snd_wss_pcm(chip, 0, &pcm);
- if (err < 0)
- return err;
-
- err = snd_wss_mixer(chip);
+ WSS_HW_DETECT3, 0, &chip);
if (err < 0)
return err;
-
-#else /* CS4236 */
- err = snd_cs4236_create(card,
- port[dev], cport[dev],
- irq[dev], dma1[dev], dma2[dev],
- WSS_HW_DETECT, 0, &chip);
- if (err < 0)
- return err;
- acard->chip = chip;
-
- err = snd_cs4236_pcm(chip, 0, &pcm);
- if (err < 0)
- return err;
-
- err = snd_cs4236_mixer(chip);
- if (err < 0)
- return err;
-#endif
+ if (chip->hardware & WSS_HW_CS4236B_MASK) {
+ snd_wss_free(chip);
+ err = snd_cs4236_create(card,
+ port[dev], cport[dev],
+ irq[dev], dma1[dev], dma2[dev],
+ WSS_HW_DETECT, 0, &chip);
+ if (err < 0)
+ return err;
+ acard->chip = chip;
+
+ err = snd_cs4236_pcm(chip, 0, &pcm);
+ if (err < 0)
+ return err;
+
+ err = snd_cs4236_mixer(chip);
+ if (err < 0)
+ return err;
+ } else {
+ acard->chip = chip;
+ err = snd_wss_pcm(chip, 0, &pcm);
+ if (err < 0)
+ return err;
+
+ err = snd_wss_mixer(chip);
+ if (err < 0)
+ return err;
+ }
strcpy(card->driver, pcm->name);
strcpy(card->shortname, pcm->name);
sprintf(card->longname, "%s at 0x%lx, irq %i, dma %i",
struct snd_card *card;
int err;
- card = snd_cs423x_card_new(dev);
- if (! card)
- return -ENOMEM;
+ err = snd_cs423x_card_new(dev, &card);
+ if (err < 0)
+ return err;
snd_card_set_dev(card, pdev);
if ((err = snd_cs423x_probe(card, dev)) < 0) {
snd_card_free(card);
#ifdef CONFIG_PNP
-#ifdef CS4232
-static int __devinit snd_cs4232_pnpbios_detect(struct pnp_dev *pdev,
+static int __devinit snd_cs423x_pnpbios_detect(struct pnp_dev *pdev,
const struct pnp_device_id *id)
{
static int dev;
int err;
struct snd_card *card;
+ struct pnp_dev *cdev;
+ char cid[PNP_ID_LEN];
if (pnp_device_is_isapnp(pdev))
return -ENOENT; /* we have another procedure - card */
if (dev >= SNDRV_CARDS)
return -ENODEV;
- card = snd_cs423x_card_new(dev);
- if (! card)
- return -ENOMEM;
- if ((err = snd_card_cs4232_pnp(dev, card->private_data, pdev)) < 0) {
+ /* prepare second id */
+ strcpy(cid, pdev->id[0].id);
+ cid[5] = '1';
+ cdev = NULL;
+ list_for_each_entry(cdev, &(pdev->protocol->devices), protocol_list) {
+ if (!strcmp(cdev->id[0].id, cid))
+ break;
+ }
+ err = snd_cs423x_card_new(dev, &card);
+ if (err < 0)
+ return err;
+ err = snd_card_cs423x_pnp(dev, card->private_data, pdev, cdev);
+ if (err < 0) {
printk(KERN_ERR "PnP BIOS detection failed for " IDENT "\n");
snd_card_free(card);
return err;
return 0;
}
-static void __devexit snd_cs4232_pnp_remove(struct pnp_dev * pdev)
+static void __devexit snd_cs423x_pnp_remove(struct pnp_dev *pdev)
{
snd_card_free(pnp_get_drvdata(pdev));
pnp_set_drvdata(pdev, NULL);
}
#ifdef CONFIG_PM
-static int snd_cs4232_pnp_suspend(struct pnp_dev *pdev, pm_message_t state)
+static int snd_cs423x_pnp_suspend(struct pnp_dev *pdev, pm_message_t state)
{
return snd_cs423x_suspend(pnp_get_drvdata(pdev));
}
-static int snd_cs4232_pnp_resume(struct pnp_dev *pdev)
+static int snd_cs423x_pnp_resume(struct pnp_dev *pdev)
{
return snd_cs423x_resume(pnp_get_drvdata(pdev));
}
#endif
-static struct pnp_driver cs4232_pnp_driver = {
- .name = "cs4232-pnpbios",
- .id_table = snd_cs4232_pnpbiosids,
- .probe = snd_cs4232_pnpbios_detect,
- .remove = __devexit_p(snd_cs4232_pnp_remove),
+static struct pnp_driver cs423x_pnp_driver = {
+ .name = "cs423x-pnpbios",
+ .id_table = snd_cs423x_pnpbiosids,
+ .probe = snd_cs423x_pnpbios_detect,
+ .remove = __devexit_p(snd_cs423x_pnp_remove),
#ifdef CONFIG_PM
- .suspend = snd_cs4232_pnp_suspend,
- .resume = snd_cs4232_pnp_resume,
+ .suspend = snd_cs423x_pnp_suspend,
+ .resume = snd_cs423x_pnp_resume,
#endif
};
-#endif /* CS4232 */
static int __devinit snd_cs423x_pnpc_detect(struct pnp_card_link *pcard,
const struct pnp_card_device_id *pid)
if (dev >= SNDRV_CARDS)
return -ENODEV;
- card = snd_cs423x_card_new(dev);
- if (! card)
- return -ENOMEM;
+ res = snd_cs423x_card_new(dev, &card);
+ if (res < 0)
+ return res;
if ((res = snd_card_cs423x_pnpc(dev, card->private_data, pcard, pid)) < 0) {
printk(KERN_ERR "isapnp detection failed and probing for " IDENT
" is not supported\n");
#ifdef CONFIG_PNP
if (!err)
isa_registered = 1;
-#ifdef CS4232
- err = pnp_register_driver(&cs4232_pnp_driver);
+ err = pnp_register_driver(&cs423x_pnp_driver);
if (!err)
pnp_registered = 1;
-#endif
err = pnp_register_card_driver(&cs423x_pnpc_driver);
if (!err)
pnpc_registered = 1;
-#ifdef CS4232
if (pnp_registered)
err = 0;
-#endif
if (isa_registered)
err = 0;
#endif
#ifdef CONFIG_PNP
if (pnpc_registered)
pnp_unregister_card_driver(&cs423x_pnpc_driver);
-#ifdef CS4232
if (pnp_registered)
- pnp_unregister_driver(&cs4232_pnp_driver);
-#endif
+ pnp_unregister_driver(&cs423x_pnp_driver);
if (isa_registered)
#endif
isa_unregister_driver(&cs423x_isa_driver);
#include <sound/wss.h>
#include <sound/asoundef.h>
-MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
-MODULE_DESCRIPTION("Routines for control of CS4235/4236B/4237B/4238B/4239 chips");
-MODULE_LICENSE("GPL");
-
/*
*
*/
}
return 0;
}
-
-EXPORT_SYMBOL(snd_cs4236_create);
-EXPORT_SYMBOL(snd_cs4236_pcm);
-EXPORT_SYMBOL(snd_cs4236_mixer);
-
-/*
- * INIT part
- */
-
-static int __init alsa_cs4236_init(void)
-{
- return 0;
-}
-
-static void __exit alsa_cs4236_exit(void)
-{
-}
-
-module_init(alsa_cs4236_init)
-module_exit(alsa_cs4236_exit)
struct snd_card_dt019x *acard;
struct snd_opl3 *opl3;
- if ((card = snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(struct snd_card_dt019x))) == NULL)
- return -ENOMEM;
+ error = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct snd_card_dt019x), &card);
+ if (error < 0)
+ return error;
acard = card->private_data;
snd_card_set_dev(card, &pcard->card->dev);
struct snd_pcm *pcm;
int error;
- card = snd_card_new(index[n], id[n], THIS_MODULE, 0);
- if (!card)
- return -EINVAL;
+ error = snd_card_create(index[n], id[n], THIS_MODULE, 0, &card);
+ if (error < 0)
+ return error;
error = snd_es1688_legacy_create(card, dev, n, &chip);
if (error < 0)
#define is_isapnp_selected(dev) 0
#endif
-static struct snd_card *snd_es18xx_card_new(int dev)
+static int snd_es18xx_card_new(int dev, struct snd_card **cardp)
{
- return snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(struct snd_audiodrive));
+ return snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct snd_audiodrive), cardp);
}
static int __devinit snd_audiodrive_probe(struct snd_card *card, int dev)
struct snd_card *card;
int err;
- card = snd_es18xx_card_new(dev);
- if (! card)
- return -ENOMEM;
+ err = snd_es18xx_card_new(dev, &card);
+ if (err < 0)
+ return err;
snd_card_set_dev(card, devptr);
if ((err = snd_audiodrive_probe(card, dev)) < 0) {
snd_card_free(card);
if (dev >= SNDRV_CARDS)
return -ENODEV;
- card = snd_es18xx_card_new(dev);
- if (! card)
- return -ENOMEM;
+ err = snd_es18xx_card_new(dev, &card);
+ if (err < 0)
+ return err;
if ((err = snd_audiodrive_pnp(dev, card->private_data, pdev)) < 0) {
snd_card_free(card);
return err;
if (dev >= SNDRV_CARDS)
return -ENODEV;
- card = snd_es18xx_card_new(dev);
- if (! card)
- return -ENOMEM;
+ res = snd_es18xx_card_new(dev, &card);
+ if (res < 0)
+ return res;
if ((res = snd_audiodrive_pnpc(dev, card->private_data, pcard, pid)) < 0) {
snd_card_free(card);
struct snd_gus_card *gus;
int error;
- card = snd_card_new(index[n], id[n], THIS_MODULE, 0);
- if (!card)
- return -EINVAL;
+ error = snd_card_create(index[n], id[n], THIS_MODULE, 0, &card);
+ if (error < 0)
+ return error;
if (pcm_channels[n] < 2)
pcm_channels[n] = 2;
struct snd_opl3 *opl3;
int error;
- card = snd_card_new(index[n], id[n], THIS_MODULE, 0);
- if (!card)
- return -EINVAL;
+ error = snd_card_create(index[n], id[n], THIS_MODULE, 0, &card);
+ if (error < 0)
+ return error;
if (mpu_port[n] == SNDRV_AUTO_PORT)
mpu_port[n] = 0;
struct snd_wss *wss;
struct snd_gusmax *maxcard;
- card = snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(struct snd_gusmax));
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct snd_gusmax), &card);
+ if (err < 0)
+ return err;
card->private_free = snd_gusmax_free;
maxcard = (struct snd_gusmax *)card->private_data;
maxcard->card = card;
free_irq(iwcard->irq, (void *)iwcard);
}
-static struct snd_card *snd_interwave_card_new(int dev)
+static int snd_interwave_card_new(int dev, struct snd_card **cardp)
{
struct snd_card *card;
struct snd_interwave *iwcard;
+ int err;
- card = snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(struct snd_interwave));
- if (card == NULL)
- return NULL;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct snd_interwave), &card);
+ if (err < 0)
+ return err;
iwcard = card->private_data;
iwcard->card = card;
iwcard->irq = -1;
card->private_free = snd_interwave_free;
- return card;
+ *cardp = card;
+ return 0;
}
static int __devinit snd_interwave_probe(struct snd_card *card, int dev)
struct snd_card *card;
int err;
- card = snd_interwave_card_new(dev);
- if (! card)
- return -ENOMEM;
+ err = snd_interwave_card_new(dev, &card);
+ if (err < 0)
+ return err;
snd_card_set_dev(card, devptr);
if ((err = snd_interwave_probe(card, dev)) < 0) {
if (dev >= SNDRV_CARDS)
return -ENODEV;
- card = snd_interwave_card_new(dev);
- if (! card)
- return -ENOMEM;
+ res = snd_interwave_card_new(dev, &card);
+ if (res < 0)
+ return res;
if ((res = snd_interwave_pnp(dev, card->private_data, pcard, pid)) < 0) {
snd_card_free(card);
release_and_free_resource(chip->res_port);
}
-static struct snd_card *snd_opl3sa2_card_new(int dev)
+static int snd_opl3sa2_card_new(int dev, struct snd_card **cardp)
{
struct snd_card *card;
struct snd_opl3sa2 *chip;
+ int err;
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, sizeof(struct snd_opl3sa2));
- if (card == NULL)
- return NULL;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct snd_opl3sa2), &card);
+ if (err < 0)
+ return err;
strcpy(card->driver, "OPL3SA2");
strcpy(card->shortname, "Yamaha OPL3-SA");
chip = card->private_data;
spin_lock_init(&chip->reg_lock);
chip->irq = -1;
card->private_free = snd_opl3sa2_free;
- return card;
+ *cardp = card;
+ return 0;
}
static int __devinit snd_opl3sa2_probe(struct snd_card *card, int dev)
if (dev >= SNDRV_CARDS)
return -ENODEV;
- card = snd_opl3sa2_card_new(dev);
- if (! card)
- return -ENOMEM;
+ err = snd_opl3sa2_card_new(dev, &card);
+ if (err < 0)
+ return err;
if ((err = snd_opl3sa2_pnp(dev, card->private_data, pdev)) < 0) {
snd_card_free(card);
return err;
if (dev >= SNDRV_CARDS)
return -ENODEV;
- card = snd_opl3sa2_card_new(dev);
- if (! card)
- return -ENOMEM;
+ err = snd_opl3sa2_card_new(dev, &card);
+ if (err < 0)
+ return err;
if ((err = snd_opl3sa2_pnp(dev, card->private_data, pdev)) < 0) {
snd_card_free(card);
return err;
struct snd_card *card;
int err;
- card = snd_opl3sa2_card_new(dev);
- if (! card)
- return -ENOMEM;
+ err = snd_opl3sa2_card_new(dev, &card);
+ if (err < 0)
+ return err;
snd_card_set_dev(card, pdev);
if ((err = snd_opl3sa2_probe(card, dev)) < 0) {
snd_card_free(card);
struct snd_pcm *pcm;
struct snd_rawmidi *rmidi;
- if (!(card = snd_card_new(index, id, THIS_MODULE,
- sizeof(struct snd_miro))))
- return -ENOMEM;
+ error = snd_card_create(index, id, THIS_MODULE,
+ sizeof(struct snd_miro), &card);
+ if (error < 0)
+ return error;
card->private_free = snd_card_miro_free;
miro = card->private_data;
return snd_card_register(card);
}
-static struct snd_card *snd_opti9xx_card_new(void)
+static int snd_opti9xx_card_new(struct snd_card **cardp)
{
struct snd_card *card;
+ int err;
- card = snd_card_new(index, id, THIS_MODULE, sizeof(struct snd_opti9xx));
- if (! card)
- return NULL;
+ err = snd_card_create(index, id, THIS_MODULE,
+ sizeof(struct snd_opti9xx), &card);
+ if (err < 0)
+ return err;
card->private_free = snd_card_opti9xx_free;
- return card;
+ *cardp = card;
+ return 0;
}
static int __devinit snd_opti9xx_isa_match(struct device *devptr,
}
#endif
- card = snd_opti9xx_card_new();
- if (! card)
- return -ENOMEM;
+ error = snd_opti9xx_card_new(&card);
+ if (error < 0)
+ return error;
if ((error = snd_card_opti9xx_detect(card, card->private_data)) < 0) {
snd_card_free(card);
return -EBUSY;
if (! isapnp)
return -ENODEV;
- card = snd_opti9xx_card_new();
- if (! card)
- return -ENOMEM;
+ error = snd_opti9xx_card_new(&card);
+ if (error < 0)
+ return error;
chip = card->private_data;
hw = snd_card_opti9xx_pnp(chip, pcard, pid);
struct snd_card *card;
struct snd_card_es968 *acard;
- if ((card = snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(struct snd_card_es968))) == NULL)
- return -ENOMEM;
+ error = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct snd_card_es968), &card);
+ if (error < 0)
+ return error;
acard = card->private_data;
if ((error = snd_card_es968_pnp(dev, acard, pcard, pid))) {
snd_card_free(card);
#define is_isapnp_selected(dev) 0
#endif
-static struct snd_card *snd_sb16_card_new(int dev)
+static int snd_sb16_card_new(int dev, struct snd_card **cardp)
{
- struct snd_card *card = snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(struct snd_card_sb16));
- if (card == NULL)
- return NULL;
+ struct snd_card *card;
+ int err;
+
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct snd_card_sb16), &card);
+ if (err < 0)
+ return err;
card->private_free = snd_sb16_free;
- return card;
+ *cardp = card;
+ return 0;
}
static int __devinit snd_sb16_probe(struct snd_card *card, int dev)
struct snd_card *card;
int err;
- card = snd_sb16_card_new(dev);
- if (! card)
- return -ENOMEM;
+ err = snd_sb16_card_new(dev, &card);
+ if (err < 0)
+ return err;
acard = card->private_data;
/* non-PnP FM port address is hardwired with base port address */
for ( ; dev < SNDRV_CARDS; dev++) {
if (!enable[dev] || !isapnp[dev])
continue;
- card = snd_sb16_card_new(dev);
- if (! card)
- return -ENOMEM;
+ res = snd_sb16_card_new(dev, &card);
+ if (res < 0)
+ return res;
snd_card_set_dev(card, &pcard->card->dev);
if ((res = snd_card_sb16_pnp(dev, card->private_data, pcard, pid)) < 0 ||
(res = snd_sb16_probe(card, dev)) < 0) {
struct snd_opl3 *opl3;
int err;
- card = snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(struct snd_sb8));
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct snd_sb8), &card);
+ if (err < 0)
+ return err;
acard = card->private_data;
card->private_free = snd_sb8_free;
char __iomem *vmss_port;
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (!card)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
if (xirq == SNDRV_AUTO_IRQ) {
xirq = snd_legacy_find_free_irq(possible_irqs);
struct snd_card *card;
struct snd_wss *chip;
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
xirq = irq[dev];
if (xirq == SNDRV_AUTO_IRQ) {
struct soundscape *sscape;
int ret;
- card = snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(struct soundscape));
- if (!card)
- return -ENOMEM;
+ ret = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct soundscape), &card);
+ if (ret < 0)
+ return ret;
sscape = get_card_soundscape(card);
sscape->type = SSCAPE;
* Create a new ALSA sound card entry, in anticipation
* of detecting our hardware ...
*/
- card = snd_card_new(index[idx], id[idx], THIS_MODULE,
- sizeof(struct soundscape));
- if (!card)
- return -ENOMEM;
+ ret = snd_card_create(index[idx], id[idx], THIS_MODULE,
+ sizeof(struct soundscape), &card);
+ if (ret < 0)
+ return ret;
sscape = get_card_soundscape(card);
}
}
-static struct snd_card *snd_wavefront_card_new(int dev)
+static int snd_wavefront_card_new(int dev, struct snd_card **cardp)
{
struct snd_card *card;
snd_wavefront_card_t *acard;
+ int err;
- card = snd_card_new (index[dev], id[dev], THIS_MODULE,
- sizeof(snd_wavefront_card_t));
- if (card == NULL)
- return NULL;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(snd_wavefront_card_t), &card);
+ if (err < 0)
+ return err;
acard = card->private_data;
acard->wavefront.irq = -1;
acard->wavefront.card = card;
card->private_free = snd_wavefront_free;
- return card;
+ *cardp = card;
+ return 0;
}
static int __devinit
struct snd_card *card;
int err;
- card = snd_wavefront_card_new(dev);
- if (! card)
- return -ENOMEM;
+ err = snd_wavefront_card_new(dev, &card);
+ if (err < 0)
+ return err;
snd_card_set_dev(card, pdev);
if ((err = snd_wavefront_probe(card, dev)) < 0) {
snd_card_free(card);
if (dev >= SNDRV_CARDS)
return -ENODEV;
- card = snd_wavefront_card_new(dev);
- if (! card)
- return -ENOMEM;
+ res = snd_wavefront_card_new(dev, &card);
+ if (res < 0)
+ return res;
if (snd_wavefront_pnp (dev, card->private_data, pcard, pid) < 0) {
if (cs4232_pcm_port[dev] == SNDRV_AUTO_PORT) {
}
#endif /* CONFIG_PM */
-static int snd_wss_free(struct snd_wss *chip)
+int snd_wss_free(struct snd_wss *chip)
{
release_and_free_resource(chip->res_port);
release_and_free_resource(chip->res_cport);
kfree(chip);
return 0;
}
+EXPORT_SYMBOL(snd_wss_free);
static int snd_wss_dev_free(struct snd_device *device)
{
struct snd_card *card;
struct snd_au1000 *au1000;
- card = snd_card_new(-1, "AC97", THIS_MODULE, sizeof(struct snd_au1000));
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(-1, "AC97", THIS_MODULE,
+ sizeof(struct snd_au1000), &card);
+ if (err < 0)
+ return err;
card->private_free = snd_au1000_free;
au1000 = card->private_data;
return err;
}
- printk( KERN_INFO "ALSA AC97: Driver Initialized\n" );
+ printk(KERN_INFO "ALSA AC97: Driver Initialized\n");
au1000_card = card;
return 0;
}
struct snd_hal2 *chip;
int err;
- card = snd_card_new(index, id, THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index, id, THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
err = hal2_create(card, &chip);
if (err < 0) {
struct snd_sgio2audio *chip;
int err;
- card = snd_card_new(index, id, THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index, id, THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
err = snd_sgio2audio_create(card, &chip);
if (err < 0) {
struct snd_card *card;
struct snd_harmony *h;
- card = snd_card_new(index, id, THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index, id, THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
err = snd_harmony_create(card, padev, &h);
if (err < 0)
To compile this driver as a module, choose M here: the module
will be called snd-indigodj
+config SND_INDIGOIOX
+ tristate "(Echoaudio) Indigo IOx"
+ select FW_LOADER
+ select SND_PCM
+ help
+ Say 'Y' or 'M' to include support for Echoaudio Indigo IOx.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-indigoiox
+
+config SND_INDIGODJX
+ tristate "(Echoaudio) Indigo DJx"
+ select FW_LOADER
+ select SND_PCM
+ help
+ Say 'Y' or 'M' to include support for Echoaudio Indigo DJx.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-indigodjx
+
config SND_EMU10K1
tristate "Emu10k1 (SB Live!, Audigy, E-mu APS)"
select FW_LOADER
{ 0x43525970, 0xfffffff8, "CS4202", NULL, NULL },
{ 0x43585421, 0xffffffff, "HSD11246", NULL, NULL }, // SmartMC II
{ 0x43585428, 0xfffffff8, "Cx20468", patch_conexant, NULL }, // SmartAMC fixme: the mask might be different
+{ 0x43585430, 0xffffffff, "Cx20468-31", patch_conexant, NULL },
{ 0x43585431, 0xffffffff, "Cx20551", patch_cx20551, NULL },
{ 0x44543031, 0xfffffff0, "DT0398", NULL, NULL },
{ 0x454d4328, 0xffffffff, "EM28028", NULL, NULL }, // same as TR28028?
EXPORT_SYMBOL(snd_ac97_update_bits);
-/* no lock version - see snd_ac97_updat_bits() */
+/* no lock version - see snd_ac97_update_bits() */
int snd_ac97_update_bits_nolock(struct snd_ac97 *ac97, unsigned short reg,
unsigned short mask, unsigned short value)
{
{
int err, idx;
- //printk("AC97_GPIO_CFG = %x\n",snd_ac97_read(ac97,AC97_GPIO_CFG));
+ /*
+ printk(KERN_DEBUG "AC97_GPIO_CFG = %x\n",
+ snd_ac97_read(ac97,AC97_GPIO_CFG));
+ */
snd_ac97_write(ac97, AC97_GPIO_CFG, 0xffff & ~(AC97_GPIO_LINE1_OH));
snd_ac97_write(ac97, AC97_GPIO_POLARITY, 0xffff & ~(AC97_GPIO_LINE1_OH));
snd_ac97_write(ac97, AC97_GPIO_STICKY, 0xffff);
snd_iprintf(buffer, "PCI Subsys Device: 0x%04x\n\n",
ac97->subsystem_device);
+ snd_iprintf(buffer, "Flags: %x\n", ac97->flags);
+
if ((ac97->ext_id & AC97_EI_REV_MASK) >= AC97_EI_REV_23) {
val = snd_ac97_read(ac97, AC97_INT_PAGING);
snd_ac97_update_bits(ac97, AC97_INT_PAGING,
}
/* (2) */
- card = snd_card_new(index[devno], id[devno], THIS_MODULE, 0);
+ err = snd_card_create(index[devno], id[devno], THIS_MODULE, 0, &card);
/* XXX REVISIT: we can probably allocate chip in this call */
- if (card == NULL)
- return -ENOMEM;
+ if (err < 0)
+ return err;
strcpy(card->driver, "AD1889");
strcpy(card->shortname, "Analog Devices AD1889");
int idx;
for (idx = 0; idx < 0x19; idx++)
- printk("ak4531 0x%x: 0x%x\n", idx, ak4531->regs[idx]);
+ printk(KERN_DEBUG "ak4531 0x%x: 0x%x\n",
+ idx, ak4531->regs[idx]);
}
#endif
{
int err;
- snd_ali_printk("resouces allocation ...\n");
+ snd_ali_printk("resources allocation ...\n");
err = pci_request_regions(codec->pci, "ALI 5451");
if (err < 0)
return err;
return -EBUSY;
}
codec->irq = codec->pci->irq;
- snd_ali_printk("resouces allocated.\n");
+ snd_ali_printk("resources allocated.\n");
return 0;
}
static int snd_ali_dev_free(struct snd_device *device)
snd_ali_printk("probe ...\n");
- card = snd_card_new(index, id, THIS_MODULE, 0);
- if (!card)
- return -ENOMEM;
+ err = snd_card_create(index, id, THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
err = snd_ali_create(card, pci, pcm_channels, spdif, &codec);
if (err < 0)
#define DEBUG_PLAY_REC 0
#if DEBUG_CALLS
-#define snd_als300_dbgcalls(format, args...) printk(format, ##args)
+#define snd_als300_dbgcalls(format, args...) printk(KERN_DEBUG format, ##args)
#define snd_als300_dbgcallenter() printk(KERN_ERR "--> %s\n", __func__)
#define snd_als300_dbgcallleave() printk(KERN_ERR "<-- %s\n", __func__)
#else
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
- if (card == NULL)
- return -ENOMEM;
+ if (err < 0)
+ return err;
chip_type = pci_id->driver_data;
pci_write_config_word(pci, PCI_COMMAND, word | PCI_COMMAND_IO);
pci_set_master(pci);
- card = snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(*acard) /* private_data: acard */);
- if (card == NULL) {
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(*acard) /* private_data: acard */,
+ &card);
+ if (err < 0) {
pci_release_regions(pci);
pci_disable_device(pci);
- return -ENOMEM;
+ return err;
}
acard = card->private_data;
struct atiixp *chip;
int err;
- card = snd_card_new(index, id, THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index, id, THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
strcpy(card->driver, spdif_aclink ? "ATIIXP" : "ATIIXP-SPDMA");
strcpy(card->shortname, "ATI IXP");
struct atiixp_modem *chip;
int err;
- card = snd_card_new(index, id, THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index, id, THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
strcpy(card->driver, "ATIIXP-MODEM");
strcpy(card->shortname, "ATI IXP Modem");
return -ENOENT;
}
// (2)
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
// (3)
if ((err = snd_vortex_create(card, pci, &chip)) < 0) {
/* Reset Single A3D source. */
static void a3dsrc_ZeroState(a3dsrc_t * a)
{
-
- //printk("vortex: ZeroState slice: %d, source %d\n", a->slice, a->source);
-
+ /*
+ printk(KERN_DEBUG "vortex: ZeroState slice: %d, source %d\n",
+ a->slice, a->source);
+ */
a3dsrc_SetAtmosState(a, 0, 0, 0, 0);
a3dsrc_SetHrtfState(a, A3dHrirZeros, A3dHrirZeros);
a3dsrc_SetItdDline(a, A3dItdDlineZeros);
snd_pcm_sgbuf_get_addr(dma->substream, 0));
break;
}
- //printk("vortex: cfg0 = 0x%x\nvortex: cfg1=0x%x\n", dma->cfg0, dma->cfg1);
+ /*
+ printk(KERN_DEBUG "vortex: cfg0 = 0x%x\nvortex: cfg1=0x%x\n",
+ dma->cfg0, dma->cfg1);
+ */
hwwrite(vortex->mmio, VORTEX_ADBDMA_BUFCFG0 + (adbdma << 3), dma->cfg0);
hwwrite(vortex->mmio, VORTEX_ADBDMA_BUFCFG1 + (adbdma << 3), dma->cfg1);
ADB_CODECOUT(0 + 4));
vortex_connection_mix_adb(vortex, en, 0x11, mixers[3],
ADB_CODECOUT(1 + 4));
- //printk("SDAC detected ");
+ /* printk(KERN_DEBUG "SDAC detected "); */
}
#else
// Use plain direct output to codec.
resmap[restype] |= (1 << i);
else
vortex->dma_adb[i].resources[restype] |= (1 << i);
- //printk("vortex: ResManager: type %d out %d\n", restype, i);
+ /*
+ printk(KERN_DEBUG
+ "vortex: ResManager: type %d out %d\n",
+ restype, i);
+ */
return i;
}
}
for (i = 0; i < qty; i++) {
if (resmap[restype] & (1 << i)) {
resmap[restype] &= ~(1 << i);
- //printk("vortex: ResManager: type %d in %d\n",restype, i);
+ /*
+ printk(KERN_DEBUG
+ "vortex: ResManager: type %d in %d\n",
+ restype, i);
+ */
return i;
}
}
{
int a, this_194;
- if ((bits != 8) || (bits != 16))
+ if ((bits != 8) && (bits != 16))
return -1;
switch (encod) {
switch (reg) {
/* Voice specific parameters */
case 0: /* running */
- //printk("vortex: WT SetReg(0x%x) = 0x%08x\n", WT_RUN(wt), (int)val);
+ /*
+ printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n",
+ WT_RUN(wt), (int)val);
+ */
hwwrite(vortex->mmio, WT_RUN(wt), val);
return 0xc;
break;
case 1: /* param 0 */
- //printk("vortex: WT SetReg(0x%x) = 0x%08x\n", WT_PARM(wt,0), (int)val);
+ /*
+ printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n",
+ WT_PARM(wt,0), (int)val);
+ */
hwwrite(vortex->mmio, WT_PARM(wt, 0), val);
return 0xc;
break;
case 2: /* param 1 */
- //printk("vortex: WT SetReg(0x%x) = 0x%08x\n", WT_PARM(wt,1), (int)val);
+ /*
+ printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n",
+ WT_PARM(wt,1), (int)val);
+ */
hwwrite(vortex->mmio, WT_PARM(wt, 1), val);
return 0xc;
break;
case 3: /* param 2 */
- //printk("vortex: WT SetReg(0x%x) = 0x%08x\n", WT_PARM(wt,2), (int)val);
+ /*
+ printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n",
+ WT_PARM(wt,2), (int)val);
+ */
hwwrite(vortex->mmio, WT_PARM(wt, 2), val);
return 0xc;
break;
case 4: /* param 3 */
- //printk("vortex: WT SetReg(0x%x) = 0x%08x\n", WT_PARM(wt,3), (int)val);
+ /*
+ printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n",
+ WT_PARM(wt,3), (int)val);
+ */
hwwrite(vortex->mmio, WT_PARM(wt, 3), val);
return 0xc;
break;
case 6: /* mute */
- //printk("vortex: WT SetReg(0x%x) = 0x%08x\n", WT_MUTE(wt), (int)val);
+ /*
+ printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n",
+ WT_MUTE(wt), (int)val);
+ */
hwwrite(vortex->mmio, WT_MUTE(wt), val);
return 0xc;
break;
case 0xb:
{ /* delay */
- //printk("vortex: WT SetReg(0x%x) = 0x%08x\n", WT_DELAY(wt,0), (int)val);
+ /*
+ printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n",
+ WT_DELAY(wt,0), (int)val);
+ */
hwwrite(vortex->mmio, WT_DELAY(wt, 3), val);
hwwrite(vortex->mmio, WT_DELAY(wt, 2), val);
hwwrite(vortex->mmio, WT_DELAY(wt, 1), val);
return 0;
break;
}
- //printk("vortex: WT SetReg(0x%x) = 0x%08x\n", ecx, (int)val);
+ /*
+ printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n", ecx, (int)val);
+ */
hwwrite(vortex->mmio, ecx, val);
return 1;
}
}
/* (2) Create card instance */
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
/* (3) Create main component */
err = snd_aw2_create(card, pci, &chip);
#endif
#if DEBUG_MIXER
-#define snd_azf3328_dbgmixer(format, args...) printk(format, ##args)
+#define snd_azf3328_dbgmixer(format, args...) printk(KERN_DEBUG format, ##args)
#else
#define snd_azf3328_dbgmixer(format, args...)
#endif
#if DEBUG_PLAY_REC
-#define snd_azf3328_dbgplay(format, args...) printk(KERN_ERR format, ##args)
+#define snd_azf3328_dbgplay(format, args...) printk(KERN_DEBUG format, ##args)
#else
#define snd_azf3328_dbgplay(format, args...)
#endif
#if DEBUG_MISC
-#define snd_azf3328_dbgtimer(format, args...) printk(KERN_ERR format, ##args)
+#define snd_azf3328_dbgtimer(format, args...) printk(KERN_DEBUG format, ##args)
#else
#define snd_azf3328_dbgtimer(format, args...)
#endif
#if DEBUG_GAME
-#define snd_azf3328_dbggame(format, args...) printk(KERN_ERR format, ##args)
+#define snd_azf3328_dbggame(format, args...) printk(KERN_DEBUG format, ##args)
#else
#define snd_azf3328_dbggame(format, args...)
#endif
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
strcpy(card->driver, "AZF3328");
strcpy(card->shortname, "Aztech AZF3328 (PCI168)");
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (!card)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
err = snd_bt87x_create(card, pci, &chip);
if (err < 0)
.gpio_type = 2,
.i2c_adc = 1,
.spi_dac = 1 } ,
+ /* Giga-byte GA-G1975X mobo
+ * Novell bnc#395807
+ */
+ /* FIXME: the GPIO and I2C setting aren't tested well */
+ { .serial = 0x1458a006,
+ .name = "Giga-byte GA-G1975X",
+ .gpio_type = 1,
+ .i2c_adc = 1 },
/* Shuttle XPC SD31P which has an onboard Creative Labs
* Sound Blaster Live! 24-bit EAX
* high-definition 7.1 audio processor".
}
tmp = reg << 25 | value << 16;
- // snd_printk("I2C-write:reg=0x%x, value=0x%x\n", reg, value);
+ /*
+ snd_printk(KERN_DEBUG "I2C-write:reg=0x%x, value=0x%x\n", reg, value);
+ */
/* Not sure what this I2C channel controls. */
/* snd_ca0106_ptr_write(emu, I2C_D0, 0, tmp); */
/* Wait till the transaction ends */
while (1) {
status = snd_ca0106_ptr_read(emu, I2C_A, 0);
- //snd_printk("I2C:status=0x%x\n", status);
+ /*snd_printk(KERN_DEBUG "I2C:status=0x%x\n", status);*/
timeout++;
if ((status & I2C_A_ADC_START) == 0)
break;
channel->number = channel_id;
channel->use = 1;
- //printk("open:channel_id=%d, chip=%p, channel=%p\n",channel_id, chip, channel);
+ /*
+ printk(KERN_DEBUG "open:channel_id=%d, chip=%p, channel=%p\n",
+ channel_id, chip, channel);
+ */
//channel->interrupt = snd_ca0106_pcm_channel_interrupt;
channel->epcm = epcm;
if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
channel->number = channel_id;
channel->use = 1;
- //printk("open:channel_id=%d, chip=%p, channel=%p\n",channel_id, chip, channel);
+ /*
+ printk(KERN_DEBUG "open:channel_id=%d, chip=%p, channel=%p\n",
+ channel_id, chip, channel);
+ */
//channel->interrupt = snd_ca0106_pcm_channel_interrupt;
channel->epcm = epcm;
if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
u32 reg71;
int i;
- //snd_printk("prepare:channel_number=%d, rate=%d, format=0x%x, channels=%d, buffer_size=%ld, period_size=%ld, periods=%u, frames_to_bytes=%d\n",channel, runtime->rate, runtime->format, runtime->channels, runtime->buffer_size, runtime->period_size, runtime->periods, frames_to_bytes(runtime, 1));
- //snd_printk("dma_addr=%x, dma_area=%p, table_base=%p\n",runtime->dma_addr, runtime->dma_area, table_base);
- //snd_printk("dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",emu->buffer.addr, emu->buffer.area, emu->buffer.bytes);
+#if 0 /* debug */
+ snd_printk(KERN_DEBUG
+ "prepare:channel_number=%d, rate=%d, format=0x%x, "
+ "channels=%d, buffer_size=%ld, period_size=%ld, "
+ "periods=%u, frames_to_bytes=%d\n",
+ channel, runtime->rate, runtime->format,
+ runtime->channels, runtime->buffer_size,
+ runtime->period_size, runtime->periods,
+ frames_to_bytes(runtime, 1));
+ snd_printk(KERN_DEBUG "dma_addr=%x, dma_area=%p, table_base=%p\n",
+ runtime->dma_addr, runtime->dma_area, table_base);
+ snd_printk(KERN_DEBUG "dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",
+ emu->buffer.addr, emu->buffer.area, emu->buffer.bytes);
+#endif /* debug */
/* Rate can be set per channel. */
/* reg40 control host to fifo */
/* reg71 controls DAC rate. */
u32 reg71_set = 0;
u32 reg71;
- //snd_printk("prepare:channel_number=%d, rate=%d, format=0x%x, channels=%d, buffer_size=%ld, period_size=%ld, periods=%u, frames_to_bytes=%d\n",channel, runtime->rate, runtime->format, runtime->channels, runtime->buffer_size, runtime->period_size, runtime->periods, frames_to_bytes(runtime, 1));
- //snd_printk("dma_addr=%x, dma_area=%p, table_base=%p\n",runtime->dma_addr, runtime->dma_area, table_base);
- //snd_printk("dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",emu->buffer.addr, emu->buffer.area, emu->buffer.bytes);
+#if 0 /* debug */
+ snd_printk(KERN_DEBUG
+ "prepare:channel_number=%d, rate=%d, format=0x%x, "
+ "channels=%d, buffer_size=%ld, period_size=%ld, "
+ "periods=%u, frames_to_bytes=%d\n",
+ channel, runtime->rate, runtime->format,
+ runtime->channels, runtime->buffer_size,
+ runtime->period_size, runtime->periods,
+ frames_to_bytes(runtime, 1));
+ snd_printk(KERN_DEBUG "dma_addr=%x, dma_area=%p, table_base=%p\n",
+ runtime->dma_addr, runtime->dma_area, table_base);
+ snd_printk(KERN_DEBUG "dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",
+ emu->buffer.addr, emu->buffer.area, emu->buffer.bytes);
+#endif /* debug */
/* reg71 controls ADC rate. */
switch (runtime->rate) {
case 44100:
}
- //printk("prepare:channel_number=%d, rate=%d, format=0x%x, channels=%d, buffer_size=%ld, period_size=%ld, frames_to_bytes=%d\n",channel, runtime->rate, runtime->format, runtime->channels, runtime->buffer_size, runtime->period_size, frames_to_bytes(runtime, 1));
+ /*
+ printk(KERN_DEBUG
+ "prepare:channel_number=%d, rate=%d, format=0x%x, channels=%d, "
+ "buffer_size=%ld, period_size=%ld, frames_to_bytes=%d\n",
+ channel, runtime->rate, runtime->format, runtime->channels,
+ runtime->buffer_size, runtime->period_size,
+ frames_to_bytes(runtime, 1));
+ */
snd_ca0106_ptr_write(emu, 0x13, channel, 0);
snd_ca0106_ptr_write(emu, CAPTURE_DMA_ADDR, channel, runtime->dma_addr);
snd_ca0106_ptr_write(emu, CAPTURE_BUFFER_SIZE, channel, frames_to_bytes(runtime, runtime->buffer_size)<<16); // buffer size in bytes
runtime = s->runtime;
epcm = runtime->private_data;
channel = epcm->channel_id;
- /* snd_printk("channel=%d\n",channel); */
+ /* snd_printk(KERN_DEBUG "channel=%d\n", channel); */
epcm->running = running;
basic |= (0x1 << channel);
extended |= (0x10 << channel);
snd_pcm_trigger_done(s, substream);
}
- /* snd_printk("basic=0x%x, extended=0x%x\n",basic, extended); */
+ /* snd_printk(KERN_DEBUG "basic=0x%x, extended=0x%x\n",basic, extended); */
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
ptr=ptr2;
if (ptr >= runtime->buffer_size)
ptr -= runtime->buffer_size;
- //printk("ptr1 = 0x%lx, ptr2=0x%lx, ptr=0x%lx, buffer_size = 0x%x, period_size = 0x%x, bits=%d, rate=%d\n", ptr1, ptr2, ptr, (int)runtime->buffer_size, (int)runtime->period_size, (int)runtime->frame_bits, (int)runtime->rate);
-
+ /*
+ printk(KERN_DEBUG "ptr1 = 0x%lx, ptr2=0x%lx, ptr=0x%lx, "
+ "buffer_size = 0x%x, period_size = 0x%x, bits=%d, rate=%d\n",
+ ptr1, ptr2, ptr, (int)runtime->buffer_size,
+ (int)runtime->period_size, (int)runtime->frame_bits,
+ (int)runtime->rate);
+ */
return ptr;
}
ptr=ptr2;
if (ptr >= runtime->buffer_size)
ptr -= runtime->buffer_size;
- //printk("ptr1 = 0x%lx, ptr2=0x%lx, ptr=0x%lx, buffer_size = 0x%x, period_size = 0x%x, bits=%d, rate=%d\n", ptr1, ptr2, ptr, (int)runtime->buffer_size, (int)runtime->period_size, (int)runtime->frame_bits, (int)runtime->rate);
-
+ /*
+ printk(KERN_DEBUG "ptr1 = 0x%lx, ptr2=0x%lx, ptr=0x%lx, "
+ "buffer_size = 0x%x, period_size = 0x%x, bits=%d, rate=%d\n",
+ ptr1, ptr2, ptr, (int)runtime->buffer_size,
+ (int)runtime->period_size, (int)runtime->frame_bits,
+ (int)runtime->rate);
+ */
return ptr;
}
return IRQ_NONE;
stat76 = snd_ca0106_ptr_read(chip, EXTENDED_INT, 0);
- //snd_printk("interrupt status = 0x%08x, stat76=0x%08x\n", status, stat76);
- //snd_printk("ptr=0x%08x\n",snd_ca0106_ptr_read(chip, PLAYBACK_POINTER, 0));
+ /*
+ snd_printk(KERN_DEBUG "interrupt status = 0x%08x, stat76=0x%08x\n",
+ status, stat76);
+ snd_printk(KERN_DEBUG "ptr=0x%08x\n",
+ snd_ca0106_ptr_read(chip, PLAYBACK_POINTER, 0));
+ */
mask = 0x11; /* 0x1 for one half, 0x10 for the other half period. */
for(i = 0; i < 4; i++) {
pchannel = &(chip->playback_channels[i]);
int size, n;
size = ARRAY_SIZE(i2c_adc_init);
- /* snd_printk("I2C:array size=0x%x\n", size); */
+ /* snd_printk(KERN_DEBUG "I2C:array size=0x%x\n", size); */
for (n = 0; n < size; n++)
snd_ca0106_i2c_write(chip, i2c_adc_init[n][0],
i2c_adc_init[n][1]);
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
err = snd_ca0106_create(dev, card, pci, &chip);
if (err < 0)
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
switch (pci->device) {
case PCI_DEVICE_ID_CMEDIA_CM8738:
struct cs4281_dma *dma = runtime->private_data;
struct cs4281 *chip = snd_pcm_substream_chip(substream);
- // printk("DCC = 0x%x, buffer_size = 0x%x, jiffies = %li\n", snd_cs4281_peekBA0(chip, dma->regDCC), runtime->buffer_size, jiffies);
+ /*
+ printk(KERN_DEBUG "DCC = 0x%x, buffer_size = 0x%x, jiffies = %li\n",
+ snd_cs4281_peekBA0(chip, dma->regDCC), runtime->buffer_size,
+ jiffies);
+ */
return runtime->buffer_size -
snd_cs4281_peekBA0(chip, dma->regDCC) - 1;
}
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
if ((err = snd_cs4281_create(card, pci, &chip, dual_codec[dev])) < 0) {
snd_card_free(card);
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
if ((err = snd_cs46xx_create(card, pci,
external_amp[dev], thinkpad[dev],
&chip)) < 0) {
* ACSDA = Status Data Register = 474h
*/
#if 0
- printk("e) reg = 0x%x, val = 0x%x, BA0_ACCAD = 0x%x\n", reg,
+ printk(KERN_DEBUG "e) reg = 0x%x, val = 0x%x, BA0_ACCAD = 0x%x\n", reg,
snd_cs46xx_peekBA0(chip, BA0_ACSDA),
snd_cs46xx_peekBA0(chip, BA0_ACCAD));
#endif
}
if(status & SERBST_WBSY) {
- snd_printk( KERN_ERR "cs46xx: failure waiting for FIFO command to complete\n");
-
+ snd_printk(KERN_ERR "cs46xx: failure waiting for "
+ "FIFO command to complete\n");
return -EINVAL;
}
unsigned int bank = reg >> 16;
unsigned int offset = reg & 0xffff;
- /*if (bank == 0) printk("snd_cs46xx_poke: %04X - %08X\n",reg >> 2,val); */
+ /*
+ if (bank == 0)
+ printk(KERN_DEBUG "snd_cs46xx_poke: %04X - %08X\n",
+ reg >> 2,val);
+ */
writel(val, chip->region.idx[bank+1].remap_addr + offset);
}
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
- if (card == NULL)
- return -ENOMEM;
+ if (err < 0)
+ return err;
err = snd_cs5530_create(card, pci, &chip);
if (err < 0) {
if (request_irq(pci->irq, snd_cs5535audio_interrupt,
IRQF_SHARED, "CS5535 Audio", cs5535au)) {
- snd_printk("unable to grab IRQ %d\n", pci->irq);
+ snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
err = -EBUSY;
goto sndfail;
}
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
if ((err = snd_cs5535audio_create(card, pci, &cs5535au)) < 0)
goto probefail_out;
snd-indigo-objs := indigo.o
snd-indigoio-objs := indigoio.o
snd-indigodj-objs := indigodj.o
+snd-indigoiox-objs := indigoiox.o
+snd-indigodjx-objs := indigodjx.o
obj-$(CONFIG_SND_DARLA20) += snd-darla20.o
obj-$(CONFIG_SND_GINA20) += snd-gina20.o
obj-$(CONFIG_SND_INDIGO) += snd-indigo.o
obj-$(CONFIG_SND_INDIGOIO) += snd-indigoio.o
obj-$(CONFIG_SND_INDIGODJ) += snd-indigodj.o
+obj-$(CONFIG_SND_INDIGOIOX) += snd-indigoiox.o
+obj-$(CONFIG_SND_INDIGODJX) += snd-indigodjx.o
}
chip->comm_page->e3g_frq_register =
- __constant_cpu_to_le32((E3G_MAGIC_NUMBER / 48000) - 2);
+ cpu_to_le32((E3G_MAGIC_NUMBER / 48000) - 2);
chip->device_id = device_id;
chip->subdevice_id = subdevice_id;
chip->bad_board = TRUE;
Control interface
******************************************************************************/
+#ifndef ECHOCARD_HAS_VMIXER
+
/******************* PCM output volume *******************/
static int snd_echo_output_gain_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
return changed;
}
-#ifdef ECHOCARD_HAS_VMIXER
-/* On Vmixer cards this one controls the line-out volume */
-static struct snd_kcontrol_new snd_echo_line_output_gain __devinitdata = {
- .name = "Line Playback Volume",
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
- .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,
- .info = snd_echo_output_gain_info,
- .get = snd_echo_output_gain_get,
- .put = snd_echo_output_gain_put,
- .tlv = {.p = db_scale_output_gain},
-};
-#else
static struct snd_kcontrol_new snd_echo_pcm_output_gain __devinitdata = {
.name = "PCM Playback Volume",
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.put = snd_echo_output_gain_put,
.tlv = {.p = db_scale_output_gain},
};
+
#endif
DE_INIT(("Echoaudio driver starting...\n"));
i = 0;
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
snd_card_set_dev(card, &pci->dev);
#ifdef ECHOCARD_HAS_VMIXER
snd_echo_vmixer.count = num_pipes_out(chip) * num_busses_out(chip);
- if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_line_output_gain, chip))) < 0)
- goto ctl_error;
if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_echo_vmixer, chip))) < 0)
goto ctl_error;
#else
#define INDIGO 0x0090
#define INDIGO_IO 0x00a0
#define INDIGO_DJ 0x00b0
+#define DC8 0x00c0
+#define INDIGO_IOX 0x00d0
+#define INDIGO_DJX 0x00e0
#define ECHO3G 0x0100
if (wait_handshake(chip))
return -EIO;
- chip->comm_page->ext_box_status =
- __constant_cpu_to_le32(E3G_ASIC_NOT_LOADED);
+ chip->comm_page->ext_box_status = cpu_to_le32(E3G_ASIC_NOT_LOADED);
chip->asic_loaded = FALSE;
clear_handshake(chip);
send_vector(chip, DSP_VC_TEST_ASIC);
/* Init the comm page */
chip->comm_page->comm_size =
- __constant_cpu_to_le32(sizeof(struct comm_page));
+ cpu_to_le32(sizeof(struct comm_page));
chip->comm_page->handshake = 0xffffffff;
chip->comm_page->midi_out_free_count =
- __constant_cpu_to_le32(DSP_MIDI_OUT_FIFO_SIZE);
- chip->comm_page->sample_rate = __constant_cpu_to_le32(44100);
+ cpu_to_le32(DSP_MIDI_OUT_FIFO_SIZE);
+ chip->comm_page->sample_rate = cpu_to_le32(44100);
chip->sample_rate = 44100;
/* Set line levels so we don't blast any inputs on startup */
#define E3G_ASIC_NOT_LOADED 0xffff
#define E3G_BOX_TYPE_MASK 0xf0
-#define EXT_3GBOX_NC 0x01
-#define EXT_3GBOX_NOT_SET 0x02
+/* Indigo express control register values */
+#define INDIGO_EXPRESS_32000 0x02
+#define INDIGO_EXPRESS_44100 0x01
+#define INDIGO_EXPRESS_48000 0x00
+#define INDIGO_EXPRESS_DOUBLE_SPEED 0x10
+#define INDIGO_EXPRESS_QUAD_SPEED 0x04
+#define INDIGO_EXPRESS_CLOCK_MASK 0x17
/*
DE_ACT(("set_professional_spdif %d\n", prof));
if (prof)
chip->comm_page->flags |=
- __constant_cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
+ cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
else
chip->comm_page->flags &=
- ~__constant_cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
+ ~cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
chip->professional_spdif = prof;
return update_flags(chip);
}
if ((err = init_line_levels(chip)) < 0)
return err;
- /* Default routing of the virtual channels: all vchannels are routed
- to the stereo output */
- set_vmixer_gain(chip, 0, 0, 0);
- set_vmixer_gain(chip, 1, 1, 0);
- set_vmixer_gain(chip, 0, 2, 0);
- set_vmixer_gain(chip, 1, 3, 0);
- set_vmixer_gain(chip, 0, 4, 0);
- set_vmixer_gain(chip, 1, 5, 0);
- set_vmixer_gain(chip, 0, 6, 0);
- set_vmixer_gain(chip, 1, 7, 0);
- err = update_vmixer_level(chip);
-
DE_INIT(("init_hw done\n"));
return err;
}
--- /dev/null
+/************************************************************************
+
+This file is part of Echo Digital Audio's generic driver library.
+Copyright Echo Digital Audio Corporation (c) 1998 - 2005
+All rights reserved
+www.echoaudio.com
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+*************************************************************************
+
+ Translation from C++ and adaptation for use in ALSA-Driver
+ were made by Giuliano Pochini <pochini@shiny.it>
+
+*************************************************************************/
+
+static int set_sample_rate(struct echoaudio *chip, u32 rate)
+{
+ u32 clock, control_reg, old_control_reg;
+
+ if (wait_handshake(chip))
+ return -EIO;
+
+ old_control_reg = le32_to_cpu(chip->comm_page->control_register);
+ control_reg = old_control_reg & ~INDIGO_EXPRESS_CLOCK_MASK;
+
+ switch (rate) {
+ case 32000:
+ clock = INDIGO_EXPRESS_32000;
+ break;
+ case 44100:
+ clock = INDIGO_EXPRESS_44100;
+ break;
+ case 48000:
+ clock = INDIGO_EXPRESS_48000;
+ break;
+ case 64000:
+ clock = INDIGO_EXPRESS_32000|INDIGO_EXPRESS_DOUBLE_SPEED;
+ break;
+ case 88200:
+ clock = INDIGO_EXPRESS_44100|INDIGO_EXPRESS_DOUBLE_SPEED;
+ break;
+ case 96000:
+ clock = INDIGO_EXPRESS_48000|INDIGO_EXPRESS_DOUBLE_SPEED;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ control_reg |= clock;
+ if (control_reg != old_control_reg) {
+ chip->comm_page->control_register = cpu_to_le32(control_reg);
+ chip->sample_rate = rate;
+ clear_handshake(chip);
+ return send_vector(chip, DSP_VC_UPDATE_CLOCKS);
+ }
+ return 0;
+}
+
+
+
+/* This function routes the sound from a virtual channel to a real output */
+static int set_vmixer_gain(struct echoaudio *chip, u16 output, u16 pipe,
+ int gain)
+{
+ int index;
+
+ if (snd_BUG_ON(pipe >= num_pipes_out(chip) ||
+ output >= num_busses_out(chip)))
+ return -EINVAL;
+
+ if (wait_handshake(chip))
+ return -EIO;
+
+ chip->vmixer_gain[output][pipe] = gain;
+ index = output * num_pipes_out(chip) + pipe;
+ chip->comm_page->vmixer[index] = gain;
+
+ DE_ACT(("set_vmixer_gain: pipe %d, out %d = %d\n", pipe, output, gain));
+ return 0;
+}
+
+
+
+/* Tell the DSP to read and update virtual mixer levels in comm page. */
+static int update_vmixer_level(struct echoaudio *chip)
+{
+ if (wait_handshake(chip))
+ return -EIO;
+ clear_handshake(chip);
+ return send_vector(chip, DSP_VC_SET_VMIXER_GAIN);
+}
+
+
+
+static u32 detect_input_clocks(const struct echoaudio *chip)
+{
+ return ECHO_CLOCK_BIT_INTERNAL;
+}
+
+
+
+/* The IndigoIO has no ASIC. Just do nothing */
+static int load_asic(struct echoaudio *chip)
+{
+ return 0;
+}
if ((err = init_line_levels(chip)) < 0)
return err;
- /* Default routing of the virtual channels: vchannels 0-3 and
- vchannels 4-7 are routed to real channels 0-4 */
- set_vmixer_gain(chip, 0, 0, 0);
- set_vmixer_gain(chip, 1, 1, 0);
- set_vmixer_gain(chip, 2, 2, 0);
- set_vmixer_gain(chip, 3, 3, 0);
- set_vmixer_gain(chip, 0, 4, 0);
- set_vmixer_gain(chip, 1, 5, 0);
- set_vmixer_gain(chip, 2, 6, 0);
- set_vmixer_gain(chip, 3, 7, 0);
- err = update_vmixer_level(chip);
-
DE_INIT(("init_hw done\n"));
return err;
}
--- /dev/null
+/*
+ * ALSA driver for Echoaudio soundcards.
+ * Copyright (C) 2009 Giuliano Pochini <pochini@shiny.it>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#define INDIGO_FAMILY
+#define ECHOCARD_INDIGO_DJX
+#define ECHOCARD_NAME "Indigo DJx"
+#define ECHOCARD_HAS_SUPER_INTERLEAVE
+#define ECHOCARD_HAS_VMIXER
+#define ECHOCARD_HAS_STEREO_BIG_ENDIAN32
+
+/* Pipe indexes */
+#define PX_ANALOG_OUT 0 /* 8 */
+#define PX_DIGITAL_OUT 8 /* 0 */
+#define PX_ANALOG_IN 8 /* 0 */
+#define PX_DIGITAL_IN 8 /* 0 */
+#define PX_NUM 8
+
+/* Bus indexes */
+#define BX_ANALOG_OUT 0 /* 4 */
+#define BX_DIGITAL_OUT 4 /* 0 */
+#define BX_ANALOG_IN 4 /* 0 */
+#define BX_DIGITAL_IN 4 /* 0 */
+#define BX_NUM 4
+
+
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/pci.h>
+#include <linux/slab.h>
+#include <linux/moduleparam.h>
+#include <linux/firmware.h>
+#include <linux/io.h>
+#include <sound/core.h>
+#include <sound/info.h>
+#include <sound/control.h>
+#include <sound/tlv.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/asoundef.h>
+#include <sound/initval.h>
+#include <asm/atomic.h>
+#include "echoaudio.h"
+
+MODULE_FIRMWARE("ea/loader_dsp.fw");
+MODULE_FIRMWARE("ea/indigo_djx_dsp.fw");
+
+#define FW_361_LOADER 0
+#define FW_INDIGO_DJX_DSP 1
+
+static const struct firmware card_fw[] = {
+ {0, "loader_dsp.fw"},
+ {0, "indigo_djx_dsp.fw"}
+};
+
+static struct pci_device_id snd_echo_ids[] = {
+ {0x1057, 0x3410, 0xECC0, 0x00E0, 0, 0, 0}, /* Indigo DJx*/
+ {0,}
+};
+
+static struct snd_pcm_hardware pcm_hardware_skel = {
+ .info = SNDRV_PCM_INFO_MMAP |
+ SNDRV_PCM_INFO_INTERLEAVED |
+ SNDRV_PCM_INFO_BLOCK_TRANSFER |
+ SNDRV_PCM_INFO_MMAP_VALID |
+ SNDRV_PCM_INFO_PAUSE |
+ SNDRV_PCM_INFO_SYNC_START,
+ .formats = SNDRV_PCM_FMTBIT_U8 |
+ SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_3LE |
+ SNDRV_PCM_FMTBIT_S32_LE |
+ SNDRV_PCM_FMTBIT_S32_BE,
+ .rates = SNDRV_PCM_RATE_32000 |
+ SNDRV_PCM_RATE_44100 |
+ SNDRV_PCM_RATE_48000 |
+ SNDRV_PCM_RATE_88200 |
+ SNDRV_PCM_RATE_96000,
+ .rate_min = 32000,
+ .rate_max = 96000,
+ .channels_min = 1,
+ .channels_max = 4,
+ .buffer_bytes_max = 262144,
+ .period_bytes_min = 32,
+ .period_bytes_max = 131072,
+ .periods_min = 2,
+ .periods_max = 220,
+};
+
+#include "indigodjx_dsp.c"
+#include "indigo_express_dsp.c"
+#include "echoaudio_dsp.c"
+#include "echoaudio.c"
--- /dev/null
+/************************************************************************
+
+This file is part of Echo Digital Audio's generic driver library.
+Copyright Echo Digital Audio Corporation (c) 1998 - 2005
+All rights reserved
+www.echoaudio.com
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+*************************************************************************
+
+ Translation from C++ and adaptation for use in ALSA-Driver
+ were made by Giuliano Pochini <pochini@shiny.it>
+
+*************************************************************************/
+
+static int update_vmixer_level(struct echoaudio *chip);
+static int set_vmixer_gain(struct echoaudio *chip, u16 output,
+ u16 pipe, int gain);
+
+
+static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
+{
+ int err;
+
+ DE_INIT(("init_hw() - Indigo DJx\n"));
+ if (snd_BUG_ON((subdevice_id & 0xfff0) != INDIGO_DJX))
+ return -ENODEV;
+
+ err = init_dsp_comm_page(chip);
+ if (err < 0) {
+ DE_INIT(("init_hw - could not initialize DSP comm page\n"));
+ return err;
+ }
+
+ chip->device_id = device_id;
+ chip->subdevice_id = subdevice_id;
+ chip->bad_board = TRUE;
+ chip->dsp_code_to_load = &card_fw[FW_INDIGO_DJX_DSP];
+ /* Since this card has no ASIC, mark it as loaded so everything
+ works OK */
+ chip->asic_loaded = TRUE;
+ chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL;
+
+ err = load_firmware(chip);
+ if (err < 0)
+ return err;
+ chip->bad_board = FALSE;
+
+ err = init_line_levels(chip);
+ if (err < 0)
+ return err;
+
+ DE_INIT(("init_hw done\n"));
+ return err;
+}
if ((err = init_line_levels(chip)) < 0)
return err;
- /* Default routing of the virtual channels: all vchannels are routed
- to the stereo output */
- set_vmixer_gain(chip, 0, 0, 0);
- set_vmixer_gain(chip, 1, 1, 0);
- set_vmixer_gain(chip, 0, 2, 0);
- set_vmixer_gain(chip, 1, 3, 0);
- set_vmixer_gain(chip, 0, 4, 0);
- set_vmixer_gain(chip, 1, 5, 0);
- set_vmixer_gain(chip, 0, 6, 0);
- set_vmixer_gain(chip, 1, 7, 0);
- err = update_vmixer_level(chip);
-
DE_INIT(("init_hw done\n"));
return err;
}
--- /dev/null
+/*
+ * ALSA driver for Echoaudio soundcards.
+ * Copyright (C) 2009 Giuliano Pochini <pochini@shiny.it>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#define INDIGO_FAMILY
+#define ECHOCARD_INDIGO_IOX
+#define ECHOCARD_NAME "Indigo IOx"
+#define ECHOCARD_HAS_MONITOR
+#define ECHOCARD_HAS_SUPER_INTERLEAVE
+#define ECHOCARD_HAS_VMIXER
+#define ECHOCARD_HAS_STEREO_BIG_ENDIAN32
+
+/* Pipe indexes */
+#define PX_ANALOG_OUT 0 /* 8 */
+#define PX_DIGITAL_OUT 8 /* 0 */
+#define PX_ANALOG_IN 8 /* 2 */
+#define PX_DIGITAL_IN 10 /* 0 */
+#define PX_NUM 10
+
+/* Bus indexes */
+#define BX_ANALOG_OUT 0 /* 2 */
+#define BX_DIGITAL_OUT 2 /* 0 */
+#define BX_ANALOG_IN 2 /* 2 */
+#define BX_DIGITAL_IN 4 /* 0 */
+#define BX_NUM 4
+
+
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/pci.h>
+#include <linux/slab.h>
+#include <linux/moduleparam.h>
+#include <linux/firmware.h>
+#include <linux/io.h>
+#include <sound/core.h>
+#include <sound/info.h>
+#include <sound/control.h>
+#include <sound/tlv.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/asoundef.h>
+#include <sound/initval.h>
+#include <asm/atomic.h>
+#include "echoaudio.h"
+
+MODULE_FIRMWARE("ea/loader_dsp.fw");
+MODULE_FIRMWARE("ea/indigo_iox_dsp.fw");
+
+#define FW_361_LOADER 0
+#define FW_INDIGO_IOX_DSP 1
+
+static const struct firmware card_fw[] = {
+ {0, "loader_dsp.fw"},
+ {0, "indigo_iox_dsp.fw"}
+};
+
+static struct pci_device_id snd_echo_ids[] = {
+ {0x1057, 0x3410, 0xECC0, 0x00D0, 0, 0, 0}, /* Indigo IOx */
+ {0,}
+};
+
+static struct snd_pcm_hardware pcm_hardware_skel = {
+ .info = SNDRV_PCM_INFO_MMAP |
+ SNDRV_PCM_INFO_INTERLEAVED |
+ SNDRV_PCM_INFO_BLOCK_TRANSFER |
+ SNDRV_PCM_INFO_MMAP_VALID |
+ SNDRV_PCM_INFO_PAUSE |
+ SNDRV_PCM_INFO_SYNC_START,
+ .formats = SNDRV_PCM_FMTBIT_U8 |
+ SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_3LE |
+ SNDRV_PCM_FMTBIT_S32_LE |
+ SNDRV_PCM_FMTBIT_S32_BE,
+ .rates = SNDRV_PCM_RATE_32000 |
+ SNDRV_PCM_RATE_44100 |
+ SNDRV_PCM_RATE_48000 |
+ SNDRV_PCM_RATE_88200 |
+ SNDRV_PCM_RATE_96000,
+ .rate_min = 32000,
+ .rate_max = 96000,
+ .channels_min = 1,
+ .channels_max = 8,
+ .buffer_bytes_max = 262144,
+ .period_bytes_min = 32,
+ .period_bytes_max = 131072,
+ .periods_min = 2,
+ .periods_max = 220,
+};
+
+#include "indigoiox_dsp.c"
+#include "indigo_express_dsp.c"
+#include "echoaudio_dsp.c"
+#include "echoaudio.c"
+
--- /dev/null
+/************************************************************************
+
+This file is part of Echo Digital Audio's generic driver library.
+Copyright Echo Digital Audio Corporation (c) 1998 - 2005
+All rights reserved
+www.echoaudio.com
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Lesser General Public
+License as published by the Free Software Foundation; either
+version 2.1 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public
+License along with this library; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+*************************************************************************
+
+ Translation from C++ and adaptation for use in ALSA-Driver
+ were made by Giuliano Pochini <pochini@shiny.it>
+
+*************************************************************************/
+
+static int update_vmixer_level(struct echoaudio *chip);
+static int set_vmixer_gain(struct echoaudio *chip, u16 output,
+ u16 pipe, int gain);
+
+
+static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
+{
+ int err;
+
+ DE_INIT(("init_hw() - Indigo IOx\n"));
+ if (snd_BUG_ON((subdevice_id & 0xfff0) != INDIGO_IOX))
+ return -ENODEV;
+
+ err = init_dsp_comm_page(chip);
+ if (err < 0) {
+ DE_INIT(("init_hw - could not initialize DSP comm page\n"));
+ return err;
+ }
+
+ chip->device_id = device_id;
+ chip->subdevice_id = subdevice_id;
+ chip->bad_board = TRUE;
+ chip->dsp_code_to_load = &card_fw[FW_INDIGO_IOX_DSP];
+ /* Since this card has no ASIC, mark it as loaded so everything
+ works OK */
+ chip->asic_loaded = TRUE;
+ chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL;
+
+ err = load_firmware(chip);
+ if (err < 0)
+ return err;
+ chip->bad_board = FALSE;
+
+ err = init_line_levels(chip);
+ if (err < 0)
+ return err;
+
+ DE_INIT(("init_hw done\n"));
+ return err;
+}
DE_ACT(("set_professional_spdif %d\n", prof));
if (prof)
chip->comm_page->flags |=
- __constant_cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
+ cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
else
chip->comm_page->flags &=
- ~__constant_cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
+ ~cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
chip->professional_spdif = prof;
return update_flags(chip);
}
if ((err = init_line_levels(chip)))
return err;
- /* Default routing of the virtual channels: vchannels 0-3 go to analog
- outputs and vchannels 4-7 go to S/PDIF outputs */
- set_vmixer_gain(chip, 0, 0, 0);
- set_vmixer_gain(chip, 1, 1, 0);
- set_vmixer_gain(chip, 0, 2, 0);
- set_vmixer_gain(chip, 1, 3, 0);
- set_vmixer_gain(chip, 2, 4, 0);
- set_vmixer_gain(chip, 3, 5, 0);
- set_vmixer_gain(chip, 2, 6, 0);
- set_vmixer_gain(chip, 3, 7, 0);
- err = update_vmixer_level(chip);
-
DE_INIT(("init_hw done\n"));
return err;
}
DE_ACT(("set_professional_spdif %d\n", prof));
if (prof)
chip->comm_page->flags |=
- __constant_cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
+ cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
else
chip->comm_page->flags &=
- ~__constant_cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
+ ~cpu_to_le32(DSP_FLAG_PROFESSIONAL_SPDIF);
chip->professional_spdif = prof;
return update_flags(chip);
}
if (enable) {
chip->mtc_state = MIDI_IN_STATE_NORMAL;
chip->comm_page->flags |=
- __constant_cpu_to_le32(DSP_FLAG_MIDI_INPUT);
+ cpu_to_le32(DSP_FLAG_MIDI_INPUT);
} else
chip->comm_page->flags &=
- ~__constant_cpu_to_le32(DSP_FLAG_MIDI_INPUT);
+ ~cpu_to_le32(DSP_FLAG_MIDI_INPUT);
clear_handshake(chip);
return send_vector(chip, DSP_VC_UPDATE_FLAGS);
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
if (max_buffer_size[dev] < 32)
max_buffer_size[dev] = 32;
else if (max_buffer_size[dev] > 1024)
int ch;
vp = &emu->voices[best[i].voice];
if ((ch = vp->ch) < 0) {
- //printk("synth_get_voice: ch < 0 (%d) ??", i);
+ /*
+ printk(KERN_WARNING
+ "synth_get_voice: ch < 0 (%d) ??", i);
+ */
continue;
}
vp->emu->num_voices--;
return -EINVAL;
emem->map_locked++;
if (snd_emu10k1_memblk_map(hw, emem) < 0) {
- // printk("emu: cannot map!\n");
+ /* printk(KERN_ERR "emu: cannot map!\n"); */
return -ENOMEM;
}
mapped_offset = snd_emu10k1_memblk_offset(emem) >> 1;
static int emu1010_firmware_thread(void *data)
{
struct snd_emu10k1 *emu = data;
- int tmp, tmp2;
- int reg;
+ u32 tmp, tmp2, reg;
int err;
for (;;) {
snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n");
snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
- snd_printk("Audio Dock ver:%d.%d\n", tmp, tmp2);
+ snd_printk(KERN_INFO "Audio Dock ver: %u.%u\n",
+ tmp, tmp2);
/* Sync clocking between 1010 and Dock */
/* Allow DLL to settle */
msleep(10);
static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
{
unsigned int i;
- int tmp, tmp2;
- int reg;
+ u32 tmp, tmp2, reg;
int err;
const char *filename = NULL;
snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n");
snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
- snd_printk("emu1010: Hana version: %d.%d\n", tmp, tmp2);
+ snd_printk(KERN_INFO "emu1010: Hana version: %u.%u\n", tmp, tmp2);
/* Enable 48Volt power to Audio Dock */
snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
if ((err = snd_emu10k1x_create(card, pci, &chip)) < 0) {
snd_card_free(card);
/* A_PUT_STEREO_OUTPUT(A_EXTOUT_FRONT_L, A_EXTOUT_FRONT_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS); */
if (emu->card_capabilities->emu_model) {
/* EMU1010 Outputs from PCM Front, Rear, Center, LFE, Side */
- snd_printk("EMU outputs on\n");
+ snd_printk(KERN_INFO "EMU outputs on\n");
for (z = 0; z < 8; z++) {
if (emu->card_capabilities->ca0108_chip) {
A_OP(icode, &ptr, iACC3, A3_EMU32OUT(z), A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), A_C_00000000, A_C_00000000);
if (emu->card_capabilities->emu_model) {
if (emu->card_capabilities->ca0108_chip) {
- snd_printk("EMU2 inputs on\n");
+ snd_printk(KERN_INFO "EMU2 inputs on\n");
for (z = 0; z < 0x10; z++) {
snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp,
bit_shifter16,
A_FXBUS2(z*2) );
}
} else {
- snd_printk("EMU inputs on\n");
+ snd_printk(KERN_INFO "EMU inputs on\n");
/* Capture 16 (originally 8) channels of S32_LE sound */
- /* printk("emufx.c: gpr=0x%x, tmp=0x%x\n",gpr, tmp); */
+ /*
+ printk(KERN_DEBUG "emufx.c: gpr=0x%x, tmp=0x%x\n",
+ gpr, tmp);
+ */
/* For the EMU1010: How to get 32bit values from the DSP. High 16bits into L, low 16bits into R. */
/* A_P16VIN(0) is delayed by one sample,
* so all other A_P16VIN channels will need to also be delayed
if (epcm->substream == NULL)
return;
#if 0
- printk("IRQ: position = 0x%x, period = 0x%x, size = 0x%x\n",
+ printk(KERN_DEBUG "IRQ: position = 0x%x, period = 0x%x, size = 0x%x\n",
epcm->substream->runtime->hw->pointer(emu, epcm->substream),
snd_pcm_lib_period_bytes(epcm->substream),
snd_pcm_lib_buffer_bytes(epcm->substream));
1,
&epcm->extra);
if (err < 0) {
- /* printk("pcm_channel_alloc: failed extra: voices=%d, frame=%d\n", voices, frame); */
+ /*
+ printk(KERN_DEBUG "pcm_channel_alloc: "
+ "failed extra: voices=%d, frame=%d\n",
+ voices, frame);
+ */
for (i = 0; i < voices; i++) {
snd_emu10k1_voice_free(epcm->emu, epcm->voices[i]);
epcm->voices[i] = NULL;
struct snd_emu10k1_pcm_mixer *mix;
int result = 0;
- /* printk("trigger - emu10k1 = 0x%x, cmd = %i, pointer = %i\n", (int)emu, cmd, substream->ops->pointer(substream)); */
+ /*
+ printk(KERN_DEBUG "trigger - emu10k1 = 0x%x, cmd = %i, pointer = %i\n",
+ (int)emu, cmd, substream->ops->pointer(substream))
+ */
spin_lock(&emu->reg_lock);
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
/* hmm this should cause full and half full interrupt to be raised? */
outl(epcm->capture_ipr, emu->port + IPR);
snd_emu10k1_intr_enable(emu, epcm->capture_inte);
- /* printk("adccr = 0x%x, adcbs = 0x%x\n", epcm->adccr, epcm->adcbs); */
+ /*
+ printk(KERN_DEBUG "adccr = 0x%x, adcbs = 0x%x\n",
+ epcm->adccr, epcm->adcbs);
+ */
switch (epcm->type) {
case CAPTURE_AC97ADC:
snd_emu10k1_ptr_write(emu, ADCCR, 0, epcm->capture_cr_val);
ptr -= runtime->buffer_size;
}
#endif
- /* printk("ptr = 0x%x, buffer_size = 0x%x, period_size = 0x%x\n", ptr, runtime->buffer_size, runtime->period_size); */
+ /*
+ printk(KERN_DEBUG
+ "ptr = 0x%x, buffer_size = 0x%x, period_size = 0x%x\n",
+ ptr, runtime->buffer_size, runtime->period_size);
+ */
return ptr;
}
unsigned int count,
unsigned int tram_shift)
{
- /* printk("tram_poke1: dst_left = 0x%p, dst_right = 0x%p, src = 0x%p, count = 0x%x\n", dst_left, dst_right, src, count); */
+ /*
+ printk(KERN_DEBUG "tram_poke1: dst_left = 0x%p, dst_right = 0x%p, "
+ "src = 0x%p, count = 0x%x\n",
+ dst_left, dst_right, src, count);
+ */
if ((tram_shift & 1) == 0) {
while (count--) {
*dst_left-- = *src++;
struct snd_emu10k1_fx8010_pcm *pcm = &emu->fx8010.pcm[substream->number];
unsigned int i;
- /* printk("prepare: etram_pages = 0x%p, dma_area = 0x%x, buffer_size = 0x%x (0x%x)\n", emu->fx8010.etram_pages, runtime->dma_area, runtime->buffer_size, runtime->buffer_size << 2); */
+ /*
+ printk(KERN_DEBUG "prepare: etram_pages = 0x%p, dma_area = 0x%x, "
+ "buffer_size = 0x%x (0x%x)\n",
+ emu->fx8010.etram_pages, runtime->dma_area,
+ runtime->buffer_size, runtime->buffer_size << 2);
+ */
memset(&pcm->pcm_rec, 0, sizeof(pcm->pcm_rec));
pcm->pcm_rec.hw_buffer_size = pcm->buffer_size * 2; /* byte size */
pcm->pcm_rec.sw_buffer_size = snd_pcm_lib_buffer_bytes(substream);
break;
if (timeout > 1000) {
- snd_printk("emu10k1:I2C:timeout status=0x%x\n", status);
+ snd_printk(KERN_WARNING
+ "emu10k1:I2C:timeout status=0x%x\n",
+ status);
break;
}
}
struct snd_emu10k1_pcm *epcm = runtime->private_data;
if (epcm) {
- //snd_printk("epcm free: %p\n", epcm);
+ /* snd_printk(KERN_DEBUG "epcm free: %p\n", epcm); */
kfree(epcm);
}
}
int err;
epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
- //snd_printk("epcm kcalloc: %p\n", epcm);
+ /* snd_printk(KERN_DEBUG "epcm kcalloc: %p\n", epcm); */
if (epcm == NULL)
return -ENOMEM;
epcm->emu = emu;
epcm->substream = substream;
- //snd_printk("epcm device=%d, channel_id=%d\n", substream->pcm->device, channel_id);
-
+ /*
+ snd_printk(KERN_DEBUG "epcm device=%d, channel_id=%d\n",
+ substream->pcm->device, channel_id);
+ */
runtime->private_data = epcm;
runtime->private_free = snd_p16v_pcm_free_substream;
channel->number = channel_id;
channel->use=1;
- //snd_printk("p16v: open channel_id=%d, channel=%p, use=0x%x\n", channel_id, channel, channel->use);
- //printk("open:channel_id=%d, chip=%p, channel=%p\n",channel_id, chip, channel);
- //channel->interrupt = snd_p16v_pcm_channel_interrupt;
- channel->epcm=epcm;
+#if 0 /* debug */
+ snd_printk(KERN_DEBUG
+ "p16v: open channel_id=%d, channel=%p, use=0x%x\n",
+ channel_id, channel, channel->use);
+ printk(KERN_DEBUG "open:channel_id=%d, chip=%p, channel=%p\n",
+ channel_id, chip, channel);
+#endif /* debug */
+ /* channel->interrupt = snd_p16v_pcm_channel_interrupt; */
+ channel->epcm = epcm;
if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
return err;
int err;
epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
- //snd_printk("epcm kcalloc: %p\n", epcm);
+ /* snd_printk(KERN_DEBUG "epcm kcalloc: %p\n", epcm); */
if (epcm == NULL)
return -ENOMEM;
epcm->emu = emu;
epcm->substream = substream;
- //snd_printk("epcm device=%d, channel_id=%d\n", substream->pcm->device, channel_id);
-
+ /*
+ snd_printk(KERN_DEBUG "epcm device=%d, channel_id=%d\n",
+ substream->pcm->device, channel_id);
+ */
runtime->private_data = epcm;
runtime->private_free = snd_p16v_pcm_free_substream;
channel->number = channel_id;
channel->use=1;
- //snd_printk("p16v: open channel_id=%d, channel=%p, use=0x%x\n", channel_id, channel, channel->use);
- //printk("open:channel_id=%d, chip=%p, channel=%p\n",channel_id, chip, channel);
- //channel->interrupt = snd_p16v_pcm_channel_interrupt;
- channel->epcm=epcm;
+#if 0 /* debug */
+ snd_printk(KERN_DEBUG
+ "p16v: open channel_id=%d, channel=%p, use=0x%x\n",
+ channel_id, channel, channel->use);
+ printk(KERN_DEBUG "open:channel_id=%d, chip=%p, channel=%p\n",
+ channel_id, chip, channel);
+#endif /* debug */
+ /* channel->interrupt = snd_p16v_pcm_channel_interrupt; */
+ channel->epcm = epcm;
if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
return err;
int i;
u32 tmp;
- //snd_printk("prepare:channel_number=%d, rate=%d, format=0x%x, channels=%d, buffer_size=%ld, period_size=%ld, periods=%u, frames_to_bytes=%d\n",channel, runtime->rate, runtime->format, runtime->channels, runtime->buffer_size, runtime->period_size, runtime->periods, frames_to_bytes(runtime, 1));
- //snd_printk("dma_addr=%x, dma_area=%p, table_base=%p\n",runtime->dma_addr, runtime->dma_area, table_base);
- //snd_printk("dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",emu->p16v_buffer.addr, emu->p16v_buffer.area, emu->p16v_buffer.bytes);
+#if 0 /* debug */
+ snd_printk(KERN_DEBUG "prepare:channel_number=%d, rate=%d, "
+ "format=0x%x, channels=%d, buffer_size=%ld, "
+ "period_size=%ld, periods=%u, frames_to_bytes=%d\n",
+ channel, runtime->rate, runtime->format, runtime->channels,
+ runtime->buffer_size, runtime->period_size,
+ runtime->periods, frames_to_bytes(runtime, 1));
+ snd_printk(KERN_DEBUG "dma_addr=%x, dma_area=%p, table_base=%p\n",
+ runtime->dma_addr, runtime->dma_area, table_base);
+ snd_printk(KERN_DEBUG "dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",
+ emu->p16v_buffer.addr, emu->p16v_buffer.area,
+ emu->p16v_buffer.bytes);
+#endif /* debug */
tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, channel);
switch (runtime->rate) {
case 44100:
struct snd_pcm_runtime *runtime = substream->runtime;
int channel = substream->pcm->device - emu->p16v_device_offset;
u32 tmp;
- //printk("prepare capture:channel_number=%d, rate=%d, format=0x%x, channels=%d, buffer_size=%ld, period_size=%ld, frames_to_bytes=%d\n",channel, runtime->rate, runtime->format, runtime->channels, runtime->buffer_size, runtime->period_size, frames_to_bytes(runtime, 1));
+
+ /*
+ printk(KERN_DEBUG "prepare capture:channel_number=%d, rate=%d, "
+ "format=0x%x, channels=%d, buffer_size=%ld, period_size=%ld, "
+ "frames_to_bytes=%d\n",
+ channel, runtime->rate, runtime->format, runtime->channels,
+ runtime->buffer_size, runtime->period_size,
+ frames_to_bytes(runtime, 1));
+ */
tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, channel);
switch (runtime->rate) {
case 44100:
runtime = s->runtime;
epcm = runtime->private_data;
channel = substream->pcm->device-emu->p16v_device_offset;
- //snd_printk("p16v channel=%d\n",channel);
+ /* snd_printk(KERN_DEBUG "p16v channel=%d\n", channel); */
epcm->running = running;
basic |= (0x1<<channel);
inte |= (INTE2_PLAYBACK_CH_0_LOOP<<channel);
snd_pcm_trigger_done(s, substream);
}
- //snd_printk("basic=0x%x, inte=0x%x\n",basic, inte);
+ /* snd_printk(KERN_DEBUG "basic=0x%x, inte=0x%x\n", basic, inte); */
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
ptr -= runtime->buffer_size;
printk(KERN_WARNING "buffer capture limited!\n");
}
- //printk("ptr1 = 0x%lx, ptr2=0x%lx, ptr=0x%lx, buffer_size = 0x%x, period_size = 0x%x, bits=%d, rate=%d\n", ptr1, ptr2, ptr, (int)runtime->buffer_size, (int)runtime->period_size, (int)runtime->frame_bits, (int)runtime->rate);
-
+ /*
+ printk(KERN_DEBUG "ptr1 = 0x%lx, ptr2=0x%lx, ptr=0x%lx, "
+ "buffer_size = 0x%x, period_size = 0x%x, bits=%d, rate=%d\n",
+ ptr1, ptr2, ptr, (int)runtime->buffer_size,
+ (int)runtime->period_size, (int)runtime->frame_bits,
+ (int)runtime->rate);
+ */
return ptr;
}
// release the data
if (chip->p16v_buffer.area) {
snd_dma_free_pages(&chip->p16v_buffer);
- //snd_printk("period lables free: %p\n", &chip->p16v_buffer);
+ /*
+ snd_printk(KERN_DEBUG "period lables free: %p\n",
+ &chip->p16v_buffer);
+ */
}
return 0;
}
int err;
int capture=1;
- //snd_printk("snd_p16v_pcm called. device=%d\n", device);
+ /* snd_printk("KERN_DEBUG snd_p16v_pcm called. device=%d\n", device); */
emu->p16v_device_offset = device;
if (rpcm)
*rpcm = NULL;
snd_dma_pci_data(emu->pci),
((65536 - 64) * 8), ((65536 - 64) * 8))) < 0)
return err;
- //snd_printk("preallocate playback substream: err=%d\n", err);
+ /*
+ snd_printk(KERN_DEBUG
+ "preallocate playback substream: err=%d\n", err);
+ */
}
for (substream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
snd_dma_pci_data(emu->pci),
65536 - 64, 65536 - 64)) < 0)
return err;
- //snd_printk("preallocate capture substream: err=%d\n", err);
+ /*
+ snd_printk(KERN_DEBUG
+ "preallocate capture substream: err=%d\n", err);
+ */
}
if (rpcm)
*rvoice = NULL;
first_voice = last_voice = 0;
for (i = emu->next_free_voice, j = 0; j < NUM_G ; i += number, j += number) {
- // printk("i %d j %d next free %d!\n", i, j, emu->next_free_voice);
+ /*
+ printk(KERN_DEBUG "i %d j %d next free %d!\n",
+ i, j, emu->next_free_voice);
+ */
i %= NUM_G;
/* stereo voices must be even/odd */
}
}
if (!skip) {
- // printk("allocated voice %d\n", i);
+ /* printk(KERN_DEBUG "allocated voice %d\n", i); */
first_voice = i;
last_voice = (i + number) % NUM_G;
emu->next_free_voice = last_voice;
for (i = 0; i < number; i++) {
voice = &emu->voices[(first_voice + i) % NUM_G];
- // printk("voice alloc - %i, %i of %i\n", voice->number, idx-first_voice+1, number);
+ /*
+ printk(kERN_DEBUG "voice alloc - %i, %i of %i\n",
+ voice->number, idx-first_voice+1, number);
+ */
voice->use = 1;
switch (type) {
case EMU10K1_PCM:
unsigned long end_time = jiffies + HZ / 10;
#if 0
- printk("CODEC WRITE: reg = 0x%x, val = 0x%x (0x%x), creg = 0x%x\n",
+ printk(KERN_DEBUG
+ "CODEC WRITE: reg = 0x%x, val = 0x%x (0x%x), creg = 0x%x\n",
reg, val, ES_1370_CODEC_WRITE(reg, val), ES_REG(ensoniq, 1370_CODEC));
#endif
do {
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
if ((err = snd_ensoniq_create(card, pci, &ensoniq)) < 0) {
snd_card_free(card);
status = inb(SLIO_REG(chip, IRQCONTROL));
#if 0
- printk("Es1938debug - interrupt status: =0x%x\n", status);
+ printk(KERN_DEBUG "Es1938debug - interrupt status: =0x%x\n", status);
#endif
/* AUDIO 1 */
if (status & 0x10) {
#if 0
- printk("Es1938debug - AUDIO channel 1 interrupt\n");
- printk("Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
+ printk(KERN_DEBUG
+ "Es1938debug - AUDIO channel 1 interrupt\n");
+ printk(KERN_DEBUG
+ "Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
inw(SLDM_REG(chip, DMACOUNT)));
- printk("Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
+ printk(KERN_DEBUG
+ "Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
inl(SLDM_REG(chip, DMAADDR)));
- printk("Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
+ printk(KERN_DEBUG
+ "Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
inl(SLDM_REG(chip, DMASTATUS)));
#endif
/* clear irq */
/* AUDIO 2 */
if (status & 0x20) {
#if 0
- printk("Es1938debug - AUDIO channel 2 interrupt\n");
- printk("Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
+ printk(KERN_DEBUG
+ "Es1938debug - AUDIO channel 2 interrupt\n");
+ printk(KERN_DEBUG
+ "Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
- printk("Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
+ printk(KERN_DEBUG
+ "Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
inl(SLIO_REG(chip, AUDIO2DMAADDR)));
#endif
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
for (idx = 0; idx < 5; idx++) {
if (pci_resource_start(pci, idx) == 0 ||
!(pci_resource_flags(pci, idx) & IORESOURCE_IO)) {
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (!card)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
if (total_bufsize[dev] < 128)
total_bufsize[dev] = 128;
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], &chip)) < 0) {
snd_card_free(card);
return err;
input_unregister_device(beep->dev);
kfree(beep);
+ codec->beep = NULL;
}
}
EXPORT_SYMBOL_HDA(snd_hda_detach_beep_device);
int snd_hda_attach_beep_device(struct hda_codec *codec, int nid);
void snd_hda_detach_beep_device(struct hda_codec *codec);
#else
-#define snd_hda_attach_beep_device(...)
+#define snd_hda_attach_beep_device(...) 0
#define snd_hda_detach_beep_device(...)
#endif
#endif
total_nodes = snd_hda_get_sub_nodes(codec, AC_NODE_ROOT, &nid);
for (i = 0; i < total_nodes; i++, nid++) {
- unsigned int func;
- func = snd_hda_param_read(codec, nid, AC_PAR_FUNCTION_TYPE);
- switch (func & 0xff) {
+ codec->function_id = snd_hda_param_read(codec, nid,
+ AC_PAR_FUNCTION_TYPE) & 0xff;
+ switch (codec->function_id) {
case AC_GRP_AUDIO_FUNCTION:
codec->afg = nid;
break;
return 0;
}
+/* read all pin default configurations and save codec->init_pins */
+static int read_pin_defaults(struct hda_codec *codec)
+{
+ int i;
+ hda_nid_t nid = codec->start_nid;
+
+ for (i = 0; i < codec->num_nodes; i++, nid++) {
+ struct hda_pincfg *pin;
+ unsigned int wcaps = get_wcaps(codec, nid);
+ unsigned int wid_type = (wcaps & AC_WCAP_TYPE) >>
+ AC_WCAP_TYPE_SHIFT;
+ if (wid_type != AC_WID_PIN)
+ continue;
+ pin = snd_array_new(&codec->init_pins);
+ if (!pin)
+ return -ENOMEM;
+ pin->nid = nid;
+ pin->cfg = snd_hda_codec_read(codec, nid, 0,
+ AC_VERB_GET_CONFIG_DEFAULT, 0);
+ }
+ return 0;
+}
+
+/* look up the given pin config list and return the item matching with NID */
+static struct hda_pincfg *look_up_pincfg(struct hda_codec *codec,
+ struct snd_array *array,
+ hda_nid_t nid)
+{
+ int i;
+ for (i = 0; i < array->used; i++) {
+ struct hda_pincfg *pin = snd_array_elem(array, i);
+ if (pin->nid == nid)
+ return pin;
+ }
+ return NULL;
+}
+
+/* write a config value for the given NID */
+static void set_pincfg(struct hda_codec *codec, hda_nid_t nid,
+ unsigned int cfg)
+{
+ int i;
+ for (i = 0; i < 4; i++) {
+ snd_hda_codec_write(codec, nid, 0,
+ AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 + i,
+ cfg & 0xff);
+ cfg >>= 8;
+ }
+}
+
+/* set the current pin config value for the given NID.
+ * the value is cached, and read via snd_hda_codec_get_pincfg()
+ */
+int snd_hda_add_pincfg(struct hda_codec *codec, struct snd_array *list,
+ hda_nid_t nid, unsigned int cfg)
+{
+ struct hda_pincfg *pin;
+ unsigned int oldcfg;
+
+ oldcfg = snd_hda_codec_get_pincfg(codec, nid);
+ pin = look_up_pincfg(codec, list, nid);
+ if (!pin) {
+ pin = snd_array_new(list);
+ if (!pin)
+ return -ENOMEM;
+ pin->nid = nid;
+ }
+ pin->cfg = cfg;
+
+ /* change only when needed; e.g. if the pincfg is already present
+ * in user_pins[], don't write it
+ */
+ cfg = snd_hda_codec_get_pincfg(codec, nid);
+ if (oldcfg != cfg)
+ set_pincfg(codec, nid, cfg);
+ return 0;
+}
+
+int snd_hda_codec_set_pincfg(struct hda_codec *codec,
+ hda_nid_t nid, unsigned int cfg)
+{
+ return snd_hda_add_pincfg(codec, &codec->driver_pins, nid, cfg);
+}
+EXPORT_SYMBOL_HDA(snd_hda_codec_set_pincfg);
+
+/* get the current pin config value of the given pin NID */
+unsigned int snd_hda_codec_get_pincfg(struct hda_codec *codec, hda_nid_t nid)
+{
+ struct hda_pincfg *pin;
+
+#ifdef CONFIG_SND_HDA_HWDEP
+ pin = look_up_pincfg(codec, &codec->user_pins, nid);
+ if (pin)
+ return pin->cfg;
+#endif
+ pin = look_up_pincfg(codec, &codec->driver_pins, nid);
+ if (pin)
+ return pin->cfg;
+ pin = look_up_pincfg(codec, &codec->init_pins, nid);
+ if (pin)
+ return pin->cfg;
+ return 0;
+}
+EXPORT_SYMBOL_HDA(snd_hda_codec_get_pincfg);
+
+/* restore all current pin configs */
+static void restore_pincfgs(struct hda_codec *codec)
+{
+ int i;
+ for (i = 0; i < codec->init_pins.used; i++) {
+ struct hda_pincfg *pin = snd_array_elem(&codec->init_pins, i);
+ set_pincfg(codec, pin->nid,
+ snd_hda_codec_get_pincfg(codec, pin->nid));
+ }
+}
static void init_hda_cache(struct hda_cache_rec *cache,
unsigned int record_size);
static void free_hda_cache(struct hda_cache_rec *cache);
+/* restore the initial pin cfgs and release all pincfg lists */
+static void restore_init_pincfgs(struct hda_codec *codec)
+{
+ /* first free driver_pins and user_pins, then call restore_pincfg
+ * so that only the values in init_pins are restored
+ */
+ snd_array_free(&codec->driver_pins);
+#ifdef CONFIG_SND_HDA_HWDEP
+ snd_array_free(&codec->user_pins);
+#endif
+ restore_pincfgs(codec);
+ snd_array_free(&codec->init_pins);
+}
+
/*
* codec destructor
*/
{
if (!codec)
return;
+ restore_init_pincfgs(codec);
#ifdef CONFIG_SND_HDA_POWER_SAVE
cancel_delayed_work(&codec->power_work);
flush_workqueue(codec->bus->workq);
kfree(codec);
}
+static void hda_set_power_state(struct hda_codec *codec, hda_nid_t fg,
+ unsigned int power_state);
+
/**
* snd_hda_codec_new - create a HDA codec
* @bus: the bus to assign
init_hda_cache(&codec->amp_cache, sizeof(struct hda_amp_info));
init_hda_cache(&codec->cmd_cache, sizeof(struct hda_cache_head));
snd_array_init(&codec->mixers, sizeof(struct snd_kcontrol *), 32);
+ snd_array_init(&codec->init_pins, sizeof(struct hda_pincfg), 16);
+ snd_array_init(&codec->driver_pins, sizeof(struct hda_pincfg), 16);
if (codec->bus->modelname) {
codec->modelname = kstrdup(codec->bus->modelname, GFP_KERNEL);
if (!codec->modelname) {
setup_fg_nodes(codec);
if (!codec->afg && !codec->mfg) {
snd_printdd("hda_codec: no AFG or MFG node found\n");
- snd_hda_codec_free(codec);
- return -ENODEV;
+ err = -ENODEV;
+ goto error;
}
- if (read_widget_caps(codec, codec->afg ? codec->afg : codec->mfg) < 0) {
+ err = read_widget_caps(codec, codec->afg ? codec->afg : codec->mfg);
+ if (err < 0) {
snd_printk(KERN_ERR "hda_codec: cannot malloc\n");
- snd_hda_codec_free(codec);
- return -ENOMEM;
+ goto error;
}
+ err = read_pin_defaults(codec);
+ if (err < 0)
+ goto error;
if (!codec->subsystem_id) {
hda_nid_t nid = codec->afg ? codec->afg : codec->mfg;
if (bus->modelname)
codec->modelname = kstrdup(bus->modelname, GFP_KERNEL);
+ /* power-up all before initialization */
+ hda_set_power_state(codec,
+ codec->afg ? codec->afg : codec->mfg,
+ AC_PWRST_D0);
+
if (do_init) {
err = snd_hda_codec_configure(codec);
- if (err < 0) {
- snd_hda_codec_free(codec);
- return err;
- }
+ if (err < 0)
+ goto error;
}
snd_hda_codec_proc_new(codec);
if (codecp)
*codecp = codec;
return 0;
+
+ error:
+ snd_hda_codec_free(codec);
+ return err;
}
EXPORT_SYMBOL_HDA(snd_hda_codec_new);
/* FIXME: more better hash key? */
#define HDA_HASH_KEY(nid,dir,idx) (u32)((nid) + ((idx) << 16) + ((dir) << 24))
+#define HDA_HASH_PINCAP_KEY(nid) (u32)((nid) + (0x02 << 24))
#define INFO_AMP_CAPS (1<<0)
#define INFO_AMP_VOL(ch) (1 << (1 + (ch)))
}
EXPORT_SYMBOL_HDA(snd_hda_override_amp_caps);
+u32 snd_hda_query_pin_caps(struct hda_codec *codec, hda_nid_t nid)
+{
+ struct hda_amp_info *info;
+
+ info = get_alloc_amp_hash(codec, HDA_HASH_PINCAP_KEY(nid));
+ if (!info)
+ return 0;
+ if (!info->head.val) {
+ info->amp_caps = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
+ info->head.val |= INFO_AMP_CAPS;
+ }
+ return info->amp_caps;
+}
+EXPORT_SYMBOL_HDA(snd_hda_query_pin_caps);
+
/*
* read the current volume to info
* if the cache exists, read the cache value.
u16 nid = get_amp_nid(kcontrol);
u8 chs = get_amp_channels(kcontrol);
int dir = get_amp_direction(kcontrol);
+ unsigned int ofs = get_amp_offset(kcontrol);
u32 caps;
caps = query_amp_caps(codec, nid, dir);
kcontrol->id.name);
return -EINVAL;
}
+ if (ofs < caps)
+ caps -= ofs;
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = chs == 3 ? 2 : 1;
uinfo->value.integer.min = 0;
}
EXPORT_SYMBOL_HDA(snd_hda_mixer_amp_volume_info);
+
+static inline unsigned int
+read_amp_value(struct hda_codec *codec, hda_nid_t nid,
+ int ch, int dir, int idx, unsigned int ofs)
+{
+ unsigned int val;
+ val = snd_hda_codec_amp_read(codec, nid, ch, dir, idx);
+ val &= HDA_AMP_VOLMASK;
+ if (val >= ofs)
+ val -= ofs;
+ else
+ val = 0;
+ return val;
+}
+
+static inline int
+update_amp_value(struct hda_codec *codec, hda_nid_t nid,
+ int ch, int dir, int idx, unsigned int ofs,
+ unsigned int val)
+{
+ if (val > 0)
+ val += ofs;
+ return snd_hda_codec_amp_update(codec, nid, ch, dir, idx,
+ HDA_AMP_VOLMASK, val);
+}
+
int snd_hda_mixer_amp_volume_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
int chs = get_amp_channels(kcontrol);
int dir = get_amp_direction(kcontrol);
int idx = get_amp_index(kcontrol);
+ unsigned int ofs = get_amp_offset(kcontrol);
long *valp = ucontrol->value.integer.value;
if (chs & 1)
- *valp++ = snd_hda_codec_amp_read(codec, nid, 0, dir, idx)
- & HDA_AMP_VOLMASK;
+ *valp++ = read_amp_value(codec, nid, 0, dir, idx, ofs);
if (chs & 2)
- *valp = snd_hda_codec_amp_read(codec, nid, 1, dir, idx)
- & HDA_AMP_VOLMASK;
+ *valp = read_amp_value(codec, nid, 1, dir, idx, ofs);
return 0;
}
EXPORT_SYMBOL_HDA(snd_hda_mixer_amp_volume_get);
int chs = get_amp_channels(kcontrol);
int dir = get_amp_direction(kcontrol);
int idx = get_amp_index(kcontrol);
+ unsigned int ofs = get_amp_offset(kcontrol);
long *valp = ucontrol->value.integer.value;
int change = 0;
snd_hda_power_up(codec);
if (chs & 1) {
- change = snd_hda_codec_amp_update(codec, nid, 0, dir, idx,
- 0x7f, *valp);
+ change = update_amp_value(codec, nid, 0, dir, idx, ofs, *valp);
valp++;
}
if (chs & 2)
- change |= snd_hda_codec_amp_update(codec, nid, 1, dir, idx,
- 0x7f, *valp);
+ change |= update_amp_value(codec, nid, 1, dir, idx, ofs, *valp);
snd_hda_power_down(codec);
return change;
}
struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
hda_nid_t nid = get_amp_nid(kcontrol);
int dir = get_amp_direction(kcontrol);
+ unsigned int ofs = get_amp_offset(kcontrol);
u32 caps, val1, val2;
if (size < 4 * sizeof(unsigned int))
val2 = (caps & AC_AMPCAP_STEP_SIZE) >> AC_AMPCAP_STEP_SIZE_SHIFT;
val2 = (val2 + 1) * 25;
val1 = -((caps & AC_AMPCAP_OFFSET) >> AC_AMPCAP_OFFSET_SHIFT);
+ val1 += ofs;
val1 = ((int)val1) * ((int)val2);
if (put_user(SNDRV_CTL_TLVT_DB_SCALE, _tlv))
return -EFAULT;
}
EXPORT_SYMBOL_HDA(snd_hda_ctl_add);
-#ifdef CONFIG_SND_HDA_RECONFIG
/* Clear all controls assigned to the given codec */
void snd_hda_ctls_clear(struct hda_codec *codec)
{
snd_array_free(&codec->mixers);
}
-void snd_hda_codec_reset(struct hda_codec *codec)
+/* pseudo device locking
+ * toggle card->shutdown to allow/disallow the device access (as a hack)
+ */
+static int hda_lock_devices(struct snd_card *card)
{
- int i;
+ spin_lock(&card->files_lock);
+ if (card->shutdown) {
+ spin_unlock(&card->files_lock);
+ return -EINVAL;
+ }
+ card->shutdown = 1;
+ spin_unlock(&card->files_lock);
+ return 0;
+}
+
+static void hda_unlock_devices(struct snd_card *card)
+{
+ spin_lock(&card->files_lock);
+ card->shutdown = 0;
+ spin_unlock(&card->files_lock);
+}
+
+int snd_hda_codec_reset(struct hda_codec *codec)
+{
+ struct snd_card *card = codec->bus->card;
+ int i, pcm;
+
+ if (hda_lock_devices(card) < 0)
+ return -EBUSY;
+ /* check whether the codec isn't used by any mixer or PCM streams */
+ if (!list_empty(&card->ctl_files)) {
+ hda_unlock_devices(card);
+ return -EBUSY;
+ }
+ for (pcm = 0; pcm < codec->num_pcms; pcm++) {
+ struct hda_pcm *cpcm = &codec->pcm_info[pcm];
+ if (!cpcm->pcm)
+ continue;
+ if (cpcm->pcm->streams[0].substream_opened ||
+ cpcm->pcm->streams[1].substream_opened) {
+ hda_unlock_devices(card);
+ return -EBUSY;
+ }
+ }
+
+ /* OK, let it free */
#ifdef CONFIG_SND_HDA_POWER_SAVE
cancel_delayed_work(&codec->power_work);
/* relase PCMs */
for (i = 0; i < codec->num_pcms; i++) {
if (codec->pcm_info[i].pcm) {
- snd_device_free(codec->bus->card,
- codec->pcm_info[i].pcm);
+ snd_device_free(card, codec->pcm_info[i].pcm);
clear_bit(codec->pcm_info[i].device,
codec->bus->pcm_dev_bits);
}
free_hda_cache(&codec->cmd_cache);
init_hda_cache(&codec->amp_cache, sizeof(struct hda_amp_info));
init_hda_cache(&codec->cmd_cache, sizeof(struct hda_cache_head));
+ /* free only driver_pins so that init_pins + user_pins are restored */
+ snd_array_free(&codec->driver_pins);
+ restore_pincfgs(codec);
codec->num_pcms = 0;
codec->pcm_info = NULL;
codec->preset = NULL;
+ memset(&codec->patch_ops, 0, sizeof(codec->patch_ops));
+ codec->slave_dig_outs = NULL;
+ codec->spdif_status_reset = 0;
module_put(codec->owner);
codec->owner = NULL;
+
+ /* allow device access again */
+ hda_unlock_devices(card);
+ return 0;
}
-#endif /* CONFIG_SND_HDA_RECONFIG */
/* create a virtual master control and add slaves */
int snd_hda_add_vmaster(struct hda_codec *codec, char *name,
for (s = slaves; *s; s++) {
struct snd_kcontrol *sctl;
-
- sctl = snd_hda_find_mixer_ctl(codec, *s);
- if (!sctl) {
- snd_printdd("Cannot find slave %s, skipped\n", *s);
- continue;
+ int i = 0;
+ for (;;) {
+ sctl = _snd_hda_find_mixer_ctl(codec, *s, i);
+ if (!sctl) {
+ if (!i)
+ snd_printdd("Cannot find slave %s, "
+ "skipped\n", *s);
+ break;
+ }
+ err = snd_ctl_add_slave(kctl, sctl);
+ if (err < 0)
+ return err;
+ i++;
}
- err = snd_ctl_add_slave(kctl, sctl);
- if (err < 0)
- return err;
}
return 0;
}
}
for (dig_mix = dig_in_ctls; dig_mix->name; dig_mix++) {
kctl = snd_ctl_new1(dig_mix, codec);
+ if (!kctl)
+ return -ENOMEM;
kctl->private_value = nid;
err = snd_hda_ctl_add(codec, kctl);
if (err < 0)
* don't power down the widget if it controls
* eapd and EAPD_BTLENABLE is set.
*/
- pincap = snd_hda_param_read(codec, nid,
- AC_PAR_PIN_CAP);
+ pincap = snd_hda_query_pin_caps(codec, nid);
if (pincap & AC_PINCAP_EAPD) {
int eapd = snd_hda_codec_read(codec,
nid, 0,
hda_set_power_state(codec,
codec->afg ? codec->afg : codec->mfg,
AC_PWRST_D0);
+ restore_pincfgs(codec); /* restore all current pin configs */
hda_exec_init_verbs(codec);
if (codec->patch_ops.resume)
codec->patch_ops.resume(codec);
list_for_each_entry(codec, &bus->codec_list, list) {
int err = snd_hda_codec_build_controls(codec);
- if (err < 0)
- return err;
+ if (err < 0) {
+ printk(KERN_ERR "hda_codec: cannot build controls"
+ "for #%d (error %d)\n", codec->addr, err);
+ err = snd_hda_codec_reset(codec);
+ if (err < 0) {
+ printk(KERN_ERR
+ "hda_codec: cannot revert codec\n");
+ return err;
+ }
+ }
}
return 0;
}
int snd_hda_codec_build_controls(struct hda_codec *codec)
{
int err = 0;
- /* fake as if already powered-on */
- hda_keep_power_on(codec);
- /* then fire up */
- hda_set_power_state(codec,
- codec->afg ? codec->afg : codec->mfg,
- AC_PWRST_D0);
hda_exec_init_verbs(codec);
/* continue to initialize... */
if (codec->patch_ops.init)
err = codec->patch_ops.init(codec);
if (!err && codec->patch_ops.build_controls)
err = codec->patch_ops.build_controls(codec);
- snd_hda_power_down(codec);
if (err < 0)
return err;
return 0;
static int snd_hda_query_supported_pcm(struct hda_codec *codec, hda_nid_t nid,
u32 *ratesp, u64 *formatsp, unsigned int *bpsp)
{
- int i;
- unsigned int val, streams;
+ unsigned int i, val, wcaps;
val = 0;
- if (nid != codec->afg &&
- (get_wcaps(codec, nid) & AC_WCAP_FORMAT_OVRD)) {
+ wcaps = get_wcaps(codec, nid);
+ if (nid != codec->afg && (wcaps & AC_WCAP_FORMAT_OVRD)) {
val = snd_hda_param_read(codec, nid, AC_PAR_PCM);
if (val == -1)
return -EIO;
if (val & (1 << i))
rates |= rate_bits[i].alsa_bits;
}
+ if (rates == 0) {
+ snd_printk(KERN_ERR "hda_codec: rates == 0 "
+ "(nid=0x%x, val=0x%x, ovrd=%i)\n",
+ nid, val,
+ (wcaps & AC_WCAP_FORMAT_OVRD) ? 1 : 0);
+ return -EIO;
+ }
*ratesp = rates;
}
if (formatsp || bpsp) {
u64 formats = 0;
- unsigned int bps;
- unsigned int wcaps;
+ unsigned int streams, bps;
- wcaps = get_wcaps(codec, nid);
streams = snd_hda_param_read(codec, nid, AC_PAR_STREAM);
if (streams == -1)
return -EIO;
formats |= SNDRV_PCM_FMTBIT_U8;
bps = 8;
}
+ if (formats == 0) {
+ snd_printk(KERN_ERR "hda_codec: formats == 0 "
+ "(nid=0x%x, val=0x%x, ovrd=%i, "
+ "streams=0x%x)\n",
+ nid, val,
+ (wcaps & AC_WCAP_FORMAT_OVRD) ? 1 : 0,
+ streams);
+ return -EIO;
+ }
if (formatsp)
*formatsp = formats;
if (bpsp)
static int set_pcm_default_values(struct hda_codec *codec,
struct hda_pcm_stream *info)
{
+ int err;
+
/* query support PCM information from the given NID */
if (info->nid && (!info->rates || !info->formats)) {
- snd_hda_query_supported_pcm(codec, info->nid,
+ err = snd_hda_query_supported_pcm(codec, info->nid,
info->rates ? NULL : &info->rates,
info->formats ? NULL : &info->formats,
info->maxbps ? NULL : &info->maxbps);
+ if (err < 0)
+ return err;
}
if (info->ops.open == NULL)
info->ops.open = hda_pcm_default_open_close;
for (i = 0; i < ARRAY_SIZE(audio_idx); i++) {
dev = audio_idx[i];
if (!test_bit(dev, bus->pcm_dev_bits))
- break;
- }
- if (i >= ARRAY_SIZE(audio_idx)) {
- snd_printk(KERN_WARNING "Too many audio devices\n");
- return -EAGAIN;
+ goto ok;
}
- break;
+ snd_printk(KERN_WARNING "Too many audio devices\n");
+ return -EAGAIN;
case HDA_PCM_TYPE_SPDIF:
case HDA_PCM_TYPE_HDMI:
case HDA_PCM_TYPE_MODEM:
snd_printk(KERN_WARNING "Invalid PCM type %d\n", type);
return -EINVAL;
}
+ ok:
set_bit(dev, bus->pcm_dev_bits);
return dev;
}
if (!codec->patch_ops.build_pcms)
return 0;
err = codec->patch_ops.build_pcms(codec);
- if (err < 0)
- return err;
+ if (err < 0) {
+ printk(KERN_ERR "hda_codec: cannot build PCMs"
+ "for #%d (error %d)\n", codec->addr, err);
+ err = snd_hda_codec_reset(codec);
+ if (err < 0) {
+ printk(KERN_ERR
+ "hda_codec: cannot revert codec\n");
+ return err;
+ }
+ }
}
for (pcm = 0; pcm < codec->num_pcms; pcm++) {
struct hda_pcm *cpcm = &codec->pcm_info[pcm];
int dev;
if (!cpcm->stream[0].substreams && !cpcm->stream[1].substreams)
- return 0; /* no substreams assigned */
+ continue; /* no substreams assigned */
if (!cpcm->pcm) {
dev = get_empty_pcm_device(codec->bus, cpcm->pcm_type);
if (dev < 0)
- return 0;
+ continue; /* no fatal error */
cpcm->device = dev;
err = snd_hda_attach_pcm(codec, cpcm);
- if (err < 0)
- return err;
+ if (err < 0) {
+ printk(KERN_ERR "hda_codec: cannot attach "
+ "PCM stream %d for codec #%d\n",
+ dev, codec->addr);
+ continue; /* no fatal error */
+ }
}
}
return 0;
if (ignore_nids && is_in_nid_list(nid, ignore_nids))
continue;
- def_conf = snd_hda_codec_read(codec, nid, 0,
- AC_VERB_GET_CONFIG_DEFAULT, 0);
+ def_conf = snd_hda_codec_get_pincfg(codec, nid);
if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
continue;
loc = get_defcfg_location(def_conf);
cfg->input_pins[AUTO_PIN_AUX] = nid;
break;
case AC_JACK_SPDIF_OUT:
- cfg->dig_out_pin = nid;
+ case AC_JACK_DIG_OTHER_OUT:
+ if (cfg->dig_outs >= ARRAY_SIZE(cfg->dig_out_pins))
+ continue;
+ cfg->dig_out_pins[cfg->dig_outs] = nid;
+ cfg->dig_out_type[cfg->dig_outs] =
+ (loc == AC_JACK_LOC_HDMI) ?
+ HDA_PCM_TYPE_HDMI : HDA_PCM_TYPE_SPDIF;
+ cfg->dig_outs++;
break;
case AC_JACK_SPDIF_IN:
+ case AC_JACK_DIG_OTHER_IN:
cfg->dig_in_pin = nid;
+ if (loc == AC_JACK_LOC_HDMI)
+ cfg->dig_in_type = HDA_PCM_TYPE_HDMI;
+ else
+ cfg->dig_in_type = HDA_PCM_TYPE_SPDIF;
break;
}
}
cfg->hp_pins[1], cfg->hp_pins[2],
cfg->hp_pins[3], cfg->hp_pins[4]);
snd_printd(" mono: mono_out=0x%x\n", cfg->mono_out_pin);
+ if (cfg->dig_outs)
+ snd_printd(" dig-out=0x%x/0x%x\n",
+ cfg->dig_out_pins[0], cfg->dig_out_pins[1]);
snd_printd(" inputs: mic=0x%x, fmic=0x%x, line=0x%x, fline=0x%x,"
" cd=0x%x, aux=0x%x\n",
cfg->input_pins[AUTO_PIN_MIC],
cfg->input_pins[AUTO_PIN_FRONT_LINE],
cfg->input_pins[AUTO_PIN_CD],
cfg->input_pins[AUTO_PIN_AUX]);
+ if (cfg->dig_in_pin)
+ snd_printd(" dig-in=0x%x\n", cfg->dig_in_pin);
return 0;
}
hda_nid_t mfg; /* MFG node id */
/* ids */
+ u32 function_id;
u32 vendor_id;
u32 subsystem_id;
u32 revision_id;
unsigned short spdif_ctls; /* SPDIF control bits */
unsigned int spdif_in_enable; /* SPDIF input enable? */
hda_nid_t *slave_dig_outs; /* optional digital out slave widgets */
+ struct snd_array init_pins; /* initial (BIOS) pin configurations */
+ struct snd_array driver_pins; /* pin configs set by codec parser */
#ifdef CONFIG_SND_HDA_HWDEP
struct snd_hwdep *hwdep; /* assigned hwdep device */
struct snd_array init_verbs; /* additional init verbs */
struct snd_array hints; /* additional hints */
+ struct snd_array user_pins; /* default pin configs to override */
#endif
/* misc flags */
* status change
* (e.g. Realtek codecs)
*/
+ unsigned int pin_amp_workaround:1; /* pin out-amp takes index
+ * (e.g. Conexant codecs)
+ */
#ifdef CONFIG_SND_HDA_POWER_SAVE
unsigned int power_on :1; /* current (global) power-state */
unsigned int power_transition :1; /* power-state in transition */
#define snd_hda_sequence_write_cache snd_hda_sequence_write
#endif
+/* the struct for codec->pin_configs */
+struct hda_pincfg {
+ hda_nid_t nid;
+ unsigned int cfg;
+};
+
+unsigned int snd_hda_codec_get_pincfg(struct hda_codec *codec, hda_nid_t nid);
+int snd_hda_codec_set_pincfg(struct hda_codec *codec, hda_nid_t nid,
+ unsigned int cfg);
+int snd_hda_add_pincfg(struct hda_codec *codec, struct snd_array *list,
+ hda_nid_t nid, unsigned int cfg); /* for hwdep */
+
/*
* Mixer
*/
node->type = (node->wid_caps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
if (node->type == AC_WID_PIN) {
- node->pin_caps = snd_hda_param_read(codec, node->nid, AC_PAR_PIN_CAP);
+ node->pin_caps = snd_hda_query_pin_caps(codec, node->nid);
node->pin_ctl = snd_hda_codec_read(codec, node->nid, 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
- node->def_cfg = snd_hda_codec_read(codec, node->nid, 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
+ node->def_cfg = snd_hda_codec_get_pincfg(codec, node->nid);
}
if (node->wid_caps & AC_WCAP_OUT_AMP) {
#include <sound/hda_hwdep.h>
#include <sound/minors.h>
+/* hint string pair */
+struct hda_hint {
+ const char *key;
+ const char *val; /* contained in the same alloc as key */
+};
+
/*
* write/read an out-of-bound verb
*/
static void clear_hwdep_elements(struct hda_codec *codec)
{
- char **head;
int i;
/* clear init verbs */
snd_array_free(&codec->init_verbs);
/* clear hints */
- head = codec->hints.list;
- for (i = 0; i < codec->hints.used; i++, head++)
- kfree(*head);
+ for (i = 0; i < codec->hints.used; i++) {
+ struct hda_hint *hint = snd_array_elem(&codec->hints, i);
+ kfree(hint->key); /* we don't need to free hint->val */
+ }
snd_array_free(&codec->hints);
+ snd_array_free(&codec->user_pins);
}
static void hwdep_free(struct snd_hwdep *hwdep)
#endif
snd_array_init(&codec->init_verbs, sizeof(struct hda_verb), 32);
- snd_array_init(&codec->hints, sizeof(char *), 32);
+ snd_array_init(&codec->hints, sizeof(struct hda_hint), 32);
+ snd_array_init(&codec->user_pins, sizeof(struct hda_pincfg), 16);
return 0;
}
static int clear_codec(struct hda_codec *codec)
{
- snd_hda_codec_reset(codec);
+ int err;
+
+ err = snd_hda_codec_reset(codec);
+ if (err < 0) {
+ snd_printk(KERN_ERR "The codec is being used, can't free.\n");
+ return err;
+ }
clear_hwdep_elements(codec);
return 0;
}
{
int err;
+ snd_hda_power_up(codec);
snd_printk(KERN_INFO "hda-codec: reconfiguring\n");
- snd_hda_codec_reset(codec);
+ err = snd_hda_codec_reset(codec);
+ if (err < 0) {
+ snd_printk(KERN_ERR
+ "The codec is being used, can't reconfigure.\n");
+ goto error;
+ }
err = snd_hda_codec_configure(codec);
if (err < 0)
- return err;
+ goto error;
/* rebuild PCMs */
err = snd_hda_codec_build_pcms(codec);
if (err < 0)
- return err;
+ goto error;
/* rebuild mixers */
err = snd_hda_codec_build_controls(codec);
if (err < 0)
- return err;
- return snd_card_register(codec->bus->card);
+ goto error;
+ err = snd_card_register(codec->bus->card);
+ error:
+ snd_hda_power_down(codec);
+ return err;
}
/*
CODEC_ACTION_STORE(reconfig);
CODEC_ACTION_STORE(clear);
+static ssize_t init_verbs_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct snd_hwdep *hwdep = dev_get_drvdata(dev);
+ struct hda_codec *codec = hwdep->private_data;
+ int i, len = 0;
+ for (i = 0; i < codec->init_verbs.used; i++) {
+ struct hda_verb *v = snd_array_elem(&codec->init_verbs, i);
+ len += snprintf(buf + len, PAGE_SIZE - len,
+ "0x%02x 0x%03x 0x%04x\n",
+ v->nid, v->verb, v->param);
+ }
+ return len;
+}
+
static ssize_t init_verbs_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
return count;
}
+static ssize_t hints_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct snd_hwdep *hwdep = dev_get_drvdata(dev);
+ struct hda_codec *codec = hwdep->private_data;
+ int i, len = 0;
+ for (i = 0; i < codec->hints.used; i++) {
+ struct hda_hint *hint = snd_array_elem(&codec->hints, i);
+ len += snprintf(buf + len, PAGE_SIZE - len,
+ "%s = %s\n", hint->key, hint->val);
+ }
+ return len;
+}
+
+static struct hda_hint *get_hint(struct hda_codec *codec, const char *key)
+{
+ int i;
+
+ for (i = 0; i < codec->hints.used; i++) {
+ struct hda_hint *hint = snd_array_elem(&codec->hints, i);
+ if (!strcmp(hint->key, key))
+ return hint;
+ }
+ return NULL;
+}
+
+static void remove_trail_spaces(char *str)
+{
+ char *p;
+ if (!*str)
+ return;
+ p = str + strlen(str) - 1;
+ for (; isspace(*p); p--) {
+ *p = 0;
+ if (p == str)
+ return;
+ }
+}
+
+#define MAX_HINTS 1024
+
static ssize_t hints_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct snd_hwdep *hwdep = dev_get_drvdata(dev);
struct hda_codec *codec = hwdep->private_data;
- char *p;
- char **hint;
+ char *key, *val;
+ struct hda_hint *hint;
- if (!*buf || isspace(*buf) || *buf == '#' || *buf == '\n')
+ while (isspace(*buf))
+ buf++;
+ if (!*buf || *buf == '#' || *buf == '\n')
return count;
- p = kstrndup_noeol(buf, 1024);
- if (!p)
+ if (*buf == '=')
+ return -EINVAL;
+ key = kstrndup_noeol(buf, 1024);
+ if (!key)
return -ENOMEM;
- hint = snd_array_new(&codec->hints);
+ /* extract key and val */
+ val = strchr(key, '=');
+ if (!val) {
+ kfree(key);
+ return -EINVAL;
+ }
+ *val++ = 0;
+ while (isspace(*val))
+ val++;
+ remove_trail_spaces(key);
+ remove_trail_spaces(val);
+ hint = get_hint(codec, key);
+ if (hint) {
+ /* replace */
+ kfree(hint->key);
+ hint->key = key;
+ hint->val = val;
+ return count;
+ }
+ /* allocate a new hint entry */
+ if (codec->hints.used >= MAX_HINTS)
+ hint = NULL;
+ else
+ hint = snd_array_new(&codec->hints);
if (!hint) {
- kfree(p);
+ kfree(key);
return -ENOMEM;
}
- *hint = p;
+ hint->key = key;
+ hint->val = val;
+ return count;
+}
+
+static ssize_t pin_configs_show(struct hda_codec *codec,
+ struct snd_array *list,
+ char *buf)
+{
+ int i, len = 0;
+ for (i = 0; i < list->used; i++) {
+ struct hda_pincfg *pin = snd_array_elem(list, i);
+ len += sprintf(buf + len, "0x%02x 0x%08x\n",
+ pin->nid, pin->cfg);
+ }
+ return len;
+}
+
+static ssize_t init_pin_configs_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct snd_hwdep *hwdep = dev_get_drvdata(dev);
+ struct hda_codec *codec = hwdep->private_data;
+ return pin_configs_show(codec, &codec->init_pins, buf);
+}
+
+static ssize_t user_pin_configs_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct snd_hwdep *hwdep = dev_get_drvdata(dev);
+ struct hda_codec *codec = hwdep->private_data;
+ return pin_configs_show(codec, &codec->user_pins, buf);
+}
+
+static ssize_t driver_pin_configs_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct snd_hwdep *hwdep = dev_get_drvdata(dev);
+ struct hda_codec *codec = hwdep->private_data;
+ return pin_configs_show(codec, &codec->driver_pins, buf);
+}
+
+#define MAX_PIN_CONFIGS 32
+
+static ssize_t user_pin_configs_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct snd_hwdep *hwdep = dev_get_drvdata(dev);
+ struct hda_codec *codec = hwdep->private_data;
+ int nid, cfg;
+ int err;
+
+ if (sscanf(buf, "%i %i", &nid, &cfg) != 2)
+ return -EINVAL;
+ if (!nid)
+ return -EINVAL;
+ err = snd_hda_add_pincfg(codec, &codec->user_pins, nid, cfg);
+ if (err < 0)
+ return err;
return count;
}
CODEC_ATTR_RO(mfg),
CODEC_ATTR_RW(name),
CODEC_ATTR_RW(modelname),
- CODEC_ATTR_WO(init_verbs),
- CODEC_ATTR_WO(hints),
+ CODEC_ATTR_RW(init_verbs),
+ CODEC_ATTR_RW(hints),
+ CODEC_ATTR_RO(init_pin_configs),
+ CODEC_ATTR_RW(user_pin_configs),
+ CODEC_ATTR_RO(driver_pin_configs),
CODEC_ATTR_WO(reconfig),
CODEC_ATTR_WO(clear),
};
return 0;
}
+/*
+ * Look for hint string
+ */
+const char *snd_hda_get_hint(struct hda_codec *codec, const char *key)
+{
+ struct hda_hint *hint = get_hint(codec, key);
+ return hint ? hint->val : NULL;
+}
+EXPORT_SYMBOL_HDA(snd_hda_get_hint);
+
+int snd_hda_get_bool_hint(struct hda_codec *codec, const char *key)
+{
+ const char *p = snd_hda_get_hint(codec, key);
+ if (!p || !*p)
+ return -ENOENT;
+ switch (toupper(*p)) {
+ case 'T': /* true */
+ case 'Y': /* yes */
+ case '1':
+ return 1;
+ }
+ return 0;
+}
+EXPORT_SYMBOL_HDA(snd_hda_get_bool_hint);
+
#endif /* CONFIG_SND_HDA_RECONFIG */
/* HD codec */
unsigned short codec_mask;
+ int codec_probe_mask; /* copied from probe_mask option */
struct hda_bus *bus;
/* CORB/RIRB */
SD_CTL_DMA_START | SD_INT_MASK);
}
-/* stop a stream */
-static void azx_stream_stop(struct azx *chip, struct azx_dev *azx_dev)
+/* stop DMA */
+static void azx_stream_clear(struct azx *chip, struct azx_dev *azx_dev)
{
- /* stop DMA */
azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) &
~(SD_CTL_DMA_START | SD_INT_MASK));
azx_sd_writeb(azx_dev, SD_STS, SD_INT_MASK); /* to be sure */
+}
+
+/* stop a stream */
+static void azx_stream_stop(struct azx *chip, struct azx_dev *azx_dev)
+{
+ azx_stream_clear(chip, azx_dev);
/* disable SIE */
azx_writeb(chip, INTCTL,
azx_readb(chip, INTCTL) & ~(1 << azx_dev->index));
azx_sd_writel(azx_dev, SD_BDLPL, 0);
azx_sd_writel(azx_dev, SD_BDLPU, 0);
- period_bytes = snd_pcm_lib_period_bytes(substream);
- azx_dev->period_bytes = period_bytes;
+ period_bytes = azx_dev->period_bytes;
periods = azx_dev->bufsize / period_bytes;
/* program the initial BDL entries */
error:
snd_printk(KERN_ERR "Too many BDL entries: buffer=%d, period=%d\n",
azx_dev->bufsize, period_bytes);
- /* reset */
- azx_sd_writel(azx_dev, SD_BDLPL, 0);
- azx_sd_writel(azx_dev, SD_BDLPU, 0);
return -EINVAL;
}
-/*
- * set up the SD for streaming
- */
-static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev)
+/* reset stream */
+static void azx_stream_reset(struct azx *chip, struct azx_dev *azx_dev)
{
unsigned char val;
int timeout;
- /* make sure the run bit is zero for SD */
- azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) &
- ~SD_CTL_DMA_START);
- /* reset stream */
+ azx_stream_clear(chip, azx_dev);
+
azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) |
SD_CTL_STREAM_RESET);
udelay(3);
while (((val = azx_sd_readb(azx_dev, SD_CTL)) & SD_CTL_STREAM_RESET) &&
--timeout)
;
+}
+/*
+ * set up the SD for streaming
+ */
+static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev)
+{
+ /* make sure the run bit is zero for SD */
+ azx_stream_clear(chip, azx_dev);
/* program the stream_tag */
azx_sd_writel(azx_dev, SD_CTL,
(azx_sd_readl(azx_dev, SD_CTL) & ~SD_CTL_STREAM_TAG_MASK)|
};
static int __devinit azx_codec_create(struct azx *chip, const char *model,
- unsigned int codec_probe_mask,
int no_init)
{
struct hda_bus_template bus_temp;
/* First try to probe all given codec slots */
for (c = 0; c < max_slots; c++) {
- if ((chip->codec_mask & (1 << c)) & codec_probe_mask) {
+ if ((chip->codec_mask & (1 << c)) & chip->codec_probe_mask) {
if (probe_codec(chip, c) < 0) {
/* Some BIOSen give you wrong codec addresses
* that don't exist
/* Then create codec instances */
for (c = 0; c < max_slots; c++) {
- if ((chip->codec_mask & (1 << c)) & codec_probe_mask) {
+ if ((chip->codec_mask & (1 << c)) & chip->codec_probe_mask) {
struct hda_codec *codec;
err = snd_hda_codec_new(chip->bus, c, !no_init, &codec);
if (err < 0)
runtime->private_data = azx_dev;
snd_pcm_set_sync(substream);
mutex_unlock(&chip->open_mutex);
+
+ azx_stream_reset(chip, azx_dev);
return 0;
}
static int azx_pcm_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *hw_params)
{
+ struct azx_dev *azx_dev = get_azx_dev(substream);
+
+ azx_dev->bufsize = 0;
+ azx_dev->period_bytes = 0;
+ azx_dev->format_val = 0;
return snd_pcm_lib_malloc_pages(substream,
params_buffer_bytes(hw_params));
}
azx_sd_writel(azx_dev, SD_BDLPL, 0);
azx_sd_writel(azx_dev, SD_BDLPU, 0);
azx_sd_writel(azx_dev, SD_CTL, 0);
+ azx_dev->bufsize = 0;
+ azx_dev->period_bytes = 0;
+ azx_dev->format_val = 0;
hinfo->ops.cleanup(hinfo, apcm->codec, substream);
struct azx_dev *azx_dev = get_azx_dev(substream);
struct hda_pcm_stream *hinfo = apcm->hinfo[substream->stream];
struct snd_pcm_runtime *runtime = substream->runtime;
+ unsigned int bufsize, period_bytes, format_val;
+ int err;
- azx_dev->bufsize = snd_pcm_lib_buffer_bytes(substream);
- azx_dev->format_val = snd_hda_calc_stream_format(runtime->rate,
- runtime->channels,
- runtime->format,
- hinfo->maxbps);
- if (!azx_dev->format_val) {
+ format_val = snd_hda_calc_stream_format(runtime->rate,
+ runtime->channels,
+ runtime->format,
+ hinfo->maxbps);
+ if (!format_val) {
snd_printk(KERN_ERR SFX
"invalid format_val, rate=%d, ch=%d, format=%d\n",
runtime->rate, runtime->channels, runtime->format);
return -EINVAL;
}
+ bufsize = snd_pcm_lib_buffer_bytes(substream);
+ period_bytes = snd_pcm_lib_period_bytes(substream);
+
snd_printdd("azx_pcm_prepare: bufsize=0x%x, format=0x%x\n",
- azx_dev->bufsize, azx_dev->format_val);
- if (azx_setup_periods(chip, substream, azx_dev) < 0)
- return -EINVAL;
+ bufsize, format_val);
+
+ if (bufsize != azx_dev->bufsize ||
+ period_bytes != azx_dev->period_bytes ||
+ format_val != azx_dev->format_val) {
+ azx_dev->bufsize = bufsize;
+ azx_dev->period_bytes = period_bytes;
+ azx_dev->format_val = format_val;
+ err = azx_setup_periods(chip, substream, azx_dev);
+ if (err < 0)
+ return err;
+ }
+
azx_setup_controller(chip, azx_dev);
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
azx_dev->fifo_size = azx_sd_readw(azx_dev, SD_FIFOSIZE) + 1;
{
const struct snd_pci_quirk *q;
- /* Check VIA HD Audio Controller exist */
- if (chip->pci->vendor == PCI_VENDOR_ID_VIA &&
- chip->pci->device == VIA_HDAC_DEVICE_ID) {
+ switch (fix) {
+ case POS_FIX_LPIB:
+ case POS_FIX_POSBUF:
+ return fix;
+ }
+
+ /* Check VIA/ATI HD Audio Controller exist */
+ switch (chip->driver_type) {
+ case AZX_DRIVER_VIA:
+ case AZX_DRIVER_ATI:
chip->via_dmapos_patch = 1;
/* Use link position directly, avoid any transfer problem. */
return POS_FIX_LPIB;
}
chip->via_dmapos_patch = 0;
- if (fix == POS_FIX_AUTO) {
- q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
- if (q) {
- printk(KERN_INFO
- "hda_intel: position_fix set to %d "
- "for device %04x:%04x\n",
- q->value, q->subvendor, q->subdevice);
- return q->value;
- }
+ q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
+ if (q) {
+ printk(KERN_INFO
+ "hda_intel: position_fix set to %d "
+ "for device %04x:%04x\n",
+ q->value, q->subvendor, q->subdevice);
+ return q->value;
}
- return fix;
+ return POS_FIX_AUTO;
}
/*
SND_PCI_QUIRK(0x1028, 0x20ac, "Dell Studio Desktop", 0x01),
/* including bogus ALC268 in slot#2 that conflicts with ALC888 */
SND_PCI_QUIRK(0x17c0, 0x4085, "Medion MD96630", 0x01),
- /* conflict of ALC268 in slot#3 (digital I/O); a temporary fix */
- SND_PCI_QUIRK(0x1179, 0xff00, "Toshiba laptop", 0x03),
+ /* forced codec slots */
+ SND_PCI_QUIRK(0x1046, 0x1262, "ASUS W5F", 0x103),
{}
};
+#define AZX_FORCE_CODEC_MASK 0x100
+
static void __devinit check_probe_mask(struct azx *chip, int dev)
{
const struct snd_pci_quirk *q;
- if (probe_mask[dev] == -1) {
+ chip->codec_probe_mask = probe_mask[dev];
+ if (chip->codec_probe_mask == -1) {
q = snd_pci_quirk_lookup(chip->pci, probe_mask_list);
if (q) {
printk(KERN_INFO
"hda_intel: probe_mask set to 0x%x "
"for device %04x:%04x\n",
q->value, q->subvendor, q->subdevice);
- probe_mask[dev] = q->value;
+ chip->codec_probe_mask = q->value;
}
}
+
+ /* check forced option */
+ if (chip->codec_probe_mask != -1 &&
+ (chip->codec_probe_mask & AZX_FORCE_CODEC_MASK)) {
+ chip->codec_mask = chip->codec_probe_mask & 0xff;
+ printk(KERN_INFO "hda_intel: codec_mask forced to 0x%x\n",
+ chip->codec_mask);
+ }
}
gcap = azx_readw(chip, GCAP);
snd_printdd("chipset global capabilities = 0x%x\n", gcap);
+ /* ATI chips seems buggy about 64bit DMA addresses */
+ if (chip->driver_type == AZX_DRIVER_ATI)
+ gcap &= ~0x01;
+
/* allow 64bit DMA address if supported by H/W */
if ((gcap & 0x01) && !pci_set_dma_mask(pci, DMA_64BIT_MASK))
pci_set_consistent_dma_mask(pci, DMA_64BIT_MASK);
+ else {
+ pci_set_dma_mask(pci, DMA_32BIT_MASK);
+ pci_set_consistent_dma_mask(pci, DMA_32BIT_MASK);
+ }
/* read number of streams from GCAP register instead of using
* hardcoded value
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (!card) {
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0) {
snd_printk(KERN_ERR SFX "Error creating card!\n");
- return -ENOMEM;
+ return err;
}
err = azx_create(card, pci, dev, pci_id->driver_data, &chip);
card->private_data = chip;
/* create codec instances */
- err = azx_codec_create(chip, model[dev], probe_mask[dev],
- probe_only[dev]);
+ err = azx_codec_create(chip, model[dev], probe_only[dev]);
if (err < 0)
goto out_free;
{ PCI_DEVICE(0x10de, 0x0ac1), .driver_data = AZX_DRIVER_NVIDIA },
{ PCI_DEVICE(0x10de, 0x0ac2), .driver_data = AZX_DRIVER_NVIDIA },
{ PCI_DEVICE(0x10de, 0x0ac3), .driver_data = AZX_DRIVER_NVIDIA },
- { PCI_DEVICE(0x10de, 0x0bd4), .driver_data = AZX_DRIVER_NVIDIA },
- { PCI_DEVICE(0x10de, 0x0bd5), .driver_data = AZX_DRIVER_NVIDIA },
- { PCI_DEVICE(0x10de, 0x0bd6), .driver_data = AZX_DRIVER_NVIDIA },
- { PCI_DEVICE(0x10de, 0x0bd7), .driver_data = AZX_DRIVER_NVIDIA },
+ { PCI_DEVICE(0x10de, 0x0d94), .driver_data = AZX_DRIVER_NVIDIA },
+ { PCI_DEVICE(0x10de, 0x0d95), .driver_data = AZX_DRIVER_NVIDIA },
+ { PCI_DEVICE(0x10de, 0x0d96), .driver_data = AZX_DRIVER_NVIDIA },
+ { PCI_DEVICE(0x10de, 0x0d97), .driver_data = AZX_DRIVER_NVIDIA },
/* Teradici */
{ PCI_DEVICE(0x6549, 0x1200), .driver_data = AZX_DRIVER_TERA },
/* AMD Generic, PCI class code and Vendor ID for HD Audio */
/*
* for mixer controls
*/
+#define HDA_COMPOSE_AMP_VAL_OFS(nid,chs,idx,dir,ofs) \
+ ((nid) | ((chs)<<16) | ((dir)<<18) | ((idx)<<19) | ((ofs)<<23))
#define HDA_COMPOSE_AMP_VAL(nid,chs,idx,dir) \
- ((nid) | ((chs)<<16) | ((dir)<<18) | ((idx)<<19))
+ HDA_COMPOSE_AMP_VAL_OFS(nid, chs, idx, dir, 0)
/* mono volume with index (index=0,1,...) (channel=1,2) */
#define HDA_CODEC_VOLUME_MONO_IDX(xname, xcidx, nid, channel, xindex, direction) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xcidx, \
const char *name);
int snd_hda_add_vmaster(struct hda_codec *codec, char *name,
unsigned int *tlv, const char **slaves);
-void snd_hda_codec_reset(struct hda_codec *codec);
+int snd_hda_codec_reset(struct hda_codec *codec);
int snd_hda_codec_configure(struct hda_codec *codec);
/* amp value bits */
struct hda_bind_ctls {
struct hda_ctl_ops *ops;
- long values[];
+ unsigned long values[];
};
int snd_hda_mixer_bind_ctls_info(struct snd_kcontrol *kcontrol,
hda_nid_t hp_nid; /* optional DAC for HP, 0 when not exists */
hda_nid_t extra_out_nid[3]; /* optional DACs, 0 when not exists */
hda_nid_t dig_out_nid; /* digital out audio widget */
+ hda_nid_t *slave_dig_outs;
int max_channels; /* currently supported analog channels */
int dig_out_used; /* current usage of digital out (HDA_DIG_XXX) */
int no_share_stream; /* don't share a stream with multiple pins */
int line_out_type; /* AUTO_PIN_XXX_OUT */
hda_nid_t hp_pins[AUTO_CFG_MAX_OUTS];
hda_nid_t input_pins[AUTO_PIN_LAST];
- hda_nid_t dig_out_pin;
+ int dig_outs;
+ hda_nid_t dig_out_pins[2];
hda_nid_t dig_in_pin;
hda_nid_t mono_out_pin;
+ int dig_out_type[2]; /* HDA_PCM_TYPE_XXX */
+ int dig_in_type; /* HDA_PCM_TYPE_XXX */
};
#define get_defcfg_connect(cfg) \
u32 query_amp_caps(struct hda_codec *codec, hda_nid_t nid, int direction);
int snd_hda_override_amp_caps(struct hda_codec *codec, hda_nid_t nid, int dir,
unsigned int caps);
+u32 snd_hda_query_pin_caps(struct hda_codec *codec, hda_nid_t nid);
int snd_hda_ctl_add(struct hda_codec *codec, struct snd_kcontrol *kctl);
void snd_hda_ctls_clear(struct hda_codec *codec);
}
#endif
+#ifdef CONFIG_SND_HDA_RECONFIG
+const char *snd_hda_get_hint(struct hda_codec *codec, const char *key);
+int snd_hda_get_bool_hint(struct hda_codec *codec, const char *key);
+#else
+static inline
+const char *snd_hda_get_hint(struct hda_codec *codec, const char *key)
+{
+ return NULL;
+}
+
+static inline
+int snd_hda_get_bool_hint(struct hda_codec *codec, const char *key)
+{
+ return -ENOENT;
+}
+#endif
+
/*
* power-management
*/
#define get_amp_channels(kc) (((kc)->private_value >> 16) & 0x3)
#define get_amp_direction(kc) (((kc)->private_value >> 18) & 0x1)
#define get_amp_index(kc) (((kc)->private_value >> 19) & 0xf)
+#define get_amp_offset(kc) (((kc)->private_value >> 23) & 0x3f)
/*
* CEA Short Audio Descriptor data
{
int c, curr = -1;
- if (conn_len > 1 && wid_type != AC_WID_AUD_MIX &&
- wid_type != AC_WID_VOL_KNB)
+ if (conn_len > 1 &&
+ wid_type != AC_WID_AUD_MIX &&
+ wid_type != AC_WID_VOL_KNB &&
+ wid_type != AC_WID_POWER)
curr = snd_hda_codec_read(codec, nid, 0,
AC_VERB_GET_CONNECT_SEL, 0);
snd_iprintf(buffer, " Connection: %d\n", conn_len);
snd_iprintf(buffer, "Codec: %s\n",
codec->name ? codec->name : "Not Set");
snd_iprintf(buffer, "Address: %d\n", codec->addr);
- snd_iprintf(buffer, "Vendor Id: 0x%x\n", codec->vendor_id);
- snd_iprintf(buffer, "Subsystem Id: 0x%x\n", codec->subsystem_id);
+ snd_iprintf(buffer, "Function Id: 0x%x\n", codec->function_id);
+ snd_iprintf(buffer, "Vendor Id: 0x%08x\n", codec->vendor_id);
+ snd_iprintf(buffer, "Subsystem Id: 0x%08x\n", codec->subsystem_id);
snd_iprintf(buffer, "Revision Id: 0x%x\n", codec->revision_id);
if (codec->mfg)
snd_iprintf(buffer, " Amp-Out caps: ");
print_amp_caps(buffer, codec, nid, HDA_OUTPUT);
snd_iprintf(buffer, " Amp-Out vals: ");
- print_amp_vals(buffer, codec, nid, HDA_OUTPUT,
- wid_caps & AC_WCAP_STEREO, 1);
+ if (wid_type == AC_WID_PIN &&
+ codec->pin_amp_workaround)
+ print_amp_vals(buffer, codec, nid, HDA_OUTPUT,
+ wid_caps & AC_WCAP_STEREO,
+ conn_len);
+ else
+ print_amp_vals(buffer, codec, nid, HDA_OUTPUT,
+ wid_caps & AC_WCAP_STEREO, 1);
}
switch (wid_type) {
#include <sound/core.h>
#include "hda_codec.h"
#include "hda_local.h"
+#include "hda_beep.h"
struct ad198x_spec {
struct snd_kcontrol_new *mixers[5];
int num_mixers;
-
+ unsigned int beep_amp; /* beep amp value, set via set_beep_amp() */
const struct hda_verb *init_verbs[5]; /* initialization verbs
* don't forget NULL termination!
*/
static void ad198x_free_kctls(struct hda_codec *codec);
+/* additional beep mixers; the actual parameters are overwritten at build */
+static struct snd_kcontrol_new ad_beep_mixer[] = {
+ HDA_CODEC_VOLUME("Beep Playback Volume", 0, 0, HDA_OUTPUT),
+ HDA_CODEC_MUTE("Beep Playback Switch", 0, 0, HDA_OUTPUT),
+ { } /* end */
+};
+
+#define set_beep_amp(spec, nid, idx, dir) \
+ ((spec)->beep_amp = HDA_COMPOSE_AMP_VAL(nid, 1, idx, dir)) /* mono */
+
static int ad198x_build_controls(struct hda_codec *codec)
{
struct ad198x_spec *spec = codec->spec;
return err;
}
+ /* create beep controls if needed */
+ if (spec->beep_amp) {
+ struct snd_kcontrol_new *knew;
+ for (knew = ad_beep_mixer; knew->name; knew++) {
+ struct snd_kcontrol *kctl;
+ kctl = snd_ctl_new1(knew, codec);
+ if (!kctl)
+ return -ENOMEM;
+ kctl->private_value = spec->beep_amp;
+ err = snd_hda_ctl_add(codec, kctl);
+ if (err < 0)
+ return err;
+ }
+ }
+
/* if we have no master control, let's create it */
if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
unsigned int vmaster_tlv[4];
return;
ad198x_free_kctls(codec);
- kfree(codec->spec);
+ kfree(spec);
+ snd_hda_detach_beep_device(codec);
}
static struct hda_codec_ops ad198x_patch_ops = {
HDA_CODEC_VOLUME("Mic Playback Volume", 0x13, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE("Mic Playback Switch", 0x13, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME("Mic Boost", 0x0f, 0x0, HDA_OUTPUT),
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x18, 0x0, HDA_OUTPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x18, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME("Mono Playback Volume", 0x1e, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE("Mono Playback Switch", 0x1e, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME("Capture Volume", 0x12, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME("Mic Playback Volume", 0x13, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE("Mic Playback Switch", 0x13, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME("Mic Boost", 0x0f, 0x0, HDA_OUTPUT),
- /* HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x18, 0x0, HDA_OUTPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x18, 0x0, HDA_OUTPUT),
+ /*
HDA_CODEC_VOLUME("Mono Playback Volume", 0x1e, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE("Mono Playback Switch", 0x1e, 0x0, HDA_OUTPUT), */
HDA_CODEC_VOLUME("Capture Volume", 0x12, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME("Mic Playback Volume", 0x13, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE("Mic Playback Switch", 0x13, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME("Mic Boost", 0x0f, 0x0, HDA_OUTPUT),
- HDA_CODEC_VOLUME("Beep Playback Volume", 0x18, 0x0, HDA_OUTPUT),
- HDA_CODEC_MUTE("Beep Playback Switch", 0x18, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME("Capture Volume", 0x12, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE("Capture Switch", 0x12, 0x0, HDA_OUTPUT),
{
SND_PCI_QUIRK(0x1179, 0xff40, "Toshiba", AD1986A_LAPTOP_EAPD),
SND_PCI_QUIRK(0x144d, 0xb03c, "Samsung R55", AD1986A_3STACK),
SND_PCI_QUIRK(0x144d, 0xc01e, "FSC V2060", AD1986A_LAPTOP),
- SND_PCI_QUIRK(0x144d, 0xc023, "Samsung X60", AD1986A_SAMSUNG),
- SND_PCI_QUIRK(0x144d, 0xc024, "Samsung R65", AD1986A_SAMSUNG),
- SND_PCI_QUIRK(0x144d, 0xc026, "Samsung X11", AD1986A_SAMSUNG),
SND_PCI_QUIRK(0x144d, 0xc027, "Samsung Q1", AD1986A_ULTRA),
+ SND_PCI_QUIRK_MASK(0x144d, 0xff00, 0xc000, "Samsung", AD1986A_SAMSUNG),
SND_PCI_QUIRK(0x144d, 0xc504, "Samsung Q35", AD1986A_3STACK),
SND_PCI_QUIRK(0x17aa, 0x1011, "Lenovo M55", AD1986A_LAPTOP),
SND_PCI_QUIRK(0x17aa, 0x1017, "Lenovo A60", AD1986A_3STACK),
static int is_jack_available(struct hda_codec *codec, hda_nid_t nid)
{
- unsigned int conf = snd_hda_codec_read(codec, nid, 0,
- AC_VERB_GET_CONFIG_DEFAULT, 0);
+ unsigned int conf = snd_hda_codec_get_pincfg(codec, nid);
return get_defcfg_connect(conf) != AC_JACK_PORT_NONE;
}
static int patch_ad1986a(struct hda_codec *codec)
{
struct ad198x_spec *spec;
- int board_config;
+ int err, board_config;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (spec == NULL)
codec->spec = spec;
+ err = snd_hda_attach_beep_device(codec, 0x19);
+ if (err < 0) {
+ ad198x_free(codec);
+ return err;
+ }
+ set_beep_amp(spec, 0x18, 0, HDA_OUTPUT);
+
spec->multiout.max_channels = 6;
spec->multiout.num_dacs = ARRAY_SIZE(ad1986a_dac_nids);
spec->multiout.dac_nids = ad1986a_dac_nids;
HDA_CODEC_MUTE("Mic Playback Switch", 0x12, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME("Line Playback Volume", 0x13, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE("Line Playback Switch", 0x13, 0x0, HDA_OUTPUT),
- HDA_CODEC_VOLUME_MONO("PC Speaker Playback Volume", 0x10, 1, 0x0, HDA_OUTPUT),
- HDA_CODEC_MUTE_MONO("PC Speaker Playback Switch", 0x10, 1, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME("Mic Boost", 0x0c, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME("Capture Volume", 0x15, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE("Capture Switch", 0x15, 0x0, HDA_OUTPUT),
static int patch_ad1983(struct hda_codec *codec)
{
struct ad198x_spec *spec;
+ int err;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (spec == NULL)
codec->spec = spec;
+ err = snd_hda_attach_beep_device(codec, 0x10);
+ if (err < 0) {
+ ad198x_free(codec);
+ return err;
+ }
+ set_beep_amp(spec, 0x10, 0, HDA_OUTPUT);
+
spec->multiout.max_channels = 2;
spec->multiout.num_dacs = ARRAY_SIZE(ad1983_dac_nids);
spec->multiout.dac_nids = ad1983_dac_nids;
HDA_CODEC_MUTE("Mic Playback Switch", 0x1c, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME("CD Playback Volume", 0x1d, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE("CD Playback Switch", 0x1d, 0x0, HDA_OUTPUT),
- HDA_CODEC_VOLUME_MONO("PC Speaker Playback Volume", 0x0d, 1, 0x0, HDA_OUTPUT),
- HDA_CODEC_MUTE_MONO("PC Speaker Playback Switch", 0x0d, 1, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME("Front Mic Boost", 0x08, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Mic Boost", 0x18, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Capture Volume", 0x15, 0x0, HDA_OUTPUT),
{0x1e, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
{0x1f, AC_VERB_SET_AMP_GAIN_MUTE, 0xb080},
/* Mic boost: 0dB */
- {0x08, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
- {0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
+ {0x08, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
+ {0x18, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
/* Record selector: Front mic */
{0x15, AC_VERB_SET_CONNECT_SEL, 0x0},
{0x15, AC_VERB_SET_AMP_GAIN_MUTE, 0xb080},
SND_PCI_QUIRK(0x1014, 0x0597, "Lenovo Z60", AD1981_THINKPAD),
SND_PCI_QUIRK(0x1014, 0x05b7, "Lenovo Z60m", AD1981_THINKPAD),
/* All HP models */
- SND_PCI_QUIRK(0x103c, 0, "HP nx", AD1981_HP),
+ SND_PCI_QUIRK_VENDOR(0x103c, "HP nx", AD1981_HP),
SND_PCI_QUIRK(0x1179, 0x0001, "Toshiba U205", AD1981_TOSHIBA),
/* Lenovo Thinkpad T60/X60/Z6xx */
- SND_PCI_QUIRK(0x17aa, 0, "Lenovo Thinkpad", AD1981_THINKPAD),
+ SND_PCI_QUIRK_VENDOR(0x17aa, "Lenovo Thinkpad", AD1981_THINKPAD),
/* HP nx6320 (reversed SSID, H/W bug) */
SND_PCI_QUIRK(0x30b0, 0x103c, "HP nx6320", AD1981_HP),
{}
static int patch_ad1981(struct hda_codec *codec)
{
struct ad198x_spec *spec;
- int board_config;
+ int err, board_config;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (spec == NULL)
codec->spec = spec;
+ err = snd_hda_attach_beep_device(codec, 0x10);
+ if (err < 0) {
+ ad198x_free(codec);
+ return err;
+ }
+ set_beep_amp(spec, 0x0d, 0, HDA_OUTPUT);
+
spec->multiout.max_channels = 2;
spec->multiout.num_dacs = ARRAY_SIZE(ad1981_dac_nids);
spec->multiout.dac_nids = ad1981_dac_nids;
HDA_CODEC_VOLUME("Mic Playback Volume", 0x20, 0x4, HDA_INPUT),
HDA_CODEC_MUTE("Mic Playback Switch", 0x20, 0x4, HDA_INPUT),
- HDA_CODEC_VOLUME("Beep Playback Volume", 0x10, 0x0, HDA_OUTPUT),
- HDA_CODEC_MUTE("Beep Playback Switch", 0x10, 0x0, HDA_OUTPUT),
-
HDA_CODEC_VOLUME("Analog Mix Playback Volume", 0x21, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE("Analog Mix Playback Switch", 0x21, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME("Mic Playback Volume", 0x20, 0x4, HDA_INPUT),
HDA_CODEC_MUTE("Mic Playback Switch", 0x20, 0x4, HDA_INPUT),
- HDA_CODEC_VOLUME("Beep Playback Volume", 0x10, 0x0, HDA_OUTPUT),
- HDA_CODEC_MUTE("Beep Playback Switch", 0x10, 0x0, HDA_OUTPUT),
-
HDA_CODEC_VOLUME("Analog Mix Playback Volume", 0x21, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE("Analog Mix Playback Switch", 0x21, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME("Line Playback Volume", 0x20, 0x1, HDA_INPUT),
HDA_CODEC_MUTE("Line Playback Switch", 0x20, 0x1, HDA_INPUT),
- HDA_CODEC_VOLUME("Beep Playback Volume", 0x10, 0x0, HDA_OUTPUT),
- HDA_CODEC_MUTE("Beep Playback Switch", 0x10, 0x0, HDA_OUTPUT),
-
HDA_CODEC_VOLUME("Analog Mix Playback Volume", 0x21, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE("Analog Mix Playback Switch", 0x21, 0x0, HDA_OUTPUT),
{0x0c, AC_VERB_SET_CONNECT_SEL, 0x1},
{0x0d, AC_VERB_SET_CONNECT_SEL, 0x1},
{0x0e, AC_VERB_SET_CONNECT_SEL, 0x1},
- /* ADCs; muted */
- {0x08, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
- {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
- {0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
{ }
};
{0x0c, AC_VERB_SET_CONNECT_SEL, 0x1},
{0x0d, AC_VERB_SET_CONNECT_SEL, 0x1},
{0x0e, AC_VERB_SET_CONNECT_SEL, 0x1},
- /* ADCs; muted */
- {0x08, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
- {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
- {0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
/* Analog Mix output amp */
{0x21, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE | 0x1f}, /* 0dB */
{ }
{0x0c, AC_VERB_SET_CONNECT_SEL, 0x1},
{0x0d, AC_VERB_SET_CONNECT_SEL, 0x1},
{0x0e, AC_VERB_SET_CONNECT_SEL, 0x1},
- /* ADCs; muted */
- {0x08, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
- {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
- {0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
/* Analog Mix output amp */
{0x21, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE | 0x1f}, /* 0dB */
{ }
spec->multiout.max_channels = spec->multiout.num_dacs * 2;
- if (spec->autocfg.dig_out_pin)
+ if (spec->autocfg.dig_outs)
spec->multiout.dig_out_nid = AD1988_SPDIF_OUT;
if (spec->autocfg.dig_in_pin)
spec->dig_in_nid = AD1988_SPDIF_IN;
static int patch_ad1988(struct hda_codec *codec)
{
struct ad198x_spec *spec;
- int board_config;
+ int err, board_config;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (spec == NULL)
if (board_config == AD1988_AUTO) {
/* automatic parse from the BIOS config */
- int err = ad1988_parse_auto_config(codec);
+ err = ad1988_parse_auto_config(codec);
if (err < 0) {
ad198x_free(codec);
return err;
}
}
+ err = snd_hda_attach_beep_device(codec, 0x10);
+ if (err < 0) {
+ ad198x_free(codec);
+ return err;
+ }
+ set_beep_amp(spec, 0x10, 0, HDA_OUTPUT);
+
switch (board_config) {
case AD1988_6STACK:
case AD1988_6STACK_DIG:
HDA_CODEC_MUTE("Mic Playback Switch", 0x20, 0x01, HDA_INPUT),
HDA_CODEC_VOLUME("CD Playback Volume", 0x20, 0x02, HDA_INPUT),
HDA_CODEC_MUTE("CD Playback Switch", 0x20, 0x02, HDA_INPUT),
- /*
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x20, 0x03, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x20, 0x03, HDA_INPUT),
- HDA_CODEC_VOLUME("Digital Beep Playback Volume", 0x10, 0x0, HDA_OUTPUT),
- HDA_CODEC_MUTE("Digital Beep Playback Switch", 0x10, 0x0, HDA_OUTPUT),
- */
HDA_CODEC_VOLUME("Mic Boost", 0x15, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Front Mic Boost", 0x14, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Capture Volume", 0x0c, 0x0, HDA_OUTPUT),
{0x0e, AC_VERB_SET_CONNECT_SEL, 0x1},
/* Port-B (front mic) pin */
{0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80},
- {0x14, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
+ {0x14, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
/* Port-C (rear mic) pin */
{0x15, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80},
- {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
+ {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
/* Analog mixer; mute as default */
{0x20, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
{0x20, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)},
"CD Playback Volume",
"Internal Mic Playback Volume",
"Docking Mic Playback Volume"
- "Beep Playback Volume",
+ /* "Beep Playback Volume", */
"IEC958 Playback Volume",
NULL
};
static int patch_ad1884(struct hda_codec *codec)
{
struct ad198x_spec *spec;
+ int err;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (spec == NULL)
codec->spec = spec;
+ err = snd_hda_attach_beep_device(codec, 0x10);
+ if (err < 0) {
+ ad198x_free(codec);
+ return err;
+ }
+ set_beep_amp(spec, 0x10, 0, HDA_OUTPUT);
+
spec->multiout.max_channels = 2;
spec->multiout.num_dacs = ARRAY_SIZE(ad1884_dac_nids);
spec->multiout.dac_nids = ad1884_dac_nids;
HDA_CODEC_VOLUME("Mic Boost", 0x14, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Internal Mic Boost", 0x15, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Docking Mic Boost", 0x25, 0x0, HDA_OUTPUT),
- HDA_CODEC_VOLUME("Beep Playback Volume", 0x20, 0x03, HDA_INPUT),
- HDA_CODEC_MUTE("Beep Playback Switch", 0x20, 0x03, HDA_INPUT),
HDA_CODEC_VOLUME("Capture Volume", 0x0c, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE("Capture Switch", 0x0c, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME_IDX("Capture Volume", 1, 0x0d, 0x0, HDA_OUTPUT),
{0x1c, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80},
{0x1c, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
/* docking mic boost */
- {0x25, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
+ {0x25, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO},
/* Analog mixer - docking mic; mute as default */
{0x20, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(4)},
/* enable EAPD bit */
HDA_CODEC_MUTE("Front Mic Playback Switch", 0x20, 0x00, HDA_INPUT),
HDA_CODEC_VOLUME("Line-In Playback Volume", 0x20, 0x01, HDA_INPUT),
HDA_CODEC_MUTE("Line-In Playback Switch", 0x20, 0x01, HDA_INPUT),
- /*
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x20, 0x03, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x20, 0x03, HDA_INPUT),
- */
HDA_CODEC_VOLUME("Line-In Boost", 0x15, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Front Mic Boost", 0x14, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Capture Volume", 0x0c, 0x0, HDA_OUTPUT),
static struct snd_pci_quirk ad1984_cfg_tbl[] = {
/* Lenovo Thinkpad T61/X61 */
- SND_PCI_QUIRK(0x17aa, 0, "Lenovo Thinkpad", AD1984_THINKPAD),
+ SND_PCI_QUIRK_VENDOR(0x17aa, "Lenovo Thinkpad", AD1984_THINKPAD),
SND_PCI_QUIRK(0x1028, 0x0214, "Dell T3400", AD1984_DELL_DESKTOP),
{}
};
HDA_CODEC_MUTE("Mic Playback Switch", 0x20, 0x04, HDA_INPUT),
HDA_CODEC_VOLUME("CD Playback Volume", 0x20, 0x02, HDA_INPUT),
HDA_CODEC_MUTE("CD Playback Switch", 0x20, 0x02, HDA_INPUT),
- HDA_CODEC_VOLUME("Beep Playback Volume", 0x20, 0x03, HDA_INPUT),
- HDA_CODEC_MUTE("Beep Playback Switch", 0x20, 0x03, HDA_INPUT),
HDA_CODEC_VOLUME("Front Mic Boost", 0x14, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Line Boost", 0x15, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Mic Boost", 0x25, 0x0, HDA_OUTPUT),
{0x13, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
/* Port-B (front mic) pin */
{0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80},
- {0x14, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
+ {0x14, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
/* Port-C (rear line-in) pin */
{0x15, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN},
- {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
+ {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
/* Port-E (rear mic) pin */
{0x1c, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80},
{0x1c, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
HDA_CODEC_MUTE("Internal Mic Playback Switch", 0x20, 0x01, HDA_INPUT),
HDA_CODEC_VOLUME("Dock Mic Playback Volume", 0x20, 0x04, HDA_INPUT),
HDA_CODEC_MUTE("Dock Mic Playback Switch", 0x20, 0x04, HDA_INPUT),
- HDA_CODEC_VOLUME("Beep Playback Volume", 0x20, 0x03, HDA_INPUT),
- HDA_CODEC_MUTE("Beep Playback Switch", 0x20, 0x03, HDA_INPUT),
HDA_CODEC_VOLUME("Mic Boost", 0x14, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Internal Mic Boost", 0x15, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Dock Mic Boost", 0x25, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE("Master Playback Switch", 0x21, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME("PCM Playback Volume", 0x20, 0x5, HDA_INPUT),
HDA_CODEC_MUTE("PCM Playback Switch", 0x20, 0x5, HDA_INPUT),
- HDA_CODEC_VOLUME("Beep Playback Volume", 0x20, 0x03, HDA_INPUT),
- HDA_CODEC_MUTE("Beep Playback Switch", 0x20, 0x03, HDA_INPUT),
HDA_CODEC_VOLUME("Mic Capture Volume", 0x14, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Internal Mic Capture Volume", 0x15, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Capture Volume", 0x0c, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE("PCM Playback Switch", 0x20, 0x5, HDA_INPUT),
HDA_CODEC_VOLUME("Mic Playback Volume", 0x20, 0x00, HDA_INPUT),
HDA_CODEC_MUTE("Mic Playback Switch", 0x20, 0x00, HDA_INPUT),
- HDA_CODEC_VOLUME("Beep Playback Volume", 0x20, 0x03, HDA_INPUT),
- HDA_CODEC_MUTE("Beep Playback Switch", 0x20, 0x03, HDA_INPUT),
HDA_CODEC_VOLUME("Mic Boost", 0x14, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Internal Mic Boost", 0x17, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Capture Volume", 0x0c, 0x0, HDA_OUTPUT),
SND_PCI_QUIRK(0x103c, 0x3030, "HP", AD1884A_MOBILE),
SND_PCI_QUIRK(0x103c, 0x3037, "HP 2230s", AD1884A_LAPTOP),
SND_PCI_QUIRK(0x103c, 0x3056, "HP", AD1884A_MOBILE),
- SND_PCI_QUIRK(0x103c, 0x30e6, "HP 6730b", AD1884A_LAPTOP),
- SND_PCI_QUIRK(0x103c, 0x30e7, "HP EliteBook 8530p", AD1884A_LAPTOP),
- SND_PCI_QUIRK(0x103c, 0x3614, "HP 6730s", AD1884A_LAPTOP),
+ SND_PCI_QUIRK_MASK(0x103c, 0xfff0, 0x3070, "HP", AD1884A_MOBILE),
+ SND_PCI_QUIRK_MASK(0x103c, 0xfff0, 0x30e0, "HP laptop", AD1884A_LAPTOP),
+ SND_PCI_QUIRK_MASK(0x103c, 0xff00, 0x3600, "HP laptop", AD1884A_LAPTOP),
SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X300", AD1884A_THINKPAD),
{}
};
static int patch_ad1884a(struct hda_codec *codec)
{
struct ad198x_spec *spec;
- int board_config;
+ int err, board_config;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (spec == NULL)
codec->spec = spec;
+ err = snd_hda_attach_beep_device(codec, 0x10);
+ if (err < 0) {
+ ad198x_free(codec);
+ return err;
+ }
+ set_beep_amp(spec, 0x10, 0, HDA_OUTPUT);
+
spec->multiout.max_channels = 2;
spec->multiout.num_dacs = ARRAY_SIZE(ad1884a_dac_nids);
spec->multiout.dac_nids = ad1884a_dac_nids;
spec->multiout.dig_out_nid = 0;
codec->patch_ops.unsol_event = ad1884a_hp_unsol_event;
codec->patch_ops.init = ad1884a_hp_init;
+ /* set the upper-limit for mixer amp to 0dB for avoiding the
+ * possible damage by overloading
+ */
+ snd_hda_override_amp_caps(codec, 0x20, HDA_INPUT,
+ (0x17 << AC_AMPCAP_OFFSET_SHIFT) |
+ (0x17 << AC_AMPCAP_NUM_STEPS_SHIFT) |
+ (0x05 << AC_AMPCAP_STEP_SIZE_SHIFT) |
+ (1 << AC_AMPCAP_MUTE_SHIFT));
break;
case AD1884A_THINKPAD:
spec->mixers[0] = ad1984a_thinkpad_mixers;
HDA_CODEC_MUTE("Line Playback Switch", 0x20, 0x04, HDA_INPUT),
HDA_CODEC_VOLUME("CD Playback Volume", 0x20, 0x06, HDA_INPUT),
HDA_CODEC_MUTE("CD Playback Switch", 0x20, 0x06, HDA_INPUT),
- HDA_CODEC_VOLUME("Beep Playback Volume", 0x20, 0x07, HDA_INPUT),
- HDA_CODEC_MUTE("Beep Playback Switch", 0x20, 0x07, HDA_INPUT),
{ } /* end */
};
HDA_CODEC_MUTE("Line Playback Switch", 0x20, 0x01, HDA_INPUT),
HDA_CODEC_VOLUME("CD Playback Volume", 0x20, 0x06, HDA_INPUT),
HDA_CODEC_MUTE("CD Playback Switch", 0x20, 0x06, HDA_INPUT),
- HDA_CODEC_VOLUME("Beep Playback Volume", 0x20, 0x07, HDA_INPUT),
- HDA_CODEC_MUTE("Beep Playback Switch", 0x20, 0x07, HDA_INPUT),
HDA_CODEC_VOLUME("Digital Mic Boost", 0x1f, 0x0, HDA_INPUT),
{ } /* end */
};
static int patch_ad1882(struct hda_codec *codec)
{
struct ad198x_spec *spec;
- int board_config;
+ int err, board_config;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (spec == NULL)
codec->spec = spec;
+ err = snd_hda_attach_beep_device(codec, 0x10);
+ if (err < 0) {
+ ad198x_free(codec);
+ return err;
+ }
+ set_beep_amp(spec, 0x10, 0, HDA_OUTPUT);
+
spec->multiout.max_channels = 6;
spec->multiout.num_dacs = 3;
spec->multiout.dac_nids = ad1882_dac_nids;
struct auto_pin_cfg cfg;
/* collect pin default configuration */
- port_e = snd_hda_codec_read(codec, 0x0f, 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
- port_f = snd_hda_codec_read(codec, 0x10, 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
+ port_e = snd_hda_codec_get_pincfg(codec, 0x0f);
+ port_f = snd_hda_codec_get_pincfg(codec, 0x10);
spec->front_panel = 1;
if (get_defcfg_connect(port_e) == AC_JACK_PORT_NONE ||
get_defcfg_connect(port_f) == AC_JACK_PORT_NONE) {
- port_g = snd_hda_codec_read(codec, 0x1f, 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
- port_h = snd_hda_codec_read(codec, 0x20, 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
+ port_g = snd_hda_codec_get_pincfg(codec, 0x1f);
+ port_h = snd_hda_codec_get_pincfg(codec, 0x20);
spec->channel_modes = cmi9880_channel_modes;
/* no front panel */
if (get_defcfg_connect(port_g) == AC_JACK_PORT_NONE ||
spec->multiout.max_channels = cmi9880_channel_modes[0].channels;
} else {
spec->input_mux = &cmi9880_basic_mux;
- port_spdifi = snd_hda_codec_read(codec, 0x13, 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
- port_spdifo = snd_hda_codec_read(codec, 0x12, 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
+ port_spdifi = snd_hda_codec_get_pincfg(codec, 0x13);
+ port_spdifo = snd_hda_codec_get_pincfg(codec, 0x12);
if (get_defcfg_connect(port_spdifo) != AC_JACK_PORT_NONE)
spec->multiout.dig_out_nid = CMI_DIG_OUT_NID;
if (get_defcfg_connect(port_spdifi) != AC_JACK_PORT_NONE)
struct snd_kcontrol_new *mixers[5];
int num_mixers;
+ hda_nid_t vmaster_nid;
const struct hda_verb *init_verbs[5]; /* initialization verbs
* don't forget NULL
*/
unsigned int cur_eapd;
unsigned int hp_present;
+ unsigned int no_auto_mic;
unsigned int need_dac_fix;
/* capture */
kfree(codec->spec);
}
+static struct snd_kcontrol_new cxt_capture_mixers[] = {
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "Capture Source",
+ .info = conexant_mux_enum_info,
+ .get = conexant_mux_enum_get,
+ .put = conexant_mux_enum_put
+ },
+ {}
+};
+
+static const char *slave_vols[] = {
+ "Headphone Playback Volume",
+ "Speaker Playback Volume",
+ NULL
+};
+
+static const char *slave_sws[] = {
+ "Headphone Playback Switch",
+ "Speaker Playback Switch",
+ NULL
+};
+
static int conexant_build_controls(struct hda_codec *codec)
{
struct conexant_spec *spec = codec->spec;
if (err < 0)
return err;
}
+
+ /* if we have no master control, let's create it */
+ if (spec->vmaster_nid &&
+ !snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
+ unsigned int vmaster_tlv[4];
+ snd_hda_set_vmaster_tlv(codec, spec->vmaster_nid,
+ HDA_OUTPUT, vmaster_tlv);
+ err = snd_hda_add_vmaster(codec, "Master Playback Volume",
+ vmaster_tlv, slave_vols);
+ if (err < 0)
+ return err;
+ }
+ if (spec->vmaster_nid &&
+ !snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
+ err = snd_hda_add_vmaster(codec, "Master Playback Switch",
+ NULL, slave_sws);
+ if (err < 0)
+ return err;
+ }
+
+ if (spec->input_mux) {
+ err = snd_hda_add_new_ctls(codec, cxt_capture_mixers);
+ if (err < 0)
+ return err;
+ }
+
return 0;
}
}
static struct snd_kcontrol_new cxt5045_mixers[] = {
- {
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
- .name = "Capture Source",
- .info = conexant_mux_enum_info,
- .get = conexant_mux_enum_get,
- .put = conexant_mux_enum_put
- },
HDA_CODEC_VOLUME("Int Mic Capture Volume", 0x1a, 0x01, HDA_INPUT),
HDA_CODEC_MUTE("Int Mic Capture Switch", 0x1a, 0x01, HDA_INPUT),
HDA_CODEC_VOLUME("Ext Mic Capture Volume", 0x1a, 0x02, HDA_INPUT),
};
static struct snd_kcontrol_new cxt5045_mixers_hp530[] = {
- {
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
- .name = "Capture Source",
- .info = conexant_mux_enum_info,
- .get = conexant_mux_enum_get,
- .put = conexant_mux_enum_put
- },
HDA_CODEC_VOLUME("Int Mic Capture Volume", 0x1a, 0x02, HDA_INPUT),
HDA_CODEC_MUTE("Int Mic Capture Switch", 0x1a, 0x02, HDA_INPUT),
HDA_CODEC_VOLUME("Ext Mic Capture Volume", 0x1a, 0x01, HDA_INPUT),
};
static struct snd_pci_quirk cxt5045_cfg_tbl[] = {
- SND_PCI_QUIRK(0x103c, 0x30a5, "HP", CXT5045_LAPTOP_HPSENSE),
- SND_PCI_QUIRK(0x103c, 0x30b2, "HP DV Series", CXT5045_LAPTOP_HPSENSE),
- SND_PCI_QUIRK(0x103c, 0x30b5, "HP DV2120", CXT5045_LAPTOP_HPSENSE),
- SND_PCI_QUIRK(0x103c, 0x30b7, "HP DV6000Z", CXT5045_LAPTOP_HPSENSE),
- SND_PCI_QUIRK(0x103c, 0x30bb, "HP DV8000", CXT5045_LAPTOP_HPSENSE),
- SND_PCI_QUIRK(0x103c, 0x30cd, "HP DV Series", CXT5045_LAPTOP_HPSENSE),
- SND_PCI_QUIRK(0x103c, 0x30cf, "HP DV9533EG", CXT5045_LAPTOP_HPSENSE),
SND_PCI_QUIRK(0x103c, 0x30d5, "HP 530", CXT5045_LAPTOP_HP530),
- SND_PCI_QUIRK(0x103c, 0x30d9, "HP Spartan", CXT5045_LAPTOP_HPSENSE),
+ SND_PCI_QUIRK_MASK(0x103c, 0xff00, 0x3000, "HP DV Series",
+ CXT5045_LAPTOP_HPSENSE),
SND_PCI_QUIRK(0x1179, 0xff31, "Toshiba P105", CXT5045_LAPTOP_MICSENSE),
SND_PCI_QUIRK(0x152d, 0x0753, "Benq R55E", CXT5045_BENQ),
SND_PCI_QUIRK(0x1734, 0x10ad, "Fujitsu Si1520", CXT5045_LAPTOP_MICSENSE),
SND_PCI_QUIRK(0x1509, 0x1e40, "FIC", CXT5045_LAPTOP_HPMICSENSE),
SND_PCI_QUIRK(0x1509, 0x2f05, "FIC", CXT5045_LAPTOP_HPMICSENSE),
SND_PCI_QUIRK(0x1509, 0x2f06, "FIC", CXT5045_LAPTOP_HPMICSENSE),
- SND_PCI_QUIRK(0x1631, 0xc106, "Packard Bell", CXT5045_LAPTOP_HPMICSENSE),
- SND_PCI_QUIRK(0x1631, 0xc107, "Packard Bell", CXT5045_LAPTOP_HPMICSENSE),
+ SND_PCI_QUIRK_MASK(0x1631, 0xff00, 0xc100, "Packard Bell",
+ CXT5045_LAPTOP_HPMICSENSE),
SND_PCI_QUIRK(0x8086, 0x2111, "Conexant Reference board", CXT5045_LAPTOP_HPSENSE),
{}
};
if (!spec)
return -ENOMEM;
codec->spec = spec;
+ codec->pin_amp_workaround = 1;
spec->multiout.max_channels = 2;
spec->multiout.num_dacs = ARRAY_SIZE(cxt5045_dac_nids);
/* Conexant 5047 specific */
#define CXT5047_SPDIF_OUT 0x11
-static hda_nid_t cxt5047_dac_nids[2] = { 0x10, 0x1c };
+static hda_nid_t cxt5047_dac_nids[1] = { 0x10 }; /* 0x1c */
static hda_nid_t cxt5047_adc_nids[1] = { 0x12 };
static hda_nid_t cxt5047_capsrc_nids[1] = { 0x1a };
{ 2, NULL },
};
-static struct hda_input_mux cxt5047_capture_source = {
- .num_items = 1,
- .items = {
- { "Mic", 0x2 },
- }
-};
-
-static struct hda_input_mux cxt5047_hp_capture_source = {
- .num_items = 1,
- .items = {
- { "ExtMic", 0x2 },
- }
-};
-
static struct hda_input_mux cxt5047_toshiba_capture_source = {
.num_items = 2,
.items = {
* the headphone jack
*/
bits = (!spec->hp_present && spec->cur_eapd) ? 0 : HDA_AMP_MUTE;
- snd_hda_codec_amp_stereo(codec, 0x1d, HDA_OUTPUT, 0,
+ /* NOTE: Conexat codec needs the index for *OUTPUT* amp of
+ * pin widgets unlike other codecs. In this case, we need to
+ * set index 0x01 for the volume from the mixer amp 0x19.
+ */
+ snd_hda_codec_amp_stereo(codec, 0x1d, HDA_OUTPUT, 0x01,
HDA_AMP_MUTE, bits);
bits = spec->cur_eapd ? 0 : HDA_AMP_MUTE;
snd_hda_codec_amp_stereo(codec, 0x13, HDA_OUTPUT, 0,
return 1;
}
-/* bind volumes of both NID 0x13 (Headphones) and 0x1d (Speakers) */
-static struct hda_bind_ctls cxt5047_bind_master_vol = {
- .ops = &snd_hda_bind_vol,
- .values = {
- HDA_COMPOSE_AMP_VAL(0x13, 3, 0, HDA_OUTPUT),
- HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
- 0
- },
-};
-
/* mute internal speaker if HP is plugged */
static void cxt5047_hp_automute(struct hda_codec *codec)
{
AC_VERB_GET_PIN_SENSE, 0) & 0x80000000;
bits = (spec->hp_present || !spec->cur_eapd) ? HDA_AMP_MUTE : 0;
- snd_hda_codec_amp_stereo(codec, 0x1d, HDA_OUTPUT, 0,
- HDA_AMP_MUTE, bits);
- /* Mute/Unmute PCM 2 for good measure - some systems need this */
- snd_hda_codec_amp_stereo(codec, 0x1c, HDA_OUTPUT, 0,
- HDA_AMP_MUTE, bits);
-}
-
-/* mute internal speaker if HP is plugged */
-static void cxt5047_hp2_automute(struct hda_codec *codec)
-{
- struct conexant_spec *spec = codec->spec;
- unsigned int bits;
-
- spec->hp_present = snd_hda_codec_read(codec, 0x13, 0,
- AC_VERB_GET_PIN_SENSE, 0) & 0x80000000;
-
- bits = spec->hp_present ? HDA_AMP_MUTE : 0;
- snd_hda_codec_amp_stereo(codec, 0x1d, HDA_OUTPUT, 0,
- HDA_AMP_MUTE, bits);
- /* Mute/Unmute PCM 2 for good measure - some systems need this */
- snd_hda_codec_amp_stereo(codec, 0x1c, HDA_OUTPUT, 0,
+ /* See the note in cxt5047_hp_master_sw_put */
+ snd_hda_codec_amp_stereo(codec, 0x1d, HDA_OUTPUT, 0x01,
HDA_AMP_MUTE, bits);
}
}
}
-/* unsolicited event for HP jack sensing - non-EAPD systems */
-static void cxt5047_hp2_unsol_event(struct hda_codec *codec,
- unsigned int res)
-{
- res >>= 26;
- switch (res) {
- case CONEXANT_HP_EVENT:
- cxt5047_hp2_automute(codec);
- break;
- case CONEXANT_MIC_EVENT:
- cxt5047_hp_automic(codec);
- break;
- }
-}
-
-static struct snd_kcontrol_new cxt5047_mixers[] = {
- HDA_CODEC_VOLUME("Mic Bypass Capture Volume", 0x19, 0x02, HDA_INPUT),
- HDA_CODEC_MUTE("Mic Bypass Capture Switch", 0x19, 0x02, HDA_INPUT),
- HDA_CODEC_VOLUME("Mic Gain Volume", 0x1a, 0x0, HDA_OUTPUT),
- HDA_CODEC_MUTE("Mic Gain Switch", 0x1a, 0x0, HDA_OUTPUT),
+static struct snd_kcontrol_new cxt5047_base_mixers[] = {
+ HDA_CODEC_VOLUME("Mic Playback Volume", 0x19, 0x02, HDA_INPUT),
+ HDA_CODEC_MUTE("Mic Playback Switch", 0x19, 0x02, HDA_INPUT),
+ HDA_CODEC_VOLUME("Mic Boost", 0x1a, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME("Capture Volume", 0x12, 0x03, HDA_INPUT),
HDA_CODEC_MUTE("Capture Switch", 0x12, 0x03, HDA_INPUT),
HDA_CODEC_VOLUME("PCM Volume", 0x10, 0x00, HDA_OUTPUT),
HDA_CODEC_MUTE("PCM Switch", 0x10, 0x00, HDA_OUTPUT),
- HDA_CODEC_VOLUME("PCM-2 Volume", 0x1c, 0x00, HDA_OUTPUT),
- HDA_CODEC_MUTE("PCM-2 Switch", 0x1c, 0x00, HDA_OUTPUT),
- HDA_CODEC_VOLUME("Speaker Playback Volume", 0x1d, 0x00, HDA_OUTPUT),
- HDA_CODEC_MUTE("Speaker Playback Switch", 0x1d, 0x00, HDA_OUTPUT),
- HDA_CODEC_VOLUME("Headphone Playback Volume", 0x13, 0x00, HDA_OUTPUT),
- HDA_CODEC_MUTE("Headphone Playback Switch", 0x13, 0x00, HDA_OUTPUT),
-
- {}
-};
-
-static struct snd_kcontrol_new cxt5047_toshiba_mixers[] = {
- {
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
- .name = "Capture Source",
- .info = conexant_mux_enum_info,
- .get = conexant_mux_enum_get,
- .put = conexant_mux_enum_put
- },
- HDA_CODEC_VOLUME("Mic Bypass Capture Volume", 0x19, 0x02, HDA_INPUT),
- HDA_CODEC_MUTE("Mic Bypass Capture Switch", 0x19, 0x02, HDA_INPUT),
- HDA_CODEC_VOLUME("Capture Volume", 0x12, 0x03, HDA_INPUT),
- HDA_CODEC_MUTE("Capture Switch", 0x12, 0x03, HDA_INPUT),
- HDA_CODEC_VOLUME("PCM Volume", 0x10, 0x00, HDA_OUTPUT),
- HDA_CODEC_MUTE("PCM Switch", 0x10, 0x00, HDA_OUTPUT),
- HDA_BIND_VOL("Master Playback Volume", &cxt5047_bind_master_vol),
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Master Playback Switch",
{}
};
-static struct snd_kcontrol_new cxt5047_hp_mixers[] = {
- {
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
- .name = "Capture Source",
- .info = conexant_mux_enum_info,
- .get = conexant_mux_enum_get,
- .put = conexant_mux_enum_put
- },
- HDA_CODEC_VOLUME("Mic Bypass Capture Volume", 0x19, 0x02, HDA_INPUT),
- HDA_CODEC_MUTE("Mic Bypass Capture Switch", 0x19,0x02,HDA_INPUT),
- HDA_CODEC_VOLUME("Capture Volume", 0x12, 0x03, HDA_INPUT),
- HDA_CODEC_MUTE("Capture Switch", 0x12, 0x03, HDA_INPUT),
- HDA_CODEC_VOLUME("PCM Volume", 0x10, 0x00, HDA_OUTPUT),
- HDA_CODEC_MUTE("PCM Switch", 0x10, 0x00, HDA_OUTPUT),
+static struct snd_kcontrol_new cxt5047_hp_spk_mixers[] = {
+ /* See the note in cxt5047_hp_master_sw_put */
+ HDA_CODEC_VOLUME("Speaker Playback Volume", 0x1d, 0x01, HDA_OUTPUT),
+ HDA_CODEC_VOLUME("Headphone Playback Volume", 0x13, 0x00, HDA_OUTPUT),
+ {}
+};
+
+static struct snd_kcontrol_new cxt5047_hp_only_mixers[] = {
HDA_CODEC_VOLUME("Master Playback Volume", 0x13, 0x00, HDA_OUTPUT),
- {
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
- .name = "Master Playback Switch",
- .info = cxt_eapd_info,
- .get = cxt_eapd_get,
- .put = cxt5047_hp_master_sw_put,
- .private_value = 0x13,
- },
{ } /* end */
};
{0x17, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN|AC_PINCTL_VREF_50 },
/* HP, Speaker */
{0x13, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP },
- {0x13, AC_VERB_SET_CONNECT_SEL,0x1},
- {0x1d, AC_VERB_SET_CONNECT_SEL,0x0},
+ {0x13, AC_VERB_SET_CONNECT_SEL, 0x0}, /* mixer(0x19) */
+ {0x1d, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mixer(0x19) */
/* Record selector: Mic */
{0x12, AC_VERB_SET_CONNECT_SEL,0x03},
{0x19, AC_VERB_SET_AMP_GAIN_MUTE,
/* configuration for Toshiba Laptops */
static struct hda_verb cxt5047_toshiba_init_verbs[] = {
- {0x13, AC_VERB_SET_EAPD_BTLENABLE, 0x0 }, /* default on */
- /* pin sensing on HP and Mic jacks */
- {0x13, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | CONEXANT_HP_EVENT},
- {0x15, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | CONEXANT_MIC_EVENT},
- /* Speaker routing */
- {0x1d, AC_VERB_SET_CONNECT_SEL,0x1},
- {}
-};
-
-/* configuration for HP Laptops */
-static struct hda_verb cxt5047_hp_init_verbs[] = {
- /* pin sensing on HP jack */
- {0x13, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | CONEXANT_HP_EVENT},
- /* 0x13 is actually shared by both HP and speaker;
- * setting the connection to 0 (=0x19) makes the master volume control
- * working mysteriouslly...
- */
- {0x13, AC_VERB_SET_CONNECT_SEL, 0x0},
- /* Record selector: Ext Mic */
- {0x12, AC_VERB_SET_CONNECT_SEL,0x03},
- {0x19, AC_VERB_SET_AMP_GAIN_MUTE,
- AC_AMP_SET_INPUT|AC_AMP_SET_RIGHT|AC_AMP_SET_LEFT|0x17},
- /* Speaker routing */
- {0x1d, AC_VERB_SET_CONNECT_SEL,0x1},
+ {0x13, AC_VERB_SET_EAPD_BTLENABLE, 0x0}, /* default off */
{}
};
};
static struct snd_pci_quirk cxt5047_cfg_tbl[] = {
- SND_PCI_QUIRK(0x103c, 0x30a0, "HP DV1000", CXT5047_LAPTOP),
SND_PCI_QUIRK(0x103c, 0x30a5, "HP DV5200T/DV8000T", CXT5047_LAPTOP_HP),
- SND_PCI_QUIRK(0x103c, 0x30b2, "HP DV2000T/DV3000T", CXT5047_LAPTOP),
- SND_PCI_QUIRK(0x103c, 0x30b5, "HP DV2000Z", CXT5047_LAPTOP),
- SND_PCI_QUIRK(0x103c, 0x30cf, "HP DV6700", CXT5047_LAPTOP),
+ SND_PCI_QUIRK_MASK(0x103c, 0xff00, 0x3000, "HP DV Series",
+ CXT5047_LAPTOP),
SND_PCI_QUIRK(0x1179, 0xff31, "Toshiba P100", CXT5047_LAPTOP_EAPD),
{}
};
if (!spec)
return -ENOMEM;
codec->spec = spec;
+ codec->pin_amp_workaround = 1;
spec->multiout.max_channels = 2;
spec->multiout.num_dacs = ARRAY_SIZE(cxt5047_dac_nids);
spec->num_adc_nids = 1;
spec->adc_nids = cxt5047_adc_nids;
spec->capsrc_nids = cxt5047_capsrc_nids;
- spec->input_mux = &cxt5047_capture_source;
spec->num_mixers = 1;
- spec->mixers[0] = cxt5047_mixers;
+ spec->mixers[0] = cxt5047_base_mixers;
spec->num_init_verbs = 1;
spec->init_verbs[0] = cxt5047_init_verbs;
spec->spdif_route = 0;
cxt5047_cfg_tbl);
switch (board_config) {
case CXT5047_LAPTOP:
- codec->patch_ops.unsol_event = cxt5047_hp2_unsol_event;
+ spec->num_mixers = 2;
+ spec->mixers[1] = cxt5047_hp_spk_mixers;
+ codec->patch_ops.unsol_event = cxt5047_hp_unsol_event;
break;
case CXT5047_LAPTOP_HP:
- spec->input_mux = &cxt5047_hp_capture_source;
- spec->num_init_verbs = 2;
- spec->init_verbs[1] = cxt5047_hp_init_verbs;
- spec->mixers[0] = cxt5047_hp_mixers;
+ spec->num_mixers = 2;
+ spec->mixers[1] = cxt5047_hp_only_mixers;
codec->patch_ops.unsol_event = cxt5047_hp_unsol_event;
codec->patch_ops.init = cxt5047_hp_init;
break;
case CXT5047_LAPTOP_EAPD:
spec->input_mux = &cxt5047_toshiba_capture_source;
+ spec->num_mixers = 2;
+ spec->mixers[1] = cxt5047_hp_spk_mixers;
spec->num_init_verbs = 2;
spec->init_verbs[1] = cxt5047_toshiba_init_verbs;
- spec->mixers[0] = cxt5047_toshiba_mixers;
codec->patch_ops.unsol_event = cxt5047_hp_unsol_event;
break;
#ifdef CONFIG_SND_DEBUG
codec->patch_ops.unsol_event = cxt5047_hp_unsol_event;
#endif
}
+ spec->vmaster_nid = 0x13;
return 0;
}
/* toggle input of built-in and mic jack appropriately */
static void cxt5051_portb_automic(struct hda_codec *codec)
{
+ struct conexant_spec *spec = codec->spec;
unsigned int present;
+ if (spec->no_auto_mic)
+ return;
present = snd_hda_codec_read(codec, 0x17, 0,
AC_VERB_GET_PIN_SENSE, 0) &
AC_PINSENSE_PRESENCE;
unsigned int present;
hda_nid_t new_adc;
+ if (spec->no_auto_mic)
+ return;
present = snd_hda_codec_read(codec, 0x18, 0,
AC_VERB_GET_PIN_SENSE, 0) &
AC_PINSENSE_PRESENCE;
{}
};
+static struct snd_kcontrol_new cxt5051_hp_dv6736_mixers[] = {
+ HDA_CODEC_VOLUME("Mic Volume", 0x14, 0x00, HDA_INPUT),
+ HDA_CODEC_MUTE("Mic Switch", 0x14, 0x00, HDA_INPUT),
+ HDA_CODEC_VOLUME("Master Playback Volume", 0x10, 0x00, HDA_OUTPUT),
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "Master Playback Switch",
+ .info = cxt_eapd_info,
+ .get = cxt_eapd_get,
+ .put = cxt5051_hp_master_sw_put,
+ .private_value = 0x1a,
+ },
+
+ {}
+};
+
static struct hda_verb cxt5051_init_verbs[] = {
/* Line in, Mic */
{0x17, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0) | 0x03},
{ } /* end */
};
+static struct hda_verb cxt5051_hp_dv6736_init_verbs[] = {
+ /* Line in, Mic */
+ {0x17, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0) | 0x03},
+ {0x17, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80},
+ {0x18, AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0},
+ {0x1d, AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0},
+ /* SPK */
+ {0x1a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
+ {0x1a, AC_VERB_SET_CONNECT_SEL, 0x00},
+ /* HP, Amp */
+ {0x16, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP},
+ {0x16, AC_VERB_SET_CONNECT_SEL, 0x00},
+ /* DAC1 */
+ {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
+ /* Record selector: Int mic */
+ {0x14, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(1) | 0x44},
+ {0x14, AC_VERB_SET_CONNECT_SEL, 0x1},
+ /* SPDIF route: PCM */
+ {0x1c, AC_VERB_SET_CONNECT_SEL, 0x0},
+ /* EAPD */
+ {0x1a, AC_VERB_SET_EAPD_BTLENABLE, 0x2}, /* default on */
+ {0x16, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN|CONEXANT_HP_EVENT},
+ {0x17, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN|CXT5051_PORTB_EVENT},
+ { } /* end */
+};
+
+static struct hda_verb cxt5051_lenovo_x200_init_verbs[] = {
+ /* Line in, Mic */
+ {0x17, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0) | 0x03},
+ {0x17, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80},
+ {0x18, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0) | 0x03},
+ {0x18, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80},
+ {0x1d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN},
+ {0x1d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0) | 0x03},
+ /* SPK */
+ {0x1a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
+ {0x1a, AC_VERB_SET_CONNECT_SEL, 0x00},
+ /* HP, Amp */
+ {0x16, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP},
+ {0x16, AC_VERB_SET_CONNECT_SEL, 0x00},
+ /* Docking HP */
+ {0x19, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP},
+ {0x19, AC_VERB_SET_CONNECT_SEL, 0x00},
+ /* DAC1 */
+ {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
+ /* Record selector: Int mic */
+ {0x14, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0) | 0x44},
+ {0x14, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(1) | 0x44},
+ {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0) | 0x44},
+ /* SPDIF route: PCM */
+ {0x1c, AC_VERB_SET_CONNECT_SEL, 0x0},
+ /* EAPD */
+ {0x1a, AC_VERB_SET_EAPD_BTLENABLE, 0x2}, /* default on */
+ {0x16, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN|CONEXANT_HP_EVENT},
+ {0x17, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN|CXT5051_PORTB_EVENT},
+ {0x18, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN|CXT5051_PORTC_EVENT},
+ {0x19, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN|CONEXANT_HP_EVENT},
+ { } /* end */
+};
+
/* initialize jack-sensing, too */
static int cxt5051_init(struct hda_codec *codec)
{
enum {
CXT5051_LAPTOP, /* Laptops w/ EAPD support */
CXT5051_HP, /* no docking */
+ CXT5051_HP_DV6736, /* HP without mic switch */
+ CXT5051_LENOVO_X200, /* Lenovo X200 laptop */
CXT5051_MODELS
};
static const char *cxt5051_models[CXT5051_MODELS] = {
[CXT5051_LAPTOP] = "laptop",
[CXT5051_HP] = "hp",
+ [CXT5051_HP_DV6736] = "hp-dv6736",
+ [CXT5051_LENOVO_X200] = "lenovo-x200",
};
static struct snd_pci_quirk cxt5051_cfg_tbl[] = {
+ SND_PCI_QUIRK(0x103c, 0x30cf, "HP DV6736", CXT5051_HP_DV6736),
SND_PCI_QUIRK(0x14f1, 0x0101, "Conexant Reference board",
CXT5051_LAPTOP),
SND_PCI_QUIRK(0x14f1, 0x5051, "HP Spartan 1.1", CXT5051_HP),
+ SND_PCI_QUIRK(0x17aa, 0x20f2, "Lenovo X200", CXT5051_LENOVO_X200),
{}
};
if (!spec)
return -ENOMEM;
codec->spec = spec;
+ codec->pin_amp_workaround = 1;
codec->patch_ops = conexant_patch_ops;
codec->patch_ops.init = cxt5051_init;
spec->cur_adc = 0;
spec->cur_adc_idx = 0;
+ codec->patch_ops.unsol_event = cxt5051_hp_unsol_event;
+
board_config = snd_hda_check_board_config(codec, CXT5051_MODELS,
cxt5051_models,
cxt5051_cfg_tbl);
switch (board_config) {
case CXT5051_HP:
- codec->patch_ops.unsol_event = cxt5051_hp_unsol_event;
spec->mixers[0] = cxt5051_hp_mixers;
break;
- default:
- case CXT5051_LAPTOP:
- codec->patch_ops.unsol_event = cxt5051_hp_unsol_event;
+ case CXT5051_HP_DV6736:
+ spec->init_verbs[0] = cxt5051_hp_dv6736_init_verbs;
+ spec->mixers[0] = cxt5051_hp_dv6736_mixers;
+ spec->no_auto_mic = 1;
+ break;
+ case CXT5051_LENOVO_X200:
+ spec->init_verbs[0] = cxt5051_lenovo_x200_init_verbs;
break;
}
#include <sound/core.h>
#include "hda_codec.h"
#include "hda_local.h"
+#include "hda_beep.h"
#define ALC880_FRONT_EVENT 0x01
#define ALC880_DCVOL_EVENT 0x02
ALC260_ACER,
ALC260_WILL,
ALC260_REPLACER_672V,
+ ALC260_FAVORIT100,
#ifdef CONFIG_SND_DEBUG
ALC260_TEST,
#endif
ALC262_NEC,
ALC262_TOSHIBA_S06,
ALC262_TOSHIBA_RX1,
+ ALC262_TYAN,
ALC262_AUTO,
ALC262_MODEL_LAST /* last tag */
};
ALC883_MODEL_LAST,
};
+/* styles of capture selection */
+enum {
+ CAPT_MUX = 0, /* only mux based */
+ CAPT_MIX, /* only mixer based */
+ CAPT_1MUX_MIX, /* first mux and other mixers */
+};
+
/* for GPIO Poll */
#define GPIO_MASK 0x03
struct snd_kcontrol_new *mixers[5]; /* mixer arrays */
unsigned int num_mixers;
struct snd_kcontrol_new *cap_mixer; /* capture mixer */
+ unsigned int beep_amp; /* beep amp value, set via set_beep_amp() */
const struct hda_verb *init_verbs[5]; /* initialization verbs
* don't forget NULL
* dig_out_nid and hp_nid are optional
*/
hda_nid_t alt_dac_nid;
+ hda_nid_t slave_dig_outs[3]; /* optional - for auto-parsing */
+ int dig_out_type;
/* capture */
unsigned int num_adc_nids;
hda_nid_t *adc_nids;
hda_nid_t *capsrc_nids;
hda_nid_t dig_in_nid; /* digital-in NID; optional */
- unsigned char is_mix_capture; /* matrix-style capture (non-mux) */
+ int capture_style; /* capture style (CAPT_*) */
/* capture source */
unsigned int num_mux_defs;
/* dynamic controls, init_verbs and input_mux */
struct auto_pin_cfg autocfg;
struct snd_array kctls;
- struct hda_input_mux private_imux;
+ struct hda_input_mux private_imux[3];
hda_nid_t private_dac_nids[AUTO_CFG_MAX_OUTS];
/* hooks */
unsigned int jack_present: 1;
unsigned int master_sw: 1;
+ /* other flags */
+ unsigned int no_analog :1; /* digital I/O only */
+
/* for virtual master */
hda_nid_t vmaster_nid;
#ifdef CONFIG_SND_HDA_POWER_SAVE
/* for PLL fix */
hda_nid_t pll_nid;
unsigned int pll_coef_idx, pll_coef_bit;
-
-#ifdef SND_HDA_NEEDS_RESUME
-#define ALC_MAX_PINS 16
- unsigned int num_pins;
- hda_nid_t pin_nids[ALC_MAX_PINS];
- unsigned int pin_cfgs[ALC_MAX_PINS];
-#endif
};
/*
hda_nid_t *dac_nids;
hda_nid_t dig_out_nid; /* optional */
hda_nid_t hp_nid; /* optional */
+ hda_nid_t *slave_dig_outs;
unsigned int num_adc_nids;
hda_nid_t *adc_nids;
hda_nid_t *capsrc_nids;
mux_idx = adc_idx >= spec->num_mux_defs ? 0 : adc_idx;
imux = &spec->input_mux[mux_idx];
- if (spec->is_mix_capture) {
+ if (spec->capture_style &&
+ !(spec->capture_style == CAPT_1MUX_MIX && !adc_idx)) {
/* Matrix-mixer style (e.g. ALC882) */
unsigned int *cur_val = &spec->cur_mux[adc_idx];
unsigned int i, idx;
.private_value = nid | (mask<<16) }
#endif /* CONFIG_SND_DEBUG */
+/*
+ * set up the input pin config (depending on the given auto-pin type)
+ */
+static void alc_set_input_pin(struct hda_codec *codec, hda_nid_t nid,
+ int auto_pin_type)
+{
+ unsigned int val = PIN_IN;
+
+ if (auto_pin_type <= AUTO_PIN_FRONT_MIC) {
+ unsigned int pincap;
+ pincap = snd_hda_query_pin_caps(codec, nid);
+ pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
+ if (pincap & AC_PINCAP_VREF_80)
+ val = PIN_VREF80;
+ }
+ snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_PIN_WIDGET_CONTROL, val);
+}
+
/*
*/
static void add_mixer(struct alc_spec *spec, struct snd_kcontrol_new *mix)
spec->multiout.num_dacs = preset->num_dacs;
spec->multiout.dac_nids = preset->dac_nids;
spec->multiout.dig_out_nid = preset->dig_out_nid;
+ spec->multiout.slave_dig_outs = preset->slave_dig_outs;
spec->multiout.hp_nid = preset->hp_nid;
spec->num_mux_defs = preset->num_mux_defs;
HDA_AMP_MUTE, present ? HDA_AMP_MUTE : 0);
}
#else
-#define alc_mic_automute(codec) /* NOP */
+#define alc_mic_automute(codec) do {} while(0) /* NOP */
#endif /* disabled */
/* unsolicited event for HP jack sensing */
snd_hda_codec_write(codec, 0x20, 0, AC_VERB_SET_COEF_INDEX, 0);
tmp = snd_hda_codec_read(codec, 0x20, 0, AC_VERB_GET_PROC_COEF, 0);
snd_hda_codec_write(codec, 0x20, 0, AC_VERB_SET_COEF_INDEX, 7);
- if ((tmp & 0xf0) == 2)
+ if ((tmp & 0xf0) == 0x20)
/* alc888S-VC */
snd_hda_codec_read(codec, 0x20, 0,
AC_VERB_SET_PROC_COEF, 0x830);
nid = 0x1d;
if (codec->vendor_id == 0x10ec0260)
nid = 0x17;
- ass = snd_hda_codec_read(codec, nid, 0,
- AC_VERB_GET_CONFIG_DEFAULT, 0);
+ ass = snd_hda_codec_get_pincfg(codec, nid);
if (!(ass & 1) && !(ass & 0x100000))
return;
if ((ass >> 30) != 1) /* no physical connection */
return;
cfg = pinfix[quirk->value];
- for (; cfg->nid; cfg++) {
- int i;
- u32 val = cfg->val;
- for (i = 0; i < 4; i++) {
- snd_hda_codec_write(codec, cfg->nid, 0,
- AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 + i,
- val & 0xff);
- val >>= 8;
- }
- }
+ for (; cfg->nid; cfg++)
+ snd_hda_codec_set_pincfg(codec, cfg->nid, cfg->val);
}
/*
HDA_CODEC_VOLUME("Mic Playback Volume", 0x0b, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Mic Boost", 0x18, 0, HDA_INPUT),
HDA_CODEC_MUTE("Mic Playback Switch", 0x0b, 0x0, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x0b, 0x05, HDA_INPUT),
{ } /* end */
};
HDA_CODEC_MUTE("Mic Playback Switch", 0x0b, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Front Mic Playback Volume", 0x0b, 0x3, HDA_INPUT),
HDA_CODEC_MUTE("Front Mic Playback Switch", 0x0b, 0x3, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x0b, 0x05, HDA_INPUT),
HDA_CODEC_MUTE("Headphone Playback Switch", 0x19, 0x0, HDA_OUTPUT),
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
snd_hda_mixer_amp_switch_put);
}
-#define DEFINE_CAPMIX(num) \
-static struct snd_kcontrol_new alc_capture_mixer ## num[] = { \
+#define _DEFINE_CAPMIX(num) \
{ \
.iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
.name = "Capture Switch", \
.get = alc_cap_vol_get, \
.put = alc_cap_vol_put, \
.tlv = { .c = alc_cap_vol_tlv }, \
- }, \
+ }
+
+#define _DEFINE_CAPSRC(num) \
{ \
.iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
/* .name = "Capture Source", */ \
.info = alc_mux_enum_info, \
.get = alc_mux_enum_get, \
.put = alc_mux_enum_put, \
- }, \
- { } /* end */ \
+ }
+
+#define DEFINE_CAPMIX(num) \
+static struct snd_kcontrol_new alc_capture_mixer ## num[] = { \
+ _DEFINE_CAPMIX(num), \
+ _DEFINE_CAPSRC(num), \
+ { } /* end */ \
+}
+
+#define DEFINE_CAPMIX_NOSRC(num) \
+static struct snd_kcontrol_new alc_capture_mixer_nosrc ## num[] = { \
+ _DEFINE_CAPMIX(num), \
+ { } /* end */ \
}
/* up to three ADCs */
DEFINE_CAPMIX(1);
DEFINE_CAPMIX(2);
DEFINE_CAPMIX(3);
-
+DEFINE_CAPMIX_NOSRC(1);
+DEFINE_CAPMIX_NOSRC(2);
+DEFINE_CAPMIX_NOSRC(3);
/*
* ALC880 5-stack model
HDA_CODEC_MUTE("Mic Playback Switch", 0x0b, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Front Mic Playback Volume", 0x0b, 0x1, HDA_INPUT),
HDA_CODEC_MUTE("Front Mic Playback Switch", 0x0b, 0x1, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x0b, 0x05, HDA_INPUT),
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Channel Mode",
{ } /* end */
};
-/* additional mixers to alc880_asus_mixer */
-static struct snd_kcontrol_new alc880_pcbeep_mixer[] = {
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x0b, 0x05, HDA_INPUT),
- { } /* end */
-};
-
/* TCL S700 */
static struct snd_kcontrol_new alc880_tcl_s700_mixer[] = {
HDA_CODEC_VOLUME("Front Playback Volume", 0x0c, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE("Mic Playback Switch", 0x0b, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Front Mic Playback Volume", 0x0b, 0x1, HDA_INPUT),
HDA_CODEC_MUTE("Front Mic Playback Switch", 0x0b, 0x1, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x0b, 0x05, HDA_INPUT),
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Channel Mode",
static void alc_free_kctls(struct hda_codec *codec);
+/* additional beep mixers; the actual parameters are overwritten at build */
+static struct snd_kcontrol_new alc_beep_mixer[] = {
+ HDA_CODEC_VOLUME("Beep Playback Volume", 0, 0, HDA_INPUT),
+ HDA_CODEC_MUTE("Beep Playback Switch", 0, 0, HDA_INPUT),
+ { } /* end */
+};
+
static int alc_build_controls(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
spec->multiout.dig_out_nid);
if (err < 0)
return err;
- err = snd_hda_create_spdif_share_sw(codec,
- &spec->multiout);
- if (err < 0)
- return err;
- spec->multiout.share_spdif = 1;
+ if (!spec->no_analog) {
+ err = snd_hda_create_spdif_share_sw(codec,
+ &spec->multiout);
+ if (err < 0)
+ return err;
+ spec->multiout.share_spdif = 1;
+ }
}
if (spec->dig_in_nid) {
err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
return err;
}
+ /* create beep controls if needed */
+ if (spec->beep_amp) {
+ struct snd_kcontrol_new *knew;
+ for (knew = alc_beep_mixer; knew->name; knew++) {
+ struct snd_kcontrol *kctl;
+ kctl = snd_ctl_new1(knew, codec);
+ if (!kctl)
+ return -ENOMEM;
+ kctl->private_value = spec->beep_amp;
+ err = snd_hda_ctl_add(codec, kctl);
+ if (err < 0)
+ return err;
+ }
+ }
+
/* if we have no master control, let's create it */
- if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
+ if (!spec->no_analog &&
+ !snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
unsigned int vmaster_tlv[4];
snd_hda_set_vmaster_tlv(codec, spec->vmaster_nid,
HDA_OUTPUT, vmaster_tlv);
if (err < 0)
return err;
}
- if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
+ if (!spec->no_analog &&
+ !snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
err = snd_hda_add_vmaster(codec, "Master Playback Switch",
NULL, alc_slave_sws);
if (err < 0)
stream_tag, format, substream);
}
+static int alc880_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
+ struct hda_codec *codec,
+ struct snd_pcm_substream *substream)
+{
+ struct alc_spec *spec = codec->spec;
+ return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
+}
+
static int alc880_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream)
.ops = {
.open = alc880_dig_playback_pcm_open,
.close = alc880_dig_playback_pcm_close,
- .prepare = alc880_dig_playback_pcm_prepare
+ .prepare = alc880_dig_playback_pcm_prepare,
+ .cleanup = alc880_dig_playback_pcm_cleanup
},
};
codec->num_pcms = 1;
codec->pcm_info = info;
+ if (spec->no_analog)
+ goto skip_analog;
+
info->name = spec->stream_name_analog;
if (spec->stream_analog_playback) {
if (snd_BUG_ON(!spec->multiout.dac_nids))
}
}
+ skip_analog:
/* SPDIF for stream index #1 */
if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
codec->num_pcms = 2;
+ codec->slave_dig_outs = spec->multiout.slave_dig_outs;
info = spec->pcm_rec + 1;
info->name = spec->stream_name_digital;
- info->pcm_type = HDA_PCM_TYPE_SPDIF;
+ if (spec->dig_out_type)
+ info->pcm_type = spec->dig_out_type;
+ else
+ info->pcm_type = HDA_PCM_TYPE_SPDIF;
if (spec->multiout.dig_out_nid &&
spec->stream_digital_playback) {
info->stream[SNDRV_PCM_STREAM_PLAYBACK] = *(spec->stream_digital_playback);
codec->spdif_status_reset = 1;
}
+ if (spec->no_analog)
+ return 0;
+
/* If the use of more than one ADC is requested for the current
* model, configure a second analog capture-only PCM.
*/
alc_free_kctls(codec);
kfree(spec);
- codec->spec = NULL; /* to be sure */
+ snd_hda_detach_beep_device(codec);
}
#ifdef SND_HDA_NEEDS_RESUME
-static void store_pin_configs(struct hda_codec *codec)
-{
- struct alc_spec *spec = codec->spec;
- hda_nid_t nid, end_nid;
-
- end_nid = codec->start_nid + codec->num_nodes;
- for (nid = codec->start_nid; nid < end_nid; nid++) {
- unsigned int wid_caps = get_wcaps(codec, nid);
- unsigned int wid_type =
- (wid_caps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
- if (wid_type != AC_WID_PIN)
- continue;
- if (spec->num_pins >= ARRAY_SIZE(spec->pin_nids))
- break;
- spec->pin_nids[spec->num_pins] = nid;
- spec->pin_cfgs[spec->num_pins] =
- snd_hda_codec_read(codec, nid, 0,
- AC_VERB_GET_CONFIG_DEFAULT, 0);
- spec->num_pins++;
- }
-}
-
-static void resume_pin_configs(struct hda_codec *codec)
-{
- struct alc_spec *spec = codec->spec;
- int i;
-
- for (i = 0; i < spec->num_pins; i++) {
- hda_nid_t pin_nid = spec->pin_nids[i];
- unsigned int pin_config = spec->pin_cfgs[i];
- snd_hda_codec_write(codec, pin_nid, 0,
- AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
- pin_config & 0x000000ff);
- snd_hda_codec_write(codec, pin_nid, 0,
- AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
- (pin_config & 0x0000ff00) >> 8);
- snd_hda_codec_write(codec, pin_nid, 0,
- AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
- (pin_config & 0x00ff0000) >> 16);
- snd_hda_codec_write(codec, pin_nid, 0,
- AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
- pin_config >> 24);
- }
-}
-
static int alc_resume(struct hda_codec *codec)
{
- resume_pin_configs(codec);
codec->patch_ops.init(codec);
snd_hda_codec_resume_amp(codec);
snd_hda_codec_resume_cache(codec);
return 0;
}
-#else
-#define store_pin_configs(codec)
#endif
/*
SND_PCI_QUIRK(0x1043, 0x8181, "ASUS P4GPL", ALC880_ASUS_DIG),
SND_PCI_QUIRK(0x1043, 0x8196, "ASUS P5GD1", ALC880_6ST),
SND_PCI_QUIRK(0x1043, 0x81b4, "ASUS", ALC880_6ST),
- SND_PCI_QUIRK(0x1043, 0, "ASUS", ALC880_ASUS), /* default ASUS */
+ SND_PCI_QUIRK_VENDOR(0x1043, "ASUS", ALC880_ASUS), /* default ASUS */
SND_PCI_QUIRK(0x104d, 0x81a0, "Sony", ALC880_3ST),
SND_PCI_QUIRK(0x104d, 0x81d6, "Sony", ALC880_3ST),
SND_PCI_QUIRK(0x107b, 0x3032, "Gateway", ALC880_5ST),
SND_PCI_QUIRK(0x8086, 0xe400, "Intel mobo", ALC880_5ST_DIG),
SND_PCI_QUIRK(0x8086, 0xe401, "Intel mobo", ALC880_5ST_DIG),
SND_PCI_QUIRK(0x8086, 0xe402, "Intel mobo", ALC880_5ST_DIG),
- SND_PCI_QUIRK(0x8086, 0, "Intel mobo", ALC880_3ST), /* default Intel */
+ /* default Intel */
+ SND_PCI_QUIRK_VENDOR(0x8086, "Intel mobo", ALC880_3ST),
SND_PCI_QUIRK(0xa0a0, 0x0560, "AOpen i915GMm-HFS", ALC880_5ST_DIG),
SND_PCI_QUIRK(0xe803, 0x1019, NULL, ALC880_6ST_DIG),
{}
.input_mux = &alc880_capture_source,
},
[ALC880_UNIWILL_DIG] = {
- .mixers = { alc880_asus_mixer, alc880_pcbeep_mixer },
+ .mixers = { alc880_asus_mixer },
.init_verbs = { alc880_volume_init_verbs,
alc880_pin_asus_init_verbs },
.num_dacs = ARRAY_SIZE(alc880_asus_dac_nids),
.init_hook = alc880_uniwill_p53_hp_automute,
},
[ALC880_FUJITSU] = {
- .mixers = { alc880_fujitsu_mixer,
- alc880_pcbeep_mixer, },
+ .mixers = { alc880_fujitsu_mixer },
.init_verbs = { alc880_volume_init_verbs,
alc880_uniwill_p53_init_verbs,
alc880_beep_init_verbs },
static int alc880_auto_create_analog_input_ctls(struct alc_spec *spec,
const struct auto_pin_cfg *cfg)
{
- struct hda_input_mux *imux = &spec->private_imux;
+ struct hda_input_mux *imux = &spec->private_imux[0];
int i, err, idx;
for (i = 0; i < AUTO_PIN_LAST; i++) {
for (i = 0; i < AUTO_PIN_LAST; i++) {
hda_nid_t nid = spec->autocfg.input_pins[i];
if (alc880_is_input_pin(nid)) {
- snd_hda_codec_write(codec, nid, 0,
- AC_VERB_SET_PIN_WIDGET_CONTROL,
- i <= AUTO_PIN_FRONT_MIC ?
- PIN_VREF80 : PIN_IN);
- if (nid != ALC880_PIN_CD_NID)
+ alc_set_input_pin(codec, nid, i);
+ if (nid != ALC880_PIN_CD_NID &&
+ (get_wcaps(codec, nid) & AC_WCAP_OUT_AMP))
snd_hda_codec_write(codec, nid, 0,
AC_VERB_SET_AMP_GAIN_MUTE,
AMP_OUT_MUTE);
static int alc880_parse_auto_config(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
- int err;
+ int i, err;
static hda_nid_t alc880_ignore[] = { 0x1d, 0 };
err = snd_hda_parse_pin_def_config(codec, &spec->autocfg,
spec->multiout.max_channels = spec->multiout.num_dacs * 2;
- if (spec->autocfg.dig_out_pin)
- spec->multiout.dig_out_nid = ALC880_DIGOUT_NID;
+ /* check multiple SPDIF-out (for recent codecs) */
+ for (i = 0; i < spec->autocfg.dig_outs; i++) {
+ hda_nid_t dig_nid;
+ err = snd_hda_get_connections(codec,
+ spec->autocfg.dig_out_pins[i],
+ &dig_nid, 1);
+ if (err < 0)
+ continue;
+ if (!i)
+ spec->multiout.dig_out_nid = dig_nid;
+ else {
+ spec->multiout.slave_dig_outs = spec->slave_dig_outs;
+ spec->slave_dig_outs[i - 1] = dig_nid;
+ if (i == ARRAY_SIZE(spec->slave_dig_outs) - 1)
+ break;
+ }
+ }
if (spec->autocfg.dig_in_pin)
spec->dig_in_nid = ALC880_DIGIN_NID;
add_verb(spec, alc880_volume_init_verbs);
spec->num_mux_defs = 1;
- spec->input_mux = &spec->private_imux;
+ spec->input_mux = &spec->private_imux[0];
- store_pin_configs(codec);
return 1;
}
alc_inithook(codec);
}
-/*
- * OK, here we have finally the patch for ALC880
- */
-
static void set_capture_mixer(struct alc_spec *spec)
{
- static struct snd_kcontrol_new *caps[3] = {
- alc_capture_mixer1,
- alc_capture_mixer2,
- alc_capture_mixer3,
+ static struct snd_kcontrol_new *caps[2][3] = {
+ { alc_capture_mixer_nosrc1,
+ alc_capture_mixer_nosrc2,
+ alc_capture_mixer_nosrc3 },
+ { alc_capture_mixer1,
+ alc_capture_mixer2,
+ alc_capture_mixer3 },
};
- if (spec->num_adc_nids > 0 && spec->num_adc_nids <= 3)
- spec->cap_mixer = caps[spec->num_adc_nids - 1];
+ if (spec->num_adc_nids > 0 && spec->num_adc_nids <= 3) {
+ int mux;
+ if (spec->input_mux && spec->input_mux->num_items > 1)
+ mux = 1;
+ else
+ mux = 0;
+ spec->cap_mixer = caps[mux][spec->num_adc_nids - 1];
+ }
}
+#define set_beep_amp(spec, nid, idx, dir) \
+ ((spec)->beep_amp = HDA_COMPOSE_AMP_VAL(nid, 3, idx, dir))
+
+/*
+ * OK, here we have finally the patch for ALC880
+ */
+
static int patch_alc880(struct hda_codec *codec)
{
struct alc_spec *spec;
}
}
+ err = snd_hda_attach_beep_device(codec, 0x1);
+ if (err < 0) {
+ alc_free(codec);
+ return err;
+ }
+
if (board_config != ALC880_AUTO)
setup_preset(spec, &alc880_presets[board_config]);
}
}
set_capture_mixer(spec);
+ set_beep_amp(spec, 0x0b, 0x05, HDA_INPUT);
spec->vmaster_nid = 0x0c;
},
},
};
+
+/* Maxdata Favorit 100XS */
+static struct hda_input_mux alc260_favorit100_capture_sources[2] = {
+ {
+ .num_items = 2,
+ .items = {
+ { "Line/Mic", 0x0 },
+ { "CD", 0x4 },
+ },
+ },
+ {
+ .num_items = 3,
+ .items = {
+ { "Line/Mic", 0x0 },
+ { "CD", 0x4 },
+ { "Mixer", 0x5 },
+ },
+ },
+};
+
/*
* This is just place-holder, so there's something for alc_build_pcms to look
* at when it calculates the maximum number of channels. ALC260 has no mixer
{ } /* end */
};
-static struct snd_kcontrol_new alc260_pc_beep_mixer[] = {
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x07, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x07, 0x05, HDA_INPUT),
- { } /* end */
-};
-
/* update HP, line and mono out pins according to the master switch */
static void alc260_hp_master_update(struct hda_codec *codec,
hda_nid_t hp, hda_nid_t line,
HDA_CODEC_VOLUME("Mic/Line Playback Volume", 0x07, 0x0, HDA_INPUT),
HDA_CODEC_MUTE("Mic/Line Playback Switch", 0x07, 0x0, HDA_INPUT),
ALC_PIN_MODE("Mic/Line Jack Mode", 0x12, ALC_PIN_DIR_IN),
- HDA_CODEC_VOLUME("Beep Playback Volume", 0x07, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("Beep Playback Switch", 0x07, 0x05, HDA_INPUT),
HDA_CODEC_VOLUME("Speaker Playback Volume", 0x09, 0x0, HDA_OUTPUT),
HDA_BIND_MUTE("Speaker Playback Switch", 0x09, 2, HDA_INPUT),
{ } /* end */
HDA_CODEC_VOLUME("Line Playback Volume", 0x07, 0x02, HDA_INPUT),
HDA_CODEC_MUTE("Line Playback Switch", 0x07, 0x02, HDA_INPUT),
ALC_PIN_MODE("Line Jack Mode", 0x14, ALC_PIN_DIR_INOUT),
- HDA_CODEC_VOLUME("Beep Playback Volume", 0x07, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("Beep Playback Switch", 0x07, 0x05, HDA_INPUT),
+ { } /* end */
+};
+
+/* Maxdata Favorit 100XS: one output and one input (0x12) jack
+ */
+static struct snd_kcontrol_new alc260_favorit100_mixer[] = {
+ HDA_CODEC_VOLUME("Master Playback Volume", 0x08, 0x0, HDA_OUTPUT),
+ HDA_BIND_MUTE("Master Playback Switch", 0x08, 2, HDA_INPUT),
+ ALC_PIN_MODE("Output Jack Mode", 0x0f, ALC_PIN_DIR_INOUT),
+ HDA_CODEC_VOLUME("Line/Mic Playback Volume", 0x07, 0x0, HDA_INPUT),
+ HDA_CODEC_MUTE("Line/Mic Playback Switch", 0x07, 0x0, HDA_INPUT),
+ ALC_PIN_MODE("Line/Mic Jack Mode", 0x12, ALC_PIN_DIR_IN),
{ } /* end */
};
ALC_PIN_MODE("Line Jack Mode", 0x14, ALC_PIN_DIR_INOUT),
HDA_CODEC_VOLUME("CD Playback Volume", 0x07, 0x04, HDA_INPUT),
HDA_CODEC_MUTE("CD Playback Switch", 0x07, 0x04, HDA_INPUT),
- HDA_CODEC_VOLUME("Beep Playback Volume", 0x07, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("Beep Playback Switch", 0x07, 0x05, HDA_INPUT),
{ } /* end */
};
{ }
};
+/* Initialisation sequence for Maxdata Favorit 100XS
+ * (adapted from Acer init verbs).
+ */
+static struct hda_verb alc260_favorit100_init_verbs[] = {
+ /* GPIO 0 enables the output jack.
+ * Turn this on and rely on the standard mute
+ * methods whenever the user wants to turn these outputs off.
+ */
+ {0x01, AC_VERB_SET_GPIO_MASK, 0x01},
+ {0x01, AC_VERB_SET_GPIO_DIRECTION, 0x01},
+ {0x01, AC_VERB_SET_GPIO_DATA, 0x01},
+ /* Line/Mic input jack is connected to Mic1 pin */
+ {0x12, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF50},
+ /* Ensure all other unused pins are disabled and muted. */
+ {0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, 0},
+ {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
+ {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, 0},
+ {0x11, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
+ {0x13, AC_VERB_SET_PIN_WIDGET_CONTROL, 0},
+ {0x13, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
+ {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, 0},
+ {0x14, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
+ {0x15, AC_VERB_SET_PIN_WIDGET_CONTROL, 0},
+ {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
+ /* Disable digital (SPDIF) pins */
+ {0x03, AC_VERB_SET_DIGI_CONVERT_1, 0},
+ {0x06, AC_VERB_SET_DIGI_CONVERT_1, 0},
+
+ /* Ensure Mic1 and Line1 pin widgets take input from the OUT1 sum
+ * bus when acting as outputs.
+ */
+ {0x0b, AC_VERB_SET_CONNECT_SEL, 0},
+ {0x0d, AC_VERB_SET_CONNECT_SEL, 0},
+
+ /* Start with output sum widgets muted and their output gains at min */
+ {0x08, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
+ {0x08, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)},
+ {0x08, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO},
+ {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
+ {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)},
+ {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO},
+ {0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
+ {0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)},
+ {0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO},
+
+ /* Unmute Line-out pin widget amp left and right
+ * (no equiv mixer ctrl)
+ */
+ {0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
+ /* Unmute Mic1 and Line1 pin widget input buffers since they start as
+ * inputs. If the pin mode is changed by the user the pin mode control
+ * will take care of enabling the pin's input/output buffers as needed.
+ * Therefore there's no need to enable the input buffer at this
+ * stage.
+ */
+ {0x12, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
+
+ /* Mute capture amp left and right */
+ {0x04, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
+ /* Set ADC connection select to match default mixer setting - mic
+ * (on mic1 pin)
+ */
+ {0x04, AC_VERB_SET_CONNECT_SEL, 0x00},
+
+ /* Do similar with the second ADC: mute capture input amp and
+ * set ADC connection to mic to match ALSA's default state.
+ */
+ {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
+ {0x05, AC_VERB_SET_CONNECT_SEL, 0x00},
+
+ /* Mute all inputs to mixer widget (even unconnected ones) */
+ {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* mic1 pin */
+ {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)}, /* mic2 pin */
+ {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(2)}, /* line1 pin */
+ {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(3)}, /* line2 pin */
+ {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(4)}, /* CD pin */
+ {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(5)}, /* Beep-gen pin */
+ {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(6)}, /* Line-out pin */
+ {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(7)}, /* HP-pin pin */
+
+ { }
+};
+
static struct hda_verb alc260_will_verbs[] = {
{0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP},
{0x0b, AC_VERB_SET_CONNECT_SEL, 0x00},
HDA_CODEC_MUTE("LINE2 Playback Switch", 0x07, 0x03, HDA_INPUT),
HDA_CODEC_VOLUME("CD Playback Volume", 0x07, 0x04, HDA_INPUT),
HDA_CODEC_MUTE("CD Playback Switch", 0x07, 0x04, HDA_INPUT),
- HDA_CODEC_VOLUME("Beep Playback Volume", 0x07, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("Beep Playback Switch", 0x07, 0x05, HDA_INPUT),
HDA_CODEC_VOLUME("LINE-OUT loopback Playback Volume", 0x07, 0x06, HDA_INPUT),
HDA_CODEC_MUTE("LINE-OUT loopback Playback Switch", 0x07, 0x06, HDA_INPUT),
HDA_CODEC_VOLUME("HP-OUT loopback Playback Volume", 0x07, 0x7, HDA_INPUT),
static int alc260_auto_create_analog_input_ctls(struct alc_spec *spec,
const struct auto_pin_cfg *cfg)
{
- struct hda_input_mux *imux = &spec->private_imux;
+ struct hda_input_mux *imux = &spec->private_imux[0];
int i, err, idx;
for (i = 0; i < AUTO_PIN_LAST; i++) {
for (i = 0; i < AUTO_PIN_LAST; i++) {
hda_nid_t nid = spec->autocfg.input_pins[i];
if (nid >= 0x12) {
- snd_hda_codec_write(codec, nid, 0,
- AC_VERB_SET_PIN_WIDGET_CONTROL,
- i <= AUTO_PIN_FRONT_MIC ?
- PIN_VREF80 : PIN_IN);
- if (nid != ALC260_PIN_CD_NID)
+ alc_set_input_pin(codec, nid, i);
+ if (nid != ALC260_PIN_CD_NID &&
+ (get_wcaps(codec, nid) & AC_WCAP_OUT_AMP))
snd_hda_codec_write(codec, nid, 0,
AC_VERB_SET_AMP_GAIN_MUTE,
AMP_OUT_MUTE);
spec->multiout.max_channels = 2;
- if (spec->autocfg.dig_out_pin)
+ if (spec->autocfg.dig_outs)
spec->multiout.dig_out_nid = ALC260_DIGOUT_NID;
if (spec->kctls.list)
add_mixer(spec, spec->kctls.list);
add_verb(spec, alc260_volume_init_verbs);
spec->num_mux_defs = 1;
- spec->input_mux = &spec->private_imux;
+ spec->input_mux = &spec->private_imux[0];
- store_pin_configs(codec);
return 1;
}
[ALC260_ACER] = "acer",
[ALC260_WILL] = "will",
[ALC260_REPLACER_672V] = "replacer",
+ [ALC260_FAVORIT100] = "favorit100",
#ifdef CONFIG_SND_DEBUG
[ALC260_TEST] = "test",
#endif
static struct snd_pci_quirk alc260_cfg_tbl[] = {
SND_PCI_QUIRK(0x1025, 0x007b, "Acer C20x", ALC260_ACER),
SND_PCI_QUIRK(0x1025, 0x008f, "Acer", ALC260_ACER),
+ SND_PCI_QUIRK(0x1509, 0x4540, "Favorit 100XS", ALC260_FAVORIT100),
SND_PCI_QUIRK(0x103c, 0x2808, "HP d5700", ALC260_HP_3013),
SND_PCI_QUIRK(0x103c, 0x280a, "HP d5750", ALC260_HP_3013),
SND_PCI_QUIRK(0x103c, 0x3010, "HP", ALC260_HP_3013),
static struct alc_config_preset alc260_presets[] = {
[ALC260_BASIC] = {
.mixers = { alc260_base_output_mixer,
- alc260_input_mixer,
- alc260_pc_beep_mixer },
+ alc260_input_mixer },
.init_verbs = { alc260_init_verbs },
.num_dacs = ARRAY_SIZE(alc260_dac_nids),
.dac_nids = alc260_dac_nids,
.num_mux_defs = ARRAY_SIZE(alc260_acer_capture_sources),
.input_mux = alc260_acer_capture_sources,
},
+ [ALC260_FAVORIT100] = {
+ .mixers = { alc260_favorit100_mixer },
+ .init_verbs = { alc260_favorit100_init_verbs },
+ .num_dacs = ARRAY_SIZE(alc260_dac_nids),
+ .dac_nids = alc260_dac_nids,
+ .num_adc_nids = ARRAY_SIZE(alc260_dual_adc_nids),
+ .adc_nids = alc260_dual_adc_nids,
+ .num_channel_mode = ARRAY_SIZE(alc260_modes),
+ .channel_mode = alc260_modes,
+ .num_mux_defs = ARRAY_SIZE(alc260_favorit100_capture_sources),
+ .input_mux = alc260_favorit100_capture_sources,
+ },
[ALC260_WILL] = {
.mixers = { alc260_will_mixer },
.init_verbs = { alc260_init_verbs, alc260_will_verbs },
}
}
+ err = snd_hda_attach_beep_device(codec, 0x1);
+ if (err < 0) {
+ alc_free(codec);
+ return err;
+ }
+
if (board_config != ALC260_AUTO)
setup_preset(spec, &alc260_presets[board_config]);
}
}
set_capture_mixer(spec);
+ set_beep_amp(spec, 0x07, 0x05, HDA_INPUT);
spec->vmaster_nid = 0x08;
HDA_CODEC_VOLUME("Front Mic Playback Volume", 0x0b, 0x1, HDA_INPUT),
HDA_CODEC_VOLUME("Front Mic Boost", 0x19, 0, HDA_INPUT),
HDA_CODEC_MUTE("Front Mic Playback Switch", 0x0b, 0x1, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x0b, 0x05, HDA_INPUT),
{ } /* end */
};
HDA_CODEC_VOLUME("Mic Playback Volume", 0x0b, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Mic Boost", 0x18, 0, HDA_INPUT),
HDA_CODEC_MUTE("Mic Playback Switch", 0x0b, 0x0, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x0b, 0x05, HDA_INPUT),
{ } /* end */
};
HDA_CODEC_VOLUME("Mic Playback Volume", 0x0b, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Mic Boost", 0x18, 0, HDA_INPUT),
HDA_CODEC_MUTE("Mic Playback Switch", 0x0b, 0x0, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x0b, 0x05, HDA_INPUT),
{ } /* end */
};
HDA_CODEC_MUTE("Headphone Playback Switch", 0x18, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME("Line Playback Volume", 0x0b, 0x01, HDA_INPUT),
HDA_CODEC_MUTE("Line Playback Switch", 0x0b, 0x01, HDA_INPUT),
+ /* FIXME: this looks suspicious...
HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x0b, 0x02, HDA_INPUT),
HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x0b, 0x02, HDA_INPUT),
+ */
{ } /* end */
};
for (i = 0; i < AUTO_PIN_LAST; i++) {
hda_nid_t nid = spec->autocfg.input_pins[i];
- unsigned int vref;
if (!nid)
continue;
- vref = PIN_IN;
- if (1 /*i <= AUTO_PIN_FRONT_MIC*/) {
- unsigned int pincap;
- pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
- if ((pincap >> AC_PINCAP_VREF_SHIFT) &
- AC_PINCAP_VREF_80)
- vref = PIN_VREF80;
- }
- snd_hda_codec_write(codec, nid, 0,
- AC_VERB_SET_PIN_WIDGET_CONTROL, vref);
+ alc_set_input_pin(codec, nid, AUTO_PIN_FRONT_MIC /*i*/);
if (get_wcaps(codec, nid) & AC_WCAP_OUT_AMP)
snd_hda_codec_write(codec, nid, 0,
AC_VERB_SET_AMP_GAIN_MUTE,
static void alc882_auto_init_input_src(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
- const struct hda_input_mux *imux = spec->input_mux;
int c;
for (c = 0; c < spec->num_adc_nids; c++) {
hda_nid_t conn_list[HDA_MAX_NUM_INPUTS];
hda_nid_t nid = spec->capsrc_nids[c];
+ unsigned int mux_idx;
+ const struct hda_input_mux *imux;
int conns, mute, idx, item;
conns = snd_hda_get_connections(codec, nid, conn_list,
ARRAY_SIZE(conn_list));
if (conns < 0)
continue;
+ mux_idx = c >= spec->num_mux_defs ? 0 : c;
+ imux = &spec->input_mux[mux_idx];
for (idx = 0; idx < conns; idx++) {
/* if the current connection is the selected one,
* unmute it as default - otherwise mute it
break;
}
}
- snd_hda_codec_write(codec, nid, 0,
- AC_VERB_SET_AMP_GAIN_MUTE, mute);
+ /* check if we have a selector or mixer
+ * we could check for the widget type instead, but
+ * just check for Amp-In presence (in case of mixer
+ * without amp-in there is something wrong, this
+ * function shouldn't be used or capsrc nid is wrong)
+ */
+ if (get_wcaps(codec, nid) & AC_WCAP_IN_AMP)
+ snd_hda_codec_write(codec, nid, 0,
+ AC_VERB_SET_AMP_GAIN_MUTE,
+ mute);
+ else if (mute != AMP_IN_MUTE(idx))
+ snd_hda_codec_write(codec, nid, 0,
+ AC_VERB_SET_CONNECT_SEL,
+ idx);
}
}
}
}
}
+ err = snd_hda_attach_beep_device(codec, 0x1);
+ if (err < 0) {
+ alc_free(codec);
+ return err;
+ }
+
if (board_config != ALC882_AUTO)
setup_preset(spec, &alc882_presets[board_config]);
spec->stream_digital_playback = &alc882_pcm_digital_playback;
spec->stream_digital_capture = &alc882_pcm_digital_capture;
- spec->is_mix_capture = 1; /* matrix-style capture */
+ spec->capture_style = CAPT_MIX; /* matrix-style capture */
if (!spec->adc_nids && spec->input_mux) {
/* check whether NID 0x07 is valid */
unsigned int wcap = get_wcaps(codec, 0x07);
}
}
set_capture_mixer(spec);
+ set_beep_amp(spec, 0x0b, 0x05, HDA_INPUT);
spec->vmaster_nid = 0x0c;
0x09, 0x08
};
+#define alc889_adc_nids alc880_adc_nids
+
static hda_nid_t alc883_capsrc_nids[2] = { 0x23, 0x22 };
static hda_nid_t alc883_capsrc_nids_rev[2] = { 0x22, 0x23 };
+#define alc889_capsrc_nids alc882_capsrc_nids
+
/* input MUX */
/* FIXME: should be a matrix-type input source selection */
HDA_CODEC_VOLUME("Front Mic Playback Volume", 0x0b, 0x1, HDA_INPUT),
HDA_CODEC_VOLUME("Front Mic Boost", 0x19, 0, HDA_INPUT),
HDA_CODEC_MUTE("Front Mic Playback Switch", 0x0b, 0x1, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x0b, 0x05, HDA_INPUT),
{ } /* end */
};
HDA_CODEC_VOLUME("Front Mic Playback Volume", 0x0b, 0x1, HDA_INPUT),
HDA_CODEC_VOLUME("Front Mic Boost", 0x19, 0, HDA_INPUT),
HDA_CODEC_MUTE("Front Mic Playback Switch", 0x0b, 0x1, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x0b, 0x05, HDA_INPUT),
{ } /* end */
};
HDA_CODEC_VOLUME("Front Mic Playback Volume", 0x0b, 0x1, HDA_INPUT),
HDA_CODEC_VOLUME("Front Mic Boost", 0x19, 0, HDA_INPUT),
HDA_CODEC_MUTE("Front Mic Playback Switch", 0x0b, 0x1, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x0b, 0x05, HDA_INPUT),
{ } /* end */
};
HDA_CODEC_VOLUME("Front Mic Playback Volume", 0x0b, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Front Mic Boost", 0x18, 0, HDA_INPUT),
HDA_CODEC_MUTE("Front Mic Playback Switch", 0x0b, 0x0, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x0b, 0x05, HDA_INPUT),
{ } /* end */
};
HDA_CODEC_VOLUME("Front Mic Playback Volume", 0x0b, 0x1, HDA_INPUT),
HDA_CODEC_VOLUME("Front Mic Boost", 0x19, 0, HDA_INPUT),
HDA_CODEC_MUTE("Front Mic Playback Switch", 0x0b, 0x1, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x0b, 0x05, HDA_INPUT),
{ } /* end */
};
{ } /* end */
};
+static struct hda_verb alc888_6st_dell_verbs[] = {
+ {0x1b, AC_VERB_SET_UNSOLICITED_ENABLE, ALC880_HP_EVENT | AC_USRSP_EN},
+ { }
+};
+
+static void alc888_3st_hp_front_automute(struct hda_codec *codec)
+{
+ unsigned int present, bits;
+
+ present = snd_hda_codec_read(codec, 0x1b, 0,
+ AC_VERB_GET_PIN_SENSE, 0) & 0x80000000;
+ bits = present ? HDA_AMP_MUTE : 0;
+ snd_hda_codec_amp_stereo(codec, 0x14, HDA_OUTPUT, 0,
+ HDA_AMP_MUTE, bits);
+ snd_hda_codec_amp_stereo(codec, 0x16, HDA_OUTPUT, 0,
+ HDA_AMP_MUTE, bits);
+ snd_hda_codec_amp_stereo(codec, 0x18, HDA_OUTPUT, 0,
+ HDA_AMP_MUTE, bits);
+}
+
+static void alc888_3st_hp_unsol_event(struct hda_codec *codec,
+ unsigned int res)
+{
+ switch (res >> 26) {
+ case ALC880_HP_EVENT:
+ alc888_3st_hp_front_automute(codec);
+ break;
+ }
+}
+
static struct hda_verb alc888_3st_hp_verbs[] = {
{0x14, AC_VERB_SET_CONNECT_SEL, 0x00}, /* Front: output 0 (0x0c) */
{0x16, AC_VERB_SET_CONNECT_SEL, 0x01}, /* Rear : output 1 (0x0d) */
{0x18, AC_VERB_SET_CONNECT_SEL, 0x02}, /* CLFE : output 2 (0x0e) */
- { }
-};
-
-static struct hda_verb alc888_6st_dell_verbs[] = {
{0x1b, AC_VERB_SET_UNSOLICITED_ENABLE, ALC880_HP_EVENT | AC_USRSP_EN},
- { }
+ { } /* end */
};
+/*
+ * 2ch mode
+ */
static struct hda_verb alc888_3st_hp_2ch_init[] = {
{ 0x18, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 },
{ 0x18, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
{ 0x16, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN },
{ 0x16, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
- { }
+ { } /* end */
+};
+
+/*
+ * 4ch mode
+ */
+static struct hda_verb alc888_3st_hp_4ch_init[] = {
+ { 0x18, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 },
+ { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
+ { 0x16, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },
+ { 0x16, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE },
+ { 0x16, AC_VERB_SET_CONNECT_SEL, 0x01 },
+ { } /* end */
};
+/*
+ * 6ch mode
+ */
static struct hda_verb alc888_3st_hp_6ch_init[] = {
{ 0x18, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },
{ 0x18, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE },
+ { 0x18, AC_VERB_SET_CONNECT_SEL, 0x02 },
{ 0x16, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },
{ 0x16, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE },
- { }
+ { 0x16, AC_VERB_SET_CONNECT_SEL, 0x01 },
+ { } /* end */
};
-static struct hda_channel_mode alc888_3st_hp_modes[2] = {
+static struct hda_channel_mode alc888_3st_hp_modes[3] = {
{ 2, alc888_3st_hp_2ch_init },
+ { 4, alc888_3st_hp_4ch_init },
{ 6, alc888_3st_hp_6ch_init },
};
{
switch (res >> 26) {
case ALC880_HP_EVENT:
- printk("hp_event\n");
+ /* printk(KERN_DEBUG "hp_event\n"); */
alc888_6st_dell_front_automute(codec);
break;
}
SND_PCI_QUIRK(0x1019, 0x6668, "ECS", ALC883_3ST_6ch_DIG),
SND_PCI_QUIRK(0x1025, 0x006c, "Acer Aspire 9810", ALC883_ACER_ASPIRE),
SND_PCI_QUIRK(0x1025, 0x0090, "Acer Aspire", ALC883_ACER_ASPIRE),
+ SND_PCI_QUIRK(0x1025, 0x010a, "Acer Ferrari 5000", ALC883_ACER_ASPIRE),
SND_PCI_QUIRK(0x1025, 0x0110, "Acer Aspire", ALC883_ACER_ASPIRE),
SND_PCI_QUIRK(0x1025, 0x0112, "Acer Aspire 9303", ALC883_ACER_ASPIRE),
SND_PCI_QUIRK(0x1025, 0x0121, "Acer Aspire 5920G", ALC883_ACER_ASPIRE),
ALC888_ACER_ASPIRE_4930G),
SND_PCI_QUIRK(0x1025, 0x013f, "Acer Aspire 5930G",
ALC888_ACER_ASPIRE_4930G),
+ SND_PCI_QUIRK(0x1025, 0x0157, "Acer X3200", ALC883_AUTO),
+ SND_PCI_QUIRK(0x1025, 0x0158, "Acer AX1700-U3700A", ALC883_AUTO),
SND_PCI_QUIRK(0x1025, 0x015e, "Acer Aspire 6930G",
ALC888_ACER_ASPIRE_4930G),
SND_PCI_QUIRK(0x1025, 0x0166, "Acer Aspire 6530G",
ALC888_ACER_ASPIRE_4930G),
- SND_PCI_QUIRK(0x1025, 0, "Acer laptop", ALC883_ACER), /* default Acer */
+ /* default Acer */
+ SND_PCI_QUIRK_VENDOR(0x1025, "Acer laptop", ALC883_ACER),
SND_PCI_QUIRK(0x1028, 0x020d, "Dell Inspiron 530", ALC888_6ST_DELL),
SND_PCI_QUIRK(0x103c, 0x2a3d, "HP Pavillion", ALC883_6ST_DIG),
SND_PCI_QUIRK(0x103c, 0x2a4f, "HP Samba", ALC888_3ST_HP),
SND_PCI_QUIRK(0x103c, 0x2a60, "HP Lucknow", ALC888_3ST_HP),
SND_PCI_QUIRK(0x103c, 0x2a61, "HP Nettle", ALC883_6ST_DIG),
SND_PCI_QUIRK(0x103c, 0x2a66, "HP Acacia", ALC888_3ST_HP),
+ SND_PCI_QUIRK(0x103c, 0x2a72, "HP Educ.ar", ALC888_3ST_HP),
SND_PCI_QUIRK(0x1043, 0x1873, "Asus M90V", ALC888_ASUS_M90V),
SND_PCI_QUIRK(0x1043, 0x8249, "Asus M2A-VM HDMI", ALC883_3ST_6ch_DIG),
SND_PCI_QUIRK(0x1043, 0x8284, "Asus Z37E", ALC883_6ST_DIG),
SND_PCI_QUIRK(0x147b, 0x1083, "Abit IP35-PRO", ALC883_6ST_DIG),
SND_PCI_QUIRK(0x1558, 0x0721, "Clevo laptop M720R", ALC883_CLEVO_M720),
SND_PCI_QUIRK(0x1558, 0x0722, "Clevo laptop M720SR", ALC883_CLEVO_M720),
- SND_PCI_QUIRK(0x1558, 0, "Clevo laptop", ALC883_LAPTOP_EAPD),
+ SND_PCI_QUIRK_VENDOR(0x1558, "Clevo laptop", ALC883_LAPTOP_EAPD),
SND_PCI_QUIRK(0x15d9, 0x8780, "Supermicro PDSBA", ALC883_3ST_6ch),
SND_PCI_QUIRK(0x161f, 0x2054, "Medion laptop", ALC883_MEDION),
SND_PCI_QUIRK(0x1734, 0x1107, "FSC AMILO Xi2550",
{}
};
+static hda_nid_t alc1200_slave_dig_outs[] = {
+ ALC883_DIGOUT_NID, 0,
+};
+
static struct alc_config_preset alc883_presets[] = {
[ALC883_3ST_2ch_DIG] = {
.mixers = { alc883_3ST_2ch_mixer },
.channel_mode = alc888_3st_hp_modes,
.need_dac_fix = 1,
.input_mux = &alc883_capture_source,
+ .unsol_event = alc888_3st_hp_unsol_event,
+ .init_hook = alc888_3st_hp_front_automute,
},
[ALC888_6ST_DELL] = {
.mixers = { alc883_base_mixer, alc883_chmode_mixer },
.dac_nids = alc883_dac_nids,
.dig_out_nid = ALC1200_DIGOUT_NID,
.dig_in_nid = ALC883_DIGIN_NID,
+ .slave_dig_outs = alc1200_slave_dig_outs,
.num_channel_mode = ARRAY_SIZE(alc883_sixstack_modes),
.channel_mode = alc883_sixstack_modes,
.input_mux = &alc883_capture_source,
for (i = 0; i < AUTO_PIN_LAST; i++) {
hda_nid_t nid = spec->autocfg.input_pins[i];
if (alc883_is_input_pin(nid)) {
- snd_hda_codec_write(codec, nid, 0,
- AC_VERB_SET_PIN_WIDGET_CONTROL,
- (i <= AUTO_PIN_FRONT_MIC ?
- PIN_VREF80 : PIN_IN));
- if (nid != ALC883_PIN_CD_NID)
+ alc_set_input_pin(codec, nid, i);
+ if (nid != ALC883_PIN_CD_NID &&
+ (get_wcaps(codec, nid) & AC_WCAP_OUT_AMP))
snd_hda_codec_write(codec, nid, 0,
AC_VERB_SET_AMP_GAIN_MUTE,
AMP_OUT_MUTE);
{
struct alc_spec *spec = codec->spec;
int err = alc880_parse_auto_config(codec);
+ struct auto_pin_cfg *cfg = &spec->autocfg;
+ int i;
if (err < 0)
return err;
/* hack - override the init verbs */
spec->init_verbs[0] = alc883_auto_init_verbs;
+ /* setup input_mux for ALC889 */
+ if (codec->vendor_id == 0x10ec0889) {
+ /* digital-mic input pin is excluded in alc880_auto_create..()
+ * because it's under 0x18
+ */
+ if (cfg->input_pins[AUTO_PIN_MIC] == 0x12 ||
+ cfg->input_pins[AUTO_PIN_FRONT_MIC] == 0x12) {
+ struct hda_input_mux *imux = &spec->private_imux[0];
+ for (i = 1; i < 3; i++)
+ memcpy(&spec->private_imux[i],
+ &spec->private_imux[0],
+ sizeof(spec->private_imux[0]));
+ imux->items[imux->num_items].label = "Int DMic";
+ imux->items[imux->num_items].index = 0x0b;
+ imux->num_items++;
+ spec->num_mux_defs = 3;
+ spec->input_mux = spec->private_imux;
+ }
+ }
+
return 1; /* config found */
}
}
}
+ err = snd_hda_attach_beep_device(codec, 0x1);
+ if (err < 0) {
+ alc_free(codec);
+ return err;
+ }
+
if (board_config != ALC883_AUTO)
setup_preset(spec, &alc883_presets[board_config]);
spec->stream_name_analog = "ALC888 Analog";
spec->stream_name_digital = "ALC888 Digital";
}
+ if (!spec->num_adc_nids) {
+ spec->num_adc_nids = ARRAY_SIZE(alc883_adc_nids);
+ spec->adc_nids = alc883_adc_nids;
+ }
+ if (!spec->capsrc_nids)
+ spec->capsrc_nids = alc883_capsrc_nids;
+ spec->capture_style = CAPT_MIX; /* matrix-style capture */
break;
case 0x10ec0889:
spec->stream_name_analog = "ALC889 Analog";
spec->stream_name_digital = "ALC889 Digital";
+ if (!spec->num_adc_nids) {
+ spec->num_adc_nids = ARRAY_SIZE(alc889_adc_nids);
+ spec->adc_nids = alc889_adc_nids;
+ }
+ if (!spec->capsrc_nids)
+ spec->capsrc_nids = alc889_capsrc_nids;
+ spec->capture_style = CAPT_1MUX_MIX; /* 1mux/Nmix-style
+ capture */
break;
default:
spec->stream_name_analog = "ALC883 Analog";
spec->stream_name_digital = "ALC883 Digital";
+ if (!spec->num_adc_nids) {
+ spec->num_adc_nids = ARRAY_SIZE(alc883_adc_nids);
+ spec->adc_nids = alc883_adc_nids;
+ }
+ if (!spec->capsrc_nids)
+ spec->capsrc_nids = alc883_capsrc_nids;
+ spec->capture_style = CAPT_MIX; /* matrix-style capture */
break;
}
spec->stream_digital_playback = &alc883_pcm_digital_playback;
spec->stream_digital_capture = &alc883_pcm_digital_capture;
- if (!spec->num_adc_nids) {
- spec->num_adc_nids = ARRAY_SIZE(alc883_adc_nids);
- spec->adc_nids = alc883_adc_nids;
- }
- if (!spec->capsrc_nids)
- spec->capsrc_nids = alc883_capsrc_nids;
- spec->is_mix_capture = 1; /* matrix-style capture */
if (!spec->cap_mixer)
set_capture_mixer(spec);
+ set_beep_amp(spec, 0x0b, 0x05, HDA_INPUT);
spec->vmaster_nid = 0x0c;
HDA_CODEC_VOLUME("Front Mic Playback Volume", 0x0b, 0x01, HDA_INPUT),
HDA_CODEC_MUTE("Front Mic Playback Switch", 0x0b, 0x01, HDA_INPUT),
HDA_CODEC_VOLUME("Front Mic Boost", 0x19, 0, HDA_INPUT),
- /* HDA_CODEC_VOLUME("PC Beep Playback Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Beep Playback Switch", 0x0b, 0x05, HDA_INPUT), */
HDA_CODEC_VOLUME("Headphone Playback Volume", 0x0D, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE("Headphone Playback Switch", 0x15, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME_MONO("Mono Playback Volume", 0x0e, 2, 0x0, HDA_OUTPUT),
HDA_CODEC_VOLUME("Front Mic Playback Volume", 0x0b, 0x01, HDA_INPUT),
HDA_CODEC_MUTE("Front Mic Playback Switch", 0x0b, 0x01, HDA_INPUT),
HDA_CODEC_VOLUME("Front Mic Boost", 0x19, 0, HDA_INPUT),
- /* HDA_CODEC_VOLUME("PC Beep Playback Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Beep Playback Switch", 0x0b, 0x05, HDA_INPUT), */
/*HDA_CODEC_VOLUME("Headphone Playback Volume", 0x0D, 0x0, HDA_OUTPUT),*/
HDA_CODEC_MUTE("Headphone Playback Switch", 0x1b, 0x0, HDA_OUTPUT),
{ } /* end */
HDA_CODEC_MUTE("Line Playback Switch", 0x0b, 0x02, HDA_INPUT),
HDA_CODEC_VOLUME("CD Playback Volume", 0x0b, 0x04, HDA_INPUT),
HDA_CODEC_MUTE("CD Playback Switch", 0x0b, 0x04, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Beep Playback Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Beep Playback Switch", 0x0b, 0x05, HDA_INPUT),
HDA_CODEC_VOLUME("AUX IN Playback Volume", 0x0b, 0x06, HDA_INPUT),
HDA_CODEC_MUTE("AUX IN Playback Switch", 0x0b, 0x06, HDA_INPUT),
{ } /* end */
HDA_CODEC_MUTE("Line Playback Switch", 0x0b, 0x01, HDA_INPUT),
HDA_CODEC_VOLUME("CD Playback Volume", 0x0b, 0x04, HDA_INPUT),
HDA_CODEC_MUTE("CD Playback Switch", 0x0b, 0x04, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Beep Playback Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Beep Playback Switch", 0x0b, 0x05, HDA_INPUT),
{ } /* end */
};
{ } /* end */
};
+static struct snd_kcontrol_new alc262_tyan_mixer[] = {
+ HDA_CODEC_VOLUME("Master Playback Volume", 0x0c, 0x0, HDA_OUTPUT),
+ HDA_BIND_MUTE("Master Playback Switch", 0x0c, 2, HDA_INPUT),
+ HDA_CODEC_VOLUME("Aux Playback Volume", 0x0b, 0x06, HDA_INPUT),
+ HDA_CODEC_MUTE("Aux Playback Switch", 0x0b, 0x06, HDA_INPUT),
+ HDA_CODEC_VOLUME("Line Playback Volume", 0x0b, 0x02, HDA_INPUT),
+ HDA_CODEC_MUTE("Line Playback Switch", 0x0b, 0x02, HDA_INPUT),
+ HDA_CODEC_VOLUME("Mic Playback Volume", 0x0b, 0x0, HDA_INPUT),
+ HDA_CODEC_MUTE("Mic Playback Switch", 0x0b, 0x0, HDA_INPUT),
+ HDA_CODEC_VOLUME("Mic Boost", 0x18, 0, HDA_INPUT),
+ HDA_CODEC_VOLUME("Front Mic Playback Volume", 0x0b, 0x01, HDA_INPUT),
+ HDA_CODEC_MUTE("Front Mic Playback Switch", 0x0b, 0x01, HDA_INPUT),
+ HDA_CODEC_VOLUME("Front Mic Boost", 0x19, 0, HDA_INPUT),
+ { } /* end */
+};
+
+static struct hda_verb alc262_tyan_verbs[] = {
+ /* Headphone automute */
+ {0x1b, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | ALC880_HP_EVENT},
+ {0x1b, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP},
+ {0x15, AC_VERB_SET_CONNECT_SEL, 0x00},
+
+ /* P11 AUX_IN, white 4-pin connector */
+ {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN},
+ {0x14, AC_VERB_SET_CONFIG_DEFAULT_BYTES_1, 0xe1},
+ {0x14, AC_VERB_SET_CONFIG_DEFAULT_BYTES_2, 0x93},
+ {0x14, AC_VERB_SET_CONFIG_DEFAULT_BYTES_3, 0x19},
+
+ {}
+};
+
+/* unsolicited event for HP jack sensing */
+static void alc262_tyan_automute(struct hda_codec *codec)
+{
+ unsigned int mute;
+ unsigned int present;
+
+ snd_hda_codec_read(codec, 0x1b, 0, AC_VERB_SET_PIN_SENSE, 0);
+ present = snd_hda_codec_read(codec, 0x1b, 0,
+ AC_VERB_GET_PIN_SENSE, 0);
+ present = (present & 0x80000000) != 0;
+ if (present) {
+ /* mute line output on ATX panel */
+ snd_hda_codec_amp_stereo(codec, 0x15, HDA_OUTPUT, 0,
+ HDA_AMP_MUTE, HDA_AMP_MUTE);
+ } else {
+ /* unmute line output if necessary */
+ mute = snd_hda_codec_amp_read(codec, 0x1b, 0, HDA_OUTPUT, 0);
+ snd_hda_codec_amp_stereo(codec, 0x15, HDA_OUTPUT, 0,
+ HDA_AMP_MUTE, mute);
+ }
+}
+
+static void alc262_tyan_unsol_event(struct hda_codec *codec,
+ unsigned int res)
+{
+ if ((res >> 26) != ALC880_HP_EVENT)
+ return;
+ alc262_tyan_automute(codec);
+}
+
#define alc262_capture_mixer alc882_capture_mixer
#define alc262_capture_alt_mixer alc882_capture_alt_mixer
},
HDA_CODEC_VOLUME("CD Playback Volume", 0x0b, 0x04, HDA_INPUT),
HDA_CODEC_MUTE("CD Playback Switch", 0x0b, 0x04, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Speaker Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Switch", 0x0b, 0x05, HDA_INPUT),
HDA_CODEC_VOLUME("Mic Boost", 0x18, 0, HDA_INPUT),
HDA_CODEC_VOLUME("Mic Playback Volume", 0x0b, 0x0, HDA_INPUT),
HDA_CODEC_MUTE("Mic Playback Switch", 0x0b, 0x0, HDA_INPUT),
alc262_ignore);
if (err < 0)
return err;
- if (!spec->autocfg.line_outs)
+ if (!spec->autocfg.line_outs) {
+ if (spec->autocfg.dig_outs || spec->autocfg.dig_in_pin) {
+ spec->multiout.max_channels = 2;
+ spec->no_analog = 1;
+ goto dig_only;
+ }
return 0; /* can't find valid BIOS pin config */
+ }
err = alc262_auto_create_multi_out_ctls(spec, &spec->autocfg);
if (err < 0)
return err;
spec->multiout.max_channels = spec->multiout.num_dacs * 2;
- if (spec->autocfg.dig_out_pin)
+ dig_only:
+ if (spec->autocfg.dig_outs) {
spec->multiout.dig_out_nid = ALC262_DIGOUT_NID;
+ spec->dig_out_type = spec->autocfg.dig_out_type[0];
+ }
if (spec->autocfg.dig_in_pin)
spec->dig_in_nid = ALC262_DIGIN_NID;
add_verb(spec, alc262_volume_init_verbs);
spec->num_mux_defs = 1;
- spec->input_mux = &spec->private_imux;
+ spec->input_mux = &spec->private_imux[0];
err = alc_auto_add_mic_boost(codec);
if (err < 0)
return err;
- store_pin_configs(codec);
return 1;
}
[ALC262_ULTRA] = "ultra",
[ALC262_LENOVO_3000] = "lenovo-3000",
[ALC262_NEC] = "nec",
+ [ALC262_TYAN] = "tyan",
[ALC262_AUTO] = "auto",
};
static struct snd_pci_quirk alc262_cfg_tbl[] = {
SND_PCI_QUIRK(0x1002, 0x437b, "Hippo", ALC262_HIPPO),
SND_PCI_QUIRK(0x1033, 0x8895, "NEC Versa S9100", ALC262_NEC),
- SND_PCI_QUIRK(0x103c, 0x12fe, "HP xw9400", ALC262_HP_BPC),
- SND_PCI_QUIRK(0x103c, 0x12ff, "HP xw4550", ALC262_HP_BPC),
- SND_PCI_QUIRK(0x103c, 0x1306, "HP xw8600", ALC262_HP_BPC),
- SND_PCI_QUIRK(0x103c, 0x1307, "HP xw6600", ALC262_HP_BPC),
- SND_PCI_QUIRK(0x103c, 0x1308, "HP xw4600", ALC262_HP_BPC),
- SND_PCI_QUIRK(0x103c, 0x1309, "HP xw4*00", ALC262_HP_BPC),
- SND_PCI_QUIRK(0x103c, 0x130a, "HP xw6*00", ALC262_HP_BPC),
- SND_PCI_QUIRK(0x103c, 0x130b, "HP xw8*00", ALC262_HP_BPC),
- SND_PCI_QUIRK(0x103c, 0x170b, "HP xw*", ALC262_HP_BPC),
+ SND_PCI_QUIRK_MASK(0x103c, 0xff00, 0x1200, "HP xw series",
+ ALC262_HP_BPC),
+ SND_PCI_QUIRK_MASK(0x103c, 0xff00, 0x1300, "HP xw series",
+ ALC262_HP_BPC),
+ SND_PCI_QUIRK_MASK(0x103c, 0xff00, 0x1700, "HP xw series",
+ ALC262_HP_BPC),
SND_PCI_QUIRK(0x103c, 0x2800, "HP D7000", ALC262_HP_BPC_D7000_WL),
SND_PCI_QUIRK(0x103c, 0x2801, "HP D7000", ALC262_HP_BPC_D7000_WF),
SND_PCI_QUIRK(0x103c, 0x2802, "HP D7000", ALC262_HP_BPC_D7000_WL),
SND_PCI_QUIRK(0x104d, 0x1f00, "Sony ASSAMD", ALC262_SONY_ASSAMD),
SND_PCI_QUIRK(0x104d, 0x8203, "Sony UX-90", ALC262_HIPPO),
SND_PCI_QUIRK(0x104d, 0x820f, "Sony ASSAMD", ALC262_SONY_ASSAMD),
- SND_PCI_QUIRK(0x104d, 0x900e, "Sony ASSAMD", ALC262_SONY_ASSAMD),
- SND_PCI_QUIRK(0x104d, 0x9015, "Sony 0x9015", ALC262_SONY_ASSAMD),
- SND_PCI_QUIRK(0x104d, 0x9033, "Sony VAIO VGN-SR19XN",
- ALC262_SONY_ASSAMD),
+ SND_PCI_QUIRK(0x104d, 0x9016, "Sony VAIO", ALC262_AUTO), /* dig-only */
+ SND_PCI_QUIRK_MASK(0x104d, 0xff00, 0x9000, "Sony VAIO",
+ ALC262_SONY_ASSAMD),
SND_PCI_QUIRK(0x1179, 0x0001, "Toshiba dynabook SS RX1",
ALC262_TOSHIBA_RX1),
SND_PCI_QUIRK(0x1179, 0xff7b, "Toshiba S06", ALC262_TOSHIBA_S06),
SND_PCI_QUIRK(0x10cf, 0x1397, "Fujitsu", ALC262_FUJITSU),
SND_PCI_QUIRK(0x10cf, 0x142d, "Fujitsu Lifebook E8410", ALC262_FUJITSU),
- SND_PCI_QUIRK(0x144d, 0xc032, "Samsung Q1 Ultra", ALC262_ULTRA),
- SND_PCI_QUIRK(0x144d, 0xc039, "Samsung Q1U EL", ALC262_ULTRA),
+ SND_PCI_QUIRK(0x10f1, 0x2915, "Tyan Thunder n6650W", ALC262_TYAN),
+ SND_PCI_QUIRK_MASK(0x144d, 0xff00, 0xc032, "Samsung Q1",
+ ALC262_ULTRA),
SND_PCI_QUIRK(0x144d, 0xc510, "Samsung Q45", ALC262_HIPPO),
SND_PCI_QUIRK(0x17aa, 0x384e, "Lenovo 3000 y410", ALC262_LENOVO_3000),
SND_PCI_QUIRK(0x17ff, 0x0560, "Benq ED8", ALC262_BENQ_ED8),
.unsol_event = alc262_hippo_unsol_event,
.init_hook = alc262_hippo_automute,
},
+ [ALC262_TYAN] = {
+ .mixers = { alc262_tyan_mixer },
+ .init_verbs = { alc262_init_verbs, alc262_tyan_verbs},
+ .num_dacs = ARRAY_SIZE(alc262_dac_nids),
+ .dac_nids = alc262_dac_nids,
+ .hp_nid = 0x02,
+ .dig_out_nid = ALC262_DIGOUT_NID,
+ .num_channel_mode = ARRAY_SIZE(alc262_modes),
+ .channel_mode = alc262_modes,
+ .input_mux = &alc262_capture_source,
+ .unsol_event = alc262_tyan_unsol_event,
+ .init_hook = alc262_tyan_automute,
+ },
};
static int patch_alc262(struct hda_codec *codec)
}
}
+ if (!spec->no_analog) {
+ err = snd_hda_attach_beep_device(codec, 0x1);
+ if (err < 0) {
+ alc_free(codec);
+ return err;
+ }
+ }
+
if (board_config != ALC262_AUTO)
setup_preset(spec, &alc262_presets[board_config]);
spec->stream_digital_playback = &alc262_pcm_digital_playback;
spec->stream_digital_capture = &alc262_pcm_digital_capture;
- spec->is_mix_capture = 1;
+ spec->capture_style = CAPT_MIX;
if (!spec->adc_nids && spec->input_mux) {
/* check whether NID 0x07 is valid */
unsigned int wcap = get_wcaps(codec, 0x07);
spec->capsrc_nids = alc262_capsrc_nids;
}
}
- if (!spec->cap_mixer)
+ if (!spec->cap_mixer && !spec->no_analog)
set_capture_mixer(spec);
+ if (!spec->no_analog)
+ set_beep_amp(spec, 0x0b, 0x05, HDA_INPUT);
spec->vmaster_nid = 0x0c;
static struct hda_verb alc268_base_init_verbs[] = {
/* Unmute DAC0-1 and set vol = 0 */
{0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO},
- {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
- {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(1)},
{0x03, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO},
- {0x03, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
- {0x03, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(1)},
/*
* Set up output mixers (0x0c - 0x0e)
*/
/* set vol=0 to output mixers */
{0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
- {0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(1)},
- {0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO},
{0x0e, AC_VERB_SET_CONNECT_SEL, 0x00},
{0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
{0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
{0x16, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
{0x18, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
- {0x19, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
{0x1a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
- {0x1c, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
/* set PCBEEP vol = 0, mute connections */
{0x1d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
*/
static struct hda_verb alc268_volume_init_verbs[] = {
/* set output DAC */
- {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
- {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(1)},
- {0x03, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
- {0x03, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(1)},
+ {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO},
+ {0x03, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO},
{0x18, AC_VERB_SET_PIN_WIDGET_CONTROL, 0x24},
{0x19, AC_VERB_SET_PIN_WIDGET_CONTROL, 0x24},
{0x1c, AC_VERB_SET_PIN_WIDGET_CONTROL, 0x20},
{0x1d, AC_VERB_SET_PIN_WIDGET_CONTROL, 0x20},
- {0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO},
{0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
- {0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(1)},
{0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
{0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
{0x18, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
- {0x19, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
{0x1a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
- {0x1c, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
/* set PCBEEP vol = 0, mute connections */
{0x1d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
static int alc268_auto_create_analog_input_ctls(struct alc_spec *spec,
const struct auto_pin_cfg *cfg)
{
- struct hda_input_mux *imux = &spec->private_imux;
+ struct hda_input_mux *imux = &spec->private_imux[0];
int i, idx1;
for (i = 0; i < AUTO_PIN_LAST; i++) {
alc268_ignore);
if (err < 0)
return err;
- if (!spec->autocfg.line_outs)
+ if (!spec->autocfg.line_outs) {
+ if (spec->autocfg.dig_outs || spec->autocfg.dig_in_pin) {
+ spec->multiout.max_channels = 2;
+ spec->no_analog = 1;
+ goto dig_only;
+ }
return 0; /* can't find valid BIOS pin config */
-
+ }
err = alc268_auto_create_multi_out_ctls(spec, &spec->autocfg);
if (err < 0)
return err;
spec->multiout.max_channels = 2;
+ dig_only:
/* digital only support output */
- if (spec->autocfg.dig_out_pin)
+ if (spec->autocfg.dig_outs) {
spec->multiout.dig_out_nid = ALC268_DIGOUT_NID;
-
+ spec->dig_out_type = spec->autocfg.dig_out_type[0];
+ }
if (spec->kctls.list)
add_mixer(spec, spec->kctls.list);
- if (spec->autocfg.speaker_pins[0] != 0x1d)
+ if (!spec->no_analog && spec->autocfg.speaker_pins[0] != 0x1d)
add_mixer(spec, alc268_beep_mixer);
add_verb(spec, alc268_volume_init_verbs);
spec->num_mux_defs = 1;
- spec->input_mux = &spec->private_imux;
+ spec->input_mux = &spec->private_imux[0];
err = alc_auto_add_mic_boost(codec);
if (err < 0)
return err;
- store_pin_configs(codec);
return 1;
}
static struct alc_config_preset alc268_presets[] = {
[ALC267_QUANTA_IL1] = {
- .mixers = { alc267_quanta_il1_mixer },
+ .mixers = { alc267_quanta_il1_mixer, alc268_beep_mixer },
.init_verbs = { alc268_base_init_verbs, alc268_eapd_verbs,
alc267_quanta_il1_verbs },
.num_dacs = ARRAY_SIZE(alc268_dac_nids),
},
[ALC268_ACER_ASPIRE_ONE] = {
.mixers = { alc268_acer_aspire_one_mixer,
- alc268_capture_alt_mixer },
+ alc268_beep_mixer,
+ alc268_capture_alt_mixer },
.init_verbs = { alc268_base_init_verbs, alc268_eapd_verbs,
alc268_acer_aspire_one_verbs },
.num_dacs = ARRAY_SIZE(alc268_dac_nids),
{
struct alc_spec *spec;
int board_config;
- int err;
+ int i, has_beep, err;
spec = kcalloc(1, sizeof(*spec), GFP_KERNEL);
if (spec == NULL)
spec->stream_digital_playback = &alc268_pcm_digital_playback;
- if (!query_amp_caps(codec, 0x1d, HDA_INPUT))
- /* override the amp caps for beep generator */
- snd_hda_override_amp_caps(codec, 0x1d, HDA_INPUT,
+ has_beep = 0;
+ for (i = 0; i < spec->num_mixers; i++) {
+ if (spec->mixers[i] == alc268_beep_mixer) {
+ has_beep = 1;
+ break;
+ }
+ }
+
+ if (has_beep) {
+ err = snd_hda_attach_beep_device(codec, 0x1);
+ if (err < 0) {
+ alc_free(codec);
+ return err;
+ }
+ if (!query_amp_caps(codec, 0x1d, HDA_INPUT))
+ /* override the amp caps for beep generator */
+ snd_hda_override_amp_caps(codec, 0x1d, HDA_INPUT,
(0x0c << AC_AMPCAP_OFFSET_SHIFT) |
(0x0c << AC_AMPCAP_NUM_STEPS_SHIFT) |
(0x07 << AC_AMPCAP_STEP_SIZE_SHIFT) |
(0 << AC_AMPCAP_MUTE_SHIFT));
+ }
- if (!spec->adc_nids && spec->input_mux) {
+ if (!spec->no_analog && !spec->adc_nids && spec->input_mux) {
/* check whether NID 0x07 is valid */
unsigned int wcap = get_wcaps(codec, 0x07);
int i;
HDA_CODEC_MUTE("Line Playback Switch", 0x0b, 0x02, HDA_INPUT),
HDA_CODEC_VOLUME("Mic Playback Volume", 0x0b, 0x0, HDA_INPUT),
HDA_CODEC_MUTE("Mic Playback Switch", 0x0b, 0x0, HDA_INPUT),
- HDA_CODEC_VOLUME("Beep Playback Volume", 0x0b, 0x4, HDA_INPUT),
- HDA_CODEC_MUTE("Beep Playback Switch", 0x0b, 0x4, HDA_INPUT),
HDA_CODEC_VOLUME("Mic Boost", 0x18, 0, HDA_INPUT),
HDA_CODEC_VOLUME("Front Mic Playback Volume", 0x0b, 0x01, HDA_INPUT),
HDA_CODEC_MUTE("Front Mic Playback Switch", 0x0b, 0x01, HDA_INPUT),
HDA_CODEC_VOLUME("Internal Mic Playback Volume", 0x0b, 0x01, HDA_INPUT),
HDA_CODEC_MUTE("Internal Mic Playback Switch", 0x0b, 0x01, HDA_INPUT),
HDA_CODEC_VOLUME("Internal Mic Boost", 0x19, 0, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x0b, 0x04, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x0b, 0x04, HDA_INPUT),
{ }
};
HDA_CODEC_VOLUME("Dock Mic Playback Volume", 0x0b, 0x03, HDA_INPUT),
HDA_CODEC_MUTE("Dock Mic Playback Switch", 0x0b, 0x03, HDA_INPUT),
HDA_CODEC_VOLUME("Dock Mic Boost", 0x1b, 0, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x0b, 0x04, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x0b, 0x04, HDA_INPUT),
{ }
};
{ } /* end */
};
-/* beep control */
-static struct snd_kcontrol_new alc269_beep_mixer[] = {
- HDA_CODEC_VOLUME("Beep Playback Volume", 0x0b, 0x4, HDA_INPUT),
- HDA_CODEC_MUTE("Beep Playback Switch", 0x0b, 0x4, HDA_INPUT),
- { } /* end */
-};
-
static struct hda_verb alc269_quanta_fl1_verbs[] = {
{0x15, AC_VERB_SET_CONNECT_SEL, 0x01},
{0x12, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN},
*/
if (cfg->input_pins[AUTO_PIN_MIC] == 0x12 ||
cfg->input_pins[AUTO_PIN_FRONT_MIC] == 0x12) {
- struct hda_input_mux *imux = &spec->private_imux;
+ struct hda_input_mux *imux = &spec->private_imux[0];
imux->items[imux->num_items].label = "Int Mic";
imux->items[imux->num_items].index = 0x05;
imux->num_items++;
#define alc269_pcm_digital_playback alc880_pcm_digital_playback
#define alc269_pcm_digital_capture alc880_pcm_digital_capture
+static struct hda_pcm_stream alc269_44k_pcm_analog_playback = {
+ .substreams = 1,
+ .channels_min = 2,
+ .channels_max = 8,
+ .rates = SNDRV_PCM_RATE_44100, /* fixed rate */
+ /* NID is set in alc_build_pcms */
+ .ops = {
+ .open = alc880_playback_pcm_open,
+ .prepare = alc880_playback_pcm_prepare,
+ .cleanup = alc880_playback_pcm_cleanup
+ },
+};
+
+static struct hda_pcm_stream alc269_44k_pcm_analog_capture = {
+ .substreams = 1,
+ .channels_min = 2,
+ .channels_max = 2,
+ .rates = SNDRV_PCM_RATE_44100, /* fixed rate */
+ /* NID is set in alc_build_pcms */
+};
+
/*
* BIOS auto configuration
*/
static int alc269_parse_auto_config(struct hda_codec *codec)
{
struct alc_spec *spec = codec->spec;
- int i, err;
+ int err;
static hda_nid_t alc269_ignore[] = { 0x1d, 0 };
err = snd_hda_parse_pin_def_config(codec, &spec->autocfg,
spec->multiout.max_channels = spec->multiout.num_dacs * 2;
- if (spec->autocfg.dig_out_pin)
+ if (spec->autocfg.dig_outs)
spec->multiout.dig_out_nid = ALC269_DIGOUT_NID;
if (spec->kctls.list)
add_mixer(spec, spec->kctls.list);
- /* create a beep mixer control if the pin 0x1d isn't assigned */
- for (i = 0; i < ARRAY_SIZE(spec->autocfg.input_pins); i++)
- if (spec->autocfg.input_pins[i] == 0x1d)
- break;
- if (i >= ARRAY_SIZE(spec->autocfg.input_pins))
- add_mixer(spec, alc269_beep_mixer);
-
add_verb(spec, alc269_init_verbs);
spec->num_mux_defs = 1;
- spec->input_mux = &spec->private_imux;
+ spec->input_mux = &spec->private_imux[0];
/* set default input source */
snd_hda_codec_write_cache(codec, alc269_capsrc_nids[0],
0, AC_VERB_SET_CONNECT_SEL,
if (err < 0)
return err;
- if (!spec->cap_mixer)
+ if (!spec->cap_mixer && !spec->no_analog)
set_capture_mixer(spec);
- store_pin_configs(codec);
return 1;
}
.init_hook = alc269_eeepc_dmic_inithook,
},
[ALC269_FUJITSU] = {
- .mixers = { alc269_fujitsu_mixer, alc269_beep_mixer },
+ .mixers = { alc269_fujitsu_mixer },
.cap_mixer = alc269_epc_capture_mixer,
.init_verbs = { alc269_init_verbs,
alc269_eeepc_dmic_init_verbs },
}
}
+ err = snd_hda_attach_beep_device(codec, 0x1);
+ if (err < 0) {
+ alc_free(codec);
+ return err;
+ }
+
if (board_config != ALC269_AUTO)
setup_preset(spec, &alc269_presets[board_config]);
spec->stream_name_analog = "ALC269 Analog";
- spec->stream_analog_playback = &alc269_pcm_analog_playback;
- spec->stream_analog_capture = &alc269_pcm_analog_capture;
-
+ if (codec->subsystem_id == 0x17aa3bf8) {
+ /* Due to a hardware problem on Lenovo Ideadpad, we need to
+ * fix the sample rate of analog I/O to 44.1kHz
+ */
+ spec->stream_analog_playback = &alc269_44k_pcm_analog_playback;
+ spec->stream_analog_capture = &alc269_44k_pcm_analog_capture;
+ } else {
+ spec->stream_analog_playback = &alc269_pcm_analog_playback;
+ spec->stream_analog_capture = &alc269_pcm_analog_capture;
+ }
spec->stream_name_digital = "ALC269 Digital";
spec->stream_digital_playback = &alc269_pcm_digital_playback;
spec->stream_digital_capture = &alc269_pcm_digital_capture;
spec->capsrc_nids = alc269_capsrc_nids;
if (!spec->cap_mixer)
set_capture_mixer(spec);
+ set_beep_amp(spec, 0x0b, 0x04, HDA_INPUT);
codec->patch_ops = alc_patch_ops;
if (board_config == ALC269_AUTO)
static struct snd_kcontrol_new alc861_asus_laptop_mixer[] = {
HDA_CODEC_VOLUME("CD Playback Volume", 0x15, 0x0, HDA_INPUT),
HDA_CODEC_MUTE("CD Playback Switch", 0x15, 0x0, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Beep Playback Volume", 0x23, 0x0, HDA_OUTPUT),
- HDA_CODEC_MUTE("PC Beep Playback Switch", 0x23, 0x0, HDA_OUTPUT),
{ }
};
static int alc861_auto_create_analog_input_ctls(struct alc_spec *spec,
const struct auto_pin_cfg *cfg)
{
- struct hda_input_mux *imux = &spec->private_imux;
+ struct hda_input_mux *imux = &spec->private_imux[0];
int i, err, idx, idx1;
for (i = 0; i < AUTO_PIN_LAST; i++) {
for (i = 0; i < AUTO_PIN_LAST; i++) {
hda_nid_t nid = spec->autocfg.input_pins[i];
- if (nid >= 0x0c && nid <= 0x11) {
- snd_hda_codec_write(codec, nid, 0,
- AC_VERB_SET_PIN_WIDGET_CONTROL,
- i <= AUTO_PIN_FRONT_MIC ?
- PIN_VREF80 : PIN_IN);
- }
+ if (nid >= 0x0c && nid <= 0x11)
+ alc_set_input_pin(codec, nid, i);
}
}
spec->multiout.max_channels = spec->multiout.num_dacs * 2;
- if (spec->autocfg.dig_out_pin)
+ if (spec->autocfg.dig_outs)
spec->multiout.dig_out_nid = ALC861_DIGOUT_NID;
if (spec->kctls.list)
add_verb(spec, alc861_auto_init_verbs);
spec->num_mux_defs = 1;
- spec->input_mux = &spec->private_imux;
+ spec->input_mux = &spec->private_imux[0];
spec->adc_nids = alc861_adc_nids;
spec->num_adc_nids = ARRAY_SIZE(alc861_adc_nids);
set_capture_mixer(spec);
- store_pin_configs(codec);
return 1;
}
}
}
+ err = snd_hda_attach_beep_device(codec, 0x23);
+ if (err < 0) {
+ alc_free(codec);
+ return err;
+ }
+
if (board_config != ALC861_AUTO)
setup_preset(spec, &alc861_presets[board_config]);
spec->stream_digital_playback = &alc861_pcm_digital_playback;
spec->stream_digital_capture = &alc861_pcm_digital_capture;
+ set_beep_amp(spec, 0x23, 0, HDA_OUTPUT);
+
spec->vmaster_nid = 0x03;
codec->patch_ops = alc_patch_ops;
HDA_CODEC_VOLUME("CD Playback Volume", 0x0b, 0x04, HDA_INPUT),
HDA_CODEC_MUTE("CD Playback Switch", 0x0b, 0x04, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x0b, 0x05, HDA_INPUT),
-
{ } /* end */
};
HDA_CODEC_VOLUME("CD Playback Volume", 0x0b, 0x04, HDA_INPUT),
HDA_CODEC_MUTE("CD Playback Switch", 0x0b, 0x04, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x0b, 0x05, HDA_INPUT),
-
{ } /* end */
};
HDA_CODEC_VOLUME("Int Mic Boost", 0x19, 0, HDA_INPUT),
HDA_CODEC_VOLUME("Int Mic Playback Volume", 0x0b, 0x1, HDA_INPUT),
HDA_CODEC_MUTE("Int Mic Playback Switch", 0x0b, 0x1, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Beep Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Beep Switch", 0x0b, 0x05, HDA_INPUT),
{ } /* end */
};
SND_PCI_QUIRK(0x1179, 0xff03, "Toshiba P205", ALC861VD_LENOVO),
SND_PCI_QUIRK(0x1179, 0xff31, "Toshiba L30-149", ALC861VD_DALLAS),
SND_PCI_QUIRK(0x1565, 0x820d, "Biostar NF61S SE", ALC861VD_6ST_DIG),
- SND_PCI_QUIRK(0x17aa, 0x2066, "Lenovo", ALC861VD_LENOVO),
- SND_PCI_QUIRK(0x17aa, 0x3802, "Lenovo 3000 C200", ALC861VD_LENOVO),
- SND_PCI_QUIRK(0x17aa, 0x384e, "Lenovo 3000 N200", ALC861VD_LENOVO),
+ SND_PCI_QUIRK_VENDOR(0x17aa, "Lenovo", ALC861VD_LENOVO),
SND_PCI_QUIRK(0x1849, 0x0862, "ASRock K8NF6G-VSTA", ALC861VD_6ST_DIG),
{}
};
for (i = 0; i < AUTO_PIN_LAST; i++) {
hda_nid_t nid = spec->autocfg.input_pins[i];
if (alc861vd_is_input_pin(nid)) {
- snd_hda_codec_write(codec, nid, 0,
- AC_VERB_SET_PIN_WIDGET_CONTROL,
- i <= AUTO_PIN_FRONT_MIC ?
- PIN_VREF80 : PIN_IN);
- if (nid != ALC861VD_PIN_CD_NID)
+ alc_set_input_pin(codec, nid, i);
+ if (nid != ALC861VD_PIN_CD_NID &&
+ (get_wcaps(codec, nid) & AC_WCAP_OUT_AMP))
snd_hda_codec_write(codec, nid, 0,
AC_VERB_SET_AMP_GAIN_MUTE,
AMP_OUT_MUTE);
spec->multiout.max_channels = spec->multiout.num_dacs * 2;
- if (spec->autocfg.dig_out_pin)
+ if (spec->autocfg.dig_outs)
spec->multiout.dig_out_nid = ALC861VD_DIGOUT_NID;
if (spec->kctls.list)
add_verb(spec, alc861vd_volume_init_verbs);
spec->num_mux_defs = 1;
- spec->input_mux = &spec->private_imux;
+ spec->input_mux = &spec->private_imux[0];
err = alc_auto_add_mic_boost(codec);
if (err < 0)
return err;
- store_pin_configs(codec);
return 1;
}
}
}
+ err = snd_hda_attach_beep_device(codec, 0x23);
+ if (err < 0) {
+ alc_free(codec);
+ return err;
+ }
+
if (board_config != ALC861VD_AUTO)
setup_preset(spec, &alc861vd_presets[board_config]);
spec->adc_nids = alc861vd_adc_nids;
spec->num_adc_nids = ARRAY_SIZE(alc861vd_adc_nids);
spec->capsrc_nids = alc861vd_capsrc_nids;
- spec->is_mix_capture = 1;
+ spec->capture_style = CAPT_MIX;
set_capture_mixer(spec);
+ set_beep_amp(spec, 0x0b, 0x05, HDA_INPUT);
spec->vmaster_nid = 0x02;
HDA_CODEC_MUTE("Mic Playback Switch", 0x0b, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Front Mic Playback Volume", 0x0b, 0x1, HDA_INPUT),
HDA_CODEC_MUTE("Front Mic Playback Switch", 0x0b, 0x1, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x0b, 0x05, HDA_INPUT),
{ } /* end */
};
HDA_CODEC_MUTE("Mic Playback Switch", 0x0b, 0x0, HDA_INPUT),
HDA_CODEC_VOLUME("Front Mic Playback Volume", 0x0b, 0x1, HDA_INPUT),
HDA_CODEC_MUTE("Front Mic Playback Switch", 0x0b, 0x1, HDA_INPUT),
- HDA_CODEC_VOLUME("PC Speaker Playback Volume", 0x0b, 0x05, HDA_INPUT),
- HDA_CODEC_MUTE("PC Speaker Playback Switch", 0x0b, 0x05, HDA_INPUT),
{ } /* end */
};
};
static struct snd_pci_quirk alc662_cfg_tbl[] = {
- SND_PCI_QUIRK(0x1043, 0x1878, "ASUS M51VA", ALC663_ASUS_M51VA),
- SND_PCI_QUIRK(0x1043, 0x19a3, "ASUS G50V", ALC663_ASUS_G50V),
- SND_PCI_QUIRK(0x1043, 0x8290, "ASUS P5GC-MX", ALC662_3ST_6ch_DIG),
- SND_PCI_QUIRK(0x1043, 0x82a1, "ASUS Eeepc", ALC662_ASUS_EEEPC_P701),
- SND_PCI_QUIRK(0x1043, 0x82d1, "ASUS Eeepc EP20", ALC662_ASUS_EEEPC_EP20),
- SND_PCI_QUIRK(0x1043, 0x1903, "ASUS F5GL", ALC663_ASUS_MODE1),
- SND_PCI_QUIRK(0x1043, 0x1878, "ASUS M50Vr", ALC663_ASUS_MODE1),
+ SND_PCI_QUIRK(0x1019, 0x9087, "ECS", ALC662_ECS),
SND_PCI_QUIRK(0x1043, 0x1000, "ASUS N50Vm", ALC663_ASUS_MODE1),
- SND_PCI_QUIRK(0x1043, 0x19b3, "ASUS F7Z", ALC663_ASUS_MODE1),
- SND_PCI_QUIRK(0x1043, 0x1953, "ASUS NB", ALC663_ASUS_MODE1),
- SND_PCI_QUIRK(0x1043, 0x19a3, "ASUS NB", ALC663_ASUS_MODE1),
+ SND_PCI_QUIRK(0x1043, 0x1092, "ASUS NB", ALC663_ASUS_MODE3),
+ SND_PCI_QUIRK(0x1043, 0x11c3, "ASUS M70V", ALC663_ASUS_MODE3),
SND_PCI_QUIRK(0x1043, 0x11d3, "ASUS NB", ALC663_ASUS_MODE1),
+ SND_PCI_QUIRK(0x1043, 0x11f3, "ASUS NB", ALC662_ASUS_MODE2),
SND_PCI_QUIRK(0x1043, 0x1203, "ASUS NB", ALC663_ASUS_MODE1),
- SND_PCI_QUIRK(0x1043, 0x19e3, "ASUS NB", ALC663_ASUS_MODE1),
- SND_PCI_QUIRK(0x1043, 0x1993, "ASUS N20", ALC663_ASUS_MODE1),
- SND_PCI_QUIRK(0x1043, 0x19c3, "ASUS F5Z/F6x", ALC662_ASUS_MODE2),
SND_PCI_QUIRK(0x1043, 0x1339, "ASUS NB", ALC662_ASUS_MODE2),
- SND_PCI_QUIRK(0x1043, 0x1913, "ASUS NB", ALC662_ASUS_MODE2),
- SND_PCI_QUIRK(0x1043, 0x1843, "ASUS NB", ALC662_ASUS_MODE2),
+ SND_PCI_QUIRK(0x1043, 0x16c3, "ASUS NB", ALC662_ASUS_MODE2),
+ SND_PCI_QUIRK(0x1043, 0x1753, "ASUS NB", ALC662_ASUS_MODE2),
+ SND_PCI_QUIRK(0x1043, 0x1763, "ASUS NB", ALC663_ASUS_MODE6),
+ SND_PCI_QUIRK(0x1043, 0x1765, "ASUS NB", ALC663_ASUS_MODE6),
+ SND_PCI_QUIRK(0x1043, 0x1783, "ASUS NB", ALC662_ASUS_MODE2),
SND_PCI_QUIRK(0x1043, 0x1813, "ASUS NB", ALC662_ASUS_MODE2),
- SND_PCI_QUIRK(0x1043, 0x11f3, "ASUS NB", ALC662_ASUS_MODE2),
- SND_PCI_QUIRK(0x1043, 0x1876, "ASUS NB", ALC662_ASUS_MODE2),
+ SND_PCI_QUIRK(0x1043, 0x1823, "ASUS NB", ALC663_ASUS_MODE5),
+ SND_PCI_QUIRK(0x1043, 0x1833, "ASUS NB", ALC663_ASUS_MODE6),
+ SND_PCI_QUIRK(0x1043, 0x1843, "ASUS NB", ALC662_ASUS_MODE2),
SND_PCI_QUIRK(0x1043, 0x1864, "ASUS NB", ALC662_ASUS_MODE2),
- SND_PCI_QUIRK(0x1043, 0x1783, "ASUS NB", ALC662_ASUS_MODE2),
- SND_PCI_QUIRK(0x1043, 0x1753, "ASUS NB", ALC662_ASUS_MODE2),
- SND_PCI_QUIRK(0x1043, 0x16c3, "ASUS NB", ALC662_ASUS_MODE2),
- SND_PCI_QUIRK(0x1043, 0x1933, "ASUS F80Q", ALC662_ASUS_MODE2),
+ SND_PCI_QUIRK(0x1043, 0x1876, "ASUS NB", ALC662_ASUS_MODE2),
+ SND_PCI_QUIRK(0x1043, 0x1878, "ASUS M51VA", ALC663_ASUS_M51VA),
+ /*SND_PCI_QUIRK(0x1043, 0x1878, "ASUS M50Vr", ALC663_ASUS_MODE1),*/
SND_PCI_QUIRK(0x1043, 0x1893, "ASUS M50Vm", ALC663_ASUS_MODE3),
- SND_PCI_QUIRK(0x1043, 0x11c3, "ASUS M70V", ALC663_ASUS_MODE3),
- SND_PCI_QUIRK(0x1043, 0x1963, "ASUS X71C", ALC663_ASUS_MODE3),
SND_PCI_QUIRK(0x1043, 0x1894, "ASUS X55", ALC663_ASUS_MODE3),
- SND_PCI_QUIRK(0x1043, 0x1092, "ASUS NB", ALC663_ASUS_MODE3),
+ SND_PCI_QUIRK(0x1043, 0x1903, "ASUS F5GL", ALC663_ASUS_MODE1),
+ SND_PCI_QUIRK(0x1043, 0x1913, "ASUS NB", ALC662_ASUS_MODE2),
+ SND_PCI_QUIRK(0x1043, 0x1933, "ASUS F80Q", ALC662_ASUS_MODE2),
+ SND_PCI_QUIRK(0x1043, 0x1953, "ASUS NB", ALC663_ASUS_MODE1),
+ SND_PCI_QUIRK(0x1043, 0x1963, "ASUS X71C", ALC663_ASUS_MODE3),
+ SND_PCI_QUIRK(0x1043, 0x1993, "ASUS N20", ALC663_ASUS_MODE1),
+ SND_PCI_QUIRK(0x1043, 0x19a3, "ASUS G50V", ALC663_ASUS_G50V),
+ /*SND_PCI_QUIRK(0x1043, 0x19a3, "ASUS NB", ALC663_ASUS_MODE1),*/
+ SND_PCI_QUIRK(0x1043, 0x19b3, "ASUS F7Z", ALC663_ASUS_MODE1),
+ SND_PCI_QUIRK(0x1043, 0x19c3, "ASUS F5Z/F6x", ALC662_ASUS_MODE2),
+ SND_PCI_QUIRK(0x1043, 0x19e3, "ASUS NB", ALC663_ASUS_MODE1),
SND_PCI_QUIRK(0x1043, 0x19f3, "ASUS NB", ALC663_ASUS_MODE4),
- SND_PCI_QUIRK(0x1043, 0x1823, "ASUS NB", ALC663_ASUS_MODE5),
- SND_PCI_QUIRK(0x1043, 0x1833, "ASUS NB", ALC663_ASUS_MODE6),
- SND_PCI_QUIRK(0x1043, 0x1763, "ASUS NB", ALC663_ASUS_MODE6),
- SND_PCI_QUIRK(0x1043, 0x1765, "ASUS NB", ALC663_ASUS_MODE6),
+ SND_PCI_QUIRK(0x1043, 0x8290, "ASUS P5GC-MX", ALC662_3ST_6ch_DIG),
+ SND_PCI_QUIRK(0x1043, 0x82a1, "ASUS Eeepc", ALC662_ASUS_EEEPC_P701),
+ SND_PCI_QUIRK(0x1043, 0x82d1, "ASUS Eeepc EP20", ALC662_ASUS_EEEPC_EP20),
+ SND_PCI_QUIRK(0x105b, 0x0cd6, "Foxconn", ALC662_ECS),
SND_PCI_QUIRK(0x105b, 0x0d47, "Foxconn 45CMX/45GMX/45CMX-K",
ALC662_3ST_6ch_DIG),
- SND_PCI_QUIRK(0x17aa, 0x101e, "Lenovo", ALC662_LENOVO_101E),
- SND_PCI_QUIRK(0x1019, 0x9087, "ECS", ALC662_ECS),
- SND_PCI_QUIRK(0x105b, 0x0cd6, "Foxconn", ALC662_ECS),
SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte 945GCM-S2L",
ALC662_3ST_6ch_DIG),
SND_PCI_QUIRK(0x1565, 0x820f, "Biostar TA780G M2+", ALC662_3ST_6ch_DIG),
+ SND_PCI_QUIRK(0x17aa, 0x101e, "Lenovo", ALC662_LENOVO_101E),
SND_PCI_QUIRK(0x1849, 0x3662, "ASROCK K10N78FullHD-hSLI R3.0",
ALC662_3ST_6ch_DIG),
- SND_PCI_QUIRK(0x1854, 0x2000, "ASUS H13-2000", ALC663_ASUS_H13),
- SND_PCI_QUIRK(0x1854, 0x2001, "ASUS H13-2001", ALC663_ASUS_H13),
- SND_PCI_QUIRK(0x1854, 0x2002, "ASUS H13-2002", ALC663_ASUS_H13),
+ SND_PCI_QUIRK_MASK(0x1854, 0xf000, 0x2000, "ASUS H13-200x",
+ ALC663_ASUS_H13),
{}
};
if (alc880_is_fixed_pin(pin)) {
nid = alc880_idx_to_dac(alc880_fixed_pin_idx(pin));
- /* printk("DAC nid=%x\n",nid); */
+ /* printk(KERN_DEBUG "DAC nid=%x\n",nid); */
/* specify the DAC as the extra output */
if (!spec->multiout.hp_nid)
spec->multiout.hp_nid = nid;
return 0;
}
+/* return the index of the src widget from the connection list of the nid.
+ * return -1 if not found
+ */
+static int alc662_input_pin_idx(struct hda_codec *codec, hda_nid_t nid,
+ hda_nid_t src)
+{
+ hda_nid_t conn_list[HDA_MAX_CONNECTIONS];
+ int i, conns;
+
+ conns = snd_hda_get_connections(codec, nid, conn_list,
+ ARRAY_SIZE(conn_list));
+ if (conns < 0)
+ return -1;
+ for (i = 0; i < conns; i++)
+ if (conn_list[i] == src)
+ return i;
+ return -1;
+}
+
+static int alc662_is_input_pin(struct hda_codec *codec, hda_nid_t nid)
+{
+ unsigned int pincap = snd_hda_query_pin_caps(codec, nid);
+ return (pincap & AC_PINCAP_IN) != 0;
+}
+
/* create playback/capture controls for input pins */
-static int alc662_auto_create_analog_input_ctls(struct alc_spec *spec,
+static int alc662_auto_create_analog_input_ctls(struct hda_codec *codec,
const struct auto_pin_cfg *cfg)
{
- struct hda_input_mux *imux = &spec->private_imux;
+ struct alc_spec *spec = codec->spec;
+ struct hda_input_mux *imux = &spec->private_imux[0];
int i, err, idx;
for (i = 0; i < AUTO_PIN_LAST; i++) {
- if (alc880_is_input_pin(cfg->input_pins[i])) {
- idx = alc880_input_pin_idx(cfg->input_pins[i]);
- err = new_analog_input(spec, cfg->input_pins[i],
- auto_pin_cfg_labels[i],
- idx, 0x0b);
- if (err < 0)
- return err;
- imux->items[imux->num_items].label =
- auto_pin_cfg_labels[i];
- imux->items[imux->num_items].index =
- alc880_input_pin_idx(cfg->input_pins[i]);
- imux->num_items++;
+ if (alc662_is_input_pin(codec, cfg->input_pins[i])) {
+ idx = alc662_input_pin_idx(codec, 0x0b,
+ cfg->input_pins[i]);
+ if (idx >= 0) {
+ err = new_analog_input(spec, cfg->input_pins[i],
+ auto_pin_cfg_labels[i],
+ idx, 0x0b);
+ if (err < 0)
+ return err;
+ }
+ idx = alc662_input_pin_idx(codec, 0x22,
+ cfg->input_pins[i]);
+ if (idx >= 0) {
+ imux->items[imux->num_items].label =
+ auto_pin_cfg_labels[i];
+ imux->items[imux->num_items].index = idx;
+ imux->num_items++;
+ }
}
}
return 0;
alc662_auto_set_output_and_unmute(codec, pin, PIN_OUT, 0);
}
-#define alc662_is_input_pin(nid) alc880_is_input_pin(nid)
#define ALC662_PIN_CD_NID ALC880_PIN_CD_NID
static void alc662_auto_init_analog_input(struct hda_codec *codec)
for (i = 0; i < AUTO_PIN_LAST; i++) {
hda_nid_t nid = spec->autocfg.input_pins[i];
- if (alc662_is_input_pin(nid)) {
- snd_hda_codec_write(codec, nid, 0,
- AC_VERB_SET_PIN_WIDGET_CONTROL,
- (i <= AUTO_PIN_FRONT_MIC ?
- PIN_VREF80 : PIN_IN));
- if (nid != ALC662_PIN_CD_NID)
+ if (alc662_is_input_pin(codec, nid)) {
+ alc_set_input_pin(codec, nid, i);
+ if (nid != ALC662_PIN_CD_NID &&
+ (get_wcaps(codec, nid) & AC_WCAP_OUT_AMP))
snd_hda_codec_write(codec, nid, 0,
AC_VERB_SET_AMP_GAIN_MUTE,
AMP_OUT_MUTE);
"Headphone");
if (err < 0)
return err;
- err = alc662_auto_create_analog_input_ctls(spec, &spec->autocfg);
+ err = alc662_auto_create_analog_input_ctls(codec, &spec->autocfg);
if (err < 0)
return err;
spec->multiout.max_channels = spec->multiout.num_dacs * 2;
- if (spec->autocfg.dig_out_pin)
+ if (spec->autocfg.dig_outs)
spec->multiout.dig_out_nid = ALC880_DIGOUT_NID;
if (spec->kctls.list)
add_mixer(spec, spec->kctls.list);
spec->num_mux_defs = 1;
- spec->input_mux = &spec->private_imux;
+ spec->input_mux = &spec->private_imux[0];
add_verb(spec, alc662_auto_init_verbs);
if (codec->vendor_id == 0x10ec0663)
if (err < 0)
return err;
- store_pin_configs(codec);
return 1;
}
}
}
+ err = snd_hda_attach_beep_device(codec, 0x1);
+ if (err < 0) {
+ alc_free(codec);
+ return err;
+ }
+
if (board_config != ALC662_AUTO)
setup_preset(spec, &alc662_presets[board_config]);
spec->adc_nids = alc662_adc_nids;
spec->num_adc_nids = ARRAY_SIZE(alc662_adc_nids);
spec->capsrc_nids = alc662_capsrc_nids;
- spec->is_mix_capture = 1;
+ spec->capture_style = CAPT_MIX;
if (!spec->cap_mixer)
set_capture_mixer(spec);
+ if (codec->vendor_id == 0x10ec0662)
+ set_beep_amp(spec, 0x0b, 0x05, HDA_INPUT);
+ else
+ set_beep_amp(spec, 0x0b, 0x04, HDA_INPUT);
spec->vmaster_nid = 0x02;
};
enum {
+ STAC_AUTO,
STAC_REF,
STAC_9200_OQO,
STAC_9200_DELL_D21,
};
enum {
+ STAC_9205_AUTO,
STAC_9205_REF,
STAC_9205_DELL_M42,
STAC_9205_DELL_M43,
STAC_9205_DELL_M44,
+ STAC_9205_EAPD,
STAC_9205_MODELS
};
enum {
+ STAC_92HD73XX_AUTO,
STAC_92HD73XX_NO_JD, /* no jack-detection */
STAC_92HD73XX_REF,
STAC_DELL_M6_AMIC,
};
enum {
+ STAC_92HD83XXX_AUTO,
STAC_92HD83XXX_REF,
STAC_92HD83XXX_PWR_REF,
+ STAC_DELL_S14,
STAC_92HD83XXX_MODELS
};
enum {
+ STAC_92HD71BXX_AUTO,
STAC_92HD71BXX_REF,
STAC_DELL_M4_1,
STAC_DELL_M4_2,
STAC_DELL_M4_3,
STAC_HP_M4,
STAC_HP_DV5,
+ STAC_HP_HDX,
STAC_92HD71BXX_MODELS
};
enum {
+ STAC_925x_AUTO,
STAC_925x_REF,
STAC_M1,
STAC_M1_2,
};
enum {
+ STAC_922X_AUTO,
STAC_D945_REF,
STAC_D945GTP3,
STAC_D945GTP5,
};
enum {
+ STAC_927X_AUTO,
STAC_D965_REF_NO_JD, /* no jack-detection */
STAC_D965_REF,
STAC_D965_3ST,
STAC_927X_MODELS
};
+enum {
+ STAC_9872_AUTO,
+ STAC_9872_VAIO,
+ STAC_9872_MODELS
+};
+
struct sigmatel_event {
hda_nid_t nid;
unsigned char type;
unsigned int alt_switch: 1;
unsigned int hp_detect: 1;
unsigned int spdif_mute: 1;
+ unsigned int check_volume_offset:1;
/* gpio lines */
unsigned int eapd_mask;
unsigned int stream_delay;
/* analog loopback */
+ struct snd_kcontrol_new *aloopback_ctl;
unsigned char aloopback_mask;
unsigned char aloopback_shift;
hda_nid_t hp_dacs[5];
hda_nid_t speaker_dacs[5];
+ int volume_offset;
+
/* capture */
hda_nid_t *adc_nids;
unsigned int num_adcs;
/* pin widgets */
hda_nid_t *pin_nids;
unsigned int num_pins;
- unsigned int *pin_configs;
/* codec specific stuff */
struct hda_verb *init;
0x12, 0x13,
};
+static hda_nid_t stac927x_slave_dig_outs[2] = {
+ 0x1f, 0,
+};
+
static hda_nid_t stac927x_adc_nids[3] = {
0x07, 0x08, 0x09
};
0x14, 0x22, 0x23
};
-static hda_nid_t stac92hd83xxx_pin_nids[14] = {
+static hda_nid_t stac92hd83xxx_pin_nids[10] = {
0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
- 0x0f, 0x10, 0x11, 0x12, 0x13,
- 0x1d, 0x1e, 0x1f, 0x20
+ 0x0f, 0x10, 0x11, 0x1f, 0x20,
+};
+
+#define STAC92HD71BXX_NUM_PINS 13
+static hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = {
+ 0x0a, 0x0b, 0x0c, 0x0d, 0x00,
+ 0x00, 0x14, 0x18, 0x19, 0x1e,
+ 0x1f, 0x20, 0x27
};
-static hda_nid_t stac92hd71bxx_pin_nids[11] = {
+static hda_nid_t stac92hd71bxx_pin_nids_6port[STAC92HD71BXX_NUM_PINS] = {
0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
0x0f, 0x14, 0x18, 0x19, 0x1e,
- 0x1f,
+ 0x1f, 0x20, 0x27
};
static hda_nid_t stac927x_pin_nids[14] = {
};
static struct hda_verb stac92hd83xxx_core_init[] = {
- { 0xa, AC_VERB_SET_CONNECT_SEL, 0x0},
- { 0xb, AC_VERB_SET_CONNECT_SEL, 0x0},
- { 0xd, AC_VERB_SET_CONNECT_SEL, 0x1},
+ { 0xa, AC_VERB_SET_CONNECT_SEL, 0x1},
+ { 0xb, AC_VERB_SET_CONNECT_SEL, 0x1},
+ { 0xd, AC_VERB_SET_CONNECT_SEL, 0x0},
/* power state controls amps */
{ 0x01, AC_VERB_SET_EAPD, 1 << 2},
static struct hda_verb stac92hd71bxx_core_init[] = {
/* set master volume and direct control */
{ 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
- /* unmute right and left channels for nodes 0x0a, 0xd, 0x0f */
- { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
- { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
- { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
{}
};
-#define HD_DISABLE_PORTF 2
+#define HD_DISABLE_PORTF 1
static struct hda_verb stac92hd71bxx_analog_core_init[] = {
/* start of config #1 */
/* connect port 0f to audio mixer */
{ 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
- /* unmute right and left channels for node 0x0f */
- { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
/* start of config #2 */
/* set master volume and direct control */
{ 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
- /* unmute right and left channels for nodes 0x0a, 0xd */
+ {}
+};
+
+static struct hda_verb stac92hd71bxx_unmute_core_init[] = {
+ /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
+ { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
{ 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
{ 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
{}
.private_value = HDA_COMPOSE_AMP_VAL(nid, chs, idx, dir) \
}
-#define STAC_INPUT_SOURCE(cnt) \
- { \
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
- .name = "Input Source", \
- .count = cnt, \
- .info = stac92xx_mux_enum_info, \
- .get = stac92xx_mux_enum_get, \
- .put = stac92xx_mux_enum_put, \
- }
-
#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
{ \
.iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
static struct snd_kcontrol_new stac9200_mixer[] = {
HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
- STAC_INPUT_SOURCE(1),
HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
{ } /* end */
HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
- STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
-
HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
{ } /* end */
};
-static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
+static struct snd_kcontrol_new stac92hd73xx_6ch_loopback[] = {
+ STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
+ {}
+};
+
+static struct snd_kcontrol_new stac92hd73xx_8ch_loopback[] = {
STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
+ {}
+};
+static struct snd_kcontrol_new stac92hd73xx_10ch_loopback[] = {
+ STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
+ {}
+};
+
+static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
};
static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
- STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
-
HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
};
static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
- STAC_INPUT_SOURCE(2),
- STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
-
HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
{ } /* end */
};
-static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
- STAC_INPUT_SOURCE(2),
- STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
+static struct snd_kcontrol_new stac92hd71bxx_loopback[] = {
+ STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2)
+};
+static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
static struct snd_kcontrol_new stac925x_mixer[] = {
HDA_CODEC_VOLUME("Master Playback Volume", 0x0e, 0, HDA_OUTPUT),
HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
- STAC_INPUT_SOURCE(1),
HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
{ } /* end */
};
static struct snd_kcontrol_new stac9205_mixer[] = {
- STAC_INPUT_SOURCE(2),
- STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
-
HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
{ } /* end */
};
+static struct snd_kcontrol_new stac9205_loopback[] = {
+ STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
+ {}
+};
+
/* This needs to be generated dynamically based on sequence */
static struct snd_kcontrol_new stac922x_mixer[] = {
- STAC_INPUT_SOURCE(2),
HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
static struct snd_kcontrol_new stac927x_mixer[] = {
- STAC_INPUT_SOURCE(3),
- STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
-
HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
{ } /* end */
};
+static struct snd_kcontrol_new stac927x_loopback[] = {
+ STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
+ {}
+};
+
static struct snd_kcontrol_new stac_dmux_mixer = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Digital Input Source",
"LFE Playback Volume",
"Side Playback Volume",
"Headphone Playback Volume",
- "Headphone2 Playback Volume",
"Speaker Playback Volume",
- "External Speaker Playback Volume",
- "Speaker2 Playback Volume",
NULL
};
"LFE Playback Switch",
"Side Playback Switch",
"Headphone Playback Switch",
- "Headphone2 Playback Switch",
"Speaker Playback Switch",
- "External Speaker Playback Switch",
- "Speaker2 Playback Switch",
"IEC958 Playback Switch",
NULL
};
unsigned int vmaster_tlv[4];
snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
HDA_OUTPUT, vmaster_tlv);
+ /* correct volume offset */
+ vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
err = snd_hda_add_vmaster(codec, "Master Playback Volume",
vmaster_tlv, slave_vols);
if (err < 0)
return err;
}
+ if (spec->aloopback_ctl &&
+ snd_hda_get_bool_hint(codec, "loopback") == 1) {
+ err = snd_hda_add_new_ctls(codec, spec->aloopback_ctl);
+ if (err < 0)
+ return err;
+ }
+
stac92xx_free_kctls(codec); /* no longer needed */
/* create jack input elements */
};
static const char *stac9200_models[STAC_9200_MODELS] = {
+ [STAC_AUTO] = "auto",
[STAC_REF] = "ref",
[STAC_9200_OQO] = "oqo",
[STAC_9200_DELL_D21] = "dell-d21",
/* SigmaTel reference board */
SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
"DFI LanParty", STAC_REF),
+ SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
+ "DFI LanParty", STAC_REF),
/* Dell laptops have BIOS problem */
SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
"unknown Dell", STAC_9200_DELL_D21),
};
static const char *stac925x_models[STAC_925x_MODELS] = {
+ [STAC_925x_AUTO] = "auto",
[STAC_REF] = "ref",
[STAC_M1] = "m1",
[STAC_M1_2] = "m1-2",
static struct snd_pci_quirk stac925x_cfg_tbl[] = {
/* SigmaTel reference board */
SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
+ SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
/* Default table for unknown ID */
};
static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
+ [STAC_92HD73XX_AUTO] = "auto",
[STAC_92HD73XX_NO_JD] = "no-jd",
[STAC_92HD73XX_REF] = "ref",
[STAC_DELL_M6_AMIC] = "dell-m6-amic",
/* SigmaTel reference board */
SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
"DFI LanParty", STAC_92HD73XX_REF),
+ SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
+ "DFI LanParty", STAC_92HD73XX_REF),
SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
"Dell Studio 1535", STAC_DELL_M6_DMIC),
SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
{} /* terminator */
};
-static unsigned int ref92hd83xxx_pin_configs[14] = {
+static unsigned int ref92hd83xxx_pin_configs[10] = {
0x02214030, 0x02211010, 0x02a19020, 0x02170130,
0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
- 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x40f000f0,
0x01451160, 0x98560170,
};
+static unsigned int dell_s14_pin_configs[10] = {
+ 0x02214030, 0x02211010, 0x02a19020, 0x01014050,
+ 0x40f000f0, 0x01819040, 0x40f000f0, 0x90a60160,
+ 0x40f000f0, 0x40f000f0,
+};
+
static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
[STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
[STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
+ [STAC_DELL_S14] = dell_s14_pin_configs,
};
static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
+ [STAC_92HD83XXX_AUTO] = "auto",
[STAC_92HD83XXX_REF] = "ref",
[STAC_92HD83XXX_PWR_REF] = "mic-ref",
+ [STAC_DELL_S14] = "dell-s14",
};
static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
/* SigmaTel reference board */
SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
"DFI LanParty", STAC_92HD83XXX_REF),
+ SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
+ "DFI LanParty", STAC_92HD83XXX_REF),
+ SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
+ "unknown Dell", STAC_DELL_S14),
{} /* terminator */
};
-static unsigned int ref92hd71bxx_pin_configs[11] = {
+static unsigned int ref92hd71bxx_pin_configs[STAC92HD71BXX_NUM_PINS] = {
0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
- 0x90a000f0, 0x01452050, 0x01452050,
+ 0x90a000f0, 0x01452050, 0x01452050, 0x00000000,
+ 0x00000000
};
-static unsigned int dell_m4_1_pin_configs[11] = {
+static unsigned int dell_m4_1_pin_configs[STAC92HD71BXX_NUM_PINS] = {
0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
- 0x40f000f0, 0x4f0000f0, 0x4f0000f0,
+ 0x40f000f0, 0x4f0000f0, 0x4f0000f0, 0x00000000,
+ 0x00000000
};
-static unsigned int dell_m4_2_pin_configs[11] = {
+static unsigned int dell_m4_2_pin_configs[STAC92HD71BXX_NUM_PINS] = {
0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
- 0x40f000f0, 0x044413b0, 0x044413b0,
+ 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
+ 0x00000000
};
-static unsigned int dell_m4_3_pin_configs[11] = {
+static unsigned int dell_m4_3_pin_configs[STAC92HD71BXX_NUM_PINS] = {
0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
- 0x40f000f0, 0x044413b0, 0x044413b0,
+ 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
+ 0x00000000
};
static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
[STAC_DELL_M4_3] = dell_m4_3_pin_configs,
[STAC_HP_M4] = NULL,
[STAC_HP_DV5] = NULL,
+ [STAC_HP_HDX] = NULL,
};
static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
+ [STAC_92HD71BXX_AUTO] = "auto",
[STAC_92HD71BXX_REF] = "ref",
[STAC_DELL_M4_1] = "dell-m4-1",
[STAC_DELL_M4_2] = "dell-m4-2",
[STAC_DELL_M4_3] = "dell-m4-3",
[STAC_HP_M4] = "hp-m4",
[STAC_HP_DV5] = "hp-dv5",
+ [STAC_HP_HDX] = "hp-hdx",
};
static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
/* SigmaTel reference board */
SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
"DFI LanParty", STAC_92HD71BXX_REF),
- SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f2,
- "HP dv5", STAC_HP_M4),
- SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f4,
- "HP dv7", STAC_HP_DV5),
- SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30f7,
- "HP dv4", STAC_HP_DV5),
- SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fc,
- "HP dv7", STAC_HP_M4),
- SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3600,
- "HP dv5", STAC_HP_DV5),
- SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3603,
- "HP dv5", STAC_HP_DV5),
+ SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
+ "DFI LanParty", STAC_92HD71BXX_REF),
+ SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
+ "HP", STAC_HP_DV5),
+ SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
+ "HP dv4-7", STAC_HP_DV5),
+ SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
+ "HP dv4-7", STAC_HP_DV5),
+ SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
+ "HP HDX", STAC_HP_HDX), /* HDX18 */
SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
- "unknown HP", STAC_HP_M4),
+ "HP mini 1000", STAC_HP_M4),
+ SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
+ "HP HDX", STAC_HP_HDX), /* HDX16 */
SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
"unknown Dell", STAC_DELL_M4_1),
SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
};
static const char *stac922x_models[STAC_922X_MODELS] = {
+ [STAC_922X_AUTO] = "auto",
[STAC_D945_REF] = "ref",
[STAC_D945GTP5] = "5stack",
[STAC_D945GTP3] = "3stack",
/* SigmaTel reference board */
SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
"DFI LanParty", STAC_D945_REF),
+ SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
+ "DFI LanParty", STAC_D945_REF),
/* Intel 945G based systems */
SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
"Intel D945G", STAC_D945GTP3),
"Intel D945P", STAC_D945GTP3),
SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
"Intel D945P", STAC_D945GTP5),
+ /* other intel */
+ SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
+ "Intel D945", STAC_D945_REF),
/* other systems */
/* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
SND_PCI_QUIRK(0x8384, 0x7680,
SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
"Dell XPS M1210", STAC_922X_DELL_M82),
/* ECS/PC Chips boards */
- SND_PCI_QUIRK(0x1019, 0x2144,
- "ECS/PC chips", STAC_ECS_202),
- SND_PCI_QUIRK(0x1019, 0x2608,
- "ECS/PC chips", STAC_ECS_202),
- SND_PCI_QUIRK(0x1019, 0x2633,
- "ECS/PC chips P17G/1333", STAC_ECS_202),
- SND_PCI_QUIRK(0x1019, 0x2811,
- "ECS/PC chips", STAC_ECS_202),
- SND_PCI_QUIRK(0x1019, 0x2812,
- "ECS/PC chips", STAC_ECS_202),
- SND_PCI_QUIRK(0x1019, 0x2813,
- "ECS/PC chips", STAC_ECS_202),
- SND_PCI_QUIRK(0x1019, 0x2814,
- "ECS/PC chips", STAC_ECS_202),
- SND_PCI_QUIRK(0x1019, 0x2815,
- "ECS/PC chips", STAC_ECS_202),
- SND_PCI_QUIRK(0x1019, 0x2816,
- "ECS/PC chips", STAC_ECS_202),
- SND_PCI_QUIRK(0x1019, 0x2817,
- "ECS/PC chips", STAC_ECS_202),
- SND_PCI_QUIRK(0x1019, 0x2818,
- "ECS/PC chips", STAC_ECS_202),
- SND_PCI_QUIRK(0x1019, 0x2819,
- "ECS/PC chips", STAC_ECS_202),
- SND_PCI_QUIRK(0x1019, 0x2820,
+ SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
"ECS/PC chips", STAC_ECS_202),
{} /* terminator */
};
};
static const char *stac927x_models[STAC_927X_MODELS] = {
+ [STAC_927X_AUTO] = "auto",
[STAC_D965_REF_NO_JD] = "ref-no-jd",
[STAC_D965_REF] = "ref",
[STAC_D965_3ST] = "3stack",
/* SigmaTel reference board */
SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
"DFI LanParty", STAC_D965_REF),
+ SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
+ "DFI LanParty", STAC_D965_REF),
/* Intel 946 based systems */
SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
/* 965 based 3 stack systems */
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
+ SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
+ "Intel D965", STAC_D965_3ST),
+ SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
+ "Intel D965", STAC_D965_3ST),
/* Dell 3 stack systems */
SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
/* 965 based 5 stack systems */
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
- SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
+ SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
+ "Intel D965", STAC_D965_5ST),
+ SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
+ "Intel D965", STAC_D965_5ST),
{} /* terminator */
};
[STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
[STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
[STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
+ [STAC_9205_EAPD] = NULL,
};
static const char *stac9205_models[STAC_9205_MODELS] = {
+ [STAC_9205_AUTO] = "auto",
[STAC_9205_REF] = "ref",
[STAC_9205_DELL_M42] = "dell-m42",
[STAC_9205_DELL_M43] = "dell-m43",
[STAC_9205_DELL_M44] = "dell-m44",
+ [STAC_9205_EAPD] = "eapd",
};
static struct snd_pci_quirk stac9205_cfg_tbl[] = {
/* SigmaTel reference board */
SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
"DFI LanParty", STAC_9205_REF),
+ SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
+ "DFI LanParty", STAC_9205_REF),
+ /* Dell */
SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
"unknown Dell", STAC_9205_DELL_M42),
SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
"Dell Inspiron", STAC_9205_DELL_M44),
SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
"Dell Vostro 1500", STAC_9205_DELL_M42),
+ /* Gateway */
+ SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
{} /* terminator */
};
-static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
+static void stac92xx_set_config_regs(struct hda_codec *codec,
+ unsigned int *pincfgs)
{
int i;
struct sigmatel_spec *spec = codec->spec;
-
- kfree(spec->pin_configs);
- spec->pin_configs = kcalloc(spec->num_pins, sizeof(*spec->pin_configs),
- GFP_KERNEL);
- if (!spec->pin_configs)
- return -ENOMEM;
-
- for (i = 0; i < spec->num_pins; i++) {
- hda_nid_t nid = spec->pin_nids[i];
- unsigned int pin_cfg;
-
- pin_cfg = snd_hda_codec_read(codec, nid, 0,
- AC_VERB_GET_CONFIG_DEFAULT, 0x00);
- snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
- nid, pin_cfg);
- spec->pin_configs[i] = pin_cfg;
- }
-
- return 0;
-}
-static void stac92xx_set_config_reg(struct hda_codec *codec,
- hda_nid_t pin_nid, unsigned int pin_config)
-{
- int i;
- snd_hda_codec_write(codec, pin_nid, 0,
- AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
- pin_config & 0x000000ff);
- snd_hda_codec_write(codec, pin_nid, 0,
- AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
- (pin_config & 0x0000ff00) >> 8);
- snd_hda_codec_write(codec, pin_nid, 0,
- AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
- (pin_config & 0x00ff0000) >> 16);
- snd_hda_codec_write(codec, pin_nid, 0,
- AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
- pin_config >> 24);
- i = snd_hda_codec_read(codec, pin_nid, 0,
- AC_VERB_GET_CONFIG_DEFAULT,
- 0x00);
- snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
- pin_nid, i);
-}
-
-static void stac92xx_set_config_regs(struct hda_codec *codec)
-{
- int i;
- struct sigmatel_spec *spec = codec->spec;
-
- if (!spec->pin_configs)
- return;
+ if (!pincfgs)
+ return;
for (i = 0; i < spec->num_pins; i++)
- stac92xx_set_config_reg(codec, spec->pin_nids[i],
- spec->pin_configs[i]);
-}
-
-static int stac_save_pin_cfgs(struct hda_codec *codec, unsigned int *pins)
-{
- struct sigmatel_spec *spec = codec->spec;
-
- if (!pins)
- return stac92xx_save_bios_config_regs(codec);
-
- kfree(spec->pin_configs);
- spec->pin_configs = kmemdup(pins,
- spec->num_pins * sizeof(*pins),
- GFP_KERNEL);
- if (!spec->pin_configs)
- return -ENOMEM;
-
- stac92xx_set_config_regs(codec);
- return 0;
-}
-
-static void stac_change_pin_config(struct hda_codec *codec, hda_nid_t nid,
- unsigned int cfg)
-{
- struct sigmatel_spec *spec = codec->spec;
- int i;
-
- for (i = 0; i < spec->num_pins; i++) {
- if (spec->pin_nids[i] == nid) {
- spec->pin_configs[i] = cfg;
- stac92xx_set_config_reg(codec, nid, cfg);
- break;
- }
- }
+ if (spec->pin_nids[i] && pincfgs[i])
+ snd_hda_codec_set_pincfg(codec, spec->pin_nids[i],
+ pincfgs[i]);
}
/*
codec->num_pcms++;
info++;
info->name = "STAC92xx Digital";
- info->pcm_type = HDA_PCM_TYPE_SPDIF;
+ info->pcm_type = spec->autocfg.dig_out_type[0];
if (spec->multiout.dig_out_nid) {
info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
{
- unsigned int pincap = snd_hda_param_read(codec, nid,
- AC_PAR_PIN_CAP);
+ unsigned int pincap = snd_hda_query_pin_caps(codec, nid);
pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
if (pincap & AC_PINCAP_VREF_100)
return AC_PINCTL_VREF_100;
};
/* add dynamic controls */
-static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
- struct snd_kcontrol_new *ktemp,
- int idx, const char *name,
- unsigned long val)
+static struct snd_kcontrol_new *
+stac_control_new(struct sigmatel_spec *spec,
+ struct snd_kcontrol_new *ktemp,
+ const char *name)
{
struct snd_kcontrol_new *knew;
snd_array_init(&spec->kctls, sizeof(*knew), 32);
knew = snd_array_new(&spec->kctls);
if (!knew)
- return -ENOMEM;
+ return NULL;
*knew = *ktemp;
- knew->index = idx;
knew->name = kstrdup(name, GFP_KERNEL);
- if (!knew->name)
+ if (!knew->name) {
+ /* roolback */
+ memset(knew, 0, sizeof(*knew));
+ spec->kctls.alloced--;
+ return NULL;
+ }
+ return knew;
+}
+
+static int stac92xx_add_control_temp(struct sigmatel_spec *spec,
+ struct snd_kcontrol_new *ktemp,
+ int idx, const char *name,
+ unsigned long val)
+{
+ struct snd_kcontrol_new *knew = stac_control_new(spec, ktemp, name);
+ if (!knew)
return -ENOMEM;
+ knew->index = idx;
knew->private_value = val;
return 0;
}
return stac92xx_add_control_idx(spec, type, 0, name, val);
}
+static struct snd_kcontrol_new stac_input_src_temp = {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "Input Source",
+ .info = stac92xx_mux_enum_info,
+ .get = stac92xx_mux_enum_get,
+ .put = stac92xx_mux_enum_put,
+};
+
+static int stac92xx_add_input_source(struct sigmatel_spec *spec)
+{
+ struct snd_kcontrol_new *knew;
+ struct hda_input_mux *imux = &spec->private_imux;
+
+ if (!spec->num_adcs || imux->num_items <= 1)
+ return 0; /* no need for input source control */
+ knew = stac_control_new(spec, &stac_input_src_temp,
+ stac_input_src_temp.name);
+ if (!knew)
+ return -ENOMEM;
+ knew->count = spec->num_adcs;
+ return 0;
+}
+
/* check whether the line-input can be used as line-out */
static hda_nid_t check_line_out_switch(struct hda_codec *codec)
{
if (cfg->line_out_type != AUTO_PIN_LINE_OUT)
return 0;
nid = cfg->input_pins[AUTO_PIN_LINE];
- pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
+ pincap = snd_hda_query_pin_caps(codec, nid);
if (pincap & AC_PINCAP_OUT)
return nid;
return 0;
mic_pin = AUTO_PIN_MIC;
for (;;) {
hda_nid_t nid = cfg->input_pins[mic_pin];
- def_conf = snd_hda_codec_read(codec, nid, 0,
- AC_VERB_GET_CONFIG_DEFAULT, 0);
+ def_conf = snd_hda_codec_get_pincfg(codec, nid);
/* some laptops have an internal analog microphone
* which can't be used as a output */
if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
- pincap = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
+ pincap = snd_hda_query_pin_caps(codec, nid);
if (pincap & AC_PINCAP_OUT)
return nid;
}
conn_len = snd_hda_get_connections(codec, nid, conn,
HDA_MAX_CONNECTIONS);
for (j = 0; j < conn_len; j++) {
- wcaps = snd_hda_param_read(codec, conn[j],
- AC_PAR_AUDIO_WIDGET_CAP);
+ wcaps = get_wcaps(codec, conn[j]);
wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
/* we check only analog outputs */
if (wtype != AC_WID_AUD_OUT || (wcaps & AC_WCAP_DIGITAL))
return conn[j];
}
}
+ /* if all DACs are already assigned, connect to the primary DAC */
+ if (conn_len > 1) {
+ for (j = 0; j < conn_len; j++) {
+ if (conn[j] == spec->multiout.dac_nids[0]) {
+ snd_hda_codec_write_cache(codec, nid, 0,
+ AC_VERB_SET_CONNECT_SEL, j);
+ break;
+ }
+ }
+ }
return 0;
}
add_spec_dacs(spec, dac);
}
+ for (i = 0; i < cfg->hp_outs; i++) {
+ nid = cfg->hp_pins[i];
+ dac = get_unassigned_dac(codec, nid);
+ if (dac) {
+ if (!spec->multiout.hp_nid)
+ spec->multiout.hp_nid = dac;
+ else
+ add_spec_extra_dacs(spec, dac);
+ }
+ spec->hp_dacs[i] = dac;
+ }
+
+ for (i = 0; i < cfg->speaker_outs; i++) {
+ nid = cfg->speaker_pins[i];
+ dac = get_unassigned_dac(codec, nid);
+ if (dac)
+ add_spec_extra_dacs(spec, dac);
+ spec->speaker_dacs[i] = dac;
+ }
+
/* add line-in as output */
nid = check_line_out_switch(codec);
if (nid) {
}
}
- for (i = 0; i < cfg->hp_outs; i++) {
- nid = cfg->hp_pins[i];
- dac = get_unassigned_dac(codec, nid);
- if (dac) {
- if (!spec->multiout.hp_nid)
- spec->multiout.hp_nid = dac;
- else
- add_spec_extra_dacs(spec, dac);
- }
- spec->hp_dacs[i] = dac;
- }
-
- for (i = 0; i < cfg->speaker_outs; i++) {
- nid = cfg->speaker_pins[i];
- dac = get_unassigned_dac(codec, nid);
- if (dac)
- add_spec_extra_dacs(spec, dac);
- spec->speaker_dacs[i] = dac;
- }
-
snd_printd("stac92xx: dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
spec->multiout.num_dacs,
spec->multiout.dac_nids[0],
}
/* create volume control/switch for the given prefx type */
-static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
+static int create_controls_idx(struct hda_codec *codec, const char *pfx,
+ int idx, hda_nid_t nid, int chs)
{
+ struct sigmatel_spec *spec = codec->spec;
char name[32];
int err;
+ if (!spec->check_volume_offset) {
+ unsigned int caps, step, nums, db_scale;
+ caps = query_amp_caps(codec, nid, HDA_OUTPUT);
+ step = (caps & AC_AMPCAP_STEP_SIZE) >>
+ AC_AMPCAP_STEP_SIZE_SHIFT;
+ step = (step + 1) * 25; /* in .01dB unit */
+ nums = (caps & AC_AMPCAP_NUM_STEPS) >>
+ AC_AMPCAP_NUM_STEPS_SHIFT;
+ db_scale = nums * step;
+ /* if dB scale is over -64dB, and finer enough,
+ * let's reduce it to half
+ */
+ if (db_scale > 6400 && nums >= 0x1f)
+ spec->volume_offset = nums / 2;
+ spec->check_volume_offset = 1;
+ }
+
sprintf(name, "%s Playback Volume", pfx);
- err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
- HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
+ err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_VOL, idx, name,
+ HDA_COMPOSE_AMP_VAL_OFS(nid, chs, 0, HDA_OUTPUT,
+ spec->volume_offset));
if (err < 0)
return err;
sprintf(name, "%s Playback Switch", pfx);
- err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
+ err = stac92xx_add_control_idx(spec, STAC_CTL_WIDGET_MUTE, idx, name,
HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
if (err < 0)
return err;
return 0;
}
+#define create_controls(codec, pfx, nid, chs) \
+ create_controls_idx(codec, pfx, 0, nid, chs)
+
static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
{
if (spec->multiout.num_dacs > 4) {
return 1;
}
-static int is_unique_dac(struct sigmatel_spec *spec, hda_nid_t nid)
-{
- int i;
-
- if (spec->autocfg.line_outs != 1)
- return 0;
- if (spec->multiout.hp_nid == nid)
- return 0;
- for (i = 0; i < ARRAY_SIZE(spec->multiout.extra_out_nid); i++)
- if (spec->multiout.extra_out_nid[i] == nid)
- return 0;
- return 1;
-}
-
-/* add playback controls from the parsed DAC table */
-static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
- const struct auto_pin_cfg *cfg)
+/* Create output controls
+ * The mixer elements are named depending on the given type (AUTO_PIN_XXX_OUT)
+ */
+static int create_multi_out_ctls(struct hda_codec *codec, int num_outs,
+ const hda_nid_t *pins,
+ const hda_nid_t *dac_nids,
+ int type)
{
struct sigmatel_spec *spec = codec->spec;
static const char *chname[4] = {
"Front", "Surround", NULL /*CLFE*/, "Side"
};
- hda_nid_t nid = 0;
+ hda_nid_t nid;
int i, err;
unsigned int wid_caps;
- for (i = 0; i < cfg->line_outs && spec->multiout.dac_nids[i]; i++) {
- nid = spec->multiout.dac_nids[i];
- if (i == 2) {
+ for (i = 0; i < num_outs && i < ARRAY_SIZE(chname); i++) {
+ nid = dac_nids[i];
+ if (!nid)
+ continue;
+ if (type != AUTO_PIN_HP_OUT && i == 2) {
/* Center/LFE */
- err = create_controls(spec, "Center", nid, 1);
+ err = create_controls(codec, "Center", nid, 1);
if (err < 0)
return err;
- err = create_controls(spec, "LFE", nid, 2);
+ err = create_controls(codec, "LFE", nid, 2);
if (err < 0)
return err;
}
} else {
- const char *name = chname[i];
- /* if it's a single DAC, assign a better name */
- if (!i && is_unique_dac(spec, nid)) {
- switch (cfg->line_out_type) {
- case AUTO_PIN_HP_OUT:
- name = "Headphone";
- break;
- case AUTO_PIN_SPEAKER_OUT:
- name = "Speaker";
- break;
- }
+ const char *name;
+ int idx;
+ switch (type) {
+ case AUTO_PIN_HP_OUT:
+ name = "Headphone";
+ idx = i;
+ break;
+ case AUTO_PIN_SPEAKER_OUT:
+ name = "Speaker";
+ idx = i;
+ break;
+ default:
+ name = chname[i];
+ idx = 0;
+ break;
}
- err = create_controls(spec, name, nid, 3);
+ err = create_controls_idx(codec, name, idx, nid, 3);
if (err < 0)
return err;
+ if (type == AUTO_PIN_HP_OUT && !spec->hp_detect) {
+ wid_caps = get_wcaps(codec, pins[i]);
+ if (wid_caps & AC_WCAP_UNSOL_CAP)
+ spec->hp_detect = 1;
+ }
}
}
+ return 0;
+}
+
+/* add playback controls from the parsed DAC table */
+static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
+ const struct auto_pin_cfg *cfg)
+{
+ struct sigmatel_spec *spec = codec->spec;
+ int err;
+
+ err = create_multi_out_ctls(codec, cfg->line_outs, cfg->line_out_pins,
+ spec->multiout.dac_nids,
+ cfg->line_out_type);
+ if (err < 0)
+ return err;
if (cfg->hp_outs > 1 && cfg->line_out_type == AUTO_PIN_LINE_OUT) {
err = stac92xx_add_control(spec,
struct auto_pin_cfg *cfg)
{
struct sigmatel_spec *spec = codec->spec;
- hda_nid_t nid;
- int i, err, nums;
+ int err;
+
+ err = create_multi_out_ctls(codec, cfg->hp_outs, cfg->hp_pins,
+ spec->hp_dacs, AUTO_PIN_HP_OUT);
+ if (err < 0)
+ return err;
+
+ err = create_multi_out_ctls(codec, cfg->speaker_outs, cfg->speaker_pins,
+ spec->speaker_dacs, AUTO_PIN_SPEAKER_OUT);
+ if (err < 0)
+ return err;
- nums = 0;
- for (i = 0; i < cfg->hp_outs; i++) {
- static const char *pfxs[] = {
- "Headphone", "Headphone2", "Headphone3",
- };
- unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
- if (wid_caps & AC_WCAP_UNSOL_CAP)
- spec->hp_detect = 1;
- if (nums >= ARRAY_SIZE(pfxs))
- continue;
- nid = spec->hp_dacs[i];
- if (!nid)
- continue;
- err = create_controls(spec, pfxs[nums++], nid, 3);
- if (err < 0)
- return err;
- }
- nums = 0;
- for (i = 0; i < cfg->speaker_outs; i++) {
- static const char *pfxs[] = {
- "Speaker", "External Speaker", "Speaker2",
- };
- if (nums >= ARRAY_SIZE(pfxs))
- continue;
- nid = spec->speaker_dacs[i];
- if (!nid)
- continue;
- err = create_controls(spec, pfxs[nums++], nid, 3);
- if (err < 0)
- return err;
- }
return 0;
}
unsigned int wcaps;
unsigned int def_conf;
- def_conf = snd_hda_codec_read(codec,
- spec->dmic_nids[i],
- 0,
- AC_VERB_GET_CONFIG_DEFAULT,
- 0);
+ def_conf = snd_hda_codec_get_pincfg(codec, spec->dmic_nids[i]);
if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
continue;
static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
{
struct sigmatel_spec *spec = codec->spec;
+ int hp_swap = 0;
int err;
if ((err = snd_hda_parse_pin_def_config(codec,
if (! spec->autocfg.line_outs)
return 0; /* can't find valid pin config */
-#if 0 /* FIXME: temporarily disabled */
/* If we have no real line-out pin and multiple hp-outs, HPs should
* be set up as multi-channel outputs.
*/
spec->autocfg.line_outs = spec->autocfg.hp_outs;
spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
spec->autocfg.hp_outs = 0;
+ hp_swap = 1;
}
-#endif /* FIXME: temporarily disabled */
if (spec->autocfg.mono_out_pin) {
int dir = get_wcaps(codec, spec->autocfg.mono_out_pin) &
(AC_WCAP_OUT_AMP | AC_WCAP_IN_AMP);
#endif
err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
-
if (err < 0)
return err;
- err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
+ /* All output parsing done, now restore the swapped hp pins */
+ if (hp_swap) {
+ memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
+ sizeof(spec->autocfg.hp_pins));
+ spec->autocfg.hp_outs = spec->autocfg.line_outs;
+ spec->autocfg.line_out_type = AUTO_PIN_HP_OUT;
+ spec->autocfg.line_outs = 0;
+ }
+ err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
if (err < 0)
return err;
return err;
}
+ err = stac92xx_add_input_source(spec);
+ if (err < 0)
+ return err;
+
spec->multiout.max_channels = spec->multiout.num_dacs * 2;
if (spec->multiout.max_channels > 2)
spec->surr_switch = 1;
- if (spec->autocfg.dig_out_pin)
+ if (spec->autocfg.dig_outs)
spec->multiout.dig_out_nid = dig_out;
if (dig_in && spec->autocfg.dig_in_pin)
spec->dig_in_nid = dig_in;
for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
hda_nid_t pin = spec->autocfg.line_out_pins[i];
unsigned int defcfg;
- defcfg = snd_hda_codec_read(codec, pin, 0,
- AC_VERB_GET_CONFIG_DEFAULT,
- 0x00);
+ defcfg = snd_hda_codec_get_pincfg(codec, pin);
if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
unsigned int wcaps = get_wcaps(codec, pin);
wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
}
if (lfe_pin) {
- err = create_controls(spec, "LFE", lfe_pin, 1);
+ err = create_controls(codec, "LFE", lfe_pin, 1);
if (err < 0)
return err;
}
return err;
}
- if (spec->autocfg.dig_out_pin)
+ err = stac92xx_add_input_source(spec);
+ if (err < 0)
+ return err;
+
+ if (spec->autocfg.dig_outs)
spec->multiout.dig_out_nid = 0x05;
if (spec->autocfg.dig_in_pin)
spec->dig_in_nid = 0x04;
#ifdef CONFIG_SND_JACK
struct sigmatel_spec *spec = codec->spec;
struct sigmatel_jack *jack;
- int def_conf = snd_hda_codec_read(codec, nid,
- 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
+ int def_conf = snd_hda_codec_get_pincfg(codec, nid);
int connectivity = get_defcfg_connect(def_conf);
char name[32];
static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
int enable);
+/* override some hints from the hwdep entry */
+static void stac_store_hints(struct hda_codec *codec)
+{
+ struct sigmatel_spec *spec = codec->spec;
+ const char *p;
+ int val;
+
+ val = snd_hda_get_bool_hint(codec, "hp_detect");
+ if (val >= 0)
+ spec->hp_detect = val;
+ p = snd_hda_get_hint(codec, "gpio_mask");
+ if (p) {
+ spec->gpio_mask = simple_strtoul(p, NULL, 0);
+ spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
+ spec->gpio_mask;
+ }
+ p = snd_hda_get_hint(codec, "gpio_dir");
+ if (p)
+ spec->gpio_dir = simple_strtoul(p, NULL, 0) & spec->gpio_mask;
+ p = snd_hda_get_hint(codec, "gpio_data");
+ if (p)
+ spec->gpio_data = simple_strtoul(p, NULL, 0) & spec->gpio_mask;
+ p = snd_hda_get_hint(codec, "eapd_mask");
+ if (p)
+ spec->eapd_mask = simple_strtoul(p, NULL, 0) & spec->gpio_mask;
+ val = snd_hda_get_bool_hint(codec, "eapd_switch");
+ if (val >= 0)
+ spec->eapd_switch = val;
+}
+
static int stac92xx_init(struct hda_codec *codec)
{
struct sigmatel_spec *spec = codec->spec;
spec->adc_nids[i], 0,
AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
+ /* override some hints */
+ stac_store_hints(codec);
+
/* set up GPIO */
gpio = spec->gpio_data;
/* turn on EAPD statically when spec->eapd_switch isn't set.
pinctl);
}
}
- conf = snd_hda_codec_read(codec, nid, 0,
- AC_VERB_GET_CONFIG_DEFAULT, 0);
+ conf = snd_hda_codec_get_pincfg(codec, nid);
if (get_defcfg_connect(conf) != AC_JACK_PORT_FIXED) {
enable_pin_detect(codec, nid,
STAC_INSERT_EVENT);
for (i = 0; i < spec->num_dmics; i++)
stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
AC_PINCTL_IN_EN);
- if (cfg->dig_out_pin)
- stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
+ if (cfg->dig_out_pins[0])
+ stac92xx_auto_set_pinctl(codec, cfg->dig_out_pins[0],
AC_PINCTL_OUT_EN);
if (cfg->dig_in_pin)
stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
stac_toggle_power_map(codec, nid, 1);
continue;
}
- def_conf = snd_hda_codec_read(codec, nid, 0,
- AC_VERB_GET_CONFIG_DEFAULT, 0);
+ def_conf = snd_hda_codec_get_pincfg(codec, nid);
def_conf = get_defcfg_connect(def_conf);
/* skip any ports that don't have jacks since presence
* detection is useless */
if (! spec)
return;
- kfree(spec->pin_configs);
stac92xx_free_jacks(codec);
snd_array_free(&spec->events);
static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
unsigned int flag)
{
- unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
+ unsigned int old_ctl, pin_ctl;
+
+ pin_ctl = snd_hda_codec_read(codec, nid,
0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
if (pin_ctl & AC_PINCTL_IN_EN) {
return;
}
+ old_ctl = pin_ctl;
/* if setting pin direction bits, clear the current
direction bits first */
if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
- snd_hda_codec_write_cache(codec, nid, 0,
- AC_VERB_SET_PIN_WIDGET_CONTROL,
- pin_ctl | flag);
+ pin_ctl |= flag;
+ if (old_ctl != pin_ctl)
+ snd_hda_codec_write_cache(codec, nid, 0,
+ AC_VERB_SET_PIN_WIDGET_CONTROL,
+ pin_ctl);
}
static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
{
unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
- snd_hda_codec_write_cache(codec, nid, 0,
- AC_VERB_SET_PIN_WIDGET_CONTROL,
- pin_ctl & ~flag);
+ if (pin_ctl & flag)
+ snd_hda_codec_write_cache(codec, nid, 0,
+ AC_VERB_SET_PIN_WIDGET_CONTROL,
+ pin_ctl & ~flag);
}
static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
{
struct sigmatel_spec *spec = codec->spec;
- stac92xx_set_config_regs(codec);
stac92xx_init(codec);
snd_hda_codec_resume_amp(codec);
snd_hda_codec_resume_cache(codec);
return 0;
}
+
+/*
+ * using power check for controlling mute led of HP HDX notebooks
+ * check for mute state only on Speakers (nid = 0x10)
+ *
+ * For this feature CONFIG_SND_HDA_POWER_SAVE is needed, otherwise
+ * the LED is NOT working properly !
+ */
+
+#ifdef CONFIG_SND_HDA_POWER_SAVE
+static int stac92xx_hp_hdx_check_power_status(struct hda_codec *codec,
+ hda_nid_t nid)
+{
+ struct sigmatel_spec *spec = codec->spec;
+
+ if (nid == 0x10) {
+ if (snd_hda_codec_amp_read(codec, nid, 0, HDA_OUTPUT, 0) &
+ HDA_AMP_MUTE)
+ spec->gpio_data &= ~0x08; /* orange */
+ else
+ spec->gpio_data |= 0x08; /* white */
+
+ stac_gpio_set(codec, spec->gpio_mask,
+ spec->gpio_dir,
+ spec->gpio_data);
+ }
+
+ return 0;
+}
+#endif
+
static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state)
{
struct sigmatel_spec *spec = codec->spec;
spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
stac9200_models,
stac9200_cfg_tbl);
- if (spec->board_config < 0) {
+ if (spec->board_config < 0)
snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
- err = stac92xx_save_bios_config_regs(codec);
- } else
- err = stac_save_pin_cfgs(codec,
+ else
+ stac92xx_set_config_regs(codec,
stac9200_brd_tbl[spec->board_config]);
- if (err < 0) {
- stac92xx_free(codec);
- return err;
- }
spec->multiout.max_channels = 2;
spec->multiout.num_dacs = 1;
stac925x_models,
stac925x_cfg_tbl);
again:
- if (spec->board_config < 0) {
+ if (spec->board_config < 0)
snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
"using BIOS defaults\n");
- err = stac92xx_save_bios_config_regs(codec);
- } else
- err = stac_save_pin_cfgs(codec,
+ else
+ stac92xx_set_config_regs(codec,
stac925x_brd_tbl[spec->board_config]);
- if (err < 0) {
- stac92xx_free(codec);
- return err;
- }
spec->multiout.max_channels = 2;
spec->multiout.num_dacs = 1;
stac92hd73xx_models,
stac92hd73xx_cfg_tbl);
again:
- if (spec->board_config < 0) {
+ if (spec->board_config < 0)
snd_printdd(KERN_INFO "hda_codec: Unknown model for"
" STAC92HD73XX, using BIOS defaults\n");
- err = stac92xx_save_bios_config_regs(codec);
- } else
- err = stac_save_pin_cfgs(codec,
+ else
+ stac92xx_set_config_regs(codec,
stac92hd73xx_brd_tbl[spec->board_config]);
- if (err < 0) {
- stac92xx_free(codec);
- return err;
- }
num_dacs = snd_hda_get_connections(codec, 0x0a,
conn, STAC92HD73_DAC_COUNT + 2) - 1;
case 0x3: /* 6 Channel */
spec->mixer = stac92hd73xx_6ch_mixer;
spec->init = stac92hd73xx_6ch_core_init;
+ spec->aloopback_ctl = stac92hd73xx_6ch_loopback;
break;
case 0x4: /* 8 Channel */
spec->mixer = stac92hd73xx_8ch_mixer;
spec->init = stac92hd73xx_8ch_core_init;
+ spec->aloopback_ctl = stac92hd73xx_8ch_loopback;
break;
case 0x5: /* 10 Channel */
spec->mixer = stac92hd73xx_10ch_mixer;
spec->init = stac92hd73xx_10ch_core_init;
+ spec->aloopback_ctl = stac92hd73xx_10ch_loopback;
+ break;
}
spec->multiout.dac_nids = spec->dac_nids;
spec->init = dell_m6_core_init;
switch (spec->board_config) {
case STAC_DELL_M6_AMIC: /* Analog Mics */
- stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
+ snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
spec->num_dmics = 0;
spec->private_dimux.num_items = 1;
break;
case STAC_DELL_M6_DMIC: /* Digital Mics */
- stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
+ snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
spec->num_dmics = 1;
spec->private_dimux.num_items = 2;
break;
case STAC_DELL_M6_BOTH: /* Both */
- stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
- stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
+ snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
+ snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
spec->num_dmics = 1;
spec->private_dimux.num_items = 2;
break;
hda_nid_t conn[STAC92HD83_DAC_COUNT + 1];
int err;
int num_dacs;
+ hda_nid_t nid;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (spec == NULL)
spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
spec->multiout.dac_nids = spec->dac_nids;
-
- /* set port 0xe to select the last DAC
- */
- num_dacs = snd_hda_get_connections(codec, 0x0e,
- conn, STAC92HD83_DAC_COUNT + 1) - 1;
-
- snd_hda_codec_write_cache(codec, 0xe, 0,
- AC_VERB_SET_CONNECT_SEL, num_dacs);
-
spec->init = stac92hd83xxx_core_init;
spec->mixer = stac92hd83xxx_mixer;
spec->num_pins = ARRAY_SIZE(stac92hd83xxx_pin_nids);
stac92hd83xxx_models,
stac92hd83xxx_cfg_tbl);
again:
- if (spec->board_config < 0) {
+ if (spec->board_config < 0)
snd_printdd(KERN_INFO "hda_codec: Unknown model for"
" STAC92HD83XXX, using BIOS defaults\n");
- err = stac92xx_save_bios_config_regs(codec);
- } else
- err = stac_save_pin_cfgs(codec,
+ else
+ stac92xx_set_config_regs(codec,
stac92hd83xxx_brd_tbl[spec->board_config]);
- if (err < 0) {
- stac92xx_free(codec);
- return err;
- }
switch (codec->vendor_id) {
case 0x111d7604:
return err;
}
+ switch (spec->board_config) {
+ case STAC_DELL_S14:
+ nid = 0xf;
+ break;
+ default:
+ nid = 0xe;
+ break;
+ }
+
+ num_dacs = snd_hda_get_connections(codec, nid,
+ conn, STAC92HD83_DAC_COUNT + 1) - 1;
+
+ /* set port X to select the last DAC
+ */
+ snd_hda_codec_write_cache(codec, nid, 0,
+ AC_VERB_SET_CONNECT_SEL, num_dacs);
+
codec->patch_ops = stac92xx_patch_ops;
codec->proc_widget_hook = stac92hd_proc_hook;
return 0;
}
-static struct hda_input_mux stac92hd71bxx_dmux = {
+static struct hda_input_mux stac92hd71bxx_dmux_nomixer = {
+ .num_items = 3,
+ .items = {
+ { "Analog Inputs", 0x00 },
+ { "Digital Mic 1", 0x02 },
+ { "Digital Mic 2", 0x03 },
+ }
+};
+
+static struct hda_input_mux stac92hd71bxx_dmux_amixer = {
.num_items = 4,
.items = {
{ "Analog Inputs", 0x00 },
}
};
+/* get the pin connection (fixed, none, etc) */
+static unsigned int stac_get_defcfg_connect(struct hda_codec *codec, int idx)
+{
+ struct sigmatel_spec *spec = codec->spec;
+ unsigned int cfg;
+
+ cfg = snd_hda_codec_get_pincfg(codec, spec->pin_nids[idx]);
+ return get_defcfg_connect(cfg);
+}
+
+static int stac92hd71bxx_connected_ports(struct hda_codec *codec,
+ hda_nid_t *nids, int num_nids)
+{
+ struct sigmatel_spec *spec = codec->spec;
+ int idx, num;
+ unsigned int def_conf;
+
+ for (num = 0; num < num_nids; num++) {
+ for (idx = 0; idx < spec->num_pins; idx++)
+ if (spec->pin_nids[idx] == nids[num])
+ break;
+ if (idx >= spec->num_pins)
+ break;
+ def_conf = stac_get_defcfg_connect(codec, idx);
+ if (def_conf == AC_JACK_PORT_NONE)
+ break;
+ }
+ return num;
+}
+
+static int stac92hd71bxx_connected_smuxes(struct hda_codec *codec,
+ hda_nid_t dig0pin)
+{
+ struct sigmatel_spec *spec = codec->spec;
+ int idx;
+
+ for (idx = 0; idx < spec->num_pins; idx++)
+ if (spec->pin_nids[idx] == dig0pin)
+ break;
+ if ((idx + 2) >= spec->num_pins)
+ return 0;
+
+ /* dig1pin case */
+ if (stac_get_defcfg_connect(codec, idx + 1) != AC_JACK_PORT_NONE)
+ return 2;
+
+ /* dig0pin + dig2pin case */
+ if (stac_get_defcfg_connect(codec, idx + 2) != AC_JACK_PORT_NONE)
+ return 2;
+ if (stac_get_defcfg_connect(codec, idx) != AC_JACK_PORT_NONE)
+ return 1;
+ else
+ return 0;
+}
+
static int patch_stac92hd71bxx(struct hda_codec *codec)
{
struct sigmatel_spec *spec;
+ struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
int err = 0;
+ unsigned int ndmic_nids = 0;
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (spec == NULL)
codec->spec = spec;
codec->patch_ops = stac92xx_patch_ops;
- spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
+ spec->num_pins = STAC92HD71BXX_NUM_PINS;
+ switch (codec->vendor_id) {
+ case 0x111d76b6:
+ case 0x111d76b7:
+ spec->pin_nids = stac92hd71bxx_pin_nids_4port;
+ break;
+ case 0x111d7603:
+ case 0x111d7608:
+ /* On 92HD75Bx 0x27 isn't a pin nid */
+ spec->num_pins--;
+ /* fallthrough */
+ default:
+ spec->pin_nids = stac92hd71bxx_pin_nids_6port;
+ }
spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
- spec->pin_nids = stac92hd71bxx_pin_nids;
- memcpy(&spec->private_dimux, &stac92hd71bxx_dmux,
- sizeof(stac92hd71bxx_dmux));
spec->board_config = snd_hda_check_board_config(codec,
STAC_92HD71BXX_MODELS,
stac92hd71bxx_models,
stac92hd71bxx_cfg_tbl);
again:
- if (spec->board_config < 0) {
+ if (spec->board_config < 0)
snd_printdd(KERN_INFO "hda_codec: Unknown model for"
" STAC92HD71BXX, using BIOS defaults\n");
- err = stac92xx_save_bios_config_regs(codec);
- } else
- err = stac_save_pin_cfgs(codec,
+ else
+ stac92xx_set_config_regs(codec,
stac92hd71bxx_brd_tbl[spec->board_config]);
- if (err < 0) {
- stac92xx_free(codec);
- return err;
- }
if (spec->board_config > STAC_92HD71BXX_REF) {
/* GPIO0 = EAPD */
spec->gpio_data = 0x01;
}
+ spec->dmic_nids = stac92hd71bxx_dmic_nids;
+ spec->dmux_nids = stac92hd71bxx_dmux_nids;
+
switch (codec->vendor_id) {
case 0x111d76b6: /* 4 Port without Analog Mixer */
case 0x111d76b7:
+ unmute_init++;
+ /* fallthru */
case 0x111d76b4: /* 6 Port without Analog Mixer */
case 0x111d76b5:
+ memcpy(&spec->private_dimux, &stac92hd71bxx_dmux_nomixer,
+ sizeof(stac92hd71bxx_dmux_nomixer));
spec->mixer = stac92hd71bxx_mixer;
spec->init = stac92hd71bxx_core_init;
codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
+ spec->num_dmics = stac92hd71bxx_connected_ports(codec,
+ stac92hd71bxx_dmic_nids,
+ STAC92HD71BXX_NUM_DMICS);
+ if (spec->num_dmics) {
+ spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
+ spec->dinput_mux = &spec->private_dimux;
+ ndmic_nids = ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1;
+ }
break;
case 0x111d7608: /* 5 Port with Analog Mixer */
+ memcpy(&spec->private_dimux, &stac92hd71bxx_dmux_amixer,
+ sizeof(stac92hd71bxx_dmux_amixer));
+ spec->private_dimux.num_items--;
switch (spec->board_config) {
case STAC_HP_M4:
/* Enable VREF power saving on GPIO1 detect */
/* disable VSW */
spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
- stac_change_pin_config(codec, 0xf, 0x40f000f0);
+ unmute_init++;
+ snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
+ snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
+ stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS - 1] = 0;
+ spec->num_dmics = stac92hd71bxx_connected_ports(codec,
+ stac92hd71bxx_dmic_nids,
+ STAC92HD71BXX_NUM_DMICS - 1);
+ spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
+ ndmic_nids = ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 2;
break;
case 0x111d7603: /* 6 Port with Analog Mixer */
if ((codec->revision_id & 0xf) == 1)
spec->num_pwrs = 0;
/* fallthru */
default:
+ memcpy(&spec->private_dimux, &stac92hd71bxx_dmux_amixer,
+ sizeof(stac92hd71bxx_dmux_amixer));
spec->dinput_mux = &spec->private_dimux;
spec->mixer = stac92hd71bxx_analog_mixer;
spec->init = stac92hd71bxx_analog_core_init;
codec->slave_dig_outs = stac92hd71bxx_slave_dig_outs;
+ spec->num_dmics = stac92hd71bxx_connected_ports(codec,
+ stac92hd71bxx_dmic_nids,
+ STAC92HD71BXX_NUM_DMICS);
+ spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
+ ndmic_nids = ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1;
}
+ if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
+ snd_hda_sequence_write_cache(codec, unmute_init);
+
+ spec->aloopback_ctl = stac92hd71bxx_loopback;
spec->aloopback_mask = 0x50;
spec->aloopback_shift = 0;
spec->digbeep_nid = 0x26;
spec->mux_nids = stac92hd71bxx_mux_nids;
spec->adc_nids = stac92hd71bxx_adc_nids;
- spec->dmic_nids = stac92hd71bxx_dmic_nids;
- spec->dmux_nids = stac92hd71bxx_dmux_nids;
spec->smux_nids = stac92hd71bxx_smux_nids;
spec->pwr_nids = stac92hd71bxx_pwr_nids;
spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
+ spec->num_smuxes = stac92hd71bxx_connected_smuxes(codec, 0x1e);
switch (spec->board_config) {
case STAC_HP_M4:
/* enable internal microphone */
- stac_change_pin_config(codec, 0x0e, 0x01813040);
+ snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
stac92xx_auto_set_pinctl(codec, 0x0e,
AC_PINCTL_IN_EN | AC_PINCTL_VREF_80);
/* fallthru */
spec->num_smuxes = 0;
spec->num_dmuxes = 1;
break;
- default:
- spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
- spec->num_smuxes = ARRAY_SIZE(stac92hd71bxx_smux_nids);
- spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
+ case STAC_HP_DV5:
+ snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
+ stac92xx_auto_set_pinctl(codec, 0x0d, AC_PINCTL_OUT_EN);
+ break;
+ case STAC_HP_HDX:
+ spec->num_dmics = 1;
+ spec->num_dmuxes = 1;
+ spec->num_smuxes = 1;
+ /*
+ * For controlling MUTE LED on HP HDX16/HDX18 notebooks,
+ * the CONFIG_SND_HDA_POWER_SAVE is needed to be set.
+ */
+#ifdef CONFIG_SND_HDA_POWER_SAVE
+ /* orange/white mute led on GPIO3, orange=0, white=1 */
+ spec->gpio_mask |= 0x08;
+ spec->gpio_dir |= 0x08;
+ spec->gpio_data |= 0x08; /* set to white */
+
+ /* register check_power_status callback. */
+ codec->patch_ops.check_power_status =
+ stac92xx_hp_hdx_check_power_status;
+#endif
+ break;
};
spec->multiout.dac_nids = spec->dac_nids;
if (spec->dinput_mux)
- spec->private_dimux.num_items +=
- spec->num_dmics -
- (ARRAY_SIZE(stac92hd71bxx_dmic_nids) - 1);
+ spec->private_dimux.num_items += spec->num_dmics - ndmic_nids;
- err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
+ err = stac92xx_parse_auto_config(codec, 0x21, 0);
if (!err) {
if (spec->board_config < 0) {
printk(KERN_WARNING "hda_codec: No auto-config is "
}
again:
- if (spec->board_config < 0) {
+ if (spec->board_config < 0)
snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
"using BIOS defaults\n");
- err = stac92xx_save_bios_config_regs(codec);
- } else
- err = stac_save_pin_cfgs(codec,
+ else
+ stac92xx_set_config_regs(codec,
stac922x_brd_tbl[spec->board_config]);
- if (err < 0) {
- stac92xx_free(codec);
- return err;
- }
spec->adc_nids = stac922x_adc_nids;
spec->mux_nids = stac922x_mux_nids;
return -ENOMEM;
codec->spec = spec;
+ codec->slave_dig_outs = stac927x_slave_dig_outs;
spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
spec->pin_nids = stac927x_pin_nids;
spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
stac927x_models,
stac927x_cfg_tbl);
again:
- if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
- if (spec->board_config < 0)
- snd_printdd(KERN_INFO "hda_codec: Unknown model for"
- "STAC927x, using BIOS defaults\n");
- err = stac92xx_save_bios_config_regs(codec);
- } else
- err = stac_save_pin_cfgs(codec,
+ if (spec->board_config < 0)
+ snd_printdd(KERN_INFO "hda_codec: Unknown model for"
+ "STAC927x, using BIOS defaults\n");
+ else
+ stac92xx_set_config_regs(codec,
stac927x_brd_tbl[spec->board_config]);
- if (err < 0) {
- stac92xx_free(codec);
- return err;
- }
spec->digbeep_nid = 0x23;
spec->adc_nids = stac927x_adc_nids;
case 0x10280209:
case 0x1028022e:
/* correct the device field to SPDIF out */
- stac_change_pin_config(codec, 0x21, 0x01442070);
+ snd_hda_codec_set_pincfg(codec, 0x21, 0x01442070);
break;
};
/* configure the analog microphone on some laptops */
- stac_change_pin_config(codec, 0x0c, 0x90a79130);
+ snd_hda_codec_set_pincfg(codec, 0x0c, 0x90a79130);
/* correct the front output jack as a hp out */
- stac_change_pin_config(codec, 0x0f, 0x0227011f);
+ snd_hda_codec_set_pincfg(codec, 0x0f, 0x0227011f);
/* correct the front input jack as a mic */
- stac_change_pin_config(codec, 0x0e, 0x02a79130);
+ snd_hda_codec_set_pincfg(codec, 0x0e, 0x02a79130);
/* fallthru */
case STAC_DELL_3ST:
/* GPIO2 High = Enable EAPD */
}
spec->num_pwrs = 0;
+ spec->aloopback_ctl = stac927x_loopback;
spec->aloopback_mask = 0x40;
spec->aloopback_shift = 0;
spec->eapd_switch = 1;
stac9205_models,
stac9205_cfg_tbl);
again:
- if (spec->board_config < 0) {
+ if (spec->board_config < 0)
snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
- err = stac92xx_save_bios_config_regs(codec);
- } else
- err = stac_save_pin_cfgs(codec,
+ else
+ stac92xx_set_config_regs(codec,
stac9205_brd_tbl[spec->board_config]);
- if (err < 0) {
- stac92xx_free(codec);
- return err;
- }
spec->digbeep_nid = 0x23;
spec->adc_nids = stac9205_adc_nids;
spec->init = stac9205_core_init;
spec->mixer = stac9205_mixer;
+ spec->aloopback_ctl = stac9205_loopback;
spec->aloopback_mask = 0x40;
spec->aloopback_shift = 0;
- spec->eapd_switch = 1;
+ /* Turn on/off EAPD per HP plugging */
+ if (spec->board_config != STAC_9205_EAPD)
+ spec->eapd_switch = 1;
spec->multiout.dac_nids = spec->dac_nids;
switch (spec->board_config){
case STAC_9205_DELL_M43:
/* Enable SPDIF in/out */
- stac_change_pin_config(codec, 0x1f, 0x01441030);
- stac_change_pin_config(codec, 0x20, 0x1c410030);
+ snd_hda_codec_set_pincfg(codec, 0x1f, 0x01441030);
+ snd_hda_codec_set_pincfg(codec, 0x20, 0x1c410030);
/* Enable unsol response for GPIO4/Dock HP connection */
err = stac_add_event(spec, codec->afg, STAC_VREF_EVENT, 0x01);
* STAC9872 hack
*/
-/* static config for Sony VAIO FE550G and Sony VAIO AR */
-static hda_nid_t vaio_dacs[] = { 0x2 };
-#define VAIO_HP_DAC 0x5
-static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
-static hda_nid_t vaio_mux_nids[] = { 0x15 };
-
-static struct hda_input_mux vaio_mux = {
- .num_items = 3,
- .items = {
- /* { "HP", 0x0 }, */
- { "Mic Jack", 0x1 },
- { "Internal Mic", 0x2 },
- { "PCM", 0x3 },
- }
-};
-
-static struct hda_verb vaio_init[] = {
- {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
- {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
- {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
- {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
- {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
- {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
+static struct hda_verb stac9872_core_init[] = {
{0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
- {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
- {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
- {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
- {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
{0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
{}
};
-static struct hda_verb vaio_ar_init[] = {
- {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
- {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
- {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
- {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
-/* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
- {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
- {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
- {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
- {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
-/* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
- {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
- {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
- {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
- {}
-};
-
-static struct snd_kcontrol_new vaio_mixer[] = {
- HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
- HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
- HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
- HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
- /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
+static struct snd_kcontrol_new stac9872_mixer[] = {
HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
- {
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
- .name = "Capture Source",
- .count = 1,
- .info = stac92xx_mux_enum_info,
- .get = stac92xx_mux_enum_get,
- .put = stac92xx_mux_enum_put,
- },
- {}
+ { } /* end */
};
-static struct snd_kcontrol_new vaio_ar_mixer[] = {
- HDA_CODEC_VOLUME("Headphone Playback Volume", 0x02, 0, HDA_OUTPUT),
- HDA_CODEC_MUTE("Headphone Playback Switch", 0x02, 0, HDA_OUTPUT),
- HDA_CODEC_VOLUME("Speaker Playback Volume", 0x05, 0, HDA_OUTPUT),
- HDA_CODEC_MUTE("Speaker Playback Switch", 0x05, 0, HDA_OUTPUT),
- /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
- HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
- HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
- /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
- HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
- {
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
- .name = "Capture Source",
- .count = 1,
- .info = stac92xx_mux_enum_info,
- .get = stac92xx_mux_enum_get,
- .put = stac92xx_mux_enum_put,
- },
- {}
+static hda_nid_t stac9872_pin_nids[] = {
+ 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
+ 0x11, 0x13, 0x14,
};
-static struct hda_codec_ops stac9872_patch_ops = {
- .build_controls = stac92xx_build_controls,
- .build_pcms = stac92xx_build_pcms,
- .init = stac92xx_init,
- .free = stac92xx_free,
-#ifdef SND_HDA_NEEDS_RESUME
- .resume = stac92xx_resume,
-#endif
+static hda_nid_t stac9872_adc_nids[] = {
+ 0x8 /*,0x6*/
};
-static int stac9872_vaio_init(struct hda_codec *codec)
-{
- int err;
-
- err = stac92xx_init(codec);
- if (err < 0)
- return err;
- if (codec->patch_ops.unsol_event)
- codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
- return 0;
-}
-
-static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
-{
- if (get_pin_presence(codec, 0x0a)) {
- stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
- stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
- } else {
- stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
- stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
- }
-}
-
-static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
-{
- switch (res >> 26) {
- case STAC_HP_EVENT:
- stac9872_vaio_hp_detect(codec, res);
- break;
- }
-}
-
-static struct hda_codec_ops stac9872_vaio_patch_ops = {
- .build_controls = stac92xx_build_controls,
- .build_pcms = stac92xx_build_pcms,
- .init = stac9872_vaio_init,
- .free = stac92xx_free,
- .unsol_event = stac9872_vaio_unsol_event,
-#ifdef CONFIG_PM
- .resume = stac92xx_resume,
-#endif
+static hda_nid_t stac9872_mux_nids[] = {
+ 0x15
};
-enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
- CXD9872RD_VAIO,
- /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
- STAC9872AK_VAIO,
- /* Unknown. id=0x83847661 and subsys=0x104D1200. */
- STAC9872K_VAIO,
- /* AR Series. id=0x83847664 and subsys=104D1300 */
- CXD9872AKD_VAIO,
- STAC_9872_MODELS,
+static unsigned int stac9872_vaio_pin_configs[9] = {
+ 0x03211020, 0x411111f0, 0x411111f0, 0x03a15030,
+ 0x411111f0, 0x90170110, 0x411111f0, 0x411111f0,
+ 0x90a7013e
};
static const char *stac9872_models[STAC_9872_MODELS] = {
- [CXD9872RD_VAIO] = "vaio",
- [CXD9872AKD_VAIO] = "vaio-ar",
+ [STAC_9872_AUTO] = "auto",
+ [STAC_9872_VAIO] = "vaio",
+};
+
+static unsigned int *stac9872_brd_tbl[STAC_9872_MODELS] = {
+ [STAC_9872_VAIO] = stac9872_vaio_pin_configs,
};
static struct snd_pci_quirk stac9872_cfg_tbl[] = {
- SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
- SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
- SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
- SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
- {}
+ {} /* terminator */
};
static int patch_stac9872(struct hda_codec *codec)
{
struct sigmatel_spec *spec;
- int board_config;
+ int err;
- board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
- stac9872_models,
- stac9872_cfg_tbl);
- if (board_config < 0)
- /* unknown config, let generic-parser do its job... */
- return snd_hda_parse_generic_codec(codec);
-
spec = kzalloc(sizeof(*spec), GFP_KERNEL);
if (spec == NULL)
return -ENOMEM;
-
codec->spec = spec;
- switch (board_config) {
- case CXD9872RD_VAIO:
- case STAC9872AK_VAIO:
- case STAC9872K_VAIO:
- spec->mixer = vaio_mixer;
- spec->init = vaio_init;
- spec->multiout.max_channels = 2;
- spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
- spec->multiout.dac_nids = vaio_dacs;
- spec->multiout.hp_nid = VAIO_HP_DAC;
- spec->num_adcs = ARRAY_SIZE(vaio_adcs);
- spec->adc_nids = vaio_adcs;
- spec->num_pwrs = 0;
- spec->input_mux = &vaio_mux;
- spec->mux_nids = vaio_mux_nids;
- codec->patch_ops = stac9872_vaio_patch_ops;
- break;
-
- case CXD9872AKD_VAIO:
- spec->mixer = vaio_ar_mixer;
- spec->init = vaio_ar_init;
- spec->multiout.max_channels = 2;
- spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
- spec->multiout.dac_nids = vaio_dacs;
- spec->multiout.hp_nid = VAIO_HP_DAC;
- spec->num_adcs = ARRAY_SIZE(vaio_adcs);
- spec->num_pwrs = 0;
- spec->adc_nids = vaio_adcs;
- spec->input_mux = &vaio_mux;
- spec->mux_nids = vaio_mux_nids;
- codec->patch_ops = stac9872_patch_ops;
- break;
- }
+ spec->board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
+ stac9872_models,
+ stac9872_cfg_tbl);
+ if (spec->board_config < 0)
+ snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9872, "
+ "using BIOS defaults\n");
+ else
+ stac92xx_set_config_regs(codec,
+ stac9872_brd_tbl[spec->board_config]);
+
+ spec->num_pins = ARRAY_SIZE(stac9872_pin_nids);
+ spec->pin_nids = stac9872_pin_nids;
+ spec->multiout.dac_nids = spec->dac_nids;
+ spec->num_adcs = ARRAY_SIZE(stac9872_adc_nids);
+ spec->adc_nids = stac9872_adc_nids;
+ spec->num_muxes = ARRAY_SIZE(stac9872_mux_nids);
+ spec->mux_nids = stac9872_mux_nids;
+ spec->mixer = stac9872_mixer;
+ spec->init = stac9872_core_init;
+
+ err = stac92xx_parse_auto_config(codec, 0x10, 0x12);
+ if (err < 0) {
+ stac92xx_free(codec);
+ return -EINVAL;
+ }
+ spec->input_mux = &spec->private_imux;
+ codec->patch_ops = stac92xx_patch_ops;
return 0;
}
unsigned int def_conf;
unsigned char seqassoc;
- def_conf = snd_hda_codec_read(codec, nid, 0,
- AC_VERB_GET_CONFIG_DEFAULT, 0);
+ def_conf = snd_hda_codec_get_pincfg(codec, nid);
seqassoc = (unsigned char) get_defcfg_association(def_conf);
seqassoc = (seqassoc << 4) | get_defcfg_sequence(def_conf);
if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE) {
if (seqassoc == 0xff) {
def_conf = def_conf & (~(AC_JACK_PORT_BOTH << 30));
- snd_hda_codec_write(codec, nid, 0,
- AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
- def_conf >> 24);
+ snd_hda_codec_set_pincfg(codec, nid, def_conf);
}
}
spec->multiout.max_channels = spec->multiout.num_dacs * 2;
- if (spec->autocfg.dig_out_pin)
+ if (spec->autocfg.dig_outs)
spec->multiout.dig_out_nid = VT1708_DIGOUT_NID;
if (spec->autocfg.dig_in_pin)
spec->dig_in_nid = VT1708_DIGIN_NID;
spec->multiout.max_channels = spec->multiout.num_dacs * 2;
- if (spec->autocfg.dig_out_pin)
+ if (spec->autocfg.dig_outs)
spec->multiout.dig_out_nid = VT1709_DIGOUT_NID;
if (spec->autocfg.dig_in_pin)
spec->dig_in_nid = VT1709_DIGIN_NID;
spec->multiout.max_channels = spec->multiout.num_dacs * 2;
- if (spec->autocfg.dig_out_pin)
+ if (spec->autocfg.dig_outs)
spec->multiout.dig_out_nid = VT1708B_DIGOUT_NID;
if (spec->autocfg.dig_in_pin)
spec->dig_in_nid = VT1708B_DIGIN_NID;
spec->multiout.max_channels = spec->multiout.num_dacs * 2;
- if (spec->autocfg.dig_out_pin)
+ if (spec->autocfg.dig_outs)
spec->multiout.dig_out_nid = VT1708S_DIGOUT_NID;
spec->extra_dig_out_nid = 0x15;
spec->multiout.max_channels = spec->multiout.num_dacs * 2;
- if (spec->autocfg.dig_out_pin)
+ if (spec->autocfg.dig_outs)
spec->multiout.dig_out_nid = VT1702_DIGOUT_NID;
spec->extra_dig_out_nid = 0x1B;
u16 pbkstatus;
struct snd_pcm_substream *substream;
pbkstatus = inw(ICEDS(ice, INTSTAT));
- /* printk("pbkstatus = 0x%x\n", pbkstatus); */
+ /* printk(KERN_DEBUG "pbkstatus = 0x%x\n", pbkstatus); */
for (idx = 0; idx < 6; idx++) {
if ((pbkstatus & (3 << (idx * 2))) == 0)
continue;
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
strcpy(card->driver, "ICE1712");
strcpy(card->shortname, "ICEnsemble ICE1712");
struct snd_rawmidi_substream, list);
}
+static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable);
+
static void vt1724_midi_write(struct snd_ice1712 *ice)
{
struct snd_rawmidi_substream *s;
for (i = 0; i < count; ++i)
outb(buffer[i], ICEREG1724(ice, MPU_DATA));
}
+ /* mask irq when all bytes have been transmitted.
+ * enabled again in output_trigger when the new data comes in.
+ */
+ enable_midi_irq(ice, VT1724_IRQ_MPU_TX,
+ !snd_rawmidi_transmit_empty(s));
}
static void vt1724_midi_read(struct snd_ice1712 *ice)
}
}
-static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream,
- u8 flag, int enable)
+/* call with ice->reg_lock */
+static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable)
{
- struct snd_ice1712 *ice = substream->rmidi->private_data;
- u8 mask;
-
- spin_lock_irq(&ice->reg_lock);
- mask = inb(ICEREG1724(ice, IRQMASK));
+ u8 mask = inb(ICEREG1724(ice, IRQMASK));
if (enable)
mask &= ~flag;
else
mask |= flag;
outb(mask, ICEREG1724(ice, IRQMASK));
+}
+
+static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream,
+ u8 flag, int enable)
+{
+ struct snd_ice1712 *ice = substream->rmidi->private_data;
+
+ spin_lock_irq(&ice->reg_lock);
+ enable_midi_irq(ice, flag, enable);
spin_unlock_irq(&ice->reg_lock);
}
static int vt1724_midi_output_open(struct snd_rawmidi_substream *s)
{
- vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 1);
return 0;
}
static int vt1724_midi_output_close(struct snd_rawmidi_substream *s)
{
- vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0);
return 0;
}
vt1724_midi_write(ice);
} else {
ice->midi_output = 0;
+ enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
}
spin_unlock_irqrestore(&ice->reg_lock, flags);
}
struct snd_ice1712 *ice = s->rmidi->private_data;
unsigned long timeout;
+ vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0);
/* 32 bytes should be transmitted in less than about 12 ms */
timeout = jiffies + msecs_to_jiffies(15);
do {
status &= status_mask;
if (status == 0)
break;
+ spin_lock(&ice->reg_lock);
if (++timeout > 10) {
status = inb(ICEREG1724(ice, IRQSTAT));
printk(KERN_ERR "ice1724: Too long irq loop, "
"status = 0x%x\n", status);
if (status & VT1724_IRQ_MPU_TX) {
printk(KERN_ERR "ice1724: Disabling MPU_TX\n");
- outb(inb(ICEREG1724(ice, IRQMASK)) |
- VT1724_IRQ_MPU_TX,
- ICEREG1724(ice, IRQMASK));
+ enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
}
+ spin_unlock(&ice->reg_lock);
break;
}
handled = 1;
if (status & VT1724_IRQ_MPU_TX) {
- spin_lock(&ice->reg_lock);
if (ice->midi_output)
vt1724_midi_write(ice);
- spin_unlock(&ice->reg_lock);
+ else
+ enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
/* Due to mysterical reasons, MPU_TX is always
* generated (and can't be cleared) when a PCM
* playback is going. So let's ignore at the
status_mask &= ~VT1724_IRQ_MPU_TX;
}
if (status & VT1724_IRQ_MPU_RX) {
- spin_lock(&ice->reg_lock);
if (ice->midi_input)
vt1724_midi_read(ice);
else
vt1724_midi_clear_rx(ice);
- spin_unlock(&ice->reg_lock);
}
/* ack MPU irq */
outb(status, ICEREG1724(ice, IRQSTAT));
+ spin_unlock(&ice->reg_lock);
if (status & VT1724_IRQ_MTPCM) {
/*
* Multi-track PCM
spin_unlock_irq(&ice->reg_lock);
- /* printk("pro prepare: ch = %d, addr = 0x%x, buffer = 0x%x, period = 0x%x\n", substream->runtime->channels, (unsigned int)substream->runtime->dma_addr, snd_pcm_lib_buffer_bytes(substream), snd_pcm_lib_period_bytes(substream)); */
+ /*
+ printk(KERN_DEBUG "pro prepare: ch = %d, addr = 0x%x, "
+ "buffer = 0x%x, period = 0x%x\n",
+ substream->runtime->channels,
+ (unsigned int)substream->runtime->dma_addr,
+ snd_pcm_lib_buffer_bytes(substream),
+ snd_pcm_lib_period_bytes(substream));
+ */
return 0;
}
wait_i2c_busy(ice);
val = inb(ICEREG1724(ice, I2C_DATA));
mutex_unlock(&ice->i2c_mutex);
- /* printk("i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val); */
+ /*
+ printk(KERN_DEBUG "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
+ */
return val;
}
{
mutex_lock(&ice->i2c_mutex);
wait_i2c_busy(ice);
- /* printk("i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data); */
+ /*
+ printk(KERN_DEBUG "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
+ */
outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
outb(data, ICEREG1724(ice, I2C_DATA));
outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
strcpy(card->driver, "ICE1724");
strcpy(card->shortname, "ICEnsemble ICE1724");
new_gpio = old_gpio &
~((unsigned int) kcontrol->private_value);
}
- /* printk("JULI - mute/unmute: control_value: 0x%x, old_gpio: 0x%x, \
- new_gpio 0x%x\n",
+ /* printk(KERN_DEBUG
+ "JULI - mute/unmute: control_value: 0x%x, old_gpio: 0x%x, "
+ "new_gpio 0x%x\n",
(unsigned int)ucontrol->value.integer.value[0], old_gpio,
new_gpio); */
if (old_gpio != new_gpio) {
idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + STAC946X_LF_VOLUME;
/* due to possible conflicts with stac9460_set_rate_val, mutexing */
mutex_lock(&spec->mute_mutex);
- /*printk("Mute put: reg 0x%02x, ctrl value: 0x%02x\n", idx,
- ucontrol->value.integer.value[0]);*/
+ /*
+ printk(KERN_DEBUG "Mute put: reg 0x%02x, ctrl value: 0x%02x\n", idx,
+ ucontrol->value.integer.value[0]);
+ */
change = stac9460_dac_mute(ice, idx, ucontrol->value.integer.value[0]);
mutex_unlock(&spec->mute_mutex);
return change;
change = (ovol != nvol);
if (change) {
ovol = (0x7f - nvol) | (tmp & 0x80);
- /*printk("DAC Volume: reg 0x%02x: 0x%02x\n", idx, ovol);*/
+ /*
+ printk(KERN_DEBUG "DAC Volume: reg 0x%02x: 0x%02x\n",
+ idx, ovol);
+ */
stac9460_put(ice, idx, (0x7f - nvol) | (tmp & 0x80));
}
return change;
for (idx = 0; idx < 7 ; ++idx)
changed[idx] = stac9460_dac_mute(ice,
STAC946X_MASTER_VOLUME + idx, 0);
- /*printk("Rate change: %d, new MC: 0x%02x\n", rate, new);*/
+ /*printk(KERN_DEBUG "Rate change: %d, new MC: 0x%02x\n", rate, new);*/
stac9460_put(ice, STAC946X_MASTER_CLOCKING, new);
udelay(10);
/* unmuting - only originally unmuted dacs -
bdbar[idx + 1] = cpu_to_le32(0x80000000 | /* interrupt on completion */
ichdev->fragsize >> ichdev->pos_shift);
#if 0
- printk("bdbar[%i] = 0x%x [0x%x]\n",
+ printk(KERN_DEBUG "bdbar[%i] = 0x%x [0x%x]\n",
idx + 0, bdbar[idx + 0], bdbar[idx + 1]);
#endif
}
ichdev->lvi_frag = ICH_REG_LVI_MASK % ichdev->frags;
ichdev->position = 0;
#if 0
- printk("lvi_frag = %i, frags = %i, period_size = 0x%x, period_size1 = 0x%x\n",
- ichdev->lvi_frag, ichdev->frags, ichdev->fragsize, ichdev->fragsize1);
+ printk(KERN_DEBUG "lvi_frag = %i, frags = %i, period_size = 0x%x, "
+ "period_size1 = 0x%x\n",
+ ichdev->lvi_frag, ichdev->frags, ichdev->fragsize,
+ ichdev->fragsize1);
#endif
/* clear interrupts */
iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI);
ichdev->lvi_frag %= ichdev->frags;
ichdev->bdbar[ichdev->lvi * 2] = cpu_to_le32(ichdev->physbuf + ichdev->lvi_frag * ichdev->fragsize1);
#if 0
- printk("new: bdbar[%i] = 0x%x [0x%x], prefetch = %i, all = 0x%x, 0x%x\n",
+ printk(KERN_DEBUG "new: bdbar[%i] = 0x%x [0x%x], prefetch = %i, "
+ "all = 0x%x, 0x%x\n",
ichdev->lvi * 2, ichdev->bdbar[ichdev->lvi * 2],
ichdev->bdbar[ichdev->lvi * 2 + 1], inb(ICH_REG_OFF_PIV + port),
inl(port + 4), inb(port + ICH_REG_OFF_CR));
iputdword(chip, ICHREG(ALI_INTERRUPTSR), 0x00000000);
}
-static int snd_intel8x0_ich_chip_init(struct intel8x0 *chip, int probing)
-{
- unsigned long end_time;
- unsigned int cnt, status, nstatus;
-
- /* put logic to right state */
- /* first clear status bits */
- status = ICH_RCS | ICH_MCINT | ICH_POINT | ICH_PIINT;
- if (chip->device_type == DEVICE_NFORCE)
- status |= ICH_NVSPINT;
- cnt = igetdword(chip, ICHREG(GLOB_STA));
- iputdword(chip, ICHREG(GLOB_STA), cnt & status);
+#ifdef CONFIG_SND_AC97_POWER_SAVE
+static struct snd_pci_quirk ich_chip_reset_mode[] = {
+ SND_PCI_QUIRK(0x1014, 0x051f, "Thinkpad R32", 1),
+ { } /* end */
+};
+static int snd_intel8x0_ich_chip_cold_reset(struct intel8x0 *chip)
+{
+ unsigned int cnt;
/* ACLink on, 2 channels */
+
+ if (snd_pci_quirk_lookup(chip->pci, ich_chip_reset_mode))
+ return -EIO;
+
cnt = igetdword(chip, ICHREG(GLOB_CNT));
cnt &= ~(ICH_ACLINK | ICH_PCM_246_MASK);
-#ifdef CONFIG_SND_AC97_POWER_SAVE
+
/* do cold reset - the full ac97 powerdown may leave the controller
* in a warm state but actually it cannot communicate with the codec.
*/
udelay(10);
iputdword(chip, ICHREG(GLOB_CNT), cnt | ICH_AC97COLD);
msleep(1);
+ return 0;
+}
+#define snd_intel8x0_ich_chip_can_cold_reset(chip) \
+ (!snd_pci_quirk_lookup(chip->pci, ich_chip_reset_mode))
#else
+#define snd_intel8x0_ich_chip_cold_reset(chip) 0
+#define snd_intel8x0_ich_chip_can_cold_reset(chip) (0)
+#endif
+
+static int snd_intel8x0_ich_chip_reset(struct intel8x0 *chip)
+{
+ unsigned long end_time;
+ unsigned int cnt;
+ /* ACLink on, 2 channels */
+ cnt = igetdword(chip, ICHREG(GLOB_CNT));
+ cnt &= ~(ICH_ACLINK | ICH_PCM_246_MASK);
/* finish cold or do warm reset */
cnt |= (cnt & ICH_AC97COLD) == 0 ? ICH_AC97COLD : ICH_AC97WARM;
iputdword(chip, ICHREG(GLOB_CNT), cnt);
end_time = (jiffies + (HZ / 4)) + 1;
do {
if ((igetdword(chip, ICHREG(GLOB_CNT)) & ICH_AC97WARM) == 0)
- goto __ok;
+ return 0;
schedule_timeout_uninterruptible(1);
} while (time_after_eq(end_time, jiffies));
snd_printk(KERN_ERR "AC'97 warm reset still in progress? [0x%x]\n",
igetdword(chip, ICHREG(GLOB_CNT)));
return -EIO;
+}
+
+static int snd_intel8x0_ich_chip_init(struct intel8x0 *chip, int probing)
+{
+ unsigned long end_time;
+ unsigned int status, nstatus;
+ unsigned int cnt;
+ int err;
+
+ /* put logic to right state */
+ /* first clear status bits */
+ status = ICH_RCS | ICH_MCINT | ICH_POINT | ICH_PIINT;
+ if (chip->device_type == DEVICE_NFORCE)
+ status |= ICH_NVSPINT;
+ cnt = igetdword(chip, ICHREG(GLOB_STA));
+ iputdword(chip, ICHREG(GLOB_STA), cnt & status);
+
+ if (snd_intel8x0_ich_chip_can_cold_reset(chip))
+ err = snd_intel8x0_ich_chip_cold_reset(chip);
+ else
+ err = snd_intel8x0_ich_chip_reset(chip);
+ if (err < 0)
+ return err;
- __ok:
-#endif
if (probing) {
/* wait for any codec ready status.
* Once it becomes ready it should remain ready
int err;
struct shortname_table *name;
- card = snd_card_new(index, id, THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index, id, THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
if (spdif_aclink < 0)
spdif_aclink = check_default_spdif_aclink(pci);
bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf + (((idx >> 1) * ichdev->fragsize) % ichdev->size));
bdbar[idx + 1] = cpu_to_le32(0x80000000 | /* interrupt on completion */
ichdev->fragsize >> chip->pcm_pos_shift);
- // printk("bdbar[%i] = 0x%x [0x%x]\n", idx + 0, bdbar[idx + 0], bdbar[idx + 1]);
+ /*
+ printk(KERN_DEBUG "bdbar[%i] = 0x%x [0x%x]\n",
+ idx + 0, bdbar[idx + 0], bdbar[idx + 1]);
+ */
}
ichdev->frags = ichdev->size / ichdev->fragsize;
}
ichdev->lvi_frag = ICH_REG_LVI_MASK % ichdev->frags;
ichdev->position = 0;
#if 0
- printk("lvi_frag = %i, frags = %i, period_size = 0x%x, period_size1 = 0x%x\n",
- ichdev->lvi_frag, ichdev->frags, ichdev->fragsize, ichdev->fragsize1);
+ printk(KERN_DEBUG "lvi_frag = %i, frags = %i, period_size = 0x%x, "
+ "period_size1 = 0x%x\n",
+ ichdev->lvi_frag, ichdev->frags, ichdev->fragsize,
+ ichdev->fragsize1);
#endif
/* clear interrupts */
iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI);
ichdev->lvi_frag *
ichdev->fragsize1);
#if 0
- printk("new: bdbar[%i] = 0x%x [0x%x], prefetch = %i, all = 0x%x, 0x%x\n",
+ printk(KERN_DEBUG "new: bdbar[%i] = 0x%x [0x%x], "
+ "prefetch = %i, all = 0x%x, 0x%x\n",
ichdev->lvi * 2, ichdev->bdbar[ichdev->lvi * 2],
ichdev->bdbar[ichdev->lvi * 2 + 1], inb(ICH_REG_OFF_PIV + port),
inl(port + 4), inb(port + ICH_REG_OFF_CR));
int err;
struct shortname_table *name;
- card = snd_card_new(index, id, THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index, id, THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
strcpy(card->driver, "ICH-MODEM");
strcpy(card->shortname, "Intel ICH");
dev++;
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
if ((err = snd_korg1212_create(card, pci, &korg1212)) < 0) {
snd_card_free(card);
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
switch (pci->device) {
case PCI_DEVICE_ID_ESS_ALLEGRO:
/* set the format to the board */
err = mixart_set_format(stream, format);
if(err < 0) {
+ mutex_unlock(&mgr->setup_mutex);
return err;
}
else
idx = index[dev] + i;
snprintf(tmpid, sizeof(tmpid), "%s-%d", id[dev] ? id[dev] : "MIXART", i);
- card = snd_card_new(idx, tmpid, THIS_MODULE, 0);
+ err = snd_card_create(idx, tmpid, THIS_MODULE, 0, &card);
- if (! card) {
+ if (err < 0) {
snd_printk(KERN_ERR "cannot allocate the card %d\n", i);
snd_mixart_free(mgr);
- return -ENOMEM;
+ return err;
}
strcpy(card->driver, CARD_NAME);
status_daught = readl_be( MIXART_MEM( mgr,MIXART_PSEUDOREG_DXLX_STATUS_OFFSET ));
/* motherboard xilinx status 5 will say that the board is performing a reset */
- if( status_xilinx == 5 ) {
- snd_printk( KERN_ERR "miXart is resetting !\n");
+ if (status_xilinx == 5) {
+ snd_printk(KERN_ERR "miXart is resetting !\n");
return -EAGAIN; /* try again later */
}
case MIXART_MOTHERBOARD_XLX_INDEX:
/* xilinx already loaded ? */
- if( status_xilinx == 4 ) {
- snd_printk( KERN_DEBUG "xilinx is already loaded !\n");
+ if (status_xilinx == 4) {
+ snd_printk(KERN_DEBUG "xilinx is already loaded !\n");
return 0;
}
/* the status should be 0 == "idle" */
- if( status_xilinx != 0 ) {
- snd_printk( KERN_ERR "xilinx load error ! status = %d\n", status_xilinx);
+ if (status_xilinx != 0) {
+ snd_printk(KERN_ERR "xilinx load error ! status = %d\n",
+ status_xilinx);
return -EIO; /* modprob -r may help ? */
}
case MIXART_MOTHERBOARD_ELF_INDEX:
- if( status_elf == 4 ) {
- snd_printk( KERN_DEBUG "elf file already loaded !\n");
+ if (status_elf == 4) {
+ snd_printk(KERN_DEBUG "elf file already loaded !\n");
return 0;
}
/* the status should be 0 == "idle" */
- if( status_elf != 0 ) {
- snd_printk( KERN_ERR "elf load error ! status = %d\n", status_elf);
+ if (status_elf != 0) {
+ snd_printk(KERN_ERR "elf load error ! status = %d\n",
+ status_elf);
return -EIO; /* modprob -r may help ? */
}
/* wait for xilinx status == 4 */
err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_MXLX_STATUS_OFFSET, 1, 4, 500); /* 5sec */
if (err < 0) {
- snd_printk( KERN_ERR "xilinx was not loaded or could not be started\n");
+ snd_printk(KERN_ERR "xilinx was not loaded or "
+ "could not be started\n");
return err;
}
/* wait for elf status == 4 */
err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_ELF_STATUS_OFFSET, 1, 4, 300); /* 3sec */
if (err < 0) {
- snd_printk( KERN_ERR "elf could not be started\n");
+ snd_printk(KERN_ERR "elf could not be started\n");
return err;
}
default:
/* elf and xilinx should be loaded */
- if( (status_elf != 4) || (status_xilinx != 4) ) {
- printk( KERN_ERR "xilinx or elf not successfully loaded\n");
+ if (status_elf != 4 || status_xilinx != 4) {
+ printk(KERN_ERR "xilinx or elf not "
+ "successfully loaded\n");
return -EIO; /* modprob -r may help ? */
}
/* wait for daughter detection != 0 */
err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_DBRD_PRESENCE_OFFSET, 0, 0, 30); /* 300msec */
if (err < 0) {
- snd_printk( KERN_ERR "error starting elf file\n");
+ snd_printk(KERN_ERR "error starting elf file\n");
return err;
}
return -EINVAL;
/* daughter should be idle */
- if( status_daught != 0 ) {
- printk( KERN_ERR "daughter load error ! status = %d\n", status_daught);
+ if (status_daught != 0) {
+ printk(KERN_ERR "daughter load error ! status = %d\n",
+ status_daught);
return -EIO; /* modprob -r may help ? */
}
/* wait for status == 2 */
err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_DXLX_STATUS_OFFSET, 1, 2, 30); /* 300msec */
if (err < 0) {
- snd_printk( KERN_ERR "daughter board load error\n");
+ snd_printk(KERN_ERR "daughter board load error\n");
return err;
}
/* wait for daughter status == 3 */
err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_DXLX_STATUS_OFFSET, 1, 3, 300); /* 3sec */
if (err < 0) {
- snd_printk( KERN_ERR "daughter board could not be initialised\n");
+ snd_printk(KERN_ERR
+ "daughter board could not be initialised\n");
return err;
}
/* first communication with embedded */
err = mixart_first_init(mgr);
if (err < 0) {
- snd_printk( KERN_ERR "miXart could not be set up\n");
+ snd_printk(KERN_ERR "miXart could not be set up\n");
return err;
}
/* miXart hwdep interface id string */
#define SND_MIXART_HWDEP_ID "miXart Loader"
-static int mixart_hwdep_open(struct snd_hwdep *hw, struct file *file)
-{
- return 0;
-}
-
-static int mixart_hwdep_release(struct snd_hwdep *hw, struct file *file)
-{
- return 0;
-}
-
static int mixart_hwdep_dsp_status(struct snd_hwdep *hw,
struct snd_hwdep_dsp_status *info)
{
hw->iface = SNDRV_HWDEP_IFACE_MIXART;
hw->private_data = mgr;
- hw->ops.open = mixart_hwdep_open;
- hw->ops.release = mixart_hwdep_release;
hw->ops.dsp_status = mixart_hwdep_dsp_status;
hw->ops.dsp_load = mixart_hwdep_dsp_load;
hw->exclusive = 1;
}
}
- card = snd_card_new(index, id, THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index, id, THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
switch (pci->device) {
case PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO:
struct oxygen *chip;
int err;
- card = snd_card_new(index, id, model->owner,
- sizeof *chip + model->model_data_size);
- if (!card)
- return -ENOMEM;
+ err = snd_card_create(index, id, model->owner,
+ sizeof(*chip) + model->model_data_size, &card);
+ if (err < 0)
+ return err;
chip = card->private_data;
chip->card = card;
snprintf(tmpid, sizeof(tmpid), "%s-%d",
id[dev] ? id[dev] : card_name, i);
- card = snd_card_new(idx, tmpid, THIS_MODULE, 0);
+ err = snd_card_create(idx, tmpid, THIS_MODULE, 0, &card);
- if (! card) {
+ if (err < 0) {
snd_printk(KERN_ERR "cannot allocate the card %d\n", i);
pcxhr_free(mgr);
- return -ENOMEM;
+ return err;
}
strcpy(card->driver, DRIVER_NAME);
return 0;
}
-static int pcxhr_hwdep_open(struct snd_hwdep *hw, struct file *file)
-{
- return 0;
-}
-
-static int pcxhr_hwdep_release(struct snd_hwdep *hw, struct file *file)
-{
- return 0;
-}
-
int pcxhr_setup_firmware(struct pcxhr_mgr *mgr)
{
int err;
hw->iface = SNDRV_HWDEP_IFACE_PCXHR;
hw->private_data = mgr;
- hw->ops.open = pcxhr_hwdep_open;
- hw->ops.release = pcxhr_hwdep_release;
hw->ops.dsp_status = pcxhr_hwdep_dsp_status;
hw->ops.dsp_load = pcxhr_hwdep_dsp_load;
hw->exclusive = 1;
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
if ((err = snd_riptide_create(card, pci, &chip)) < 0) {
snd_card_free(card);
return err;
return -ENOENT;
}
- if ((card = snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(struct rme32))) == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct rme32), &card);
+ if (err < 0)
+ return err;
card->private_free = snd_rme32_card_free;
rme32 = (struct rme32 *) card->private_data;
rme32->card = card;
dev++;
return -ENOENT;
}
- if ((card = snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(struct rme96))) == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct rme96), &card);
+ if (err < 0)
+ return err;
card->private_free = snd_rme96_card_free;
rme96 = (struct rme96 *)card->private_data;
rme96->card = card;
/* the meters are regular i/o-mapped registers, but offset
considerably from the rest. the peak registers are reset
- when read; the least-significant 4 bits are full-scale counters;
+ when read; the least-significant 4 bits are full-scale counters;
the actual peak value is in the most-significant 24 bits.
*/
26*3 values are read in ss mode
14*3 in ds mode, with no gap between values
*/
-#define HDSP_9652_peakBase 7164
+#define HDSP_9652_peakBase 7164
#define HDSP_9652_rmsBase 4096
/* c.f. the hdsp_9632_meters_t struct */
#define HDSP_SPDIFEmphasis (1<<10) /* 0=none, 1=on */
#define HDSP_SPDIFNonAudio (1<<11) /* 0=off, 1=on */
#define HDSP_SPDIFOpticalOut (1<<12) /* 1=use 1st ADAT connector for SPDIF, 0=do not */
-#define HDSP_SyncRef2 (1<<13)
-#define HDSP_SPDIFInputSelect0 (1<<14)
-#define HDSP_SPDIFInputSelect1 (1<<15)
-#define HDSP_SyncRef0 (1<<16)
+#define HDSP_SyncRef2 (1<<13)
+#define HDSP_SPDIFInputSelect0 (1<<14)
+#define HDSP_SPDIFInputSelect1 (1<<15)
+#define HDSP_SyncRef0 (1<<16)
#define HDSP_SyncRef1 (1<<17)
-#define HDSP_AnalogExtensionBoard (1<<18) /* For H9632 cards */
+#define HDSP_AnalogExtensionBoard (1<<18) /* For H9632 cards */
#define HDSP_XLRBreakoutCable (1<<20) /* For H9632 cards */
#define HDSP_Midi0InterruptEnable (1<<22)
#define HDSP_Midi1InterruptEnable (1<<23)
#define HDSP_TimecodeSync (1<<27)
#define HDSP_AEBO (1<<28) /* H9632 specific Analog Extension Boards */
#define HDSP_AEBI (1<<29) /* 0 = present, 1 = absent */
-#define HDSP_midi0IRQPending (1<<30)
+#define HDSP_midi0IRQPending (1<<30)
#define HDSP_midi1IRQPending (1<<31)
#define HDSP_spdifFrequencyMask (HDSP_spdifFrequency0|HDSP_spdifFrequency1|HDSP_spdifFrequency2)
#define HDSP_CHANNEL_BUFFER_BYTES (4*HDSP_CHANNEL_BUFFER_SAMPLES)
/* the size of the area we need to allocate for DMA transfers. the
- size is the same regardless of the number of channels - the
+ size is the same regardless of the number of channels - the
Multiface still uses the same memory area.
Note that we allocate 1 more channel than is apparently needed
unsigned char qs_in_channels; /* quad speed mode for H9632 */
unsigned char ds_in_channels;
unsigned char ss_in_channels; /* different for multiface/digiface */
- unsigned char qs_out_channels;
+ unsigned char qs_out_channels;
unsigned char ds_out_channels;
unsigned char ss_out_channels;
static char channel_map_mf_ss[HDSP_MAX_CHANNELS] = { /* Multiface */
/* Analog */
- 0, 1, 2, 3, 4, 5, 6, 7,
+ 0, 1, 2, 3, 4, 5, 6, 7,
/* ADAT 2 */
- 16, 17, 18, 19, 20, 21, 22, 23,
+ 16, 17, 18, 19, 20, 21, 22, 23,
/* SPDIF */
24, 25,
-1, -1, -1, -1, -1, -1, -1, -1
/* SPDIF */
8, 9,
/* Analog */
- 10, 11,
+ 10, 11,
/* AO4S-192 and AI4S-192 extension boards */
12, 13, 14, 15,
/* others don't exist */
- -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1
};
/* SPDIF */
8, 9,
/* Analog */
- 10, 11,
+ 10, 11,
/* AO4S-192 and AI4S-192 extension boards */
12, 13, 14, 15,
/* others don't exist */
static struct pci_device_id snd_hdsp_ids[] = {
{
.vendor = PCI_VENDOR_ID_XILINX,
- .device = PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP,
+ .device = PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
}, /* RME Hammerfall-DSP */
static int hdsp_check_for_iobox (struct hdsp *hdsp)
{
-
if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return 0;
if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_ConfigError) {
snd_printk ("Hammerfall-DSP: no Digiface or Multiface connected!\n");
return -EIO;
}
return 0;
+}
+static int hdsp_wait_for_iobox(struct hdsp *hdsp, unsigned int loops,
+ unsigned int delay)
+{
+ unsigned int i;
+
+ if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
+ return 0;
+
+ for (i = 0; i != loops; ++i) {
+ if (hdsp_read(hdsp, HDSP_statusRegister) & HDSP_ConfigError)
+ msleep(delay);
+ else {
+ snd_printd("Hammerfall-DSP: iobox found after %ums!\n",
+ i * delay);
+ return 0;
+ }
+ }
+
+ snd_printk("Hammerfall-DSP: no Digiface or Multiface connected!\n");
+ hdsp->state &= ~HDSP_FirmwareLoaded;
+ return -EIO;
}
static int snd_hdsp_load_firmware_from_cache(struct hdsp *hdsp) {
unsigned long flags;
if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
-
+
snd_printk ("Hammerfall-DSP: loading firmware\n");
hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_PROGRAM);
hdsp_write (hdsp, HDSP_fifoData, 0);
-
+
if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
snd_printk ("Hammerfall-DSP: timeout waiting for download preparation\n");
return -EIO;
}
-
+
hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
-
+
for (i = 0; i < 24413; ++i) {
hdsp_write(hdsp, HDSP_fifoData, hdsp->firmware_cache[i]);
if (hdsp_fifo_wait (hdsp, 127, HDSP_LONG_WAIT)) {
}
ssleep(3);
-
+
if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
snd_printk ("Hammerfall-DSP: timeout at end of firmware loading\n");
return -EIO;
#endif
hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
snd_printk ("Hammerfall-DSP: finished firmware loading\n");
-
+
}
if (hdsp->state & HDSP_InitializationComplete) {
snd_printk(KERN_INFO "Hammerfall-DSP: firmware loaded from cache, restoring defaults\n");
spin_lock_irqsave(&hdsp->lock, flags);
snd_hdsp_set_defaults(hdsp);
- spin_unlock_irqrestore(&hdsp->lock, flags);
+ spin_unlock_irqrestore(&hdsp->lock, flags);
}
-
+
hdsp->state |= HDSP_FirmwareLoaded;
return 0;
static int hdsp_get_iobox_version (struct hdsp *hdsp)
{
if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
-
+
hdsp_write (hdsp, HDSP_control2Reg, HDSP_PROGRAM);
hdsp_write (hdsp, HDSP_fifoData, 0);
if (hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT) < 0)
hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT);
} else {
hdsp->io_type = Digiface;
- }
+ }
} else {
/* firmware was already loaded, get iobox type */
if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1)
static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout)
-{
+{
int i;
/* the fifoStatus registers reports on how many words
are available in the command FIFO.
*/
-
+
for (i = 0; i < timeout; i++) {
if ((int)(hdsp_read (hdsp, HDSP_fifoStatus) & 0xff) <= count)
if (addr >= HDSP_MATRIX_MIXER_SIZE)
return -1;
-
+
if (hdsp->io_type == H9652 || hdsp->io_type == H9632) {
/* from martin bjornsen:
-
+
"You can only write dwords to the
mixer memory which contain two
mixer values in the low and high
hdsp->mixer_matrix[addr] = data;
-
+
/* `addr' addresses a 16-bit wide address, but
the address space accessed via hdsp_write
uses byte offsets. put another way, addr
to access 0 to 2703 ...
*/
ad = addr/2;
-
- hdsp_write (hdsp, 4096 + (ad*4),
- (hdsp->mixer_matrix[(addr&0x7fe)+1] << 16) +
+
+ hdsp_write (hdsp, 4096 + (ad*4),
+ (hdsp->mixer_matrix[(addr&0x7fe)+1] << 16) +
hdsp->mixer_matrix[addr&0x7fe]);
-
+
return 0;
} else {
ad = (addr << 16) + data;
-
+
if (hdsp_fifo_wait(hdsp, 127, HDSP_LONG_WAIT))
return -1;
if (status & HDSP_SPDIFErrorFlag)
return 0;
-
+
switch (rate_bits) {
case HDSP_spdifFrequency32KHz: return 32000;
case HDSP_spdifFrequency44_1KHz: return 44100;
case HDSP_spdifFrequency64KHz: return 64000;
case HDSP_spdifFrequency88_2KHz: return 88200;
case HDSP_spdifFrequency96KHz: return 96000;
- case HDSP_spdifFrequency128KHz:
+ case HDSP_spdifFrequency128KHz:
if (hdsp->io_type == H9632) return 128000;
break;
- case HDSP_spdifFrequency176_4KHz:
+ case HDSP_spdifFrequency176_4KHz:
if (hdsp->io_type == H9632) return 176400;
break;
- case HDSP_spdifFrequency192KHz:
+ case HDSP_spdifFrequency192KHz:
if (hdsp->io_type == H9632) return 192000;
break;
default:
{
u64 n;
u32 r;
-
+
if (rate >= 112000)
rate /= 4;
else if (rate >= 56000)
there is no need for it (e.g. during module
initialization).
*/
-
- if (!(hdsp->control_register & HDSP_ClockModeMaster)) {
+
+ if (!(hdsp->control_register & HDSP_ClockModeMaster)) {
if (called_internally) {
/* request from ctl or card initialization */
snd_printk(KERN_ERR "Hammerfall-DSP: device is not running as a clock master: cannot set sample rate.\n");
return -1;
- } else {
+ } else {
/* hw_param request while in AutoSync mode */
int external_freq = hdsp_external_sample_rate(hdsp);
int spdif_freq = hdsp_spdif_sample_rate(hdsp);
-
+
if ((spdif_freq == external_freq*2) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1))
snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in double speed mode\n");
else if (hdsp->io_type == H9632 && (spdif_freq == external_freq*4) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1))
- snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in quad speed mode\n");
+ snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in quad speed mode\n");
else if (rate != external_freq) {
snd_printk(KERN_INFO "Hammerfall-DSP: No AutoSync source for requested rate\n");
return -1;
- }
- }
+ }
+ }
}
current_rate = hdsp->system_sample_rate;
/* Changing from a "single speed" to a "double speed" rate is
not allowed if any substreams are open. This is because
- such a change causes a shift in the location of
+ such a change causes a shift in the location of
the DMA buffers and a reduction in the number of available
- buffers.
+ buffers.
Note that a similar but essentially insoluble problem
exists for externally-driven rate changes. All we can do
if (rate > 96000 && hdsp->io_type != H9632)
return -EINVAL;
-
+
switch (rate) {
case 32000:
if (current_rate > 48000)
break;
}
}
-
+
hdsp->system_sample_rate = rate;
return 0;
unsigned char buf[128];
/* Output is not interrupt driven */
-
+
spin_lock_irqsave (&hmidi->lock, flags);
if (hmidi->output) {
if (!snd_rawmidi_transmit_empty (hmidi->output)) {
if ((n_pending = snd_hdsp_midi_output_possible (hmidi->hdsp, hmidi->id)) > 0) {
if (n_pending > (int)sizeof (buf))
n_pending = sizeof (buf);
-
+
if ((to_write = snd_rawmidi_transmit (hmidi->output, buf, n_pending)) > 0) {
- for (i = 0; i < to_write; ++i)
+ for (i = 0; i < to_write; ++i)
snd_hdsp_midi_write_byte (hmidi->hdsp, hmidi->id, buf[i]);
}
}
{
struct hdsp_midi *hmidi = (struct hdsp_midi *) data;
unsigned long flags;
-
+
snd_hdsp_midi_output_write(hmidi);
spin_lock_irqsave (&hmidi->lock, flags);
/* this does not bump hmidi->istimer, because the
kernel automatically removed the timer when it
expired, and we are now adding it back, thus
- leaving istimer wherever it was set before.
+ leaving istimer wherever it was set before.
*/
if (hmidi->istimer) {
static int snd_hdsp_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif);
return 0;
}
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
int change;
u32 val;
-
+
val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958);
spin_lock_irq(&hdsp->lock);
change = val != hdsp->creg_spdif;
static int snd_hdsp_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif_stream);
return 0;
}
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
int change;
u32 val;
-
+
val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958);
spin_lock_irq(&hdsp->lock);
change = val != hdsp->creg_spdif_stream;
static int snd_hdsp_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
ucontrol->value.enumerated.item[0] = hdsp_spdif_in(hdsp);
return 0;
}
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
int change;
unsigned int val;
-
+
if (!snd_hdsp_use_is_exclusive(hdsp))
return -EBUSY;
val = ucontrol->value.enumerated.item[0] % ((hdsp->io_type == H9632) ? 4 : 3);
static int snd_hdsp_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
ucontrol->value.integer.value[0] = hdsp_spdif_out(hdsp);
return 0;
}
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
int change;
unsigned int val;
-
+
if (!snd_hdsp_use_is_exclusive(hdsp))
return -EBUSY;
val = ucontrol->value.integer.value[0] & 1;
static int snd_hdsp_get_spdif_professional(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
ucontrol->value.integer.value[0] = hdsp_spdif_professional(hdsp);
return 0;
}
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
int change;
unsigned int val;
-
+
if (!snd_hdsp_use_is_exclusive(hdsp))
return -EBUSY;
val = ucontrol->value.integer.value[0] & 1;
static int snd_hdsp_get_spdif_emphasis(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
ucontrol->value.integer.value[0] = hdsp_spdif_emphasis(hdsp);
return 0;
}
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
int change;
unsigned int val;
-
+
if (!snd_hdsp_use_is_exclusive(hdsp))
return -EBUSY;
val = ucontrol->value.integer.value[0] & 1;
static int snd_hdsp_get_spdif_nonaudio(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
ucontrol->value.integer.value[0] = hdsp_spdif_nonaudio(hdsp);
return 0;
}
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
int change;
unsigned int val;
-
+
if (!snd_hdsp_use_is_exclusive(hdsp))
return -EBUSY;
val = ucontrol->value.integer.value[0] & 1;
static int snd_hdsp_get_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
switch (hdsp_spdif_sample_rate(hdsp)) {
case 32000:
ucontrol->value.enumerated.item[0] = 0;
ucontrol->value.enumerated.item[0] = 9;
break;
default:
- ucontrol->value.enumerated.item[0] = 6;
+ ucontrol->value.enumerated.item[0] = 6;
}
return 0;
}
static int snd_hdsp_get_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
ucontrol->value.enumerated.item[0] = hdsp->system_sample_rate;
return 0;
}
static int snd_hdsp_info_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
- static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
+ static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
uinfo->count = 1;
uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7 ;
static int snd_hdsp_get_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
switch (hdsp_external_sample_rate(hdsp)) {
case 32000:
ucontrol->value.enumerated.item[0] = 0;
break;
case 192000:
ucontrol->value.enumerated.item[0] = 9;
- break;
+ break;
default:
- ucontrol->value.enumerated.item[0] = 6;
+ ucontrol->value.enumerated.item[0] = 6;
}
return 0;
}
static int snd_hdsp_info_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
static char *texts[] = {"Master", "Slave" };
-
+
uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
uinfo->count = 1;
uinfo->value.enumerated.items = 2;
static int snd_hdsp_get_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
ucontrol->value.enumerated.item[0] = hdsp_system_clock_mode(hdsp);
return 0;
}
case 192000:
return 9;
default:
- return 3;
+ return 3;
}
} else {
return 0;
case HDSP_CLOCK_SOURCE_AUTOSYNC:
if (hdsp_external_sample_rate(hdsp) != 0) {
if (!hdsp_set_rate(hdsp, hdsp_external_sample_rate(hdsp), 1)) {
- hdsp->control_register &= ~HDSP_ClockModeMaster;
+ hdsp->control_register &= ~HDSP_ClockModeMaster;
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
return 0;
}
break;
case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ:
rate = 44100;
- break;
+ break;
case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ:
rate = 48000;
break;
{
static char *texts[] = {"AutoSync", "Internal 32.0 kHz", "Internal 44.1 kHz", "Internal 48.0 kHz", "Internal 64.0 kHz", "Internal 88.2 kHz", "Internal 96.0 kHz", "Internal 128 kHz", "Internal 176.4 kHz", "Internal 192.0 KHz" };
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
uinfo->count = 1;
if (hdsp->io_type == H9632)
uinfo->value.enumerated.items = 10;
else
- uinfo->value.enumerated.items = 7;
+ uinfo->value.enumerated.items = 7;
if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
static int snd_hdsp_get_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
ucontrol->value.enumerated.item[0] = hdsp_clock_source(hdsp);
return 0;
}
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
int change;
int val;
-
+
if (!snd_hdsp_use_is_exclusive(hdsp))
return -EBUSY;
val = ucontrol->value.enumerated.item[0];
static int snd_hdsp_get_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
ucontrol->value.integer.value[0] = hdsp->clock_source_locked;
return 0;
}
case HDSP_DAGainMinus10dBV:
return 2;
default:
- return 1;
+ return 1;
}
}
hdsp->control_register |= HDSP_DAGainPlus4dBu;
break;
case 2:
- hdsp->control_register |= HDSP_DAGainMinus10dBV;
- break;
+ hdsp->control_register |= HDSP_DAGainMinus10dBV;
+ break;
default:
return -1;
static int snd_hdsp_info_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
static char *texts[] = {"Hi Gain", "+4 dBu", "-10 dbV"};
-
+
uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
uinfo->count = 1;
uinfo->value.enumerated.items = 3;
static int snd_hdsp_get_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
ucontrol->value.enumerated.item[0] = hdsp_da_gain(hdsp);
return 0;
}
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
int change;
int val;
-
+
if (!snd_hdsp_use_is_exclusive(hdsp))
return -EBUSY;
val = ucontrol->value.enumerated.item[0];
case HDSP_ADGainLowGain:
return 2;
default:
- return 1;
+ return 1;
}
}
hdsp->control_register |= HDSP_ADGainMinus10dBV;
break;
case 1:
- hdsp->control_register |= HDSP_ADGainPlus4dBu;
+ hdsp->control_register |= HDSP_ADGainPlus4dBu;
break;
case 2:
- hdsp->control_register |= HDSP_ADGainLowGain;
- break;
+ hdsp->control_register |= HDSP_ADGainLowGain;
+ break;
default:
return -1;
static int snd_hdsp_info_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
static char *texts[] = {"-10 dBV", "+4 dBu", "Lo Gain"};
-
+
uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
uinfo->count = 1;
uinfo->value.enumerated.items = 3;
static int snd_hdsp_get_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
ucontrol->value.enumerated.item[0] = hdsp_ad_gain(hdsp);
return 0;
}
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
int change;
int val;
-
+
if (!snd_hdsp_use_is_exclusive(hdsp))
return -EBUSY;
val = ucontrol->value.enumerated.item[0];
case HDSP_PhoneGainMinus12dB:
return 2;
default:
- return 0;
+ return 0;
}
}
hdsp->control_register |= HDSP_PhoneGain0dB;
break;
case 1:
- hdsp->control_register |= HDSP_PhoneGainMinus6dB;
+ hdsp->control_register |= HDSP_PhoneGainMinus6dB;
break;
case 2:
- hdsp->control_register |= HDSP_PhoneGainMinus12dB;
- break;
+ hdsp->control_register |= HDSP_PhoneGainMinus12dB;
+ break;
default:
return -1;
static int snd_hdsp_info_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
static char *texts[] = {"0 dB", "-6 dB", "-12 dB"};
-
+
uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
uinfo->count = 1;
uinfo->value.enumerated.items = 3;
static int snd_hdsp_get_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
ucontrol->value.enumerated.item[0] = hdsp_phone_gain(hdsp);
return 0;
}
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
int change;
int val;
-
+
if (!snd_hdsp_use_is_exclusive(hdsp))
return -EBUSY;
val = ucontrol->value.enumerated.item[0];
static int snd_hdsp_get_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
ucontrol->value.enumerated.item[0] = hdsp_xlr_breakout_cable(hdsp);
return 0;
}
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
int change;
int val;
-
+
if (!snd_hdsp_use_is_exclusive(hdsp))
return -EBUSY;
val = ucontrol->value.integer.value[0] & 1;
static int snd_hdsp_get_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
ucontrol->value.enumerated.item[0] = hdsp_aeb(hdsp);
return 0;
}
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
int change;
int val;
-
+
if (!snd_hdsp_use_is_exclusive(hdsp))
return -EBUSY;
val = ucontrol->value.integer.value[0] & 1;
{
static char *texts[] = {"Word", "IEC958", "ADAT1", "ADAT Sync", "ADAT2", "ADAT3" };
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
uinfo->count = 1;
uinfo->value.enumerated.items = 0;
break;
}
-
+
if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
static int snd_hdsp_get_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
ucontrol->value.enumerated.item[0] = hdsp_pref_sync_ref(hdsp);
return 0;
}
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
int change, max;
unsigned int val;
-
+
if (!snd_hdsp_use_is_exclusive(hdsp))
return -EBUSY;
case HDSP_SelSyncRef_SPDIF:
return HDSP_AUTOSYNC_FROM_SPDIF;
case HDSP_SelSyncRefMask:
- return HDSP_AUTOSYNC_FROM_NONE;
+ return HDSP_AUTOSYNC_FROM_NONE;
case HDSP_SelSyncRef_ADAT1:
return HDSP_AUTOSYNC_FROM_ADAT1;
case HDSP_SelSyncRef_ADAT2:
static int snd_hdsp_info_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
static char *texts[] = {"Word", "ADAT Sync", "IEC958", "None", "ADAT1", "ADAT2", "ADAT3" };
-
+
uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
uinfo->count = 1;
uinfo->value.enumerated.items = 7;
static int snd_hdsp_get_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
ucontrol->value.enumerated.item[0] = hdsp_autosync_ref(hdsp);
return 0;
}
static int snd_hdsp_get_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
spin_lock_irq(&hdsp->lock);
ucontrol->value.integer.value[0] = hdsp_line_out(hdsp);
spin_unlock_irq(&hdsp->lock);
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
int change;
unsigned int val;
-
+
if (!snd_hdsp_use_is_exclusive(hdsp))
return -EBUSY;
val = ucontrol->value.integer.value[0] & 1;
static int snd_hdsp_get_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
spin_lock_irq(&hdsp->lock);
ucontrol->value.integer.value[0] = hdsp->precise_ptr;
spin_unlock_irq(&hdsp->lock);
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
int change;
unsigned int val;
-
+
if (!snd_hdsp_use_is_exclusive(hdsp))
return -EBUSY;
val = ucontrol->value.integer.value[0] & 1;
static int snd_hdsp_get_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
spin_lock_irq(&hdsp->lock);
ucontrol->value.integer.value[0] = hdsp->use_midi_tasklet;
spin_unlock_irq(&hdsp->lock);
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
int change;
unsigned int val;
-
+
if (!snd_hdsp_use_is_exclusive(hdsp))
return -EBUSY;
val = ucontrol->value.integer.value[0] & 1;
source = ucontrol->value.integer.value[0];
destination = ucontrol->value.integer.value[1];
-
+
if (source >= hdsp->max_channels)
addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels,destination);
else
addr = hdsp_input_to_output_key(hdsp,source, destination);
-
+
spin_lock_irq(&hdsp->lock);
ucontrol->value.integer.value[2] = hdsp_read_gain (hdsp, addr);
spin_unlock_irq(&hdsp->lock);
static int snd_hdsp_info_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
{
- static char *texts[] = {"No Lock", "Lock", "Sync" };
+ static char *texts[] = {"No Lock", "Lock", "Sync" };
uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
uinfo->count = 1;
uinfo->value.enumerated.items = 3;
int status = hdsp_read(hdsp, HDSP_statusRegister);
if (status & HDSP_SPDIFErrorFlag)
return 0;
- else {
+ else {
if (status & HDSP_SPDIFSync)
return 2;
else
return 1;
} else
return 0;
-}
+}
static int snd_hdsp_get_adatsync_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
}
static int hdsp_adat_sync_check(struct hdsp *hdsp, int idx)
-{
+{
int status = hdsp_read(hdsp, HDSP_statusRegister);
-
+
if (status & (HDSP_Lock0>>idx)) {
if (status & (HDSP_Sync0>>idx))
return 2;
else
- return 1;
+ return 1;
} else
return 0;
-}
+}
static int snd_hdsp_get_adat_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
break;
case Multiface:
case H9632:
- if (offset >= 1)
+ if (offset >= 1)
return -EINVAL;
break;
default:
static int snd_hdsp_get_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
{
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
-
+
ucontrol->value.enumerated.item[0] = hdsp_dds_offset(hdsp);
return 0;
}
struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
int change;
int val;
-
+
if (!snd_hdsp_use_is_exclusive(hdsp))
return -EBUSY;
val = ucontrol->value.enumerated.item[0];
.get = snd_hdsp_control_spdif_mask_get,
.private_value = IEC958_AES0_NONAUDIO |
IEC958_AES0_PROFESSIONAL |
- IEC958_AES0_CON_EMPHASIS,
+ IEC958_AES0_CON_EMPHASIS,
},
{
.access = SNDRV_CTL_ELEM_ACCESS_READ,
HDSP_SPDIF_PROFESSIONAL("IEC958 Professional Bit", 0),
HDSP_SPDIF_EMPHASIS("IEC958 Emphasis Bit", 0),
HDSP_SPDIF_NON_AUDIO("IEC958 Non-audio Bit", 0),
-/* 'Sample Clock Source' complies with the alsa control naming scheme */
+/* 'Sample Clock Source' complies with the alsa control naming scheme */
HDSP_CLOCK_SOURCE("Sample Clock Source", 0),
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
return err;
}
}
-
+
/* DA, AD and Phone gain and XLR breakout cable controls for H9632 cards */
if (hdsp->io_type == H9632) {
for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_9632_controls); idx++) {
}
/*------------------------------------------------------------
- /proc interface
+ /proc interface
------------------------------------------------------------*/
static void
}
}
}
-
+
status = hdsp_read(hdsp, HDSP_statusRegister);
status2 = hdsp_read(hdsp, HDSP_status2Register);
break;
case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ:
clock_source = "Internal 192 kHz";
- break;
+ break;
default:
- clock_source = "Error";
+ clock_source = "Error";
}
snd_iprintf (buffer, "Sample Clock Source: %s\n", clock_source);
-
+
if (hdsp_system_clock_mode(hdsp))
system_clock_mode = "Slave";
else
system_clock_mode = "Master";
-
+
switch (hdsp_pref_sync_ref (hdsp)) {
case HDSP_SYNC_FROM_WORD:
pref_sync_ref = "Word Clock";
break;
}
snd_iprintf (buffer, "Preferred Sync Reference: %s\n", pref_sync_ref);
-
+
switch (hdsp_autosync_ref (hdsp)) {
case HDSP_AUTOSYNC_FROM_WORD:
autosync_ref = "Word Clock";
break;
case HDSP_AUTOSYNC_FROM_NONE:
autosync_ref = "None";
- break;
+ break;
case HDSP_AUTOSYNC_FROM_ADAT1:
autosync_ref = "ADAT1";
break;
break;
}
snd_iprintf (buffer, "AutoSync Reference: %s\n", autosync_ref);
-
+
snd_iprintf (buffer, "AutoSync Frequency: %d\n", hdsp_external_sample_rate(hdsp));
-
+
snd_iprintf (buffer, "System Clock Mode: %s\n", system_clock_mode);
snd_iprintf (buffer, "System Clock Frequency: %d\n", hdsp->system_sample_rate);
snd_iprintf (buffer, "System Clock Locked: %s\n", hdsp->clock_source_locked ? "Yes" : "No");
-
+
snd_iprintf(buffer, "\n");
switch (hdsp_spdif_in(hdsp)) {
snd_iprintf(buffer, "IEC958 input: ???\n");
break;
}
-
+
if (hdsp->control_register & HDSP_SPDIFOpticalOut)
snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
else
snd_iprintf (buffer, "SPDIF: No Lock\n");
else
snd_iprintf (buffer, "SPDIF: %s\n", x ? "Sync" : "Lock");
-
+
x = status2 & HDSP_wc_sync;
if (status2 & HDSP_wc_lock)
snd_iprintf (buffer, "Word Clock: %s\n", x ? "Sync" : "Lock");
else
snd_iprintf (buffer, "Word Clock: No Lock\n");
-
+
x = status & HDSP_TimecodeSync;
if (status & HDSP_TimecodeLock)
snd_iprintf(buffer, "ADAT Sync: %s\n", x ? "Sync" : "Lock");
snd_iprintf(buffer, "ADAT Sync: No Lock\n");
snd_iprintf(buffer, "\n");
-
+
/* Informations about H9632 specific controls */
if (hdsp->io_type == H9632) {
char *tmp;
-
+
switch (hdsp_ad_gain(hdsp)) {
case 0:
tmp = "-10 dBV";
break;
}
snd_iprintf(buffer, "DA Gain : %s\n", tmp);
-
+
switch (hdsp_phone_gain(hdsp)) {
case 0:
tmp = "0 dB";
}
snd_iprintf(buffer, "Phones Gain : %s\n", tmp);
- snd_iprintf(buffer, "XLR Breakout Cable : %s\n", hdsp_xlr_breakout_cable(hdsp) ? "yes" : "no");
-
+ snd_iprintf(buffer, "XLR Breakout Cable : %s\n", hdsp_xlr_breakout_cable(hdsp) ? "yes" : "no");
+
if (hdsp->control_register & HDSP_AnalogExtensionBoard)
snd_iprintf(buffer, "AEB : on (ADAT1 internal)\n");
else
/* set defaults:
- SPDIF Input via Coax
+ SPDIF Input via Coax
Master clock mode
maximum latency (7 => 2^7 = 8192 samples, 64Kbyte buffer,
which implies 2 4096 sample, 32Kbyte periods).
- Enable line out.
+ Enable line out.
*/
- hdsp->control_register = HDSP_ClockModeMaster |
- HDSP_SPDIFInputCoaxial |
- hdsp_encode_latency(7) |
+ hdsp->control_register = HDSP_ClockModeMaster |
+ HDSP_SPDIFInputCoaxial |
+ hdsp_encode_latency(7) |
HDSP_LineOut;
-
+
hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
hdsp_compute_period_size(hdsp);
/* silence everything */
-
+
for (i = 0; i < HDSP_MATRIX_MIXER_SIZE; ++i)
hdsp->mixer_matrix[i] = MINUS_INFINITY_GAIN;
if (hdsp_write_gain (hdsp, i, MINUS_INFINITY_GAIN))
return -EIO;
}
-
+
/* H9632 specific defaults */
if (hdsp->io_type == H9632) {
hdsp->control_register |= (HDSP_DAGainPlus4dBu | HDSP_ADGainPlus4dBu | HDSP_PhoneGain0dB);
static void hdsp_midi_tasklet(unsigned long arg)
{
struct hdsp *hdsp = (struct hdsp *)arg;
-
+
if (hdsp->midi[0].pending)
snd_hdsp_midi_input_read (&hdsp->midi[0]);
if (hdsp->midi[1].pending)
snd_hdsp_midi_input_read (&hdsp->midi[1]);
-}
+}
static irqreturn_t snd_hdsp_interrupt(int irq, void *dev_id)
{
unsigned int midi0status;
unsigned int midi1status;
int schedule = 0;
-
+
status = hdsp_read(hdsp, HDSP_statusRegister);
audio = status & HDSP_audioIRQPending;
midi0status = hdsp_read (hdsp, HDSP_midiStatusIn0) & 0xff;
midi1status = hdsp_read (hdsp, HDSP_midiStatusIn1) & 0xff;
-
+
+ if (!(hdsp->state & HDSP_InitializationComplete))
+ return IRQ_HANDLED;
+
if (audio) {
if (hdsp->capture_substream)
snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
-
+
if (hdsp->playback_substream)
snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
}
-
+
if (midi0 && midi0status) {
if (hdsp->use_midi_tasklet) {
/* we disable interrupts for this input until processing is done */
if (snd_BUG_ON(channel < 0 || channel >= hdsp->max_channels))
return NULL;
-
+
if ((mapped_channel = hdsp->channel_map[channel]) < 0)
return NULL;
-
+
if (stream == SNDRV_PCM_STREAM_CAPTURE)
return hdsp->capture_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES);
else
struct hdsp *hdsp = snd_pcm_substream_chip(substream);
struct snd_pcm_substream *other;
int running;
-
+
if (hdsp_check_for_iobox (hdsp))
return -EIO;
.formats = SNDRV_PCM_FMTBIT_S32_LE,
#endif
.rates = (SNDRV_PCM_RATE_32000 |
- SNDRV_PCM_RATE_44100 |
- SNDRV_PCM_RATE_48000 |
- SNDRV_PCM_RATE_64000 |
- SNDRV_PCM_RATE_88200 |
+ SNDRV_PCM_RATE_44100 |
+ SNDRV_PCM_RATE_48000 |
+ SNDRV_PCM_RATE_64000 |
+ SNDRV_PCM_RATE_88200 |
SNDRV_PCM_RATE_96000),
.rate_min = 32000,
.rate_max = 96000,
.formats = SNDRV_PCM_FMTBIT_S32_LE,
#endif
.rates = (SNDRV_PCM_RATE_32000 |
- SNDRV_PCM_RATE_44100 |
- SNDRV_PCM_RATE_48000 |
- SNDRV_PCM_RATE_64000 |
- SNDRV_PCM_RATE_88200 |
+ SNDRV_PCM_RATE_44100 |
+ SNDRV_PCM_RATE_48000 |
+ SNDRV_PCM_RATE_64000 |
+ SNDRV_PCM_RATE_88200 |
SNDRV_PCM_RATE_96000),
.rate_min = 32000,
.rate_max = 96000,
.max = hdsp->qs_in_channels,
.integer = 1,
};
- return snd_interval_refine(c, &t);
+ return snd_interval_refine(c, &t);
} else if (r->min > 48000 && r->max <= 96000) {
struct snd_interval t = {
.min = hdsp->ds_in_channels,
.max = hdsp->qs_out_channels,
.integer = 1,
};
- return snd_interval_refine(c, &t);
+ return snd_interval_refine(c, &t);
} else if (r->min > 48000 && r->max <= 96000) {
struct snd_interval t = {
.min = hdsp->ds_out_channels,
if (hdsp->io_type == H9632) {
runtime->hw.channels_min = hdsp->qs_out_channels;
runtime->hw.channels_max = hdsp->ss_out_channels;
- }
-
+ }
+
snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
snd_hdsp_hw_rule_out_channels, hdsp,
SNDRV_PCM_HW_PARAM_CHANNELS, -1);
return 0;
}
-static int snd_hdsp_hwdep_dummy_op(struct snd_hwdep *hw, struct file *file)
-{
- /* we have nothing to initialize but the call is required */
- return 0;
-}
-
-
/* helper functions for copying meter values */
static inline int copy_u32_le(void __user *dest, void __iomem *src)
{
hdsp->iobase + HDSP_playbackRmsLevel + i * 8 + 4,
hdsp->iobase + HDSP_playbackRmsLevel + i * 8))
return -EFAULT;
- if (copy_u64_le(&peak_rms->input_rms[i],
+ if (copy_u64_le(&peak_rms->input_rms[i],
hdsp->iobase + HDSP_inputRmsLevel + i * 8 + 4,
hdsp->iobase + HDSP_inputRmsLevel + i * 8))
return -EFAULT;
static int snd_hdsp_hwdep_ioctl(struct snd_hwdep *hw, struct file *file, unsigned int cmd, unsigned long arg)
{
- struct hdsp *hdsp = (struct hdsp *)hw->private_data;
+ struct hdsp *hdsp = (struct hdsp *)hw->private_data;
void __user *argp = (void __user *)arg;
int err;
struct hdsp_config_info info;
unsigned long flags;
int i;
-
+
err = hdsp_check_for_iobox(hdsp);
if (err < 0)
return err;
info.ad_gain = (unsigned char)hdsp_ad_gain(hdsp);
info.phone_gain = (unsigned char)hdsp_phone_gain(hdsp);
info.xlr_breakout_cable = (unsigned char)hdsp_xlr_breakout_cable(hdsp);
-
+
}
if (hdsp->io_type == H9632 || hdsp->io_type == H9652)
info.analog_extension_board = (unsigned char)hdsp_aeb(hdsp);
}
case SNDRV_HDSP_IOCTL_GET_9632_AEB: {
struct hdsp_9632_aeb h9632_aeb;
-
+
if (hdsp->io_type != H9632) return -EINVAL;
h9632_aeb.aebi = hdsp->ss_in_channels - H9632_SS_CHANNELS;
h9632_aeb.aebo = hdsp->ss_out_channels - H9632_SS_CHANNELS;
case SNDRV_HDSP_IOCTL_GET_VERSION: {
struct hdsp_version hdsp_version;
int err;
-
+
if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL;
if (hdsp->io_type == Undefined) {
if ((err = hdsp_get_iobox_version(hdsp)) < 0)
struct hdsp_firmware __user *firmware;
u32 __user *firmware_data;
int err;
-
+
if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL;
/* SNDRV_HDSP_IOCTL_GET_VERSION must have been called */
if (hdsp->io_type == Undefined) return -EINVAL;
if (get_user(firmware_data, &firmware->firmware_data))
return -EFAULT;
-
+
if (hdsp_check_for_iobox (hdsp))
return -EIO;
if (copy_from_user(hdsp->firmware_cache, firmware_data, sizeof(hdsp->firmware_cache)) != 0)
return -EFAULT;
-
+
hdsp->state |= HDSP_FirmwareCached;
if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0)
return err;
-
+
if (!(hdsp->state & HDSP_InitializationComplete)) {
if ((err = snd_hdsp_enable_io(hdsp)) < 0)
return err;
-
- snd_hdsp_initialize_channels(hdsp);
+
+ snd_hdsp_initialize_channels(hdsp);
snd_hdsp_initialize_midi_flush(hdsp);
-
+
if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) {
snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n");
return err;
{
struct snd_hwdep *hw;
int err;
-
+
if ((err = snd_hwdep_new(card, "HDSP hwdep", 0, &hw)) < 0)
return err;
-
+
hdsp->hwdep = hw;
hw->private_data = hdsp;
strcpy(hw->name, "HDSP hwdep interface");
- hw->ops.open = snd_hdsp_hwdep_dummy_op;
hw->ops.ioctl = snd_hdsp_hwdep_ioctl;
- hw->ops.release = snd_hdsp_hwdep_dummy_op;
-
+
return 0;
}
static int snd_hdsp_enable_io (struct hdsp *hdsp)
{
int i;
-
+
if (hdsp_fifo_wait (hdsp, 0, 100)) {
snd_printk(KERN_ERR "Hammerfall-DSP: enable_io fifo_wait failed\n");
return -EIO;
}
-
+
for (i = 0; i < hdsp->max_channels; ++i) {
hdsp_write (hdsp, HDSP_inputEnable + (4 * i), 1);
hdsp_write (hdsp, HDSP_outputEnable + (4 * i), 1);
}
-
+
return 0;
}
static void snd_hdsp_initialize_channels(struct hdsp *hdsp)
{
int status, aebi_channels, aebo_channels;
-
+
switch (hdsp->io_type) {
case Digiface:
hdsp->card_name = "RME Hammerfall DSP + Digiface";
hdsp->ss_in_channels = hdsp->ss_out_channels = H9652_SS_CHANNELS;
hdsp->ds_in_channels = hdsp->ds_out_channels = H9652_DS_CHANNELS;
break;
-
+
case H9632:
status = hdsp_read(hdsp, HDSP_statusRegister);
/* HDSP_AEBx bits are low when AEB are connected */
hdsp->ss_in_channels = hdsp->ss_out_channels = MULTIFACE_SS_CHANNELS;
hdsp->ds_in_channels = hdsp->ds_out_channels = MULTIFACE_DS_CHANNELS;
break;
-
+
default:
/* should never get here */
break;
static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp)
{
int err;
-
+
if ((err = snd_hdsp_create_pcm(card, hdsp)) < 0) {
snd_printk(KERN_ERR "Hammerfall-DSP: Error creating pcm interface\n");
return err;
}
-
+
if ((err = snd_hdsp_create_midi(card, hdsp, 0)) < 0) {
snd_printk(KERN_ERR "Hammerfall-DSP: Error creating first midi interface\n");
snd_printk(KERN_ERR "Hammerfall-DSP: Error setting default values\n");
return err;
}
-
+
if (!(hdsp->state & HDSP_InitializationComplete)) {
strcpy(card->shortname, "Hammerfall DSP");
- sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
+ sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
hdsp->port, hdsp->irq);
-
+
if ((err = snd_card_register(card)) < 0) {
snd_printk(KERN_ERR "Hammerfall-DSP: error registering card\n");
return err;
}
hdsp->state |= HDSP_InitializationComplete;
}
-
+
return 0;
}
const char *fwfile;
const struct firmware *fw;
int err;
-
+
if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
return 0;
if (hdsp->io_type == Undefined) {
if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
return 0;
}
-
+
/* caution: max length of firmware filename is 30! */
switch (hdsp->io_type) {
case Multiface:
memcpy(hdsp->firmware_cache, fw->data, sizeof(hdsp->firmware_cache));
release_firmware(fw);
-
+
hdsp->state |= HDSP_FirmwareCached;
if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0)
return err;
-
+
if (!(hdsp->state & HDSP_InitializationComplete)) {
if ((err = snd_hdsp_enable_io(hdsp)) < 0)
return err;
hdsp->max_channels = 26;
hdsp->card = card;
-
+
spin_lock_init(&hdsp->lock);
tasklet_init(&hdsp->midi_tasklet, hdsp_midi_tasklet, (unsigned long)hdsp);
-
+
pci_read_config_word(hdsp->pci, PCI_CLASS_REVISION, &hdsp->firmware_rev);
hdsp->firmware_rev &= 0xff;
-
+
/* From Martin Bjoernsen :
"It is important that the card's latency timer register in
the PCI configuration space is set to a value much larger
to its maximum 255 to avoid problems with some computers."
*/
pci_write_config_byte(hdsp->pci, PCI_LATENCY_TIMER, 0xFF);
-
+
strcpy(card->driver, "H-DSP");
strcpy(card->mixername, "Xilinx FPGA");
} else {
hdsp->card_name = "RME HDSP 9632";
hdsp->max_channels = 16;
- is_9632 = 1;
+ is_9632 = 1;
}
if ((err = pci_enable_device(pci)) < 0)
if ((err = snd_hdsp_initialize_memory(hdsp)) < 0)
return err;
-
+
if (!is_9652 && !is_9632) {
- /* we wait 2 seconds to let freshly inserted cardbus cards do their hardware init */
- ssleep(2);
+ /* we wait a maximum of 10 seconds to let freshly
+ * inserted cardbus cards do their hardware init */
+ err = hdsp_wait_for_iobox(hdsp, 1000, 10);
- err = hdsp_check_for_iobox(hdsp);
if (err < 0)
return err;
return err;
return 0;
} else {
- snd_printk(KERN_INFO "Hammerfall-DSP: Firmware already present, initializing card.\n");
+ snd_printk(KERN_INFO "Hammerfall-DSP: Firmware already present, initializing card.\n");
if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1)
hdsp->io_type = Multiface;
- else
+ else
hdsp->io_type = Digiface;
}
}
-
+
if ((err = snd_hdsp_enable_io(hdsp)) != 0)
return err;
-
+
if (is_9652)
hdsp->io_type = H9652;
-
+
if (is_9632)
hdsp->io_type = H9632;
if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0)
return err;
-
+
snd_hdsp_initialize_channels(hdsp);
snd_hdsp_initialize_midi_flush(hdsp);
- hdsp->state |= HDSP_FirmwareLoaded;
+ hdsp->state |= HDSP_FirmwareLoaded;
if ((err = snd_hdsp_create_alsa_devices(card, hdsp)) < 0)
return err;
- return 0;
+ return 0;
}
static int snd_hdsp_free(struct hdsp *hdsp)
free_irq(hdsp->irq, (void *)hdsp);
snd_hdsp_free_buffers(hdsp);
-
+
if (hdsp->iobase)
iounmap(hdsp->iobase);
if (hdsp->port)
pci_release_regions(hdsp->pci);
-
+
pci_disable_device(hdsp->pci);
return 0;
}
return -ENOENT;
}
- if (!(card = snd_card_new(index[dev], id[dev], THIS_MODULE, sizeof(struct hdsp))))
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct hdsp), &card);
+ if (err < 0)
+ return err;
hdsp = (struct hdsp *) card->private_data;
card->private_free = snd_hdsp_card_free;
}
strcpy(card->shortname, "Hammerfall DSP");
- sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
+ sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
hdsp->port, hdsp->irq);
if ((err = snd_card_register(card)) < 0) {
return 0;
}
-static int snd_hdspm_hwdep_dummy_op(struct snd_hwdep * hw, struct file *file)
-{
- /* we have nothing to initialize but the call is required */
- return 0;
-}
-
-
static int snd_hdspm_hwdep_ioctl(struct snd_hwdep * hw, struct file *file,
unsigned int cmd, unsigned long arg)
{
hw->private_data = hdspm;
strcpy(hw->name, "HDSPM hwdep interface");
- hw->ops.open = snd_hdspm_hwdep_dummy_op;
hw->ops.ioctl = snd_hdspm_hwdep_ioctl;
- hw->ops.release = snd_hdspm_hwdep_dummy_op;
return 0;
}
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev],
- THIS_MODULE, sizeof(struct hdspm));
- if (!card)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev],
+ THIS_MODULE, sizeof(struct hdspm), &card);
+ if (err < 0)
+ return err;
hdspm = card->private_data;
card->private_free = snd_hdspm_card_free;
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(struct snd_rme9652));
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct snd_rme9652), &card);
- if (!card)
- return -ENOMEM;
+ if (err < 0)
+ return err;
rme9652 = (struct snd_rme9652 *) card->private_data;
card->private_free = snd_rme9652_card_free;
if (!enable)
goto error_out;
- rc = -ENOMEM;
- card = snd_card_new(index, id, THIS_MODULE, sizeof(*sis));
- if (!card)
+ rc = snd_card_create(index, id, THIS_MODULE, sizeof(*sis), &card);
+ if (rc < 0)
goto error_out;
strcpy(card->driver, "SiS7019");
outl(count, sonic->dmaa_port + SV_DMA_COUNT0);
outb(0x18, sonic->dmaa_port + SV_DMA_MODE);
#if 0
- printk("program dmaa: addr = 0x%x, paddr = 0x%x\n", addr, inl(sonic->dmaa_port + SV_DMA_ADDR0));
+ printk(KERN_DEBUG "program dmaa: addr = 0x%x, paddr = 0x%x\n",
+ addr, inl(sonic->dmaa_port + SV_DMA_ADDR0));
#endif
}
outl(count, sonic->dmac_port + SV_DMA_COUNT0);
outb(0x14, sonic->dmac_port + SV_DMA_MODE);
#if 0
- printk("program dmac: addr = 0x%x, paddr = 0x%x\n", addr, inl(sonic->dmac_port + SV_DMA_ADDR0));
+ printk(KERN_DEBUG "program dmac: addr = 0x%x, paddr = 0x%x\n",
+ addr, inl(sonic->dmac_port + SV_DMA_ADDR0));
#endif
}
#if 0
static void snd_sonicvibes_debug(struct sonicvibes * sonic)
{
- printk("SV REGS: INDEX = 0x%02x ", inb(SV_REG(sonic, INDEX)));
+ printk(KERN_DEBUG
+ "SV REGS: INDEX = 0x%02x ", inb(SV_REG(sonic, INDEX)));
printk(" STATUS = 0x%02x\n", inb(SV_REG(sonic, STATUS)));
- printk(" 0x00: left input = 0x%02x ", snd_sonicvibes_in(sonic, 0x00));
+ printk(KERN_DEBUG
+ " 0x00: left input = 0x%02x ", snd_sonicvibes_in(sonic, 0x00));
printk(" 0x20: synth rate low = 0x%02x\n", snd_sonicvibes_in(sonic, 0x20));
- printk(" 0x01: right input = 0x%02x ", snd_sonicvibes_in(sonic, 0x01));
+ printk(KERN_DEBUG
+ " 0x01: right input = 0x%02x ", snd_sonicvibes_in(sonic, 0x01));
printk(" 0x21: synth rate high = 0x%02x\n", snd_sonicvibes_in(sonic, 0x21));
- printk(" 0x02: left AUX1 = 0x%02x ", snd_sonicvibes_in(sonic, 0x02));
+ printk(KERN_DEBUG
+ " 0x02: left AUX1 = 0x%02x ", snd_sonicvibes_in(sonic, 0x02));
printk(" 0x22: ADC clock = 0x%02x\n", snd_sonicvibes_in(sonic, 0x22));
- printk(" 0x03: right AUX1 = 0x%02x ", snd_sonicvibes_in(sonic, 0x03));
+ printk(KERN_DEBUG
+ " 0x03: right AUX1 = 0x%02x ", snd_sonicvibes_in(sonic, 0x03));
printk(" 0x23: ADC alt rate = 0x%02x\n", snd_sonicvibes_in(sonic, 0x23));
- printk(" 0x04: left CD = 0x%02x ", snd_sonicvibes_in(sonic, 0x04));
+ printk(KERN_DEBUG
+ " 0x04: left CD = 0x%02x ", snd_sonicvibes_in(sonic, 0x04));
printk(" 0x24: ADC pll M = 0x%02x\n", snd_sonicvibes_in(sonic, 0x24));
- printk(" 0x05: right CD = 0x%02x ", snd_sonicvibes_in(sonic, 0x05));
+ printk(KERN_DEBUG
+ " 0x05: right CD = 0x%02x ", snd_sonicvibes_in(sonic, 0x05));
printk(" 0x25: ADC pll N = 0x%02x\n", snd_sonicvibes_in(sonic, 0x25));
- printk(" 0x06: left line = 0x%02x ", snd_sonicvibes_in(sonic, 0x06));
+ printk(KERN_DEBUG
+ " 0x06: left line = 0x%02x ", snd_sonicvibes_in(sonic, 0x06));
printk(" 0x26: Synth pll M = 0x%02x\n", snd_sonicvibes_in(sonic, 0x26));
- printk(" 0x07: right line = 0x%02x ", snd_sonicvibes_in(sonic, 0x07));
+ printk(KERN_DEBUG
+ " 0x07: right line = 0x%02x ", snd_sonicvibes_in(sonic, 0x07));
printk(" 0x27: Synth pll N = 0x%02x\n", snd_sonicvibes_in(sonic, 0x27));
- printk(" 0x08: MIC = 0x%02x ", snd_sonicvibes_in(sonic, 0x08));
+ printk(KERN_DEBUG
+ " 0x08: MIC = 0x%02x ", snd_sonicvibes_in(sonic, 0x08));
printk(" 0x28: --- = 0x%02x\n", snd_sonicvibes_in(sonic, 0x28));
- printk(" 0x09: Game port = 0x%02x ", snd_sonicvibes_in(sonic, 0x09));
+ printk(KERN_DEBUG
+ " 0x09: Game port = 0x%02x ", snd_sonicvibes_in(sonic, 0x09));
printk(" 0x29: --- = 0x%02x\n", snd_sonicvibes_in(sonic, 0x29));
- printk(" 0x0a: left synth = 0x%02x ", snd_sonicvibes_in(sonic, 0x0a));
+ printk(KERN_DEBUG
+ " 0x0a: left synth = 0x%02x ", snd_sonicvibes_in(sonic, 0x0a));
printk(" 0x2a: MPU401 = 0x%02x\n", snd_sonicvibes_in(sonic, 0x2a));
- printk(" 0x0b: right synth = 0x%02x ", snd_sonicvibes_in(sonic, 0x0b));
+ printk(KERN_DEBUG
+ " 0x0b: right synth = 0x%02x ", snd_sonicvibes_in(sonic, 0x0b));
printk(" 0x2b: drive ctrl = 0x%02x\n", snd_sonicvibes_in(sonic, 0x2b));
- printk(" 0x0c: left AUX2 = 0x%02x ", snd_sonicvibes_in(sonic, 0x0c));
+ printk(KERN_DEBUG
+ " 0x0c: left AUX2 = 0x%02x ", snd_sonicvibes_in(sonic, 0x0c));
printk(" 0x2c: SRS space = 0x%02x\n", snd_sonicvibes_in(sonic, 0x2c));
- printk(" 0x0d: right AUX2 = 0x%02x ", snd_sonicvibes_in(sonic, 0x0d));
+ printk(KERN_DEBUG
+ " 0x0d: right AUX2 = 0x%02x ", snd_sonicvibes_in(sonic, 0x0d));
printk(" 0x2d: SRS center = 0x%02x\n", snd_sonicvibes_in(sonic, 0x2d));
- printk(" 0x0e: left analog = 0x%02x ", snd_sonicvibes_in(sonic, 0x0e));
+ printk(KERN_DEBUG
+ " 0x0e: left analog = 0x%02x ", snd_sonicvibes_in(sonic, 0x0e));
printk(" 0x2e: wave source = 0x%02x\n", snd_sonicvibes_in(sonic, 0x2e));
- printk(" 0x0f: right analog = 0x%02x ", snd_sonicvibes_in(sonic, 0x0f));
+ printk(KERN_DEBUG
+ " 0x0f: right analog = 0x%02x ", snd_sonicvibes_in(sonic, 0x0f));
printk(" 0x2f: --- = 0x%02x\n", snd_sonicvibes_in(sonic, 0x2f));
- printk(" 0x10: left PCM = 0x%02x ", snd_sonicvibes_in(sonic, 0x10));
+ printk(KERN_DEBUG
+ " 0x10: left PCM = 0x%02x ", snd_sonicvibes_in(sonic, 0x10));
printk(" 0x30: analog power = 0x%02x\n", snd_sonicvibes_in(sonic, 0x30));
- printk(" 0x11: right PCM = 0x%02x ", snd_sonicvibes_in(sonic, 0x11));
+ printk(KERN_DEBUG
+ " 0x11: right PCM = 0x%02x ", snd_sonicvibes_in(sonic, 0x11));
printk(" 0x31: analog power = 0x%02x\n", snd_sonicvibes_in(sonic, 0x31));
- printk(" 0x12: DMA data format = 0x%02x ", snd_sonicvibes_in(sonic, 0x12));
+ printk(KERN_DEBUG
+ " 0x12: DMA data format = 0x%02x ", snd_sonicvibes_in(sonic, 0x12));
printk(" 0x32: --- = 0x%02x\n", snd_sonicvibes_in(sonic, 0x32));
- printk(" 0x13: P/C enable = 0x%02x ", snd_sonicvibes_in(sonic, 0x13));
+ printk(KERN_DEBUG
+ " 0x13: P/C enable = 0x%02x ", snd_sonicvibes_in(sonic, 0x13));
printk(" 0x33: --- = 0x%02x\n", snd_sonicvibes_in(sonic, 0x33));
- printk(" 0x14: U/D button = 0x%02x ", snd_sonicvibes_in(sonic, 0x14));
+ printk(KERN_DEBUG
+ " 0x14: U/D button = 0x%02x ", snd_sonicvibes_in(sonic, 0x14));
printk(" 0x34: --- = 0x%02x\n", snd_sonicvibes_in(sonic, 0x34));
- printk(" 0x15: revision = 0x%02x ", snd_sonicvibes_in(sonic, 0x15));
+ printk(KERN_DEBUG
+ " 0x15: revision = 0x%02x ", snd_sonicvibes_in(sonic, 0x15));
printk(" 0x35: --- = 0x%02x\n", snd_sonicvibes_in(sonic, 0x35));
- printk(" 0x16: ADC output ctrl = 0x%02x ", snd_sonicvibes_in(sonic, 0x16));
+ printk(KERN_DEBUG
+ " 0x16: ADC output ctrl = 0x%02x ", snd_sonicvibes_in(sonic, 0x16));
printk(" 0x36: --- = 0x%02x\n", snd_sonicvibes_in(sonic, 0x36));
- printk(" 0x17: --- = 0x%02x ", snd_sonicvibes_in(sonic, 0x17));
+ printk(KERN_DEBUG
+ " 0x17: --- = 0x%02x ", snd_sonicvibes_in(sonic, 0x17));
printk(" 0x37: --- = 0x%02x\n", snd_sonicvibes_in(sonic, 0x37));
- printk(" 0x18: DMA A upper cnt = 0x%02x ", snd_sonicvibes_in(sonic, 0x18));
+ printk(KERN_DEBUG
+ " 0x18: DMA A upper cnt = 0x%02x ", snd_sonicvibes_in(sonic, 0x18));
printk(" 0x38: --- = 0x%02x\n", snd_sonicvibes_in(sonic, 0x38));
- printk(" 0x19: DMA A lower cnt = 0x%02x ", snd_sonicvibes_in(sonic, 0x19));
+ printk(KERN_DEBUG
+ " 0x19: DMA A lower cnt = 0x%02x ", snd_sonicvibes_in(sonic, 0x19));
printk(" 0x39: --- = 0x%02x\n", snd_sonicvibes_in(sonic, 0x39));
- printk(" 0x1a: --- = 0x%02x ", snd_sonicvibes_in(sonic, 0x1a));
+ printk(KERN_DEBUG
+ " 0x1a: --- = 0x%02x ", snd_sonicvibes_in(sonic, 0x1a));
printk(" 0x3a: --- = 0x%02x\n", snd_sonicvibes_in(sonic, 0x3a));
- printk(" 0x1b: --- = 0x%02x ", snd_sonicvibes_in(sonic, 0x1b));
+ printk(KERN_DEBUG
+ " 0x1b: --- = 0x%02x ", snd_sonicvibes_in(sonic, 0x1b));
printk(" 0x3b: --- = 0x%02x\n", snd_sonicvibes_in(sonic, 0x3b));
- printk(" 0x1c: DMA C upper cnt = 0x%02x ", snd_sonicvibes_in(sonic, 0x1c));
+ printk(KERN_DEBUG
+ " 0x1c: DMA C upper cnt = 0x%02x ", snd_sonicvibes_in(sonic, 0x1c));
printk(" 0x3c: --- = 0x%02x\n", snd_sonicvibes_in(sonic, 0x3c));
- printk(" 0x1d: DMA C upper cnt = 0x%02x ", snd_sonicvibes_in(sonic, 0x1d));
+ printk(KERN_DEBUG
+ " 0x1d: DMA C upper cnt = 0x%02x ", snd_sonicvibes_in(sonic, 0x1d));
printk(" 0x3d: --- = 0x%02x\n", snd_sonicvibes_in(sonic, 0x3d));
- printk(" 0x1e: PCM rate low = 0x%02x ", snd_sonicvibes_in(sonic, 0x1e));
+ printk(KERN_DEBUG
+ " 0x1e: PCM rate low = 0x%02x ", snd_sonicvibes_in(sonic, 0x1e));
printk(" 0x3e: --- = 0x%02x\n", snd_sonicvibes_in(sonic, 0x3e));
- printk(" 0x1f: PCM rate high = 0x%02x ", snd_sonicvibes_in(sonic, 0x1f));
+ printk(KERN_DEBUG
+ " 0x1f: PCM rate high = 0x%02x ", snd_sonicvibes_in(sonic, 0x1f));
printk(" 0x3f: --- = 0x%02x\n", snd_sonicvibes_in(sonic, 0x3f));
}
*res_m = m;
*res_n = n;
#if 0
- printk("metric = %i, xm = %i, xn = %i\n", metric, xm, xn);
- printk("pll: m = 0x%x, r = 0x%x, n = 0x%x\n", reg, m, r, n);
+ printk(KERN_DEBUG "metric = %i, xm = %i, xn = %i\n", metric, xm, xn);
+ printk(KERN_DEBUG "pll: m = 0x%x, r = 0x%x, n = 0x%x\n", reg, m, r, n);
#endif
}
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
for (idx = 0; idx < 5; idx++) {
if (pci_resource_start(pci, idx) == 0 ||
!(pci_resource_flags(pci, idx) & IORESOURCE_IO)) {
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
if ((err = snd_trident_create(card, pci,
pcm_channels[dev],
{
unsigned int val, tmp;
- printk("Trident voice %i:\n", voice);
+ printk(KERN_DEBUG "Trident voice %i:\n", voice);
outb(voice, TRID_REG(trident, T4D_LFO_GC_CIR));
val = inl(TRID_REG(trident, CH_LBA));
- printk("LBA: 0x%x\n", val);
+ printk(KERN_DEBUG "LBA: 0x%x\n", val);
val = inl(TRID_REG(trident, CH_GVSEL_PAN_VOL_CTRL_EC));
- printk("GVSel: %i\n", val >> 31);
- printk("Pan: 0x%x\n", (val >> 24) & 0x7f);
- printk("Vol: 0x%x\n", (val >> 16) & 0xff);
- printk("CTRL: 0x%x\n", (val >> 12) & 0x0f);
- printk("EC: 0x%x\n", val & 0x0fff);
+ printk(KERN_DEBUG "GVSel: %i\n", val >> 31);
+ printk(KERN_DEBUG "Pan: 0x%x\n", (val >> 24) & 0x7f);
+ printk(KERN_DEBUG "Vol: 0x%x\n", (val >> 16) & 0xff);
+ printk(KERN_DEBUG "CTRL: 0x%x\n", (val >> 12) & 0x0f);
+ printk(KERN_DEBUG "EC: 0x%x\n", val & 0x0fff);
if (trident->device != TRIDENT_DEVICE_ID_NX) {
val = inl(TRID_REG(trident, CH_DX_CSO_ALPHA_FMS));
- printk("CSO: 0x%x\n", val >> 16);
+ printk(KERN_DEBUG "CSO: 0x%x\n", val >> 16);
printk("Alpha: 0x%x\n", (val >> 4) & 0x0fff);
- printk("FMS: 0x%x\n", val & 0x0f);
+ printk(KERN_DEBUG "FMS: 0x%x\n", val & 0x0f);
val = inl(TRID_REG(trident, CH_DX_ESO_DELTA));
- printk("ESO: 0x%x\n", val >> 16);
- printk("Delta: 0x%x\n", val & 0xffff);
+ printk(KERN_DEBUG "ESO: 0x%x\n", val >> 16);
+ printk(KERN_DEBUG "Delta: 0x%x\n", val & 0xffff);
val = inl(TRID_REG(trident, CH_DX_FMC_RVOL_CVOL));
} else { // TRIDENT_DEVICE_ID_NX
val = inl(TRID_REG(trident, CH_NX_DELTA_CSO));
tmp = (val >> 24) & 0xff;
- printk("CSO: 0x%x\n", val & 0x00ffffff);
+ printk(KERN_DEBUG "CSO: 0x%x\n", val & 0x00ffffff);
val = inl(TRID_REG(trident, CH_NX_DELTA_ESO));
tmp |= (val >> 16) & 0xff00;
- printk("Delta: 0x%x\n", tmp);
- printk("ESO: 0x%x\n", val & 0x00ffffff);
+ printk(KERN_DEBUG "Delta: 0x%x\n", tmp);
+ printk(KERN_DEBUG "ESO: 0x%x\n", val & 0x00ffffff);
val = inl(TRID_REG(trident, CH_NX_ALPHA_FMS_FMC_RVOL_CVOL));
- printk("Alpha: 0x%x\n", val >> 20);
- printk("FMS: 0x%x\n", (val >> 16) & 0x0f);
+ printk(KERN_DEBUG "Alpha: 0x%x\n", val >> 20);
+ printk(KERN_DEBUG "FMS: 0x%x\n", (val >> 16) & 0x0f);
}
- printk("FMC: 0x%x\n", (val >> 14) & 3);
- printk("RVol: 0x%x\n", (val >> 7) & 0x7f);
- printk("CVol: 0x%x\n", val & 0x7f);
+ printk(KERN_DEBUG "FMC: 0x%x\n", (val >> 14) & 3);
+ printk(KERN_DEBUG "RVol: 0x%x\n", (val >> 7) & 0x7f);
+ printk(KERN_DEBUG "CVol: 0x%x\n", val & 0x7f);
}
#endif
outl(regs[4], TRID_REG(trident, CH_START + 16));
#if 0
- printk("written %i channel:\n", voice->number);
- printk(" regs[0] = 0x%x/0x%x\n", regs[0], inl(TRID_REG(trident, CH_START + 0)));
- printk(" regs[1] = 0x%x/0x%x\n", regs[1], inl(TRID_REG(trident, CH_START + 4)));
- printk(" regs[2] = 0x%x/0x%x\n", regs[2], inl(TRID_REG(trident, CH_START + 8)));
- printk(" regs[3] = 0x%x/0x%x\n", regs[3], inl(TRID_REG(trident, CH_START + 12)));
- printk(" regs[4] = 0x%x/0x%x\n", regs[4], inl(TRID_REG(trident, CH_START + 16)));
+ printk(KERN_DEBUG "written %i channel:\n", voice->number);
+ printk(KERN_DEBUG " regs[0] = 0x%x/0x%x\n",
+ regs[0], inl(TRID_REG(trident, CH_START + 0)));
+ printk(KERN_DEBUG " regs[1] = 0x%x/0x%x\n",
+ regs[1], inl(TRID_REG(trident, CH_START + 4)));
+ printk(KERN_DEBUG " regs[2] = 0x%x/0x%x\n",
+ regs[2], inl(TRID_REG(trident, CH_START + 8)));
+ printk(KERN_DEBUG " regs[3] = 0x%x/0x%x\n",
+ regs[3], inl(TRID_REG(trident, CH_START + 12)));
+ printk(KERN_DEBUG " regs[4] = 0x%x/0x%x\n",
+ regs[4], inl(TRID_REG(trident, CH_START + 16)));
#endif
}
outb(voice->Vol >> 2, TRID_REG(trident, CH_GVSEL_PAN_VOL_CTRL_EC + 2));
break;
case TRIDENT_DEVICE_ID_SI7018:
- // printk("voice->Vol = 0x%x\n", voice->Vol);
+ /* printk(KERN_DEBUG "voice->Vol = 0x%x\n", voice->Vol); */
outw((voice->CTRL << 12) | voice->Vol,
TRID_REG(trident, CH_GVSEL_PAN_VOL_CTRL_EC));
break;
flag = VIA_TBL_BIT_FLAG; /* period boundary */
} else
flag = 0; /* period continues to the next */
- // printk("via: tbl %d: at %d size %d (rest %d)\n", idx, ofs, r, rest);
+ /*
+ printk(KERN_DEBUG "via: tbl %d: at %d size %d "
+ "(rest %d)\n", idx, ofs, r, rest);
+ */
((u32 *)dev->table.area)[(idx<<1) + 1] = cpu_to_le32(r | flag);
dev->idx_table[idx].offset = ofs;
dev->idx_table[idx].size = r;
SND_PCI_QUIRK(0x1019, 0x0996, "ESC Mobo", VIA_DXS_48K),
SND_PCI_QUIRK(0x1019, 0x0a81, "ECS K7VTA3 v8.0", VIA_DXS_NO_VRA),
SND_PCI_QUIRK(0x1019, 0x0a85, "ECS L7VMM2", VIA_DXS_NO_VRA),
- SND_PCI_QUIRK(0x1019, 0, "ESC K8", VIA_DXS_SRC),
+ SND_PCI_QUIRK_VENDOR(0x1019, "ESC K8", VIA_DXS_SRC),
SND_PCI_QUIRK(0x1019, 0xaa01, "ESC K8T890-A", VIA_DXS_SRC),
SND_PCI_QUIRK(0x1025, 0x0033, "Acer Inspire 1353LM", VIA_DXS_NO_VRA),
SND_PCI_QUIRK(0x1025, 0x0046, "Acer Aspire 1524 WLMi", VIA_DXS_SRC),
- SND_PCI_QUIRK(0x1043, 0, "ASUS A7/A8", VIA_DXS_NO_VRA),
- SND_PCI_QUIRK(0x1071, 0, "Diverse Notebook", VIA_DXS_NO_VRA),
+ SND_PCI_QUIRK_VENDOR(0x1043, "ASUS A7/A8", VIA_DXS_NO_VRA),
+ SND_PCI_QUIRK_VENDOR(0x1071, "Diverse Notebook", VIA_DXS_NO_VRA),
SND_PCI_QUIRK(0x10cf, 0x118e, "FSC Laptop", VIA_DXS_ENABLE),
- SND_PCI_QUIRK(0x1106, 0, "ASRock", VIA_DXS_SRC),
+ SND_PCI_QUIRK_VENDOR(0x1106, "ASRock", VIA_DXS_SRC),
SND_PCI_QUIRK(0x1297, 0xa231, "Shuttle AK31v2", VIA_DXS_SRC),
SND_PCI_QUIRK(0x1297, 0xa232, "Shuttle", VIA_DXS_SRC),
SND_PCI_QUIRK(0x1297, 0xc160, "Shuttle Sk41G", VIA_DXS_SRC),
SND_PCI_QUIRK(0x1462, 0x3800, "MSI KT266", VIA_DXS_ENABLE),
SND_PCI_QUIRK(0x1462, 0x7120, "MSI KT4V", VIA_DXS_ENABLE),
SND_PCI_QUIRK(0x1462, 0x7142, "MSI K8MM-V", VIA_DXS_ENABLE),
- SND_PCI_QUIRK(0x1462, 0, "MSI Mobo", VIA_DXS_SRC),
+ SND_PCI_QUIRK_VENDOR(0x1462, "MSI Mobo", VIA_DXS_SRC),
SND_PCI_QUIRK(0x147b, 0x1401, "ABIT KD7(-RAID)", VIA_DXS_ENABLE),
SND_PCI_QUIRK(0x147b, 0x1411, "ABIT VA-20", VIA_DXS_ENABLE),
SND_PCI_QUIRK(0x147b, 0x1413, "ABIT KV8 Pro", VIA_DXS_ENABLE),
SND_PCI_QUIRK(0x161f, 0x2032, "m680x machines", VIA_DXS_48K),
SND_PCI_QUIRK(0x1631, 0xe004, "PB EasyNote 3174", VIA_DXS_ENABLE),
SND_PCI_QUIRK(0x1695, 0x3005, "EPoX EP-8K9A", VIA_DXS_ENABLE),
- SND_PCI_QUIRK(0x1695, 0, "EPoX mobo", VIA_DXS_SRC),
- SND_PCI_QUIRK(0x16f3, 0, "Jetway K8", VIA_DXS_SRC),
- SND_PCI_QUIRK(0x1734, 0, "FSC Laptop", VIA_DXS_SRC),
+ SND_PCI_QUIRK_VENDOR(0x1695, "EPoX mobo", VIA_DXS_SRC),
+ SND_PCI_QUIRK_VENDOR(0x16f3, "Jetway K8", VIA_DXS_SRC),
+ SND_PCI_QUIRK_VENDOR(0x1734, "FSC Laptop", VIA_DXS_SRC),
SND_PCI_QUIRK(0x1849, 0x3059, "ASRock K7VM2", VIA_DXS_NO_VRA),
- SND_PCI_QUIRK(0x1849, 0, "ASRock mobo", VIA_DXS_SRC),
+ SND_PCI_QUIRK_VENDOR(0x1849, "ASRock mobo", VIA_DXS_SRC),
SND_PCI_QUIRK(0x1919, 0x200a, "Soltek SL-K8", VIA_DXS_NO_VRA),
SND_PCI_QUIRK(0x4005, 0x4710, "MSI K7T266", VIA_DXS_SRC),
{ } /* terminator */
unsigned int i;
int err;
- card = snd_card_new(index, id, THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index, id, THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
card_type = pci_id->driver_data;
switch (card_type) {
flag = VIA_TBL_BIT_FLAG; /* period boundary */
} else
flag = 0; /* period continues to the next */
- // printk("via: tbl %d: at %d size %d (rest %d)\n", idx, ofs, r, rest);
+ /*
+ printk(KERN_DEBUG "via: tbl %d: at %d size %d "
+ "(rest %d)\n", idx, ofs, r, rest);
+ */
((u32 *)dev->table.area)[(idx<<1) + 1] = cpu_to_le32(r | flag);
dev->idx_table[idx].offset = ofs;
dev->idx_table[idx].size = r;
unsigned int i;
int err;
- card = snd_card_new(index, id, THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index, id, THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
card_type = pci_id->driver_data;
switch (card_type) {
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
switch ((int)pci_id->driver_data) {
case VX_PCI_VX222_OLD:
static void vx2_outb(struct vx_core *chip, int offset, unsigned char val)
{
outb(val, vx2_reg_addr(chip, offset));
- //printk("outb: %x -> %x\n", val, vx2_reg_addr(chip, offset));
+ /*
+ printk(KERN_DEBUG "outb: %x -> %x\n", val, vx2_reg_addr(chip, offset));
+ */
}
/**
*/
static void vx2_outl(struct vx_core *chip, int offset, unsigned int val)
{
- // printk("outl: %x -> %x\n", val, vx2_reg_addr(chip, offset));
+ /*
+ printk(KERN_DEBUG "outl: %x -> %x\n", val, vx2_reg_addr(chip, offset));
+ */
outl(val, vx2_reg_addr(chip, offset));
}
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
switch (pci_id->device) {
case 0x0004: str = "YMF724"; model = "DS-1"; break;
ypcm->period_pos += delta;
ypcm->last_pos = pos;
if (ypcm->period_pos >= ypcm->period_size) {
- // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
+ /*
+ printk(KERN_DEBUG
+ "done - active_bank = 0x%x, start = 0x%x\n",
+ chip->active_bank,
+ voice->bank[chip->active_bank].start);
+ */
ypcm->period_pos %= ypcm->period_size;
spin_unlock(&chip->reg_lock);
snd_pcm_period_elapsed(ypcm->substream);
ypcm->last_pos = pos;
if (ypcm->period_pos >= ypcm->period_size) {
ypcm->period_pos %= ypcm->period_size;
- // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
+ /*
+ printk(KERN_DEBUG
+ "done - active_bank = 0x%x, start = 0x%x\n",
+ chip->active_bank,
+ voice->bank[chip->active_bank].start);
+ */
spin_unlock(&chip->reg_lock);
snd_pcm_period_elapsed(substream);
spin_lock(&chip->reg_lock);
*/
static int snd_pdacf_probe(struct pcmcia_device *link)
{
- int i;
+ int i, err;
struct snd_pdacf *pdacf;
struct snd_card *card;
static struct snd_device_ops ops = {
return -ENODEV; /* disabled explicitly */
/* ok, create a card instance */
- card = snd_card_new(index[i], id[i], THIS_MODULE, 0);
- if (card == NULL) {
+ err = snd_card_create(index[i], id[i], THIS_MODULE, 0, &card);
+ if (err < 0) {
snd_printk(KERN_ERR "pdacf: cannot create a card instance\n");
- return -ENOMEM;
+ return err;
}
pdacf = snd_pdacf_create(card);
- if (! pdacf)
- return -EIO;
+ if (!pdacf) {
+ snd_card_free(card);
+ return -ENOMEM;
+ }
- if (snd_device_new(card, SNDRV_DEV_LOWLEVEL, pdacf, &ops) < 0) {
+ err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, pdacf, &ops);
+ if (err < 0) {
kfree(pdacf);
snd_card_free(card);
- return -ENODEV;
+ return err;
}
snd_card_set_dev(card, &handle_to_dev(link));
#if 0
void pdacf_dump(struct snd_pdacf *chip)
{
- printk("PDAUDIOCF DUMP (0x%lx):\n", chip->port);
- printk("WPD : 0x%x\n", inw(chip->port + PDAUDIOCF_REG_WDP));
- printk("RDP : 0x%x\n", inw(chip->port + PDAUDIOCF_REG_RDP));
- printk("TCR : 0x%x\n", inw(chip->port + PDAUDIOCF_REG_TCR));
- printk("SCR : 0x%x\n", inw(chip->port + PDAUDIOCF_REG_SCR));
- printk("ISR : 0x%x\n", inw(chip->port + PDAUDIOCF_REG_ISR));
- printk("IER : 0x%x\n", inw(chip->port + PDAUDIOCF_REG_IER));
- printk("AK_IFR : 0x%x\n", inw(chip->port + PDAUDIOCF_REG_AK_IFR));
+ printk(KERN_DEBUG "PDAUDIOCF DUMP (0x%lx):\n", chip->port);
+ printk(KERN_DEBUG "WPD : 0x%x\n",
+ inw(chip->port + PDAUDIOCF_REG_WDP));
+ printk(KERN_DEBUG "RDP : 0x%x\n",
+ inw(chip->port + PDAUDIOCF_REG_RDP));
+ printk(KERN_DEBUG "TCR : 0x%x\n",
+ inw(chip->port + PDAUDIOCF_REG_TCR));
+ printk(KERN_DEBUG "SCR : 0x%x\n",
+ inw(chip->port + PDAUDIOCF_REG_SCR));
+ printk(KERN_DEBUG "ISR : 0x%x\n",
+ inw(chip->port + PDAUDIOCF_REG_ISR));
+ printk(KERN_DEBUG "IER : 0x%x\n",
+ inw(chip->port + PDAUDIOCF_REG_IER));
+ printk(KERN_DEBUG "AK_IFR : 0x%x\n",
+ inw(chip->port + PDAUDIOCF_REG_AK_IFR));
}
#endif
rdp = inw(chip->port + PDAUDIOCF_REG_RDP);
wdp = inw(chip->port + PDAUDIOCF_REG_WDP);
- // printk("TASKLET: rdp = %x, wdp = %x\n", rdp, wdp);
+ /* printk(KERN_DEBUG "TASKLET: rdp = %x, wdp = %x\n", rdp, wdp); */
size = wdp - rdp;
if (size < 0)
size += 0x10000;
spin_lock(&chip->reg_lock);
}
spin_unlock(&chip->reg_lock);
- // printk("TASKLET: end\n");
+ /* printk(KERN_DEBUG "TASKLET: end\n"); */
}
/*
* create vxpocket instance
*/
-static struct snd_vxpocket *snd_vxpocket_new(struct snd_card *card, int ibl,
- struct pcmcia_device *link)
+static int snd_vxpocket_new(struct snd_card *card, int ibl,
+ struct pcmcia_device *link,
+ struct snd_vxpocket **chip_ret)
{
struct vx_core *chip;
struct snd_vxpocket *vxp;
static struct snd_device_ops ops = {
.dev_free = snd_vxpocket_dev_free,
};
+ int err;
chip = snd_vx_create(card, &vxpocket_hw, &snd_vxpocket_ops,
sizeof(struct snd_vxpocket) - sizeof(struct vx_core));
- if (! chip)
- return NULL;
+ if (!chip)
+ return -ENOMEM;
- if (snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops) < 0) {
+ err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
+ if (err < 0) {
kfree(chip);
- return NULL;
+ return err;
}
chip->ibl.size = ibl;
link->conf.ConfigIndex = 1;
link->conf.Present = PRESENT_OPTION;
- return vxp;
+ *chip_ret = vxp;
+ return 0;
}
{
struct snd_card *card;
struct snd_vxpocket *vxp;
- int i;
+ int i, err;
/* find an empty slot from the card list */
for (i = 0; i < SNDRV_CARDS; i++) {
return -ENODEV; /* disabled explicitly */
/* ok, create a card instance */
- card = snd_card_new(index[i], id[i], THIS_MODULE, 0);
- if (card == NULL) {
+ err = snd_card_create(index[i], id[i], THIS_MODULE, 0, &card);
+ if (err < 0) {
snd_printk(KERN_ERR "vxpocket: cannot create a card instance\n");
- return -ENOMEM;
+ return err;
}
- vxp = snd_vxpocket_new(card, ibl[i], p_dev);
- if (! vxp) {
+ err = snd_vxpocket_new(card, ibl[i], p_dev, &vxp);
+ if (err < 0) {
snd_card_free(card);
- return -ENODEV;
+ return err;
}
card->private_data = vxp;
char *name_ext;
int err;
- card = snd_card_new(index, id, THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index, id, THIS_MODULE, 0, &card);
+ if (err < 0)
+ return err;
if ((err = snd_pmac_new(card, &chip)) < 0)
goto __error;
}
/* create card instance */
- the_card.card = snd_card_new(index, id, THIS_MODULE, 0);
- if (!the_card.card) {
- ret = -ENXIO;
+ ret = snd_card_create(index, id, THIS_MODULE, 0, &the_card.card);
+ if (ret < 0)
goto clean_irq;
- }
strcpy(the_card.card->driver, "PS3");
strcpy(the_card.card->shortname, "PS3");
dreamcastcard = kmalloc(sizeof(struct snd_card_aica), GFP_KERNEL);
if (unlikely(!dreamcastcard))
return -ENOMEM;
- dreamcastcard->card =
- snd_card_new(index, SND_AICA_DRIVER, THIS_MODULE, 0);
- if (unlikely(!dreamcastcard->card)) {
+ err = snd_card_create(index, SND_AICA_DRIVER, THIS_MODULE, 0,
+ &dreamcastcard->card);
+ if (unlikely(err < 0)) {
kfree(dreamcastcard);
- return -ENODEV;
+ return err;
}
strcpy(dreamcastcard->card->driver, "snd_aica");
strcpy(dreamcastcard->card->shortname, SND_AICA_DRIVER);
tristate "ALSA for SoC audio support"
select SND_PCM
select AC97_BUS if SND_SOC_AC97_BUS
+ select SND_JACK if INPUT=y || INPUT=SND
---help---
If you want ASoC support, you should say Y here and also to the
-snd-soc-core-objs := soc-core.o soc-dapm.o
+snd-soc-core-objs := soc-core.o soc-dapm.o soc-jack.o
obj-$(CONFIG_SND_SOC) += snd-soc-core.o
obj-$(CONFIG_SND_SOC) += codecs/
vma->vm_end - vma->vm_start, vma->vm_page_prot);
}
-struct snd_pcm_ops atmel_pcm_ops = {
+static struct snd_pcm_ops atmel_pcm_ops = {
.open = atmel_pcm_open,
.close = atmel_pcm_close,
.ioctl = snd_pcm_lib_ioctl,
#define ATMEL_SSC_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE |\
SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
+static struct snd_soc_dai_ops atmel_ssc_dai_ops = {
+ .startup = atmel_ssc_startup,
+ .shutdown = atmel_ssc_shutdown,
+ .prepare = atmel_ssc_prepare,
+ .hw_params = atmel_ssc_hw_params,
+ .set_fmt = atmel_ssc_set_dai_fmt,
+ .set_clkdiv = atmel_ssc_set_dai_clkdiv,
+};
+
struct snd_soc_dai atmel_ssc_dai[NUM_SSC_DEVICES] = {
{ .name = "atmel-ssc0",
.id = 0,
.channels_max = 2,
.rates = ATMEL_SSC_RATES,
.formats = ATMEL_SSC_FORMATS,},
- .ops = {
- .startup = atmel_ssc_startup,
- .shutdown = atmel_ssc_shutdown,
- .prepare = atmel_ssc_prepare,
- .hw_params = atmel_ssc_hw_params,
- .set_fmt = atmel_ssc_set_dai_fmt,
- .set_clkdiv = atmel_ssc_set_dai_clkdiv,},
+ .ops = &atmel_ssc_dai_ops,
.private_data = &ssc_info[0],
},
#if NUM_SSC_DEVICES == 3
.channels_max = 2,
.rates = ATMEL_SSC_RATES,
.formats = ATMEL_SSC_FORMATS,},
- .ops = {
- .startup = atmel_ssc_startup,
- .shutdown = atmel_ssc_shutdown,
- .prepare = atmel_ssc_prepare,
- .hw_params = atmel_ssc_hw_params,
- .set_fmt = atmel_ssc_set_dai_fmt,
- .set_clkdiv = atmel_ssc_set_dai_clkdiv,},
+ .ops = &atmel_ssc_dai_ops,
.private_data = &ssc_info[1],
},
{ .name = "atmel-ssc2",
.channels_max = 2,
.rates = ATMEL_SSC_RATES,
.formats = ATMEL_SSC_FORMATS,},
- .ops = {
- .startup = atmel_ssc_startup,
- .shutdown = atmel_ssc_shutdown,
- .prepare = atmel_ssc_prepare,
- .hw_params = atmel_ssc_hw_params,
- .set_fmt = atmel_ssc_set_dai_fmt,
- .set_clkdiv = atmel_ssc_set_dai_clkdiv,},
+ .ops = &atmel_ssc_dai_ops,
.private_data = &ssc_info[2],
},
#endif
*/
switch (params_rate(params)) {
case 48000:
- pll_out = 12288000;
- mclk_div = WM8510_MCLKDIV_1;
+ pll_out = 24576000;
+ mclk_div = WM8510_MCLKDIV_2;
bclk = WM8510_BCLKDIV_8;
break;
case 44100:
- pll_out = 11289600;
- mclk_div = WM8510_MCLKDIV_1;
+ pll_out = 22579200;
+ mclk_div = WM8510_MCLKDIV_2;
bclk = WM8510_BCLKDIV_8;
break;
case 22050:
- pll_out = 11289600;
- mclk_div = WM8510_MCLKDIV_2;
+ pll_out = 22579200;
+ mclk_div = WM8510_MCLKDIV_4;
bclk = WM8510_BCLKDIV_8;
break;
case 16000:
- pll_out = 12288000;
- mclk_div = WM8510_MCLKDIV_3;
+ pll_out = 24576000;
+ mclk_div = WM8510_MCLKDIV_6;
bclk = WM8510_BCLKDIV_8;
break;
case 11025:
- pll_out = 11289600;
- mclk_div = WM8510_MCLKDIV_4;
+ pll_out = 22579200;
+ mclk_div = WM8510_MCLKDIV_8;
bclk = WM8510_BCLKDIV_8;
break;
case 8000:
- pll_out = 12288000;
- mclk_div = WM8510_MCLKDIV_6;
+ pll_out = 24576000;
+ mclk_div = WM8510_MCLKDIV_12;
bclk = WM8510_BCLKDIV_8;
break;
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
+#include <linux/i2c.h>
#include <linux/atmel-ssc.h>
#include <sound/soc.h>
#include <sound/soc-dapm.h>
+#include <asm/mach-types.h>
#include <mach/hardware.h>
#include <mach/gpio.h>
#include "atmel-pcm.h"
#include "atmel_ssc_dai.h"
+#define MCLK_RATE 12000000
+
+static struct clk *mclk;
static int at91sam9g20ek_startup(struct snd_pcm_substream *substream)
{
struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
int ret;
- /* codec system clock is supplied by PCK0, set to 12MHz */
ret = snd_soc_dai_set_sysclk(codec_dai, WM8731_SYSCLK,
- 12000000, SND_SOC_CLOCK_IN);
- if (ret < 0)
+ MCLK_RATE, SND_SOC_CLOCK_IN);
+ if (ret < 0) {
+ clk_disable(mclk);
return ret;
+ }
return 0;
}
.shutdown = at91sam9g20ek_shutdown,
};
+static int at91sam9g20ek_set_bias_level(struct snd_soc_card *card,
+ enum snd_soc_bias_level level)
+{
+ static int mclk_on;
+ int ret = 0;
+
+ switch (level) {
+ case SND_SOC_BIAS_ON:
+ case SND_SOC_BIAS_PREPARE:
+ if (!mclk_on)
+ ret = clk_enable(mclk);
+ if (ret == 0)
+ mclk_on = 1;
+ break;
+
+ case SND_SOC_BIAS_OFF:
+ case SND_SOC_BIAS_STANDBY:
+ if (mclk_on)
+ clk_disable(mclk);
+ mclk_on = 0;
+ break;
+ }
+
+ return ret;
+}
static const struct snd_soc_dapm_widget at91sam9g20ek_dapm_widgets[] = {
SND_SOC_DAPM_MIC("Int Mic", NULL),
};
static struct snd_soc_card snd_soc_at91sam9g20ek = {
- .name = "WM8731",
+ .name = "AT91SAMG20-EK",
.platform = &atmel_soc_platform,
.dai_link = &at91sam9g20ek_dai,
.num_links = 1,
+ .set_bias_level = at91sam9g20ek_set_bias_level,
};
-static struct wm8731_setup_data at91sam9g20ek_wm8731_setup = {
- .i2c_bus = 0,
- .i2c_address = 0x1b,
-};
+/*
+ * FIXME: This is a temporary bodge to avoid cross-tree merge issues.
+ * New drivers should register the wm8731 I2C device in the machine
+ * setup code (under arch/arm for ARM systems).
+ */
+static int wm8731_i2c_register(void)
+{
+ struct i2c_board_info info;
+ struct i2c_adapter *adapter;
+ struct i2c_client *client;
+
+ memset(&info, 0, sizeof(struct i2c_board_info));
+ info.addr = 0x1b;
+ strlcpy(info.type, "wm8731", I2C_NAME_SIZE);
+
+ adapter = i2c_get_adapter(0);
+ if (!adapter) {
+ printk(KERN_ERR "can't get i2c adapter 0\n");
+ return -ENODEV;
+ }
+
+ client = i2c_new_device(adapter, &info);
+ i2c_put_adapter(adapter);
+ if (!client) {
+ printk(KERN_ERR "can't add i2c device at 0x%x\n",
+ (unsigned int)info.addr);
+ return -ENODEV;
+ }
+
+ return 0;
+}
static struct snd_soc_device at91sam9g20ek_snd_devdata = {
.card = &snd_soc_at91sam9g20ek,
.codec_dev = &soc_codec_dev_wm8731,
- .codec_data = &at91sam9g20ek_wm8731_setup,
};
static struct platform_device *at91sam9g20ek_snd_device;
{
struct atmel_ssc_info *ssc_p = at91sam9g20ek_dai.cpu_dai->private_data;
struct ssc_device *ssc = NULL;
+ struct clk *pllb;
int ret;
+ if (!machine_is_at91sam9g20ek())
+ return -ENODEV;
+
+ /*
+ * Codec MCLK is supplied by PCK0 - set it up.
+ */
+ mclk = clk_get(NULL, "pck0");
+ if (IS_ERR(mclk)) {
+ printk(KERN_ERR "ASoC: Failed to get MCLK\n");
+ ret = PTR_ERR(mclk);
+ goto err;
+ }
+
+ pllb = clk_get(NULL, "pllb");
+ if (IS_ERR(mclk)) {
+ printk(KERN_ERR "ASoC: Failed to get PLLB\n");
+ ret = PTR_ERR(mclk);
+ goto err_mclk;
+ }
+ ret = clk_set_parent(mclk, pllb);
+ clk_put(pllb);
+ if (ret != 0) {
+ printk(KERN_ERR "ASoC: Failed to set MCLK parent\n");
+ goto err_mclk;
+ }
+
+ clk_set_rate(mclk, MCLK_RATE);
+
/*
* Request SSC device
*/
ssc = ssc_request(0);
if (IS_ERR(ssc)) {
+ printk(KERN_ERR "ASoC: Failed to request SSC 0\n");
ret = PTR_ERR(ssc);
ssc = NULL;
goto err_ssc;
}
ssc_p->ssc = ssc;
+ ret = wm8731_i2c_register();
+ if (ret != 0)
+ goto err_ssc;
+
at91sam9g20ek_snd_device = platform_device_alloc("soc-audio", -1);
if (!at91sam9g20ek_snd_device) {
- printk(KERN_DEBUG
- "platform device allocation failed\n");
+ printk(KERN_ERR "ASoC: Platform device allocation failed\n");
ret = -ENOMEM;
}
ret = platform_device_add(at91sam9g20ek_snd_device);
if (ret) {
- printk(KERN_DEBUG
- "platform device allocation failed\n");
+ printk(KERN_ERR "ASoC: Platform device allocation failed\n");
platform_device_put(at91sam9g20ek_snd_device);
}
return ret;
err_ssc:
+ ssc_free(ssc);
+ ssc_p->ssc = NULL;
+err_mclk:
+ clk_put(mclk);
+ mclk = NULL;
+err:
return ret;
}
platform_device_unregister(at91sam9g20ek_snd_device);
at91sam9g20ek_snd_device = NULL;
+ clk_put(mclk);
+ mclk = NULL;
}
module_init(at91sam9g20ek_init);
return 0;
}
-struct snd_pcm_ops au1xpsc_pcm_ops = {
+static struct snd_pcm_ops au1xpsc_pcm_ops = {
.open = au1xpsc_pcm_open,
.close = au1xpsc_pcm_close,
.ioctl = snd_pcm_lib_ioctl,
return 0;
}
+static struct snd_soc_dai_ops au1xpsc_ac97_dai_ops = {
+ .trigger = au1xpsc_ac97_trigger,
+ .hw_params = au1xpsc_ac97_hw_params,
+};
+
struct snd_soc_dai au1xpsc_ac97_dai = {
.name = "au1xpsc_ac97",
.ac97_control = 1,
.channels_min = 2,
.channels_max = 2,
},
- .ops = {
- .trigger = au1xpsc_ac97_trigger,
- .hw_params = au1xpsc_ac97_hw_params,
- },
+ .ops = &au1xpsc_ac97_dai_ops,
};
EXPORT_SYMBOL_GPL(au1xpsc_ac97_dai);
return 0;
}
+static struct snd_soc_dai_ops au1xpsc_i2s_dai_ops = {
+ .trigger = au1xpsc_i2s_trigger,
+ .hw_params = au1xpsc_i2s_hw_params,
+ .set_fmt = au1xpsc_i2s_set_fmt,
+};
+
struct snd_soc_dai au1xpsc_i2s_dai = {
.name = "au1xpsc_i2s",
.probe = au1xpsc_i2s_probe,
.channels_min = 2,
.channels_max = 8, /* 2 without external help */
},
- .ops = {
- .trigger = au1xpsc_i2s_trigger,
- .hw_params = au1xpsc_i2s_hw_params,
- .set_fmt = au1xpsc_i2s_set_fmt,
- },
+ .ops = &au1xpsc_i2s_dai_ops,
};
EXPORT_SYMBOL(au1xpsc_i2s_dai);
}
#endif
-struct snd_pcm_ops bf5xx_pcm_ac97_ops = {
+static struct snd_pcm_ops bf5xx_pcm_ac97_ops = {
.open = bf5xx_pcm_open,
.ioctl = snd_pcm_lib_ioctl,
.hw_params = bf5xx_pcm_hw_params,
#include "bf5xx-sport.h"
#include "bf5xx-ac97.h"
-#if defined(CONFIG_BF54x)
-#define PIN_REQ_SPORT_0 {P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, \
- P_SPORT0_RFS, P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0}
-
-#define PIN_REQ_SPORT_1 {P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, \
- P_SPORT1_RFS, P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0}
-
-#define PIN_REQ_SPORT_2 {P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, \
- P_SPORT2_RFS, P_SPORT2_DRPRI, P_SPORT2_RSCLK, 0}
-
-#define PIN_REQ_SPORT_3 {P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, \
- P_SPORT3_RFS, P_SPORT3_DRPRI, P_SPORT3_RSCLK, 0}
-#else
-#define PIN_REQ_SPORT_0 {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, \
- P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0}
-
-#define PIN_REQ_SPORT_1 {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, \
- P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0}
-#endif
-
static int *cmd_count;
static int sport_num = CONFIG_SND_BF5XX_SPORT_NUM;
+#define SPORT_REQ(x) \
+ [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
+ P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
static u16 sport_req[][7] = {
- PIN_REQ_SPORT_0,
-#ifdef PIN_REQ_SPORT_1
- PIN_REQ_SPORT_1,
+#ifdef SPORT0_TCR1
+ SPORT_REQ(0),
+#endif
+#ifdef SPORT1_TCR1
+ SPORT_REQ(1),
#endif
-#ifdef PIN_REQ_SPORT_2
- PIN_REQ_SPORT_2,
+#ifdef SPORT2_TCR1
+ SPORT_REQ(2),
#endif
-#ifdef PIN_REQ_SPORT_3
- PIN_REQ_SPORT_3,
+#ifdef SPORT3_TCR1
+ SPORT_REQ(3),
#endif
- };
+};
+#define SPORT_PARAMS(x) \
+ [x] = { \
+ .dma_rx_chan = CH_SPORT##x##_RX, \
+ .dma_tx_chan = CH_SPORT##x##_TX, \
+ .err_irq = IRQ_SPORT##x##_ERROR, \
+ .regs = (struct sport_register *)SPORT##x##_TCR1, \
+ }
static struct sport_param sport_params[4] = {
- {
- .dma_rx_chan = CH_SPORT0_RX,
- .dma_tx_chan = CH_SPORT0_TX,
- .err_irq = IRQ_SPORT0_ERROR,
- .regs = (struct sport_register *)SPORT0_TCR1,
- },
-#ifdef PIN_REQ_SPORT_1
- {
- .dma_rx_chan = CH_SPORT1_RX,
- .dma_tx_chan = CH_SPORT1_TX,
- .err_irq = IRQ_SPORT1_ERROR,
- .regs = (struct sport_register *)SPORT1_TCR1,
- },
+#ifdef SPORT0_TCR1
+ SPORT_PARAMS(0),
#endif
-#ifdef PIN_REQ_SPORT_2
- {
- .dma_rx_chan = CH_SPORT2_RX,
- .dma_tx_chan = CH_SPORT2_TX,
- .err_irq = IRQ_SPORT2_ERROR,
- .regs = (struct sport_register *)SPORT2_TCR1,
- },
+#ifdef SPORT1_TCR1
+ SPORT_PARAMS(1),
#endif
-#ifdef PIN_REQ_SPORT_3
- {
- .dma_rx_chan = CH_SPORT3_RX,
- .dma_tx_chan = CH_SPORT3_TX,
- .err_irq = IRQ_SPORT3_ERROR,
- .regs = (struct sport_register *)SPORT3_TCR1,
- }
+#ifdef SPORT2_TCR1
+ SPORT_PARAMS(2),
+#endif
+#ifdef SPORT3_TCR1
+ SPORT_PARAMS(3),
#endif
};
if (cmd_count == NULL)
return -ENOMEM;
- if (peripheral_request_list(&sport_req[sport_num][0], "soc-audio")) {
+ if (peripheral_request_list(sport_req[sport_num], "soc-audio")) {
pr_err("Requesting Peripherals failed\n");
ret = -EFAULT;
goto peripheral_err;
- }
+ }
#ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
/* Request PB3 as reset pin */
sport_err:
#ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
gpio_free(CONFIG_SND_BF5XX_RESET_GPIO_NUM);
-#endif
gpio_err:
- peripheral_free_list(&sport_req[sport_num][0]);
+#endif
+ peripheral_free_list(sport_req[sport_num]);
peripheral_err:
free_page((unsigned long)cmd_count);
cmd_count = NULL;
{
free_page((unsigned long)cmd_count);
cmd_count = NULL;
- peripheral_free_list(&sport_req[sport_num][0]);
+ peripheral_free_list(sport_req[sport_num]);
#ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
gpio_free(CONFIG_SND_BF5XX_RESET_GPIO_NUM);
#endif
SSYNC();
/* When TUVF is set, the data is already send out */
- while (!(status & TUVF) && count++ < 10000) {
+ while (!(status & TUVF) && ++count < 10000) {
udelay(1);
status = bfin_read_SPORT_STAT();
SSYNC();
SSYNC();
local_irq_enable();
- if (count == 10000) {
+ if (count >= 10000) {
printk(KERN_ERR "ad73311: failed to configure codec\n");
return -1;
}
return 0 ;
}
-struct snd_pcm_ops bf5xx_pcm_i2s_ops = {
+static struct snd_pcm_ops bf5xx_pcm_i2s_ops = {
.open = bf5xx_pcm_open,
.ioctl = snd_pcm_lib_ioctl,
.hw_params = bf5xx_pcm_hw_params,
#define BF5XX_I2S_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |\
SNDRV_PCM_FMTBIT_S32_LE)
+static struct snd_soc_dai_ops bf5xx_i2s_dai_ops = {
+ .startup = bf5xx_i2s_startup,
+ .shutdown = bf5xx_i2s_shutdown,
+ .hw_params = bf5xx_i2s_hw_params,
+ .set_fmt = bf5xx_i2s_set_dai_fmt,
+};
+
struct snd_soc_dai bf5xx_i2s_dai = {
.name = "bf5xx-i2s",
.id = 0,
.channels_max = 2,
.rates = BF5XX_I2S_RATES,
.formats = BF5XX_I2S_FORMATS,},
- .ops = {
- .startup = bf5xx_i2s_startup,
- .shutdown = bf5xx_i2s_shutdown,
- .hw_params = bf5xx_i2s_hw_params,
- .set_fmt = bf5xx_i2s_set_dai_fmt,
- },
+ .ops = &bf5xx_i2s_dai_ops,
};
EXPORT_SYMBOL_GPL(bf5xx_i2s_dai);
int i;
for (i = 0; i < fragcount; ++i) {
- desc[i].next_desc_addr = (unsigned long)&(desc[i + 1]);
+ desc[i].next_desc_addr = &(desc[i + 1]);
desc[i].start_addr = (unsigned long)buf + i*fragsize;
desc[i].cfg = cfg;
desc[i].x_count = x_count;
}
/* make circular */
- desc[fragcount-1].next_desc_addr = (unsigned long)desc;
+ desc[fragcount-1].next_desc_addr = desc;
- pr_debug("setup desc: desc0=%p, next0=%lx, desc1=%p,"
- "next1=%lx\nx_count=%x,y_count=%x,addr=0x%lx,cfs=0x%x\n",
- &(desc[0]), desc[0].next_desc_addr,
- &(desc[1]), desc[1].next_desc_addr,
+ pr_debug("setup desc: desc0=%p, next0=%p, desc1=%p,"
+ "next1=%p\nx_count=%x,y_count=%x,addr=0x%lx,cfs=0x%x\n",
+ desc, desc[0].next_desc_addr,
+ desc+1, desc[1].next_desc_addr,
desc[0].x_count, desc[0].y_count,
desc[0].start_addr, desc[0].cfg);
}
BUG_ON(sport->curr_rx_desc == sport->dummy_rx_desc);
/* Maybe the dummy buffer descriptor ring is damaged */
- sport->dummy_rx_desc->next_desc_addr = \
- (unsigned long)(sport->dummy_rx_desc+1);
+ sport->dummy_rx_desc->next_desc_addr = sport->dummy_rx_desc + 1;
local_irq_save(flags);
- desc = (struct dmasg *)get_dma_next_desc_ptr(sport->dma_rx_chan);
+ desc = get_dma_next_desc_ptr(sport->dma_rx_chan);
/* Copy the descriptor which will be damaged to backup */
temp_desc = *desc;
desc->x_count = 0xa;
desc->y_count = 0;
- desc->next_desc_addr = (unsigned long)(sport->dummy_rx_desc);
+ desc->next_desc_addr = sport->dummy_rx_desc;
local_irq_restore(flags);
/* Waiting for dummy buffer descriptor is already hooked*/
while ((get_dma_curr_desc_ptr(sport->dma_rx_chan) -
- sizeof(struct dmasg)) !=
- (unsigned long)sport->dummy_rx_desc)
- ;
+ sizeof(struct dmasg)) != sport->dummy_rx_desc)
+ continue;
sport->curr_rx_desc = sport->dummy_rx_desc;
/* Restore the damaged descriptor */
*desc = temp_desc;
static inline int sport_rx_dma_start(struct sport_device *sport, int dummy)
{
if (dummy) {
- sport->dummy_rx_desc->next_desc_addr = \
- (unsigned long) sport->dummy_rx_desc;
+ sport->dummy_rx_desc->next_desc_addr = sport->dummy_rx_desc;
sport->curr_rx_desc = sport->dummy_rx_desc;
} else
sport->curr_rx_desc = sport->dma_rx_desc;
- set_dma_next_desc_addr(sport->dma_rx_chan, \
- (unsigned long)(sport->curr_rx_desc));
+ set_dma_next_desc_addr(sport->dma_rx_chan, sport->curr_rx_desc);
set_dma_x_count(sport->dma_rx_chan, 0);
set_dma_x_modify(sport->dma_rx_chan, 0);
set_dma_config(sport->dma_rx_chan, (DMAFLOW_LARGE | NDSIZE_9 | \
static inline int sport_tx_dma_start(struct sport_device *sport, int dummy)
{
if (dummy) {
- sport->dummy_tx_desc->next_desc_addr = \
- (unsigned long) sport->dummy_tx_desc;
+ sport->dummy_tx_desc->next_desc_addr = sport->dummy_tx_desc;
sport->curr_tx_desc = sport->dummy_tx_desc;
} else
sport->curr_tx_desc = sport->dma_tx_desc;
- set_dma_next_desc_addr(sport->dma_tx_chan, \
- (unsigned long)(sport->curr_tx_desc));
+ set_dma_next_desc_addr(sport->dma_tx_chan, sport->curr_tx_desc);
set_dma_x_count(sport->dma_tx_chan, 0);
set_dma_x_modify(sport->dma_tx_chan, 0);
set_dma_config(sport->dma_tx_chan,
BUG_ON(sport->curr_rx_desc != sport->dummy_rx_desc);
local_irq_save(flags);
while ((get_dma_curr_desc_ptr(sport->dma_rx_chan) -
- sizeof(struct dmasg)) !=
- (unsigned long)sport->dummy_rx_desc)
- ;
- sport->dummy_rx_desc->next_desc_addr =
- (unsigned long)(sport->dma_rx_desc);
+ sizeof(struct dmasg)) != sport->dummy_rx_desc)
+ continue;
+ sport->dummy_rx_desc->next_desc_addr = sport->dma_rx_desc;
local_irq_restore(flags);
sport->curr_rx_desc = sport->dma_rx_desc;
} else {
BUG_ON(sport->dummy_tx_desc == NULL);
BUG_ON(sport->curr_tx_desc == sport->dummy_tx_desc);
- sport->dummy_tx_desc->next_desc_addr = \
- (unsigned long)(sport->dummy_tx_desc+1);
+ sport->dummy_tx_desc->next_desc_addr = sport->dummy_tx_desc + 1;
/* Shorten the time on last normal descriptor */
local_irq_save(flags);
- desc = (struct dmasg *)get_dma_next_desc_ptr(sport->dma_tx_chan);
+ desc = get_dma_next_desc_ptr(sport->dma_tx_chan);
/* Store the descriptor which will be damaged */
temp_desc = *desc;
desc->x_count = 0xa;
desc->y_count = 0;
- desc->next_desc_addr = (unsigned long)(sport->dummy_tx_desc);
+ desc->next_desc_addr = sport->dummy_tx_desc;
local_irq_restore(flags);
/* Waiting for dummy buffer descriptor is already hooked*/
while ((get_dma_curr_desc_ptr(sport->dma_tx_chan) - \
- sizeof(struct dmasg)) != \
- (unsigned long)sport->dummy_tx_desc)
- ;
+ sizeof(struct dmasg)) != sport->dummy_tx_desc)
+ continue;
sport->curr_tx_desc = sport->dummy_tx_desc;
/* Restore the damaged descriptor */
*desc = temp_desc;
/* Hook the normal buffer descriptor */
local_irq_save(flags);
while ((get_dma_curr_desc_ptr(sport->dma_tx_chan) -
- sizeof(struct dmasg)) !=
- (unsigned long)sport->dummy_tx_desc)
- ;
- sport->dummy_tx_desc->next_desc_addr =
- (unsigned long)(sport->dma_tx_desc);
+ sizeof(struct dmasg)) != sport->dummy_tx_desc)
+ continue;
+ sport->dummy_tx_desc->next_desc_addr = sport->dma_tx_desc;
local_irq_restore(flags);
sport->curr_tx_desc = sport->dma_tx_desc;
} else {
unsigned config;
pr_debug("%s entered\n", __func__);
-#if L1_DATA_A_LENGTH != 0
- desc = (struct dmasg *) l1_data_sram_alloc(2 * sizeof(*desc));
-#else
- {
+ if (L1_DATA_A_LENGTH)
+ desc = l1_data_sram_zalloc(2 * sizeof(*desc));
+ else {
dma_addr_t addr;
desc = dma_alloc_coherent(NULL, 2 * sizeof(*desc), &addr, 0);
+ memset(desc, 0, 2 * sizeof(*desc));
}
-#endif
if (desc == NULL) {
pr_err("Failed to allocate memory for dummy rx desc\n");
return -ENOMEM;
}
- memset(desc, 0, 2 * sizeof(*desc));
sport->dummy_rx_desc = desc;
desc->start_addr = (unsigned long)sport->dummy_buf;
config = DMAFLOW_LARGE | NDSIZE_9 | compute_wdsize(sport->wdsize)
desc->y_count = 0;
desc->y_modify = 0;
memcpy(desc+1, desc, sizeof(*desc));
- desc->next_desc_addr = (unsigned long)(desc+1);
- desc[1].next_desc_addr = (unsigned long)desc;
+ desc->next_desc_addr = desc + 1;
+ desc[1].next_desc_addr = desc;
return 0;
}
pr_debug("%s entered\n", __func__);
-#if L1_DATA_A_LENGTH != 0
- desc = (struct dmasg *) l1_data_sram_alloc(2 * sizeof(*desc));
-#else
- {
+ if (L1_DATA_A_LENGTH)
+ desc = l1_data_sram_zalloc(2 * sizeof(*desc));
+ else {
dma_addr_t addr;
desc = dma_alloc_coherent(NULL, 2 * sizeof(*desc), &addr, 0);
+ memset(desc, 0, 2 * sizeof(*desc));
}
-#endif
if (!desc) {
pr_err("Failed to allocate memory for dummy tx desc\n");
return -ENOMEM;
}
- memset(desc, 0, 2 * sizeof(*desc));
sport->dummy_tx_desc = desc;
desc->start_addr = (unsigned long)sport->dummy_buf + \
sport->dummy_count;
desc->y_count = 0;
desc->y_modify = 0;
memcpy(desc+1, desc, sizeof(*desc));
- desc->next_desc_addr = (unsigned long)(desc+1);
- desc[1].next_desc_addr = (unsigned long)desc;
+ desc->next_desc_addr = desc + 1;
+ desc[1].next_desc_addr = desc;
return 0;
}
sport->wdsize = wdsize;
sport->dummy_count = dummy_count;
-#if L1_DATA_A_LENGTH != 0
- sport->dummy_buf = l1_data_sram_alloc(dummy_count * 2);
-#else
- sport->dummy_buf = kmalloc(dummy_count * 2, GFP_KERNEL);
-#endif
+ if (L1_DATA_A_LENGTH)
+ sport->dummy_buf = l1_data_sram_zalloc(dummy_count * 2);
+ else
+ sport->dummy_buf = kzalloc(dummy_count * 2, GFP_KERNEL);
if (sport->dummy_buf == NULL) {
pr_err("Failed to allocate dummy buffer\n");
goto __error;
}
- memset(sport->dummy_buf, 0, dummy_count * 2);
ret = sport_config_rx_dummy(sport);
if (ret) {
pr_err("Failed to config rx dummy ring\n");
sport = NULL;
}
EXPORT_SYMBOL(sport_done);
+
/*
* It is only used to send several bytes when dma is not enabled
* sport controller is configured but not enabled.
MODULE_AUTHOR("Roy Huang");
MODULE_DESCRIPTION("SPORT driver for ADI Blackfin");
MODULE_LICENSE("GPL");
-
config SND_SOC_ALL_CODECS
tristate "Build all ASoC CODEC drivers"
+ select SND_SOC_L3
select SND_SOC_AC97_CODEC if SND_SOC_AC97_BUS
select SND_SOC_AD1980 if SND_SOC_AC97_BUS
select SND_SOC_AD73311 if I2C
+ select SND_SOC_AK4104 if SPI_MASTER
select SND_SOC_AK4535 if I2C
select SND_SOC_CS4270 if I2C
select SND_SOC_PCM3008
select SND_SOC_UDA134X
select SND_SOC_UDA1380 if I2C
select SND_SOC_WM8350 if MFD_WM8350
+ select SND_SOC_WM8400 if MFD_WM8400
select SND_SOC_WM8510 if SND_SOC_I2C_AND_SPI
select SND_SOC_WM8580 if I2C
select SND_SOC_WM8728 if SND_SOC_I2C_AND_SPI
select SND_SOC_WM8903 if I2C
select SND_SOC_WM8971 if I2C
select SND_SOC_WM8990 if I2C
+ select SND_SOC_WM9705 if SND_SOC_AC97_BUS
select SND_SOC_WM9712 if SND_SOC_AC97_BUS
select SND_SOC_WM9713 if SND_SOC_AC97_BUS
help
config SND_SOC_AD73311
tristate
+config SND_SOC_AK4104
+ tristate
+
config SND_SOC_AK4535
tristate
config SND_SOC_CS4270
tristate
-# Cirrus Logic CS4270 Codec Hardware Mute Support
-# Select if you have external muting circuitry attached to your CS4270.
-config SND_SOC_CS4270_HWMUTE
- bool
- depends on SND_SOC_CS4270
-
# Cirrus Logic CS4270 Codec VD = 3.3V Errata
# Select if you are affected by the errata where the part will not function
# if MCLK divide-by-1.5 is selected and VD is set to 3.3V. The driver will
config SND_SOC_TLV320AIC23
tristate
- depends on I2C
config SND_SOC_TLV320AIC26
tristate "TI TLV320AIC26 Codec support" if SND_SOC_OF_SIMPLE
config SND_SOC_TLV320AIC3X
tristate
- depends on I2C
config SND_SOC_TWL4030
tristate
- depends on TWL4030_CORE
config SND_SOC_UDA134X
tristate
- select SND_SOC_L3
config SND_SOC_UDA1380
tristate
config SND_SOC_WM8350
tristate
+config SND_SOC_WM8400
+ tristate
+
config SND_SOC_WM8510
tristate
config SND_SOC_WM8990
tristate
+config SND_SOC_WM9705
+ tristate
+
config SND_SOC_WM9712
tristate
snd-soc-ac97-objs := ac97.o
snd-soc-ad1980-objs := ad1980.o
snd-soc-ad73311-objs := ad73311.o
+snd-soc-ak4104-objs := ak4104.o
snd-soc-ak4535-objs := ak4535.o
snd-soc-cs4270-objs := cs4270.o
snd-soc-l3-objs := l3.o
snd-soc-uda134x-objs := uda134x.o
snd-soc-uda1380-objs := uda1380.o
snd-soc-wm8350-objs := wm8350.o
+snd-soc-wm8400-objs := wm8400.o
snd-soc-wm8510-objs := wm8510.o
snd-soc-wm8580-objs := wm8580.o
snd-soc-wm8728-objs := wm8728.o
snd-soc-wm8903-objs := wm8903.o
snd-soc-wm8971-objs := wm8971.o
snd-soc-wm8990-objs := wm8990.o
+snd-soc-wm9705-objs := wm9705.o
snd-soc-wm9712-objs := wm9712.o
snd-soc-wm9713-objs := wm9713.o
obj-$(CONFIG_SND_SOC_AC97_CODEC) += snd-soc-ac97.o
obj-$(CONFIG_SND_SOC_AD1980) += snd-soc-ad1980.o
obj-$(CONFIG_SND_SOC_AD73311) += snd-soc-ad73311.o
+obj-$(CONFIG_SND_SOC_AK4104) += snd-soc-ak4104.o
obj-$(CONFIG_SND_SOC_AK4535) += snd-soc-ak4535.o
obj-$(CONFIG_SND_SOC_CS4270) += snd-soc-cs4270.o
obj-$(CONFIG_SND_SOC_L3) += snd-soc-l3.o
obj-$(CONFIG_SND_SOC_UDA134X) += snd-soc-uda134x.o
obj-$(CONFIG_SND_SOC_UDA1380) += snd-soc-uda1380.o
obj-$(CONFIG_SND_SOC_WM8350) += snd-soc-wm8350.o
+obj-$(CONFIG_SND_SOC_WM8400) += snd-soc-wm8400.o
obj-$(CONFIG_SND_SOC_WM8510) += snd-soc-wm8510.o
obj-$(CONFIG_SND_SOC_WM8580) += snd-soc-wm8580.o
obj-$(CONFIG_SND_SOC_WM8728) += snd-soc-wm8728.o
obj-$(CONFIG_SND_SOC_WM8903) += snd-soc-wm8903.o
obj-$(CONFIG_SND_SOC_WM8971) += snd-soc-wm8971.o
obj-$(CONFIG_SND_SOC_WM8990) += snd-soc-wm8990.o
+obj-$(CONFIG_SND_SOC_WM8991) += snd-soc-wm8991.o
+obj-$(CONFIG_SND_SOC_WM9705) += snd-soc-wm9705.o
obj-$(CONFIG_SND_SOC_WM9712) += snd-soc-wm9712.o
obj-$(CONFIG_SND_SOC_WM9713) += snd-soc-wm9713.o
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int reg = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
AC97_PCM_FRONT_DAC_RATE : AC97_PCM_LR_ADC_RATE;
SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 |\
SNDRV_PCM_RATE_48000)
+static struct snd_soc_dai_ops ac97_dai_ops = {
+ .prepare = ac97_prepare,
+};
+
struct snd_soc_dai ac97_dai = {
.name = "AC97 HiFi",
.ac97_control = 1,
.channels_max = 2,
.rates = STD_AC97_RATES,
.formats = SNDRV_PCM_FMTBIT_S16_LE,},
- .ops = {
- .prepare = ac97_prepare,},
+ .ops = &ac97_dai_ops,
};
EXPORT_SYMBOL_GPL(ac97_dai);
printk(KERN_INFO "AC97 SoC Audio Codec %s\n", AC97_VERSION);
- socdev->codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
- if (!socdev->codec)
+ socdev->card->codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
+ if (!socdev->card->codec)
return -ENOMEM;
- codec = socdev->codec;
+ codec = socdev->card->codec;
mutex_init(&codec->mutex);
codec->name = "AC97";
snd_soc_free_pcms(socdev);
err:
- kfree(socdev->codec->reg_cache);
- kfree(socdev->codec);
- socdev->codec = NULL;
+ kfree(socdev->card->codec);
+ socdev->card->codec = NULL;
return ret;
}
static int ac97_soc_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
if (!codec)
return 0;
snd_soc_free_pcms(socdev);
- kfree(socdev->codec->reg_cache);
- kfree(socdev->codec);
+ kfree(socdev->card->codec);
return 0;
}
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- snd_ac97_suspend(socdev->codec->ac97);
+ snd_ac97_suspend(socdev->card->codec->ac97);
return 0;
}
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- snd_ac97_resume(socdev->codec->ac97);
+ snd_ac97_resume(socdev->card->codec->ac97);
return 0;
}
SOC_SINGLE("Mic Boost Switch", AC97_MIC, 6, 1, 0),
};
-/* add non dapm controls */
-static int ad1980_add_controls(struct snd_soc_codec *codec)
-{
- int err, i;
-
- for (i = 0; i < ARRAY_SIZE(ad1980_snd_ac97_controls); i++) {
- err = snd_ctl_add(codec->card, snd_soc_cnew(
- &ad1980_snd_ac97_controls[i], codec, NULL));
- if (err < 0)
- return err;
- }
- return 0;
-}
-
static unsigned int ac97_read(struct snd_soc_codec *codec,
unsigned int reg)
{
default:
reg = reg >> 1;
- if (reg >= (ARRAY_SIZE(ad1980_reg)))
+ if (reg >= ARRAY_SIZE(ad1980_reg))
return -EINVAL;
return cache[reg];
soc_ac97_ops.write(codec->ac97, reg, val);
reg = reg >> 1;
- if (reg < (ARRAY_SIZE(ad1980_reg)))
+ if (reg < ARRAY_SIZE(ad1980_reg))
cache[reg] = val;
return 0;
printk(KERN_INFO "AD1980 SoC Audio Codec\n");
- socdev->codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
- if (socdev->codec == NULL)
+ socdev->card->codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
+ if (socdev->card->codec == NULL)
return -ENOMEM;
- codec = socdev->codec;
+ codec = socdev->card->codec;
mutex_init(&codec->mutex);
codec->reg_cache =
ext_status = ac97_read(codec, AC97_EXTENDED_STATUS);
ac97_write(codec, AC97_EXTENDED_STATUS, ext_status&~0x3800);
- ad1980_add_controls(codec);
+ snd_soc_add_controls(codec, ad1980_snd_ac97_controls,
+ ARRAY_SIZE(ad1980_snd_ac97_controls));
ret = snd_soc_init_card(socdev);
if (ret < 0) {
printk(KERN_ERR "ad1980: failed to register card\n");
kfree(codec->reg_cache);
cache_err:
- kfree(socdev->codec);
- socdev->codec = NULL;
+ kfree(socdev->card->codec);
+ socdev->card->codec = NULL;
return ret;
}
static int ad1980_soc_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
if (codec == NULL)
return 0;
codec->owner = THIS_MODULE;
codec->dai = &ad73311_dai;
codec->num_dai = 1;
- socdev->codec = codec;
+ socdev->card->codec = codec;
INIT_LIST_HEAD(&codec->dapm_widgets);
INIT_LIST_HEAD(&codec->dapm_paths);
register_err:
snd_soc_free_pcms(socdev);
pcm_err:
- kfree(socdev->codec);
- socdev->codec = NULL;
+ kfree(socdev->card->codec);
+ socdev->card->codec = NULL;
return ret;
}
static int ad73311_soc_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
if (codec == NULL)
return 0;
#define REGD_IGS(x) (x & 0x7)
#define REGD_RMOD (1 << 3)
#define REGD_OGS(x) ((x & 0x7) << 4)
-#define REGD_MUTE (x << 7)
+#define REGD_MUTE (1 << 7)
/* Control register E */
#define CTRL_REG_E (4 << 8)
--- /dev/null
+/*
+ * AK4104 ALSA SoC (ASoC) driver
+ *
+ * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/module.h>
+#include <sound/core.h>
+#include <sound/soc.h>
+#include <sound/initval.h>
+#include <linux/spi/spi.h>
+#include <sound/asoundef.h>
+
+#include "ak4104.h"
+
+/* AK4104 registers addresses */
+#define AK4104_REG_CONTROL1 0x00
+#define AK4104_REG_RESERVED 0x01
+#define AK4104_REG_CONTROL2 0x02
+#define AK4104_REG_TX 0x03
+#define AK4104_REG_CHN_STATUS(x) ((x) + 0x04)
+#define AK4104_NUM_REGS 10
+
+#define AK4104_REG_MASK 0x1f
+#define AK4104_READ 0xc0
+#define AK4104_WRITE 0xe0
+#define AK4104_RESERVED_VAL 0x5b
+
+/* Bit masks for AK4104 registers */
+#define AK4104_CONTROL1_RSTN (1 << 0)
+#define AK4104_CONTROL1_PW (1 << 1)
+#define AK4104_CONTROL1_DIF0 (1 << 2)
+#define AK4104_CONTROL1_DIF1 (1 << 3)
+
+#define AK4104_CONTROL2_SEL0 (1 << 0)
+#define AK4104_CONTROL2_SEL1 (1 << 1)
+#define AK4104_CONTROL2_MODE (1 << 2)
+
+#define AK4104_TX_TXE (1 << 0)
+#define AK4104_TX_V (1 << 1)
+
+#define DRV_NAME "ak4104"
+
+struct ak4104_private {
+ struct snd_soc_codec codec;
+ u8 reg_cache[AK4104_NUM_REGS];
+};
+
+static int ak4104_fill_cache(struct snd_soc_codec *codec)
+{
+ int i;
+ u8 *reg_cache = codec->reg_cache;
+ struct spi_device *spi = codec->control_data;
+
+ for (i = 0; i < codec->reg_cache_size; i++) {
+ int ret = spi_w8r8(spi, i | AK4104_READ);
+ if (ret < 0) {
+ dev_err(&spi->dev, "SPI write failure\n");
+ return ret;
+ }
+
+ reg_cache[i] = ret;
+ }
+
+ return 0;
+}
+
+static unsigned int ak4104_read_reg_cache(struct snd_soc_codec *codec,
+ unsigned int reg)
+{
+ u8 *reg_cache = codec->reg_cache;
+
+ if (reg >= codec->reg_cache_size)
+ return -EINVAL;
+
+ return reg_cache[reg];
+}
+
+static int ak4104_spi_write(struct snd_soc_codec *codec, unsigned int reg,
+ unsigned int value)
+{
+ u8 *cache = codec->reg_cache;
+ struct spi_device *spi = codec->control_data;
+
+ if (reg >= codec->reg_cache_size)
+ return -EINVAL;
+
+ reg &= AK4104_REG_MASK;
+ reg |= AK4104_WRITE;
+
+ /* only write to the hardware if value has changed */
+ if (cache[reg] != value) {
+ u8 tmp[2] = { reg, value };
+ if (spi_write(spi, tmp, sizeof(tmp))) {
+ dev_err(&spi->dev, "SPI write failed\n");
+ return -EIO;
+ }
+
+ cache[reg] = value;
+ }
+
+ return 0;
+}
+
+static int ak4104_set_dai_fmt(struct snd_soc_dai *codec_dai,
+ unsigned int format)
+{
+ struct snd_soc_codec *codec = codec_dai->codec;
+ int val = 0;
+
+ val = ak4104_read_reg_cache(codec, AK4104_REG_CONTROL1);
+ if (val < 0)
+ return val;
+
+ val &= ~(AK4104_CONTROL1_DIF0 | AK4104_CONTROL1_DIF1);
+
+ /* set DAI format */
+ switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
+ case SND_SOC_DAIFMT_RIGHT_J:
+ break;
+ case SND_SOC_DAIFMT_LEFT_J:
+ val |= AK4104_CONTROL1_DIF0;
+ break;
+ case SND_SOC_DAIFMT_I2S:
+ val |= AK4104_CONTROL1_DIF0 | AK4104_CONTROL1_DIF1;
+ break;
+ default:
+ dev_err(codec->dev, "invalid dai format\n");
+ return -EINVAL;
+ }
+
+ /* This device can only be slave */
+ if ((format & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
+ return -EINVAL;
+
+ return ak4104_spi_write(codec, AK4104_REG_CONTROL1, val);
+}
+
+static int ak4104_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct snd_soc_device *socdev = rtd->socdev;
+ struct snd_soc_codec *codec = socdev->card->codec;
+ int val = 0;
+
+ /* set the IEC958 bits: consumer mode, no copyright bit */
+ val |= IEC958_AES0_CON_NOT_COPYRIGHT;
+ ak4104_spi_write(codec, AK4104_REG_CHN_STATUS(0), val);
+
+ val = 0;
+
+ switch (params_rate(params)) {
+ case 44100:
+ val |= IEC958_AES3_CON_FS_44100;
+ break;
+ case 48000:
+ val |= IEC958_AES3_CON_FS_48000;
+ break;
+ case 32000:
+ val |= IEC958_AES3_CON_FS_32000;
+ break;
+ default:
+ dev_err(codec->dev, "unsupported sampling rate\n");
+ return -EINVAL;
+ }
+
+ return ak4104_spi_write(codec, AK4104_REG_CHN_STATUS(3), val);
+}
+
+static struct snd_soc_dai_ops ak4101_dai_ops = {
+ .hw_params = ak4104_hw_params,
+ .set_fmt = ak4104_set_dai_fmt,
+};
+
+struct snd_soc_dai ak4104_dai = {
+ .name = DRV_NAME,
+ .playback = {
+ .stream_name = "Playback",
+ .channels_min = 2,
+ .channels_max = 2,
+ .rates = SNDRV_PCM_RATE_44100 |
+ SNDRV_PCM_RATE_48000 |
+ SNDRV_PCM_RATE_32000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S24_3LE |
+ SNDRV_PCM_FMTBIT_S24_LE
+ },
+ .ops = &ak4101_dai_ops,
+};
+
+static struct snd_soc_codec *ak4104_codec;
+
+static int ak4104_spi_probe(struct spi_device *spi)
+{
+ struct snd_soc_codec *codec;
+ struct ak4104_private *ak4104;
+ int ret, val;
+
+ spi->bits_per_word = 8;
+ spi->mode = SPI_MODE_0;
+ ret = spi_setup(spi);
+ if (ret < 0)
+ return ret;
+
+ ak4104 = kzalloc(sizeof(struct ak4104_private), GFP_KERNEL);
+ if (!ak4104) {
+ dev_err(&spi->dev, "could not allocate codec\n");
+ return -ENOMEM;
+ }
+
+ codec = &ak4104->codec;
+ mutex_init(&codec->mutex);
+ INIT_LIST_HEAD(&codec->dapm_widgets);
+ INIT_LIST_HEAD(&codec->dapm_paths);
+
+ codec->dev = &spi->dev;
+ codec->name = DRV_NAME;
+ codec->owner = THIS_MODULE;
+ codec->dai = &ak4104_dai;
+ codec->num_dai = 1;
+ codec->private_data = ak4104;
+ codec->control_data = spi;
+ codec->reg_cache = ak4104->reg_cache;
+ codec->reg_cache_size = AK4104_NUM_REGS;
+
+ /* read all regs and fill the cache */
+ ret = ak4104_fill_cache(codec);
+ if (ret < 0) {
+ dev_err(&spi->dev, "failed to fill register cache\n");
+ return ret;
+ }
+
+ /* read the 'reserved' register - according to the datasheet, it
+ * should contain 0x5b. Not a good way to verify the presence of
+ * the device, but there is no hardware ID register. */
+ if (ak4104_read_reg_cache(codec, AK4104_REG_RESERVED) !=
+ AK4104_RESERVED_VAL) {
+ ret = -ENODEV;
+ goto error_free_codec;
+ }
+
+ /* set power-up and non-reset bits */
+ val = ak4104_read_reg_cache(codec, AK4104_REG_CONTROL1);
+ val |= AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN;
+ ret = ak4104_spi_write(codec, AK4104_REG_CONTROL1, val);
+ if (ret < 0)
+ goto error_free_codec;
+
+ /* enable transmitter */
+ val = ak4104_read_reg_cache(codec, AK4104_REG_TX);
+ val |= AK4104_TX_TXE;
+ ret = ak4104_spi_write(codec, AK4104_REG_TX, val);
+ if (ret < 0)
+ goto error_free_codec;
+
+ ak4104_codec = codec;
+ ret = snd_soc_register_dai(&ak4104_dai);
+ if (ret < 0) {
+ dev_err(&spi->dev, "failed to register DAI\n");
+ goto error_free_codec;
+ }
+
+ spi_set_drvdata(spi, ak4104);
+ dev_info(&spi->dev, "SPI device initialized\n");
+ return 0;
+
+error_free_codec:
+ kfree(ak4104);
+ ak4104_dai.dev = NULL;
+ return ret;
+}
+
+static int __devexit ak4104_spi_remove(struct spi_device *spi)
+{
+ int ret, val;
+ struct ak4104_private *ak4104 = spi_get_drvdata(spi);
+
+ val = ak4104_read_reg_cache(&ak4104->codec, AK4104_REG_CONTROL1);
+ if (val < 0)
+ return val;
+
+ /* clear power-up and non-reset bits */
+ val &= ~(AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN);
+ ret = ak4104_spi_write(&ak4104->codec, AK4104_REG_CONTROL1, val);
+ if (ret < 0)
+ return ret;
+
+ ak4104_codec = NULL;
+ kfree(ak4104);
+ return 0;
+}
+
+static int ak4104_probe(struct platform_device *pdev)
+{
+ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+ struct snd_soc_codec *codec = ak4104_codec;
+ int ret;
+
+ /* Connect the codec to the socdev. snd_soc_new_pcms() needs this. */
+ socdev->card->codec = codec;
+
+ /* Register PCMs */
+ ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
+ if (ret < 0) {
+ dev_err(codec->dev, "failed to create pcms\n");
+ return ret;
+ }
+
+ /* Register the socdev */
+ ret = snd_soc_init_card(socdev);
+ if (ret < 0) {
+ dev_err(codec->dev, "failed to register card\n");
+ snd_soc_free_pcms(socdev);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int ak4104_remove(struct platform_device *pdev)
+{
+ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+ snd_soc_free_pcms(socdev);
+ return 0;
+};
+
+struct snd_soc_codec_device soc_codec_device_ak4104 = {
+ .probe = ak4104_probe,
+ .remove = ak4104_remove
+};
+EXPORT_SYMBOL_GPL(soc_codec_device_ak4104);
+
+static struct spi_driver ak4104_spi_driver = {
+ .driver = {
+ .name = DRV_NAME,
+ .owner = THIS_MODULE,
+ },
+ .probe = ak4104_spi_probe,
+ .remove = __devexit_p(ak4104_spi_remove),
+};
+
+static int __init ak4104_init(void)
+{
+ pr_info("Asahi Kasei AK4104 ALSA SoC Codec Driver\n");
+ return spi_register_driver(&ak4104_spi_driver);
+}
+module_init(ak4104_init);
+
+static void __exit ak4104_exit(void)
+{
+ spi_unregister_driver(&ak4104_spi_driver);
+}
+module_exit(ak4104_exit);
+
+MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>");
+MODULE_DESCRIPTION("Asahi Kasei AK4104 ALSA SoC driver");
+MODULE_LICENSE("GPL");
+
--- /dev/null
+#ifndef _AK4104_H
+#define _AK4104_H
+
+extern struct snd_soc_dai ak4104_dai;
+extern struct snd_soc_codec_device soc_codec_device_ak4104;
+
+#endif
SOC_SINGLE("Mic Sidetone Volume", AK4535_VOL, 4, 7, 0),
};
-/* add non dapm controls */
-static int ak4535_add_controls(struct snd_soc_codec *codec)
-{
- int err, i;
-
- for (i = 0; i < ARRAY_SIZE(ak4535_snd_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&ak4535_snd_controls[i], codec, NULL));
- if (err < 0)
- return err;
- }
-
- return 0;
-}
-
/* Mono 1 Mixer */
static const struct snd_kcontrol_new ak4535_mono1_mixer_controls[] = {
SOC_DAPM_SINGLE("Mic Sidetone Switch", AK4535_SIG1, 4, 1, 0),
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct ak4535_priv *ak4535 = codec->private_data;
u8 mode2 = ak4535_read_reg_cache(codec, AK4535_MODE2) & ~(0x3 << 5);
int rate = params_rate(params), fs = 256;
SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
+static struct snd_soc_dai_ops ak4535_dai_ops = {
+ .hw_params = ak4535_hw_params,
+ .set_fmt = ak4535_set_dai_fmt,
+ .digital_mute = ak4535_mute,
+ .set_sysclk = ak4535_set_dai_sysclk,
+};
+
struct snd_soc_dai ak4535_dai = {
.name = "AK4535",
.playback = {
.channels_max = 2,
.rates = AK4535_RATES,
.formats = SNDRV_PCM_FMTBIT_S16_LE,},
- .ops = {
- .hw_params = ak4535_hw_params,
- .set_fmt = ak4535_set_dai_fmt,
- .digital_mute = ak4535_mute,
- .set_sysclk = ak4535_set_dai_sysclk,
- },
+ .ops = &ak4535_dai_ops,
};
EXPORT_SYMBOL_GPL(ak4535_dai);
static int ak4535_suspend(struct platform_device *pdev, pm_message_t state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
ak4535_set_bias_level(codec, SND_SOC_BIAS_OFF);
return 0;
static int ak4535_resume(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
ak4535_sync(codec);
ak4535_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
ak4535_set_bias_level(codec, codec->suspend_bias_level);
*/
static int ak4535_init(struct snd_soc_device *socdev)
{
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int ret = 0;
codec->name = "AK4535";
/* power on device */
ak4535_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
- ak4535_add_controls(codec);
+ snd_soc_add_controls(codec, ak4535_snd_controls,
+ ARRAY_SIZE(ak4535_snd_controls));
ak4535_add_widgets(codec);
ret = snd_soc_init_card(socdev);
if (ret < 0) {
const struct i2c_device_id *id)
{
struct snd_soc_device *socdev = ak4535_socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int ret;
i2c_set_clientdata(i2c, codec);
}
codec->private_data = ak4535;
- socdev->codec = codec;
+ socdev->card->codec = codec;
mutex_init(&codec->mutex);
INIT_LIST_HEAD(&codec->dapm_widgets);
INIT_LIST_HEAD(&codec->dapm_paths);
static int ak4535_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
if (codec->control_data)
ak4535_set_bias_level(codec, SND_SOC_BIAS_OFF);
*
* Author: Timur Tabi <timur@freescale.com>
*
- * Copyright 2007 Freescale Semiconductor, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
+ * Copyright 2007-2009 Freescale Semiconductor, Inc. This file is licensed
+ * under the terms of the GNU General Public License version 2. This
+ * program is licensed "as is" without any warranty of any kind, whether
+ * express or implied.
*
* This is an ASoC device driver for the Cirrus Logic CS4270 codec.
*
* Current features/limitations:
*
- * 1) Software mode is supported. Stand-alone mode is automatically
- * selected if I2C is disabled or if a CS4270 is not found on the I2C
- * bus. However, stand-alone mode is only partially implemented because
- * there is no mechanism yet for this driver and the machine driver to
- * communicate the values of the M0, M1, MCLK1, and MCLK2 pins.
- * 2) Only I2C is supported, not SPI
- * 3) Only Master mode is supported, not Slave.
- * 4) The machine driver's 'startup' function must call
- * cs4270_set_dai_sysclk() with the value of MCLK.
- * 5) Only I2S and left-justified modes are supported
- * 6) Power management is not supported
- * 7) The only supported control is volume and hardware mute (if enabled)
+ * - Software mode is supported. Stand-alone mode is not supported.
+ * - Only I2C is supported, not SPI
+ * - Support for master and slave mode
+ * - The machine driver's 'startup' function must call
+ * cs4270_set_dai_sysclk() with the value of MCLK.
+ * - Only I2S and left-justified modes are supported
+ * - Power management is not supported
*/
#include <linux/module.h>
#include "cs4270.h"
-/* If I2C is defined, then we support software mode. However, if we're
- not compiled as module but I2C is, then we can't use I2C calls. */
-#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
-#define USE_I2C
-#endif
-
-/* Private data for the CS4270 */
-struct cs4270_private {
- unsigned int mclk; /* Input frequency of the MCLK pin */
- unsigned int mode; /* The mode (I2S or left-justified) */
-};
-
/*
* The codec isn't really big-endian or little-endian, since the I2S
* interface requires data to be sent serially with the MSbit first.
SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \
SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
-#ifdef USE_I2C
-
/* CS4270 registers addresses */
#define CS4270_CHIPID 0x01 /* Chip ID */
#define CS4270_PWRCTL 0x02 /* Power Control */
#define CS4270_MUTE_DAC_A 0x01
#define CS4270_MUTE_DAC_B 0x02
-/*
- * Clock Ratio Selection for Master Mode with I2C enabled
+/* Private data for the CS4270 */
+struct cs4270_private {
+ struct snd_soc_codec codec;
+ u8 reg_cache[CS4270_NUMREGS];
+ unsigned int mclk; /* Input frequency of the MCLK pin */
+ unsigned int mode; /* The mode (I2S or left-justified) */
+ unsigned int slave_mode;
+};
+
+/**
+ * struct cs4270_mode_ratios - clock ratio tables
+ * @ratio: the ratio of MCLK to the sample rate
+ * @speed_mode: the Speed Mode bits to set in the Mode Control register for
+ * this ratio
+ * @mclk: the Ratio Select bits to set in the Mode Control register for this
+ * ratio
*
* The data for this chart is taken from Table 5 of the CS4270 reference
* manual.
* It is also used by cs4270_set_dai_sysclk() to tell ALSA which sampling
* rates the CS4270 currently supports.
*
- * Each element in this array corresponds to the ratios in mclk_ratios[].
- * These two arrays need to be in sync.
- *
- * 'speed_mode' is the corresponding bit pattern to be written to the
+ * @speed_mode is the corresponding bit pattern to be written to the
* MODE bits of the Mode Control Register
*
- * 'mclk' is the corresponding bit pattern to be wirten to the MCLK bits of
+ * @mclk is the corresponding bit pattern to be wirten to the MCLK bits of
* the Mode Control Register.
*
* In situations where a single ratio is represented by multiple speed
* modes, we favor the slowest speed. E.g, for a ratio of 128, we pick
* double-speed instead of quad-speed. However, the CS4270 errata states
- * that Divide-By-1.5 can cause failures, so we avoid that mode where
+ * that divide-By-1.5 can cause failures, so we avoid that mode where
* possible.
*
- * ERRATA: There is an errata for the CS4270 where divide-by-1.5 does not
- * work if VD = 3.3V. If this effects you, select the
+ * Errata: There is an errata for the CS4270 where divide-by-1.5 does not
+ * work if Vd is 3.3V. If this effects you, select the
* CONFIG_SND_SOC_CS4270_VD33_ERRATA Kconfig option, and the driver will
* never select any sample rates that require divide-by-1.5.
*/
-static struct {
+struct cs4270_mode_ratios {
unsigned int ratio;
u8 speed_mode;
u8 mclk;
-} cs4270_mode_ratios[] = {
+};
+
+static struct cs4270_mode_ratios cs4270_mode_ratios[] = {
{64, CS4270_MODE_4X, CS4270_MODE_DIV1},
#ifndef CONFIG_SND_SOC_CS4270_VD33_ERRATA
{96, CS4270_MODE_4X, CS4270_MODE_DIV15},
/* The number of MCLK/LRCK ratios supported by the CS4270 */
#define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios)
-/*
- * Determine the CS4270 samples rates.
+/**
+ * cs4270_set_dai_sysclk - determine the CS4270 samples rates.
+ * @codec_dai: the codec DAI
+ * @clk_id: the clock ID (ignored)
+ * @freq: the MCLK input frequency
+ * @dir: the clock direction (ignored)
*
- * 'freq' is the input frequency to MCLK. The other parameters are ignored.
+ * This function is used to tell the codec driver what the input MCLK
+ * frequency is.
*
* The value of MCLK is used to determine which sample rates are supported
* by the CS4270. The ratio of MCLK / Fs must be equal to one of nine
- * support values: 64, 96, 128, 192, 256, 384, 512, 768, and 1024.
+ * supported values - 64, 96, 128, 192, 256, 384, 512, 768, and 1024.
*
* This function calculates the nine ratios and determines which ones match
* a standard sample rate. If there's a match, then it is added to the list
- * of support sample rates.
+ * of supported sample rates.
*
* This function must be called by the machine driver's 'startup' function,
* otherwise the list of supported sample rates will not be available in
* time for ALSA.
- *
- * Note that in stand-alone mode, the sample rate is determined by input
- * pins M0, M1, MDIV1, and MDIV2. Also in stand-alone mode, divide-by-3
- * is not a programmable option. However, divide-by-3 is not an available
- * option in stand-alone mode. This cases two problems: a ratio of 768 is
- * not available (it requires divide-by-3) and B) ratios 192 and 384 can
- * only be selected with divide-by-1.5, but there is an errate that make
- * this selection difficult.
- *
- * In addition, there is no mechanism for communicating with the machine
- * driver what the input settings can be. This would need to be implemented
- * for stand-alone mode to work.
*/
static int cs4270_set_dai_sysclk(struct snd_soc_dai *codec_dai,
int clk_id, unsigned int freq, int dir)
rates &= ~SNDRV_PCM_RATE_KNOT;
if (!rates) {
- printk(KERN_ERR "cs4270: could not find a valid sample rate\n");
+ dev_err(codec->dev, "could not find a valid sample rate\n");
return -EINVAL;
}
return 0;
}
-/*
- * Configure the codec for the selected audio format
+/**
+ * cs4270_set_dai_fmt - configure the codec for the selected audio format
+ * @codec_dai: the codec DAI
+ * @format: a SND_SOC_DAIFMT_x value indicating the data format
*
* This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the
* codec accordingly.
struct cs4270_private *cs4270 = codec->private_data;
int ret = 0;
+ /* set DAI format */
switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_I2S:
case SND_SOC_DAIFMT_LEFT_J:
cs4270->mode = format & SND_SOC_DAIFMT_FORMAT_MASK;
break;
default:
- printk(KERN_ERR "cs4270: invalid DAI format\n");
+ dev_err(codec->dev, "invalid dai format\n");
+ ret = -EINVAL;
+ }
+
+ /* set master/slave audio interface */
+ switch (format & SND_SOC_DAIFMT_MASTER_MASK) {
+ case SND_SOC_DAIFMT_CBS_CFS:
+ cs4270->slave_mode = 1;
+ break;
+ case SND_SOC_DAIFMT_CBM_CFM:
+ cs4270->slave_mode = 0;
+ break;
+ default:
+ /* all other modes are unsupported by the hardware */
ret = -EINVAL;
}
return ret;
}
-/*
- * A list of addresses on which this CS4270 could use. I2C addresses are
- * 7 bits. For the CS4270, the upper four bits are always 1001, and the
- * lower three bits are determined via the AD2, AD1, and AD0 pins
- * (respectively).
- */
-static const unsigned short normal_i2c[] = {
- 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, I2C_CLIENT_END
-};
-I2C_CLIENT_INSMOD;
-
-/*
- * Pre-fill the CS4270 register cache.
+/**
+ * cs4270_fill_cache - pre-fill the CS4270 register cache.
+ * @codec: the codec for this CS4270
+ *
+ * This function fills in the CS4270 register cache by reading the register
+ * values from the hardware.
+ *
+ * This CS4270 registers are cached to avoid excessive I2C I/O operations.
+ * After the initial read to pre-fill the cache, the CS4270 never updates
+ * the register values, so we won't have a cache coherency problem.
*
* We use the auto-increment feature of the CS4270 to read all registers in
* one shot.
CS4270_FIRSTREG | 0x80, CS4270_NUMREGS, cache);
if (length != CS4270_NUMREGS) {
- printk(KERN_ERR "cs4270: I2C read failure, addr=0x%x\n",
+ dev_err(codec->dev, "i2c read failure, addr=0x%x\n",
i2c_client->addr);
return -EIO;
}
return 0;
}
-/*
- * Read from the CS4270 register cache.
+/**
+ * cs4270_read_reg_cache - read from the CS4270 register cache.
+ * @codec: the codec for this CS4270
+ * @reg: the register to read
+ *
+ * This function returns the value for a given register. It reads only from
+ * the register cache, not the hardware itself.
*
* This CS4270 registers are cached to avoid excessive I2C I/O operations.
* After the initial read to pre-fill the cache, the CS4270 never updates
- * the register values, so we won't have a cache coherncy problem.
+ * the register values, so we won't have a cache coherency problem.
*/
static unsigned int cs4270_read_reg_cache(struct snd_soc_codec *codec,
unsigned int reg)
return cache[reg - CS4270_FIRSTREG];
}
-/*
- * Write to a CS4270 register via the I2C bus.
+/**
+ * cs4270_i2c_write - write to a CS4270 register via the I2C bus.
+ * @codec: the codec for this CS4270
+ * @reg: the register to write
+ * @value: the value to write to the register
*
* This function writes the given value to the given CS4270 register, and
* also updates the register cache.
if (cache[reg - CS4270_FIRSTREG] != value) {
struct i2c_client *client = codec->control_data;
if (i2c_smbus_write_byte_data(client, reg, value)) {
- printk(KERN_ERR "cs4270: I2C write failed\n");
+ dev_err(codec->dev, "i2c write failed\n");
return -EIO;
}
return 0;
}
-/*
- * Program the CS4270 with the given hardware parameters.
+/**
+ * cs4270_hw_params - program the CS4270 with the given hardware parameters.
+ * @substream: the audio stream
+ * @params: the hardware parameters to set
+ * @dai: the SOC DAI (ignored)
+ *
+ * This function programs the hardware with the values provided.
+ * Specifically, the sample rate and the data format.
*
- * The .ops functions are used to provide board-specific data, like
- * input frequencies, to this driver. This function takes that information,
+ * The .ops functions are used to provide board-specific data, like input
+ * frequencies, to this driver. This function takes that information,
* combines it with the hardware parameters provided, and programs the
* hardware accordingly.
*/
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct cs4270_private *cs4270 = codec->private_data;
int ret;
unsigned int i;
if (i == NUM_MCLK_RATIOS) {
/* We did not find a matching ratio */
- printk(KERN_ERR "cs4270: could not find matching ratio\n");
+ dev_err(codec->dev, "could not find matching ratio\n");
return -EINVAL;
}
- /* Freeze and power-down the codec */
-
- ret = snd_soc_write(codec, CS4270_PWRCTL, CS4270_PWRCTL_FREEZE |
- CS4270_PWRCTL_PDN_ADC | CS4270_PWRCTL_PDN_DAC |
- CS4270_PWRCTL_PDN);
- if (ret < 0) {
- printk(KERN_ERR "cs4270: I2C write failed\n");
- return ret;
- }
-
- /* Program the mode control register */
+ /* Set the sample rate */
reg = snd_soc_read(codec, CS4270_MODE);
reg &= ~(CS4270_MODE_SPEED_MASK | CS4270_MODE_DIV_MASK);
- reg |= cs4270_mode_ratios[i].speed_mode | cs4270_mode_ratios[i].mclk;
+ reg |= cs4270_mode_ratios[i].mclk;
+
+ if (cs4270->slave_mode)
+ reg |= CS4270_MODE_SLAVE;
+ else
+ reg |= cs4270_mode_ratios[i].speed_mode;
ret = snd_soc_write(codec, CS4270_MODE, reg);
if (ret < 0) {
- printk(KERN_ERR "cs4270: I2C write failed\n");
+ dev_err(codec->dev, "i2c write failed\n");
return ret;
}
- /* Program the format register */
+ /* Set the DAI format */
reg = snd_soc_read(codec, CS4270_FORMAT);
reg &= ~(CS4270_FORMAT_DAC_MASK | CS4270_FORMAT_ADC_MASK);
reg |= CS4270_FORMAT_DAC_LJ | CS4270_FORMAT_ADC_LJ;
break;
default:
- printk(KERN_ERR "cs4270: unknown format\n");
+ dev_err(codec->dev, "unknown dai format\n");
return -EINVAL;
}
ret = snd_soc_write(codec, CS4270_FORMAT, reg);
if (ret < 0) {
- printk(KERN_ERR "cs4270: I2C write failed\n");
- return ret;
- }
-
- /* Disable auto-mute. This feature appears to be buggy, because in
- some situations, auto-mute will not deactivate when it should. */
-
- reg = snd_soc_read(codec, CS4270_MUTE);
- reg &= ~CS4270_MUTE_AUTO;
- ret = snd_soc_write(codec, CS4270_MUTE, reg);
- if (ret < 0) {
- printk(KERN_ERR "cs4270: I2C write failed\n");
- return ret;
- }
-
- /* Disable automatic volume control. It's enabled by default, and
- * it causes volume change commands to be delayed, sometimes until
- * after playback has started.
- */
-
- reg = cs4270_read_reg_cache(codec, CS4270_TRANS);
- reg &= ~(CS4270_TRANS_SOFT | CS4270_TRANS_ZERO);
- ret = cs4270_i2c_write(codec, CS4270_TRANS, reg);
- if (ret < 0) {
- printk(KERN_ERR "I2C write failed\n");
- return ret;
- }
-
- /* Thaw and power-up the codec */
-
- ret = snd_soc_write(codec, CS4270_PWRCTL, 0);
- if (ret < 0) {
- printk(KERN_ERR "cs4270: I2C write failed\n");
+ dev_err(codec->dev, "i2c write failed\n");
return ret;
}
return ret;
}
-#ifdef CONFIG_SND_SOC_CS4270_HWMUTE
-
-/*
- * Set the CS4270 external mute
+/**
+ * cs4270_mute - enable/disable the CS4270 external mute
+ * @dai: the SOC DAI
+ * @mute: 0 = disable mute, 1 = enable mute
*
* This function toggles the mute bits in the MUTE register. The CS4270's
* mute capability is intended for external muting circuitry, so if the
reg6 = snd_soc_read(codec, CS4270_MUTE);
if (mute)
- reg6 |= CS4270_MUTE_ADC_A | CS4270_MUTE_ADC_B |
- CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B;
+ reg6 |= CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B;
else
- reg6 &= ~(CS4270_MUTE_ADC_A | CS4270_MUTE_ADC_B |
- CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B);
+ reg6 &= ~(CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B);
return snd_soc_write(codec, CS4270_MUTE, reg6);
}
-#endif
-
-static int cs4270_i2c_probe(struct i2c_client *, const struct i2c_device_id *);
-
/* A list of non-DAPM controls that the CS4270 supports */
static const struct snd_kcontrol_new cs4270_snd_controls[] = {
SOC_DOUBLE_R("Master Playback Volume",
- CS4270_VOLA, CS4270_VOLB, 0, 0xFF, 1)
-};
-
-static const struct i2c_device_id cs4270_id[] = {
- {"cs4270", 0},
- {}
-};
-MODULE_DEVICE_TABLE(i2c, cs4270_id);
-
-static struct i2c_driver cs4270_i2c_driver = {
- .driver = {
- .name = "CS4270 I2C",
- .owner = THIS_MODULE,
- },
- .id_table = cs4270_id,
- .probe = cs4270_i2c_probe,
+ CS4270_VOLA, CS4270_VOLB, 0, 0xFF, 1),
+ SOC_SINGLE("Digital Sidetone Switch", CS4270_FORMAT, 5, 1, 0),
+ SOC_SINGLE("Soft Ramp Switch", CS4270_TRANS, 6, 1, 0),
+ SOC_SINGLE("Zero Cross Switch", CS4270_TRANS, 5, 1, 0),
+ SOC_SINGLE("Popguard Switch", CS4270_MODE, 0, 1, 1),
+ SOC_SINGLE("Auto-Mute Switch", CS4270_MUTE, 5, 1, 0),
+ SOC_DOUBLE("Master Capture Switch", CS4270_MUTE, 3, 4, 1, 0)
};
/*
- * Global variable to store socdev for i2c probe function.
+ * cs4270_codec - global variable to store codec for the ASoC probe function
*
* If struct i2c_driver had a private_data field, we wouldn't need to use
- * cs4270_socdec. This is the only way to pass the socdev structure to
- * cs4270_i2c_probe().
- *
- * The real solution to cs4270_socdev is to create a mechanism
- * that maps I2C addresses to snd_soc_device structures. Perhaps the
- * creation of the snd_soc_device object should be moved out of
- * cs4270_probe() and into cs4270_i2c_probe(), but that would make this
- * driver dependent on I2C. The CS4270 supports "stand-alone" mode, whereby
- * the chip is *not* connected to the I2C bus, but is instead configured via
- * input pins.
+ * cs4270_codec. This is the only way to pass the codec structure from
+ * cs4270_i2c_probe() to cs4270_probe(). Unfortunately, there is no good
+ * way to synchronize these two functions. cs4270_i2c_probe() can be called
+ * multiple times before cs4270_probe() is called even once. So for now, we
+ * also only allow cs4270_i2c_probe() to be run once. That means that we do
+ * not support more than one cs4270 device in the system, at least for now.
*/
-static struct snd_soc_device *cs4270_socdev;
+static struct snd_soc_codec *cs4270_codec;
-/*
- * Initialize the I2C interface of the CS4270
- *
- * This function is called for whenever the I2C subsystem finds a device
- * at a particular address.
+static struct snd_soc_dai_ops cs4270_dai_ops = {
+ .hw_params = cs4270_hw_params,
+ .set_sysclk = cs4270_set_dai_sysclk,
+ .set_fmt = cs4270_set_dai_fmt,
+ .digital_mute = cs4270_mute,
+};
+
+struct snd_soc_dai cs4270_dai = {
+ .name = "cs4270",
+ .playback = {
+ .stream_name = "Playback",
+ .channels_min = 1,
+ .channels_max = 2,
+ .rates = 0,
+ .formats = CS4270_FORMATS,
+ },
+ .capture = {
+ .stream_name = "Capture",
+ .channels_min = 1,
+ .channels_max = 2,
+ .rates = 0,
+ .formats = CS4270_FORMATS,
+ },
+ .ops = &cs4270_dai_ops,
+};
+EXPORT_SYMBOL_GPL(cs4270_dai);
+
+/**
+ * cs4270_probe - ASoC probe function
+ * @pdev: platform device
*
- * Note: snd_soc_new_pcms() must be called before this function can be called,
- * because of snd_ctl_add().
+ * This function is called when ASoC has all the pieces it needs to
+ * instantiate a sound driver.
*/
-static int cs4270_i2c_probe(struct i2c_client *i2c_client,
- const struct i2c_device_id *id)
+static int cs4270_probe(struct platform_device *pdev)
{
- struct snd_soc_device *socdev = cs4270_socdev;
- struct snd_soc_codec *codec = socdev->codec;
- int i;
- int ret = 0;
-
- /* Probing all possible addresses has one drawback: if there are
- multiple CS4270s on the bus, then you cannot specify which
- socdev is matched with which CS4270. For now, we just reject
- this I2C device if the socdev already has one attached. */
- if (codec->control_data)
- return -ENODEV;
-
- /* Note: codec_dai->codec is NULL here */
-
- codec->reg_cache = kzalloc(CS4270_NUMREGS, GFP_KERNEL);
- if (!codec->reg_cache) {
- printk(KERN_ERR "cs4270: could not allocate register cache\n");
- ret = -ENOMEM;
- goto error;
- }
+ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+ struct snd_soc_codec *codec = cs4270_codec;
+ int ret;
- /* Verify that we have a CS4270 */
+ /* Connect the codec to the socdev. snd_soc_new_pcms() needs this. */
+ socdev->card->codec = codec;
- ret = i2c_smbus_read_byte_data(i2c_client, CS4270_CHIPID);
+ /* Register PCMs */
+ ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
if (ret < 0) {
- printk(KERN_ERR "cs4270: failed to read I2C\n");
- goto error;
- }
- /* The top four bits of the chip ID should be 1100. */
- if ((ret & 0xF0) != 0xC0) {
- /* The device at this address is not a CS4270 codec */
- ret = -ENODEV;
- goto error;
+ dev_err(codec->dev, "failed to create pcms\n");
+ return ret;
}
- printk(KERN_INFO "cs4270: found device at I2C address %X\n",
- i2c_client->addr);
- printk(KERN_INFO "cs4270: hardware revision %X\n", ret & 0xF);
-
- codec->control_data = i2c_client;
- codec->read = cs4270_read_reg_cache;
- codec->write = cs4270_i2c_write;
- codec->reg_cache_size = CS4270_NUMREGS;
-
- /* The I2C interface is set up, so pre-fill our register cache */
-
- ret = cs4270_fill_cache(codec);
+ /* Add the non-DAPM controls */
+ ret = snd_soc_add_controls(codec, cs4270_snd_controls,
+ ARRAY_SIZE(cs4270_snd_controls));
if (ret < 0) {
- printk(KERN_ERR "cs4270: failed to fill register cache\n");
- goto error;
+ dev_err(codec->dev, "failed to add controls\n");
+ goto error_free_pcms;
}
- /* Add the non-DAPM controls */
-
- for (i = 0; i < ARRAY_SIZE(cs4270_snd_controls); i++) {
- struct snd_kcontrol *kctrl =
- snd_soc_cnew(&cs4270_snd_controls[i], codec, NULL);
-
- ret = snd_ctl_add(codec->card, kctrl);
- if (ret < 0)
- goto error;
+ /* And finally, register the socdev */
+ ret = snd_soc_init_card(socdev);
+ if (ret < 0) {
+ dev_err(codec->dev, "failed to register card\n");
+ goto error_free_pcms;
}
- i2c_set_clientdata(i2c_client, codec);
-
return 0;
-error:
- codec->control_data = NULL;
-
- kfree(codec->reg_cache);
- codec->reg_cache = NULL;
- codec->reg_cache_size = 0;
+error_free_pcms:
+ snd_soc_free_pcms(socdev);
return ret;
}
-#endif /* USE_I2C*/
+/**
+ * cs4270_remove - ASoC remove function
+ * @pdev: platform device
+ *
+ * This function is the counterpart to cs4270_probe().
+ */
+static int cs4270_remove(struct platform_device *pdev)
+{
+ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
-struct snd_soc_dai cs4270_dai = {
- .name = "CS4270",
- .playback = {
- .stream_name = "Playback",
- .channels_min = 1,
- .channels_max = 2,
- .rates = 0,
- .formats = CS4270_FORMATS,
- },
- .capture = {
- .stream_name = "Capture",
- .channels_min = 1,
- .channels_max = 2,
- .rates = 0,
- .formats = CS4270_FORMATS,
- },
+ snd_soc_free_pcms(socdev);
+
+ return 0;
};
-EXPORT_SYMBOL_GPL(cs4270_dai);
-/*
- * ASoC probe function
+/**
+ * cs4270_i2c_probe - initialize the I2C interface of the CS4270
+ * @i2c_client: the I2C client object
+ * @id: the I2C device ID (ignored)
*
- * This function is called when the machine driver calls
- * platform_device_add().
+ * This function is called whenever the I2C subsystem finds a device that
+ * matches the device ID given via a prior call to i2c_add_driver().
*/
-static int cs4270_probe(struct platform_device *pdev)
+static int cs4270_i2c_probe(struct i2c_client *i2c_client,
+ const struct i2c_device_id *id)
{
- struct snd_soc_device *socdev = platform_get_drvdata(pdev);
struct snd_soc_codec *codec;
- int ret = 0;
+ struct cs4270_private *cs4270;
+ unsigned int reg;
+ int ret;
- printk(KERN_INFO "CS4270 ALSA SoC Codec\n");
+ /* For now, we only support one cs4270 device in the system. See the
+ * comment for cs4270_codec.
+ */
+ if (cs4270_codec) {
+ dev_err(&i2c_client->dev, "ignoring CS4270 at addr %X\n",
+ i2c_client->addr);
+ dev_err(&i2c_client->dev, "only one per board allowed\n");
+ /* Should we return something other than ENODEV here? */
+ return -ENODEV;
+ }
+
+ /* Verify that we have a CS4270 */
+
+ ret = i2c_smbus_read_byte_data(i2c_client, CS4270_CHIPID);
+ if (ret < 0) {
+ dev_err(&i2c_client->dev, "failed to read i2c at addr %X\n",
+ i2c_client->addr);
+ return ret;
+ }
+ /* The top four bits of the chip ID should be 1100. */
+ if ((ret & 0xF0) != 0xC0) {
+ dev_err(&i2c_client->dev, "device at addr %X is not a CS4270\n",
+ i2c_client->addr);
+ return -ENODEV;
+ }
+
+ dev_info(&i2c_client->dev, "found device at i2c address %X\n",
+ i2c_client->addr);
+ dev_info(&i2c_client->dev, "hardware revision %X\n", ret & 0xF);
/* Allocate enough space for the snd_soc_codec structure
and our private data together. */
- codec = kzalloc(ALIGN(sizeof(struct snd_soc_codec), 4) +
- sizeof(struct cs4270_private), GFP_KERNEL);
- if (!codec) {
- printk(KERN_ERR "cs4270: Could not allocate codec structure\n");
+ cs4270 = kzalloc(sizeof(struct cs4270_private), GFP_KERNEL);
+ if (!cs4270) {
+ dev_err(&i2c_client->dev, "could not allocate codec\n");
return -ENOMEM;
}
+ codec = &cs4270->codec;
mutex_init(&codec->mutex);
INIT_LIST_HEAD(&codec->dapm_widgets);
INIT_LIST_HEAD(&codec->dapm_paths);
+ codec->dev = &i2c_client->dev;
codec->name = "CS4270";
codec->owner = THIS_MODULE;
codec->dai = &cs4270_dai;
codec->num_dai = 1;
- codec->private_data = (void *) codec +
- ALIGN(sizeof(struct snd_soc_codec), 4);
-
- socdev->codec = codec;
+ codec->private_data = cs4270;
+ codec->control_data = i2c_client;
+ codec->read = cs4270_read_reg_cache;
+ codec->write = cs4270_i2c_write;
+ codec->reg_cache = cs4270->reg_cache;
+ codec->reg_cache_size = CS4270_NUMREGS;
- /* Register PCMs */
+ /* The I2C interface is set up, so pre-fill our register cache */
- ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
+ ret = cs4270_fill_cache(codec);
if (ret < 0) {
- printk(KERN_ERR "cs4270: failed to create PCMs\n");
+ dev_err(&i2c_client->dev, "failed to fill register cache\n");
goto error_free_codec;
}
-#ifdef USE_I2C
- cs4270_socdev = socdev;
+ /* Disable auto-mute. This feature appears to be buggy. In some
+ * situations, auto-mute will not deactivate when it should, so we want
+ * this feature disabled by default. An application (e.g. alsactl) can
+ * re-enabled it by using the controls.
+ */
- ret = i2c_add_driver(&cs4270_i2c_driver);
- if (ret) {
- printk(KERN_ERR "cs4270: failed to attach driver");
- goto error_free_pcms;
+ reg = cs4270_read_reg_cache(codec, CS4270_MUTE);
+ reg &= ~CS4270_MUTE_AUTO;
+ ret = cs4270_i2c_write(codec, CS4270_MUTE, reg);
+ if (ret < 0) {
+ dev_err(&i2c_client->dev, "i2c write failed\n");
+ return ret;
}
- /* Did we find a CS4270 on the I2C bus? */
- if (codec->control_data) {
- /* Initialize codec ops */
- cs4270_dai.ops.hw_params = cs4270_hw_params;
- cs4270_dai.ops.set_sysclk = cs4270_set_dai_sysclk;
- cs4270_dai.ops.set_fmt = cs4270_set_dai_fmt;
-#ifdef CONFIG_SND_SOC_CS4270_HWMUTE
- cs4270_dai.ops.digital_mute = cs4270_mute;
-#endif
- } else
- printk(KERN_INFO "cs4270: no I2C device found, "
- "using stand-alone mode\n");
-#else
- printk(KERN_INFO "cs4270: I2C disabled, using stand-alone mode\n");
-#endif
+ /* Disable automatic volume control. The hardware enables, and it
+ * causes volume change commands to be delayed, sometimes until after
+ * playback has started. An application (e.g. alsactl) can
+ * re-enabled it by using the controls.
+ */
- ret = snd_soc_init_card(socdev);
+ reg = cs4270_read_reg_cache(codec, CS4270_TRANS);
+ reg &= ~(CS4270_TRANS_SOFT | CS4270_TRANS_ZERO);
+ ret = cs4270_i2c_write(codec, CS4270_TRANS, reg);
if (ret < 0) {
- printk(KERN_ERR "cs4270: failed to register card\n");
- goto error_del_driver;
+ dev_err(&i2c_client->dev, "i2c write failed\n");
+ return ret;
}
- return 0;
+ /* Initialize the DAI. Normally, we'd prefer to have a kmalloc'd DAI
+ * structure for each CS4270 device, but the machine driver needs to
+ * have a pointer to the DAI structure, so for now it must be a global
+ * variable.
+ */
+ cs4270_dai.dev = &i2c_client->dev;
-error_del_driver:
-#ifdef USE_I2C
- i2c_del_driver(&cs4270_i2c_driver);
+ /* Register the DAI. If all the other ASoC driver have already
+ * registered, then this will call our probe function, so
+ * cs4270_codec needs to be ready.
+ */
+ cs4270_codec = codec;
+ ret = snd_soc_register_dai(&cs4270_dai);
+ if (ret < 0) {
+ dev_err(&i2c_client->dev, "failed to register DAIe\n");
+ goto error_free_codec;
+ }
-error_free_pcms:
-#endif
- snd_soc_free_pcms(socdev);
+ i2c_set_clientdata(i2c_client, cs4270);
+
+ return 0;
error_free_codec:
- kfree(socdev->codec);
- socdev->codec = NULL;
+ kfree(cs4270);
+ cs4270_codec = NULL;
+ cs4270_dai.dev = NULL;
return ret;
}
-static int cs4270_remove(struct platform_device *pdev)
+/**
+ * cs4270_i2c_remove - remove an I2C device
+ * @i2c_client: the I2C client object
+ *
+ * This function is the counterpart to cs4270_i2c_probe().
+ */
+static int cs4270_i2c_remove(struct i2c_client *i2c_client)
{
- struct snd_soc_device *socdev = platform_get_drvdata(pdev);
-
- snd_soc_free_pcms(socdev);
-
-#ifdef USE_I2C
- i2c_del_driver(&cs4270_i2c_driver);
-#endif
+ struct cs4270_private *cs4270 = i2c_get_clientdata(i2c_client);
- kfree(socdev->codec);
- socdev->codec = NULL;
+ kfree(cs4270);
+ cs4270_codec = NULL;
+ cs4270_dai.dev = NULL;
return 0;
}
+/*
+ * cs4270_id - I2C device IDs supported by this driver
+ */
+static struct i2c_device_id cs4270_id[] = {
+ {"cs4270", 0},
+ {}
+};
+MODULE_DEVICE_TABLE(i2c, cs4270_id);
+
+/*
+ * cs4270_i2c_driver - I2C device identification
+ *
+ * This structure tells the I2C subsystem how to identify and support a
+ * given I2C device type.
+ */
+static struct i2c_driver cs4270_i2c_driver = {
+ .driver = {
+ .name = "cs4270",
+ .owner = THIS_MODULE,
+ },
+ .id_table = cs4270_id,
+ .probe = cs4270_i2c_probe,
+ .remove = cs4270_i2c_remove,
+};
+
/*
* ASoC codec device structure
*
static int __init cs4270_init(void)
{
- return snd_soc_register_dai(&cs4270_dai);
+ pr_info("Cirrus Logic CS4270 ALSA SoC Codec Driver\n");
+
+ return i2c_add_driver(&cs4270_i2c_driver);
}
module_init(cs4270_init);
static void __exit cs4270_exit(void)
{
- snd_soc_unregister_dai(&cs4270_dai);
+ i2c_del_driver(&cs4270_i2c_driver);
}
module_exit(cs4270_exit);
printk(KERN_INFO "PCM3008 SoC Audio Codec %s\n", PCM3008_VERSION);
- socdev->codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
- if (!socdev->codec)
+ socdev->card->codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
+ if (!socdev->card->codec)
return -ENOMEM;
- codec = socdev->codec;
+ codec = socdev->card->codec;
mutex_init(&codec->mutex);
codec->name = "PCM3008";
card_err:
snd_soc_free_pcms(socdev);
pcm_err:
- kfree(socdev->codec);
+ kfree(socdev->card->codec);
return ret;
}
static int pcm3008_soc_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct pcm3008_setup_data *setup = socdev->codec_data;
if (!codec)
pcm3008_gpio_free(setup);
snd_soc_free_pcms(socdev);
- kfree(socdev->codec);
+ kfree(socdev->card->codec);
return 0;
}
SOC_ENUM("Playback De-emphasis", ssm2602_enum[1]),
};
-/* add non dapm controls */
-static int ssm2602_add_controls(struct snd_soc_codec *codec)
-{
- int err, i;
-
- for (i = 0; i < ARRAY_SIZE(ssm2602_snd_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&ssm2602_snd_controls[i], codec, NULL));
- if (err < 0)
- return err;
- }
-
- return 0;
-}
-
/* Output Mixer */
static const struct snd_kcontrol_new ssm2602_output_mixer_controls[] = {
SOC_DAPM_SINGLE("Line Bypass Switch", SSM2602_APANA, 3, 1, 0),
u16 srate;
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct ssm2602_priv *ssm2602 = codec->private_data;
struct i2c_client *i2c = codec->control_data;
u16 iface = ssm2602_read_reg_cache(codec, SSM2602_IFACE) & 0xfff3;
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct ssm2602_priv *ssm2602 = codec->private_data;
struct i2c_client *i2c = codec->control_data;
struct snd_pcm_runtime *master_runtime;
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
/* set active */
ssm2602_write(codec, SSM2602_ACTIVE, ACTIVE_ACTIVATE_CODEC);
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct ssm2602_priv *ssm2602 = codec->private_data;
/* deactivate */
if (!codec->active)
#define SSM2602_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
+static struct snd_soc_dai_ops ssm2602_dai_ops = {
+ .startup = ssm2602_startup,
+ .prepare = ssm2602_pcm_prepare,
+ .hw_params = ssm2602_hw_params,
+ .shutdown = ssm2602_shutdown,
+ .digital_mute = ssm2602_mute,
+ .set_sysclk = ssm2602_set_dai_sysclk,
+ .set_fmt = ssm2602_set_dai_fmt,
+};
+
struct snd_soc_dai ssm2602_dai = {
.name = "SSM2602",
.playback = {
.channels_max = 2,
.rates = SSM2602_RATES,
.formats = SSM2602_FORMATS,},
- .ops = {
- .startup = ssm2602_startup,
- .prepare = ssm2602_pcm_prepare,
- .hw_params = ssm2602_hw_params,
- .shutdown = ssm2602_shutdown,
- .digital_mute = ssm2602_mute,
- .set_sysclk = ssm2602_set_dai_sysclk,
- .set_fmt = ssm2602_set_dai_fmt,
- }
+ .ops = &ssm2602_dai_ops,
};
EXPORT_SYMBOL_GPL(ssm2602_dai);
static int ssm2602_suspend(struct platform_device *pdev, pm_message_t state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
ssm2602_set_bias_level(codec, SND_SOC_BIAS_OFF);
return 0;
static int ssm2602_resume(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int i;
u8 data[2];
u16 *cache = codec->reg_cache;
*/
static int ssm2602_init(struct snd_soc_device *socdev)
{
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int reg, ret = 0;
codec->name = "SSM2602";
APANA_ENABLE_MIC_BOOST);
ssm2602_write(codec, SSM2602_PWR, 0);
- ssm2602_add_controls(codec);
+ snd_soc_add_controls(codec, ssm2602_snd_controls,
+ ARRAY_SIZE(ssm2602_snd_controls));
ssm2602_add_widgets(codec);
ret = snd_soc_init_card(socdev);
if (ret < 0) {
const struct i2c_device_id *id)
{
struct snd_soc_device *socdev = ssm2602_socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int ret;
i2c_set_clientdata(i2c, codec);
}
codec->private_data = ssm2602;
- socdev->codec = codec;
+ socdev->card->codec = codec;
mutex_init(&codec->mutex);
INIT_LIST_HEAD(&codec->dapm_widgets);
INIT_LIST_HEAD(&codec->dapm_paths);
static int ssm2602_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
if (codec->control_data)
ssm2602_set_bias_level(codec, SND_SOC_BIAS_OFF);
SOC_ENUM("Playback De-emphasis", tlv320aic23_deemph),
};
-/* add non dapm controls */
-static int tlv320aic23_add_controls(struct snd_soc_codec *codec)
-{
-
- int err, i;
-
- for (i = 0; i < ARRAY_SIZE(tlv320aic23_snd_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&tlv320aic23_snd_controls[i],
- codec, NULL));
- if (err < 0)
- return err;
- }
-
- return 0;
-
-}
-
/* PGA Mixer controls for Line and Mic switch */
static const struct snd_kcontrol_new tlv320aic23_output_mixer_controls[] = {
SOC_DAPM_SINGLE("Line Bypass Switch", TLV320AIC23_ANLG, 3, 1, 0),
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
u16 iface_reg;
int ret;
struct aic23 *aic23 = container_of(codec, struct aic23, codec);
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
/* set active */
tlv320aic23_write(codec, TLV320AIC23_ACTIVE, 0x0001);
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct aic23 *aic23 = container_of(codec, struct aic23, codec);
/* deactivate */
#define AIC23_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE)
+static struct snd_soc_dai_ops tlv320aic23_dai_ops = {
+ .prepare = tlv320aic23_pcm_prepare,
+ .hw_params = tlv320aic23_hw_params,
+ .shutdown = tlv320aic23_shutdown,
+ .digital_mute = tlv320aic23_mute,
+ .set_fmt = tlv320aic23_set_dai_fmt,
+ .set_sysclk = tlv320aic23_set_dai_sysclk,
+};
+
struct snd_soc_dai tlv320aic23_dai = {
.name = "tlv320aic23",
.playback = {
.channels_max = 2,
.rates = AIC23_RATES,
.formats = AIC23_FORMATS,},
- .ops = {
- .prepare = tlv320aic23_pcm_prepare,
- .hw_params = tlv320aic23_hw_params,
- .shutdown = tlv320aic23_shutdown,
- .digital_mute = tlv320aic23_mute,
- .set_fmt = tlv320aic23_set_dai_fmt,
- .set_sysclk = tlv320aic23_set_dai_sysclk,
- }
+ .ops = &tlv320aic23_dai_ops,
};
EXPORT_SYMBOL_GPL(tlv320aic23_dai);
pm_message_t state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
tlv320aic23_write(codec, TLV320AIC23_ACTIVE, 0x0);
tlv320aic23_set_bias_level(codec, SND_SOC_BIAS_OFF);
static int tlv320aic23_resume(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int i;
u16 reg;
*/
static int tlv320aic23_init(struct snd_soc_device *socdev)
{
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int ret = 0;
u16 reg;
tlv320aic23_write(codec, TLV320AIC23_ACTIVE, 0x1);
- tlv320aic23_add_controls(codec);
+ snd_soc_add_controls(codec, tlv320aic23_snd_controls,
+ ARRAY_SIZE(tlv320aic23_snd_controls));
tlv320aic23_add_widgets(codec);
ret = snd_soc_init_card(socdev);
if (ret < 0) {
const struct i2c_device_id *i2c_id)
{
struct snd_soc_device *socdev = tlv320aic23_socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int ret;
if (!i2c_check_functionality(i2c->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
if (aic23 == NULL)
return -ENOMEM;
codec = &aic23->codec;
- socdev->codec = codec;
+ socdev->card->codec = codec;
mutex_init(&codec->mutex);
INIT_LIST_HEAD(&codec->dapm_widgets);
INIT_LIST_HEAD(&codec->dapm_paths);
static int tlv320aic23_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct aic23 *aic23 = container_of(codec, struct aic23, codec);
if (codec->control_data)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct aic26 *aic26 = codec->private_data;
int fsref, divisor, wlen, pval, jval, dval, qval;
u16 reg;
#define AIC26_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |\
SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE)
+static struct snd_soc_dai_ops aic26_dai_ops = {
+ .hw_params = aic26_hw_params,
+ .digital_mute = aic26_mute,
+ .set_sysclk = aic26_set_sysclk,
+ .set_fmt = aic26_set_fmt,
+};
+
struct snd_soc_dai aic26_dai = {
.name = "tlv320aic26",
.playback = {
.rates = AIC26_RATES,
.formats = AIC26_FORMATS,
},
- .ops = {
- .hw_params = aic26_hw_params,
- .digital_mute = aic26_mute,
- .set_sysclk = aic26_set_sysclk,
- .set_fmt = aic26_set_fmt,
- },
+ .ops = &aic26_dai_ops,
};
EXPORT_SYMBOL_GPL(aic26_dai);
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
struct snd_soc_codec *codec;
- struct snd_kcontrol *kcontrol;
struct aic26 *aic26;
- int i, ret, err;
+ int ret, err;
dev_info(&pdev->dev, "Probing AIC26 SoC CODEC driver\n");
dev_dbg(&pdev->dev, "socdev=%p\n", socdev);
return -ENODEV;
}
codec = &aic26->codec;
- socdev->codec = codec;
+ socdev->card->codec = codec;
dev_dbg(&pdev->dev, "Registering PCMs, dev=%p, socdev->dev=%p\n",
&pdev->dev, socdev->dev);
/* register controls */
dev_dbg(&pdev->dev, "Registering controls\n");
- for (i = 0; i < ARRAY_SIZE(aic26_snd_controls); i++) {
- kcontrol = snd_soc_cnew(&aic26_snd_controls[i], codec, NULL);
- err = snd_ctl_add(codec->card, kcontrol);
- WARN_ON(err < 0);
- }
+ err = snd_soc_add_controls(codec, aic26_snd_controls,
+ ARRAY_SIZE(aic26_snd_controls));
+ WARN_ON(err < 0);
/* CODEC is setup, we can register the card now */
dev_dbg(&pdev->dev, "Registering card\n");
#include <sound/soc.h>
#include <sound/soc-dapm.h>
#include <sound/initval.h>
+#include <sound/tlv.h>
#include "tlv320aic3x.h"
SOC_ENUM_DOUBLE(AIC3X_CODEC_DFILT_CTRL, 6, 4, 4, aic3x_adc_hpf),
};
+/*
+ * DAC digital volumes. From -63.5 to 0 dB in 0.5 dB steps
+ */
+static DECLARE_TLV_DB_SCALE(dac_tlv, -6350, 50, 0);
+/* ADC PGA gain volumes. From 0 to 59.5 dB in 0.5 dB steps */
+static DECLARE_TLV_DB_SCALE(adc_tlv, 0, 50, 0);
+/*
+ * Output stage volumes. From -78.3 to 0 dB. Muted below -78.3 dB.
+ * Step size is approximately 0.5 dB over most of the scale but increasing
+ * near the very low levels.
+ * Define dB scale so that it is mostly correct for range about -55 to 0 dB
+ * but having increasing dB difference below that (and where it doesn't count
+ * so much). This setting shows -50 dB (actual is -50.3 dB) for register
+ * value 100 and -58.5 dB (actual is -78.3 dB) for register value 117.
+ */
+static DECLARE_TLV_DB_SCALE(output_stage_tlv, -5900, 50, 1);
+
static const struct snd_kcontrol_new aic3x_snd_controls[] = {
/* Output */
- SOC_DOUBLE_R("PCM Playback Volume", LDAC_VOL, RDAC_VOL, 0, 0x7f, 1),
+ SOC_DOUBLE_R_TLV("PCM Playback Volume",
+ LDAC_VOL, RDAC_VOL, 0, 0x7f, 1, dac_tlv),
- SOC_DOUBLE_R("Line DAC Playback Volume", DACL1_2_LLOPM_VOL,
- DACR1_2_RLOPM_VOL, 0, 0x7f, 1),
+ SOC_DOUBLE_R_TLV("Line DAC Playback Volume",
+ DACL1_2_LLOPM_VOL, DACR1_2_RLOPM_VOL,
+ 0, 118, 1, output_stage_tlv),
SOC_SINGLE("LineL Playback Switch", LLOPM_CTRL, 3, 0x01, 0),
SOC_SINGLE("LineR Playback Switch", RLOPM_CTRL, 3, 0x01, 0),
- SOC_DOUBLE_R("LineL DAC Playback Volume", DACL1_2_LLOPM_VOL,
- DACR1_2_LLOPM_VOL, 0, 0x7f, 1),
- SOC_SINGLE("LineL Left PGA Bypass Playback Volume", PGAL_2_LLOPM_VOL,
- 0, 0x7f, 1),
- SOC_SINGLE("LineR Right PGA Bypass Playback Volume", PGAR_2_RLOPM_VOL,
- 0, 0x7f, 1),
- SOC_DOUBLE_R("LineL Line2 Bypass Playback Volume", LINE2L_2_LLOPM_VOL,
- LINE2R_2_LLOPM_VOL, 0, 0x7f, 1),
- SOC_DOUBLE_R("LineR Line2 Bypass Playback Volume", LINE2L_2_RLOPM_VOL,
- LINE2R_2_RLOPM_VOL, 0, 0x7f, 1),
-
- SOC_DOUBLE_R("Mono DAC Playback Volume", DACL1_2_MONOLOPM_VOL,
- DACR1_2_MONOLOPM_VOL, 0, 0x7f, 1),
+ SOC_DOUBLE_R_TLV("LineL DAC Playback Volume",
+ DACL1_2_LLOPM_VOL, DACR1_2_LLOPM_VOL,
+ 0, 118, 1, output_stage_tlv),
+ SOC_SINGLE_TLV("LineL Left PGA Bypass Playback Volume",
+ PGAL_2_LLOPM_VOL, 0, 118, 1, output_stage_tlv),
+ SOC_SINGLE_TLV("LineR Right PGA Bypass Playback Volume",
+ PGAR_2_RLOPM_VOL, 0, 118, 1, output_stage_tlv),
+ SOC_DOUBLE_R_TLV("LineL Line2 Bypass Playback Volume",
+ LINE2L_2_LLOPM_VOL, LINE2R_2_LLOPM_VOL,
+ 0, 118, 1, output_stage_tlv),
+ SOC_DOUBLE_R_TLV("LineR Line2 Bypass Playback Volume",
+ LINE2L_2_RLOPM_VOL, LINE2R_2_RLOPM_VOL,
+ 0, 118, 1, output_stage_tlv),
+
+ SOC_DOUBLE_R_TLV("Mono DAC Playback Volume",
+ DACL1_2_MONOLOPM_VOL, DACR1_2_MONOLOPM_VOL,
+ 0, 118, 1, output_stage_tlv),
SOC_SINGLE("Mono DAC Playback Switch", MONOLOPM_CTRL, 3, 0x01, 0),
- SOC_DOUBLE_R("Mono PGA Bypass Playback Volume", PGAL_2_MONOLOPM_VOL,
- PGAR_2_MONOLOPM_VOL, 0, 0x7f, 1),
- SOC_DOUBLE_R("Mono Line2 Bypass Playback Volume", LINE2L_2_MONOLOPM_VOL,
- LINE2R_2_MONOLOPM_VOL, 0, 0x7f, 1),
-
- SOC_DOUBLE_R("HP DAC Playback Volume", DACL1_2_HPLOUT_VOL,
- DACR1_2_HPROUT_VOL, 0, 0x7f, 1),
+ SOC_DOUBLE_R_TLV("Mono PGA Bypass Playback Volume",
+ PGAL_2_MONOLOPM_VOL, PGAR_2_MONOLOPM_VOL,
+ 0, 118, 1, output_stage_tlv),
+ SOC_DOUBLE_R_TLV("Mono Line2 Bypass Playback Volume",
+ LINE2L_2_MONOLOPM_VOL, LINE2R_2_MONOLOPM_VOL,
+ 0, 118, 1, output_stage_tlv),
+
+ SOC_DOUBLE_R_TLV("HP DAC Playback Volume",
+ DACL1_2_HPLOUT_VOL, DACR1_2_HPROUT_VOL,
+ 0, 118, 1, output_stage_tlv),
SOC_DOUBLE_R("HP DAC Playback Switch", HPLOUT_CTRL, HPROUT_CTRL, 3,
0x01, 0),
- SOC_DOUBLE_R("HP Right PGA Bypass Playback Volume", PGAR_2_HPLOUT_VOL,
- PGAR_2_HPROUT_VOL, 0, 0x7f, 1),
- SOC_SINGLE("HPL PGA Bypass Playback Volume", PGAL_2_HPLOUT_VOL,
- 0, 0x7f, 1),
- SOC_SINGLE("HPR PGA Bypass Playback Volume", PGAL_2_HPROUT_VOL,
- 0, 0x7f, 1),
- SOC_DOUBLE_R("HP Line2 Bypass Playback Volume", LINE2L_2_HPLOUT_VOL,
- LINE2R_2_HPROUT_VOL, 0, 0x7f, 1),
-
- SOC_DOUBLE_R("HPCOM DAC Playback Volume", DACL1_2_HPLCOM_VOL,
- DACR1_2_HPRCOM_VOL, 0, 0x7f, 1),
+ SOC_DOUBLE_R_TLV("HP Right PGA Bypass Playback Volume",
+ PGAR_2_HPLOUT_VOL, PGAR_2_HPROUT_VOL,
+ 0, 118, 1, output_stage_tlv),
+ SOC_SINGLE_TLV("HPL PGA Bypass Playback Volume",
+ PGAL_2_HPLOUT_VOL, 0, 118, 1, output_stage_tlv),
+ SOC_SINGLE_TLV("HPR PGA Bypass Playback Volume",
+ PGAL_2_HPROUT_VOL, 0, 118, 1, output_stage_tlv),
+ SOC_DOUBLE_R_TLV("HP Line2 Bypass Playback Volume",
+ LINE2L_2_HPLOUT_VOL, LINE2R_2_HPROUT_VOL,
+ 0, 118, 1, output_stage_tlv),
+
+ SOC_DOUBLE_R_TLV("HPCOM DAC Playback Volume",
+ DACL1_2_HPLCOM_VOL, DACR1_2_HPRCOM_VOL,
+ 0, 118, 1, output_stage_tlv),
SOC_DOUBLE_R("HPCOM DAC Playback Switch", HPLCOM_CTRL, HPRCOM_CTRL, 3,
0x01, 0),
- SOC_SINGLE("HPLCOM PGA Bypass Playback Volume", PGAL_2_HPLCOM_VOL,
- 0, 0x7f, 1),
- SOC_SINGLE("HPRCOM PGA Bypass Playback Volume", PGAL_2_HPRCOM_VOL,
- 0, 0x7f, 1),
- SOC_DOUBLE_R("HPCOM Line2 Bypass Playback Volume", LINE2L_2_HPLCOM_VOL,
- LINE2R_2_HPRCOM_VOL, 0, 0x7f, 1),
+ SOC_SINGLE_TLV("HPLCOM PGA Bypass Playback Volume",
+ PGAL_2_HPLCOM_VOL, 0, 118, 1, output_stage_tlv),
+ SOC_SINGLE_TLV("HPRCOM PGA Bypass Playback Volume",
+ PGAL_2_HPRCOM_VOL, 0, 118, 1, output_stage_tlv),
+ SOC_DOUBLE_R_TLV("HPCOM Line2 Bypass Playback Volume",
+ LINE2L_2_HPLCOM_VOL, LINE2R_2_HPRCOM_VOL,
+ 0, 118, 1, output_stage_tlv),
/*
* Note: enable Automatic input Gain Controller with care. It can
SOC_DOUBLE_R("AGC Switch", LAGC_CTRL_A, RAGC_CTRL_A, 7, 0x01, 0),
/* Input */
- SOC_DOUBLE_R("PGA Capture Volume", LADC_VOL, RADC_VOL, 0, 0x7f, 0),
+ SOC_DOUBLE_R_TLV("PGA Capture Volume", LADC_VOL, RADC_VOL,
+ 0, 119, 0, adc_tlv),
SOC_DOUBLE_R("PGA Capture Switch", LADC_VOL, RADC_VOL, 7, 0x01, 1),
SOC_ENUM("ADC HPF Cut-off", aic3x_enum[ADC_HPF_ENUM]),
};
-/* add non dapm controls */
-static int aic3x_add_controls(struct snd_soc_codec *codec)
-{
- int err, i;
-
- for (i = 0; i < ARRAY_SIZE(aic3x_snd_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&aic3x_snd_controls[i],
- codec, NULL));
- if (err < 0)
- return err;
- }
-
- return 0;
-}
-
/* Left DAC Mux */
static const struct snd_kcontrol_new aic3x_left_dac_mux_controls =
SOC_DAPM_ENUM("Route", aic3x_enum[LDAC_ENUM]);
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct aic3x_priv *aic3x = codec->private_data;
int codec_clk = 0, bypass_pll = 0, fsref, last_clk = 0;
u8 data, r, p, pll_q, pll_p = 1, pll_r = 1, pll_j = 1;
#define AIC3X_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE)
+static struct snd_soc_dai_ops aic3x_dai_ops = {
+ .hw_params = aic3x_hw_params,
+ .digital_mute = aic3x_mute,
+ .set_sysclk = aic3x_set_dai_sysclk,
+ .set_fmt = aic3x_set_dai_fmt,
+};
+
struct snd_soc_dai aic3x_dai = {
.name = "tlv320aic3x",
.playback = {
.channels_max = 2,
.rates = AIC3X_RATES,
.formats = AIC3X_FORMATS,},
- .ops = {
- .hw_params = aic3x_hw_params,
- .digital_mute = aic3x_mute,
- .set_sysclk = aic3x_set_dai_sysclk,
- .set_fmt = aic3x_set_dai_fmt,
- }
+ .ops = &aic3x_dai_ops,
};
EXPORT_SYMBOL_GPL(aic3x_dai);
static int aic3x_suspend(struct platform_device *pdev, pm_message_t state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
aic3x_set_bias_level(codec, SND_SOC_BIAS_OFF);
static int aic3x_resume(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int i;
u8 data[2];
u8 *cache = codec->reg_cache;
*/
static int aic3x_init(struct snd_soc_device *socdev)
{
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct aic3x_setup_data *setup = socdev->codec_data;
int reg, ret = 0;
aic3x_write(codec, AIC3X_GPIO1_REG, (setup->gpio_func[0] & 0xf) << 4);
aic3x_write(codec, AIC3X_GPIO2_REG, (setup->gpio_func[1] & 0xf) << 4);
- aic3x_add_controls(codec);
+ snd_soc_add_controls(codec, aic3x_snd_controls,
+ ARRAY_SIZE(aic3x_snd_controls));
aic3x_add_widgets(codec);
ret = snd_soc_init_card(socdev);
if (ret < 0) {
const struct i2c_device_id *id)
{
struct snd_soc_device *socdev = aic3x_socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int ret;
i2c_set_clientdata(i2c, codec);
}
codec->private_data = aic3x;
- socdev->codec = codec;
+ socdev->card->codec = codec;
mutex_init(&codec->mutex);
INIT_LIST_HEAD(&codec->dapm_widgets);
INIT_LIST_HEAD(&codec->dapm_paths);
static int aic3x_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
/* power down chip */
if (codec->control_data)
*/
static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
0x00, /* this register not used */
- 0x93, /* REG_CODEC_MODE (0x1) */
+ 0x91, /* REG_CODEC_MODE (0x1) */
0xc3, /* REG_OPTION (0x2) */
0x00, /* REG_UNKNOWN (0x3) */
0x00, /* REG_MICBIAS_CTL (0x4) */
0x00, /* REG_MISC_SET_2 (0x49) */
};
+/* codec private data */
+struct twl4030_priv {
+ unsigned int bypass_state;
+ unsigned int codec_powered;
+ unsigned int codec_muted;
+};
+
/*
* read twl4030 register cache
*/
{
u8 *cache = codec->reg_cache;
+ if (reg >= TWL4030_CACHEREGNUM)
+ return -EIO;
+
return cache[reg];
}
return twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg);
}
-static void twl4030_clear_codecpdz(struct snd_soc_codec *codec)
+static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
{
+ struct twl4030_priv *twl4030 = codec->private_data;
u8 mode;
- mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
- twl4030_write(codec, TWL4030_REG_CODEC_MODE,
- mode & ~TWL4030_CODECPDZ);
-
- /* REVISIT: this delay is present in TI sample drivers */
- /* but there seems to be no TRM requirement for it */
- udelay(10);
-}
-
-static void twl4030_set_codecpdz(struct snd_soc_codec *codec)
-{
- u8 mode;
+ if (enable == twl4030->codec_powered)
+ return;
mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
- twl4030_write(codec, TWL4030_REG_CODEC_MODE,
- mode | TWL4030_CODECPDZ);
+ if (enable)
+ mode |= TWL4030_CODECPDZ;
+ else
+ mode &= ~TWL4030_CODECPDZ;
+
+ twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
+ twl4030->codec_powered = enable;
/* REVISIT: this delay is present in TI sample drivers */
/* but there seems to be no TRM requirement for it */
int i;
/* clear CODECPDZ prior to setting register defaults */
- twl4030_clear_codecpdz(codec);
+ twl4030_codec_enable(codec, 0);
/* set all audio section registers to reasonable defaults */
for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++)
}
+static void twl4030_codec_mute(struct snd_soc_codec *codec, int mute)
+{
+ struct twl4030_priv *twl4030 = codec->private_data;
+ u8 reg_val;
+
+ if (mute == twl4030->codec_muted)
+ return;
+
+ if (mute) {
+ /* Bypass the reg_cache and mute the volumes
+ * Headset mute is done in it's own event handler
+ * Things to mute: Earpiece, PreDrivL/R, CarkitL/R
+ */
+ reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_EAR_CTL);
+ twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
+ reg_val & (~TWL4030_EAR_GAIN),
+ TWL4030_REG_EAR_CTL);
+
+ reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_PREDL_CTL);
+ twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
+ reg_val & (~TWL4030_PREDL_GAIN),
+ TWL4030_REG_PREDL_CTL);
+ reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_PREDR_CTL);
+ twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
+ reg_val & (~TWL4030_PREDR_GAIN),
+ TWL4030_REG_PREDL_CTL);
+
+ reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_PRECKL_CTL);
+ twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
+ reg_val & (~TWL4030_PRECKL_GAIN),
+ TWL4030_REG_PRECKL_CTL);
+ reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_PRECKR_CTL);
+ twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
+ reg_val & (~TWL4030_PRECKL_GAIN),
+ TWL4030_REG_PRECKR_CTL);
+
+ /* Disable PLL */
+ reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_APLL_CTL);
+ reg_val &= ~TWL4030_APLL_EN;
+ twl4030_write(codec, TWL4030_REG_APLL_CTL, reg_val);
+ } else {
+ /* Restore the volumes
+ * Headset mute is done in it's own event handler
+ * Things to restore: Earpiece, PreDrivL/R, CarkitL/R
+ */
+ twl4030_write(codec, TWL4030_REG_EAR_CTL,
+ twl4030_read_reg_cache(codec, TWL4030_REG_EAR_CTL));
+
+ twl4030_write(codec, TWL4030_REG_PREDL_CTL,
+ twl4030_read_reg_cache(codec, TWL4030_REG_PREDL_CTL));
+ twl4030_write(codec, TWL4030_REG_PREDR_CTL,
+ twl4030_read_reg_cache(codec, TWL4030_REG_PREDR_CTL));
+
+ twl4030_write(codec, TWL4030_REG_PRECKL_CTL,
+ twl4030_read_reg_cache(codec, TWL4030_REG_PRECKL_CTL));
+ twl4030_write(codec, TWL4030_REG_PRECKR_CTL,
+ twl4030_read_reg_cache(codec, TWL4030_REG_PRECKR_CTL));
+
+ /* Enable PLL */
+ reg_val = twl4030_read_reg_cache(codec, TWL4030_REG_APLL_CTL);
+ reg_val |= TWL4030_APLL_EN;
+ twl4030_write(codec, TWL4030_REG_APLL_CTL, reg_val);
+ }
+
+ twl4030->codec_muted = mute;
+}
+
+static void twl4030_power_up(struct snd_soc_codec *codec)
+{
+ struct twl4030_priv *twl4030 = codec->private_data;
+ u8 anamicl, regmisc1, byte;
+ int i = 0;
+
+ if (twl4030->codec_powered)
+ return;
+
+ /* set CODECPDZ to turn on codec */
+ twl4030_codec_enable(codec, 1);
+
+ /* initiate offset cancellation */
+ anamicl = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
+ twl4030_write(codec, TWL4030_REG_ANAMICL,
+ anamicl | TWL4030_CNCL_OFFSET_START);
+
+ /* wait for offset cancellation to complete */
+ do {
+ /* this takes a little while, so don't slam i2c */
+ udelay(2000);
+ twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
+ TWL4030_REG_ANAMICL);
+ } while ((i++ < 100) &&
+ ((byte & TWL4030_CNCL_OFFSET_START) ==
+ TWL4030_CNCL_OFFSET_START));
+
+ /* Make sure that the reg_cache has the same value as the HW */
+ twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte);
+
+ /* anti-pop when changing analog gain */
+ regmisc1 = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
+ twl4030_write(codec, TWL4030_REG_MISC_SET_1,
+ regmisc1 | TWL4030_SMOOTH_ANAVOL_EN);
+
+ /* toggle CODECPDZ as per TRM */
+ twl4030_codec_enable(codec, 0);
+ twl4030_codec_enable(codec, 1);
+}
+
+/*
+ * Unconditional power down
+ */
+static void twl4030_power_down(struct snd_soc_codec *codec)
+{
+ /* power down */
+ twl4030_codec_enable(codec, 0);
+}
+
/* Earpiece */
static const char *twl4030_earpiece_texts[] =
{"Off", "DACL1", "DACL2", "DACR1"};
static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
+/* Analog bypass for AudioR1 */
+static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
+ SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
+
+/* Analog bypass for AudioL1 */
+static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
+ SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
+
+/* Analog bypass for AudioR2 */
+static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
+ SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
+
+/* Analog bypass for AudioL2 */
+static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
+ SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
+
+/* Digital bypass gain, 0 mutes the bypass */
+static const unsigned int twl4030_dapm_dbypass_tlv[] = {
+ TLV_DB_RANGE_HEAD(2),
+ 0, 3, TLV_DB_SCALE_ITEM(-2400, 0, 1),
+ 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
+};
+
+/* Digital bypass left (TX1L -> RX2L) */
+static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
+ SOC_DAPM_SINGLE_TLV("Volume",
+ TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
+ twl4030_dapm_dbypass_tlv);
+
+/* Digital bypass right (TX1R -> RX2R) */
+static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
+ SOC_DAPM_SINGLE_TLV("Volume",
+ TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
+ twl4030_dapm_dbypass_tlv);
+
static int micpath_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
return 0;
}
+static int headsetl_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ unsigned char hs_gain, hs_pop;
+
+ /* Save the current volume */
+ hs_gain = twl4030_read_reg_cache(w->codec, TWL4030_REG_HS_GAIN_SET);
+ hs_pop = twl4030_read_reg_cache(w->codec, TWL4030_REG_HS_POPN_SET);
+
+ switch (event) {
+ case SND_SOC_DAPM_POST_PMU:
+ /* Do the anti-pop/bias ramp enable according to the TRM */
+ hs_pop |= TWL4030_VMID_EN;
+ twl4030_write(w->codec, TWL4030_REG_HS_POPN_SET, hs_pop);
+ /* Is this needed? Can we just use whatever gain here? */
+ twl4030_write(w->codec, TWL4030_REG_HS_GAIN_SET,
+ (hs_gain & (~0x0f)) | 0x0a);
+ hs_pop |= TWL4030_RAMP_EN;
+ twl4030_write(w->codec, TWL4030_REG_HS_POPN_SET, hs_pop);
+
+ /* Restore the original volume */
+ twl4030_write(w->codec, TWL4030_REG_HS_GAIN_SET, hs_gain);
+ break;
+ case SND_SOC_DAPM_POST_PMD:
+ /* Do the anti-pop/bias ramp disable according to the TRM */
+ hs_pop &= ~TWL4030_RAMP_EN;
+ twl4030_write(w->codec, TWL4030_REG_HS_POPN_SET, hs_pop);
+ /* Bypass the reg_cache to mute the headset */
+ twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
+ hs_gain & (~0x0f),
+ TWL4030_REG_HS_GAIN_SET);
+ hs_pop &= ~TWL4030_VMID_EN;
+ twl4030_write(w->codec, TWL4030_REG_HS_POPN_SET, hs_pop);
+ break;
+ }
+ return 0;
+}
+
+static int bypass_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ struct soc_mixer_control *m =
+ (struct soc_mixer_control *)w->kcontrols->private_value;
+ struct twl4030_priv *twl4030 = w->codec->private_data;
+ unsigned char reg;
+
+ reg = twl4030_read_reg_cache(w->codec, m->reg);
+
+ if (m->reg <= TWL4030_REG_ARXR2_APGA_CTL) {
+ /* Analog bypass */
+ if (reg & (1 << m->shift))
+ twl4030->bypass_state |=
+ (1 << (m->reg - TWL4030_REG_ARXL1_APGA_CTL));
+ else
+ twl4030->bypass_state &=
+ ~(1 << (m->reg - TWL4030_REG_ARXL1_APGA_CTL));
+ } else {
+ /* Digital bypass */
+ if (reg & (0x7 << m->shift))
+ twl4030->bypass_state |= (1 << (m->shift ? 5 : 4));
+ else
+ twl4030->bypass_state &= ~(1 << (m->shift ? 5 : 4));
+ }
+
+ if (w->codec->bias_level == SND_SOC_BIAS_STANDBY) {
+ if (twl4030->bypass_state)
+ twl4030_codec_mute(w->codec, 0);
+ else
+ twl4030_codec_mute(w->codec, 1);
+ }
+ return 0;
+}
+
/*
* Some of the gain controls in TWL (mostly those which are associated with
* the outputs) are implemented in an interesting way:
*/
static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
+static const char *twl4030_rampdelay_texts[] = {
+ "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
+ "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
+ "3495/2581/1748 ms"
+};
+
+static const struct soc_enum twl4030_rampdelay_enum =
+ SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2,
+ ARRAY_SIZE(twl4030_rampdelay_texts),
+ twl4030_rampdelay_texts);
+
static const struct snd_kcontrol_new twl4030_snd_controls[] = {
/* Common playback gain controls */
SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
0, 3, 5, 0, input_gain_tlv),
-};
-
-/* add non dapm controls */
-static int twl4030_add_controls(struct snd_soc_codec *codec)
-{
- int err, i;
-
- for (i = 0; i < ARRAY_SIZE(twl4030_snd_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&twl4030_snd_controls[i],
- codec, NULL));
- if (err < 0)
- return err;
- }
- return 0;
-}
+ SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
+};
static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
/* Left channel inputs */
/* DACs */
SND_SOC_DAPM_DAC("DAC Right1", "Right Front Playback",
- TWL4030_REG_AVDAC_CTL, 0, 0),
+ SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_DAC("DAC Left1", "Left Front Playback",
- TWL4030_REG_AVDAC_CTL, 1, 0),
+ SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_DAC("DAC Right2", "Right Rear Playback",
- TWL4030_REG_AVDAC_CTL, 2, 0),
+ SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_DAC("DAC Left2", "Left Rear Playback",
- TWL4030_REG_AVDAC_CTL, 3, 0),
+ SND_SOC_NOPM, 0, 0),
/* Analog PGAs */
SND_SOC_DAPM_PGA("ARXR1_APGA", TWL4030_REG_ARXR1_APGA_CTL,
SND_SOC_DAPM_PGA("ARXL2_APGA", TWL4030_REG_ARXL2_APGA_CTL,
0, 0, NULL, 0),
+ /* Analog bypasses */
+ SND_SOC_DAPM_SWITCH_E("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
+ &twl4030_dapm_abypassr1_control, bypass_event,
+ SND_SOC_DAPM_POST_REG),
+ SND_SOC_DAPM_SWITCH_E("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
+ &twl4030_dapm_abypassl1_control,
+ bypass_event, SND_SOC_DAPM_POST_REG),
+ SND_SOC_DAPM_SWITCH_E("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
+ &twl4030_dapm_abypassr2_control,
+ bypass_event, SND_SOC_DAPM_POST_REG),
+ SND_SOC_DAPM_SWITCH_E("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
+ &twl4030_dapm_abypassl2_control,
+ bypass_event, SND_SOC_DAPM_POST_REG),
+
+ /* Digital bypasses */
+ SND_SOC_DAPM_SWITCH_E("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
+ &twl4030_dapm_dbypassl_control, bypass_event,
+ SND_SOC_DAPM_POST_REG),
+ SND_SOC_DAPM_SWITCH_E("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
+ &twl4030_dapm_dbypassr_control, bypass_event,
+ SND_SOC_DAPM_POST_REG),
+
+ SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer", TWL4030_REG_AVDAC_CTL,
+ 0, 0, NULL, 0),
+ SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer", TWL4030_REG_AVDAC_CTL,
+ 1, 0, NULL, 0),
+ SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer", TWL4030_REG_AVDAC_CTL,
+ 2, 0, NULL, 0),
+ SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer", TWL4030_REG_AVDAC_CTL,
+ 3, 0, NULL, 0),
+
/* Output MUX controls */
/* Earpiece */
SND_SOC_DAPM_VALUE_MUX("Earpiece Mux", SND_SOC_NOPM, 0, 0,
SND_SOC_DAPM_VALUE_MUX("PredriveR Mux", SND_SOC_NOPM, 0, 0,
&twl4030_dapm_predriver_control),
/* HeadsetL/R */
- SND_SOC_DAPM_MUX("HeadsetL Mux", SND_SOC_NOPM, 0, 0,
- &twl4030_dapm_hsol_control),
+ SND_SOC_DAPM_MUX_E("HeadsetL Mux", SND_SOC_NOPM, 0, 0,
+ &twl4030_dapm_hsol_control, headsetl_event,
+ SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
SND_SOC_DAPM_MUX("HeadsetR Mux", SND_SOC_NOPM, 0, 0,
&twl4030_dapm_hsor_control),
/* CarkitL/R */
SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
SND_SOC_DAPM_POST_REG),
- /* Analog input muxes with power switch for the physical ADCL/R */
+ /* Analog input muxes with switch for the capture amplifiers */
SND_SOC_DAPM_VALUE_MUX("Analog Left Capture Route",
- TWL4030_REG_AVADC_CTL, 3, 0, &twl4030_dapm_analoglmic_control),
+ TWL4030_REG_ANAMICL, 4, 0, &twl4030_dapm_analoglmic_control),
SND_SOC_DAPM_VALUE_MUX("Analog Right Capture Route",
- TWL4030_REG_AVADC_CTL, 1, 0, &twl4030_dapm_analogrmic_control),
+ TWL4030_REG_ANAMICR, 4, 0, &twl4030_dapm_analogrmic_control),
- SND_SOC_DAPM_PGA("Analog Left Amplifier",
- TWL4030_REG_ANAMICL, 4, 0, NULL, 0),
- SND_SOC_DAPM_PGA("Analog Right Amplifier",
- TWL4030_REG_ANAMICR, 4, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("ADC Physical Left",
+ TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("ADC Physical Right",
+ TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
SND_SOC_DAPM_PGA("Digimic0 Enable",
TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0),
SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL, 0, 0),
SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL, 1, 0),
SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL, 2, 0),
+
};
static const struct snd_soc_dapm_route intercon[] = {
- {"ARXL1_APGA", NULL, "DAC Left1"},
- {"ARXR1_APGA", NULL, "DAC Right1"},
- {"ARXL2_APGA", NULL, "DAC Left2"},
- {"ARXR2_APGA", NULL, "DAC Right2"},
+ {"Analog L1 Playback Mixer", NULL, "DAC Left1"},
+ {"Analog R1 Playback Mixer", NULL, "DAC Right1"},
+ {"Analog L2 Playback Mixer", NULL, "DAC Left2"},
+ {"Analog R2 Playback Mixer", NULL, "DAC Right2"},
+
+ {"ARXL1_APGA", NULL, "Analog L1 Playback Mixer"},
+ {"ARXR1_APGA", NULL, "Analog R1 Playback Mixer"},
+ {"ARXL2_APGA", NULL, "Analog L2 Playback Mixer"},
+ {"ARXR2_APGA", NULL, "Analog R2 Playback Mixer"},
/* Internal playback routings */
/* Earpiece */
{"Analog Right Capture Route", "Sub mic", "SUBMIC"},
{"Analog Right Capture Route", "AUXR", "AUXR"},
- {"Analog Left Amplifier", NULL, "Analog Left Capture Route"},
- {"Analog Right Amplifier", NULL, "Analog Right Capture Route"},
+ {"ADC Physical Left", NULL, "Analog Left Capture Route"},
+ {"ADC Physical Right", NULL, "Analog Right Capture Route"},
{"Digimic0 Enable", NULL, "DIGIMIC0"},
{"Digimic1 Enable", NULL, "DIGIMIC1"},
/* TX1 Left capture path */
- {"TX1 Capture Route", "Analog", "Analog Left Amplifier"},
+ {"TX1 Capture Route", "Analog", "ADC Physical Left"},
{"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
/* TX1 Right capture path */
- {"TX1 Capture Route", "Analog", "Analog Right Amplifier"},
+ {"TX1 Capture Route", "Analog", "ADC Physical Right"},
{"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
/* TX2 Left capture path */
- {"TX2 Capture Route", "Analog", "Analog Left Amplifier"},
+ {"TX2 Capture Route", "Analog", "ADC Physical Left"},
{"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
/* TX2 Right capture path */
- {"TX2 Capture Route", "Analog", "Analog Right Amplifier"},
+ {"TX2 Capture Route", "Analog", "ADC Physical Right"},
{"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
{"ADC Virtual Left1", NULL, "TX1 Capture Route"},
{"ADC Virtual Left2", NULL, "TX2 Capture Route"},
{"ADC Virtual Right2", NULL, "TX2 Capture Route"},
+ /* Analog bypass routes */
+ {"Right1 Analog Loopback", "Switch", "Analog Right Capture Route"},
+ {"Left1 Analog Loopback", "Switch", "Analog Left Capture Route"},
+ {"Right2 Analog Loopback", "Switch", "Analog Right Capture Route"},
+ {"Left2 Analog Loopback", "Switch", "Analog Left Capture Route"},
+
+ {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
+ {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
+ {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
+ {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
+
+ /* Digital bypass routes */
+ {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
+ {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
+
+ {"Analog R2 Playback Mixer", NULL, "Right Digital Loopback"},
+ {"Analog L2 Playback Mixer", NULL, "Left Digital Loopback"},
+
};
static int twl4030_add_widgets(struct snd_soc_codec *codec)
return 0;
}
-static void twl4030_power_up(struct snd_soc_codec *codec)
-{
- u8 anamicl, regmisc1, byte, popn;
- int i = 0;
-
- /* set CODECPDZ to turn on codec */
- twl4030_set_codecpdz(codec);
-
- /* initiate offset cancellation */
- anamicl = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
- twl4030_write(codec, TWL4030_REG_ANAMICL,
- anamicl | TWL4030_CNCL_OFFSET_START);
-
-
- /* wait for offset cancellation to complete */
- do {
- /* this takes a little while, so don't slam i2c */
- udelay(2000);
- twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
- TWL4030_REG_ANAMICL);
- } while ((i++ < 100) &&
- ((byte & TWL4030_CNCL_OFFSET_START) ==
- TWL4030_CNCL_OFFSET_START));
-
- /* anti-pop when changing analog gain */
- regmisc1 = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
- twl4030_write(codec, TWL4030_REG_MISC_SET_1,
- regmisc1 | TWL4030_SMOOTH_ANAVOL_EN);
-
- /* toggle CODECPDZ as per TRM */
- twl4030_clear_codecpdz(codec);
- twl4030_set_codecpdz(codec);
-
- /* program anti-pop with bias ramp delay */
- popn = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
- popn &= TWL4030_RAMP_DELAY;
- popn |= TWL4030_RAMP_DELAY_645MS;
- twl4030_write(codec, TWL4030_REG_HS_POPN_SET, popn);
- popn |= TWL4030_VMID_EN;
- twl4030_write(codec, TWL4030_REG_HS_POPN_SET, popn);
-
- /* enable anti-pop ramp */
- popn |= TWL4030_RAMP_EN;
- twl4030_write(codec, TWL4030_REG_HS_POPN_SET, popn);
-}
-
-static void twl4030_power_down(struct snd_soc_codec *codec)
-{
- u8 popn;
-
- /* disable anti-pop ramp */
- popn = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
- popn &= ~TWL4030_RAMP_EN;
- twl4030_write(codec, TWL4030_REG_HS_POPN_SET, popn);
-
- /* disable bias out */
- popn &= ~TWL4030_VMID_EN;
- twl4030_write(codec, TWL4030_REG_HS_POPN_SET, popn);
-
- /* power down */
- twl4030_clear_codecpdz(codec);
-}
-
static int twl4030_set_bias_level(struct snd_soc_codec *codec,
enum snd_soc_bias_level level)
{
+ struct twl4030_priv *twl4030 = codec->private_data;
+
switch (level) {
case SND_SOC_BIAS_ON:
- twl4030_power_up(codec);
+ twl4030_codec_mute(codec, 0);
break;
case SND_SOC_BIAS_PREPARE:
- /* TODO: develop a twl4030_prepare function */
+ twl4030_power_up(codec);
+ if (twl4030->bypass_state)
+ twl4030_codec_mute(codec, 0);
+ else
+ twl4030_codec_mute(codec, 1);
break;
case SND_SOC_BIAS_STANDBY:
- /* TODO: develop a twl4030_standby function */
- twl4030_power_down(codec);
+ twl4030_power_up(codec);
+ if (twl4030->bypass_state)
+ twl4030_codec_mute(codec, 0);
+ else
+ twl4030_codec_mute(codec, 1);
break;
case SND_SOC_BIAS_OFF:
twl4030_power_down(codec);
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
u8 mode, old_mode, format, old_format;
-
/* bit rate */
old_mode = twl4030_read_reg_cache(codec,
TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
if (mode != old_mode) {
/* change rate and set CODECPDZ */
+ twl4030_codec_enable(codec, 0);
twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
- twl4030_set_codecpdz(codec);
+ twl4030_codec_enable(codec, 1);
}
/* sample size */
if (format != old_format) {
/* clear CODECPDZ before changing format (codec requirement) */
- twl4030_clear_codecpdz(codec);
+ twl4030_codec_enable(codec, 0);
/* change format */
twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
/* set CODECPDZ afterwards */
- twl4030_set_codecpdz(codec);
+ twl4030_codec_enable(codec, 1);
}
return 0;
}
if (format != old_format) {
/* clear CODECPDZ before changing format (codec requirement) */
- twl4030_clear_codecpdz(codec);
+ twl4030_codec_enable(codec, 0);
/* change format */
twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
/* set CODECPDZ afterwards */
- twl4030_set_codecpdz(codec);
+ twl4030_codec_enable(codec, 1);
}
return 0;
#define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
#define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
+static struct snd_soc_dai_ops twl4030_dai_ops = {
+ .hw_params = twl4030_hw_params,
+ .set_sysclk = twl4030_set_dai_sysclk,
+ .set_fmt = twl4030_set_dai_fmt,
+};
+
struct snd_soc_dai twl4030_dai = {
.name = "twl4030",
.playback = {
.channels_max = 2,
.rates = TWL4030_RATES,
.formats = TWL4030_FORMATS,},
- .ops = {
- .hw_params = twl4030_hw_params,
- .set_sysclk = twl4030_set_dai_sysclk,
- .set_fmt = twl4030_set_dai_fmt,
- }
+ .ops = &twl4030_dai_ops,
};
EXPORT_SYMBOL_GPL(twl4030_dai);
static int twl4030_suspend(struct platform_device *pdev, pm_message_t state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
static int twl4030_resume(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
twl4030_set_bias_level(codec, codec->suspend_bias_level);
static int twl4030_init(struct snd_soc_device *socdev)
{
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int ret = 0;
printk(KERN_INFO "TWL4030 Audio Codec init \n");
/* power on device */
twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
- twl4030_add_controls(codec);
+ snd_soc_add_controls(codec, twl4030_snd_controls,
+ ARRAY_SIZE(twl4030_snd_controls));
twl4030_add_widgets(codec);
ret = snd_soc_init_card(socdev);
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
struct snd_soc_codec *codec;
+ struct twl4030_priv *twl4030;
codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
if (codec == NULL)
return -ENOMEM;
- socdev->codec = codec;
+ twl4030 = kzalloc(sizeof(struct twl4030_priv), GFP_KERNEL);
+ if (twl4030 == NULL) {
+ kfree(codec);
+ return -ENOMEM;
+ }
+
+ codec->private_data = twl4030;
+ socdev->card->codec = codec;
mutex_init(&codec->mutex);
INIT_LIST_HEAD(&codec->dapm_widgets);
INIT_LIST_HEAD(&codec->dapm_paths);
static int twl4030_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
printk(KERN_INFO "TWL4030 Audio Codec remove\n");
+ twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
snd_soc_free_pcms(socdev);
snd_soc_dapm_free(socdev);
+ kfree(codec->private_data);
kfree(codec);
return 0;
#define TWL4030_CLK256FS_EN 0x02
#define TWL4030_AIF_EN 0x01
+/* EAR_CTL (0x21) */
+#define TWL4030_EAR_GAIN 0x30
+
/* HS_GAIN_SET (0x23) Fields */
#define TWL4030_HSR_GAIN 0x0C
#define TWL4030_RAMP_DELAY_2581MS 0x1C
#define TWL4030_RAMP_EN 0x02
+/* PREDL_CTL (0x25) */
+#define TWL4030_PREDL_GAIN 0x30
+
+/* PREDR_CTL (0x26) */
+#define TWL4030_PREDR_GAIN 0x30
+
+/* PRECKL_CTL (0x27) */
+#define TWL4030_PRECKL_GAIN 0x30
+
+/* PRECKR_CTL (0x28) */
+#define TWL4030_PRECKR_GAIN 0x30
+
/* HFL_CTL (0x29, 0x2A) Fields */
#define TWL4030_HF_CTL_HB_EN 0x04
#define TWL4030_HF_CTL_LOOP_EN 0x08
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct uda134x_priv *uda134x = codec->private_data;
struct snd_pcm_runtime *master_runtime;
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct uda134x_priv *uda134x = codec->private_data;
if (uda134x->master_substream == substream)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct uda134x_priv *uda134x = codec->private_data;
u8 hw_params;
SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
};
-static int uda134x_add_controls(struct snd_soc_codec *codec)
-{
- int err, i, n;
- const struct snd_kcontrol_new *ctrls;
- struct uda134x_platform_data *pd = codec->control_data;
-
- switch (pd->model) {
- case UDA134X_UDA1340:
- case UDA134X_UDA1344:
- n = ARRAY_SIZE(uda1340_snd_controls);
- ctrls = uda1340_snd_controls;
- break;
- case UDA134X_UDA1341:
- n = ARRAY_SIZE(uda1341_snd_controls);
- ctrls = uda1341_snd_controls;
- break;
- default:
- printk(KERN_ERR "%s unkown codec type: %d",
- __func__, pd->model);
- return -EINVAL;
- }
-
- for (i = 0; i < n; i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&ctrls[i],
- codec, NULL));
- if (err < 0)
- return err;
- }
-
- return 0;
-}
+static struct snd_soc_dai_ops uda134x_dai_ops = {
+ .startup = uda134x_startup,
+ .shutdown = uda134x_shutdown,
+ .hw_params = uda134x_hw_params,
+ .digital_mute = uda134x_mute,
+ .set_sysclk = uda134x_set_dai_sysclk,
+ .set_fmt = uda134x_set_dai_fmt,
+};
struct snd_soc_dai uda134x_dai = {
.name = "UDA134X",
.formats = UDA134X_FORMATS,
},
/* pcm operations */
- .ops = {
- .startup = uda134x_startup,
- .shutdown = uda134x_shutdown,
- .hw_params = uda134x_hw_params,
- .digital_mute = uda134x_mute,
- .set_sysclk = uda134x_set_dai_sysclk,
- .set_fmt = uda134x_set_dai_fmt,
- }
+ .ops = &uda134x_dai_ops,
};
EXPORT_SYMBOL(uda134x_dai);
return -EINVAL;
}
- socdev->codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
- if (socdev->codec == NULL)
+ socdev->card->codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
+ if (socdev->card->codec == NULL)
return ret;
- codec = socdev->codec;
+ codec = socdev->card->codec;
uda134x = kzalloc(sizeof(struct uda134x_priv), GFP_KERNEL);
if (uda134x == NULL)
goto pcm_err;
}
- ret = uda134x_add_controls(codec);
+ switch (pd->model) {
+ case UDA134X_UDA1340:
+ case UDA134X_UDA1344:
+ ret = snd_soc_add_controls(codec, uda1340_snd_controls,
+ ARRAY_SIZE(uda1340_snd_controls));
+ break;
+ case UDA134X_UDA1341:
+ ret = snd_soc_add_controls(codec, uda1341_snd_controls,
+ ARRAY_SIZE(uda1341_snd_controls));
+ break;
+ default:
+ printk(KERN_ERR "%s unkown codec type: %d",
+ __func__, pd->model);
+ return -EINVAL;
+ }
+
if (ret < 0) {
printk(KERN_ERR "UDA134X: failed to register controls\n");
goto pcm_err;
static int uda134x_soc_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
uda134x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
uda134x_set_bias_level(codec, SND_SOC_BIAS_OFF);
pm_message_t state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
uda134x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
uda134x_set_bias_level(codec, SND_SOC_BIAS_OFF);
static int uda134x_soc_resume(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
uda134x_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
uda134x_set_bias_level(codec, SND_SOC_BIAS_ON);
#include <linux/ioctl.h>
#include <linux/delay.h>
#include <linux/i2c.h>
+#include <linux/workqueue.h>
#include <sound/core.h>
#include <sound/control.h>
#include <sound/initval.h>
#include "uda1380.h"
-#define UDA1380_VERSION "0.6"
+static struct work_struct uda1380_work;
+static struct snd_soc_codec *uda1380_codec;
/*
* uda1380 register cache
0x0000, 0x8000, 0x0002, 0x0000,
};
+static unsigned long uda1380_cache_dirty;
+
/*
* read uda1380 register cache
*/
u16 reg, unsigned int value)
{
u16 *cache = codec->reg_cache;
+
if (reg >= UDA1380_CACHEREGNUM)
return;
+ if ((reg >= 0x10) && (cache[reg] != value))
+ set_bit(reg - 0x10, &uda1380_cache_dirty);
cache[reg] = value;
}
(data[0]<<8) | data[1]);
return -EIO;
}
+ if (reg >= 0x10)
+ clear_bit(reg - 0x10, &uda1380_cache_dirty);
return 0;
} else
return -EIO;
#define uda1380_reset(c) uda1380_write(c, UDA1380_RESET, 0)
+static void uda1380_flush_work(struct work_struct *work)
+{
+ int bit, reg;
+
+ for_each_bit(bit, &uda1380_cache_dirty, UDA1380_CACHEREGNUM - 0x10) {
+ reg = 0x10 + bit;
+ pr_debug("uda1380: flush reg %x val %x:\n", reg,
+ uda1380_read_reg_cache(uda1380_codec, reg));
+ uda1380_write(uda1380_codec, reg,
+ uda1380_read_reg_cache(uda1380_codec, reg));
+ clear_bit(bit, &uda1380_cache_dirty);
+ }
+}
+
/* declarations of ALSA reg_elem_REAL controls */
static const char *uda1380_deemp[] = {
"None",
SOC_SINGLE("DAC Polarity inverting Switch", UDA1380_MIXER, 15, 1, 0), /* DA_POL_INV */
SOC_ENUM("Noise Shaper", uda1380_sel_ns_enum), /* SEL_NS */
SOC_ENUM("Digital Mixer Signal Control", uda1380_mix_enum), /* MIX_POS, MIX */
- SOC_SINGLE("Silence Switch", UDA1380_MIXER, 7, 1, 0), /* SILENCE, force DAC output to silence */
SOC_SINGLE("Silence Detector Switch", UDA1380_MIXER, 6, 1, 0), /* SDET_ON */
SOC_ENUM("Silence Detector Setting", uda1380_sdet_enum), /* SD_VALUE */
SOC_ENUM("Oversampling Input", uda1380_os_enum), /* OS */
SOC_SINGLE("AGC Switch", UDA1380_AGC, 0, 1, 0),
};
-/* add non dapm controls */
-static int uda1380_add_controls(struct snd_soc_codec *codec)
-{
- int err, i;
-
- for (i = 0; i < ARRAY_SIZE(uda1380_snd_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&uda1380_snd_controls[i], codec, NULL));
- if (err < 0)
- return err;
- }
-
- return 0;
-}
-
/* Input mux */
static const struct snd_kcontrol_new uda1380_input_mux_control =
SOC_DAPM_ENUM("Route", uda1380_input_sel_enum);
return 0;
}
-static int uda1380_set_dai_fmt(struct snd_soc_dai *codec_dai,
+static int uda1380_set_dai_fmt_both(struct snd_soc_dai *codec_dai,
unsigned int fmt)
{
struct snd_soc_codec *codec = codec_dai->codec;
iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
iface &= ~(R01_SFORI_MASK | R01_SIM | R01_SFORO_MASK);
- /* FIXME: how to select I2S for DATAO and MSB for DATAI correctly? */
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_I2S:
iface |= R01_SFORI_I2S | R01_SFORO_I2S;
break;
case SND_SOC_DAIFMT_LSB:
- iface |= R01_SFORI_LSB16 | R01_SFORO_I2S;
+ iface |= R01_SFORI_LSB16 | R01_SFORO_LSB16;
break;
case SND_SOC_DAIFMT_MSB:
- iface |= R01_SFORI_MSB | R01_SFORO_I2S;
+ iface |= R01_SFORI_MSB | R01_SFORO_MSB;
}
- if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM)
- iface |= R01_SIM;
+ /* DATAI is slave only, so in single-link mode, this has to be slave */
+ if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
+ return -EINVAL;
uda1380_write(codec, UDA1380_IFACE, iface);
return 0;
}
-/*
- * Flush reg cache
- * We can only write the interpolator and decimator registers
- * when the DAI is being clocked by the CPU DAI. It's up to the
- * machine and cpu DAI driver to do this before we are called.
- */
-static int uda1380_pcm_prepare(struct snd_pcm_substream *substream,
- struct snd_soc_dai *dai)
+static int uda1380_set_dai_fmt_playback(struct snd_soc_dai *codec_dai,
+ unsigned int fmt)
{
- struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
- int reg, reg_start, reg_end, clk;
-
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
- reg_start = UDA1380_MVOL;
- reg_end = UDA1380_MIXER;
- } else {
- reg_start = UDA1380_DEC;
- reg_end = UDA1380_AGC;
+ struct snd_soc_codec *codec = codec_dai->codec;
+ int iface;
+
+ /* set up DAI based upon fmt */
+ iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
+ iface &= ~R01_SFORI_MASK;
+
+ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
+ case SND_SOC_DAIFMT_I2S:
+ iface |= R01_SFORI_I2S;
+ break;
+ case SND_SOC_DAIFMT_LSB:
+ iface |= R01_SFORI_LSB16;
+ break;
+ case SND_SOC_DAIFMT_MSB:
+ iface |= R01_SFORI_MSB;
}
- /* FIXME disable DAC_CLK */
- clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
- uda1380_write(codec, UDA1380_CLK, clk & ~R00_DAC_CLK);
+ /* DATAI is slave only, so this has to be slave */
+ if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
+ return -EINVAL;
+
+ uda1380_write(codec, UDA1380_IFACE, iface);
+
+ return 0;
+}
+
+static int uda1380_set_dai_fmt_capture(struct snd_soc_dai *codec_dai,
+ unsigned int fmt)
+{
+ struct snd_soc_codec *codec = codec_dai->codec;
+ int iface;
+
+ /* set up DAI based upon fmt */
+ iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
+ iface &= ~(R01_SIM | R01_SFORO_MASK);
- for (reg = reg_start; reg <= reg_end; reg++) {
- pr_debug("uda1380: flush reg %x val %x:", reg,
- uda1380_read_reg_cache(codec, reg));
- uda1380_write(codec, reg, uda1380_read_reg_cache(codec, reg));
+ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
+ case SND_SOC_DAIFMT_I2S:
+ iface |= R01_SFORO_I2S;
+ break;
+ case SND_SOC_DAIFMT_LSB:
+ iface |= R01_SFORO_LSB16;
+ break;
+ case SND_SOC_DAIFMT_MSB:
+ iface |= R01_SFORO_MSB;
}
- /* FIXME enable DAC_CLK */
- uda1380_write(codec, UDA1380_CLK, clk | R00_DAC_CLK);
+ if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM)
+ iface |= R01_SIM;
+ uda1380_write(codec, UDA1380_IFACE, iface);
+
+ return 0;
+}
+
+static int uda1380_trigger(struct snd_pcm_substream *substream, int cmd,
+ struct snd_soc_dai *dai)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct snd_soc_device *socdev = rtd->socdev;
+ struct snd_soc_codec *codec = socdev->card->codec;
+ int mixer = uda1380_read_reg_cache(codec, UDA1380_MIXER);
+
+ switch (cmd) {
+ case SNDRV_PCM_TRIGGER_START:
+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+ uda1380_write_reg_cache(codec, UDA1380_MIXER,
+ mixer & ~R14_SILENCE);
+ schedule_work(&uda1380_work);
+ break;
+ case SNDRV_PCM_TRIGGER_STOP:
+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+ uda1380_write_reg_cache(codec, UDA1380_MIXER,
+ mixer | R14_SILENCE);
+ schedule_work(&uda1380_work);
+ break;
+ }
return 0;
}
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
/* set WSPLL power and divider if running from this clock */
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
/* shut down WSPLL power if running from this clock */
uda1380_write(codec, UDA1380_CLK, clk);
}
-static int uda1380_mute(struct snd_soc_dai *codec_dai, int mute)
-{
- struct snd_soc_codec *codec = codec_dai->codec;
- u16 mute_reg = uda1380_read_reg_cache(codec, UDA1380_DEEMP) & ~R13_MTM;
-
- /* FIXME: mute(codec,0) is called when the magician clock is already
- * set to WSPLL, but for some unknown reason writing to interpolator
- * registers works only when clocked by SYSCLK */
- u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
- uda1380_write(codec, UDA1380_CLK, ~R00_DAC_CLK & clk);
- if (mute)
- uda1380_write(codec, UDA1380_DEEMP, mute_reg | R13_MTM);
- else
- uda1380_write(codec, UDA1380_DEEMP, mute_reg);
- uda1380_write(codec, UDA1380_CLK, clk);
- return 0;
-}
-
static int uda1380_set_bias_level(struct snd_soc_codec *codec,
enum snd_soc_bias_level level)
{
SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
+static struct snd_soc_dai_ops uda1380_dai_ops = {
+ .hw_params = uda1380_pcm_hw_params,
+ .shutdown = uda1380_pcm_shutdown,
+ .trigger = uda1380_trigger,
+ .set_fmt = uda1380_set_dai_fmt_both,
+};
+
+static struct snd_soc_dai_ops uda1380_dai_ops_playback = {
+ .hw_params = uda1380_pcm_hw_params,
+ .shutdown = uda1380_pcm_shutdown,
+ .trigger = uda1380_trigger,
+ .set_fmt = uda1380_set_dai_fmt_playback,
+};
+
+static struct snd_soc_dai_ops uda1380_dai_ops_capture = {
+ .hw_params = uda1380_pcm_hw_params,
+ .shutdown = uda1380_pcm_shutdown,
+ .trigger = uda1380_trigger,
+ .set_fmt = uda1380_set_dai_fmt_capture,
+};
+
struct snd_soc_dai uda1380_dai[] = {
{
.name = "UDA1380",
.channels_max = 2,
.rates = UDA1380_RATES,
.formats = SNDRV_PCM_FMTBIT_S16_LE,},
- .ops = {
- .hw_params = uda1380_pcm_hw_params,
- .shutdown = uda1380_pcm_shutdown,
- .prepare = uda1380_pcm_prepare,
- .digital_mute = uda1380_mute,
- .set_fmt = uda1380_set_dai_fmt,
- },
+ .ops = &uda1380_dai_ops,
},
{ /* playback only - dual interface */
.name = "UDA1380",
.rates = UDA1380_RATES,
.formats = SNDRV_PCM_FMTBIT_S16_LE,
},
- .ops = {
- .hw_params = uda1380_pcm_hw_params,
- .shutdown = uda1380_pcm_shutdown,
- .prepare = uda1380_pcm_prepare,
- .digital_mute = uda1380_mute,
- .set_fmt = uda1380_set_dai_fmt,
- },
+ .ops = &uda1380_dai_ops_playback,
},
{ /* capture only - dual interface*/
.name = "UDA1380",
.rates = UDA1380_RATES,
.formats = SNDRV_PCM_FMTBIT_S16_LE,
},
- .ops = {
- .hw_params = uda1380_pcm_hw_params,
- .shutdown = uda1380_pcm_shutdown,
- .prepare = uda1380_pcm_prepare,
- .set_fmt = uda1380_set_dai_fmt,
- },
+ .ops = &uda1380_dai_ops_capture,
},
};
EXPORT_SYMBOL_GPL(uda1380_dai);
static int uda1380_suspend(struct platform_device *pdev, pm_message_t state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
uda1380_set_bias_level(codec, SND_SOC_BIAS_OFF);
return 0;
static int uda1380_resume(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int i;
u8 data[2];
u16 *cache = codec->reg_cache;
*/
static int uda1380_init(struct snd_soc_device *socdev, int dac_clk)
{
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int ret = 0;
codec->name = "UDA1380";
codec->reg_cache_step = 1;
uda1380_reset(codec);
+ uda1380_codec = codec;
+ INIT_WORK(&uda1380_work, uda1380_flush_work);
+
/* register pcms */
ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
if (ret < 0) {
}
/* uda1380 init */
- uda1380_add_controls(codec);
+ snd_soc_add_controls(codec, uda1380_snd_controls,
+ ARRAY_SIZE(uda1380_snd_controls));
uda1380_add_widgets(codec);
ret = snd_soc_init_card(socdev);
if (ret < 0) {
{
struct snd_soc_device *socdev = uda1380_socdev;
struct uda1380_setup_data *setup = socdev->codec_data;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int ret;
i2c_set_clientdata(i2c, codec);
struct snd_soc_codec *codec;
int ret;
- pr_info("UDA1380 Audio Codec %s", UDA1380_VERSION);
-
setup = socdev->codec_data;
codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
if (codec == NULL)
return -ENOMEM;
- socdev->codec = codec;
+ socdev->card->codec = codec;
mutex_init(&codec->mutex);
INIT_LIST_HEAD(&codec->dapm_widgets);
INIT_LIST_HEAD(&codec->dapm_paths);
static int uda1380_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
if (codec->control_data)
uda1380_set_bias_level(codec, SND_SOC_BIAS_OFF);
u16 mute;
};
+struct wm8350_jack_data {
+ struct snd_soc_jack *jack;
+ int report;
+};
+
struct wm8350_data {
struct snd_soc_codec codec;
struct wm8350_output out1;
struct wm8350_output out2;
+ struct wm8350_jack_data hpl;
+ struct wm8350_jack_data hpr;
struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
};
{"Beep", NULL, "IN3R PGA"},
};
-static int wm8350_add_controls(struct snd_soc_codec *codec)
-{
- int err, i;
-
- for (i = 0; i < ARRAY_SIZE(wm8350_snd_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&wm8350_snd_controls[i],
- codec, NULL));
- if (err < 0)
- return err;
- }
-
- return 0;
-}
-
static int wm8350_add_widgets(struct snd_soc_codec *codec)
{
int ret;
static int wm8350_suspend(struct platform_device *pdev, pm_message_t state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
wm8350_set_bias_level(codec, SND_SOC_BIAS_OFF);
return 0;
static int wm8350_resume(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
wm8350_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
return 0;
}
+static void wm8350_hp_jack_handler(struct wm8350 *wm8350, int irq, void *data)
+{
+ struct wm8350_data *priv = data;
+ u16 reg;
+ int report;
+ int mask;
+ struct wm8350_jack_data *jack = NULL;
+
+ switch (irq) {
+ case WM8350_IRQ_CODEC_JCK_DET_L:
+ jack = &priv->hpl;
+ mask = WM8350_JACK_L_LVL;
+ break;
+
+ case WM8350_IRQ_CODEC_JCK_DET_R:
+ jack = &priv->hpr;
+ mask = WM8350_JACK_R_LVL;
+ break;
+
+ default:
+ BUG();
+ }
+
+ if (!jack->jack) {
+ dev_warn(wm8350->dev, "Jack interrupt called with no jack\n");
+ return;
+ }
+
+ /* Debounce */
+ msleep(200);
+
+ reg = wm8350_reg_read(wm8350, WM8350_JACK_PIN_STATUS);
+ if (reg & mask)
+ report = jack->report;
+ else
+ report = 0;
+
+ snd_soc_jack_report(jack->jack, report, jack->report);
+}
+
+/**
+ * wm8350_hp_jack_detect - Enable headphone jack detection.
+ *
+ * @codec: WM8350 codec
+ * @which: left or right jack detect signal
+ * @jack: jack to report detection events on
+ * @report: value to report
+ *
+ * Enables the headphone jack detection of the WM8350.
+ */
+int wm8350_hp_jack_detect(struct snd_soc_codec *codec, enum wm8350_jack which,
+ struct snd_soc_jack *jack, int report)
+{
+ struct wm8350_data *priv = codec->private_data;
+ struct wm8350 *wm8350 = codec->control_data;
+ int irq;
+ int ena;
+
+ switch (which) {
+ case WM8350_JDL:
+ priv->hpl.jack = jack;
+ priv->hpl.report = report;
+ irq = WM8350_IRQ_CODEC_JCK_DET_L;
+ ena = WM8350_JDL_ENA;
+ break;
+
+ case WM8350_JDR:
+ priv->hpr.jack = jack;
+ priv->hpr.report = report;
+ irq = WM8350_IRQ_CODEC_JCK_DET_R;
+ ena = WM8350_JDR_ENA;
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ wm8350_set_bits(wm8350, WM8350_POWER_MGMT_4, WM8350_TOCLK_ENA);
+ wm8350_set_bits(wm8350, WM8350_JACK_DETECT, ena);
+
+ /* Sync status */
+ wm8350_hp_jack_handler(wm8350, irq, priv);
+
+ wm8350_unmask_irq(wm8350, irq);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(wm8350_hp_jack_detect);
+
static struct snd_soc_codec *wm8350_codec;
static int wm8350_probe(struct platform_device *pdev)
BUG_ON(!wm8350_codec);
- socdev->codec = wm8350_codec;
- codec = socdev->codec;
+ socdev->card->codec = wm8350_codec;
+ codec = socdev->card->codec;
wm8350 = codec->control_data;
priv = codec->private_data;
wm8350_set_bits(wm8350, WM8350_ROUT2_VOLUME,
WM8350_OUT2_VU | WM8350_OUT2R_MUTE);
+ wm8350_mask_irq(wm8350, WM8350_IRQ_CODEC_JCK_DET_L);
+ wm8350_mask_irq(wm8350, WM8350_IRQ_CODEC_JCK_DET_R);
+ wm8350_register_irq(wm8350, WM8350_IRQ_CODEC_JCK_DET_L,
+ wm8350_hp_jack_handler, priv);
+ wm8350_register_irq(wm8350, WM8350_IRQ_CODEC_JCK_DET_R,
+ wm8350_hp_jack_handler, priv);
+
ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
if (ret < 0) {
dev_err(&pdev->dev, "failed to create pcms\n");
return ret;
}
- wm8350_add_controls(codec);
+ snd_soc_add_controls(codec, wm8350_snd_controls,
+ ARRAY_SIZE(wm8350_snd_controls));
wm8350_add_widgets(codec);
wm8350_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
static int wm8350_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct wm8350 *wm8350 = codec->control_data;
+ struct wm8350_data *priv = codec->private_data;
int ret;
+ wm8350_clear_bits(wm8350, WM8350_JACK_DETECT,
+ WM8350_JDL_ENA | WM8350_JDR_ENA);
+ wm8350_clear_bits(wm8350, WM8350_POWER_MGMT_4, WM8350_TOCLK_ENA);
+
+ wm8350_mask_irq(wm8350, WM8350_IRQ_CODEC_JCK_DET_L);
+ wm8350_mask_irq(wm8350, WM8350_IRQ_CODEC_JCK_DET_R);
+ wm8350_free_irq(wm8350, WM8350_IRQ_CODEC_JCK_DET_L);
+ wm8350_free_irq(wm8350, WM8350_IRQ_CODEC_JCK_DET_R);
+
+ priv->hpl.jack = NULL;
+ priv->hpr.jack = NULL;
+
/* cancel any work waiting to be queued. */
ret = cancel_delayed_work(&codec->delayed_work);
SNDRV_PCM_FMTBIT_S20_3LE |\
SNDRV_PCM_FMTBIT_S24_LE)
+static struct snd_soc_dai_ops wm8350_dai_ops = {
+ .hw_params = wm8350_pcm_hw_params,
+ .digital_mute = wm8350_mute,
+ .trigger = wm8350_pcm_trigger,
+ .set_fmt = wm8350_set_dai_fmt,
+ .set_sysclk = wm8350_set_dai_sysclk,
+ .set_pll = wm8350_set_fll,
+ .set_clkdiv = wm8350_set_clkdiv,
+};
+
struct snd_soc_dai wm8350_dai = {
.name = "WM8350",
.playback = {
.rates = WM8350_RATES,
.formats = WM8350_FORMATS,
},
- .ops = {
- .hw_params = wm8350_pcm_hw_params,
- .digital_mute = wm8350_mute,
- .trigger = wm8350_pcm_trigger,
- .set_fmt = wm8350_set_dai_fmt,
- .set_sysclk = wm8350_set_dai_sysclk,
- .set_pll = wm8350_set_fll,
- .set_clkdiv = wm8350_set_clkdiv,
- },
+ .ops = &wm8350_dai_ops,
};
EXPORT_SYMBOL_GPL(wm8350_dai);
};
EXPORT_SYMBOL_GPL(soc_codec_dev_wm8350);
-static int wm8350_codec_probe(struct platform_device *pdev)
+static __devinit int wm8350_codec_probe(struct platform_device *pdev)
{
struct wm8350 *wm8350 = platform_get_drvdata(pdev);
struct wm8350_data *priv;
extern struct snd_soc_dai wm8350_dai;
extern struct snd_soc_codec_device soc_codec_dev_wm8350;
+enum wm8350_jack {
+ WM8350_JDL = 1,
+ WM8350_JDR = 2,
+};
+
+int wm8350_hp_jack_detect(struct snd_soc_codec *codec, enum wm8350_jack which,
+ struct snd_soc_jack *jack, int report);
+
#endif
--- /dev/null
+/*
+ * wm8400.c -- WM8400 ALSA Soc Audio driver
+ *
+ * Copyright 2008, 2009 Wolfson Microelectronics PLC.
+ * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/pm.h>
+#include <linux/platform_device.h>
+#include <linux/regulator/consumer.h>
+#include <linux/mfd/wm8400-audio.h>
+#include <linux/mfd/wm8400-private.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include <sound/initval.h>
+#include <sound/tlv.h>
+
+#include "wm8400.h"
+
+/* Fake register for internal state */
+#define WM8400_INTDRIVBITS (WM8400_REGISTER_COUNT + 1)
+#define WM8400_INMIXL_PWR 0
+#define WM8400_AINLMUX_PWR 1
+#define WM8400_INMIXR_PWR 2
+#define WM8400_AINRMUX_PWR 3
+
+static struct regulator_bulk_data power[] = {
+ {
+ .supply = "I2S1VDD",
+ },
+ {
+ .supply = "I2S2VDD",
+ },
+ {
+ .supply = "DCVDD",
+ },
+ {
+ .supply = "AVDD",
+ },
+ {
+ .supply = "FLLVDD",
+ },
+ {
+ .supply = "HPVDD",
+ },
+ {
+ .supply = "SPKVDD",
+ },
+};
+
+/* codec private data */
+struct wm8400_priv {
+ struct snd_soc_codec codec;
+ struct wm8400 *wm8400;
+ u16 fake_register;
+ unsigned int sysclk;
+ unsigned int pcmclk;
+ struct work_struct work;
+ int fll_in, fll_out;
+};
+
+static inline unsigned int wm8400_read(struct snd_soc_codec *codec,
+ unsigned int reg)
+{
+ struct wm8400_priv *wm8400 = codec->private_data;
+
+ if (reg == WM8400_INTDRIVBITS)
+ return wm8400->fake_register;
+ else
+ return wm8400_reg_read(wm8400->wm8400, reg);
+}
+
+/*
+ * write to the wm8400 register space
+ */
+static int wm8400_write(struct snd_soc_codec *codec, unsigned int reg,
+ unsigned int value)
+{
+ struct wm8400_priv *wm8400 = codec->private_data;
+
+ if (reg == WM8400_INTDRIVBITS) {
+ wm8400->fake_register = value;
+ return 0;
+ } else
+ return wm8400_set_bits(wm8400->wm8400, reg, 0xffff, value);
+}
+
+static void wm8400_codec_reset(struct snd_soc_codec *codec)
+{
+ struct wm8400_priv *wm8400 = codec->private_data;
+
+ wm8400_reset_codec_reg_cache(wm8400->wm8400);
+}
+
+static const DECLARE_TLV_DB_LINEAR(rec_mix_tlv, -1500, 600);
+
+static const DECLARE_TLV_DB_LINEAR(in_pga_tlv, -1650, 3000);
+
+static const DECLARE_TLV_DB_LINEAR(out_mix_tlv, -2100, 0);
+
+static const DECLARE_TLV_DB_LINEAR(out_pga_tlv, -7300, 600);
+
+static const DECLARE_TLV_DB_LINEAR(out_omix_tlv, -600, 0);
+
+static const DECLARE_TLV_DB_LINEAR(out_dac_tlv, -7163, 0);
+
+static const DECLARE_TLV_DB_LINEAR(in_adc_tlv, -7163, 1763);
+
+static const DECLARE_TLV_DB_LINEAR(out_sidetone_tlv, -3600, 0);
+
+static int wm8400_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ struct soc_mixer_control *mc =
+ (struct soc_mixer_control *)kcontrol->private_value;
+ int reg = mc->reg;
+ int ret;
+ u16 val;
+
+ ret = snd_soc_put_volsw(kcontrol, ucontrol);
+ if (ret < 0)
+ return ret;
+
+ /* now hit the volume update bits (always bit 8) */
+ val = wm8400_read(codec, reg);
+ return wm8400_write(codec, reg, val | 0x0100);
+}
+
+#define WM8400_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert, tlv_array) \
+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
+ .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
+ SNDRV_CTL_ELEM_ACCESS_READWRITE,\
+ .tlv.p = (tlv_array), \
+ .info = snd_soc_info_volsw, \
+ .get = snd_soc_get_volsw, .put = wm8400_outpga_put_volsw_vu, \
+ .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
+
+
+static const char *wm8400_digital_sidetone[] =
+ {"None", "Left ADC", "Right ADC", "Reserved"};
+
+static const struct soc_enum wm8400_left_digital_sidetone_enum =
+SOC_ENUM_SINGLE(WM8400_DIGITAL_SIDE_TONE,
+ WM8400_ADC_TO_DACL_SHIFT, 2, wm8400_digital_sidetone);
+
+static const struct soc_enum wm8400_right_digital_sidetone_enum =
+SOC_ENUM_SINGLE(WM8400_DIGITAL_SIDE_TONE,
+ WM8400_ADC_TO_DACR_SHIFT, 2, wm8400_digital_sidetone);
+
+static const char *wm8400_adcmode[] =
+ {"Hi-fi mode", "Voice mode 1", "Voice mode 2", "Voice mode 3"};
+
+static const struct soc_enum wm8400_right_adcmode_enum =
+SOC_ENUM_SINGLE(WM8400_ADC_CTRL, WM8400_ADC_HPF_CUT_SHIFT, 3, wm8400_adcmode);
+
+static const struct snd_kcontrol_new wm8400_snd_controls[] = {
+/* INMIXL */
+SOC_SINGLE("LIN12 PGA Boost", WM8400_INPUT_MIXER3, WM8400_L12MNBST_SHIFT,
+ 1, 0),
+SOC_SINGLE("LIN34 PGA Boost", WM8400_INPUT_MIXER3, WM8400_L34MNBST_SHIFT,
+ 1, 0),
+/* INMIXR */
+SOC_SINGLE("RIN12 PGA Boost", WM8400_INPUT_MIXER3, WM8400_R12MNBST_SHIFT,
+ 1, 0),
+SOC_SINGLE("RIN34 PGA Boost", WM8400_INPUT_MIXER3, WM8400_R34MNBST_SHIFT,
+ 1, 0),
+
+/* LOMIX */
+SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8400_OUTPUT_MIXER3,
+ WM8400_LLI3LOVOL_SHIFT, 7, 0, out_mix_tlv),
+SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8400_OUTPUT_MIXER3,
+ WM8400_LR12LOVOL_SHIFT, 7, 0, out_mix_tlv),
+SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8400_OUTPUT_MIXER3,
+ WM8400_LL12LOVOL_SHIFT, 7, 0, out_mix_tlv),
+SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8400_OUTPUT_MIXER5,
+ WM8400_LRI3LOVOL_SHIFT, 7, 0, out_mix_tlv),
+SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8400_OUTPUT_MIXER5,
+ WM8400_LRBLOVOL_SHIFT, 7, 0, out_mix_tlv),
+SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8400_OUTPUT_MIXER5,
+ WM8400_LRBLOVOL_SHIFT, 7, 0, out_mix_tlv),
+
+/* ROMIX */
+SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8400_OUTPUT_MIXER4,
+ WM8400_RRI3ROVOL_SHIFT, 7, 0, out_mix_tlv),
+SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8400_OUTPUT_MIXER4,
+ WM8400_RL12ROVOL_SHIFT, 7, 0, out_mix_tlv),
+SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8400_OUTPUT_MIXER4,
+ WM8400_RR12ROVOL_SHIFT, 7, 0, out_mix_tlv),
+SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8400_OUTPUT_MIXER6,
+ WM8400_RLI3ROVOL_SHIFT, 7, 0, out_mix_tlv),
+SOC_SINGLE_TLV("ROMIX AINLMUX Bypass Volume", WM8400_OUTPUT_MIXER6,
+ WM8400_RLBROVOL_SHIFT, 7, 0, out_mix_tlv),
+SOC_SINGLE_TLV("ROMIX AINRMUX Bypass Volume", WM8400_OUTPUT_MIXER6,
+ WM8400_RRBROVOL_SHIFT, 7, 0, out_mix_tlv),
+
+/* LOUT */
+WM8400_OUTPGA_SINGLE_R_TLV("LOUT Volume", WM8400_LEFT_OUTPUT_VOLUME,
+ WM8400_LOUTVOL_SHIFT, WM8400_LOUTVOL_MASK, 0, out_pga_tlv),
+SOC_SINGLE("LOUT ZC", WM8400_LEFT_OUTPUT_VOLUME, WM8400_LOZC_SHIFT, 1, 0),
+
+/* ROUT */
+WM8400_OUTPGA_SINGLE_R_TLV("ROUT Volume", WM8400_RIGHT_OUTPUT_VOLUME,
+ WM8400_ROUTVOL_SHIFT, WM8400_ROUTVOL_MASK, 0, out_pga_tlv),
+SOC_SINGLE("ROUT ZC", WM8400_RIGHT_OUTPUT_VOLUME, WM8400_ROZC_SHIFT, 1, 0),
+
+/* LOPGA */
+WM8400_OUTPGA_SINGLE_R_TLV("LOPGA Volume", WM8400_LEFT_OPGA_VOLUME,
+ WM8400_LOPGAVOL_SHIFT, WM8400_LOPGAVOL_MASK, 0, out_pga_tlv),
+SOC_SINGLE("LOPGA ZC Switch", WM8400_LEFT_OPGA_VOLUME,
+ WM8400_LOPGAZC_SHIFT, 1, 0),
+
+/* ROPGA */
+WM8400_OUTPGA_SINGLE_R_TLV("ROPGA Volume", WM8400_RIGHT_OPGA_VOLUME,
+ WM8400_ROPGAVOL_SHIFT, WM8400_ROPGAVOL_MASK, 0, out_pga_tlv),
+SOC_SINGLE("ROPGA ZC Switch", WM8400_RIGHT_OPGA_VOLUME,
+ WM8400_ROPGAZC_SHIFT, 1, 0),
+
+SOC_SINGLE("LON Mute Switch", WM8400_LINE_OUTPUTS_VOLUME,
+ WM8400_LONMUTE_SHIFT, 1, 0),
+SOC_SINGLE("LOP Mute Switch", WM8400_LINE_OUTPUTS_VOLUME,
+ WM8400_LOPMUTE_SHIFT, 1, 0),
+SOC_SINGLE("LOP Attenuation Switch", WM8400_LINE_OUTPUTS_VOLUME,
+ WM8400_LOATTN_SHIFT, 1, 0),
+SOC_SINGLE("RON Mute Switch", WM8400_LINE_OUTPUTS_VOLUME,
+ WM8400_RONMUTE_SHIFT, 1, 0),
+SOC_SINGLE("ROP Mute Switch", WM8400_LINE_OUTPUTS_VOLUME,
+ WM8400_ROPMUTE_SHIFT, 1, 0),
+SOC_SINGLE("ROP Attenuation Switch", WM8400_LINE_OUTPUTS_VOLUME,
+ WM8400_ROATTN_SHIFT, 1, 0),
+
+SOC_SINGLE("OUT3 Mute Switch", WM8400_OUT3_4_VOLUME,
+ WM8400_OUT3MUTE_SHIFT, 1, 0),
+SOC_SINGLE("OUT3 Attenuation Switch", WM8400_OUT3_4_VOLUME,
+ WM8400_OUT3ATTN_SHIFT, 1, 0),
+
+SOC_SINGLE("OUT4 Mute Switch", WM8400_OUT3_4_VOLUME,
+ WM8400_OUT4MUTE_SHIFT, 1, 0),
+SOC_SINGLE("OUT4 Attenuation Switch", WM8400_OUT3_4_VOLUME,
+ WM8400_OUT4ATTN_SHIFT, 1, 0),
+
+SOC_SINGLE("Speaker Mode Switch", WM8400_CLASSD1,
+ WM8400_CDMODE_SHIFT, 1, 0),
+
+SOC_SINGLE("Speaker Output Attenuation Volume", WM8400_SPEAKER_VOLUME,
+ WM8400_SPKATTN_SHIFT, WM8400_SPKATTN_MASK, 0),
+SOC_SINGLE("Speaker DC Boost Volume", WM8400_CLASSD3,
+ WM8400_DCGAIN_SHIFT, 6, 0),
+SOC_SINGLE("Speaker AC Boost Volume", WM8400_CLASSD3,
+ WM8400_ACGAIN_SHIFT, 6, 0),
+
+WM8400_OUTPGA_SINGLE_R_TLV("Left DAC Digital Volume",
+ WM8400_LEFT_DAC_DIGITAL_VOLUME, WM8400_DACL_VOL_SHIFT,
+ 127, 0, out_dac_tlv),
+
+WM8400_OUTPGA_SINGLE_R_TLV("Right DAC Digital Volume",
+ WM8400_RIGHT_DAC_DIGITAL_VOLUME, WM8400_DACR_VOL_SHIFT,
+ 127, 0, out_dac_tlv),
+
+SOC_ENUM("Left Digital Sidetone", wm8400_left_digital_sidetone_enum),
+SOC_ENUM("Right Digital Sidetone", wm8400_right_digital_sidetone_enum),
+
+SOC_SINGLE_TLV("Left Digital Sidetone Volume", WM8400_DIGITAL_SIDE_TONE,
+ WM8400_ADCL_DAC_SVOL_SHIFT, 15, 0, out_sidetone_tlv),
+SOC_SINGLE_TLV("Right Digital Sidetone Volume", WM8400_DIGITAL_SIDE_TONE,
+ WM8400_ADCR_DAC_SVOL_SHIFT, 15, 0, out_sidetone_tlv),
+
+SOC_SINGLE("ADC Digital High Pass Filter Switch", WM8400_ADC_CTRL,
+ WM8400_ADC_HPF_ENA_SHIFT, 1, 0),
+
+SOC_ENUM("ADC HPF Mode", wm8400_right_adcmode_enum),
+
+WM8400_OUTPGA_SINGLE_R_TLV("Left ADC Digital Volume",
+ WM8400_LEFT_ADC_DIGITAL_VOLUME,
+ WM8400_ADCL_VOL_SHIFT,
+ WM8400_ADCL_VOL_MASK,
+ 0,
+ in_adc_tlv),
+
+WM8400_OUTPGA_SINGLE_R_TLV("Right ADC Digital Volume",
+ WM8400_RIGHT_ADC_DIGITAL_VOLUME,
+ WM8400_ADCR_VOL_SHIFT,
+ WM8400_ADCR_VOL_MASK,
+ 0,
+ in_adc_tlv),
+
+WM8400_OUTPGA_SINGLE_R_TLV("LIN12 Volume",
+ WM8400_LEFT_LINE_INPUT_1_2_VOLUME,
+ WM8400_LIN12VOL_SHIFT,
+ WM8400_LIN12VOL_MASK,
+ 0,
+ in_pga_tlv),
+
+SOC_SINGLE("LIN12 ZC Switch", WM8400_LEFT_LINE_INPUT_1_2_VOLUME,
+ WM8400_LI12ZC_SHIFT, 1, 0),
+
+SOC_SINGLE("LIN12 Mute Switch", WM8400_LEFT_LINE_INPUT_1_2_VOLUME,
+ WM8400_LI12MUTE_SHIFT, 1, 0),
+
+WM8400_OUTPGA_SINGLE_R_TLV("LIN34 Volume",
+ WM8400_LEFT_LINE_INPUT_3_4_VOLUME,
+ WM8400_LIN34VOL_SHIFT,
+ WM8400_LIN34VOL_MASK,
+ 0,
+ in_pga_tlv),
+
+SOC_SINGLE("LIN34 ZC Switch", WM8400_LEFT_LINE_INPUT_3_4_VOLUME,
+ WM8400_LI34ZC_SHIFT, 1, 0),
+
+SOC_SINGLE("LIN34 Mute Switch", WM8400_LEFT_LINE_INPUT_3_4_VOLUME,
+ WM8400_LI34MUTE_SHIFT, 1, 0),
+
+WM8400_OUTPGA_SINGLE_R_TLV("RIN12 Volume",
+ WM8400_RIGHT_LINE_INPUT_1_2_VOLUME,
+ WM8400_RIN12VOL_SHIFT,
+ WM8400_RIN12VOL_MASK,
+ 0,
+ in_pga_tlv),
+
+SOC_SINGLE("RIN12 ZC Switch", WM8400_RIGHT_LINE_INPUT_1_2_VOLUME,
+ WM8400_RI12ZC_SHIFT, 1, 0),
+
+SOC_SINGLE("RIN12 Mute Switch", WM8400_RIGHT_LINE_INPUT_1_2_VOLUME,
+ WM8400_RI12MUTE_SHIFT, 1, 0),
+
+WM8400_OUTPGA_SINGLE_R_TLV("RIN34 Volume",
+ WM8400_RIGHT_LINE_INPUT_3_4_VOLUME,
+ WM8400_RIN34VOL_SHIFT,
+ WM8400_RIN34VOL_MASK,
+ 0,
+ in_pga_tlv),
+
+SOC_SINGLE("RIN34 ZC Switch", WM8400_RIGHT_LINE_INPUT_3_4_VOLUME,
+ WM8400_RI34ZC_SHIFT, 1, 0),
+
+SOC_SINGLE("RIN34 Mute Switch", WM8400_RIGHT_LINE_INPUT_3_4_VOLUME,
+ WM8400_RI34MUTE_SHIFT, 1, 0),
+
+};
+
+/* add non dapm controls */
+static int wm8400_add_controls(struct snd_soc_codec *codec)
+{
+ return snd_soc_add_controls(codec, wm8400_snd_controls,
+ ARRAY_SIZE(wm8400_snd_controls));
+}
+
+/*
+ * _DAPM_ Controls
+ */
+
+static int inmixer_event (struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ u16 reg, fakepower;
+
+ reg = wm8400_read(w->codec, WM8400_POWER_MANAGEMENT_2);
+ fakepower = wm8400_read(w->codec, WM8400_INTDRIVBITS);
+
+ if (fakepower & ((1 << WM8400_INMIXL_PWR) |
+ (1 << WM8400_AINLMUX_PWR))) {
+ reg |= WM8400_AINL_ENA;
+ } else {
+ reg &= ~WM8400_AINL_ENA;
+ }
+
+ if (fakepower & ((1 << WM8400_INMIXR_PWR) |
+ (1 << WM8400_AINRMUX_PWR))) {
+ reg |= WM8400_AINR_ENA;
+ } else {
+ reg &= ~WM8400_AINL_ENA;
+ }
+ wm8400_write(w->codec, WM8400_POWER_MANAGEMENT_2, reg);
+
+ return 0;
+}
+
+static int outmixer_event (struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol * kcontrol, int event)
+{
+ struct soc_mixer_control *mc =
+ (struct soc_mixer_control *)kcontrol->private_value;
+ u32 reg_shift = mc->shift;
+ int ret = 0;
+ u16 reg;
+
+ switch (reg_shift) {
+ case WM8400_SPEAKER_MIXER | (WM8400_LDSPK << 8) :
+ reg = wm8400_read(w->codec, WM8400_OUTPUT_MIXER1);
+ if (reg & WM8400_LDLO) {
+ printk(KERN_WARNING
+ "Cannot set as Output Mixer 1 LDLO Set\n");
+ ret = -1;
+ }
+ break;
+ case WM8400_SPEAKER_MIXER | (WM8400_RDSPK << 8):
+ reg = wm8400_read(w->codec, WM8400_OUTPUT_MIXER2);
+ if (reg & WM8400_RDRO) {
+ printk(KERN_WARNING
+ "Cannot set as Output Mixer 2 RDRO Set\n");
+ ret = -1;
+ }
+ break;
+ case WM8400_OUTPUT_MIXER1 | (WM8400_LDLO << 8):
+ reg = wm8400_read(w->codec, WM8400_SPEAKER_MIXER);
+ if (reg & WM8400_LDSPK) {
+ printk(KERN_WARNING
+ "Cannot set as Speaker Mixer LDSPK Set\n");
+ ret = -1;
+ }
+ break;
+ case WM8400_OUTPUT_MIXER2 | (WM8400_RDRO << 8):
+ reg = wm8400_read(w->codec, WM8400_SPEAKER_MIXER);
+ if (reg & WM8400_RDSPK) {
+ printk(KERN_WARNING
+ "Cannot set as Speaker Mixer RDSPK Set\n");
+ ret = -1;
+ }
+ break;
+ }
+
+ return ret;
+}
+
+/* INMIX dB values */
+static const unsigned int in_mix_tlv[] = {
+ TLV_DB_RANGE_HEAD(1),
+ 0,7, TLV_DB_LINEAR_ITEM(-1200, 600),
+};
+
+/* Left In PGA Connections */
+static const struct snd_kcontrol_new wm8400_dapm_lin12_pga_controls[] = {
+SOC_DAPM_SINGLE("LIN1 Switch", WM8400_INPUT_MIXER2, WM8400_LMN1_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("LIN2 Switch", WM8400_INPUT_MIXER2, WM8400_LMP2_SHIFT, 1, 0),
+};
+
+static const struct snd_kcontrol_new wm8400_dapm_lin34_pga_controls[] = {
+SOC_DAPM_SINGLE("LIN3 Switch", WM8400_INPUT_MIXER2, WM8400_LMN3_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("LIN4 Switch", WM8400_INPUT_MIXER2, WM8400_LMP4_SHIFT, 1, 0),
+};
+
+/* Right In PGA Connections */
+static const struct snd_kcontrol_new wm8400_dapm_rin12_pga_controls[] = {
+SOC_DAPM_SINGLE("RIN1 Switch", WM8400_INPUT_MIXER2, WM8400_RMN1_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("RIN2 Switch", WM8400_INPUT_MIXER2, WM8400_RMP2_SHIFT, 1, 0),
+};
+
+static const struct snd_kcontrol_new wm8400_dapm_rin34_pga_controls[] = {
+SOC_DAPM_SINGLE("RIN3 Switch", WM8400_INPUT_MIXER2, WM8400_RMN3_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("RIN4 Switch", WM8400_INPUT_MIXER2, WM8400_RMP4_SHIFT, 1, 0),
+};
+
+/* INMIXL */
+static const struct snd_kcontrol_new wm8400_dapm_inmixl_controls[] = {
+SOC_DAPM_SINGLE_TLV("Record Left Volume", WM8400_INPUT_MIXER3,
+ WM8400_LDBVOL_SHIFT, WM8400_LDBVOL_MASK, 0, in_mix_tlv),
+SOC_DAPM_SINGLE_TLV("LIN2 Volume", WM8400_INPUT_MIXER5, WM8400_LI2BVOL_SHIFT,
+ 7, 0, in_mix_tlv),
+SOC_DAPM_SINGLE("LINPGA12 Switch", WM8400_INPUT_MIXER3, WM8400_L12MNB_SHIFT,
+ 1, 0),
+SOC_DAPM_SINGLE("LINPGA34 Switch", WM8400_INPUT_MIXER3, WM8400_L34MNB_SHIFT,
+ 1, 0),
+};
+
+/* INMIXR */
+static const struct snd_kcontrol_new wm8400_dapm_inmixr_controls[] = {
+SOC_DAPM_SINGLE_TLV("Record Right Volume", WM8400_INPUT_MIXER4,
+ WM8400_RDBVOL_SHIFT, WM8400_RDBVOL_MASK, 0, in_mix_tlv),
+SOC_DAPM_SINGLE_TLV("RIN2 Volume", WM8400_INPUT_MIXER6, WM8400_RI2BVOL_SHIFT,
+ 7, 0, in_mix_tlv),
+SOC_DAPM_SINGLE("RINPGA12 Switch", WM8400_INPUT_MIXER3, WM8400_L12MNB_SHIFT,
+ 1, 0),
+SOC_DAPM_SINGLE("RINPGA34 Switch", WM8400_INPUT_MIXER3, WM8400_L34MNB_SHIFT,
+ 1, 0),
+};
+
+/* AINLMUX */
+static const char *wm8400_ainlmux[] =
+ {"INMIXL Mix", "RXVOICE Mix", "DIFFINL Mix"};
+
+static const struct soc_enum wm8400_ainlmux_enum =
+SOC_ENUM_SINGLE( WM8400_INPUT_MIXER1, WM8400_AINLMODE_SHIFT,
+ ARRAY_SIZE(wm8400_ainlmux), wm8400_ainlmux);
+
+static const struct snd_kcontrol_new wm8400_dapm_ainlmux_controls =
+SOC_DAPM_ENUM("Route", wm8400_ainlmux_enum);
+
+/* DIFFINL */
+
+/* AINRMUX */
+static const char *wm8400_ainrmux[] =
+ {"INMIXR Mix", "RXVOICE Mix", "DIFFINR Mix"};
+
+static const struct soc_enum wm8400_ainrmux_enum =
+SOC_ENUM_SINGLE( WM8400_INPUT_MIXER1, WM8400_AINRMODE_SHIFT,
+ ARRAY_SIZE(wm8400_ainrmux), wm8400_ainrmux);
+
+static const struct snd_kcontrol_new wm8400_dapm_ainrmux_controls =
+SOC_DAPM_ENUM("Route", wm8400_ainrmux_enum);
+
+/* RXVOICE */
+static const struct snd_kcontrol_new wm8400_dapm_rxvoice_controls[] = {
+SOC_DAPM_SINGLE_TLV("LIN4/RXN", WM8400_INPUT_MIXER5, WM8400_LR4BVOL_SHIFT,
+ WM8400_LR4BVOL_MASK, 0, in_mix_tlv),
+SOC_DAPM_SINGLE_TLV("RIN4/RXP", WM8400_INPUT_MIXER6, WM8400_RL4BVOL_SHIFT,
+ WM8400_RL4BVOL_MASK, 0, in_mix_tlv),
+};
+
+/* LOMIX */
+static const struct snd_kcontrol_new wm8400_dapm_lomix_controls[] = {
+SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8400_OUTPUT_MIXER1,
+ WM8400_LRBLO_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("LOMIX Left ADC Bypass Switch", WM8400_OUTPUT_MIXER1,
+ WM8400_LLBLO_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("LOMIX RIN3 Bypass Switch", WM8400_OUTPUT_MIXER1,
+ WM8400_LRI3LO_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("LOMIX LIN3 Bypass Switch", WM8400_OUTPUT_MIXER1,
+ WM8400_LLI3LO_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("LOMIX RIN12 PGA Bypass Switch", WM8400_OUTPUT_MIXER1,
+ WM8400_LR12LO_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("LOMIX LIN12 PGA Bypass Switch", WM8400_OUTPUT_MIXER1,
+ WM8400_LL12LO_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("LOMIX Left DAC Switch", WM8400_OUTPUT_MIXER1,
+ WM8400_LDLO_SHIFT, 1, 0),
+};
+
+/* ROMIX */
+static const struct snd_kcontrol_new wm8400_dapm_romix_controls[] = {
+SOC_DAPM_SINGLE("ROMIX Left ADC Bypass Switch", WM8400_OUTPUT_MIXER2,
+ WM8400_RLBRO_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("ROMIX Right ADC Bypass Switch", WM8400_OUTPUT_MIXER2,
+ WM8400_RRBRO_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("ROMIX LIN3 Bypass Switch", WM8400_OUTPUT_MIXER2,
+ WM8400_RLI3RO_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("ROMIX RIN3 Bypass Switch", WM8400_OUTPUT_MIXER2,
+ WM8400_RRI3RO_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("ROMIX LIN12 PGA Bypass Switch", WM8400_OUTPUT_MIXER2,
+ WM8400_RL12RO_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("ROMIX RIN12 PGA Bypass Switch", WM8400_OUTPUT_MIXER2,
+ WM8400_RR12RO_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("ROMIX Right DAC Switch", WM8400_OUTPUT_MIXER2,
+ WM8400_RDRO_SHIFT, 1, 0),
+};
+
+/* LONMIX */
+static const struct snd_kcontrol_new wm8400_dapm_lonmix_controls[] = {
+SOC_DAPM_SINGLE("LONMIX Left Mixer PGA Switch", WM8400_LINE_MIXER1,
+ WM8400_LLOPGALON_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("LONMIX Right Mixer PGA Switch", WM8400_LINE_MIXER1,
+ WM8400_LROPGALON_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("LONMIX Inverted LOP Switch", WM8400_LINE_MIXER1,
+ WM8400_LOPLON_SHIFT, 1, 0),
+};
+
+/* LOPMIX */
+static const struct snd_kcontrol_new wm8400_dapm_lopmix_controls[] = {
+SOC_DAPM_SINGLE("LOPMIX Right Mic Bypass Switch", WM8400_LINE_MIXER1,
+ WM8400_LR12LOP_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("LOPMIX Left Mic Bypass Switch", WM8400_LINE_MIXER1,
+ WM8400_LL12LOP_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("LOPMIX Left Mixer PGA Switch", WM8400_LINE_MIXER1,
+ WM8400_LLOPGALOP_SHIFT, 1, 0),
+};
+
+/* RONMIX */
+static const struct snd_kcontrol_new wm8400_dapm_ronmix_controls[] = {
+SOC_DAPM_SINGLE("RONMIX Right Mixer PGA Switch", WM8400_LINE_MIXER2,
+ WM8400_RROPGARON_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("RONMIX Left Mixer PGA Switch", WM8400_LINE_MIXER2,
+ WM8400_RLOPGARON_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("RONMIX Inverted ROP Switch", WM8400_LINE_MIXER2,
+ WM8400_ROPRON_SHIFT, 1, 0),
+};
+
+/* ROPMIX */
+static const struct snd_kcontrol_new wm8400_dapm_ropmix_controls[] = {
+SOC_DAPM_SINGLE("ROPMIX Left Mic Bypass Switch", WM8400_LINE_MIXER2,
+ WM8400_RL12ROP_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("ROPMIX Right Mic Bypass Switch", WM8400_LINE_MIXER2,
+ WM8400_RR12ROP_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("ROPMIX Right Mixer PGA Switch", WM8400_LINE_MIXER2,
+ WM8400_RROPGAROP_SHIFT, 1, 0),
+};
+
+/* OUT3MIX */
+static const struct snd_kcontrol_new wm8400_dapm_out3mix_controls[] = {
+SOC_DAPM_SINGLE("OUT3MIX LIN4/RXP Bypass Switch", WM8400_OUT3_4_MIXER,
+ WM8400_LI4O3_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("OUT3MIX Left Out PGA Switch", WM8400_OUT3_4_MIXER,
+ WM8400_LPGAO3_SHIFT, 1, 0),
+};
+
+/* OUT4MIX */
+static const struct snd_kcontrol_new wm8400_dapm_out4mix_controls[] = {
+SOC_DAPM_SINGLE("OUT4MIX Right Out PGA Switch", WM8400_OUT3_4_MIXER,
+ WM8400_RPGAO4_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("OUT4MIX RIN4/RXP Bypass Switch", WM8400_OUT3_4_MIXER,
+ WM8400_RI4O4_SHIFT, 1, 0),
+};
+
+/* SPKMIX */
+static const struct snd_kcontrol_new wm8400_dapm_spkmix_controls[] = {
+SOC_DAPM_SINGLE("SPKMIX LIN2 Bypass Switch", WM8400_SPEAKER_MIXER,
+ WM8400_LI2SPK_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("SPKMIX LADC Bypass Switch", WM8400_SPEAKER_MIXER,
+ WM8400_LB2SPK_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("SPKMIX Left Mixer PGA Switch", WM8400_SPEAKER_MIXER,
+ WM8400_LOPGASPK_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("SPKMIX Left DAC Switch", WM8400_SPEAKER_MIXER,
+ WM8400_LDSPK_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("SPKMIX Right DAC Switch", WM8400_SPEAKER_MIXER,
+ WM8400_RDSPK_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("SPKMIX Right Mixer PGA Switch", WM8400_SPEAKER_MIXER,
+ WM8400_ROPGASPK_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("SPKMIX RADC Bypass Switch", WM8400_SPEAKER_MIXER,
+ WM8400_RL12ROP_SHIFT, 1, 0),
+SOC_DAPM_SINGLE("SPKMIX RIN2 Bypass Switch", WM8400_SPEAKER_MIXER,
+ WM8400_RI2SPK_SHIFT, 1, 0),
+};
+
+static const struct snd_soc_dapm_widget wm8400_dapm_widgets[] = {
+/* Input Side */
+/* Input Lines */
+SND_SOC_DAPM_INPUT("LIN1"),
+SND_SOC_DAPM_INPUT("LIN2"),
+SND_SOC_DAPM_INPUT("LIN3"),
+SND_SOC_DAPM_INPUT("LIN4/RXN"),
+SND_SOC_DAPM_INPUT("RIN3"),
+SND_SOC_DAPM_INPUT("RIN4/RXP"),
+SND_SOC_DAPM_INPUT("RIN1"),
+SND_SOC_DAPM_INPUT("RIN2"),
+SND_SOC_DAPM_INPUT("Internal ADC Source"),
+
+/* DACs */
+SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8400_POWER_MANAGEMENT_2,
+ WM8400_ADCL_ENA_SHIFT, 0),
+SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8400_POWER_MANAGEMENT_2,
+ WM8400_ADCR_ENA_SHIFT, 0),
+
+/* Input PGAs */
+SND_SOC_DAPM_MIXER("LIN12 PGA", WM8400_POWER_MANAGEMENT_2,
+ WM8400_LIN12_ENA_SHIFT,
+ 0, &wm8400_dapm_lin12_pga_controls[0],
+ ARRAY_SIZE(wm8400_dapm_lin12_pga_controls)),
+SND_SOC_DAPM_MIXER("LIN34 PGA", WM8400_POWER_MANAGEMENT_2,
+ WM8400_LIN34_ENA_SHIFT,
+ 0, &wm8400_dapm_lin34_pga_controls[0],
+ ARRAY_SIZE(wm8400_dapm_lin34_pga_controls)),
+SND_SOC_DAPM_MIXER("RIN12 PGA", WM8400_POWER_MANAGEMENT_2,
+ WM8400_RIN12_ENA_SHIFT,
+ 0, &wm8400_dapm_rin12_pga_controls[0],
+ ARRAY_SIZE(wm8400_dapm_rin12_pga_controls)),
+SND_SOC_DAPM_MIXER("RIN34 PGA", WM8400_POWER_MANAGEMENT_2,
+ WM8400_RIN34_ENA_SHIFT,
+ 0, &wm8400_dapm_rin34_pga_controls[0],
+ ARRAY_SIZE(wm8400_dapm_rin34_pga_controls)),
+
+/* INMIXL */
+SND_SOC_DAPM_MIXER_E("INMIXL", WM8400_INTDRIVBITS, WM8400_INMIXL_PWR, 0,
+ &wm8400_dapm_inmixl_controls[0],
+ ARRAY_SIZE(wm8400_dapm_inmixl_controls),
+ inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+
+/* AINLMUX */
+SND_SOC_DAPM_MUX_E("AILNMUX", WM8400_INTDRIVBITS, WM8400_AINLMUX_PWR, 0,
+ &wm8400_dapm_ainlmux_controls, inmixer_event,
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+
+/* INMIXR */
+SND_SOC_DAPM_MIXER_E("INMIXR", WM8400_INTDRIVBITS, WM8400_INMIXR_PWR, 0,
+ &wm8400_dapm_inmixr_controls[0],
+ ARRAY_SIZE(wm8400_dapm_inmixr_controls),
+ inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+
+/* AINRMUX */
+SND_SOC_DAPM_MUX_E("AIRNMUX", WM8400_INTDRIVBITS, WM8400_AINRMUX_PWR, 0,
+ &wm8400_dapm_ainrmux_controls, inmixer_event,
+ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
+
+/* Output Side */
+/* DACs */
+SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8400_POWER_MANAGEMENT_3,
+ WM8400_DACL_ENA_SHIFT, 0),
+SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8400_POWER_MANAGEMENT_3,
+ WM8400_DACR_ENA_SHIFT, 0),
+
+/* LOMIX */
+SND_SOC_DAPM_MIXER_E("LOMIX", WM8400_POWER_MANAGEMENT_3,
+ WM8400_LOMIX_ENA_SHIFT,
+ 0, &wm8400_dapm_lomix_controls[0],
+ ARRAY_SIZE(wm8400_dapm_lomix_controls),
+ outmixer_event, SND_SOC_DAPM_PRE_REG),
+
+/* LONMIX */
+SND_SOC_DAPM_MIXER("LONMIX", WM8400_POWER_MANAGEMENT_3, WM8400_LON_ENA_SHIFT,
+ 0, &wm8400_dapm_lonmix_controls[0],
+ ARRAY_SIZE(wm8400_dapm_lonmix_controls)),
+
+/* LOPMIX */
+SND_SOC_DAPM_MIXER("LOPMIX", WM8400_POWER_MANAGEMENT_3, WM8400_LOP_ENA_SHIFT,
+ 0, &wm8400_dapm_lopmix_controls[0],
+ ARRAY_SIZE(wm8400_dapm_lopmix_controls)),
+
+/* OUT3MIX */
+SND_SOC_DAPM_MIXER("OUT3MIX", WM8400_POWER_MANAGEMENT_1, WM8400_OUT3_ENA_SHIFT,
+ 0, &wm8400_dapm_out3mix_controls[0],
+ ARRAY_SIZE(wm8400_dapm_out3mix_controls)),
+
+/* SPKMIX */
+SND_SOC_DAPM_MIXER_E("SPKMIX", WM8400_POWER_MANAGEMENT_1, WM8400_SPK_ENA_SHIFT,
+ 0, &wm8400_dapm_spkmix_controls[0],
+ ARRAY_SIZE(wm8400_dapm_spkmix_controls), outmixer_event,
+ SND_SOC_DAPM_PRE_REG),
+
+/* OUT4MIX */
+SND_SOC_DAPM_MIXER("OUT4MIX", WM8400_POWER_MANAGEMENT_1, WM8400_OUT4_ENA_SHIFT,
+ 0, &wm8400_dapm_out4mix_controls[0],
+ ARRAY_SIZE(wm8400_dapm_out4mix_controls)),
+
+/* ROPMIX */
+SND_SOC_DAPM_MIXER("ROPMIX", WM8400_POWER_MANAGEMENT_3, WM8400_ROP_ENA_SHIFT,
+ 0, &wm8400_dapm_ropmix_controls[0],
+ ARRAY_SIZE(wm8400_dapm_ropmix_controls)),
+
+/* RONMIX */
+SND_SOC_DAPM_MIXER("RONMIX", WM8400_POWER_MANAGEMENT_3, WM8400_RON_ENA_SHIFT,
+ 0, &wm8400_dapm_ronmix_controls[0],
+ ARRAY_SIZE(wm8400_dapm_ronmix_controls)),
+
+/* ROMIX */
+SND_SOC_DAPM_MIXER_E("ROMIX", WM8400_POWER_MANAGEMENT_3,
+ WM8400_ROMIX_ENA_SHIFT,
+ 0, &wm8400_dapm_romix_controls[0],
+ ARRAY_SIZE(wm8400_dapm_romix_controls),
+ outmixer_event, SND_SOC_DAPM_PRE_REG),
+
+/* LOUT PGA */
+SND_SOC_DAPM_PGA("LOUT PGA", WM8400_POWER_MANAGEMENT_1, WM8400_LOUT_ENA_SHIFT,
+ 0, NULL, 0),
+
+/* ROUT PGA */
+SND_SOC_DAPM_PGA("ROUT PGA", WM8400_POWER_MANAGEMENT_1, WM8400_ROUT_ENA_SHIFT,
+ 0, NULL, 0),
+
+/* LOPGA */
+SND_SOC_DAPM_PGA("LOPGA", WM8400_POWER_MANAGEMENT_3, WM8400_LOPGA_ENA_SHIFT, 0,
+ NULL, 0),
+
+/* ROPGA */
+SND_SOC_DAPM_PGA("ROPGA", WM8400_POWER_MANAGEMENT_3, WM8400_ROPGA_ENA_SHIFT, 0,
+ NULL, 0),
+
+/* MICBIAS */
+SND_SOC_DAPM_MICBIAS("MICBIAS", WM8400_POWER_MANAGEMENT_1,
+ WM8400_MIC1BIAS_ENA_SHIFT, 0),
+
+SND_SOC_DAPM_OUTPUT("LON"),
+SND_SOC_DAPM_OUTPUT("LOP"),
+SND_SOC_DAPM_OUTPUT("OUT3"),
+SND_SOC_DAPM_OUTPUT("LOUT"),
+SND_SOC_DAPM_OUTPUT("SPKN"),
+SND_SOC_DAPM_OUTPUT("SPKP"),
+SND_SOC_DAPM_OUTPUT("ROUT"),
+SND_SOC_DAPM_OUTPUT("OUT4"),
+SND_SOC_DAPM_OUTPUT("ROP"),
+SND_SOC_DAPM_OUTPUT("RON"),
+
+SND_SOC_DAPM_OUTPUT("Internal DAC Sink"),
+};
+
+static const struct snd_soc_dapm_route audio_map[] = {
+ /* Make DACs turn on when playing even if not mixed into any outputs */
+ {"Internal DAC Sink", NULL, "Left DAC"},
+ {"Internal DAC Sink", NULL, "Right DAC"},
+
+ /* Make ADCs turn on when recording
+ * even if not mixed from any inputs */
+ {"Left ADC", NULL, "Internal ADC Source"},
+ {"Right ADC", NULL, "Internal ADC Source"},
+
+ /* Input Side */
+ /* LIN12 PGA */
+ {"LIN12 PGA", "LIN1 Switch", "LIN1"},
+ {"LIN12 PGA", "LIN2 Switch", "LIN2"},
+ /* LIN34 PGA */
+ {"LIN34 PGA", "LIN3 Switch", "LIN3"},
+ {"LIN34 PGA", "LIN4 Switch", "LIN4/RXN"},
+ /* INMIXL */
+ {"INMIXL", "Record Left Volume", "LOMIX"},
+ {"INMIXL", "LIN2 Volume", "LIN2"},
+ {"INMIXL", "LINPGA12 Switch", "LIN12 PGA"},
+ {"INMIXL", "LINPGA34 Switch", "LIN34 PGA"},
+ /* AILNMUX */
+ {"AILNMUX", "INMIXL Mix", "INMIXL"},
+ {"AILNMUX", "DIFFINL Mix", "LIN12 PGA"},
+ {"AILNMUX", "DIFFINL Mix", "LIN34 PGA"},
+ {"AILNMUX", "RXVOICE Mix", "LIN4/RXN"},
+ {"AILNMUX", "RXVOICE Mix", "RIN4/RXP"},
+ /* ADC */
+ {"Left ADC", NULL, "AILNMUX"},
+
+ /* RIN12 PGA */
+ {"RIN12 PGA", "RIN1 Switch", "RIN1"},
+ {"RIN12 PGA", "RIN2 Switch", "RIN2"},
+ /* RIN34 PGA */
+ {"RIN34 PGA", "RIN3 Switch", "RIN3"},
+ {"RIN34 PGA", "RIN4 Switch", "RIN4/RXP"},
+ /* INMIXL */
+ {"INMIXR", "Record Right Volume", "ROMIX"},
+ {"INMIXR", "RIN2 Volume", "RIN2"},
+ {"INMIXR", "RINPGA12 Switch", "RIN12 PGA"},
+ {"INMIXR", "RINPGA34 Switch", "RIN34 PGA"},
+ /* AIRNMUX */
+ {"AIRNMUX", "INMIXR Mix", "INMIXR"},
+ {"AIRNMUX", "DIFFINR Mix", "RIN12 PGA"},
+ {"AIRNMUX", "DIFFINR Mix", "RIN34 PGA"},
+ {"AIRNMUX", "RXVOICE Mix", "LIN4/RXN"},
+ {"AIRNMUX", "RXVOICE Mix", "RIN4/RXP"},
+ /* ADC */
+ {"Right ADC", NULL, "AIRNMUX"},
+
+ /* LOMIX */
+ {"LOMIX", "LOMIX RIN3 Bypass Switch", "RIN3"},
+ {"LOMIX", "LOMIX LIN3 Bypass Switch", "LIN3"},
+ {"LOMIX", "LOMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
+ {"LOMIX", "LOMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
+ {"LOMIX", "LOMIX Right ADC Bypass Switch", "AIRNMUX"},
+ {"LOMIX", "LOMIX Left ADC Bypass Switch", "AILNMUX"},
+ {"LOMIX", "LOMIX Left DAC Switch", "Left DAC"},
+
+ /* ROMIX */
+ {"ROMIX", "ROMIX RIN3 Bypass Switch", "RIN3"},
+ {"ROMIX", "ROMIX LIN3 Bypass Switch", "LIN3"},
+ {"ROMIX", "ROMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
+ {"ROMIX", "ROMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
+ {"ROMIX", "ROMIX Right ADC Bypass Switch", "AIRNMUX"},
+ {"ROMIX", "ROMIX Left ADC Bypass Switch", "AILNMUX"},
+ {"ROMIX", "ROMIX Right DAC Switch", "Right DAC"},
+
+ /* SPKMIX */
+ {"SPKMIX", "SPKMIX LIN2 Bypass Switch", "LIN2"},
+ {"SPKMIX", "SPKMIX RIN2 Bypass Switch", "RIN2"},
+ {"SPKMIX", "SPKMIX LADC Bypass Switch", "AILNMUX"},
+ {"SPKMIX", "SPKMIX RADC Bypass Switch", "AIRNMUX"},
+ {"SPKMIX", "SPKMIX Left Mixer PGA Switch", "LOPGA"},
+ {"SPKMIX", "SPKMIX Right Mixer PGA Switch", "ROPGA"},
+ {"SPKMIX", "SPKMIX Right DAC Switch", "Right DAC"},
+ {"SPKMIX", "SPKMIX Left DAC Switch", "Right DAC"},
+
+ /* LONMIX */
+ {"LONMIX", "LONMIX Left Mixer PGA Switch", "LOPGA"},
+ {"LONMIX", "LONMIX Right Mixer PGA Switch", "ROPGA"},
+ {"LONMIX", "LONMIX Inverted LOP Switch", "LOPMIX"},
+
+ /* LOPMIX */
+ {"LOPMIX", "LOPMIX Right Mic Bypass Switch", "RIN12 PGA"},
+ {"LOPMIX", "LOPMIX Left Mic Bypass Switch", "LIN12 PGA"},
+ {"LOPMIX", "LOPMIX Left Mixer PGA Switch", "LOPGA"},
+
+ /* OUT3MIX */
+ {"OUT3MIX", "OUT3MIX LIN4/RXP Bypass Switch", "LIN4/RXN"},
+ {"OUT3MIX", "OUT3MIX Left Out PGA Switch", "LOPGA"},
+
+ /* OUT4MIX */
+ {"OUT4MIX", "OUT4MIX Right Out PGA Switch", "ROPGA"},
+ {"OUT4MIX", "OUT4MIX RIN4/RXP Bypass Switch", "RIN4/RXP"},
+
+ /* RONMIX */
+ {"RONMIX", "RONMIX Right Mixer PGA Switch", "ROPGA"},
+ {"RONMIX", "RONMIX Left Mixer PGA Switch", "LOPGA"},
+ {"RONMIX", "RONMIX Inverted ROP Switch", "ROPMIX"},
+
+ /* ROPMIX */
+ {"ROPMIX", "ROPMIX Left Mic Bypass Switch", "LIN12 PGA"},
+ {"ROPMIX", "ROPMIX Right Mic Bypass Switch", "RIN12 PGA"},
+ {"ROPMIX", "ROPMIX Right Mixer PGA Switch", "ROPGA"},
+
+ /* Out Mixer PGAs */
+ {"LOPGA", NULL, "LOMIX"},
+ {"ROPGA", NULL, "ROMIX"},
+
+ {"LOUT PGA", NULL, "LOMIX"},
+ {"ROUT PGA", NULL, "ROMIX"},
+
+ /* Output Pins */
+ {"LON", NULL, "LONMIX"},
+ {"LOP", NULL, "LOPMIX"},
+ {"OUT3", NULL, "OUT3MIX"},
+ {"LOUT", NULL, "LOUT PGA"},
+ {"SPKN", NULL, "SPKMIX"},
+ {"ROUT", NULL, "ROUT PGA"},
+ {"OUT4", NULL, "OUT4MIX"},
+ {"ROP", NULL, "ROPMIX"},
+ {"RON", NULL, "RONMIX"},
+};
+
+static int wm8400_add_widgets(struct snd_soc_codec *codec)
+{
+ snd_soc_dapm_new_controls(codec, wm8400_dapm_widgets,
+ ARRAY_SIZE(wm8400_dapm_widgets));
+
+ snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
+
+ snd_soc_dapm_new_widgets(codec);
+ return 0;
+}
+
+/*
+ * Clock after FLL and dividers
+ */
+static int wm8400_set_dai_sysclk(struct snd_soc_dai *codec_dai,
+ int clk_id, unsigned int freq, int dir)
+{
+ struct snd_soc_codec *codec = codec_dai->codec;
+ struct wm8400_priv *wm8400 = codec->private_data;
+
+ wm8400->sysclk = freq;
+ return 0;
+}
+
+struct fll_factors {
+ u16 n;
+ u16 k;
+ u16 outdiv;
+ u16 fratio;
+ u16 freq_ref;
+};
+
+#define FIXED_FLL_SIZE ((1 << 16) * 10)
+
+static int fll_factors(struct wm8400_priv *wm8400, struct fll_factors *factors,
+ unsigned int Fref, unsigned int Fout)
+{
+ u64 Kpart;
+ unsigned int K, Nmod, target;
+
+ factors->outdiv = 2;
+ while (Fout * factors->outdiv < 90000000 ||
+ Fout * factors->outdiv > 100000000) {
+ factors->outdiv *= 2;
+ if (factors->outdiv > 32) {
+ dev_err(wm8400->wm8400->dev,
+ "Unsupported FLL output frequency %dHz\n",
+ Fout);
+ return -EINVAL;
+ }
+ }
+ target = Fout * factors->outdiv;
+ factors->outdiv = factors->outdiv >> 2;
+
+ if (Fref < 48000)
+ factors->freq_ref = 1;
+ else
+ factors->freq_ref = 0;
+
+ if (Fref < 1000000)
+ factors->fratio = 9;
+ else
+ factors->fratio = 0;
+
+ /* Ensure we have a fractional part */
+ do {
+ if (Fref < 1000000)
+ factors->fratio--;
+ else
+ factors->fratio++;
+
+ if (factors->fratio < 1 || factors->fratio > 8) {
+ dev_err(wm8400->wm8400->dev,
+ "Unable to calculate FRATIO\n");
+ return -EINVAL;
+ }
+
+ factors->n = target / (Fref * factors->fratio);
+ Nmod = target % (Fref * factors->fratio);
+ } while (Nmod == 0);
+
+ /* Calculate fractional part - scale up so we can round. */
+ Kpart = FIXED_FLL_SIZE * (long long)Nmod;
+
+ do_div(Kpart, (Fref * factors->fratio));
+
+ K = Kpart & 0xFFFFFFFF;
+
+ if ((K % 10) >= 5)
+ K += 5;
+
+ /* Move down to proper range now rounding is done */
+ factors->k = K / 10;
+
+ dev_dbg(wm8400->wm8400->dev,
+ "FLL: Fref=%d Fout=%d N=%x K=%x, FRATIO=%x OUTDIV=%x\n",
+ Fref, Fout,
+ factors->n, factors->k, factors->fratio, factors->outdiv);
+
+ return 0;
+}
+
+static int wm8400_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
+ unsigned int freq_in, unsigned int freq_out)
+{
+ struct snd_soc_codec *codec = codec_dai->codec;
+ struct wm8400_priv *wm8400 = codec->private_data;
+ struct fll_factors factors;
+ int ret;
+ u16 reg;
+
+ if (freq_in == wm8400->fll_in && freq_out == wm8400->fll_out)
+ return 0;
+
+ if (freq_out != 0) {
+ ret = fll_factors(wm8400, &factors, freq_in, freq_out);
+ if (ret != 0)
+ return ret;
+ }
+
+ wm8400->fll_out = freq_out;
+ wm8400->fll_in = freq_in;
+
+ /* We *must* disable the FLL before any changes */
+ reg = wm8400_read(codec, WM8400_POWER_MANAGEMENT_2);
+ reg &= ~WM8400_FLL_ENA;
+ wm8400_write(codec, WM8400_POWER_MANAGEMENT_2, reg);
+
+ reg = wm8400_read(codec, WM8400_FLL_CONTROL_1);
+ reg &= ~WM8400_FLL_OSC_ENA;
+ wm8400_write(codec, WM8400_FLL_CONTROL_1, reg);
+
+ if (freq_out == 0)
+ return 0;
+
+ reg &= ~(WM8400_FLL_REF_FREQ | WM8400_FLL_FRATIO_MASK);
+ reg |= WM8400_FLL_FRAC | factors.fratio;
+ reg |= factors.freq_ref << WM8400_FLL_REF_FREQ_SHIFT;
+ wm8400_write(codec, WM8400_FLL_CONTROL_1, reg);
+
+ wm8400_write(codec, WM8400_FLL_CONTROL_2, factors.k);
+ wm8400_write(codec, WM8400_FLL_CONTROL_3, factors.n);
+
+ reg = wm8400_read(codec, WM8400_FLL_CONTROL_4);
+ reg &= WM8400_FLL_OUTDIV_MASK;
+ reg |= factors.outdiv;
+ wm8400_write(codec, WM8400_FLL_CONTROL_4, reg);
+
+ return 0;
+}
+
+/*
+ * Sets ADC and Voice DAC format.
+ */
+static int wm8400_set_dai_fmt(struct snd_soc_dai *codec_dai,
+ unsigned int fmt)
+{
+ struct snd_soc_codec *codec = codec_dai->codec;
+ u16 audio1, audio3;
+
+ audio1 = wm8400_read(codec, WM8400_AUDIO_INTERFACE_1);
+ audio3 = wm8400_read(codec, WM8400_AUDIO_INTERFACE_3);
+
+ /* set master/slave audio interface */
+ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
+ case SND_SOC_DAIFMT_CBS_CFS:
+ audio3 &= ~WM8400_AIF_MSTR1;
+ break;
+ case SND_SOC_DAIFMT_CBM_CFM:
+ audio3 |= WM8400_AIF_MSTR1;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ audio1 &= ~WM8400_AIF_FMT_MASK;
+
+ /* interface format */
+ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
+ case SND_SOC_DAIFMT_I2S:
+ audio1 |= WM8400_AIF_FMT_I2S;
+ audio1 &= ~WM8400_AIF_LRCLK_INV;
+ break;
+ case SND_SOC_DAIFMT_RIGHT_J:
+ audio1 |= WM8400_AIF_FMT_RIGHTJ;
+ audio1 &= ~WM8400_AIF_LRCLK_INV;
+ break;
+ case SND_SOC_DAIFMT_LEFT_J:
+ audio1 |= WM8400_AIF_FMT_LEFTJ;
+ audio1 &= ~WM8400_AIF_LRCLK_INV;
+ break;
+ case SND_SOC_DAIFMT_DSP_A:
+ audio1 |= WM8400_AIF_FMT_DSP;
+ audio1 &= ~WM8400_AIF_LRCLK_INV;
+ break;
+ case SND_SOC_DAIFMT_DSP_B:
+ audio1 |= WM8400_AIF_FMT_DSP | WM8400_AIF_LRCLK_INV;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ wm8400_write(codec, WM8400_AUDIO_INTERFACE_1, audio1);
+ wm8400_write(codec, WM8400_AUDIO_INTERFACE_3, audio3);
+ return 0;
+}
+
+static int wm8400_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
+ int div_id, int div)
+{
+ struct snd_soc_codec *codec = codec_dai->codec;
+ u16 reg;
+
+ switch (div_id) {
+ case WM8400_MCLK_DIV:
+ reg = wm8400_read(codec, WM8400_CLOCKING_2) &
+ ~WM8400_MCLK_DIV_MASK;
+ wm8400_write(codec, WM8400_CLOCKING_2, reg | div);
+ break;
+ case WM8400_DACCLK_DIV:
+ reg = wm8400_read(codec, WM8400_CLOCKING_2) &
+ ~WM8400_DAC_CLKDIV_MASK;
+ wm8400_write(codec, WM8400_CLOCKING_2, reg | div);
+ break;
+ case WM8400_ADCCLK_DIV:
+ reg = wm8400_read(codec, WM8400_CLOCKING_2) &
+ ~WM8400_ADC_CLKDIV_MASK;
+ wm8400_write(codec, WM8400_CLOCKING_2, reg | div);
+ break;
+ case WM8400_BCLK_DIV:
+ reg = wm8400_read(codec, WM8400_CLOCKING_1) &
+ ~WM8400_BCLK_DIV_MASK;
+ wm8400_write(codec, WM8400_CLOCKING_1, reg | div);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+/*
+ * Set PCM DAI bit size and sample rate.
+ */
+static int wm8400_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct snd_soc_device *socdev = rtd->socdev;
+ struct snd_soc_codec *codec = socdev->card->codec;
+ u16 audio1 = wm8400_read(codec, WM8400_AUDIO_INTERFACE_1);
+
+ audio1 &= ~WM8400_AIF_WL_MASK;
+ /* bit size */
+ switch (params_format(params)) {
+ case SNDRV_PCM_FORMAT_S16_LE:
+ break;
+ case SNDRV_PCM_FORMAT_S20_3LE:
+ audio1 |= WM8400_AIF_WL_20BITS;
+ break;
+ case SNDRV_PCM_FORMAT_S24_LE:
+ audio1 |= WM8400_AIF_WL_24BITS;
+ break;
+ case SNDRV_PCM_FORMAT_S32_LE:
+ audio1 |= WM8400_AIF_WL_32BITS;
+ break;
+ }
+
+ wm8400_write(codec, WM8400_AUDIO_INTERFACE_1, audio1);
+ return 0;
+}
+
+static int wm8400_mute(struct snd_soc_dai *dai, int mute)
+{
+ struct snd_soc_codec *codec = dai->codec;
+ u16 val = wm8400_read(codec, WM8400_DAC_CTRL) & ~WM8400_DAC_MUTE;
+
+ if (mute)
+ wm8400_write(codec, WM8400_DAC_CTRL, val | WM8400_DAC_MUTE);
+ else
+ wm8400_write(codec, WM8400_DAC_CTRL, val);
+
+ return 0;
+}
+
+/* TODO: set bias for best performance at standby */
+static int wm8400_set_bias_level(struct snd_soc_codec *codec,
+ enum snd_soc_bias_level level)
+{
+ struct wm8400_priv *wm8400 = codec->private_data;
+ u16 val;
+ int ret;
+
+ switch (level) {
+ case SND_SOC_BIAS_ON:
+ break;
+
+ case SND_SOC_BIAS_PREPARE:
+ /* VMID=2*50k */
+ val = wm8400_read(codec, WM8400_POWER_MANAGEMENT_1) &
+ ~WM8400_VMID_MODE_MASK;
+ wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val | 0x2);
+ break;
+
+ case SND_SOC_BIAS_STANDBY:
+ if (codec->bias_level == SND_SOC_BIAS_OFF) {
+ ret = regulator_bulk_enable(ARRAY_SIZE(power),
+ &power[0]);
+ if (ret != 0) {
+ dev_err(wm8400->wm8400->dev,
+ "Failed to enable regulators: %d\n",
+ ret);
+ return ret;
+ }
+
+ wm8400_write(codec, WM8400_POWER_MANAGEMENT_1,
+ WM8400_CODEC_ENA | WM8400_SYSCLK_ENA);
+
+ /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */
+ wm8400_write(codec, WM8400_ANTIPOP2, WM8400_SOFTST |
+ WM8400_BUFDCOPEN | WM8400_POBCTRL);
+
+ msleep(50);
+
+ /* Enable VREF & VMID at 2x50k */
+ val = wm8400_read(codec, WM8400_POWER_MANAGEMENT_1);
+ val |= 0x2 | WM8400_VREF_ENA;
+ wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val);
+
+ /* Enable BUFIOEN */
+ wm8400_write(codec, WM8400_ANTIPOP2, WM8400_SOFTST |
+ WM8400_BUFDCOPEN | WM8400_POBCTRL |
+ WM8400_BUFIOEN);
+
+ /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
+ wm8400_write(codec, WM8400_ANTIPOP2, WM8400_BUFIOEN);
+ }
+
+ /* VMID=2*300k */
+ val = wm8400_read(codec, WM8400_POWER_MANAGEMENT_1) &
+ ~WM8400_VMID_MODE_MASK;
+ wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val | 0x4);
+ break;
+
+ case SND_SOC_BIAS_OFF:
+ /* Enable POBCTRL and SOFT_ST */
+ wm8400_write(codec, WM8400_ANTIPOP2, WM8400_SOFTST |
+ WM8400_POBCTRL | WM8400_BUFIOEN);
+
+ /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */
+ wm8400_write(codec, WM8400_ANTIPOP2, WM8400_SOFTST |
+ WM8400_BUFDCOPEN | WM8400_POBCTRL |
+ WM8400_BUFIOEN);
+
+ /* mute DAC */
+ val = wm8400_read(codec, WM8400_DAC_CTRL);
+ wm8400_write(codec, WM8400_DAC_CTRL, val | WM8400_DAC_MUTE);
+
+ /* Enable any disabled outputs */
+ val = wm8400_read(codec, WM8400_POWER_MANAGEMENT_1);
+ val |= WM8400_SPK_ENA | WM8400_OUT3_ENA |
+ WM8400_OUT4_ENA | WM8400_LOUT_ENA |
+ WM8400_ROUT_ENA;
+ wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val);
+
+ /* Disable VMID */
+ val &= ~WM8400_VMID_MODE_MASK;
+ wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val);
+
+ msleep(300);
+
+ /* Enable all output discharge bits */
+ wm8400_write(codec, WM8400_ANTIPOP1, WM8400_DIS_LLINE |
+ WM8400_DIS_RLINE | WM8400_DIS_OUT3 |
+ WM8400_DIS_OUT4 | WM8400_DIS_LOUT |
+ WM8400_DIS_ROUT);
+
+ /* Disable VREF */
+ val &= ~WM8400_VREF_ENA;
+ wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, val);
+
+ /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
+ wm8400_write(codec, WM8400_ANTIPOP2, 0x0);
+
+ ret = regulator_bulk_disable(ARRAY_SIZE(power),
+ &power[0]);
+ if (ret != 0)
+ return ret;
+
+ break;
+ }
+
+ codec->bias_level = level;
+ return 0;
+}
+
+#define WM8400_RATES SNDRV_PCM_RATE_8000_96000
+
+#define WM8400_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
+ SNDRV_PCM_FMTBIT_S24_LE)
+
+static struct snd_soc_dai_ops wm8400_dai_ops = {
+ .hw_params = wm8400_hw_params,
+ .digital_mute = wm8400_mute,
+ .set_fmt = wm8400_set_dai_fmt,
+ .set_clkdiv = wm8400_set_dai_clkdiv,
+ .set_sysclk = wm8400_set_dai_sysclk,
+ .set_pll = wm8400_set_dai_pll,
+};
+
+/*
+ * The WM8400 supports 2 different and mutually exclusive DAI
+ * configurations.
+ *
+ * 1. ADC/DAC on Primary Interface
+ * 2. ADC on Primary Interface/DAC on secondary
+ */
+struct snd_soc_dai wm8400_dai = {
+/* ADC/DAC on primary */
+ .name = "WM8400 ADC/DAC Primary",
+ .id = 1,
+ .playback = {
+ .stream_name = "Playback",
+ .channels_min = 1,
+ .channels_max = 2,
+ .rates = WM8400_RATES,
+ .formats = WM8400_FORMATS,
+ },
+ .capture = {
+ .stream_name = "Capture",
+ .channels_min = 1,
+ .channels_max = 2,
+ .rates = WM8400_RATES,
+ .formats = WM8400_FORMATS,
+ },
+ .ops = &wm8400_dai_ops,
+};
+EXPORT_SYMBOL_GPL(wm8400_dai);
+
+static int wm8400_suspend(struct platform_device *pdev, pm_message_t state)
+{
+ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+ struct snd_soc_codec *codec = socdev->card->codec;
+
+ wm8400_set_bias_level(codec, SND_SOC_BIAS_OFF);
+
+ return 0;
+}
+
+static int wm8400_resume(struct platform_device *pdev)
+{
+ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+ struct snd_soc_codec *codec = socdev->card->codec;
+
+ wm8400_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
+
+ return 0;
+}
+
+static struct snd_soc_codec *wm8400_codec;
+
+static int wm8400_probe(struct platform_device *pdev)
+{
+ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+ struct snd_soc_codec *codec;
+ int ret;
+
+ if (!wm8400_codec) {
+ dev_err(&pdev->dev, "wm8400 not yet discovered\n");
+ return -ENODEV;
+ }
+ codec = wm8400_codec;
+
+ socdev->card->codec = codec;
+
+ /* register pcms */
+ ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "failed to create pcms\n");
+ goto pcm_err;
+ }
+
+ wm8400_add_controls(codec);
+ wm8400_add_widgets(codec);
+
+ ret = snd_soc_init_card(socdev);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "failed to register card\n");
+ goto card_err;
+ }
+
+ return ret;
+
+card_err:
+ snd_soc_free_pcms(socdev);
+ snd_soc_dapm_free(socdev);
+pcm_err:
+ return ret;
+}
+
+/* power down chip */
+static int wm8400_remove(struct platform_device *pdev)
+{
+ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+
+ snd_soc_free_pcms(socdev);
+ snd_soc_dapm_free(socdev);
+
+ return 0;
+}
+
+struct snd_soc_codec_device soc_codec_dev_wm8400 = {
+ .probe = wm8400_probe,
+ .remove = wm8400_remove,
+ .suspend = wm8400_suspend,
+ .resume = wm8400_resume,
+};
+
+static void wm8400_probe_deferred(struct work_struct *work)
+{
+ struct wm8400_priv *priv = container_of(work, struct wm8400_priv,
+ work);
+ struct snd_soc_codec *codec = &priv->codec;
+ int ret;
+
+ /* charge output caps */
+ wm8400_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
+
+ /* We're done, tell the subsystem. */
+ ret = snd_soc_register_codec(codec);
+ if (ret != 0) {
+ dev_err(priv->wm8400->dev,
+ "Failed to register codec: %d\n", ret);
+ goto err;
+ }
+
+ ret = snd_soc_register_dai(&wm8400_dai);
+ if (ret != 0) {
+ dev_err(priv->wm8400->dev,
+ "Failed to register DAI: %d\n", ret);
+ goto err_codec;
+ }
+
+ return;
+
+err_codec:
+ snd_soc_unregister_codec(codec);
+err:
+ wm8400_set_bias_level(codec, SND_SOC_BIAS_OFF);
+}
+
+static int wm8400_codec_probe(struct platform_device *dev)
+{
+ struct wm8400_priv *priv;
+ int ret;
+ u16 reg;
+ struct snd_soc_codec *codec;
+
+ priv = kzalloc(sizeof(struct wm8400_priv), GFP_KERNEL);
+ if (priv == NULL)
+ return -ENOMEM;
+
+ codec = &priv->codec;
+ codec->private_data = priv;
+ codec->control_data = dev->dev.driver_data;
+ priv->wm8400 = dev->dev.driver_data;
+
+ ret = regulator_bulk_get(priv->wm8400->dev,
+ ARRAY_SIZE(power), &power[0]);
+ if (ret != 0) {
+ dev_err(&dev->dev, "Failed to get regulators: %d\n", ret);
+ goto err;
+ }
+
+ codec->dev = &dev->dev;
+ wm8400_dai.dev = &dev->dev;
+
+ codec->name = "WM8400";
+ codec->owner = THIS_MODULE;
+ codec->read = wm8400_read;
+ codec->write = wm8400_write;
+ codec->bias_level = SND_SOC_BIAS_OFF;
+ codec->set_bias_level = wm8400_set_bias_level;
+ codec->dai = &wm8400_dai;
+ codec->num_dai = 1;
+ codec->reg_cache_size = WM8400_REGISTER_COUNT;
+ mutex_init(&codec->mutex);
+ INIT_LIST_HEAD(&codec->dapm_widgets);
+ INIT_LIST_HEAD(&codec->dapm_paths);
+ INIT_WORK(&priv->work, wm8400_probe_deferred);
+
+ wm8400_codec_reset(codec);
+
+ reg = wm8400_read(codec, WM8400_POWER_MANAGEMENT_1);
+ wm8400_write(codec, WM8400_POWER_MANAGEMENT_1, reg | WM8400_CODEC_ENA);
+
+ /* Latch volume update bits */
+ reg = wm8400_read(codec, WM8400_LEFT_LINE_INPUT_1_2_VOLUME);
+ wm8400_write(codec, WM8400_LEFT_LINE_INPUT_1_2_VOLUME,
+ reg & WM8400_IPVU);
+ reg = wm8400_read(codec, WM8400_RIGHT_LINE_INPUT_1_2_VOLUME);
+ wm8400_write(codec, WM8400_RIGHT_LINE_INPUT_1_2_VOLUME,
+ reg & WM8400_IPVU);
+
+ wm8400_write(codec, WM8400_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8));
+ wm8400_write(codec, WM8400_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8));
+
+ wm8400_codec = codec;
+
+ if (!schedule_work(&priv->work)) {
+ ret = -EINVAL;
+ goto err_regulator;
+ }
+
+ return 0;
+
+err_regulator:
+ wm8400_codec = NULL;
+ regulator_bulk_free(ARRAY_SIZE(power), power);
+err:
+ kfree(priv);
+ return ret;
+}
+
+static int __exit wm8400_codec_remove(struct platform_device *dev)
+{
+ struct wm8400_priv *priv = wm8400_codec->private_data;
+ u16 reg;
+
+ snd_soc_unregister_dai(&wm8400_dai);
+ snd_soc_unregister_codec(wm8400_codec);
+
+ reg = wm8400_read(wm8400_codec, WM8400_POWER_MANAGEMENT_1);
+ wm8400_write(wm8400_codec, WM8400_POWER_MANAGEMENT_1,
+ reg & (~WM8400_CODEC_ENA));
+
+ regulator_bulk_free(ARRAY_SIZE(power), power);
+ kfree(priv);
+
+ wm8400_codec = NULL;
+
+ return 0;
+}
+
+static struct platform_driver wm8400_codec_driver = {
+ .driver = {
+ .name = "wm8400-codec",
+ .owner = THIS_MODULE,
+ },
+ .probe = wm8400_codec_probe,
+ .remove = __exit_p(wm8400_codec_remove),
+};
+
+static int __init wm8400_codec_init(void)
+{
+ return platform_driver_register(&wm8400_codec_driver);
+}
+module_init(wm8400_codec_init);
+
+static void __exit wm8400_codec_exit(void)
+{
+ platform_driver_unregister(&wm8400_codec_driver);
+}
+module_exit(wm8400_codec_exit);
+
+EXPORT_SYMBOL_GPL(soc_codec_dev_wm8400);
+
+MODULE_DESCRIPTION("ASoC WM8400 driver");
+MODULE_AUTHOR("Mark Brown");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:wm8400-codec");
--- /dev/null
+/*
+ * wm8400.h -- audio driver for WM8400
+ *
+ * Copyright 2008 Wolfson Microelectronics PLC.
+ * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#ifndef _WM8400_CODEC_H
+#define _WM8400_CODEC_H
+
+#define WM8400_MCLK_DIV 0
+#define WM8400_DACCLK_DIV 1
+#define WM8400_ADCCLK_DIV 2
+#define WM8400_BCLK_DIV 3
+
+#define WM8400_MCLK_DIV_1 0x400
+#define WM8400_MCLK_DIV_2 0x800
+
+#define WM8400_DAC_CLKDIV_1 0x00
+#define WM8400_DAC_CLKDIV_1_5 0x04
+#define WM8400_DAC_CLKDIV_2 0x08
+#define WM8400_DAC_CLKDIV_3 0x0c
+#define WM8400_DAC_CLKDIV_4 0x10
+#define WM8400_DAC_CLKDIV_5_5 0x14
+#define WM8400_DAC_CLKDIV_6 0x18
+
+#define WM8400_ADC_CLKDIV_1 0x00
+#define WM8400_ADC_CLKDIV_1_5 0x20
+#define WM8400_ADC_CLKDIV_2 0x40
+#define WM8400_ADC_CLKDIV_3 0x60
+#define WM8400_ADC_CLKDIV_4 0x80
+#define WM8400_ADC_CLKDIV_5_5 0xa0
+#define WM8400_ADC_CLKDIV_6 0xc0
+
+
+#define WM8400_BCLK_DIV_1 (0x0 << 1)
+#define WM8400_BCLK_DIV_1_5 (0x1 << 1)
+#define WM8400_BCLK_DIV_2 (0x2 << 1)
+#define WM8400_BCLK_DIV_3 (0x3 << 1)
+#define WM8400_BCLK_DIV_4 (0x4 << 1)
+#define WM8400_BCLK_DIV_5_5 (0x5 << 1)
+#define WM8400_BCLK_DIV_6 (0x6 << 1)
+#define WM8400_BCLK_DIV_8 (0x7 << 1)
+#define WM8400_BCLK_DIV_11 (0x8 << 1)
+#define WM8400_BCLK_DIV_12 (0x9 << 1)
+#define WM8400_BCLK_DIV_16 (0xA << 1)
+#define WM8400_BCLK_DIV_22 (0xB << 1)
+#define WM8400_BCLK_DIV_24 (0xC << 1)
+#define WM8400_BCLK_DIV_32 (0xD << 1)
+#define WM8400_BCLK_DIV_44 (0xE << 1)
+#define WM8400_BCLK_DIV_48 (0xF << 1)
+
+extern struct snd_soc_dai wm8400_dai;
+extern struct snd_soc_codec_device soc_codec_dev_wm8400;
+
+#endif
SOC_SINGLE("Mono Playback Switch", WM8510_MONOMIX, 6, 1, 1),
};
-/* add non dapm controls */
-static int wm8510_add_controls(struct snd_soc_codec *codec)
-{
- int err, i;
-
- for (i = 0; i < ARRAY_SIZE(wm8510_snd_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&wm8510_snd_controls[i], codec,
- NULL));
- if (err < 0)
- return err;
- }
-
- return 0;
-}
-
/* Speaker Output Mixer */
static const struct snd_kcontrol_new wm8510_speaker_mixer_controls[] = {
SOC_DAPM_SINGLE("Line Bypass Switch", WM8510_SPKMIX, 1, 1, 0),
return 0;
}
- pll_factors(freq_out*8, freq_in);
+ pll_factors(freq_out*4, freq_in);
wm8510_write(codec, WM8510_PLLN, (pll_div.pre_div << 4) | pll_div.n);
wm8510_write(codec, WM8510_PLLK1, pll_div.k >> 18);
wm8510_write(codec, WM8510_GPIO, reg | div);
break;
case WM8510_MCLKDIV:
- reg = wm8510_read_reg_cache(codec, WM8510_CLOCK) & 0x1f;
+ reg = wm8510_read_reg_cache(codec, WM8510_CLOCK) & 0x11f;
wm8510_write(codec, WM8510_CLOCK, reg | div);
break;
case WM8510_ADCCLK:
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
u16 iface = wm8510_read_reg_cache(codec, WM8510_IFACE) & 0x19f;
u16 adn = wm8510_read_reg_cache(codec, WM8510_ADD) & 0x1f1;
#define WM8510_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
+static struct snd_soc_dai_ops wm8510_dai_ops = {
+ .hw_params = wm8510_pcm_hw_params,
+ .digital_mute = wm8510_mute,
+ .set_fmt = wm8510_set_dai_fmt,
+ .set_clkdiv = wm8510_set_dai_clkdiv,
+ .set_pll = wm8510_set_dai_pll,
+};
+
struct snd_soc_dai wm8510_dai = {
.name = "WM8510 HiFi",
.playback = {
.channels_max = 2,
.rates = WM8510_RATES,
.formats = WM8510_FORMATS,},
- .ops = {
- .hw_params = wm8510_pcm_hw_params,
- .digital_mute = wm8510_mute,
- .set_fmt = wm8510_set_dai_fmt,
- .set_clkdiv = wm8510_set_dai_clkdiv,
- .set_pll = wm8510_set_dai_pll,
- },
+ .ops = &wm8510_dai_ops,
};
EXPORT_SYMBOL_GPL(wm8510_dai);
static int wm8510_suspend(struct platform_device *pdev, pm_message_t state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
wm8510_set_bias_level(codec, SND_SOC_BIAS_OFF);
return 0;
static int wm8510_resume(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int i;
u8 data[2];
u16 *cache = codec->reg_cache;
*/
static int wm8510_init(struct snd_soc_device *socdev)
{
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int ret = 0;
codec->name = "WM8510";
/* power on device */
codec->bias_level = SND_SOC_BIAS_OFF;
wm8510_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
- wm8510_add_controls(codec);
+ snd_soc_add_controls(codec, wm8510_snd_controls,
+ ARRAY_SIZE(wm8510_snd_controls));
wm8510_add_widgets(codec);
ret = snd_soc_init_card(socdev);
if (ret < 0) {
const struct i2c_device_id *id)
{
struct snd_soc_device *socdev = wm8510_socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int ret;
i2c_set_clientdata(i2c, codec);
static int __devinit wm8510_spi_probe(struct spi_device *spi)
{
struct snd_soc_device *socdev = wm8510_socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int ret;
codec->control_data = spi;
if (codec == NULL)
return -ENOMEM;
- socdev->codec = codec;
+ socdev->card->codec = codec;
mutex_init(&codec->mutex);
INIT_LIST_HEAD(&codec->dapm_widgets);
INIT_LIST_HEAD(&codec->dapm_paths);
static int wm8510_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
if (codec->control_data)
wm8510_set_bias_level(codec, SND_SOC_BIAS_OFF);
/*
* wm8580.c -- WM8580 ALSA Soc Audio driver
*
- * Copyright 2008 Wolfson Microelectronics PLC.
+ * Copyright 2008, 2009 Wolfson Microelectronics PLC.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
#include "wm8580.h"
-#define WM8580_VERSION "0.1"
-
-struct pll_state {
- unsigned int in;
- unsigned int out;
-};
-
-/* codec private data */
-struct wm8580_priv {
- struct pll_state a;
- struct pll_state b;
-};
-
/* WM8580 register space */
#define WM8580_PLLA1 0x00
#define WM8580_PLLA2 0x01
#define WM8580_READBACK 0x34
#define WM8580_RESET 0x35
+#define WM8580_MAX_REGISTER 0x35
+
/* PLLB4 (register 7h) */
#define WM8580_PLLB4_MCLKOUTSRC_MASK 0x60
#define WM8580_PLLB4_MCLKOUTSRC_PLLA 0x20
0x0000, 0x0000 /*R53*/
};
+struct pll_state {
+ unsigned int in;
+ unsigned int out;
+};
+
+/* codec private data */
+struct wm8580_priv {
+ struct snd_soc_codec codec;
+ u16 reg_cache[WM8580_MAX_REGISTER + 1];
+ struct pll_state a;
+ struct pll_state b;
+};
+
+
/*
* read wm8580 register cache
*/
unsigned int reg)
{
u16 *cache = codec->reg_cache;
- BUG_ON(reg > ARRAY_SIZE(wm8580_reg));
+ BUG_ON(reg >= ARRAY_SIZE(wm8580_reg));
return cache[reg];
}
{
u8 data[2];
- BUG_ON(reg > ARRAY_SIZE(wm8580_reg));
+ BUG_ON(reg >= ARRAY_SIZE(wm8580_reg));
/* Registers are 9 bits wide */
value &= 0x1ff;
SOC_SINGLE("ADC High-Pass Filter Switch", WM8580_ADC_CONTROL1, 4, 1, 0),
};
-/* Add non-DAPM controls */
-static int wm8580_add_controls(struct snd_soc_codec *codec)
-{
- int err, i;
-
- for (i = 0; i < ARRAY_SIZE(wm8580_snd_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&wm8580_snd_controls[i],
- codec, NULL));
- if (err < 0)
- return err;
- }
- return 0;
-}
static const struct snd_soc_dapm_widget wm8580_dapm_widgets[] = {
SND_SOC_DAPM_DAC("DAC1", "Playback", WM8580_PWRDN1, 2, 1),
SND_SOC_DAPM_DAC("DAC2", "Playback", WM8580_PWRDN1, 3, 1),
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
u16 paifb = wm8580_read(codec, WM8580_PAIF3 + dai->id);
paifb &= ~WM8580_AIF_LENGTH_MASK;
switch (level) {
case SND_SOC_BIAS_ON:
case SND_SOC_BIAS_PREPARE:
+ break;
+
case SND_SOC_BIAS_STANDBY:
+ if (codec->bias_level == SND_SOC_BIAS_OFF) {
+ /* Power up and get individual control of the DACs */
+ reg = wm8580_read(codec, WM8580_PWRDN1);
+ reg &= ~(WM8580_PWRDN1_PWDN | WM8580_PWRDN1_ALLDACPD);
+ wm8580_write(codec, WM8580_PWRDN1, reg);
+
+ /* Make VMID high impedence */
+ reg = wm8580_read(codec, WM8580_ADC_CONTROL1);
+ reg &= ~0x100;
+ wm8580_write(codec, WM8580_ADC_CONTROL1, reg);
+ }
break;
+
case SND_SOC_BIAS_OFF:
reg = wm8580_read(codec, WM8580_PWRDN1);
wm8580_write(codec, WM8580_PWRDN1, reg | WM8580_PWRDN1_PWDN);
#define WM8580_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
+static struct snd_soc_dai_ops wm8580_dai_ops_playback = {
+ .hw_params = wm8580_paif_hw_params,
+ .set_fmt = wm8580_set_paif_dai_fmt,
+ .set_clkdiv = wm8580_set_dai_clkdiv,
+ .set_pll = wm8580_set_dai_pll,
+ .digital_mute = wm8580_digital_mute,
+};
+
+static struct snd_soc_dai_ops wm8580_dai_ops_capture = {
+ .hw_params = wm8580_paif_hw_params,
+ .set_fmt = wm8580_set_paif_dai_fmt,
+ .set_clkdiv = wm8580_set_dai_clkdiv,
+ .set_pll = wm8580_set_dai_pll,
+};
+
struct snd_soc_dai wm8580_dai[] = {
{
.name = "WM8580 PAIFRX",
.rates = SNDRV_PCM_RATE_8000_192000,
.formats = WM8580_FORMATS,
},
- .ops = {
- .hw_params = wm8580_paif_hw_params,
- .set_fmt = wm8580_set_paif_dai_fmt,
- .set_clkdiv = wm8580_set_dai_clkdiv,
- .set_pll = wm8580_set_dai_pll,
- .digital_mute = wm8580_digital_mute,
- },
+ .ops = &wm8580_dai_ops_playback,
},
{
.name = "WM8580 PAIFTX",
.rates = SNDRV_PCM_RATE_8000_192000,
.formats = WM8580_FORMATS,
},
- .ops = {
- .hw_params = wm8580_paif_hw_params,
- .set_fmt = wm8580_set_paif_dai_fmt,
- .set_clkdiv = wm8580_set_dai_clkdiv,
- .set_pll = wm8580_set_dai_pll,
- },
+ .ops = &wm8580_dai_ops_capture,
},
};
EXPORT_SYMBOL_GPL(wm8580_dai);
-/*
- * initialise the WM8580 driver
- * register the mixer and dsp interfaces with the kernel
- */
-static int wm8580_init(struct snd_soc_device *socdev)
+static struct snd_soc_codec *wm8580_codec;
+
+static int wm8580_probe(struct platform_device *pdev)
{
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+ struct snd_soc_codec *codec;
int ret = 0;
- codec->name = "WM8580";
- codec->owner = THIS_MODULE;
- codec->read = wm8580_read_reg_cache;
- codec->write = wm8580_write;
- codec->set_bias_level = wm8580_set_bias_level;
- codec->dai = wm8580_dai;
- codec->num_dai = ARRAY_SIZE(wm8580_dai);
- codec->reg_cache_size = ARRAY_SIZE(wm8580_reg);
- codec->reg_cache = kmemdup(wm8580_reg, sizeof(wm8580_reg),
- GFP_KERNEL);
-
- if (codec->reg_cache == NULL)
- return -ENOMEM;
-
- /* Get the codec into a known state */
- wm8580_write(codec, WM8580_RESET, 0);
-
- /* Power up and get individual control of the DACs */
- wm8580_write(codec, WM8580_PWRDN1, wm8580_read(codec, WM8580_PWRDN1) &
- ~(WM8580_PWRDN1_PWDN | WM8580_PWRDN1_ALLDACPD));
+ if (wm8580_codec == NULL) {
+ dev_err(&pdev->dev, "Codec device not registered\n");
+ return -ENODEV;
+ }
- /* Make VMID high impedence */
- wm8580_write(codec, WM8580_ADC_CONTROL1,
- wm8580_read(codec, WM8580_ADC_CONTROL1) & ~0x100);
+ socdev->card->codec = wm8580_codec;
+ codec = wm8580_codec;
/* register pcms */
- ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1,
- SNDRV_DEFAULT_STR1);
+ ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
if (ret < 0) {
- printk(KERN_ERR "wm8580: failed to create pcms\n");
+ dev_err(codec->dev, "failed to create pcms: %d\n", ret);
goto pcm_err;
}
- wm8580_add_controls(codec);
+ snd_soc_add_controls(codec, wm8580_snd_controls,
+ ARRAY_SIZE(wm8580_snd_controls));
wm8580_add_widgets(codec);
-
ret = snd_soc_init_card(socdev);
if (ret < 0) {
- printk(KERN_ERR "wm8580: failed to register card\n");
+ dev_err(codec->dev, "failed to register card: %d\n", ret);
goto card_err;
}
+
return ret;
card_err:
snd_soc_free_pcms(socdev);
snd_soc_dapm_free(socdev);
pcm_err:
- kfree(codec->reg_cache);
return ret;
}
-/* If the i2c layer weren't so broken, we could pass this kind of data
- around */
-static struct snd_soc_device *wm8580_socdev;
+/* power down chip */
+static int wm8580_remove(struct platform_device *pdev)
+{
+ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+
+ snd_soc_free_pcms(socdev);
+ snd_soc_dapm_free(socdev);
-#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
+ return 0;
+}
-/*
- * WM8580 2 wire address is determined by GPIO5
- * state during powerup.
- * low = 0x1a
- * high = 0x1b
- */
+struct snd_soc_codec_device soc_codec_dev_wm8580 = {
+ .probe = wm8580_probe,
+ .remove = wm8580_remove,
+};
+EXPORT_SYMBOL_GPL(soc_codec_dev_wm8580);
+
+static int wm8580_register(struct wm8580_priv *wm8580)
+{
+ int ret, i;
+ struct snd_soc_codec *codec = &wm8580->codec;
+
+ if (wm8580_codec) {
+ dev_err(codec->dev, "Another WM8580 is registered\n");
+ ret = -EINVAL;
+ goto err;
+ }
+
+ mutex_init(&codec->mutex);
+ INIT_LIST_HEAD(&codec->dapm_widgets);
+ INIT_LIST_HEAD(&codec->dapm_paths);
+ codec->private_data = wm8580;
+ codec->name = "WM8580";
+ codec->owner = THIS_MODULE;
+ codec->read = wm8580_read_reg_cache;
+ codec->write = wm8580_write;
+ codec->bias_level = SND_SOC_BIAS_OFF;
+ codec->set_bias_level = wm8580_set_bias_level;
+ codec->dai = wm8580_dai;
+ codec->num_dai = ARRAY_SIZE(wm8580_dai);
+ codec->reg_cache_size = ARRAY_SIZE(wm8580->reg_cache);
+ codec->reg_cache = &wm8580->reg_cache;
+
+ memcpy(codec->reg_cache, wm8580_reg, sizeof(wm8580_reg));
+
+ /* Get the codec into a known state */
+ ret = wm8580_write(codec, WM8580_RESET, 0);
+ if (ret != 0) {
+ dev_err(codec->dev, "Failed to reset codec: %d\n", ret);
+ goto err;
+ }
+
+ for (i = 0; i < ARRAY_SIZE(wm8580_dai); i++)
+ wm8580_dai[i].dev = codec->dev;
+
+ wm8580_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
+
+ wm8580_codec = codec;
+
+ ret = snd_soc_register_codec(codec);
+ if (ret != 0) {
+ dev_err(codec->dev, "Failed to register codec: %d\n", ret);
+ goto err;
+ }
+
+ ret = snd_soc_register_dais(wm8580_dai, ARRAY_SIZE(wm8580_dai));
+ if (ret != 0) {
+ dev_err(codec->dev, "Failed to register DAI: %d\n", ret);
+ goto err_codec;
+ }
+
+ return 0;
+
+err_codec:
+ snd_soc_unregister_codec(codec);
+err:
+ kfree(wm8580);
+ return ret;
+}
+
+static void wm8580_unregister(struct wm8580_priv *wm8580)
+{
+ wm8580_set_bias_level(&wm8580->codec, SND_SOC_BIAS_OFF);
+ snd_soc_unregister_dais(wm8580_dai, ARRAY_SIZE(wm8580_dai));
+ snd_soc_unregister_codec(&wm8580->codec);
+ kfree(wm8580);
+ wm8580_codec = NULL;
+}
+
+#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
static int wm8580_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
{
- struct snd_soc_device *socdev = wm8580_socdev;
- struct snd_soc_codec *codec = socdev->codec;
- int ret;
+ struct wm8580_priv *wm8580;
+ struct snd_soc_codec *codec;
- i2c_set_clientdata(i2c, codec);
+ wm8580 = kzalloc(sizeof(struct wm8580_priv), GFP_KERNEL);
+ if (wm8580 == NULL)
+ return -ENOMEM;
+
+ codec = &wm8580->codec;
+ codec->hw_write = (hw_write_t)i2c_master_send;
+
+ i2c_set_clientdata(i2c, wm8580);
codec->control_data = i2c;
- ret = wm8580_init(socdev);
- if (ret < 0)
- dev_err(&i2c->dev, "failed to initialise WM8580\n");
- return ret;
+ codec->dev = &i2c->dev;
+
+ return wm8580_register(wm8580);
}
static int wm8580_i2c_remove(struct i2c_client *client)
{
- struct snd_soc_codec *codec = i2c_get_clientdata(client);
- kfree(codec->reg_cache);
+ struct wm8580_priv *wm8580 = i2c_get_clientdata(client);
+ wm8580_unregister(wm8580);
return 0;
}
static struct i2c_driver wm8580_i2c_driver = {
.driver = {
- .name = "WM8580 I2C Codec",
+ .name = "wm8580",
.owner = THIS_MODULE,
},
.probe = wm8580_i2c_probe,
.remove = wm8580_i2c_remove,
.id_table = wm8580_i2c_id,
};
+#endif
-static int wm8580_add_i2c_device(struct platform_device *pdev,
- const struct wm8580_setup_data *setup)
+static int __init wm8580_modinit(void)
{
- struct i2c_board_info info;
- struct i2c_adapter *adapter;
- struct i2c_client *client;
int ret;
+#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
ret = i2c_add_driver(&wm8580_i2c_driver);
if (ret != 0) {
- dev_err(&pdev->dev, "can't add i2c driver\n");
- return ret;
- }
-
- memset(&info, 0, sizeof(struct i2c_board_info));
- info.addr = setup->i2c_address;
- strlcpy(info.type, "wm8580", I2C_NAME_SIZE);
-
- adapter = i2c_get_adapter(setup->i2c_bus);
- if (!adapter) {
- dev_err(&pdev->dev, "can't get i2c adapter %d\n",
- setup->i2c_bus);
- goto err_driver;
- }
-
- client = i2c_new_device(adapter, &info);
- i2c_put_adapter(adapter);
- if (!client) {
- dev_err(&pdev->dev, "can't add i2c device at 0x%x\n",
- (unsigned int)info.addr);
- goto err_driver;
+ pr_err("Failed to register WM8580 I2C driver: %d\n", ret);
}
-
- return 0;
-
-err_driver:
- i2c_del_driver(&wm8580_i2c_driver);
- return -ENODEV;
-}
#endif
-static int wm8580_probe(struct platform_device *pdev)
-{
- struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct wm8580_setup_data *setup;
- struct snd_soc_codec *codec;
- struct wm8580_priv *wm8580;
- int ret = 0;
-
- pr_info("WM8580 Audio Codec %s\n", WM8580_VERSION);
-
- setup = socdev->codec_data;
- codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
- if (codec == NULL)
- return -ENOMEM;
-
- wm8580 = kzalloc(sizeof(struct wm8580_priv), GFP_KERNEL);
- if (wm8580 == NULL) {
- kfree(codec);
- return -ENOMEM;
- }
-
- codec->private_data = wm8580;
- socdev->codec = codec;
- mutex_init(&codec->mutex);
- INIT_LIST_HEAD(&codec->dapm_widgets);
- INIT_LIST_HEAD(&codec->dapm_paths);
- wm8580_socdev = socdev;
-
-#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
- if (setup->i2c_address) {
- codec->hw_write = (hw_write_t)i2c_master_send;
- ret = wm8580_add_i2c_device(pdev, setup);
- }
-#else
- /* Add other interfaces here */
-#endif
- return ret;
-}
-
-/* power down chip */
-static int wm8580_remove(struct platform_device *pdev)
-{
- struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
-
- if (codec->control_data)
- wm8580_set_bias_level(codec, SND_SOC_BIAS_OFF);
- snd_soc_free_pcms(socdev);
- snd_soc_dapm_free(socdev);
-#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
- i2c_unregister_device(codec->control_data);
- i2c_del_driver(&wm8580_i2c_driver);
-#endif
- kfree(codec->private_data);
- kfree(codec);
-
return 0;
}
-
-struct snd_soc_codec_device soc_codec_dev_wm8580 = {
- .probe = wm8580_probe,
- .remove = wm8580_remove,
-};
-EXPORT_SYMBOL_GPL(soc_codec_dev_wm8580);
-
-static int __init wm8580_modinit(void)
-{
- return snd_soc_register_dais(wm8580_dai, ARRAY_SIZE(wm8580_dai));
-}
module_init(wm8580_modinit);
static void __exit wm8580_exit(void)
{
- snd_soc_unregister_dais(wm8580_dai, ARRAY_SIZE(wm8580_dai));
+#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
+ i2c_del_driver(&wm8580_i2c_driver);
+#endif
}
module_exit(wm8580_exit);
#define WM8580_CLKSRC_OSC 4
#define WM8580_CLKSRC_NONE 5
-struct wm8580_setup_data {
- int i2c_bus;
- unsigned short i2c_address;
-};
-
#define WM8580_DAI_PAIFRX 0
#define WM8580_DAI_PAIFTX 1
unsigned int reg)
{
u16 *cache = codec->reg_cache;
- BUG_ON(reg > ARRAY_SIZE(wm8728_reg_defaults));
+ BUG_ON(reg >= ARRAY_SIZE(wm8728_reg_defaults));
return cache[reg];
}
u16 reg, unsigned int value)
{
u16 *cache = codec->reg_cache;
- BUG_ON(reg > ARRAY_SIZE(wm8728_reg_defaults));
+ BUG_ON(reg >= ARRAY_SIZE(wm8728_reg_defaults));
cache[reg] = value;
}
SOC_SINGLE("Deemphasis", WM8728_DACCTL, 1, 1, 0),
};
-static int wm8728_add_controls(struct snd_soc_codec *codec)
-{
- int err, i;
-
- for (i = 0; i < ARRAY_SIZE(wm8728_snd_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&wm8728_snd_controls[i],
- codec, NULL));
- if (err < 0)
- return err;
- }
-
- return 0;
-}
-
/*
* DAPM controls.
*/
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
u16 dac = wm8728_read_reg_cache(codec, WM8728_DACCTL);
dac &= ~0x18;
#define WM8728_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
SNDRV_PCM_FMTBIT_S24_LE)
+static struct snd_soc_dai_ops wm8728_dai_ops = {
+ .hw_params = wm8728_hw_params,
+ .digital_mute = wm8728_mute,
+ .set_fmt = wm8728_set_dai_fmt,
+};
+
struct snd_soc_dai wm8728_dai = {
.name = "WM8728",
.playback = {
.rates = WM8728_RATES,
.formats = WM8728_FORMATS,
},
- .ops = {
- .hw_params = wm8728_hw_params,
- .digital_mute = wm8728_mute,
- .set_fmt = wm8728_set_dai_fmt,
- }
+ .ops = &wm8728_dai_ops,
};
EXPORT_SYMBOL_GPL(wm8728_dai);
static int wm8728_suspend(struct platform_device *pdev, pm_message_t state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
wm8728_set_bias_level(codec, SND_SOC_BIAS_OFF);
static int wm8728_resume(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
wm8728_set_bias_level(codec, codec->suspend_bias_level);
*/
static int wm8728_init(struct snd_soc_device *socdev)
{
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int ret = 0;
codec->name = "WM8728";
/* power on device */
wm8728_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
- wm8728_add_controls(codec);
+ snd_soc_add_controls(codec, wm8728_snd_controls,
+ ARRAY_SIZE(wm8728_snd_controls));
wm8728_add_widgets(codec);
ret = snd_soc_init_card(socdev);
if (ret < 0) {
const struct i2c_device_id *id)
{
struct snd_soc_device *socdev = wm8728_socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int ret;
i2c_set_clientdata(i2c, codec);
static int __devinit wm8728_spi_probe(struct spi_device *spi)
{
struct snd_soc_device *socdev = wm8728_socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int ret;
codec->control_data = spi;
if (codec == NULL)
return -ENOMEM;
- socdev->codec = codec;
+ socdev->card->codec = codec;
mutex_init(&codec->mutex);
INIT_LIST_HEAD(&codec->dapm_widgets);
INIT_LIST_HEAD(&codec->dapm_paths);
static int wm8728_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
if (codec->control_data)
wm8728_set_bias_level(codec, SND_SOC_BIAS_OFF);
#include "wm8731.h"
-#define WM8731_VERSION "0.13"
-
+static struct snd_soc_codec *wm8731_codec;
struct snd_soc_codec_device soc_codec_dev_wm8731;
/* codec private data */
struct wm8731_priv {
+ struct snd_soc_codec codec;
+ u16 reg_cache[WM8731_CACHEREGNUM];
unsigned int sysclk;
};
+#ifdef CONFIG_SPI_MASTER
+static int wm8731_spi_write(struct spi_device *spi, const char *data, int len);
+#endif
+
/*
* wm8731 register cache
* We can't read the WM8731 register space when we are
SOC_ENUM("Playback De-emphasis", wm8731_enum[1]),
};
-/* add non dapm controls */
-static int wm8731_add_controls(struct snd_soc_codec *codec)
-{
- int err, i;
-
- for (i = 0; i < ARRAY_SIZE(wm8731_snd_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&wm8731_snd_controls[i],
- codec, NULL));
- if (err < 0)
- return err;
- }
-
- return 0;
-}
-
/* Output Mixer */
static const struct snd_kcontrol_new wm8731_output_mixer_controls[] = {
SOC_DAPM_SINGLE("Line Bypass Switch", WM8731_APANA, 3, 1, 0),
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct wm8731_priv *wm8731 = codec->private_data;
u16 iface = wm8731_read_reg_cache(codec, WM8731_IFACE) & 0xfff3;
int i = get_coeff(wm8731->sysclk, params_rate(params));
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
/* set active */
wm8731_write(codec, WM8731_ACTIVE, 0x0001);
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
/* deactivate */
if (!codec->active) {
static int wm8731_set_bias_level(struct snd_soc_codec *codec,
enum snd_soc_bias_level level)
{
- u16 reg = wm8731_read_reg_cache(codec, WM8731_PWR) & 0xff7f;
+ u16 reg;
switch (level) {
case SND_SOC_BIAS_ON:
- /* vref/mid, osc on, dac unmute */
- wm8731_write(codec, WM8731_PWR, reg);
break;
case SND_SOC_BIAS_PREPARE:
break;
case SND_SOC_BIAS_STANDBY:
- /* everything off except vref/vmid, */
+ /* Clear PWROFF, gate CLKOUT, everything else as-is */
+ reg = wm8731_read_reg_cache(codec, WM8731_PWR) & 0xff7f;
wm8731_write(codec, WM8731_PWR, reg | 0x0040);
break;
case SND_SOC_BIAS_OFF:
- /* everything off, dac mute, inactive */
wm8731_write(codec, WM8731_ACTIVE, 0x0);
wm8731_write(codec, WM8731_PWR, 0xffff);
break;
#define WM8731_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
SNDRV_PCM_FMTBIT_S24_LE)
+static struct snd_soc_dai_ops wm8731_dai_ops = {
+ .prepare = wm8731_pcm_prepare,
+ .hw_params = wm8731_hw_params,
+ .shutdown = wm8731_shutdown,
+ .digital_mute = wm8731_mute,
+ .set_sysclk = wm8731_set_dai_sysclk,
+ .set_fmt = wm8731_set_dai_fmt,
+};
+
struct snd_soc_dai wm8731_dai = {
.name = "WM8731",
.playback = {
.channels_max = 2,
.rates = WM8731_RATES,
.formats = WM8731_FORMATS,},
- .ops = {
- .prepare = wm8731_pcm_prepare,
- .hw_params = wm8731_hw_params,
- .shutdown = wm8731_shutdown,
- .digital_mute = wm8731_mute,
- .set_sysclk = wm8731_set_dai_sysclk,
- .set_fmt = wm8731_set_dai_fmt,
- }
+ .ops = &wm8731_dai_ops,
};
EXPORT_SYMBOL_GPL(wm8731_dai);
static int wm8731_suspend(struct platform_device *pdev, pm_message_t state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
wm8731_write(codec, WM8731_ACTIVE, 0x0);
wm8731_set_bias_level(codec, SND_SOC_BIAS_OFF);
static int wm8731_resume(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int i;
u8 data[2];
u16 *cache = codec->reg_cache;
return 0;
}
-/*
- * initialise the WM8731 driver
- * register the mixer and dsp interfaces with the kernel
- */
-static int wm8731_init(struct snd_soc_device *socdev)
+static int wm8731_probe(struct platform_device *pdev)
{
- struct snd_soc_codec *codec = socdev->codec;
- int reg, ret = 0;
+ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+ struct snd_soc_codec *codec;
+ int ret = 0;
- codec->name = "WM8731";
- codec->owner = THIS_MODULE;
- codec->read = wm8731_read_reg_cache;
- codec->write = wm8731_write;
- codec->set_bias_level = wm8731_set_bias_level;
- codec->dai = &wm8731_dai;
- codec->num_dai = 1;
- codec->reg_cache_size = ARRAY_SIZE(wm8731_reg);
- codec->reg_cache = kmemdup(wm8731_reg, sizeof(wm8731_reg), GFP_KERNEL);
- if (codec->reg_cache == NULL)
- return -ENOMEM;
+ if (wm8731_codec == NULL) {
+ dev_err(&pdev->dev, "Codec device not registered\n");
+ return -ENODEV;
+ }
- wm8731_reset(codec);
+ socdev->card->codec = wm8731_codec;
+ codec = wm8731_codec;
/* register pcms */
ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
if (ret < 0) {
- printk(KERN_ERR "wm8731: failed to create pcms\n");
+ dev_err(codec->dev, "failed to create pcms: %d\n", ret);
goto pcm_err;
}
- /* power on device */
- wm8731_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
-
- /* set the update bits */
- reg = wm8731_read_reg_cache(codec, WM8731_LOUT1V);
- wm8731_write(codec, WM8731_LOUT1V, reg & ~0x0100);
- reg = wm8731_read_reg_cache(codec, WM8731_ROUT1V);
- wm8731_write(codec, WM8731_ROUT1V, reg & ~0x0100);
- reg = wm8731_read_reg_cache(codec, WM8731_LINVOL);
- wm8731_write(codec, WM8731_LINVOL, reg & ~0x0100);
- reg = wm8731_read_reg_cache(codec, WM8731_RINVOL);
- wm8731_write(codec, WM8731_RINVOL, reg & ~0x0100);
-
- wm8731_add_controls(codec);
+ snd_soc_add_controls(codec, wm8731_snd_controls,
+ ARRAY_SIZE(wm8731_snd_controls));
wm8731_add_widgets(codec);
ret = snd_soc_init_card(socdev);
if (ret < 0) {
- printk(KERN_ERR "wm8731: failed to register card\n");
+ dev_err(codec->dev, "failed to register card: %d\n", ret);
goto card_err;
}
snd_soc_free_pcms(socdev);
snd_soc_dapm_free(socdev);
pcm_err:
- kfree(codec->reg_cache);
return ret;
}
-static struct snd_soc_device *wm8731_socdev;
-
-#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
-
-/*
- * WM8731 2 wire address is determined by GPIO5
- * state during powerup.
- * low = 0x1a
- * high = 0x1b
- */
-
-static int wm8731_i2c_probe(struct i2c_client *i2c,
- const struct i2c_device_id *id)
+/* power down chip */
+static int wm8731_remove(struct platform_device *pdev)
{
- struct snd_soc_device *socdev = wm8731_socdev;
- struct snd_soc_codec *codec = socdev->codec;
- int ret;
-
- i2c_set_clientdata(i2c, codec);
- codec->control_data = i2c;
-
- ret = wm8731_init(socdev);
- if (ret < 0)
- pr_err("failed to initialise WM8731\n");
+ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- return ret;
-}
+ snd_soc_free_pcms(socdev);
+ snd_soc_dapm_free(socdev);
-static int wm8731_i2c_remove(struct i2c_client *client)
-{
- struct snd_soc_codec *codec = i2c_get_clientdata(client);
- kfree(codec->reg_cache);
return 0;
}
-static const struct i2c_device_id wm8731_i2c_id[] = {
- { "wm8731", 0 },
- { }
-};
-MODULE_DEVICE_TABLE(i2c, wm8731_i2c_id);
-
-static struct i2c_driver wm8731_i2c_driver = {
- .driver = {
- .name = "WM8731 I2C Codec",
- .owner = THIS_MODULE,
- },
- .probe = wm8731_i2c_probe,
- .remove = wm8731_i2c_remove,
- .id_table = wm8731_i2c_id,
+struct snd_soc_codec_device soc_codec_dev_wm8731 = {
+ .probe = wm8731_probe,
+ .remove = wm8731_remove,
+ .suspend = wm8731_suspend,
+ .resume = wm8731_resume,
};
+EXPORT_SYMBOL_GPL(soc_codec_dev_wm8731);
-static int wm8731_add_i2c_device(struct platform_device *pdev,
- const struct wm8731_setup_data *setup)
+static int wm8731_register(struct wm8731_priv *wm8731)
{
- struct i2c_board_info info;
- struct i2c_adapter *adapter;
- struct i2c_client *client;
int ret;
+ struct snd_soc_codec *codec = &wm8731->codec;
+ u16 reg;
- ret = i2c_add_driver(&wm8731_i2c_driver);
- if (ret != 0) {
- dev_err(&pdev->dev, "can't add i2c driver\n");
- return ret;
+ if (wm8731_codec) {
+ dev_err(codec->dev, "Another WM8731 is registered\n");
+ return -EINVAL;
}
- memset(&info, 0, sizeof(struct i2c_board_info));
- info.addr = setup->i2c_address;
- strlcpy(info.type, "wm8731", I2C_NAME_SIZE);
+ mutex_init(&codec->mutex);
+ INIT_LIST_HEAD(&codec->dapm_widgets);
+ INIT_LIST_HEAD(&codec->dapm_paths);
- adapter = i2c_get_adapter(setup->i2c_bus);
- if (!adapter) {
- dev_err(&pdev->dev, "can't get i2c adapter %d\n",
- setup->i2c_bus);
- goto err_driver;
- }
+ codec->private_data = wm8731;
+ codec->name = "WM8731";
+ codec->owner = THIS_MODULE;
+ codec->read = wm8731_read_reg_cache;
+ codec->write = wm8731_write;
+ codec->bias_level = SND_SOC_BIAS_OFF;
+ codec->set_bias_level = wm8731_set_bias_level;
+ codec->dai = &wm8731_dai;
+ codec->num_dai = 1;
+ codec->reg_cache_size = WM8731_CACHEREGNUM;
+ codec->reg_cache = &wm8731->reg_cache;
- client = i2c_new_device(adapter, &info);
- i2c_put_adapter(adapter);
- if (!client) {
- dev_err(&pdev->dev, "can't add i2c device at 0x%x\n",
- (unsigned int)info.addr);
- goto err_driver;
+ memcpy(codec->reg_cache, wm8731_reg, sizeof(wm8731_reg));
+
+ ret = wm8731_reset(codec);
+ if (ret < 0) {
+ dev_err(codec->dev, "Failed to issue reset\n");
+ return ret;
}
- return 0;
+ wm8731_dai.dev = codec->dev;
-err_driver:
- i2c_del_driver(&wm8731_i2c_driver);
- return -ENODEV;
-}
-#endif
+ wm8731_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
-#if defined(CONFIG_SPI_MASTER)
-static int __devinit wm8731_spi_probe(struct spi_device *spi)
-{
- struct snd_soc_device *socdev = wm8731_socdev;
- struct snd_soc_codec *codec = socdev->codec;
- int ret;
+ /* Latch the update bits */
+ reg = wm8731_read_reg_cache(codec, WM8731_LOUT1V);
+ wm8731_write(codec, WM8731_LOUT1V, reg & ~0x0100);
+ reg = wm8731_read_reg_cache(codec, WM8731_ROUT1V);
+ wm8731_write(codec, WM8731_ROUT1V, reg & ~0x0100);
+ reg = wm8731_read_reg_cache(codec, WM8731_LINVOL);
+ wm8731_write(codec, WM8731_LINVOL, reg & ~0x0100);
+ reg = wm8731_read_reg_cache(codec, WM8731_RINVOL);
+ wm8731_write(codec, WM8731_RINVOL, reg & ~0x0100);
- codec->control_data = spi;
+ /* Disable bypass path by default */
+ reg = wm8731_read_reg_cache(codec, WM8731_APANA);
+ wm8731_write(codec, WM8731_APANA, reg & ~0x4);
- ret = wm8731_init(socdev);
- if (ret < 0)
- dev_err(&spi->dev, "failed to initialise WM8731\n");
+ wm8731_codec = codec;
- return ret;
-}
+ ret = snd_soc_register_codec(codec);
+ if (ret != 0) {
+ dev_err(codec->dev, "Failed to register codec: %d\n", ret);
+ return ret;
+ }
+
+ ret = snd_soc_register_dai(&wm8731_dai);
+ if (ret != 0) {
+ dev_err(codec->dev, "Failed to register DAI: %d\n", ret);
+ snd_soc_unregister_codec(codec);
+ return ret;
+ }
-static int __devexit wm8731_spi_remove(struct spi_device *spi)
-{
return 0;
}
-static struct spi_driver wm8731_spi_driver = {
- .driver = {
- .name = "wm8731",
- .bus = &spi_bus_type,
- .owner = THIS_MODULE,
- },
- .probe = wm8731_spi_probe,
- .remove = __devexit_p(wm8731_spi_remove),
-};
+static void wm8731_unregister(struct wm8731_priv *wm8731)
+{
+ wm8731_set_bias_level(&wm8731->codec, SND_SOC_BIAS_OFF);
+ snd_soc_unregister_dai(&wm8731_dai);
+ snd_soc_unregister_codec(&wm8731->codec);
+ kfree(wm8731);
+ wm8731_codec = NULL;
+}
+#if defined(CONFIG_SPI_MASTER)
static int wm8731_spi_write(struct spi_device *spi, const char *data, int len)
{
struct spi_transfer t;
return len;
}
-#endif /* CONFIG_SPI_MASTER */
-static int wm8731_probe(struct platform_device *pdev)
+static int __devinit wm8731_spi_probe(struct spi_device *spi)
{
- struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct wm8731_setup_data *setup;
struct snd_soc_codec *codec;
struct wm8731_priv *wm8731;
- int ret = 0;
-
- pr_info("WM8731 Audio Codec %s", WM8731_VERSION);
-
- setup = socdev->codec_data;
- codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
- if (codec == NULL)
- return -ENOMEM;
wm8731 = kzalloc(sizeof(struct wm8731_priv), GFP_KERNEL);
- if (wm8731 == NULL) {
- kfree(codec);
+ if (wm8731 == NULL)
return -ENOMEM;
- }
- codec->private_data = wm8731;
- socdev->codec = codec;
- mutex_init(&codec->mutex);
- INIT_LIST_HEAD(&codec->dapm_widgets);
- INIT_LIST_HEAD(&codec->dapm_paths);
+ codec = &wm8731->codec;
+ codec->control_data = spi;
+ codec->hw_write = (hw_write_t)wm8731_spi_write;
+ codec->dev = &spi->dev;
- wm8731_socdev = socdev;
- ret = -ENODEV;
+ spi->dev.driver_data = wm8731;
-#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
- if (setup->i2c_address) {
- codec->hw_write = (hw_write_t)i2c_master_send;
- ret = wm8731_add_i2c_device(pdev, setup);
- }
-#endif
-#if defined(CONFIG_SPI_MASTER)
- if (setup->spi) {
- codec->hw_write = (hw_write_t)wm8731_spi_write;
- ret = spi_register_driver(&wm8731_spi_driver);
- if (ret != 0)
- printk(KERN_ERR "can't add spi driver");
- }
-#endif
-
- if (ret != 0) {
- kfree(codec->private_data);
- kfree(codec);
- }
- return ret;
+ return wm8731_register(wm8731);
}
-/* power down chip */
-static int wm8731_remove(struct platform_device *pdev)
+static int __devexit wm8731_spi_remove(struct spi_device *spi)
{
- struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct wm8731_priv *wm8731 = spi->dev.driver_data;
- if (codec->control_data)
- wm8731_set_bias_level(codec, SND_SOC_BIAS_OFF);
+ wm8731_unregister(wm8731);
+
+ return 0;
+}
+
+static struct spi_driver wm8731_spi_driver = {
+ .driver = {
+ .name = "wm8731",
+ .bus = &spi_bus_type,
+ .owner = THIS_MODULE,
+ },
+ .probe = wm8731_spi_probe,
+ .remove = __devexit_p(wm8731_spi_remove),
+};
+#endif /* CONFIG_SPI_MASTER */
- snd_soc_free_pcms(socdev);
- snd_soc_dapm_free(socdev);
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
- i2c_unregister_device(codec->control_data);
- i2c_del_driver(&wm8731_i2c_driver);
-#endif
-#if defined(CONFIG_SPI_MASTER)
- spi_unregister_driver(&wm8731_spi_driver);
-#endif
- kfree(codec->private_data);
- kfree(codec);
+static __devinit int wm8731_i2c_probe(struct i2c_client *i2c,
+ const struct i2c_device_id *id)
+{
+ struct wm8731_priv *wm8731;
+ struct snd_soc_codec *codec;
+
+ wm8731 = kzalloc(sizeof(struct wm8731_priv), GFP_KERNEL);
+ if (wm8731 == NULL)
+ return -ENOMEM;
+
+ codec = &wm8731->codec;
+ codec->hw_write = (hw_write_t)i2c_master_send;
+ i2c_set_clientdata(i2c, wm8731);
+ codec->control_data = i2c;
+
+ codec->dev = &i2c->dev;
+
+ return wm8731_register(wm8731);
+}
+
+static __devexit int wm8731_i2c_remove(struct i2c_client *client)
+{
+ struct wm8731_priv *wm8731 = i2c_get_clientdata(client);
+ wm8731_unregister(wm8731);
return 0;
}
-struct snd_soc_codec_device soc_codec_dev_wm8731 = {
- .probe = wm8731_probe,
- .remove = wm8731_remove,
- .suspend = wm8731_suspend,
- .resume = wm8731_resume,
+static const struct i2c_device_id wm8731_i2c_id[] = {
+ { "wm8731", 0 },
+ { }
};
-EXPORT_SYMBOL_GPL(soc_codec_dev_wm8731);
+MODULE_DEVICE_TABLE(i2c, wm8731_i2c_id);
+
+static struct i2c_driver wm8731_i2c_driver = {
+ .driver = {
+ .name = "WM8731 I2C Codec",
+ .owner = THIS_MODULE,
+ },
+ .probe = wm8731_i2c_probe,
+ .remove = __devexit_p(wm8731_i2c_remove),
+ .id_table = wm8731_i2c_id,
+};
+#endif
static int __init wm8731_modinit(void)
{
- return snd_soc_register_dai(&wm8731_dai);
+ int ret;
+#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
+ ret = i2c_add_driver(&wm8731_i2c_driver);
+ if (ret != 0) {
+ printk(KERN_ERR "Failed to register WM8731 I2C driver: %d\n",
+ ret);
+ }
+#endif
+#if defined(CONFIG_SPI_MASTER)
+ ret = spi_register_driver(&wm8731_spi_driver);
+ if (ret != 0) {
+ printk(KERN_ERR "Failed to register WM8731 SPI driver: %d\n",
+ ret);
+ }
+#endif
+ return 0;
}
module_init(wm8731_modinit);
static void __exit wm8731_exit(void)
{
- snd_soc_unregister_dai(&wm8731_dai);
+#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
+ i2c_del_driver(&wm8731_i2c_driver);
+#endif
+#if defined(CONFIG_SPI_MASTER)
+ spi_unregister_driver(&wm8731_spi_driver);
+#endif
}
module_exit(wm8731_exit);
#define WM8731_SYSCLK 0
#define WM8731_DAI 0
-struct wm8731_setup_data {
- int spi;
- int i2c_bus;
- unsigned short i2c_address;
-};
-
extern struct snd_soc_dai wm8731_dai;
extern struct snd_soc_codec_device soc_codec_dev_wm8731;
};
-/* add non dapm controls */
-static int wm8750_add_controls(struct snd_soc_codec *codec)
-{
- int err, i;
-
- for (i = 0; i < ARRAY_SIZE(wm8750_snd_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&wm8750_snd_controls[i],
- codec, NULL));
- if (err < 0)
- return err;
- }
- return 0;
-}
-
/*
* DAPM Controls
*/
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct wm8750_priv *wm8750 = codec->private_data;
u16 iface = wm8750_read_reg_cache(codec, WM8750_IFACE) & 0x1f3;
u16 srate = wm8750_read_reg_cache(codec, WM8750_SRATE) & 0x1c0;
#define WM8750_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
SNDRV_PCM_FMTBIT_S24_LE)
+static struct snd_soc_dai_ops wm8750_dai_ops = {
+ .hw_params = wm8750_pcm_hw_params,
+ .digital_mute = wm8750_mute,
+ .set_fmt = wm8750_set_dai_fmt,
+ .set_sysclk = wm8750_set_dai_sysclk,
+};
+
struct snd_soc_dai wm8750_dai = {
.name = "WM8750",
.playback = {
.channels_max = 2,
.rates = WM8750_RATES,
.formats = WM8750_FORMATS,},
- .ops = {
- .hw_params = wm8750_pcm_hw_params,
- .digital_mute = wm8750_mute,
- .set_fmt = wm8750_set_dai_fmt,
- .set_sysclk = wm8750_set_dai_sysclk,
- },
+ .ops = &wm8750_dai_ops,
};
EXPORT_SYMBOL_GPL(wm8750_dai);
static int wm8750_suspend(struct platform_device *pdev, pm_message_t state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF);
return 0;
static int wm8750_resume(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int i;
u8 data[2];
u16 *cache = codec->reg_cache;
*/
static int wm8750_init(struct snd_soc_device *socdev)
{
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int reg, ret = 0;
codec->name = "WM8750";
reg = wm8750_read_reg_cache(codec, WM8750_RINVOL);
wm8750_write(codec, WM8750_RINVOL, reg | 0x0100);
- wm8750_add_controls(codec);
+ snd_soc_add_controls(codec, wm8750_snd_controls,
+ ARRAY_SIZE(wm8750_snd_controls));
wm8750_add_widgets(codec);
ret = snd_soc_init_card(socdev);
if (ret < 0) {
const struct i2c_device_id *id)
{
struct snd_soc_device *socdev = wm8750_socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int ret;
i2c_set_clientdata(i2c, codec);
static int __devinit wm8750_spi_probe(struct spi_device *spi)
{
struct snd_soc_device *socdev = wm8750_socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int ret;
codec->control_data = spi;
}
codec->private_data = wm8750;
- socdev->codec = codec;
+ socdev->card->codec = codec;
mutex_init(&codec->mutex);
INIT_LIST_HEAD(&codec->dapm_widgets);
INIT_LIST_HEAD(&codec->dapm_paths);
static int wm8750_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
if (codec->control_data)
wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF);
#include "wm8753.h"
-#define WM8753_VERSION "0.16"
-
static int caps_charge = 2000;
module_param(caps_charge, int, 0);
MODULE_PARM_DESC(caps_charge, "WM8753 cap charge time (msecs)");
static void wm8753_set_dai_mode(struct snd_soc_codec *codec,
unsigned int mode);
-/* codec private data */
-struct wm8753_priv {
- unsigned int sysclk;
- unsigned int pcmclk;
-};
-
/*
* wm8753 register cache
* We can't read the WM8753 register space when we
0x0000, 0x0000
};
+/* codec private data */
+struct wm8753_priv {
+ unsigned int sysclk;
+ unsigned int pcmclk;
+ struct snd_soc_codec codec;
+ u16 reg_cache[ARRAY_SIZE(wm8753_reg)];
+};
+
/*
* read wm8753 register cache
*/
unsigned int reg)
{
u16 *cache = codec->reg_cache;
- if (reg < 1 || reg > (ARRAY_SIZE(wm8753_reg) + 1))
+ if (reg < 1 || reg >= (ARRAY_SIZE(wm8753_reg) + 1))
return -1;
return cache[reg - 1];
}
unsigned int reg, unsigned int value)
{
u16 *cache = codec->reg_cache;
- if (reg < 1 || reg > 0x3f)
+ if (reg < 1 || reg >= (ARRAY_SIZE(wm8753_reg) + 1))
return;
cache[reg - 1] = value;
}
SOC_ENUM("ROUT2 Phase", wm8753_enum[28]),
};
-/* add non dapm controls */
-static int wm8753_add_controls(struct snd_soc_codec *codec)
-{
- int err, i;
-
- for (i = 0; i < ARRAY_SIZE(wm8753_snd_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&wm8753_snd_controls[i],
- codec, NULL));
- if (err < 0)
- return err;
- }
- return 0;
-}
-
/*
* _DAPM_ Controls
*/
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct wm8753_priv *wm8753 = codec->private_data;
u16 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x01f3;
u16 srate = wm8753_read_reg_cache(codec, WM8753_SRATE1) & 0x017f;
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct wm8753_priv *wm8753 = codec->private_data;
u16 srate = wm8753_read_reg_cache(codec, WM8753_SRATE1) & 0x01c0;
u16 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x01f3;
* 3. Voice disabled - HIFI over HIFI
* 4. Voice disabled - HIFI over HIFI, uses voice DAI LRC for capture
*/
+static struct snd_soc_dai_ops wm8753_dai_ops_hifi_mode1 = {
+ .hw_params = wm8753_i2s_hw_params,
+ .digital_mute = wm8753_mute,
+ .set_fmt = wm8753_mode1h_set_dai_fmt,
+ .set_clkdiv = wm8753_set_dai_clkdiv,
+ .set_pll = wm8753_set_dai_pll,
+ .set_sysclk = wm8753_set_dai_sysclk,
+};
+
+static struct snd_soc_dai_ops wm8753_dai_ops_voice_mode1 = {
+ .hw_params = wm8753_pcm_hw_params,
+ .digital_mute = wm8753_mute,
+ .set_fmt = wm8753_mode1v_set_dai_fmt,
+ .set_clkdiv = wm8753_set_dai_clkdiv,
+ .set_pll = wm8753_set_dai_pll,
+ .set_sysclk = wm8753_set_dai_sysclk,
+};
+
+static struct snd_soc_dai_ops wm8753_dai_ops_voice_mode2 = {
+ .hw_params = wm8753_pcm_hw_params,
+ .digital_mute = wm8753_mute,
+ .set_fmt = wm8753_mode2_set_dai_fmt,
+ .set_clkdiv = wm8753_set_dai_clkdiv,
+ .set_pll = wm8753_set_dai_pll,
+ .set_sysclk = wm8753_set_dai_sysclk,
+};
+
+static struct snd_soc_dai_ops wm8753_dai_ops_hifi_mode3 = {
+ .hw_params = wm8753_i2s_hw_params,
+ .digital_mute = wm8753_mute,
+ .set_fmt = wm8753_mode3_4_set_dai_fmt,
+ .set_clkdiv = wm8753_set_dai_clkdiv,
+ .set_pll = wm8753_set_dai_pll,
+ .set_sysclk = wm8753_set_dai_sysclk,
+};
+
+static struct snd_soc_dai_ops wm8753_dai_ops_hifi_mode4 = {
+ .hw_params = wm8753_i2s_hw_params,
+ .digital_mute = wm8753_mute,
+ .set_fmt = wm8753_mode3_4_set_dai_fmt,
+ .set_clkdiv = wm8753_set_dai_clkdiv,
+ .set_pll = wm8753_set_dai_pll,
+ .set_sysclk = wm8753_set_dai_sysclk,
+};
+
static const struct snd_soc_dai wm8753_all_dai[] = {
/* DAI HiFi mode 1 */
{ .name = "WM8753 HiFi",
.channels_max = 2,
.rates = WM8753_RATES,
.formats = WM8753_FORMATS},
- .ops = {
- .hw_params = wm8753_i2s_hw_params,
- .digital_mute = wm8753_mute,
- .set_fmt = wm8753_mode1h_set_dai_fmt,
- .set_clkdiv = wm8753_set_dai_clkdiv,
- .set_pll = wm8753_set_dai_pll,
- .set_sysclk = wm8753_set_dai_sysclk,
- },
+ .ops = &wm8753_dai_ops_hifi_mode1,
},
/* DAI Voice mode 1 */
{ .name = "WM8753 Voice",
.channels_max = 2,
.rates = WM8753_RATES,
.formats = WM8753_FORMATS,},
- .ops = {
- .hw_params = wm8753_pcm_hw_params,
- .digital_mute = wm8753_mute,
- .set_fmt = wm8753_mode1v_set_dai_fmt,
- .set_clkdiv = wm8753_set_dai_clkdiv,
- .set_pll = wm8753_set_dai_pll,
- .set_sysclk = wm8753_set_dai_sysclk,
- },
+ .ops = &wm8753_dai_ops_voice_mode1,
},
/* DAI HiFi mode 2 - dummy */
{ .name = "WM8753 HiFi",
.channels_max = 2,
.rates = WM8753_RATES,
.formats = WM8753_FORMATS,},
- .ops = {
- .hw_params = wm8753_pcm_hw_params,
- .digital_mute = wm8753_mute,
- .set_fmt = wm8753_mode2_set_dai_fmt,
- .set_clkdiv = wm8753_set_dai_clkdiv,
- .set_pll = wm8753_set_dai_pll,
- .set_sysclk = wm8753_set_dai_sysclk,
- },
+ .ops = &wm8753_dai_ops_voice_mode2,
},
/* DAI HiFi mode 3 */
{ .name = "WM8753 HiFi",
.channels_max = 2,
.rates = WM8753_RATES,
.formats = WM8753_FORMATS,},
- .ops = {
- .hw_params = wm8753_i2s_hw_params,
- .digital_mute = wm8753_mute,
- .set_fmt = wm8753_mode3_4_set_dai_fmt,
- .set_clkdiv = wm8753_set_dai_clkdiv,
- .set_pll = wm8753_set_dai_pll,
- .set_sysclk = wm8753_set_dai_sysclk,
- },
+ .ops = &wm8753_dai_ops_hifi_mode3,
},
/* DAI Voice mode 3 - dummy */
{ .name = "WM8753 Voice",
.channels_max = 2,
.rates = WM8753_RATES,
.formats = WM8753_FORMATS,},
- .ops = {
- .hw_params = wm8753_i2s_hw_params,
- .digital_mute = wm8753_mute,
- .set_fmt = wm8753_mode3_4_set_dai_fmt,
- .set_clkdiv = wm8753_set_dai_clkdiv,
- .set_pll = wm8753_set_dai_pll,
- .set_sysclk = wm8753_set_dai_sysclk,
- },
+ .ops = &wm8753_dai_ops_hifi_mode4,
},
/* DAI Voice mode 4 - dummy */
{ .name = "WM8753 Voice",
if (mode < 4) {
int playback_active, capture_active, codec_active, pop_wait;
void *private_data;
+ struct list_head list;
playback_active = wm8753_dai[0].playback.active;
capture_active = wm8753_dai[0].capture.active;
codec_active = wm8753_dai[0].active;
private_data = wm8753_dai[0].private_data;
pop_wait = wm8753_dai[0].pop_wait;
+ list = wm8753_dai[0].list;
wm8753_dai[0] = wm8753_all_dai[mode << 1];
wm8753_dai[0].playback.active = playback_active;
wm8753_dai[0].capture.active = capture_active;
wm8753_dai[0].active = codec_active;
wm8753_dai[0].private_data = private_data;
wm8753_dai[0].pop_wait = pop_wait;
+ wm8753_dai[0].list = list;
playback_active = wm8753_dai[1].playback.active;
capture_active = wm8753_dai[1].capture.active;
codec_active = wm8753_dai[1].active;
private_data = wm8753_dai[1].private_data;
pop_wait = wm8753_dai[1].pop_wait;
+ list = wm8753_dai[1].list;
wm8753_dai[1] = wm8753_all_dai[(mode << 1) + 1];
wm8753_dai[1].playback.active = playback_active;
wm8753_dai[1].capture.active = capture_active;
wm8753_dai[1].active = codec_active;
wm8753_dai[1].private_data = private_data;
wm8753_dai[1].pop_wait = pop_wait;
+ wm8753_dai[1].list = list;
}
wm8753_dai[0].codec = codec;
wm8753_dai[1].codec = codec;
static int wm8753_suspend(struct platform_device *pdev, pm_message_t state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
/* we only need to suspend if we are a valid card */
if (!codec->card)
static int wm8753_resume(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int i;
u8 data[2];
u16 *cache = codec->reg_cache;
for (i = 0; i < ARRAY_SIZE(wm8753_reg); i++) {
if (i + 1 == WM8753_RESET)
continue;
+
+ /* No point in writing hardware default values back */
+ if (cache[i] == wm8753_reg[i])
+ continue;
+
data[0] = ((i + 1) << 1) | ((cache[i] >> 8) & 0x0001);
data[1] = cache[i] & 0x00ff;
codec->hw_write(codec->control_data, data, 2);
return 0;
}
+static struct snd_soc_codec *wm8753_codec;
+
+static int wm8753_probe(struct platform_device *pdev)
+{
+ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+ struct snd_soc_codec *codec;
+ int ret = 0;
+
+ if (!wm8753_codec) {
+ dev_err(&pdev->dev, "WM8753 codec not yet registered\n");
+ return -EINVAL;
+ }
+
+ socdev->card->codec = wm8753_codec;
+ codec = wm8753_codec;
+
+ wm8753_set_dai_mode(codec, 0);
+
+ /* register pcms */
+ ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
+ if (ret < 0) {
+ printk(KERN_ERR "wm8753: failed to create pcms\n");
+ goto pcm_err;
+ }
+
+ snd_soc_add_controls(codec, wm8753_snd_controls,
+ ARRAY_SIZE(wm8753_snd_controls));
+ wm8753_add_widgets(codec);
+ ret = snd_soc_init_card(socdev);
+ if (ret < 0) {
+ printk(KERN_ERR "wm8753: failed to register card\n");
+ goto card_err;
+ }
+
+ return 0;
+
+card_err:
+ snd_soc_free_pcms(socdev);
+ snd_soc_dapm_free(socdev);
+
+pcm_err:
+ return ret;
+}
+
/*
- * initialise the WM8753 driver
- * register the mixer and dsp interfaces with the kernel
+ * This function forces any delayed work to be queued and run.
*/
-static int wm8753_init(struct snd_soc_device *socdev)
+static int run_delayed_work(struct delayed_work *dwork)
+{
+ int ret;
+
+ /* cancel any work waiting to be queued. */
+ ret = cancel_delayed_work(dwork);
+
+ /* if there was any work waiting then we run it now and
+ * wait for it's completion */
+ if (ret) {
+ schedule_delayed_work(dwork, 0);
+ flush_scheduled_work();
+ }
+ return ret;
+}
+
+/* power down chip */
+static int wm8753_remove(struct platform_device *pdev)
{
- struct snd_soc_codec *codec = socdev->codec;
- int reg, ret = 0;
+ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+
+ snd_soc_free_pcms(socdev);
+ snd_soc_dapm_free(socdev);
+
+ return 0;
+}
+
+struct snd_soc_codec_device soc_codec_dev_wm8753 = {
+ .probe = wm8753_probe,
+ .remove = wm8753_remove,
+ .suspend = wm8753_suspend,
+ .resume = wm8753_resume,
+};
+EXPORT_SYMBOL_GPL(soc_codec_dev_wm8753);
+
+static int wm8753_register(struct wm8753_priv *wm8753)
+{
+ int ret, i;
+ struct snd_soc_codec *codec = &wm8753->codec;
+ u16 reg;
+
+ if (wm8753_codec) {
+ dev_err(codec->dev, "Multiple WM8753 devices not supported\n");
+ ret = -EINVAL;
+ goto err;
+ }
+
+ mutex_init(&codec->mutex);
+ INIT_LIST_HEAD(&codec->dapm_widgets);
+ INIT_LIST_HEAD(&codec->dapm_paths);
codec->name = "WM8753";
codec->owner = THIS_MODULE;
codec->read = wm8753_read_reg_cache;
codec->write = wm8753_write;
+ codec->bias_level = SND_SOC_BIAS_STANDBY;
codec->set_bias_level = wm8753_set_bias_level;
codec->dai = wm8753_dai;
codec->num_dai = 2;
- codec->reg_cache_size = ARRAY_SIZE(wm8753_reg);
- codec->reg_cache = kmemdup(wm8753_reg, sizeof(wm8753_reg), GFP_KERNEL);
-
- if (codec->reg_cache == NULL)
- return -ENOMEM;
-
- wm8753_set_dai_mode(codec, 0);
+ codec->reg_cache_size = ARRAY_SIZE(wm8753->reg_cache);
+ codec->reg_cache = &wm8753->reg_cache;
+ codec->private_data = wm8753;
- wm8753_reset(codec);
+ memcpy(codec->reg_cache, wm8753_reg, sizeof(codec->reg_cache));
+ INIT_DELAYED_WORK(&codec->delayed_work, wm8753_work);
- /* register pcms */
- ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
+ ret = wm8753_reset(codec);
if (ret < 0) {
- printk(KERN_ERR "wm8753: failed to create pcms\n");
- goto pcm_err;
+ dev_err(codec->dev, "Failed to issue reset\n");
+ goto err;
}
/* charge output caps */
wm8753_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
- codec->bias_level = SND_SOC_BIAS_STANDBY;
schedule_delayed_work(&codec->delayed_work,
- msecs_to_jiffies(caps_charge));
+ msecs_to_jiffies(caps_charge));
/* set the update bits */
reg = wm8753_read_reg_cache(codec, WM8753_LDAC);
reg = wm8753_read_reg_cache(codec, WM8753_RINVOL);
wm8753_write(codec, WM8753_RINVOL, reg | 0x0100);
- wm8753_add_controls(codec);
- wm8753_add_widgets(codec);
- ret = snd_soc_init_card(socdev);
- if (ret < 0) {
- printk(KERN_ERR "wm8753: failed to register card\n");
- goto card_err;
+ wm8753_codec = codec;
+
+ for (i = 0; i < ARRAY_SIZE(wm8753_dai); i++)
+ wm8753_dai[i].dev = codec->dev;
+
+ ret = snd_soc_register_codec(codec);
+ if (ret != 0) {
+ dev_err(codec->dev, "Failed to register codec: %d\n", ret);
+ goto err;
}
- return ret;
+ ret = snd_soc_register_dais(&wm8753_dai[0], ARRAY_SIZE(wm8753_dai));
+ if (ret != 0) {
+ dev_err(codec->dev, "Failed to register DAIs: %d\n", ret);
+ goto err_codec;
+ }
-card_err:
- snd_soc_free_pcms(socdev);
- snd_soc_dapm_free(socdev);
-pcm_err:
- kfree(codec->reg_cache);
+ return 0;
+
+err_codec:
+ run_delayed_work(&codec->delayed_work);
+ snd_soc_unregister_codec(codec);
+err:
+ kfree(wm8753);
return ret;
}
-/* If the i2c layer weren't so broken, we could pass this kind of data
- around */
-static struct snd_soc_device *wm8753_socdev;
+static void wm8753_unregister(struct wm8753_priv *wm8753)
+{
+ wm8753_set_bias_level(&wm8753->codec, SND_SOC_BIAS_OFF);
+ run_delayed_work(&wm8753->codec.delayed_work);
+ snd_soc_unregister_dais(&wm8753_dai[0], ARRAY_SIZE(wm8753_dai));
+ snd_soc_unregister_codec(&wm8753->codec);
+ kfree(wm8753);
+ wm8753_codec = NULL;
+}
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
-/*
- * WM8753 2 wire address is determined by GPIO5
- * state during powerup.
- * low = 0x1a
- * high = 0x1b
- */
-
static int wm8753_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
{
- struct snd_soc_device *socdev = wm8753_socdev;
- struct snd_soc_codec *codec = socdev->codec;
- int ret;
+ struct snd_soc_codec *codec;
+ struct wm8753_priv *wm8753;
- i2c_set_clientdata(i2c, codec);
- codec->control_data = i2c;
+ wm8753 = kzalloc(sizeof(struct wm8753_priv), GFP_KERNEL);
+ if (wm8753 == NULL)
+ return -ENOMEM;
- ret = wm8753_init(socdev);
- if (ret < 0)
- pr_err("failed to initialise WM8753\n");
+ codec = &wm8753->codec;
+ codec->hw_write = (hw_write_t)i2c_master_send;
+ codec->control_data = i2c;
+ i2c_set_clientdata(i2c, wm8753);
- return ret;
+ codec->dev = &i2c->dev;
+
+ return wm8753_register(wm8753);
}
static int wm8753_i2c_remove(struct i2c_client *client)
{
- struct snd_soc_codec *codec = i2c_get_clientdata(client);
- kfree(codec->reg_cache);
- return 0;
+ struct wm8753_priv *wm8753 = i2c_get_clientdata(client);
+ wm8753_unregister(wm8753);
+ return 0;
}
static const struct i2c_device_id wm8753_i2c_id[] = {
static struct i2c_driver wm8753_i2c_driver = {
.driver = {
- .name = "WM8753 I2C Codec",
+ .name = "wm8753",
.owner = THIS_MODULE,
},
.probe = wm8753_i2c_probe,
.remove = wm8753_i2c_remove,
.id_table = wm8753_i2c_id,
};
-
-static int wm8753_add_i2c_device(struct platform_device *pdev,
- const struct wm8753_setup_data *setup)
-{
- struct i2c_board_info info;
- struct i2c_adapter *adapter;
- struct i2c_client *client;
- int ret;
-
- ret = i2c_add_driver(&wm8753_i2c_driver);
- if (ret != 0) {
- dev_err(&pdev->dev, "can't add i2c driver\n");
- return ret;
- }
-
- memset(&info, 0, sizeof(struct i2c_board_info));
- info.addr = setup->i2c_address;
- strlcpy(info.type, "wm8753", I2C_NAME_SIZE);
-
- adapter = i2c_get_adapter(setup->i2c_bus);
- if (!adapter) {
- dev_err(&pdev->dev, "can't get i2c adapter %d\n",
- setup->i2c_bus);
- goto err_driver;
- }
-
- client = i2c_new_device(adapter, &info);
- i2c_put_adapter(adapter);
- if (!client) {
- dev_err(&pdev->dev, "can't add i2c device at 0x%x\n",
- (unsigned int)info.addr);
- goto err_driver;
- }
-
- return 0;
-
-err_driver:
- i2c_del_driver(&wm8753_i2c_driver);
- return -ENODEV;
-}
#endif
#if defined(CONFIG_SPI_MASTER)
-static int __devinit wm8753_spi_probe(struct spi_device *spi)
-{
- struct snd_soc_device *socdev = wm8753_socdev;
- struct snd_soc_codec *codec = socdev->codec;
- int ret;
-
- codec->control_data = spi;
-
- ret = wm8753_init(socdev);
- if (ret < 0)
- dev_err(&spi->dev, "failed to initialise WM8753\n");
-
- return ret;
-}
-
-static int __devexit wm8753_spi_remove(struct spi_device *spi)
-{
- return 0;
-}
-
-static struct spi_driver wm8753_spi_driver = {
- .driver = {
- .name = "wm8753",
- .bus = &spi_bus_type,
- .owner = THIS_MODULE,
- },
- .probe = wm8753_spi_probe,
- .remove = __devexit_p(wm8753_spi_remove),
-};
-
static int wm8753_spi_write(struct spi_device *spi, const char *data, int len)
{
struct spi_transfer t;
return len;
}
-#endif
-
-static int wm8753_probe(struct platform_device *pdev)
+static int __devinit wm8753_spi_probe(struct spi_device *spi)
{
- struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct wm8753_setup_data *setup;
struct snd_soc_codec *codec;
struct wm8753_priv *wm8753;
- int ret = 0;
-
- pr_info("WM8753 Audio Codec %s", WM8753_VERSION);
-
- setup = socdev->codec_data;
- codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
- if (codec == NULL)
- return -ENOMEM;
wm8753 = kzalloc(sizeof(struct wm8753_priv), GFP_KERNEL);
- if (wm8753 == NULL) {
- kfree(codec);
+ if (wm8753 == NULL)
return -ENOMEM;
- }
- codec->private_data = wm8753;
- socdev->codec = codec;
- mutex_init(&codec->mutex);
- INIT_LIST_HEAD(&codec->dapm_widgets);
- INIT_LIST_HEAD(&codec->dapm_paths);
- wm8753_socdev = socdev;
- INIT_DELAYED_WORK(&codec->delayed_work, wm8753_work);
+ codec = &wm8753->codec;
+ codec->control_data = spi;
+ codec->hw_write = (hw_write_t)wm8753_spi_write;
+ codec->dev = &spi->dev;
-#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
- if (setup->i2c_address) {
- codec->hw_write = (hw_write_t)i2c_master_send;
- ret = wm8753_add_i2c_device(pdev, setup);
- }
-#endif
-#if defined(CONFIG_SPI_MASTER)
- if (setup->spi) {
- codec->hw_write = (hw_write_t)wm8753_spi_write;
- ret = spi_register_driver(&wm8753_spi_driver);
- if (ret != 0)
- printk(KERN_ERR "can't add spi driver");
- }
-#endif
+ spi->dev.driver_data = wm8753;
- if (ret != 0) {
- kfree(codec->private_data);
- kfree(codec);
- }
- return ret;
+ return wm8753_register(wm8753);
}
-/*
- * This function forces any delayed work to be queued and run.
- */
-static int run_delayed_work(struct delayed_work *dwork)
+static int __devexit wm8753_spi_remove(struct spi_device *spi)
{
- int ret;
-
- /* cancel any work waiting to be queued. */
- ret = cancel_delayed_work(dwork);
-
- /* if there was any work waiting then we run it now and
- * wait for it's completion */
- if (ret) {
- schedule_delayed_work(dwork, 0);
- flush_scheduled_work();
- }
- return ret;
+ struct wm8753_priv *wm8753 = spi->dev.driver_data;
+ wm8753_unregister(wm8753);
+ return 0;
}
-/* power down chip */
-static int wm8753_remove(struct platform_device *pdev)
-{
- struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+static struct spi_driver wm8753_spi_driver = {
+ .driver = {
+ .name = "wm8753",
+ .bus = &spi_bus_type,
+ .owner = THIS_MODULE,
+ },
+ .probe = wm8753_spi_probe,
+ .remove = __devexit_p(wm8753_spi_remove),
+};
+#endif
- if (codec->control_data)
- wm8753_set_bias_level(codec, SND_SOC_BIAS_OFF);
- run_delayed_work(&codec->delayed_work);
- snd_soc_free_pcms(socdev);
- snd_soc_dapm_free(socdev);
+static int __init wm8753_modinit(void)
+{
+ int ret;
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
- i2c_unregister_device(codec->control_data);
- i2c_del_driver(&wm8753_i2c_driver);
+ ret = i2c_add_driver(&wm8753_i2c_driver);
+ if (ret != 0)
+ pr_err("Failed to register WM8753 I2C driver: %d\n", ret);
#endif
#if defined(CONFIG_SPI_MASTER)
- spi_unregister_driver(&wm8753_spi_driver);
+ ret = spi_register_driver(&wm8753_spi_driver);
+ if (ret != 0)
+ pr_err("Failed to register WM8753 SPI driver: %d\n", ret);
#endif
- kfree(codec->private_data);
- kfree(codec);
-
return 0;
}
-
-struct snd_soc_codec_device soc_codec_dev_wm8753 = {
- .probe = wm8753_probe,
- .remove = wm8753_remove,
- .suspend = wm8753_suspend,
- .resume = wm8753_resume,
-};
-EXPORT_SYMBOL_GPL(soc_codec_dev_wm8753);
-
-static int __init wm8753_modinit(void)
-{
- return snd_soc_register_dais(wm8753_dai, ARRAY_SIZE(wm8753_dai));
-}
module_init(wm8753_modinit);
static void __exit wm8753_exit(void)
{
- snd_soc_unregister_dais(wm8753_dai, ARRAY_SIZE(wm8753_dai));
+#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
+ i2c_del_driver(&wm8753_i2c_driver);
+#endif
+#if defined(CONFIG_SPI_MASTER)
+ spi_unregister_driver(&wm8753_spi_driver);
+#endif
}
module_exit(wm8753_exit);
#define WM8753_BIASCTL 0x3d
#define WM8753_ADCTL2 0x3f
-struct wm8753_setup_data {
- int spi;
- int i2c_bus;
- unsigned short i2c_address;
-};
-
#define WM8753_PLL1 0
#define WM8753_PLL2 1
};
-/* add non dapm controls */
-static int wm8900_add_controls(struct snd_soc_codec *codec)
-{
- int err, i;
-
- for (i = 0; i < ARRAY_SIZE(wm8900_snd_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&wm8900_snd_controls[i],
- codec, NULL));
- if (err < 0)
- return err;
- }
-
- return 0;
-}
-
static const struct snd_kcontrol_new wm8900_dapm_loutput2_control =
SOC_DAPM_SINGLE("LINEOUT2L Switch", WM8900_REG_POWER3, 6, 1, 0);
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
u16 reg;
reg = wm8900_read(codec, WM8900_REG_AUDIO1) & ~0x60;
(SNDRV_PCM_FORMAT_S16_LE | SNDRV_PCM_FORMAT_S20_3LE | \
SNDRV_PCM_FORMAT_S24_LE)
+static struct snd_soc_dai_ops wm8900_dai_ops = {
+ .hw_params = wm8900_hw_params,
+ .set_clkdiv = wm8900_set_dai_clkdiv,
+ .set_pll = wm8900_set_dai_pll,
+ .set_fmt = wm8900_set_dai_fmt,
+ .digital_mute = wm8900_digital_mute,
+};
+
struct snd_soc_dai wm8900_dai = {
.name = "WM8900 HiFi",
.playback = {
.rates = WM8900_RATES,
.formats = WM8900_PCM_FORMATS,
},
- .ops = {
- .hw_params = wm8900_hw_params,
- .set_clkdiv = wm8900_set_dai_clkdiv,
- .set_pll = wm8900_set_dai_pll,
- .set_fmt = wm8900_set_dai_fmt,
- .digital_mute = wm8900_digital_mute,
- },
+ .ops = &wm8900_dai_ops,
};
EXPORT_SYMBOL_GPL(wm8900_dai);
static int wm8900_suspend(struct platform_device *pdev, pm_message_t state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct wm8900_priv *wm8900 = codec->private_data;
int fll_out = wm8900->fll_out;
int fll_in = wm8900->fll_in;
static int wm8900_resume(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct wm8900_priv *wm8900 = codec->private_data;
u16 *cache;
int i, ret;
static struct snd_soc_codec *wm8900_codec;
-static int wm8900_i2c_probe(struct i2c_client *i2c,
- const struct i2c_device_id *id)
+static __devinit int wm8900_i2c_probe(struct i2c_client *i2c,
+ const struct i2c_device_id *id)
{
struct wm8900_priv *wm8900;
struct snd_soc_codec *codec;
return ret;
}
-static int wm8900_i2c_remove(struct i2c_client *client)
+static __devexit int wm8900_i2c_remove(struct i2c_client *client)
{
snd_soc_unregister_dai(&wm8900_dai);
snd_soc_unregister_codec(wm8900_codec);
.owner = THIS_MODULE,
},
.probe = wm8900_i2c_probe,
- .remove = wm8900_i2c_remove,
+ .remove = __devexit_p(wm8900_i2c_remove),
.id_table = wm8900_i2c_id,
};
}
codec = wm8900_codec;
- socdev->codec = codec;
+ socdev->card->codec = codec;
/* Register pcms */
ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
goto pcm_err;
}
- wm8900_add_controls(codec);
+ snd_soc_add_controls(codec, wm8900_snd_controls,
+ ARRAY_SIZE(wm8900_snd_controls));
wm8900_add_widgets(codec);
ret = snd_soc_init_card(socdev);
0, 63, 0, out_tlv),
};
-static int wm8903_add_controls(struct snd_soc_codec *codec)
-{
- int err, i;
-
- for (i = 0; i < ARRAY_SIZE(wm8903_snd_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&wm8903_snd_controls[i],
- codec, NULL));
- if (err < 0)
- return err;
- }
-
- return 0;
-}
-
static const struct snd_kcontrol_new linput_mode_mux =
SOC_DAPM_ENUM("Left Input Mode Mux", linput_mode_enum);
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct wm8903_priv *wm8903 = codec->private_data;
struct i2c_client *i2c = codec->control_data;
struct snd_pcm_runtime *master_runtime;
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct wm8903_priv *wm8903 = codec->private_data;
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct wm8903_priv *wm8903 = codec->private_data;
struct i2c_client *i2c = codec->control_data;
int fs = params_rate(params);
SNDRV_PCM_FMTBIT_S20_3LE |\
SNDRV_PCM_FMTBIT_S24_LE)
+static struct snd_soc_dai_ops wm8903_dai_ops = {
+ .startup = wm8903_startup,
+ .shutdown = wm8903_shutdown,
+ .hw_params = wm8903_hw_params,
+ .digital_mute = wm8903_digital_mute,
+ .set_fmt = wm8903_set_dai_fmt,
+ .set_sysclk = wm8903_set_dai_sysclk,
+};
+
struct snd_soc_dai wm8903_dai = {
.name = "WM8903",
.playback = {
.rates = WM8903_CAPTURE_RATES,
.formats = WM8903_FORMATS,
},
- .ops = {
- .startup = wm8903_startup,
- .shutdown = wm8903_shutdown,
- .hw_params = wm8903_hw_params,
- .digital_mute = wm8903_digital_mute,
- .set_fmt = wm8903_set_dai_fmt,
- .set_sysclk = wm8903_set_dai_sysclk
- }
+ .ops = &wm8903_dai_ops,
};
EXPORT_SYMBOL_GPL(wm8903_dai);
static int wm8903_suspend(struct platform_device *pdev, pm_message_t state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
wm8903_set_bias_level(codec, SND_SOC_BIAS_OFF);
static int wm8903_resume(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct i2c_client *i2c = codec->control_data;
int i;
u16 *reg_cache = codec->reg_cache;
static struct snd_soc_codec *wm8903_codec;
-static int wm8903_i2c_probe(struct i2c_client *i2c,
- const struct i2c_device_id *id)
+static __devinit int wm8903_i2c_probe(struct i2c_client *i2c,
+ const struct i2c_device_id *id)
{
struct wm8903_priv *wm8903;
struct snd_soc_codec *codec;
return ret;
}
-static int wm8903_i2c_remove(struct i2c_client *client)
+static __devexit int wm8903_i2c_remove(struct i2c_client *client)
{
struct snd_soc_codec *codec = i2c_get_clientdata(client);
.owner = THIS_MODULE,
},
.probe = wm8903_i2c_probe,
- .remove = wm8903_i2c_remove,
+ .remove = __devexit_p(wm8903_i2c_remove),
.id_table = wm8903_i2c_id,
};
goto err;
}
- socdev->codec = wm8903_codec;
+ socdev->card->codec = wm8903_codec;
/* register pcms */
ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
goto err;
}
- wm8903_add_controls(socdev->codec);
- wm8903_add_widgets(socdev->codec);
+ snd_soc_add_controls(socdev->card->codec, wm8903_snd_controls,
+ ARRAY_SIZE(wm8903_snd_controls));
+ wm8903_add_widgets(socdev->card->codec);
ret = snd_soc_init_card(socdev);
if (ret < 0) {
static int wm8903_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
if (codec->control_data)
wm8903_set_bias_level(codec, SND_SOC_BIAS_OFF);
SOC_DOUBLE_R("Mic Boost", WM8971_LADCIN, WM8971_RADCIN, 4, 3, 0),
};
-/* add non-DAPM controls */
-static int wm8971_add_controls(struct snd_soc_codec *codec)
-{
- int err, i;
-
- for (i = 0; i < ARRAY_SIZE(wm8971_snd_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&wm8971_snd_controls[i],
- codec, NULL));
- if (err < 0)
- return err;
- }
- return 0;
-}
-
/*
* DAPM Controls
*/
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct wm8971_priv *wm8971 = codec->private_data;
u16 iface = wm8971_read_reg_cache(codec, WM8971_IFACE) & 0x1f3;
u16 srate = wm8971_read_reg_cache(codec, WM8971_SRATE) & 0x1c0;
#define WM8971_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
SNDRV_PCM_FMTBIT_S24_LE)
+static struct snd_soc_dai_ops wm8971_dai_ops = {
+ .hw_params = wm8971_pcm_hw_params,
+ .digital_mute = wm8971_mute,
+ .set_fmt = wm8971_set_dai_fmt,
+ .set_sysclk = wm8971_set_dai_sysclk,
+};
+
struct snd_soc_dai wm8971_dai = {
.name = "WM8971",
.playback = {
.channels_max = 2,
.rates = WM8971_RATES,
.formats = WM8971_FORMATS,},
- .ops = {
- .hw_params = wm8971_pcm_hw_params,
- .digital_mute = wm8971_mute,
- .set_fmt = wm8971_set_dai_fmt,
- .set_sysclk = wm8971_set_dai_sysclk,
- },
+ .ops = &wm8971_dai_ops,
};
EXPORT_SYMBOL_GPL(wm8971_dai);
static int wm8971_suspend(struct platform_device *pdev, pm_message_t state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
wm8971_set_bias_level(codec, SND_SOC_BIAS_OFF);
return 0;
static int wm8971_resume(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int i;
u8 data[2];
u16 *cache = codec->reg_cache;
static int wm8971_init(struct snd_soc_device *socdev)
{
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int reg, ret = 0;
codec->name = "WM8971";
reg = wm8971_read_reg_cache(codec, WM8971_RINVOL);
wm8971_write(codec, WM8971_RINVOL, reg | 0x0100);
- wm8971_add_controls(codec);
+ snd_soc_add_controls(codec, wm8971_snd_controls,
+ ARRAY_SIZE(wm8971_snd_controls));
wm8971_add_widgets(codec);
ret = snd_soc_init_card(socdev);
if (ret < 0) {
const struct i2c_device_id *id)
{
struct snd_soc_device *socdev = wm8971_socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int ret;
i2c_set_clientdata(i2c, codec);
}
codec->private_data = wm8971;
- socdev->codec = codec;
+ socdev->card->codec = codec;
mutex_init(&codec->mutex);
INIT_LIST_HEAD(&codec->dapm_widgets);
INIT_LIST_HEAD(&codec->dapm_paths);
static int wm8971_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
if (codec->control_data)
wm8971_set_bias_level(codec, SND_SOC_BIAS_OFF);
unsigned int reg)
{
u16 *cache = codec->reg_cache;
- BUG_ON(reg > (ARRAY_SIZE(wm8990_reg)) - 1);
+ BUG_ON(reg >= ARRAY_SIZE(wm8990_reg));
return cache[reg];
}
u16 *cache = codec->reg_cache;
/* Reset register and reserved registers are uncached */
- if (reg == 0 || reg > ARRAY_SIZE(wm8990_reg) - 1)
+ if (reg == 0 || reg >= ARRAY_SIZE(wm8990_reg))
return;
cache[reg] = value;
};
-/* add non dapm controls */
-static int wm8990_add_controls(struct snd_soc_codec *codec)
-{
- int err, i;
-
- for (i = 0; i < ARRAY_SIZE(wm8990_snd_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&wm8990_snd_controls[i], codec,
- NULL));
- if (err < 0)
- return err;
- }
- return 0;
-}
-
/*
* _DAPM_ Controls
*/
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
u16 audio1 = wm8990_read_reg_cache(codec, WM8990_AUDIO_INTERFACE_1);
audio1 &= ~WM8990_AIF_WL_MASK;
* 1. ADC/DAC on Primary Interface
* 2. ADC on Primary Interface/DAC on secondary
*/
+static struct snd_soc_dai_ops wm8990_dai_ops = {
+ .hw_params = wm8990_hw_params,
+ .digital_mute = wm8990_mute,
+ .set_fmt = wm8990_set_dai_fmt,
+ .set_clkdiv = wm8990_set_dai_clkdiv,
+ .set_pll = wm8990_set_dai_pll,
+ .set_sysclk = wm8990_set_dai_sysclk,
+};
+
struct snd_soc_dai wm8990_dai = {
/* ADC/DAC on primary */
.name = "WM8990 ADC/DAC Primary",
.channels_max = 2,
.rates = WM8990_RATES,
.formats = WM8990_FORMATS,},
- .ops = {
- .hw_params = wm8990_hw_params,
- .digital_mute = wm8990_mute,
- .set_fmt = wm8990_set_dai_fmt,
- .set_clkdiv = wm8990_set_dai_clkdiv,
- .set_pll = wm8990_set_dai_pll,
- .set_sysclk = wm8990_set_dai_sysclk,
- },
+ .ops = &wm8990_dai_ops,
};
EXPORT_SYMBOL_GPL(wm8990_dai);
static int wm8990_suspend(struct platform_device *pdev, pm_message_t state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
/* we only need to suspend if we are a valid card */
if (!codec->card)
static int wm8990_resume(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int i;
u8 data[2];
u16 *cache = codec->reg_cache;
*/
static int wm8990_init(struct snd_soc_device *socdev)
{
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
u16 reg;
int ret = 0;
wm8990_write(codec, WM8990_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8));
wm8990_write(codec, WM8990_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8));
- wm8990_add_controls(codec);
+ snd_soc_add_controls(codec, wm8990_snd_controls,
+ ARRAY_SIZE(wm8990_snd_controls));
wm8990_add_widgets(codec);
ret = snd_soc_init_card(socdev);
if (ret < 0) {
const struct i2c_device_id *id)
{
struct snd_soc_device *socdev = wm8990_socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int ret;
i2c_set_clientdata(i2c, codec);
}
codec->private_data = wm8990;
- socdev->codec = codec;
+ socdev->card->codec = codec;
mutex_init(&codec->mutex);
INIT_LIST_HEAD(&codec->dapm_widgets);
INIT_LIST_HEAD(&codec->dapm_paths);
static int wm8990_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
if (codec->control_data)
wm8990_set_bias_level(codec, SND_SOC_BIAS_OFF);
--- /dev/null
+/*
+ * wm9705.c -- ALSA Soc WM9705 codec support
+ *
+ * Copyright 2008 Ian Molton <spyro@f2s.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; Version 2 of the License only.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/ac97_codec.h>
+#include <sound/initval.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+
+#include "wm9705.h"
+
+/*
+ * WM9705 register cache
+ */
+static const u16 wm9705_reg[] = {
+ 0x6150, 0x8000, 0x8000, 0x8000, /* 0x0 */
+ 0x0000, 0x8000, 0x8008, 0x8008, /* 0x8 */
+ 0x8808, 0x8808, 0x8808, 0x8808, /* 0x10 */
+ 0x8808, 0x0000, 0x8000, 0x0000, /* 0x18 */
+ 0x0000, 0x0000, 0x0000, 0x000f, /* 0x20 */
+ 0x0605, 0x0000, 0xbb80, 0x0000, /* 0x28 */
+ 0x0000, 0xbb80, 0x0000, 0x0000, /* 0x30 */
+ 0x0000, 0x2000, 0x0000, 0x0000, /* 0x38 */
+ 0x0000, 0x0000, 0x0000, 0x0000, /* 0x40 */
+ 0x0000, 0x0000, 0x0000, 0x0000, /* 0x48 */
+ 0x0000, 0x0000, 0x0000, 0x0000, /* 0x50 */
+ 0x0000, 0x0000, 0x0000, 0x0000, /* 0x58 */
+ 0x0000, 0x0000, 0x0000, 0x0000, /* 0x60 */
+ 0x0000, 0x0000, 0x0000, 0x0000, /* 0x68 */
+ 0x0000, 0x0808, 0x0000, 0x0006, /* 0x70 */
+ 0x0000, 0x0000, 0x574d, 0x4c05, /* 0x78 */
+};
+
+static const struct snd_kcontrol_new wm9705_snd_ac97_controls[] = {
+ SOC_DOUBLE("Master Playback Volume", AC97_MASTER, 8, 0, 31, 1),
+ SOC_SINGLE("Master Playback Switch", AC97_MASTER, 15, 1, 1),
+ SOC_DOUBLE("Headphone Playback Volume", AC97_HEADPHONE, 8, 0, 31, 1),
+ SOC_SINGLE("Headphone Playback Switch", AC97_HEADPHONE, 15, 1, 1),
+ SOC_DOUBLE("PCM Playback Volume", AC97_PCM, 8, 0, 31, 1),
+ SOC_SINGLE("PCM Playback Switch", AC97_PCM, 15, 1, 1),
+ SOC_SINGLE("Mono Playback Volume", AC97_MASTER_MONO, 0, 31, 1),
+ SOC_SINGLE("Mono Playback Switch", AC97_MASTER_MONO, 15, 1, 1),
+ SOC_SINGLE("PCBeep Playback Volume", AC97_PC_BEEP, 1, 15, 1),
+ SOC_SINGLE("Phone Playback Volume", AC97_PHONE, 0, 31, 1),
+ SOC_DOUBLE("Line Playback Volume", AC97_LINE, 8, 0, 31, 1),
+ SOC_DOUBLE("CD Playback Volume", AC97_CD, 8, 0, 31, 1),
+ SOC_SINGLE("Mic Playback Volume", AC97_MIC, 0, 31, 1),
+ SOC_SINGLE("Mic 20dB Boost Switch", AC97_MIC, 6, 1, 0),
+ SOC_DOUBLE("Capture Volume", AC97_REC_GAIN, 8, 0, 15, 0),
+ SOC_SINGLE("Capture Switch", AC97_REC_GAIN, 15, 1, 1),
+};
+
+static const char *wm9705_mic[] = {"Mic 1", "Mic 2"};
+static const char *wm9705_rec_sel[] = {"Mic", "CD", "NC", "NC",
+ "Line", "Stereo Mix", "Mono Mix", "Phone"};
+
+static const struct soc_enum wm9705_enum_mic =
+ SOC_ENUM_SINGLE(AC97_GENERAL_PURPOSE, 8, 2, wm9705_mic);
+static const struct soc_enum wm9705_enum_rec_l =
+ SOC_ENUM_SINGLE(AC97_REC_SEL, 8, 8, wm9705_rec_sel);
+static const struct soc_enum wm9705_enum_rec_r =
+ SOC_ENUM_SINGLE(AC97_REC_SEL, 0, 8, wm9705_rec_sel);
+
+/* Headphone Mixer */
+static const struct snd_kcontrol_new wm9705_hp_mixer_controls[] = {
+ SOC_DAPM_SINGLE("PCBeep Playback Switch", AC97_PC_BEEP, 15, 1, 1),
+ SOC_DAPM_SINGLE("CD Playback Switch", AC97_CD, 15, 1, 1),
+ SOC_DAPM_SINGLE("Mic Playback Switch", AC97_MIC, 15, 1, 1),
+ SOC_DAPM_SINGLE("Phone Playback Switch", AC97_PHONE, 15, 1, 1),
+ SOC_DAPM_SINGLE("Line Playback Switch", AC97_LINE, 15, 1, 1),
+};
+
+/* Mic source */
+static const struct snd_kcontrol_new wm9705_mic_src_controls =
+ SOC_DAPM_ENUM("Route", wm9705_enum_mic);
+
+/* Capture source */
+static const struct snd_kcontrol_new wm9705_capture_selectl_controls =
+ SOC_DAPM_ENUM("Route", wm9705_enum_rec_l);
+static const struct snd_kcontrol_new wm9705_capture_selectr_controls =
+ SOC_DAPM_ENUM("Route", wm9705_enum_rec_r);
+
+/* DAPM widgets */
+static const struct snd_soc_dapm_widget wm9705_dapm_widgets[] = {
+ SND_SOC_DAPM_MUX("Mic Source", SND_SOC_NOPM, 0, 0,
+ &wm9705_mic_src_controls),
+ SND_SOC_DAPM_MUX("Left Capture Source", SND_SOC_NOPM, 0, 0,
+ &wm9705_capture_selectl_controls),
+ SND_SOC_DAPM_MUX("Right Capture Source", SND_SOC_NOPM, 0, 0,
+ &wm9705_capture_selectr_controls),
+ SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback",
+ SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback",
+ SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_MIXER_NAMED_CTL("HP Mixer", SND_SOC_NOPM, 0, 0,
+ &wm9705_hp_mixer_controls[0],
+ ARRAY_SIZE(wm9705_hp_mixer_controls)),
+ SND_SOC_DAPM_MIXER("Mono Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_ADC("Left ADC", "Left HiFi Capture", SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_ADC("Right ADC", "Right HiFi Capture", SND_SOC_NOPM, 0, 0),
+ SND_SOC_DAPM_PGA("Headphone PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("Speaker PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("Line PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("Line out PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("Mono PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("Phone PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("Mic PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("PCBEEP PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("CD PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_PGA("ADC PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
+ SND_SOC_DAPM_OUTPUT("HPOUTL"),
+ SND_SOC_DAPM_OUTPUT("HPOUTR"),
+ SND_SOC_DAPM_OUTPUT("LOUT"),
+ SND_SOC_DAPM_OUTPUT("ROUT"),
+ SND_SOC_DAPM_OUTPUT("MONOOUT"),
+ SND_SOC_DAPM_INPUT("PHONE"),
+ SND_SOC_DAPM_INPUT("LINEINL"),
+ SND_SOC_DAPM_INPUT("LINEINR"),
+ SND_SOC_DAPM_INPUT("CDINL"),
+ SND_SOC_DAPM_INPUT("CDINR"),
+ SND_SOC_DAPM_INPUT("PCBEEP"),
+ SND_SOC_DAPM_INPUT("MIC1"),
+ SND_SOC_DAPM_INPUT("MIC2"),
+};
+
+/* Audio map
+ * WM9705 has no switches to disable the route from the inputs to the HP mixer
+ * so in order to prevent active inputs from forcing the audio outputs to be
+ * constantly enabled, we use the mutes on those inputs to simulate such
+ * controls.
+ */
+static const struct snd_soc_dapm_route audio_map[] = {
+ /* HP mixer */
+ {"HP Mixer", "PCBeep Playback Switch", "PCBEEP PGA"},
+ {"HP Mixer", "CD Playback Switch", "CD PGA"},
+ {"HP Mixer", "Mic Playback Switch", "Mic PGA"},
+ {"HP Mixer", "Phone Playback Switch", "Phone PGA"},
+ {"HP Mixer", "Line Playback Switch", "Line PGA"},
+ {"HP Mixer", NULL, "Left DAC"},
+ {"HP Mixer", NULL, "Right DAC"},
+
+ /* mono mixer */
+ {"Mono Mixer", NULL, "HP Mixer"},
+
+ /* outputs */
+ {"Headphone PGA", NULL, "HP Mixer"},
+ {"HPOUTL", NULL, "Headphone PGA"},
+ {"HPOUTR", NULL, "Headphone PGA"},
+ {"Line out PGA", NULL, "HP Mixer"},
+ {"LOUT", NULL, "Line out PGA"},
+ {"ROUT", NULL, "Line out PGA"},
+ {"Mono PGA", NULL, "Mono Mixer"},
+ {"MONOOUT", NULL, "Mono PGA"},
+
+ /* inputs */
+ {"CD PGA", NULL, "CDINL"},
+ {"CD PGA", NULL, "CDINR"},
+ {"Line PGA", NULL, "LINEINL"},
+ {"Line PGA", NULL, "LINEINR"},
+ {"Phone PGA", NULL, "PHONE"},
+ {"Mic Source", "Mic 1", "MIC1"},
+ {"Mic Source", "Mic 2", "MIC2"},
+ {"Mic PGA", NULL, "Mic Source"},
+ {"PCBEEP PGA", NULL, "PCBEEP"},
+
+ /* Left capture selector */
+ {"Left Capture Source", "Mic", "Mic Source"},
+ {"Left Capture Source", "CD", "CDINL"},
+ {"Left Capture Source", "Line", "LINEINL"},
+ {"Left Capture Source", "Stereo Mix", "HP Mixer"},
+ {"Left Capture Source", "Mono Mix", "HP Mixer"},
+ {"Left Capture Source", "Phone", "PHONE"},
+
+ /* Right capture source */
+ {"Right Capture Source", "Mic", "Mic Source"},
+ {"Right Capture Source", "CD", "CDINR"},
+ {"Right Capture Source", "Line", "LINEINR"},
+ {"Right Capture Source", "Stereo Mix", "HP Mixer"},
+ {"Right Capture Source", "Mono Mix", "HP Mixer"},
+ {"Right Capture Source", "Phone", "PHONE"},
+
+ {"ADC PGA", NULL, "Left Capture Source"},
+ {"ADC PGA", NULL, "Right Capture Source"},
+
+ /* ADC's */
+ {"Left ADC", NULL, "ADC PGA"},
+ {"Right ADC", NULL, "ADC PGA"},
+};
+
+static int wm9705_add_widgets(struct snd_soc_codec *codec)
+{
+ snd_soc_dapm_new_controls(codec, wm9705_dapm_widgets,
+ ARRAY_SIZE(wm9705_dapm_widgets));
+ snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
+ snd_soc_dapm_new_widgets(codec);
+
+ return 0;
+}
+
+/* We use a register cache to enhance read performance. */
+static unsigned int ac97_read(struct snd_soc_codec *codec, unsigned int reg)
+{
+ u16 *cache = codec->reg_cache;
+
+ switch (reg) {
+ case AC97_RESET:
+ case AC97_VENDOR_ID1:
+ case AC97_VENDOR_ID2:
+ return soc_ac97_ops.read(codec->ac97, reg);
+ default:
+ reg = reg >> 1;
+
+ if (reg >= (ARRAY_SIZE(wm9705_reg)))
+ return -EIO;
+
+ return cache[reg];
+ }
+}
+
+static int ac97_write(struct snd_soc_codec *codec, unsigned int reg,
+ unsigned int val)
+{
+ u16 *cache = codec->reg_cache;
+
+ soc_ac97_ops.write(codec->ac97, reg, val);
+ reg = reg >> 1;
+ if (reg < (ARRAY_SIZE(wm9705_reg)))
+ cache[reg] = val;
+
+ return 0;
+}
+
+static int ac97_prepare(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct snd_soc_device *socdev = rtd->socdev;
+ struct snd_soc_codec *codec = socdev->card->codec;
+ int reg;
+ u16 vra;
+
+ vra = ac97_read(codec, AC97_EXTENDED_STATUS);
+ ac97_write(codec, AC97_EXTENDED_STATUS, vra | 0x1);
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ reg = AC97_PCM_FRONT_DAC_RATE;
+ else
+ reg = AC97_PCM_LR_ADC_RATE;
+
+ return ac97_write(codec, reg, runtime->rate);
+}
+
+#define WM9705_AC97_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | \
+ SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
+ SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
+ SNDRV_PCM_RATE_48000)
+
+static struct snd_soc_dai_ops wm9705_dai_ops = {
+ .prepare = ac97_prepare,
+};
+
+struct snd_soc_dai wm9705_dai[] = {
+ {
+ .name = "AC97 HiFi",
+ .ac97_control = 1,
+ .playback = {
+ .stream_name = "HiFi Playback",
+ .channels_min = 1,
+ .channels_max = 2,
+ .rates = WM9705_AC97_RATES,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ },
+ .capture = {
+ .stream_name = "HiFi Capture",
+ .channels_min = 1,
+ .channels_max = 2,
+ .rates = WM9705_AC97_RATES,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ },
+ .ops = &wm9705_dai_ops,
+ },
+ {
+ .name = "AC97 Aux",
+ .playback = {
+ .stream_name = "Aux Playback",
+ .channels_min = 1,
+ .channels_max = 1,
+ .rates = WM9705_AC97_RATES,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ },
+ }
+};
+EXPORT_SYMBOL_GPL(wm9705_dai);
+
+static int wm9705_reset(struct snd_soc_codec *codec)
+{
+ if (soc_ac97_ops.reset) {
+ soc_ac97_ops.reset(codec->ac97);
+ if (ac97_read(codec, 0) == wm9705_reg[0])
+ return 0; /* Success */
+ }
+
+ return -EIO;
+}
+
+static int wm9705_soc_probe(struct platform_device *pdev)
+{
+ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+ struct snd_soc_codec *codec;
+ int ret = 0;
+
+ printk(KERN_INFO "WM9705 SoC Audio Codec\n");
+
+ socdev->card->codec = kzalloc(sizeof(struct snd_soc_codec),
+ GFP_KERNEL);
+ if (socdev->card->codec == NULL)
+ return -ENOMEM;
+ codec = socdev->card->codec;
+ mutex_init(&codec->mutex);
+
+ codec->reg_cache = kmemdup(wm9705_reg, sizeof(wm9705_reg), GFP_KERNEL);
+ if (codec->reg_cache == NULL) {
+ ret = -ENOMEM;
+ goto cache_err;
+ }
+ codec->reg_cache_size = sizeof(wm9705_reg);
+ codec->reg_cache_step = 2;
+
+ codec->name = "WM9705";
+ codec->owner = THIS_MODULE;
+ codec->dai = wm9705_dai;
+ codec->num_dai = ARRAY_SIZE(wm9705_dai);
+ codec->write = ac97_write;
+ codec->read = ac97_read;
+ INIT_LIST_HEAD(&codec->dapm_widgets);
+ INIT_LIST_HEAD(&codec->dapm_paths);
+
+ ret = snd_soc_new_ac97_codec(codec, &soc_ac97_ops, 0);
+ if (ret < 0) {
+ printk(KERN_ERR "wm9705: failed to register AC97 codec\n");
+ goto codec_err;
+ }
+
+ /* register pcms */
+ ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
+ if (ret < 0)
+ goto pcm_err;
+
+ ret = wm9705_reset(codec);
+ if (ret)
+ goto reset_err;
+
+ snd_soc_add_controls(codec, wm9705_snd_ac97_controls,
+ ARRAY_SIZE(wm9705_snd_ac97_controls));
+ wm9705_add_widgets(codec);
+
+ ret = snd_soc_init_card(socdev);
+ if (ret < 0) {
+ printk(KERN_ERR "wm9705: failed to register card\n");
+ goto pcm_err;
+ }
+
+ return 0;
+
+reset_err:
+ snd_soc_free_pcms(socdev);
+pcm_err:
+ snd_soc_free_ac97_codec(codec);
+codec_err:
+ kfree(codec->reg_cache);
+cache_err:
+ kfree(socdev->card->codec);
+ socdev->card->codec = NULL;
+ return ret;
+}
+
+static int wm9705_soc_remove(struct platform_device *pdev)
+{
+ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
+ struct snd_soc_codec *codec = socdev->card->codec;
+
+ if (codec == NULL)
+ return 0;
+
+ snd_soc_dapm_free(socdev);
+ snd_soc_free_pcms(socdev);
+ snd_soc_free_ac97_codec(codec);
+ kfree(codec->reg_cache);
+ kfree(codec);
+ return 0;
+}
+
+struct snd_soc_codec_device soc_codec_dev_wm9705 = {
+ .probe = wm9705_soc_probe,
+ .remove = wm9705_soc_remove,
+};
+EXPORT_SYMBOL_GPL(soc_codec_dev_wm9705);
+
+MODULE_DESCRIPTION("ASoC WM9705 driver");
+MODULE_AUTHOR("Ian Molton");
+MODULE_LICENSE("GPL v2");
--- /dev/null
+/*
+ * wm9705.h -- WM9705 Soc Audio driver
+ */
+
+#ifndef _WM9705_H
+#define _WM9705_H
+
+#define WM9705_DAI_AC97_HIFI 0
+#define WM9705_DAI_AC97_AUX 1
+
+extern struct snd_soc_dai wm9705_dai[2];
+extern struct snd_soc_codec_device soc_codec_dev_wm9705;
+
+#endif
SOC_SINGLE("Mic 20dB Boost Switch", AC97_MIC, 7, 1, 0),
};
-/* add non dapm controls */
-static int wm9712_add_controls(struct snd_soc_codec *codec)
-{
- int err, i;
-
- for (i = 0; i < ARRAY_SIZE(wm9712_snd_ac97_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&wm9712_snd_ac97_controls[i],
- codec, NULL));
- if (err < 0)
- return err;
- }
- return 0;
-}
-
/* We have to create a fake left and right HP mixers because
* the codec only has a single control that is shared by both channels.
* This makes it impossible to determine the audio path.
else {
reg = reg >> 1;
- if (reg > (ARRAY_SIZE(wm9712_reg)))
+ if (reg >= (ARRAY_SIZE(wm9712_reg)))
return -EIO;
return cache[reg];
soc_ac97_ops.write(codec->ac97, reg, val);
reg = reg >> 1;
- if (reg <= (ARRAY_SIZE(wm9712_reg)))
+ if (reg < (ARRAY_SIZE(wm9712_reg)))
cache[reg] = val;
return 0;
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int reg;
u16 vra;
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
u16 vra, xsle;
vra = ac97_read(codec, AC97_EXTENDED_STATUS);
SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 |\
SNDRV_PCM_RATE_48000)
+static struct snd_soc_dai_ops wm9712_dai_ops_hifi = {
+ .prepare = ac97_prepare,
+};
+
+static struct snd_soc_dai_ops wm9712_dai_ops_aux = {
+ .prepare = ac97_aux_prepare,
+};
+
struct snd_soc_dai wm9712_dai[] = {
{
.name = "AC97 HiFi",
.channels_max = 2,
.rates = WM9712_AC97_RATES,
.formats = SNDRV_PCM_FMTBIT_S16_LE,},
- .ops = {
- .prepare = ac97_prepare,},
+ .ops = &wm9712_dai_ops_hifi,
},
{
.name = "AC97 Aux",
.channels_max = 1,
.rates = WM9712_AC97_RATES,
.formats = SNDRV_PCM_FMTBIT_S16_LE,},
- .ops = {
- .prepare = ac97_aux_prepare,},
+ .ops = &wm9712_dai_ops_aux,
}
};
EXPORT_SYMBOL_GPL(wm9712_dai);
pm_message_t state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
wm9712_set_bias_level(codec, SND_SOC_BIAS_OFF);
return 0;
static int wm9712_soc_resume(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
int i, ret;
u16 *cache = codec->reg_cache;
printk(KERN_INFO "WM9711/WM9712 SoC Audio Codec %s\n", WM9712_VERSION);
- socdev->codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
- if (socdev->codec == NULL)
+ socdev->card->codec = kzalloc(sizeof(struct snd_soc_codec),
+ GFP_KERNEL);
+ if (socdev->card->codec == NULL)
return -ENOMEM;
- codec = socdev->codec;
+ codec = socdev->card->codec;
mutex_init(&codec->mutex);
codec->reg_cache = kmemdup(wm9712_reg, sizeof(wm9712_reg), GFP_KERNEL);
ac97_write(codec, AC97_VIDEO, ac97_read(codec, AC97_VIDEO) | 0x3000);
wm9712_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
- wm9712_add_controls(codec);
+ snd_soc_add_controls(codec, wm9712_snd_ac97_controls,
+ ARRAY_SIZE(wm9712_snd_ac97_controls));
wm9712_add_widgets(codec);
ret = snd_soc_init_card(socdev);
if (ret < 0) {
kfree(codec->reg_cache);
cache_err:
- kfree(socdev->codec);
- socdev->codec = NULL;
+ kfree(socdev->card->codec);
+ socdev->card->codec = NULL;
return ret;
}
static int wm9712_soc_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
if (codec == NULL)
return 0;
struct wm9713_priv {
u32 pll_in; /* PLL input frequency */
- u32 pll_out; /* PLL output frequency */
};
static unsigned int ac97_read(struct snd_soc_codec *codec,
SOC_SINGLE("3D Depth", AC97_REC_GAIN_MIC, 0, 15, 1),
};
-/* add non dapm controls */
-static int wm9713_add_controls(struct snd_soc_codec *codec)
-{
- int err, i;
-
- for (i = 0; i < ARRAY_SIZE(wm9713_snd_ac97_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&wm9713_snd_ac97_controls[i],
- codec, NULL));
- if (err < 0)
- return err;
- }
- return 0;
-}
-
/* We have to create a fake left and right HP mixers because
* the codec only has a single control that is shared by both channels.
* This makes it impossible to determine the audio path using the current
else {
reg = reg >> 1;
- if (reg > (ARRAY_SIZE(wm9713_reg)))
+ if (reg >= (ARRAY_SIZE(wm9713_reg)))
return -EIO;
return cache[reg];
if (reg < 0x7c)
soc_ac97_ops.write(codec->ac97, reg, val);
reg = reg >> 1;
- if (reg <= (ARRAY_SIZE(wm9713_reg)))
+ if (reg < (ARRAY_SIZE(wm9713_reg)))
cache[reg] = val;
return 0;
struct _pll_div pll_div;
/* turn PLL off ? */
- if (freq_in == 0 || freq_out == 0) {
+ if (freq_in == 0) {
/* disable PLL power and select ext source */
reg = ac97_read(codec, AC97_HANDSET_RATE);
ac97_write(codec, AC97_HANDSET_RATE, reg | 0x0080);
reg = ac97_read(codec, AC97_EXTENDED_MID);
ac97_write(codec, AC97_EXTENDED_MID, reg | 0x0200);
- wm9713->pll_out = 0;
+ wm9713->pll_in = 0;
return 0;
}
ac97_write(codec, AC97_EXTENDED_MID, reg & 0xfdff);
reg = ac97_read(codec, AC97_HANDSET_RATE);
ac97_write(codec, AC97_HANDSET_RATE, reg & 0xff7f);
- wm9713->pll_out = freq_out;
wm9713->pll_in = freq_in;
/* wait 10ms AC97 link frames for the link to stabilise */
struct snd_soc_dai *dai)
{
struct snd_soc_codec *codec = dai->codec;
- u16 status;
+ u16 status, rate;
/* Gracefully shut down the voice interface. */
status = ac97_read(codec, AC97_EXTENDED_STATUS) | 0x1000;
- ac97_write(codec, AC97_HANDSET_RATE, 0x0280);
+ rate = ac97_read(codec, AC97_HANDSET_RATE) & 0xF0FF;
+ ac97_write(codec, AC97_HANDSET_RATE, rate | 0x0200);
schedule_timeout_interruptible(msecs_to_jiffies(1));
- ac97_write(codec, AC97_HANDSET_RATE, 0x0F80);
+ ac97_write(codec, AC97_HANDSET_RATE, rate | 0x0F00);
ac97_write(codec, AC97_EXTENDED_MID, status);
}
(SNDRV_PCM_FORMAT_S16_LE | SNDRV_PCM_FORMAT_S20_3LE | \
SNDRV_PCM_FORMAT_S24_LE)
+static struct snd_soc_dai_ops wm9713_dai_ops_hifi = {
+ .prepare = ac97_hifi_prepare,
+ .set_clkdiv = wm9713_set_dai_clkdiv,
+ .set_pll = wm9713_set_dai_pll,
+};
+
+static struct snd_soc_dai_ops wm9713_dai_ops_aux = {
+ .prepare = ac97_aux_prepare,
+ .set_clkdiv = wm9713_set_dai_clkdiv,
+ .set_pll = wm9713_set_dai_pll,
+};
+
+static struct snd_soc_dai_ops wm9713_dai_ops_voice = {
+ .hw_params = wm9713_pcm_hw_params,
+ .shutdown = wm9713_voiceshutdown,
+ .set_clkdiv = wm9713_set_dai_clkdiv,
+ .set_pll = wm9713_set_dai_pll,
+ .set_fmt = wm9713_set_dai_fmt,
+ .set_tristate = wm9713_set_dai_tristate,
+};
+
struct snd_soc_dai wm9713_dai[] = {
{
.name = "AC97 HiFi",
.channels_max = 2,
.rates = WM9713_RATES,
.formats = SNDRV_PCM_FMTBIT_S16_LE,},
- .ops = {
- .prepare = ac97_hifi_prepare,
- .set_clkdiv = wm9713_set_dai_clkdiv,
- .set_pll = wm9713_set_dai_pll,},
+ .ops = &wm9713_dai_ops_hifi,
},
{
.name = "AC97 Aux",
.channels_max = 1,
.rates = WM9713_RATES,
.formats = SNDRV_PCM_FMTBIT_S16_LE,},
- .ops = {
- .prepare = ac97_aux_prepare,
- .set_clkdiv = wm9713_set_dai_clkdiv,
- .set_pll = wm9713_set_dai_pll,},
+ .ops = &wm9713_dai_ops_aux,
},
{
.name = "WM9713 Voice",
.channels_max = 2,
.rates = WM9713_PCM_RATES,
.formats = WM9713_PCM_FORMATS,},
- .ops = {
- .hw_params = wm9713_pcm_hw_params,
- .shutdown = wm9713_voiceshutdown,
- .set_clkdiv = wm9713_set_dai_clkdiv,
- .set_pll = wm9713_set_dai_pll,
- .set_fmt = wm9713_set_dai_fmt,
- .set_tristate = wm9713_set_dai_tristate,
- },
+ .ops = &wm9713_dai_ops_voice,
},
};
EXPORT_SYMBOL_GPL(wm9713_dai);
pm_message_t state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
u16 reg;
/* Disable everything except touchpanel - that will be handled
static int wm9713_soc_resume(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
struct wm9713_priv *wm9713 = codec->private_data;
int i, ret;
u16 *cache = codec->reg_cache;
wm9713_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
/* do we need to re-start the PLL ? */
- if (wm9713->pll_out)
- wm9713_set_pll(codec, 0, wm9713->pll_in, wm9713->pll_out);
+ if (wm9713->pll_in)
+ wm9713_set_pll(codec, 0, wm9713->pll_in, 0);
/* only synchronise the codec if warm reset failed */
if (ret == 0) {
printk(KERN_INFO "WM9713/WM9714 SoC Audio Codec %s\n", WM9713_VERSION);
- socdev->codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
- if (socdev->codec == NULL)
+ socdev->card->codec = kzalloc(sizeof(struct snd_soc_codec),
+ GFP_KERNEL);
+ if (socdev->card->codec == NULL)
return -ENOMEM;
- codec = socdev->codec;
+ codec = socdev->card->codec;
mutex_init(&codec->mutex);
codec->reg_cache = kmemdup(wm9713_reg, sizeof(wm9713_reg), GFP_KERNEL);
reg = ac97_read(codec, AC97_CD) & 0x7fff;
ac97_write(codec, AC97_CD, reg);
- wm9713_add_controls(codec);
+ snd_soc_add_controls(codec, wm9713_snd_ac97_controls,
+ ARRAY_SIZE(wm9713_snd_ac97_controls));
wm9713_add_widgets(codec);
ret = snd_soc_init_card(socdev);
if (ret < 0)
kfree(codec->reg_cache);
cache_err:
- kfree(socdev->codec);
- socdev->codec = NULL;
+ kfree(socdev->card->codec);
+ socdev->card->codec = NULL;
return ret;
}
static int wm9713_soc_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
if (codec == NULL)
return 0;
config SND_DAVINCI_SOC_SFFSDR
tristate "SoC Audio support for SFFSDR"
- depends on SND_DAVINCI_SOC && MACH_DAVINCI_SFFSDR
+ depends on SND_DAVINCI_SOC && MACH_SFFSDR
select SND_DAVINCI_SOC_I2S
select SND_SOC_PCM3008
select SFFSDR_FPGA
platform_set_drvdata(evm_snd_device, &evm_snd_devdata);
evm_snd_devdata.dev = &evm_snd_device->dev;
- evm_snd_device->dev.platform_data = &evm_snd_data;
+ platform_device_add_data(evm_snd_device, &evm_snd_data,
+ sizeof(evm_snd_data));
ret = platform_device_add_resources(evm_snd_device, evm_snd_resources,
ARRAY_SIZE(evm_snd_resources));
#define DAVINCI_I2S_RATES SNDRV_PCM_RATE_8000_96000
+static struct snd_soc_dai_ops davinci_i2s_dai_ops = {
+ .startup = davinci_i2s_startup,
+ .trigger = davinci_i2s_trigger,
+ .hw_params = davinci_i2s_hw_params,
+ .set_fmt = davinci_i2s_set_dai_fmt,
+};
+
struct snd_soc_dai davinci_i2s_dai = {
.name = "davinci-i2s",
.id = 0,
.channels_max = 2,
.rates = DAVINCI_I2S_RATES,
.formats = SNDRV_PCM_FMTBIT_S16_LE,},
- .ops = {
- .startup = davinci_i2s_startup,
- .trigger = davinci_i2s_trigger,
- .hw_params = davinci_i2s_hw_params,
- .set_fmt = davinci_i2s_set_dai_fmt,
- },
+ .ops = &davinci_i2s_dai_ops,
};
EXPORT_SYMBOL_GPL(davinci_i2s_dai);
runtime->dma_bytes);
}
-struct snd_pcm_ops davinci_pcm_ops = {
+static struct snd_pcm_ops davinci_pcm_ops = {
.open = davinci_pcm_open,
.close = davinci_pcm_close,
.ioctl = snd_pcm_lib_ioctl,
#include <asm/dma.h>
#include <asm/mach-types.h>
+#ifdef CONFIG_SFFSDR_FPGA
#include <asm/plat-sffsdr/sffsdr-fpga.h>
+#endif
#include <mach/mcbsp.h>
#include <mach/edma.h>
#include "davinci-pcm.h"
#include "davinci-i2s.h"
+/*
+ * CLKX and CLKR are the inputs for the Sample Rate Generator.
+ * FSX and FSR are outputs, driven by the sample Rate Generator.
+ */
+#define AUDIO_FORMAT (SND_SOC_DAIFMT_DSP_B | \
+ SND_SOC_DAIFMT_CBM_CFS | \
+ SND_SOC_DAIFMT_IB_NF)
+
static int sffsdr_hw_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params,
- struct snd_soc_dai *dai)
+ struct snd_pcm_hw_params *params)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
int fs;
int ret = 0;
- /* Set cpu DAI configuration:
- * CLKX and CLKR are the inputs for the Sample Rate Generator.
- * FSX and FSR are outputs, driven by the sample Rate Generator. */
- ret = snd_soc_dai_set_fmt(cpu_dai,
- SND_SOC_DAIFMT_RIGHT_J |
- SND_SOC_DAIFMT_CBM_CFS |
- SND_SOC_DAIFMT_IB_NF);
- if (ret < 0)
- return ret;
-
/* Fsref can be 32000, 44100 or 48000. */
fs = params_rate(params);
+#ifndef CONFIG_SFFSDR_FPGA
+ /* Without the FPGA module, the Fs is fixed at 44100 Hz */
+ if (fs != 44100) {
+ pr_debug("warning: only 44.1 kHz is supported without SFFSDR FPGA module\n");
+ return -EINVAL;
+ }
+#endif
+
+ /* set cpu DAI configuration */
+ ret = snd_soc_dai_set_fmt(cpu_dai, AUDIO_FORMAT);
+ if (ret < 0)
+ return ret;
+
pr_debug("sffsdr_hw_params: rate = %d Hz\n", fs);
+#ifndef CONFIG_SFFSDR_FPGA
+ return 0;
+#else
return sffsdr_fpga_set_codec_fs(fs);
+#endif
}
static struct snd_soc_ops sffsdr_ops = {
platform_set_drvdata(sffsdr_snd_device, &sffsdr_snd_devdata);
sffsdr_snd_devdata.dev = &sffsdr_snd_device->dev;
- sffsdr_snd_device->dev.platform_data = &sffsdr_snd_data;
+ platform_device_add_data(sffsdr_snd_device, &sffsdr_snd_data,
+ sizeof(sffsdr_snd_data));
ret = platform_device_add_resources(sffsdr_snd_device,
sffsdr_snd_resources,
config SND_SOC_OF_SIMPLE
tristate
+# ASoC platform support for the Freescale MPC8610 SOC. This compiles drivers
+# for the SSI and the Elo DMA controller. You will still need to select
+# a platform driver and a codec driver.
config SND_SOC_MPC8610
- bool "ALSA SoC support for the MPC8610 SOC"
- depends on MPC8610_HPCD
- default y if MPC8610
- help
- Say Y if you want to add support for codecs attached to the SSI
- device on an MPC8610.
+ tristate
+ depends on MPC8610
config SND_SOC_MPC8610_HPCD
- bool "ALSA SoC support for the Freescale MPC8610 HPCD board"
- depends on SND_SOC_MPC8610
+ tristate "ALSA SoC support for the Freescale MPC8610 HPCD board"
+ # I2C is necessary for the CS4270 driver
+ depends on MPC8610_HPCD && I2C
+ select SND_SOC_MPC8610
select SND_SOC_CS4270
select SND_SOC_CS4270_VD33_ERRATA
default y if MPC8610_HPCD
obj-$(CONFIG_SND_SOC_OF_SIMPLE) += soc-of-simple.o
# MPC8610 HPCD Machine Support
-obj-$(CONFIG_SND_SOC_MPC8610_HPCD) += mpc8610_hpcd.o
+snd-soc-mpc8610-hpcd-objs := mpc8610_hpcd.o
+obj-$(CONFIG_SND_SOC_MPC8610_HPCD) += snd-soc-mpc8610-hpcd.o
# MPC8610 Platform Support
-obj-$(CONFIG_SND_SOC_MPC8610) += fsl_ssi.o fsl_dma.o
+snd-soc-fsl-ssi-objs := fsl_ssi.o
+snd-soc-fsl-dma-objs := fsl_dma.o
+obj-$(CONFIG_SND_SOC_MPC8610) += snd-soc-fsl-ssi.o snd-soc-fsl-dma.o
obj-$(CONFIG_SND_SOC_MPC5200_I2S) += mpc5200_psc_i2s.o
.info = SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_MMAP_VALID |
- SNDRV_PCM_INFO_JOINT_DUPLEX,
+ SNDRV_PCM_INFO_JOINT_DUPLEX |
+ SNDRV_PCM_INFO_PAUSE,
.formats = FSLDMA_PCM_FORMATS,
.rates = FSLDMA_PCM_RATES,
.rate_min = 5512,
sizeof(struct fsl_dma_link_descriptor);
for (i = 0; i < NUM_DMA_LINKS; i++) {
- struct fsl_dma_link_descriptor *link = &dma_private->link[i];
-
- link->source_attr = cpu_to_be32(CCSR_DMA_ATR_SNOOP);
- link->dest_attr = cpu_to_be32(CCSR_DMA_ATR_SNOOP);
- link->next = cpu_to_be64(temp_link);
+ dma_private->link[i].next = cpu_to_be64(temp_link);
temp_link += sizeof(struct fsl_dma_link_descriptor);
}
* This function obtains hardware parameters about the opened stream and
* programs the DMA controller accordingly.
*
- * Note that due to a quirk of the SSI's STX register, the target address
- * for the DMA operations depends on the sample size. So we don't program
- * the dest_addr (for playback -- source_addr for capture) fields in the
- * link descriptors here. We do that in fsl_dma_prepare()
- */
-static int fsl_dma_hw_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *hw_params)
-{
- struct snd_pcm_runtime *runtime = substream->runtime;
- struct fsl_dma_private *dma_private = runtime->private_data;
-
- dma_addr_t temp_addr; /* Pointer to next period */
-
- unsigned int i;
-
- /* Get all the parameters we need */
- size_t buffer_size = params_buffer_bytes(hw_params);
- size_t period_size = params_period_bytes(hw_params);
-
- /* Initialize our DMA tracking variables */
- dma_private->period_size = period_size;
- dma_private->num_periods = params_periods(hw_params);
- dma_private->dma_buf_end = dma_private->dma_buf_phys + buffer_size;
- dma_private->dma_buf_next = dma_private->dma_buf_phys +
- (NUM_DMA_LINKS * period_size);
- if (dma_private->dma_buf_next >= dma_private->dma_buf_end)
- dma_private->dma_buf_next = dma_private->dma_buf_phys;
-
- /*
- * The actual address in STX0 (destination for playback, source for
- * capture) is based on the sample size, but we don't know the sample
- * size in this function, so we'll have to adjust that later. See
- * comments in fsl_dma_prepare().
- *
- * The DMA controller does not have a cache, so the CPU does not
- * need to tell it to flush its cache. However, the DMA
- * controller does need to tell the CPU to flush its cache.
- * That's what the SNOOP bit does.
- *
- * Also, even though the DMA controller supports 36-bit addressing, for
- * simplicity we currently support only 32-bit addresses for the audio
- * buffer itself.
- */
- temp_addr = substream->dma_buffer.addr;
-
- for (i = 0; i < NUM_DMA_LINKS; i++) {
- struct fsl_dma_link_descriptor *link = &dma_private->link[i];
-
- link->count = cpu_to_be32(period_size);
-
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
- link->source_addr = cpu_to_be32(temp_addr);
- else
- link->dest_addr = cpu_to_be32(temp_addr);
-
- temp_addr += period_size;
- }
-
- return 0;
-}
-
-/**
- * fsl_dma_prepare - prepare the DMA registers for playback.
- *
- * This function is called after the specifics of the audio data are known,
- * i.e. snd_pcm_runtime is initialized.
- *
- * In this function, we finish programming the registers of the DMA
- * controller that are dependent on the sample size.
- *
- * One of the drawbacks with big-endian is that when copying integers of
- * different sizes to a fixed-sized register, the address to which the
- * integer must be copied is dependent on the size of the integer.
+ * One drawback of big-endian is that when copying integers of different
+ * sizes to a fixed-sized register, the address to which the integer must be
+ * copied is dependent on the size of the integer.
*
* For example, if P is the address of a 32-bit register, and X is a 32-bit
* integer, then X should be copied to address P. However, if X is a 16-bit
* and 8 bytes at a time). So we do not support packed 24-bit samples.
* 24-bit data must be padded to 32 bits.
*/
-static int fsl_dma_prepare(struct snd_pcm_substream *substream)
+static int fsl_dma_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *hw_params)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct fsl_dma_private *dma_private = runtime->private_data;
+
+ /* Number of bits per sample */
+ unsigned int sample_size =
+ snd_pcm_format_physical_width(params_format(hw_params));
+
+ /* Number of bytes per frame */
+ unsigned int frame_size = 2 * (sample_size / 8);
+
+ /* Bus address of SSI STX register */
+ dma_addr_t ssi_sxx_phys = dma_private->ssi_sxx_phys;
+
+ /* Size of the DMA buffer, in bytes */
+ size_t buffer_size = params_buffer_bytes(hw_params);
+
+ /* Number of bytes per period */
+ size_t period_size = params_period_bytes(hw_params);
+
+ /* Pointer to next period */
+ dma_addr_t temp_addr = substream->dma_buffer.addr;
+
+ /* Pointer to DMA controller */
struct ccsr_dma_channel __iomem *dma_channel = dma_private->dma_channel;
- u32 mr;
+
+ u32 mr; /* DMA Mode Register */
+
unsigned int i;
- dma_addr_t ssi_sxx_phys; /* Bus address of SSI STX register */
- unsigned int frame_size; /* Number of bytes per frame */
- ssi_sxx_phys = dma_private->ssi_sxx_phys;
+ /* Initialize our DMA tracking variables */
+ dma_private->period_size = period_size;
+ dma_private->num_periods = params_periods(hw_params);
+ dma_private->dma_buf_end = dma_private->dma_buf_phys + buffer_size;
+ dma_private->dma_buf_next = dma_private->dma_buf_phys +
+ (NUM_DMA_LINKS * period_size);
+
+ if (dma_private->dma_buf_next >= dma_private->dma_buf_end)
+ /* This happens if the number of periods == NUM_DMA_LINKS */
+ dma_private->dma_buf_next = dma_private->dma_buf_phys;
mr = in_be32(&dma_channel->mr) & ~(CCSR_DMA_MR_BWC_MASK |
CCSR_DMA_MR_SAHTS_MASK | CCSR_DMA_MR_DAHTS_MASK);
- switch (runtime->sample_bits) {
+ /* Due to a quirk of the SSI's STX register, the target address
+ * for the DMA operations depends on the sample size. So we calculate
+ * that offset here. While we're at it, also tell the DMA controller
+ * how much data to transfer per sample.
+ */
+ switch (sample_size) {
case 8:
mr |= CCSR_DMA_MR_DAHTS_1 | CCSR_DMA_MR_SAHTS_1;
ssi_sxx_phys += 3;
mr |= CCSR_DMA_MR_DAHTS_4 | CCSR_DMA_MR_SAHTS_4;
break;
default:
+ /* We should never get here */
dev_err(substream->pcm->card->dev,
- "unsupported sample size %u\n", runtime->sample_bits);
+ "unsupported sample size %u\n", sample_size);
return -EINVAL;
}
- frame_size = runtime->frame_bits / 8;
/*
* BWC should always be a multiple of the frame size. BWC determines
* how many bytes are sent/received before the DMA controller checks the
* capture, the receive FIFO is triggered when it contains one frame, so
* we want to receive one frame at a time.
*/
-
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
mr |= CCSR_DMA_MR_BWC(2 * frame_size);
else
out_be32(&dma_channel->mr, mr);
- /*
- * Program the address of the DMA transfer to/from the SSI.
- */
for (i = 0; i < NUM_DMA_LINKS; i++) {
struct fsl_dma_link_descriptor *link = &dma_private->link[i];
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ link->count = cpu_to_be32(period_size);
+
+ /* Even though the DMA controller supports 36-bit addressing,
+ * for simplicity we allow only 32-bit addresses for the audio
+ * buffer itself. This was enforced in fsl_dma_new() with the
+ * DMA mask.
+ *
+ * The snoop bit tells the DMA controller whether it should tell
+ * the ECM to snoop during a read or write to an address. For
+ * audio, we use DMA to transfer data between memory and an I/O
+ * device (the SSI's STX0 or SRX0 register). Snooping is only
+ * needed if there is a cache, so we need to snoop memory
+ * addresses only. For playback, that means we snoop the source
+ * but not the destination. For capture, we snoop the
+ * destination but not the source.
+ *
+ * Note that failing to snoop properly is unlikely to cause
+ * cache incoherency if the period size is larger than the
+ * size of L1 cache. This is because filling in one period will
+ * flush out the data for the previous period. So if you
+ * increased period_bytes_min to a large enough size, you might
+ * get more performance by not snooping, and you'll still be
+ * okay.
+ */
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ link->source_addr = cpu_to_be32(temp_addr);
+ link->source_attr = cpu_to_be32(CCSR_DMA_ATR_SNOOP);
+
link->dest_addr = cpu_to_be32(ssi_sxx_phys);
- else
+ link->dest_attr = cpu_to_be32(CCSR_DMA_ATR_NOSNOOP);
+ } else {
link->source_addr = cpu_to_be32(ssi_sxx_phys);
+ link->source_attr = cpu_to_be32(CCSR_DMA_ATR_NOSNOOP);
+
+ link->dest_addr = cpu_to_be32(temp_addr);
+ link->dest_attr = cpu_to_be32(CCSR_DMA_ATR_SNOOP);
+ }
+
+ temp_addr += period_size;
}
return 0;
.ioctl = snd_pcm_lib_ioctl,
.hw_params = fsl_dma_hw_params,
.hw_free = fsl_dma_hw_free,
- .prepare = fsl_dma_prepare,
.pointer = fsl_dma_pointer,
};
* @dev: struct device pointer
* @playback: the number of playback streams opened
* @capture: the number of capture streams opened
+ * @asynchronous: 0=synchronous mode, 1=asynchronous mode
* @cpu_dai: the CPU DAI for this device
* @dev_attr: the sysfs device attribute structure
* @stats: SSI statistics
struct device *dev;
unsigned int playback;
unsigned int capture;
+ int asynchronous;
struct snd_soc_dai cpu_dai;
struct device_attribute dev_attr;
*
* FIXME: Little-endian samples require a different shift dir
*/
- clrsetbits_be32(&ssi->scr, CCSR_SSI_SCR_I2S_MODE_MASK,
- CCSR_SSI_SCR_TFR_CLK_DIS |
- CCSR_SSI_SCR_I2S_MODE_SLAVE | CCSR_SSI_SCR_SYN);
+ clrsetbits_be32(&ssi->scr,
+ CCSR_SSI_SCR_I2S_MODE_MASK | CCSR_SSI_SCR_SYN,
+ CCSR_SSI_SCR_TFR_CLK_DIS | CCSR_SSI_SCR_I2S_MODE_SLAVE
+ | (ssi_private->asynchronous ? 0 : CCSR_SSI_SCR_SYN));
out_be32(&ssi->stcr,
CCSR_SSI_STCR_TXBIT0 | CCSR_SSI_STCR_TFEN0 |
SNDRV_PCM_HW_PARAM_RATE,
first_runtime->rate, first_runtime->rate);
- snd_pcm_hw_constraint_minmax(substream->runtime,
- SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
- first_runtime->sample_bits,
- first_runtime->sample_bits);
+ /* If we're in synchronous mode, then we need to constrain
+ * the sample size as well. We don't support independent sample
+ * rates in asynchronous mode.
+ */
+ if (!ssi_private->asynchronous)
+ snd_pcm_hw_constraint_minmax(substream->runtime,
+ SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
+ first_runtime->sample_bits,
+ first_runtime->sample_bits);
ssi_private->second_stream = substream;
}
}
/**
- * fsl_ssi_prepare: prepare the SSI.
+ * fsl_ssi_hw_params - program the sample size
*
* Most of the SSI registers have been programmed in the startup function,
* but the word length must be programmed here. Unfortunately, programming
* Note: The SxCCR.DC and SxCCR.PM bits are only used if the SSI is the
* clock master.
*/
-static int fsl_ssi_prepare(struct snd_pcm_substream *substream,
- struct snd_soc_dai *dai)
+static int fsl_ssi_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *hw_params, struct snd_soc_dai *cpu_dai)
{
- struct snd_pcm_runtime *runtime = substream->runtime;
- struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct fsl_ssi_private *ssi_private = rtd->dai->cpu_dai->private_data;
-
- struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
+ struct fsl_ssi_private *ssi_private = cpu_dai->private_data;
if (substream == ssi_private->first_stream) {
- u32 wl;
+ struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
+ unsigned int sample_size =
+ snd_pcm_format_width(params_format(hw_params));
+ u32 wl = CCSR_SSI_SxCCR_WL(sample_size);
/* The SSI should always be disabled at this points (SSIEN=0) */
- wl = CCSR_SSI_SxCCR_WL(snd_pcm_format_width(runtime->format));
/* In synchronous mode, the SSI uses STCCR for capture */
- clrsetbits_be32(&ssi->stccr, CCSR_SSI_SxCCR_WL_MASK, wl);
+ if ((substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ||
+ !ssi_private->asynchronous)
+ clrsetbits_be32(&ssi->stccr,
+ CCSR_SSI_SxCCR_WL_MASK, wl);
+ else
+ clrsetbits_be32(&ssi->srccr,
+ CCSR_SSI_SxCCR_WL_MASK, wl);
}
return 0;
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
- case SNDRV_PCM_TRIGGER_RESUME:
+ clrbits32(&ssi->scr, CCSR_SSI_SCR_SSIEN);
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
- clrbits32(&ssi->scr, CCSR_SSI_SCR_SSIEN);
setbits32(&ssi->scr,
CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_TE);
} else {
- clrbits32(&ssi->scr, CCSR_SSI_SCR_SSIEN);
+ long timeout = jiffies + 10;
+
setbits32(&ssi->scr,
CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_RE);
- /*
- * I think we need this delay to allow time for the SSI
- * to put data into its FIFO. Without it, ALSA starts
- * to complain about overruns.
+ /* Wait until the SSI has filled its FIFO. Without this
+ * delay, ALSA complains about overruns. When the FIFO
+ * is full, the DMA controller initiates its first
+ * transfer. Until then, however, the DMA's DAR
+ * register is zero, which translates to an
+ * out-of-bounds pointer. This makes ALSA think an
+ * overrun has occurred.
*/
- mdelay(1);
+ while (!(in_be32(&ssi->sisr) & CCSR_SSI_SISR_RFF0) &&
+ (jiffies < timeout));
+ if (!(in_be32(&ssi->sisr) & CCSR_SSI_SISR_RFF0))
+ return -EIO;
}
break;
case SNDRV_PCM_TRIGGER_STOP:
- case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
clrbits32(&ssi->scr, CCSR_SSI_SCR_TE);
/**
* fsl_ssi_dai_template: template CPU DAI for the SSI
*/
+static struct snd_soc_dai_ops fsl_ssi_dai_ops = {
+ .startup = fsl_ssi_startup,
+ .hw_params = fsl_ssi_hw_params,
+ .shutdown = fsl_ssi_shutdown,
+ .trigger = fsl_ssi_trigger,
+ .set_sysclk = fsl_ssi_set_sysclk,
+ .set_fmt = fsl_ssi_set_fmt,
+};
+
static struct snd_soc_dai fsl_ssi_dai_template = {
.playback = {
/* The SSI does not support monaural audio. */
.rates = FSLSSI_I2S_RATES,
.formats = FSLSSI_I2S_FORMATS,
},
- .ops = {
- .startup = fsl_ssi_startup,
- .prepare = fsl_ssi_prepare,
- .shutdown = fsl_ssi_shutdown,
- .trigger = fsl_ssi_trigger,
- .set_sysclk = fsl_ssi_set_sysclk,
- .set_fmt = fsl_ssi_set_fmt,
- },
+ .ops = &fsl_ssi_dai_ops,
};
/**
ssi_private->ssi_phys = ssi_info->ssi_phys;
ssi_private->irq = ssi_info->irq;
ssi_private->dev = ssi_info->dev;
+ ssi_private->asynchronous = ssi_info->asynchronous;
ssi_private->dev->driver_data = fsl_ssi_dai;
}
EXPORT_SYMBOL_GPL(fsl_ssi_destroy_dai);
+static int __init fsl_ssi_init(void)
+{
+ printk(KERN_INFO "Freescale Synchronous Serial Interface (SSI) ASoC Driver\n");
+
+ return 0;
+}
+module_init(fsl_ssi_init);
+
MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
MODULE_DESCRIPTION("Freescale Synchronous Serial Interface (SSI) ASoC Driver");
MODULE_LICENSE("GPL");
* ssi_phys: physical address of the SSI registers
* irq: IRQ of this SSI
* dev: struct device, used to create the sysfs statistics file
+ * asynchronous: 0=synchronous mode, 1=asynchronous mode
*/
struct fsl_ssi_info {
unsigned int id;
dma_addr_t ssi_phys;
unsigned int irq;
struct device *dev;
+ int asynchronous;
};
struct snd_soc_dai *fsl_ssi_create_dai(struct fsl_ssi_info *ssi_info);
/**
* psc_i2s_dai_template: template CPU Digital Audio Interface
*/
+static struct snd_soc_dai_ops psc_i2s_dai_ops = {
+ .startup = psc_i2s_startup,
+ .hw_params = psc_i2s_hw_params,
+ .hw_free = psc_i2s_hw_free,
+ .shutdown = psc_i2s_shutdown,
+ .trigger = psc_i2s_trigger,
+ .set_sysclk = psc_i2s_set_sysclk,
+ .set_fmt = psc_i2s_set_fmt,
+};
+
static struct snd_soc_dai psc_i2s_dai_template = {
.playback = {
.channels_min = 2,
.rates = PSC_I2S_RATES,
.formats = PSC_I2S_FORMATS,
},
- .ops = {
- .startup = psc_i2s_startup,
- .hw_params = psc_i2s_hw_params,
- .hw_free = psc_i2s_hw_free,
- .shutdown = psc_i2s_shutdown,
- .trigger = psc_i2s_trigger,
- .set_sysclk = psc_i2s_set_sysclk,
- .set_fmt = psc_i2s_set_fmt,
- },
+ .ops = &psc_i2s_dai_ops,
};
/* ---------------------------------------------------------------------
}
ssi_info.irq = machine_data->ssi_irq;
+ /* Do we want to use asynchronous mode? */
+ ssi_info.asynchronous =
+ of_find_property(np, "fsl,ssi-asynchronous", NULL) ? 1 : 0;
+ if (ssi_info.asynchronous)
+ dev_info(&ofdev->dev, "using asynchronous mode\n");
/* Map the global utilities registers. */
guts_np = of_find_compatible_node(NULL, NULL, "fsl,mpc8610-guts");
config SND_OMAP_SOC_N810
tristate "SoC Audio support for Nokia N810"
- depends on SND_OMAP_SOC && MACH_NOKIA_N810
+ depends on SND_OMAP_SOC && MACH_NOKIA_N810 && I2C
select SND_OMAP_SOC_MCBSP
select OMAP_MUX
select SND_SOC_TLV320AIC3X
config SND_OMAP_SOC_OSK5912
tristate "SoC Audio support for omap osk5912"
- depends on SND_OMAP_SOC && MACH_OMAP_OSK
+ depends on SND_OMAP_SOC && MACH_OMAP_OSK && I2C
select SND_OMAP_SOC_MCBSP
select SND_SOC_TLV320AIC23
help
select SND_SOC_TWL4030
help
Say Y if you want to add support for SoC audio on the OMAP3 Pandora.
+
+config SND_OMAP_SOC_OMAP3_BEAGLE
+ tristate "SoC Audio support for OMAP3 Beagle"
+ depends on TWL4030_CORE && SND_OMAP_SOC && MACH_OMAP3_BEAGLE
+ select SND_OMAP_SOC_MCBSP
+ select SND_SOC_TWL4030
+ help
+ Say Y if you want to add support for SoC audio on the Beagleboard.
+
+
snd-soc-omap2evm-objs := omap2evm.o
snd-soc-sdp3430-objs := sdp3430.o
snd-soc-omap3pandora-objs := omap3pandora.o
+snd-soc-omap3beagle-objs := omap3beagle.o
obj-$(CONFIG_SND_OMAP_SOC_N810) += snd-soc-n810.o
obj-$(CONFIG_SND_OMAP_SOC_OSK5912) += snd-soc-osk5912.o
obj-$(CONFIG_MACH_OMAP2EVM) += snd-soc-omap2evm.o
obj-$(CONFIG_SND_OMAP_SOC_SDP3430) += snd-soc-sdp3430.o
obj-$(CONFIG_SND_OMAP_SOC_OMAP3_PANDORA) += snd-soc-omap3pandora.o
+obj-$(CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE) += snd-soc-omap3beagle.o
#define N810_HEADSET_AMP_GPIO 10
#define N810_SPEAKER_AMP_GPIO 101
+enum {
+ N810_JACK_DISABLED,
+ N810_JACK_HP,
+ N810_JACK_HS,
+ N810_JACK_MIC,
+};
+
static struct clk *sys_clkout2;
static struct clk *sys_clkout2_src;
static struct clk *func96m_clk;
static void n810_ext_control(struct snd_soc_codec *codec)
{
+ int hp = 0, line1l = 0;
+
+ switch (n810_jack_func) {
+ case N810_JACK_HS:
+ line1l = 1;
+ case N810_JACK_HP:
+ hp = 1;
+ break;
+ case N810_JACK_MIC:
+ line1l = 1;
+ break;
+ }
+
if (n810_spk_func)
snd_soc_dapm_enable_pin(codec, "Ext Spk");
else
snd_soc_dapm_disable_pin(codec, "Ext Spk");
- if (n810_jack_func)
+ if (hp)
snd_soc_dapm_enable_pin(codec, "Headphone Jack");
else
snd_soc_dapm_disable_pin(codec, "Headphone Jack");
+ if (line1l)
+ snd_soc_dapm_enable_pin(codec, "LINE1L");
+ else
+ snd_soc_dapm_disable_pin(codec, "LINE1L");
if (n810_dmic_func)
snd_soc_dapm_enable_pin(codec, "DMic");
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct snd_soc_codec *codec = rtd->socdev->codec;
+ struct snd_soc_codec *codec = rtd->socdev->card->codec;
snd_pcm_hw_constraint_minmax(runtime,
SNDRV_PCM_HW_PARAM_CHANNELS, 2, 2);
};
static const char *spk_function[] = {"Off", "On"};
-static const char *jack_function[] = {"Off", "Headphone"};
+static const char *jack_function[] = {"Off", "Headphone", "Headset", "Mic"};
static const char *input_function[] = {"ADC", "Digital Mic"};
static const struct soc_enum n810_enum[] = {
SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(spk_function), spk_function),
static int n810_aic33_init(struct snd_soc_codec *codec)
{
- int i, err;
+ int err;
/* Not connected */
snd_soc_dapm_nc_pin(codec, "MONO_LOUT");
snd_soc_dapm_nc_pin(codec, "HPLCOM");
snd_soc_dapm_nc_pin(codec, "HPRCOM");
+ snd_soc_dapm_nc_pin(codec, "MIC3L");
+ snd_soc_dapm_nc_pin(codec, "MIC3R");
+ snd_soc_dapm_nc_pin(codec, "LINE1R");
+ snd_soc_dapm_nc_pin(codec, "LINE2L");
+ snd_soc_dapm_nc_pin(codec, "LINE2R");
/* Add N810 specific controls */
- for (i = 0; i < ARRAY_SIZE(aic33_n810_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&aic33_n810_controls[i], codec, NULL));
- if (err < 0)
- return err;
- }
+ err = snd_soc_add_controls(codec, aic33_n810_controls,
+ ARRAY_SIZE(aic33_n810_controls));
+ if (err < 0)
+ return err;
/* Add N810 specific widgets */
snd_soc_dapm_new_controls(codec, aic33_dapm_widgets,
return err;
}
+static struct snd_soc_dai_ops omap_mcbsp_dai_ops = {
+ .startup = omap_mcbsp_dai_startup,
+ .shutdown = omap_mcbsp_dai_shutdown,
+ .trigger = omap_mcbsp_dai_trigger,
+ .hw_params = omap_mcbsp_dai_hw_params,
+ .set_fmt = omap_mcbsp_dai_set_dai_fmt,
+ .set_clkdiv = omap_mcbsp_dai_set_clkdiv,
+ .set_sysclk = omap_mcbsp_dai_set_dai_sysclk,
+};
+
#define OMAP_MCBSP_DAI_BUILDER(link_id) \
{ \
.name = "omap-mcbsp-dai-"#link_id, \
.rates = OMAP_MCBSP_RATES, \
.formats = SNDRV_PCM_FMTBIT_S16_LE, \
}, \
- .ops = { \
- .startup = omap_mcbsp_dai_startup, \
- .shutdown = omap_mcbsp_dai_shutdown, \
- .trigger = omap_mcbsp_dai_trigger, \
- .hw_params = omap_mcbsp_dai_hw_params, \
- .set_fmt = omap_mcbsp_dai_set_dai_fmt, \
- .set_clkdiv = omap_mcbsp_dai_set_clkdiv, \
- .set_sysclk = omap_mcbsp_dai_set_dai_sysclk, \
- }, \
+ .ops = &omap_mcbsp_dai_ops, \
.private_data = &mcbsp_data[(link_id)].bus_id, \
}
runtime->dma_bytes);
}
-struct snd_pcm_ops omap_pcm_ops = {
+static struct snd_pcm_ops omap_pcm_ops = {
.open = omap_pcm_open,
.close = omap_pcm_close,
.ioctl = snd_pcm_lib_ioctl,
};
static const struct snd_soc_dapm_widget omap3pandora_in_dapm_widgets[] = {
- SND_SOC_DAPM_MIC("Mic (Internal)", NULL),
+ SND_SOC_DAPM_MIC("Mic (internal)", NULL),
SND_SOC_DAPM_MIC("Mic (external)", NULL),
SND_SOC_DAPM_LINE("Line In", NULL),
};
};
static const struct snd_soc_dapm_route omap3pandora_in_map[] = {
- {"INL", NULL, "Line In"},
- {"INR", NULL, "Line In"},
- {"INL", NULL, "Mic (Internal)"},
- {"INR", NULL, "Mic (external)"},
+ {"AUXL", NULL, "Line In"},
+ {"AUXR", NULL, "Line In"},
+
+ {"MAINMIC", NULL, "Mic Bias 1"},
+ {"Mic Bias 1", NULL, "Mic (internal)"},
+
+ {"SUBMIC", NULL, "Mic Bias 2"},
+ {"Mic Bias 2", NULL, "Mic (external)"},
};
static int omap3pandora_out_init(struct snd_soc_codec *codec)
{
int ret;
+ /* All TWL4030 output pins are floating */
+ snd_soc_dapm_nc_pin(codec, "OUTL");
+ snd_soc_dapm_nc_pin(codec, "OUTR");
+ snd_soc_dapm_nc_pin(codec, "EARPIECE");
+ snd_soc_dapm_nc_pin(codec, "PREDRIVEL");
+ snd_soc_dapm_nc_pin(codec, "PREDRIVER");
+ snd_soc_dapm_nc_pin(codec, "HSOL");
+ snd_soc_dapm_nc_pin(codec, "HSOR");
+ snd_soc_dapm_nc_pin(codec, "CARKITL");
+ snd_soc_dapm_nc_pin(codec, "CARKITR");
+ snd_soc_dapm_nc_pin(codec, "HFL");
+ snd_soc_dapm_nc_pin(codec, "HFR");
+
ret = snd_soc_dapm_new_controls(codec, omap3pandora_out_dapm_widgets,
ARRAY_SIZE(omap3pandora_out_dapm_widgets));
if (ret < 0)
{
int ret;
- /* All TWL4030 output pins are floating */
- snd_soc_dapm_nc_pin(codec, "OUTL"),
- snd_soc_dapm_nc_pin(codec, "OUTR"),
- snd_soc_dapm_nc_pin(codec, "EARPIECE"),
- snd_soc_dapm_nc_pin(codec, "PREDRIVEL"),
- snd_soc_dapm_nc_pin(codec, "PREDRIVER"),
- snd_soc_dapm_nc_pin(codec, "HSOL"),
- snd_soc_dapm_nc_pin(codec, "HSOR"),
- snd_soc_dapm_nc_pin(codec, "CARKITL"),
- snd_soc_dapm_nc_pin(codec, "CARKITR"),
- snd_soc_dapm_nc_pin(codec, "HFL"),
- snd_soc_dapm_nc_pin(codec, "HFR"),
+ /* Not comnnected */
+ snd_soc_dapm_nc_pin(codec, "HSMIC");
+ snd_soc_dapm_nc_pin(codec, "CARKITMIC");
+ snd_soc_dapm_nc_pin(codec, "DIGIMIC0");
+ snd_soc_dapm_nc_pin(codec, "DIGIMIC1");
ret = snd_soc_dapm_new_controls(codec, omap3pandora_in_dapm_widgets,
ARRAY_SIZE(omap3pandora_in_dapm_widgets));
{
int ret;
- if (!machine_is_omap3_pandora()) {
- pr_debug(PREFIX "Not OMAP3 Pandora\n");
+ if (!machine_is_omap3_pandora())
return -ENODEV;
- }
+
pr_info("OMAP3 Pandora SoC init\n");
ret = gpio_request(OMAP3_PANDORA_DAC_POWER_GPIO, "dac_power");
return -ENODEV;
}
- if (clk_get_usecount(tlv320aic23_mclk) > 0) {
- /* MCLK is already in use */
- printk(KERN_WARNING
- "MCLK in use at %d Hz. We change it to %d Hz\n",
- (uint) clk_get_rate(tlv320aic23_mclk), CODEC_CLOCK);
- }
-
/*
* Configure 12 MHz output on MCLK.
*/
}
}
- printk(KERN_INFO "MCLK = %d [%d], usecount = %d\n",
- (uint) clk_get_rate(tlv320aic23_mclk), CODEC_CLOCK,
- clk_get_usecount(tlv320aic23_mclk));
+ printk(KERN_INFO "MCLK = %d [%d]\n",
+ (uint) clk_get_rate(tlv320aic23_mclk), CODEC_CLOCK);
return 0;
err1:
#include <sound/pcm.h>
#include <sound/soc.h>
#include <sound/soc-dapm.h>
+#include <sound/jack.h>
#include <asm/mach-types.h>
#include <mach/hardware.h>
#include "omap-pcm.h"
#include "../codecs/twl4030.h"
+static struct snd_soc_card snd_soc_sdp3430;
+
static int sdp3430_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
.hw_params = sdp3430_hw_params,
};
+/* Headset jack */
+static struct snd_soc_jack hs_jack;
+
+/* Headset jack detection DAPM pins */
+static struct snd_soc_jack_pin hs_jack_pins[] = {
+ {
+ .pin = "Headset Mic",
+ .mask = SND_JACK_MICROPHONE,
+ },
+ {
+ .pin = "Headset Stereophone",
+ .mask = SND_JACK_HEADPHONE,
+ },
+};
+
+/* Headset jack detection gpios */
+static struct snd_soc_jack_gpio hs_jack_gpios[] = {
+ {
+ .gpio = (OMAP_MAX_GPIO_LINES + 2),
+ .name = "hsdet-gpio",
+ .report = SND_JACK_HEADSET,
+ .debounce_time = 200,
+ },
+};
+
+/* SDP3430 machine DAPM */
+static const struct snd_soc_dapm_widget sdp3430_twl4030_dapm_widgets[] = {
+ SND_SOC_DAPM_MIC("Ext Mic", NULL),
+ SND_SOC_DAPM_SPK("Ext Spk", NULL),
+ SND_SOC_DAPM_MIC("Headset Mic", NULL),
+ SND_SOC_DAPM_HP("Headset Stereophone", NULL),
+};
+
+static const struct snd_soc_dapm_route audio_map[] = {
+ /* External Mics: MAINMIC, SUBMIC with bias*/
+ {"MAINMIC", NULL, "Mic Bias 1"},
+ {"SUBMIC", NULL, "Mic Bias 2"},
+ {"Mic Bias 1", NULL, "Ext Mic"},
+ {"Mic Bias 2", NULL, "Ext Mic"},
+
+ /* External Speakers: HFL, HFR */
+ {"Ext Spk", NULL, "HFL"},
+ {"Ext Spk", NULL, "HFR"},
+
+ /* Headset Mic: HSMIC with bias */
+ {"HSMIC", NULL, "Headset Mic Bias"},
+ {"Headset Mic Bias", NULL, "Headset Mic"},
+
+ /* Headset Stereophone (Headphone): HSOL, HSOR */
+ {"Headset Stereophone", NULL, "HSOL"},
+ {"Headset Stereophone", NULL, "HSOR"},
+};
+
+static int sdp3430_twl4030_init(struct snd_soc_codec *codec)
+{
+ int ret;
+
+ /* Add SDP3430 specific widgets */
+ ret = snd_soc_dapm_new_controls(codec, sdp3430_twl4030_dapm_widgets,
+ ARRAY_SIZE(sdp3430_twl4030_dapm_widgets));
+ if (ret)
+ return ret;
+
+ /* Set up SDP3430 specific audio path audio_map */
+ snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
+
+ /* SDP3430 connected pins */
+ snd_soc_dapm_enable_pin(codec, "Ext Mic");
+ snd_soc_dapm_enable_pin(codec, "Ext Spk");
+ snd_soc_dapm_disable_pin(codec, "Headset Mic");
+ snd_soc_dapm_disable_pin(codec, "Headset Stereophone");
+
+ /* TWL4030 not connected pins */
+ snd_soc_dapm_nc_pin(codec, "AUXL");
+ snd_soc_dapm_nc_pin(codec, "AUXR");
+ snd_soc_dapm_nc_pin(codec, "CARKITMIC");
+ snd_soc_dapm_nc_pin(codec, "DIGIMIC0");
+ snd_soc_dapm_nc_pin(codec, "DIGIMIC1");
+
+ snd_soc_dapm_nc_pin(codec, "OUTL");
+ snd_soc_dapm_nc_pin(codec, "OUTR");
+ snd_soc_dapm_nc_pin(codec, "EARPIECE");
+ snd_soc_dapm_nc_pin(codec, "PREDRIVEL");
+ snd_soc_dapm_nc_pin(codec, "PREDRIVER");
+ snd_soc_dapm_nc_pin(codec, "CARKITL");
+ snd_soc_dapm_nc_pin(codec, "CARKITR");
+
+ ret = snd_soc_dapm_sync(codec);
+ if (ret)
+ return ret;
+
+ /* Headset jack detection */
+ ret = snd_soc_jack_new(&snd_soc_sdp3430, "Headset Jack",
+ SND_JACK_HEADSET, &hs_jack);
+ if (ret)
+ return ret;
+
+ ret = snd_soc_jack_add_pins(&hs_jack, ARRAY_SIZE(hs_jack_pins),
+ hs_jack_pins);
+ if (ret)
+ return ret;
+
+ ret = snd_soc_jack_add_gpios(&hs_jack, ARRAY_SIZE(hs_jack_gpios),
+ hs_jack_gpios);
+
+ return ret;
+}
+
/* Digital audio interface glue - connects codec <--> CPU */
static struct snd_soc_dai_link sdp3430_dai = {
.name = "TWL4030",
.stream_name = "TWL4030",
.cpu_dai = &omap_mcbsp_dai[0],
.codec_dai = &twl4030_dai,
+ .init = sdp3430_twl4030_init,
.ops = &sdp3430_ops,
};
static void __exit sdp3430_soc_exit(void)
{
+ snd_soc_jack_free_gpios(&hs_jack, ARRAY_SIZE(hs_jack_gpios),
+ hs_jack_gpios);
+
platform_device_unregister(sdp3430_snd_device);
}
module_exit(sdp3430_soc_exit);
Say Y if you want to add support for SoC audio on Sharp
Zaurus SL-C6000x models (Tosa).
+config SND_PXA2XX_SOC_E740
+ tristate "SoC AC97 Audio support for e740"
+ depends on SND_PXA2XX_SOC && MACH_E740
+ select SND_SOC_WM9705
+ select SND_PXA2XX_SOC_AC97
+ help
+ Say Y if you want to add support for SoC audio on the
+ toshiba e740 PDA
+
+config SND_PXA2XX_SOC_E750
+ tristate "SoC AC97 Audio support for e750"
+ depends on SND_PXA2XX_SOC && MACH_E750
+ select SND_SOC_WM9705
+ select SND_PXA2XX_SOC_AC97
+ help
+ Say Y if you want to add support for SoC audio on the
+ toshiba e750 PDA
+
config SND_PXA2XX_SOC_E800
tristate "SoC AC97 Audio support for e800"
depends on SND_PXA2XX_SOC && MACH_E800
help
Say Y if you want to add support for SoC audio on the
Marvell Zylonite reference platform.
+
+config SND_PXA2XX_SOC_MIOA701
+ tristate "SoC Audio support for MIO A701"
+ depends on SND_PXA2XX_SOC && MACH_MIOA701
+ select SND_PXA2XX_SOC_AC97
+ select SND_SOC_WM9713
+ help
+ Say Y if you want to add support for SoC audio on the
+ MIO A701.
snd-soc-corgi-objs := corgi.o
snd-soc-poodle-objs := poodle.o
snd-soc-tosa-objs := tosa.o
+snd-soc-e740-objs := e740_wm9705.o
+snd-soc-e750-objs := e750_wm9705.o
snd-soc-e800-objs := e800_wm9712.o
snd-soc-spitz-objs := spitz.o
snd-soc-em-x270-objs := em-x270.o
snd-soc-palm27x-objs := palm27x.o
snd-soc-zylonite-objs := zylonite.o
+snd-soc-mioa701-objs := mioa701_wm9713.o
obj-$(CONFIG_SND_PXA2XX_SOC_CORGI) += snd-soc-corgi.o
obj-$(CONFIG_SND_PXA2XX_SOC_POODLE) += snd-soc-poodle.o
obj-$(CONFIG_SND_PXA2XX_SOC_TOSA) += snd-soc-tosa.o
+obj-$(CONFIG_SND_PXA2XX_SOC_E740) += snd-soc-e740.o
+obj-$(CONFIG_SND_PXA2XX_SOC_E750) += snd-soc-e750.o
obj-$(CONFIG_SND_PXA2XX_SOC_E800) += snd-soc-e800.o
obj-$(CONFIG_SND_PXA2XX_SOC_SPITZ) += snd-soc-spitz.o
obj-$(CONFIG_SND_PXA2XX_SOC_EM_X270) += snd-soc-em-x270.o
obj-$(CONFIG_SND_PXA2XX_SOC_PALM27X) += snd-soc-palm27x.o
+obj-$(CONFIG_SND_PXA2XX_SOC_MIOA701) += snd-soc-mioa701.o
obj-$(CONFIG_SND_SOC_ZYLONITE) += snd-soc-zylonite.o
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/timer.h>
+#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
static int corgi_startup(struct snd_pcm_substream *substream)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct snd_soc_codec *codec = rtd->socdev->codec;
+ struct snd_soc_codec *codec = rtd->socdev->card->codec;
/* check the jack status at stream startup */
corgi_ext_control(codec);
*/
static int corgi_wm8731_init(struct snd_soc_codec *codec)
{
- int i, err;
+ int err;
snd_soc_dapm_nc_pin(codec, "LLINEIN");
snd_soc_dapm_nc_pin(codec, "RLINEIN");
/* Add corgi specific controls */
- for (i = 0; i < ARRAY_SIZE(wm8731_corgi_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&wm8731_corgi_controls[i], codec, NULL));
- if (err < 0)
- return err;
- }
+ err = snd_soc_add_controls(codec, wm8731_corgi_controls,
+ ARRAY_SIZE(wm8731_corgi_controls));
+ if (err < 0)
+ return err;
/* Add corgi specific widgets */
snd_soc_dapm_new_controls(codec, wm8731_dapm_widgets,
.num_links = 1,
};
-/* corgi audio private data */
-static struct wm8731_setup_data corgi_wm8731_setup = {
- .i2c_bus = 0,
- .i2c_address = 0x1b,
-};
-
/* corgi audio subsystem */
static struct snd_soc_device corgi_snd_devdata = {
.card = &snd_soc_corgi,
.codec_dev = &soc_codec_dev_wm8731,
- .codec_data = &corgi_wm8731_setup,
};
+/*
+ * FIXME: This is a temporary bodge to avoid cross-tree merge issues.
+ * New drivers should register the wm8731 I2C device in the machine
+ * setup code (under arch/arm for ARM systems).
+ */
+static int wm8731_i2c_register(void)
+{
+ struct i2c_board_info info;
+ struct i2c_adapter *adapter;
+ struct i2c_client *client;
+
+ memset(&info, 0, sizeof(struct i2c_board_info));
+ info.addr = 0x1b;
+ strlcpy(info.type, "wm8731", I2C_NAME_SIZE);
+
+ adapter = i2c_get_adapter(0);
+ if (!adapter) {
+ printk(KERN_ERR "can't get i2c adapter 0\n");
+ return -ENODEV;
+ }
+
+ client = i2c_new_device(adapter, &info);
+ i2c_put_adapter(adapter);
+ if (!client) {
+ printk(KERN_ERR "can't add i2c device at 0x%x\n",
+ (unsigned int)info.addr);
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
static struct platform_device *corgi_snd_device;
static int __init corgi_init(void)
machine_is_husky()))
return -ENODEV;
+ ret = wm8731_i2c_register();
+ if (ret != 0)
+ return ret;
+
corgi_snd_device = platform_device_alloc("soc-audio", -1);
if (!corgi_snd_device)
return -ENOMEM;
--- /dev/null
+/*
+ * e740-wm9705.c -- SoC audio for e740
+ *
+ * Copyright 2007 (c) Ian Molton <spyro@f2s.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; version 2 ONLY.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/gpio.h>
+
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+
+#include <mach/audio.h>
+#include <mach/eseries-gpio.h>
+
+#include <asm/mach-types.h>
+
+#include "../codecs/wm9705.h"
+#include "pxa2xx-pcm.h"
+#include "pxa2xx-ac97.h"
+
+
+#define E740_AUDIO_OUT 1
+#define E740_AUDIO_IN 2
+
+static int e740_audio_power;
+
+static void e740_sync_audio_power(int status)
+{
+ gpio_set_value(GPIO_E740_WM9705_nAVDD2, !status);
+ gpio_set_value(GPIO_E740_AMP_ON, (status & E740_AUDIO_OUT) ? 1 : 0);
+ gpio_set_value(GPIO_E740_MIC_ON, (status & E740_AUDIO_IN) ? 1 : 0);
+}
+
+static int e740_mic_amp_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ if (event & SND_SOC_DAPM_PRE_PMU)
+ e740_audio_power |= E740_AUDIO_IN;
+ else if (event & SND_SOC_DAPM_POST_PMD)
+ e740_audio_power &= ~E740_AUDIO_IN;
+
+ e740_sync_audio_power(e740_audio_power);
+
+ return 0;
+}
+
+static int e740_output_amp_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ if (event & SND_SOC_DAPM_PRE_PMU)
+ e740_audio_power |= E740_AUDIO_OUT;
+ else if (event & SND_SOC_DAPM_POST_PMD)
+ e740_audio_power &= ~E740_AUDIO_OUT;
+
+ e740_sync_audio_power(e740_audio_power);
+
+ return 0;
+}
+
+static const struct snd_soc_dapm_widget e740_dapm_widgets[] = {
+ SND_SOC_DAPM_HP("Headphone Jack", NULL),
+ SND_SOC_DAPM_SPK("Speaker", NULL),
+ SND_SOC_DAPM_MIC("Mic (Internal)", NULL),
+ SND_SOC_DAPM_PGA_E("Output Amp", SND_SOC_NOPM, 0, 0, NULL, 0,
+ e740_output_amp_event, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_PGA_E("Mic Amp", SND_SOC_NOPM, 0, 0, NULL, 0,
+ e740_mic_amp_event, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMD),
+};
+
+static const struct snd_soc_dapm_route audio_map[] = {
+ {"Output Amp", NULL, "LOUT"},
+ {"Output Amp", NULL, "ROUT"},
+ {"Output Amp", NULL, "MONOOUT"},
+
+ {"Speaker", NULL, "Output Amp"},
+ {"Headphone Jack", NULL, "Output Amp"},
+
+ {"MIC1", NULL, "Mic Amp"},
+ {"Mic Amp", NULL, "Mic (Internal)"},
+};
+
+static int e740_ac97_init(struct snd_soc_codec *codec)
+{
+ snd_soc_dapm_nc_pin(codec, "HPOUTL");
+ snd_soc_dapm_nc_pin(codec, "HPOUTR");
+ snd_soc_dapm_nc_pin(codec, "PHONE");
+ snd_soc_dapm_nc_pin(codec, "LINEINL");
+ snd_soc_dapm_nc_pin(codec, "LINEINR");
+ snd_soc_dapm_nc_pin(codec, "CDINL");
+ snd_soc_dapm_nc_pin(codec, "CDINR");
+ snd_soc_dapm_nc_pin(codec, "PCBEEP");
+ snd_soc_dapm_nc_pin(codec, "MIC2");
+
+ snd_soc_dapm_new_controls(codec, e740_dapm_widgets,
+ ARRAY_SIZE(e740_dapm_widgets));
+
+ snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
+
+ snd_soc_dapm_sync(codec);
+
+ return 0;
+}
+
+static struct snd_soc_dai_link e740_dai[] = {
+ {
+ .name = "AC97",
+ .stream_name = "AC97 HiFi",
+ .cpu_dai = &pxa_ac97_dai[PXA2XX_DAI_AC97_HIFI],
+ .codec_dai = &wm9705_dai[WM9705_DAI_AC97_HIFI],
+ .init = e740_ac97_init,
+ },
+ {
+ .name = "AC97 Aux",
+ .stream_name = "AC97 Aux",
+ .cpu_dai = &pxa_ac97_dai[PXA2XX_DAI_AC97_AUX],
+ .codec_dai = &wm9705_dai[WM9705_DAI_AC97_AUX],
+ },
+};
+
+static struct snd_soc_card e740 = {
+ .name = "Toshiba e740",
+ .platform = &pxa2xx_soc_platform,
+ .dai_link = e740_dai,
+ .num_links = ARRAY_SIZE(e740_dai),
+};
+
+static struct snd_soc_device e740_snd_devdata = {
+ .card = &e740,
+ .codec_dev = &soc_codec_dev_wm9705,
+};
+
+static struct platform_device *e740_snd_device;
+
+static int __init e740_init(void)
+{
+ int ret;
+
+ if (!machine_is_e740())
+ return -ENODEV;
+
+ ret = gpio_request(GPIO_E740_MIC_ON, "Mic amp");
+ if (ret)
+ return ret;
+
+ ret = gpio_request(GPIO_E740_AMP_ON, "Output amp");
+ if (ret)
+ goto free_mic_amp_gpio;
+
+ ret = gpio_request(GPIO_E740_WM9705_nAVDD2, "Audio power");
+ if (ret)
+ goto free_op_amp_gpio;
+
+ /* Disable audio */
+ ret = gpio_direction_output(GPIO_E740_MIC_ON, 0);
+ if (ret)
+ goto free_apwr_gpio;
+ ret = gpio_direction_output(GPIO_E740_AMP_ON, 0);
+ if (ret)
+ goto free_apwr_gpio;
+ ret = gpio_direction_output(GPIO_E740_WM9705_nAVDD2, 1);
+ if (ret)
+ goto free_apwr_gpio;
+
+ e740_snd_device = platform_device_alloc("soc-audio", -1);
+ if (!e740_snd_device) {
+ ret = -ENOMEM;
+ goto free_apwr_gpio;
+ }
+
+ platform_set_drvdata(e740_snd_device, &e740_snd_devdata);
+ e740_snd_devdata.dev = &e740_snd_device->dev;
+ ret = platform_device_add(e740_snd_device);
+
+ if (!ret)
+ return 0;
+
+/* Fail gracefully */
+ platform_device_put(e740_snd_device);
+free_apwr_gpio:
+ gpio_free(GPIO_E740_WM9705_nAVDD2);
+free_op_amp_gpio:
+ gpio_free(GPIO_E740_AMP_ON);
+free_mic_amp_gpio:
+ gpio_free(GPIO_E740_MIC_ON);
+
+ return ret;
+}
+
+static void __exit e740_exit(void)
+{
+ platform_device_unregister(e740_snd_device);
+}
+
+module_init(e740_init);
+module_exit(e740_exit);
+
+/* Module information */
+MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
+MODULE_DESCRIPTION("ALSA SoC driver for e740");
+MODULE_LICENSE("GPL v2");
--- /dev/null
+/*
+ * e750-wm9705.c -- SoC audio for e750
+ *
+ * Copyright 2007 (c) Ian Molton <spyro@f2s.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; version 2 ONLY.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/gpio.h>
+
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+
+#include <mach/audio.h>
+#include <mach/eseries-gpio.h>
+
+#include <asm/mach-types.h>
+
+#include "../codecs/wm9705.h"
+#include "pxa2xx-pcm.h"
+#include "pxa2xx-ac97.h"
+
+static int e750_spk_amp_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ if (event & SND_SOC_DAPM_PRE_PMU)
+ gpio_set_value(GPIO_E750_SPK_AMP_OFF, 0);
+ else if (event & SND_SOC_DAPM_POST_PMD)
+ gpio_set_value(GPIO_E750_SPK_AMP_OFF, 1);
+
+ return 0;
+}
+
+static int e750_hp_amp_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ if (event & SND_SOC_DAPM_PRE_PMU)
+ gpio_set_value(GPIO_E750_HP_AMP_OFF, 0);
+ else if (event & SND_SOC_DAPM_POST_PMD)
+ gpio_set_value(GPIO_E750_HP_AMP_OFF, 1);
+
+ return 0;
+}
+
+static const struct snd_soc_dapm_widget e750_dapm_widgets[] = {
+ SND_SOC_DAPM_HP("Headphone Jack", NULL),
+ SND_SOC_DAPM_SPK("Speaker", NULL),
+ SND_SOC_DAPM_MIC("Mic (Internal)", NULL),
+ SND_SOC_DAPM_PGA_E("Headphone Amp", SND_SOC_NOPM, 0, 0, NULL, 0,
+ e750_hp_amp_event, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_PGA_E("Speaker Amp", SND_SOC_NOPM, 0, 0, NULL, 0,
+ e750_spk_amp_event, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMD),
+};
+
+static const struct snd_soc_dapm_route audio_map[] = {
+ {"Headphone Amp", NULL, "HPOUTL"},
+ {"Headphone Amp", NULL, "HPOUTR"},
+ {"Headphone Jack", NULL, "Headphone Amp"},
+
+ {"Speaker Amp", NULL, "MONOOUT"},
+ {"Speaker", NULL, "Speaker Amp"},
+
+ {"MIC1", NULL, "Mic (Internal)"},
+};
+
+static int e750_ac97_init(struct snd_soc_codec *codec)
+{
+ snd_soc_dapm_nc_pin(codec, "LOUT");
+ snd_soc_dapm_nc_pin(codec, "ROUT");
+ snd_soc_dapm_nc_pin(codec, "PHONE");
+ snd_soc_dapm_nc_pin(codec, "LINEINL");
+ snd_soc_dapm_nc_pin(codec, "LINEINR");
+ snd_soc_dapm_nc_pin(codec, "CDINL");
+ snd_soc_dapm_nc_pin(codec, "CDINR");
+ snd_soc_dapm_nc_pin(codec, "PCBEEP");
+ snd_soc_dapm_nc_pin(codec, "MIC2");
+
+ snd_soc_dapm_new_controls(codec, e750_dapm_widgets,
+ ARRAY_SIZE(e750_dapm_widgets));
+
+ snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
+
+ snd_soc_dapm_sync(codec);
+
+ return 0;
+}
+
+static struct snd_soc_dai_link e750_dai[] = {
+ {
+ .name = "AC97",
+ .stream_name = "AC97 HiFi",
+ .cpu_dai = &pxa_ac97_dai[PXA2XX_DAI_AC97_HIFI],
+ .codec_dai = &wm9705_dai[WM9705_DAI_AC97_HIFI],
+ .init = e750_ac97_init,
+ /* use ops to check startup state */
+ },
+ {
+ .name = "AC97 Aux",
+ .stream_name = "AC97 Aux",
+ .cpu_dai = &pxa_ac97_dai[PXA2XX_DAI_AC97_AUX],
+ .codec_dai = &wm9705_dai[WM9705_DAI_AC97_AUX],
+ },
+};
+
+static struct snd_soc_card e750 = {
+ .name = "Toshiba e750",
+ .platform = &pxa2xx_soc_platform,
+ .dai_link = e750_dai,
+ .num_links = ARRAY_SIZE(e750_dai),
+};
+
+static struct snd_soc_device e750_snd_devdata = {
+ .card = &e750,
+ .codec_dev = &soc_codec_dev_wm9705,
+};
+
+static struct platform_device *e750_snd_device;
+
+static int __init e750_init(void)
+{
+ int ret;
+
+ if (!machine_is_e750())
+ return -ENODEV;
+
+ ret = gpio_request(GPIO_E750_HP_AMP_OFF, "Headphone amp");
+ if (ret)
+ return ret;
+
+ ret = gpio_request(GPIO_E750_SPK_AMP_OFF, "Speaker amp");
+ if (ret)
+ goto free_hp_amp_gpio;
+
+ ret = gpio_direction_output(GPIO_E750_HP_AMP_OFF, 1);
+ if (ret)
+ goto free_spk_amp_gpio;
+
+ ret = gpio_direction_output(GPIO_E750_SPK_AMP_OFF, 1);
+ if (ret)
+ goto free_spk_amp_gpio;
+
+ e750_snd_device = platform_device_alloc("soc-audio", -1);
+ if (!e750_snd_device) {
+ ret = -ENOMEM;
+ goto free_spk_amp_gpio;
+ }
+
+ platform_set_drvdata(e750_snd_device, &e750_snd_devdata);
+ e750_snd_devdata.dev = &e750_snd_device->dev;
+ ret = platform_device_add(e750_snd_device);
+
+ if (!ret)
+ return 0;
+
+/* Fail gracefully */
+ platform_device_put(e750_snd_device);
+free_spk_amp_gpio:
+ gpio_free(GPIO_E750_SPK_AMP_OFF);
+free_hp_amp_gpio:
+ gpio_free(GPIO_E750_HP_AMP_OFF);
+
+ return ret;
+}
+
+static void __exit e750_exit(void)
+{
+ platform_device_unregister(e750_snd_device);
+ gpio_free(GPIO_E750_SPK_AMP_OFF);
+ gpio_free(GPIO_E750_HP_AMP_OFF);
+}
+
+module_init(e750_init);
+module_exit(e750_exit);
+
+/* Module information */
+MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
+MODULE_DESCRIPTION("ALSA SoC driver for e750");
+MODULE_LICENSE("GPL v2");
/*
* e800-wm9712.c -- SoC audio for e800
*
- * Based on tosa.c
- *
* Copyright 2007 (c) Ian Molton <spyro@f2s.com>
*
* This program is free software; you can redistribute it and/or modify it
#include <linux/module.h>
#include <linux/moduleparam.h>
-#include <linux/device.h>
+#include <linux/gpio.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/soc-dapm.h>
#include <asm/mach-types.h>
-#include <mach/pxa-regs.h>
-#include <mach/hardware.h>
#include <mach/audio.h>
+#include <mach/eseries-gpio.h>
#include "../codecs/wm9712.h"
#include "pxa2xx-pcm.h"
#include "pxa2xx-ac97.h"
-static struct snd_soc_card e800;
+static int e800_spk_amp_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ if (event & SND_SOC_DAPM_PRE_PMU)
+ gpio_set_value(GPIO_E800_SPK_AMP_ON, 1);
+ else if (event & SND_SOC_DAPM_POST_PMD)
+ gpio_set_value(GPIO_E800_SPK_AMP_ON, 0);
-static struct snd_soc_dai_link e800_dai[] = {
+ return 0;
+}
+
+static int e800_hp_amp_event(struct snd_soc_dapm_widget *w,
+ struct snd_kcontrol *kcontrol, int event)
+{
+ if (event & SND_SOC_DAPM_PRE_PMU)
+ gpio_set_value(GPIO_E800_HP_AMP_OFF, 0);
+ else if (event & SND_SOC_DAPM_POST_PMD)
+ gpio_set_value(GPIO_E800_HP_AMP_OFF, 1);
+
+ return 0;
+}
+
+static const struct snd_soc_dapm_widget e800_dapm_widgets[] = {
+ SND_SOC_DAPM_HP("Headphone Jack", NULL),
+ SND_SOC_DAPM_MIC("Mic (Internal1)", NULL),
+ SND_SOC_DAPM_MIC("Mic (Internal2)", NULL),
+ SND_SOC_DAPM_SPK("Speaker", NULL),
+ SND_SOC_DAPM_PGA_E("Headphone Amp", SND_SOC_NOPM, 0, 0, NULL, 0,
+ e800_hp_amp_event, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMD),
+ SND_SOC_DAPM_PGA_E("Speaker Amp", SND_SOC_NOPM, 0, 0, NULL, 0,
+ e800_spk_amp_event, SND_SOC_DAPM_PRE_PMU |
+ SND_SOC_DAPM_POST_PMD),
+};
+
+static const struct snd_soc_dapm_route audio_map[] = {
+ {"Headphone Jack", NULL, "HPOUTL"},
+ {"Headphone Jack", NULL, "HPOUTR"},
+ {"Headphone Jack", NULL, "Headphone Amp"},
+
+ {"Speaker Amp", NULL, "MONOOUT"},
+ {"Speaker", NULL, "Speaker Amp"},
+
+ {"MIC1", NULL, "Mic (Internal1)"},
+ {"MIC2", NULL, "Mic (Internal2)"},
+};
+
+static int e800_ac97_init(struct snd_soc_codec *codec)
{
- .name = "AC97 Aux",
- .stream_name = "AC97 Aux",
- .cpu_dai = &pxa_ac97_dai[PXA2XX_DAI_AC97_AUX],
- .codec_dai = &wm9712_dai[WM9712_DAI_AC97_AUX],
-},
+ snd_soc_dapm_new_controls(codec, e800_dapm_widgets,
+ ARRAY_SIZE(e800_dapm_widgets));
+
+ snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
+ snd_soc_dapm_sync(codec);
+
+ return 0;
+}
+
+static struct snd_soc_dai_link e800_dai[] = {
+ {
+ .name = "AC97",
+ .stream_name = "AC97 HiFi",
+ .cpu_dai = &pxa_ac97_dai[PXA2XX_DAI_AC97_HIFI],
+ .codec_dai = &wm9712_dai[WM9712_DAI_AC97_HIFI],
+ .init = e800_ac97_init,
+ },
+ {
+ .name = "AC97 Aux",
+ .stream_name = "AC97 Aux",
+ .cpu_dai = &pxa_ac97_dai[PXA2XX_DAI_AC97_AUX],
+ .codec_dai = &wm9712_dai[WM9712_DAI_AC97_AUX],
+ },
};
static struct snd_soc_card e800 = {
if (!machine_is_e800())
return -ENODEV;
+ ret = gpio_request(GPIO_E800_HP_AMP_OFF, "Headphone amp");
+ if (ret)
+ return ret;
+
+ ret = gpio_request(GPIO_E800_SPK_AMP_ON, "Speaker amp");
+ if (ret)
+ goto free_hp_amp_gpio;
+
+ ret = gpio_direction_output(GPIO_E800_HP_AMP_OFF, 1);
+ if (ret)
+ goto free_spk_amp_gpio;
+
+ ret = gpio_direction_output(GPIO_E800_SPK_AMP_ON, 1);
+ if (ret)
+ goto free_spk_amp_gpio;
+
e800_snd_device = platform_device_alloc("soc-audio", -1);
if (!e800_snd_device)
return -ENOMEM;
e800_snd_devdata.dev = &e800_snd_device->dev;
ret = platform_device_add(e800_snd_device);
- if (ret)
- platform_device_put(e800_snd_device);
+ if (!ret)
+ return 0;
+
+/* Fail gracefully */
+ platform_device_put(e800_snd_device);
+free_spk_amp_gpio:
+ gpio_free(GPIO_E800_SPK_AMP_ON);
+free_hp_amp_gpio:
+ gpio_free(GPIO_E800_HP_AMP_OFF);
return ret;
}
static void __exit e800_exit(void)
{
platform_device_unregister(e800_snd_device);
+ gpio_free(GPIO_E800_SPK_AMP_ON);
+ gpio_free(GPIO_E800_HP_AMP_OFF);
}
module_init(e800_init);
/* Module information */
MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
MODULE_DESCRIPTION("ALSA SoC driver for e800");
-MODULE_LICENSE("GPL");
+MODULE_LICENSE("GPL v2");
--- /dev/null
+/*
+ * Handles the Mitac mioa701 SoC system
+ *
+ * Copyright (C) 2008 Robert Jarzmik
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation in version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * This is a little schema of the sound interconnections :
+ *
+ * Sagem X200 Wolfson WM9713
+ * +--------+ +-------------------+ Rear Speaker
+ * | | | | /-+
+ * | +--->----->---+MONOIN SPKL+--->----+-+ |
+ * | GSM | | | | | |
+ * | +--->----->---+PCBEEP SPKR+--->----+-+ |
+ * | CHIP | | | \-+
+ * | +---<-----<---+MONO |
+ * | | | | Front Speaker
+ * +--------+ | | /-+
+ * | HPL+--->----+-+ |
+ * | | | | |
+ * | OUT3+--->----+-+ |
+ * | | \-+
+ * | |
+ * | | Front Micro
+ * | | +
+ * | MIC1+-----<--+o+
+ * | | +
+ * +-------------------+ ---
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach-types.h>
+#include <mach/audio.h>
+
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include <sound/initval.h>
+#include <sound/ac97_codec.h>
+
+#include "pxa2xx-pcm.h"
+#include "pxa2xx-ac97.h"
+#include "../codecs/wm9713.h"
+
+#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
+
+#define AC97_GPIO_PULL 0x58
+
+/* Use GPIO8 for rear speaker amplifier */
+static int rear_amp_power(struct snd_soc_codec *codec, int power)
+{
+ unsigned short reg;
+
+ if (power) {
+ reg = snd_soc_read(codec, AC97_GPIO_CFG);
+ snd_soc_write(codec, AC97_GPIO_CFG, reg | 0x0100);
+ reg = snd_soc_read(codec, AC97_GPIO_PULL);
+ snd_soc_write(codec, AC97_GPIO_PULL, reg | (1<<15));
+ } else {
+ reg = snd_soc_read(codec, AC97_GPIO_CFG);
+ snd_soc_write(codec, AC97_GPIO_CFG, reg & ~0x0100);
+ reg = snd_soc_read(codec, AC97_GPIO_PULL);
+ snd_soc_write(codec, AC97_GPIO_PULL, reg & ~(1<<15));
+ }
+
+ return 0;
+}
+
+static int rear_amp_event(struct snd_soc_dapm_widget *widget,
+ struct snd_kcontrol *kctl, int event)
+{
+ struct snd_soc_codec *codec = widget->codec;
+
+ return rear_amp_power(codec, SND_SOC_DAPM_EVENT_ON(event));
+}
+
+/* mioa701 machine dapm widgets */
+static const struct snd_soc_dapm_widget mioa701_dapm_widgets[] = {
+ SND_SOC_DAPM_SPK("Front Speaker", NULL),
+ SND_SOC_DAPM_SPK("Rear Speaker", rear_amp_event),
+ SND_SOC_DAPM_MIC("Headset", NULL),
+ SND_SOC_DAPM_LINE("GSM Line Out", NULL),
+ SND_SOC_DAPM_LINE("GSM Line In", NULL),
+ SND_SOC_DAPM_MIC("Headset Mic", NULL),
+ SND_SOC_DAPM_MIC("Front Mic", NULL),
+};
+
+static const struct snd_soc_dapm_route audio_map[] = {
+ /* Call Mic */
+ {"Mic Bias", NULL, "Front Mic"},
+ {"MIC1", NULL, "Mic Bias"},
+
+ /* Headset Mic */
+ {"LINEL", NULL, "Headset Mic"},
+ {"LINER", NULL, "Headset Mic"},
+
+ /* GSM Module */
+ {"MONOIN", NULL, "GSM Line Out"},
+ {"PCBEEP", NULL, "GSM Line Out"},
+ {"GSM Line In", NULL, "MONO"},
+
+ /* headphone connected to HPL, HPR */
+ {"Headset", NULL, "HPL"},
+ {"Headset", NULL, "HPR"},
+
+ /* front speaker connected to HPL, OUT3 */
+ {"Front Speaker", NULL, "HPL"},
+ {"Front Speaker", NULL, "OUT3"},
+
+ /* rear speaker connected to SPKL, SPKR */
+ {"Rear Speaker", NULL, "SPKL"},
+ {"Rear Speaker", NULL, "SPKR"},
+};
+
+static int mioa701_wm9713_init(struct snd_soc_codec *codec)
+{
+ unsigned short reg;
+
+ /* Add mioa701 specific widgets */
+ snd_soc_dapm_new_controls(codec, ARRAY_AND_SIZE(mioa701_dapm_widgets));
+
+ /* Set up mioa701 specific audio path audio_mapnects */
+ snd_soc_dapm_add_routes(codec, ARRAY_AND_SIZE(audio_map));
+
+ /* Prepare GPIO8 for rear speaker amplifier */
+ reg = codec->read(codec, AC97_GPIO_CFG);
+ codec->write(codec, AC97_GPIO_CFG, reg | 0x0100);
+
+ /* Prepare MIC input */
+ reg = codec->read(codec, AC97_3D_CONTROL);
+ codec->write(codec, AC97_3D_CONTROL, reg | 0xc000);
+
+ snd_soc_dapm_enable_pin(codec, "Front Speaker");
+ snd_soc_dapm_enable_pin(codec, "Rear Speaker");
+ snd_soc_dapm_enable_pin(codec, "Front Mic");
+ snd_soc_dapm_enable_pin(codec, "GSM Line In");
+ snd_soc_dapm_enable_pin(codec, "GSM Line Out");
+ snd_soc_dapm_sync(codec);
+
+ return 0;
+}
+
+static struct snd_soc_ops mioa701_ops;
+
+static struct snd_soc_dai_link mioa701_dai[] = {
+ {
+ .name = "AC97",
+ .stream_name = "AC97 HiFi",
+ .cpu_dai = &pxa_ac97_dai[PXA2XX_DAI_AC97_HIFI],
+ .codec_dai = &wm9713_dai[WM9713_DAI_AC97_HIFI],
+ .init = mioa701_wm9713_init,
+ .ops = &mioa701_ops,
+ },
+ {
+ .name = "AC97 Aux",
+ .stream_name = "AC97 Aux",
+ .cpu_dai = &pxa_ac97_dai[PXA2XX_DAI_AC97_AUX],
+ .codec_dai = &wm9713_dai[WM9713_DAI_AC97_AUX],
+ .ops = &mioa701_ops,
+ },
+};
+
+static struct snd_soc_card mioa701 = {
+ .name = "MioA701",
+ .platform = &pxa2xx_soc_platform,
+ .dai_link = mioa701_dai,
+ .num_links = ARRAY_SIZE(mioa701_dai),
+};
+
+static struct snd_soc_device mioa701_snd_devdata = {
+ .card = &mioa701,
+ .codec_dev = &soc_codec_dev_wm9713,
+};
+
+static struct platform_device *mioa701_snd_device;
+
+static int mioa701_wm9713_probe(struct platform_device *pdev)
+{
+ int ret;
+
+ if (!machine_is_mioa701())
+ return -ENODEV;
+
+ dev_warn(&pdev->dev, "Be warned that incorrect mixers/muxes setup will"
+ "lead to overheating and possible destruction of your device."
+ "Do not use without a good knowledge of mio's board design!\n");
+
+ mioa701_snd_device = platform_device_alloc("soc-audio", -1);
+ if (!mioa701_snd_device)
+ return -ENOMEM;
+
+ platform_set_drvdata(mioa701_snd_device, &mioa701_snd_devdata);
+ mioa701_snd_devdata.dev = &mioa701_snd_device->dev;
+
+ ret = platform_device_add(mioa701_snd_device);
+ if (!ret)
+ return 0;
+
+ platform_device_put(mioa701_snd_device);
+ return ret;
+}
+
+static int __devexit mioa701_wm9713_remove(struct platform_device *pdev)
+{
+ platform_device_unregister(mioa701_snd_device);
+ return 0;
+}
+
+static struct platform_driver mioa701_wm9713_driver = {
+ .probe = mioa701_wm9713_probe,
+ .remove = __devexit_p(mioa701_wm9713_remove),
+ .driver = {
+ .name = "mioa701-wm9713",
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init mioa701_asoc_init(void)
+{
+ return platform_driver_register(&mioa701_wm9713_driver);
+}
+
+static void __exit mioa701_asoc_exit(void)
+{
+ platform_driver_unregister(&mioa701_wm9713_driver);
+}
+
+module_init(mioa701_asoc_init);
+module_exit(mioa701_asoc_exit);
+
+/* Module information */
+MODULE_AUTHOR("Robert Jarzmik (rjarzmik@free.fr)");
+MODULE_DESCRIPTION("ALSA SoC WM9713 MIO A701");
+MODULE_LICENSE("GPL");
static int palm27x_startup(struct snd_pcm_substream *substream)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct snd_soc_codec *codec = rtd->socdev->codec;
+ struct snd_soc_codec *codec = rtd->socdev->card->codec;
/* check the jack status at stream startup */
palm27x_ext_control(codec);
static int palm27x_ac97_init(struct snd_soc_codec *codec)
{
- int i, err;
+ int err;
snd_soc_dapm_nc_pin(codec, "OUT3");
snd_soc_dapm_nc_pin(codec, "MONOOUT");
/* add palm27x specific controls */
- for (i = 0; i < ARRAY_SIZE(palm27x_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&palm27x_controls[i],
- codec, NULL));
- if (err < 0)
- return err;
- }
+ err = snd_soc_add_controls(codec, palm27x_controls,
+ ARRAY_SIZE(palm27x_controls));
+ if (err < 0)
+ return err;
/* add palm27x specific widgets */
snd_soc_dapm_new_controls(codec, palm27x_dapm_widgets,
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/timer.h>
+#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <sound/core.h>
static int poodle_startup(struct snd_pcm_substream *substream)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct snd_soc_codec *codec = rtd->socdev->codec;
+ struct snd_soc_codec *codec = rtd->socdev->card->codec;
/* check the jack status at stream startup */
poodle_ext_control(codec);
*/
static int poodle_wm8731_init(struct snd_soc_codec *codec)
{
- int i, err;
+ int err;
snd_soc_dapm_nc_pin(codec, "LLINEIN");
snd_soc_dapm_nc_pin(codec, "RLINEIN");
snd_soc_dapm_enable_pin(codec, "MICIN");
/* Add poodle specific controls */
- for (i = 0; i < ARRAY_SIZE(wm8731_poodle_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&wm8731_poodle_controls[i], codec, NULL));
- if (err < 0)
- return err;
- }
+ err = snd_soc_add_controls(codec, wm8731_poodle_controls,
+ ARRAY_SIZE(wm8731_poodle_controls));
+ if (err < 0)
+ return err;
/* Add poodle specific widgets */
snd_soc_dapm_new_controls(codec, wm8731_dapm_widgets,
.num_links = 1,
};
-/* poodle audio private data */
-static struct wm8731_setup_data poodle_wm8731_setup = {
- .i2c_bus = 0,
- .i2c_address = 0x1b,
-};
+/*
+ * FIXME: This is a temporary bodge to avoid cross-tree merge issues.
+ * New drivers should register the wm8731 I2C device in the machine
+ * setup code (under arch/arm for ARM systems).
+ */
+static int wm8731_i2c_register(void)
+{
+ struct i2c_board_info info;
+ struct i2c_adapter *adapter;
+ struct i2c_client *client;
+
+ memset(&info, 0, sizeof(struct i2c_board_info));
+ info.addr = 0x1b;
+ strlcpy(info.type, "wm8731", I2C_NAME_SIZE);
+
+ adapter = i2c_get_adapter(0);
+ if (!adapter) {
+ printk(KERN_ERR "can't get i2c adapter 0\n");
+ return -ENODEV;
+ }
+
+ client = i2c_new_device(adapter, &info);
+ i2c_put_adapter(adapter);
+ if (!client) {
+ printk(KERN_ERR "can't add i2c device at 0x%x\n",
+ (unsigned int)info.addr);
+ return -ENODEV;
+ }
+
+ return 0;
+}
/* poodle audio subsystem */
static struct snd_soc_device poodle_snd_devdata = {
.card = &snd_soc_poodle,
.codec_dev = &soc_codec_dev_wm8731,
- .codec_data = &poodle_wm8731_setup,
};
static struct platform_device *poodle_snd_device;
if (!machine_is_poodle())
return -ENODEV;
+ ret = wm8731_i2c_register();
+ if (ret != 0)
+ return ret;
+
locomo_gpio_set_dir(&poodle_locomo_device.dev,
POODLE_LOCOMO_GPIO_AMP_ON, 0);
/* should we mute HP at startup - burning power ?*/
-#define DEBUG
/*
* pxa-ssp.c -- ALSA Soc Audio Layer
*
#include <linux/clk.h>
#include <linux/io.h>
+#include <asm/irq.h>
+
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/initval.h>
int ret = 0;
if (!cpu_dai->active) {
- ret = ssp_init(&priv->dev, cpu_dai->id + 1, SSP_NO_IRQ);
- if (ret < 0)
- return ret;
+ priv->dev.port = cpu_dai->id + 1;
+ priv->dev.irq = NO_IRQ;
+ clk_enable(priv->dev.ssp->clk);
ssp_disable(&priv->dev);
}
return ret;
if (!cpu_dai->active) {
ssp_disable(&priv->dev);
- ssp_exit(&priv->dev);
+ clk_disable(priv->dev.ssp->clk);
}
}
int val;
u32 sscr0 = ssp_read_reg(ssp, SSCR0) &
- ~(SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ADC);
+ ~(SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS);
dev_dbg(&ssp->pdev->dev,
"pxa_ssp_set_dai_sysclk id: %d, clk_id %d, freq %d\n",
case PXA_SSP_CLK_AUDIO:
priv->sysclk = 0;
ssp_set_scr(&priv->dev, 1);
- sscr0 |= SSCR0_ADC;
+ sscr0 |= SSCR0_ACS;
break;
default:
return -ENODEV;
u32 sscr1;
u32 sspsp;
+ /* check if we need to change anything at all */
+ if (priv->dai_fmt == fmt)
+ return 0;
+
+ /* we can only change the settings if the port is not in use */
+ if (ssp_read_reg(ssp, SSCR0) & SSCR0_SSE) {
+ dev_err(&ssp->pdev->dev,
+ "can't change hardware dai format: stream is in use");
+ return -EINVAL;
+ }
+
/* reset port settings */
sscr0 = ssp_read_reg(ssp, SSCR0) &
- (SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ADC);
+ (SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS);
sscr1 = SSCR1_RxTresh(8) | SSCR1_TxTresh(7);
sspsp = 0;
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_I2S:
- sscr0 |= SSCR0_MOD | SSCR0_PSP;
+ sscr0 |= SSCR0_PSP;
sscr1 |= SSCR1_RWOT | SSCR1_TRAIL;
+ /* See hw_params() */
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
case SND_SOC_DAIFMT_NB_NF:
- sspsp |= SSPSP_FSRT;
+ sspsp |= SSPSP_SFRMP;
break;
case SND_SOC_DAIFMT_NB_IF:
- sspsp |= SSPSP_SFRMP | SSPSP_FSRT;
break;
case SND_SOC_DAIFMT_IB_IF:
- sspsp |= SSPSP_SFRMP;
+ sspsp |= SSPSP_SCMODE(3);
break;
default:
return -EINVAL;
sscr0 |= SSCR0_FPCKE;
#endif
sscr0 |= SSCR0_DataSize(16);
- if (params_channels(params) > 1)
- sscr0 |= SSCR0_EDSS;
break;
case SNDRV_PCM_FORMAT_S24_LE:
sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(8));
- /* we must be in network mode (2 slots) for 24 bit stereo */
break;
case SNDRV_PCM_FORMAT_S32_LE:
sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(16));
- /* we must be in network mode (2 slots) for 32 bit stereo */
break;
}
ssp_write_reg(ssp, SSCR0, sscr0);
switch (priv->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_I2S:
- /* Cleared when the DAI format is set */
- sspsp = ssp_read_reg(ssp, SSPSP) | SSPSP_SFRMWDTH(width);
+ sspsp = ssp_read_reg(ssp, SSPSP);
+
+ if (((sscr0 & SSCR0_SCR) == SSCR0_SerClkDiv(4)) &&
+ (width == 16)) {
+ /* This is a special case where the bitclk is 64fs
+ * and we're not dealing with 2*32 bits of audio
+ * samples.
+ *
+ * The SSP values used for that are all found out by
+ * trying and failing a lot; some of the registers
+ * needed for that mode are only available on PXA3xx.
+ */
+
+#ifdef CONFIG_PXA3xx
+ if (!cpu_is_pxa3xx())
+ return -EINVAL;
+
+ sspsp |= SSPSP_SFRMWDTH(width * 2);
+ sspsp |= SSPSP_SFRMDLY(width * 4);
+ sspsp |= SSPSP_EDMYSTOP(3);
+ sspsp |= SSPSP_DMYSTOP(3);
+ sspsp |= SSPSP_DMYSTRT(1);
+#else
+ return -EINVAL;
+#endif
+ } else {
+ /* The frame width is the width the LRCLK is
+ * asserted for; the delay is expressed in
+ * half cycle units. We need the extra cycle
+ * because the data starts clocking out one BCLK
+ * after LRCLK changes polarity.
+ */
+ sspsp |= SSPSP_SFRMWDTH(width + 1);
+ sspsp |= SSPSP_SFRMDLY((width + 1) * 2);
+ sspsp |= SSPSP_DMYSTRT(1);
+ }
+
ssp_write_reg(ssp, SSPSP, sspsp);
break;
default:
break;
}
- /* We always use a network mode so we always require TDM slots
+ /* When we use a network mode, we always require TDM slots
* - complain loudly and fail if they've not been set up yet.
*/
- if (!(ssp_read_reg(ssp, SSTSA) & 0xf)) {
+ if ((sscr0 & SSCR0_MOD) && !(ssp_read_reg(ssp, SSTSA) & 0xf)) {
dev_err(&ssp->pdev->dev, "No TDM timeslot configured\n");
return -EINVAL;
}
if (!priv)
return -ENOMEM;
- priv->dev.ssp = ssp_request(dai->id, "SoC audio");
+ priv->dev.ssp = ssp_request(dai->id + 1, "SoC audio");
if (priv->dev.ssp == NULL) {
ret = -ENODEV;
goto err_priv;
SNDRV_PCM_FMTBIT_S24_LE | \
SNDRV_PCM_FMTBIT_S32_LE)
+static struct snd_soc_dai_ops pxa_ssp_dai_ops = {
+ .startup = pxa_ssp_startup,
+ .shutdown = pxa_ssp_shutdown,
+ .trigger = pxa_ssp_trigger,
+ .hw_params = pxa_ssp_hw_params,
+ .set_sysclk = pxa_ssp_set_dai_sysclk,
+ .set_clkdiv = pxa_ssp_set_dai_clkdiv,
+ .set_pll = pxa_ssp_set_dai_pll,
+ .set_fmt = pxa_ssp_set_dai_fmt,
+ .set_tdm_slot = pxa_ssp_set_dai_tdm_slot,
+ .set_tristate = pxa_ssp_set_dai_tristate,
+};
+
struct snd_soc_dai pxa_ssp_dai[] = {
{
.name = "pxa2xx-ssp1",
.rates = PXA_SSP_RATES,
.formats = PXA_SSP_FORMATS,
},
- .ops = {
- .startup = pxa_ssp_startup,
- .shutdown = pxa_ssp_shutdown,
- .trigger = pxa_ssp_trigger,
- .hw_params = pxa_ssp_hw_params,
- .set_sysclk = pxa_ssp_set_dai_sysclk,
- .set_clkdiv = pxa_ssp_set_dai_clkdiv,
- .set_pll = pxa_ssp_set_dai_pll,
- .set_fmt = pxa_ssp_set_dai_fmt,
- .set_tdm_slot = pxa_ssp_set_dai_tdm_slot,
- .set_tristate = pxa_ssp_set_dai_tristate,
- },
+ .ops = &pxa_ssp_dai_ops,
},
{ .name = "pxa2xx-ssp2",
.id = 1,
.rates = PXA_SSP_RATES,
.formats = PXA_SSP_FORMATS,
},
- .ops = {
- .startup = pxa_ssp_startup,
- .shutdown = pxa_ssp_shutdown,
- .trigger = pxa_ssp_trigger,
- .hw_params = pxa_ssp_hw_params,
- .set_sysclk = pxa_ssp_set_dai_sysclk,
- .set_clkdiv = pxa_ssp_set_dai_clkdiv,
- .set_pll = pxa_ssp_set_dai_pll,
- .set_fmt = pxa_ssp_set_dai_fmt,
- .set_tdm_slot = pxa_ssp_set_dai_tdm_slot,
- .set_tristate = pxa_ssp_set_dai_tristate,
- },
+ .ops = &pxa_ssp_dai_ops,
},
{
.name = "pxa2xx-ssp3",
.rates = PXA_SSP_RATES,
.formats = PXA_SSP_FORMATS,
},
- .ops = {
- .startup = pxa_ssp_startup,
- .shutdown = pxa_ssp_shutdown,
- .trigger = pxa_ssp_trigger,
- .hw_params = pxa_ssp_hw_params,
- .set_sysclk = pxa_ssp_set_dai_sysclk,
- .set_clkdiv = pxa_ssp_set_dai_clkdiv,
- .set_pll = pxa_ssp_set_dai_pll,
- .set_fmt = pxa_ssp_set_dai_fmt,
- .set_tdm_slot = pxa_ssp_set_dai_tdm_slot,
- .set_tristate = pxa_ssp_set_dai_tristate,
- },
+ .ops = &pxa_ssp_dai_ops,
},
{
.name = "pxa2xx-ssp4",
.rates = PXA_SSP_RATES,
.formats = PXA_SSP_FORMATS,
},
- .ops = {
- .startup = pxa_ssp_startup,
- .shutdown = pxa_ssp_shutdown,
- .trigger = pxa_ssp_trigger,
- .hw_params = pxa_ssp_hw_params,
- .set_sysclk = pxa_ssp_set_dai_sysclk,
- .set_clkdiv = pxa_ssp_set_dai_clkdiv,
- .set_pll = pxa_ssp_set_dai_pll,
- .set_fmt = pxa_ssp_set_dai_fmt,
- .set_tdm_slot = pxa_ssp_set_dai_tdm_slot,
- .set_tristate = pxa_ssp_set_dai_tristate,
- },
+ .ops = &pxa_ssp_dai_ops,
},
};
EXPORT_SYMBOL_GPL(pxa_ssp_dai);
static int pxa2xx_ac97_probe(struct platform_device *pdev,
struct snd_soc_dai *dai)
{
- return pxa2xx_ac97_hw_probe(pdev);
+ return pxa2xx_ac97_hw_probe(to_platform_device(dai->dev));
}
static void pxa2xx_ac97_remove(struct platform_device *pdev,
struct snd_soc_dai *dai)
{
- pxa2xx_ac97_hw_remove(pdev);
+ pxa2xx_ac97_hw_remove(to_platform_device(dai->dev));
}
static int pxa2xx_ac97_hw_params(struct snd_pcm_substream *substream,
SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
SNDRV_PCM_RATE_48000)
+static struct snd_soc_dai_ops pxa_ac97_hifi_dai_ops = {
+ .hw_params = pxa2xx_ac97_hw_params,
+};
+
+static struct snd_soc_dai_ops pxa_ac97_aux_dai_ops = {
+ .hw_params = pxa2xx_ac97_hw_aux_params,
+};
+
+static struct snd_soc_dai_ops pxa_ac97_mic_dai_ops = {
+ .hw_params = pxa2xx_ac97_hw_mic_params,
+};
+
/*
* There is only 1 physical AC97 interface for pxa2xx, but it
* has extra fifo's that can be used for aux DACs and ADCs.
.channels_max = 2,
.rates = PXA2XX_AC97_RATES,
.formats = SNDRV_PCM_FMTBIT_S16_LE,},
- .ops = {
- .hw_params = pxa2xx_ac97_hw_params,},
+ .ops = &pxa_ac97_hifi_dai_ops,
},
{
.name = "pxa2xx-ac97-aux",
.channels_max = 1,
.rates = PXA2XX_AC97_RATES,
.formats = SNDRV_PCM_FMTBIT_S16_LE,},
- .ops = {
- .hw_params = pxa2xx_ac97_hw_aux_params,},
+ .ops = &pxa_ac97_aux_dai_ops,
},
{
.name = "pxa2xx-ac97-mic",
.channels_max = 1,
.rates = PXA2XX_AC97_RATES,
.formats = SNDRV_PCM_FMTBIT_S16_LE,},
- .ops = {
- .hw_params = pxa2xx_ac97_hw_mic_params,},
+ .ops = &pxa_ac97_mic_dai_ops,
},
};
EXPORT_SYMBOL_GPL(pxa_ac97_dai);
EXPORT_SYMBOL_GPL(soc_ac97_ops);
-static int __init pxa_ac97_init(void)
+static int __devinit pxa2xx_ac97_dev_probe(struct platform_device *pdev)
{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(pxa_ac97_dai); i++)
+ pxa_ac97_dai[i].dev = &pdev->dev;
+
+ /* Punt most of the init to the SoC probe; we may need the machine
+ * driver to do interesting things with the clocking to get us up
+ * and running.
+ */
return snd_soc_register_dais(pxa_ac97_dai, ARRAY_SIZE(pxa_ac97_dai));
}
+
+static int __devexit pxa2xx_ac97_dev_remove(struct platform_device *pdev)
+{
+ snd_soc_unregister_dais(pxa_ac97_dai, ARRAY_SIZE(pxa_ac97_dai));
+
+ return 0;
+}
+
+static struct platform_driver pxa2xx_ac97_driver = {
+ .probe = pxa2xx_ac97_dev_probe,
+ .remove = __devexit_p(pxa2xx_ac97_dev_remove),
+ .driver = {
+ .name = "pxa2xx-ac97",
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init pxa_ac97_init(void)
+{
+ return platform_driver_register(&pxa2xx_ac97_driver);
+}
module_init(pxa_ac97_init);
static void __exit pxa_ac97_exit(void)
{
- snd_soc_unregister_dais(pxa_ac97_dai, ARRAY_SIZE(pxa_ac97_dai));
+ platform_driver_unregister(&pxa2xx_ac97_driver);
}
module_exit(pxa_ac97_exit);
#include <mach/hardware.h>
#include <mach/pxa-regs.h>
-#include <mach/pxa2xx-gpio.h>
#include <mach/audio.h>
#include "pxa2xx-pcm.h"
#include "pxa2xx-i2s.h"
-struct pxa2xx_gpio {
- u32 sys;
- u32 rx;
- u32 tx;
- u32 clk;
- u32 frm;
-};
-
/*
* I2S Controller Register and Bit Definitions
*/
DCMD_BURST32 | DCMD_WIDTH4,
};
-static struct pxa2xx_gpio gpio_bus[] = {
- { /* I2S SoC Slave */
- .rx = GPIO29_SDATA_IN_I2S_MD,
- .tx = GPIO30_SDATA_OUT_I2S_MD,
- .clk = GPIO28_BITCLK_IN_I2S_MD,
- .frm = GPIO31_SYNC_I2S_MD,
- },
- { /* I2S SoC Master */
- .rx = GPIO29_SDATA_IN_I2S_MD,
- .tx = GPIO30_SDATA_OUT_I2S_MD,
- .clk = GPIO28_BITCLK_OUT_I2S_MD,
- .frm = GPIO31_SYNC_I2S_MD,
- },
-};
-
static int pxa2xx_i2s_startup(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
if (clk_id != PXA2XX_I2S_SYSCLK)
return -ENODEV;
- if (pxa_i2s.master && dir == SND_SOC_CLOCK_OUT)
- pxa_gpio_mode(gpio_bus[pxa_i2s.master].sys);
-
return 0;
}
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
- pxa_gpio_mode(gpio_bus[pxa_i2s.master].rx);
- pxa_gpio_mode(gpio_bus[pxa_i2s.master].tx);
- pxa_gpio_mode(gpio_bus[pxa_i2s.master].frm);
- pxa_gpio_mode(gpio_bus[pxa_i2s.master].clk);
BUG_ON(IS_ERR(clk_i2s));
clk_enable(clk_i2s);
pxa_i2s_wait();
SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000)
+static struct snd_soc_dai_ops pxa_i2s_dai_ops = {
+ .startup = pxa2xx_i2s_startup,
+ .shutdown = pxa2xx_i2s_shutdown,
+ .trigger = pxa2xx_i2s_trigger,
+ .hw_params = pxa2xx_i2s_hw_params,
+ .set_fmt = pxa2xx_i2s_set_dai_fmt,
+ .set_sysclk = pxa2xx_i2s_set_dai_sysclk,
+};
+
struct snd_soc_dai pxa_i2s_dai = {
.name = "pxa2xx-i2s",
.id = 0,
.channels_max = 2,
.rates = PXA2XX_I2S_RATES,
.formats = SNDRV_PCM_FMTBIT_S16_LE,},
- .ops = {
- .startup = pxa2xx_i2s_startup,
- .shutdown = pxa2xx_i2s_shutdown,
- .trigger = pxa2xx_i2s_trigger,
- .hw_params = pxa2xx_i2s_hw_params,
- .set_fmt = pxa2xx_i2s_set_dai_fmt,
- .set_sysclk = pxa2xx_i2s_set_dai_sysclk,
- },
+ .ops = &pxa_i2s_dai_ops,
};
EXPORT_SYMBOL_GPL(pxa_i2s_dai);
static int __init pxa2xx_i2s_init(void)
{
- if (cpu_is_pxa27x())
- gpio_bus[1].sys = GPIO113_I2S_SYSCLK_MD;
- else
- gpio_bus[1].sys = GPIO32_SYSCLK_I2S_MD;
-
clk_i2s = ERR_PTR(-ENOENT);
return platform_driver_register(&pxa2xx_i2s_driver);
}
static int spitz_startup(struct snd_pcm_substream *substream)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct snd_soc_codec *codec = rtd->socdev->codec;
+ struct snd_soc_codec *codec = rtd->socdev->card->codec;
/* check the jack status at stream startup */
spitz_ext_control(codec);
*/
static int spitz_wm8750_init(struct snd_soc_codec *codec)
{
- int i, err;
+ int err;
/* NC codec pins */
snd_soc_dapm_nc_pin(codec, "RINPUT1");
snd_soc_dapm_nc_pin(codec, "MONO1");
/* Add spitz specific controls */
- for (i = 0; i < ARRAY_SIZE(wm8750_spitz_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&wm8750_spitz_controls[i], codec, NULL));
- if (err < 0)
- return err;
- }
+ err = snd_soc_add_controls(codec, wm8750_spitz_controls,
+ ARRAY_SIZE(wm8750_spitz_controls));
+ if (err < 0)
+ return err;
/* Add spitz specific widgets */
snd_soc_dapm_new_controls(codec, wm8750_dapm_widgets,
static int tosa_startup(struct snd_pcm_substream *substream)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct snd_soc_codec *codec = rtd->socdev->codec;
+ struct snd_soc_codec *codec = rtd->socdev->card->codec;
/* check the jack status at stream startup */
tosa_ext_control(codec);
static int tosa_ac97_init(struct snd_soc_codec *codec)
{
- int i, err;
+ int err;
snd_soc_dapm_nc_pin(codec, "OUT3");
snd_soc_dapm_nc_pin(codec, "MONOOUT");
/* add tosa specific controls */
- for (i = 0; i < ARRAY_SIZE(tosa_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&tosa_controls[i],codec, NULL));
- if (err < 0)
- return err;
- }
+ err = snd_soc_add_controls(codec, tosa_controls,
+ ARRAY_SIZE(tosa_controls));
+ if (err < 0)
+ return err;
/* add tosa specific widgets */
snd_soc_dapm_new_controls(codec, tosa_dapm_widgets,
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/device.h>
+#include <linux/clk.h>
#include <linux/i2c.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include "pxa2xx-ac97.h"
#include "pxa-ssp.h"
+/*
+ * There is a physical switch SW15 on the board which changes the MCLK
+ * for the WM9713 between the standard AC97 master clock and the
+ * output of the CLK_POUT signal from the PXA.
+ */
+static int clk_pout;
+module_param(clk_pout, int, 0);
+MODULE_PARM_DESC(clk_pout, "Use CLK_POUT as WM9713 MCLK (SW15 on board).");
+
+static struct clk *pout;
+
static struct snd_soc_card zylonite;
static const struct snd_soc_dapm_widget zylonite_dapm_widgets[] = {
static int zylonite_wm9713_init(struct snd_soc_codec *codec)
{
- /* Currently we only support use of the AC97 clock here. If
- * CLK_POUT is selected by SW15 then the clock API will need
- * to be used to request and enable it here.
- */
+ if (clk_pout)
+ snd_soc_dai_set_pll(&codec->dai[0], 0, clk_get_rate(pout), 0);
snd_soc_dapm_new_controls(codec, zylonite_dapm_widgets,
ARRAY_SIZE(zylonite_dapm_widgets));
struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
unsigned int pll_out = 0;
- unsigned int acds = 0;
unsigned int wm9713_div = 0;
int ret = 0;
+ int rate = params_rate(params);
+ int width = snd_pcm_format_physical_width(params_format(params));
- switch (params_rate(params)) {
+ /* Only support ratios that we can generate neatly from the AC97
+ * based master clock - in particular, this excludes 44.1kHz.
+ * In most applications the voice DAC will be used for telephony
+ * data so multiples of 8kHz will be the common case.
+ */
+ switch (rate) {
case 8000:
wm9713_div = 12;
- pll_out = 2048000;
break;
case 16000:
wm9713_div = 6;
- pll_out = 4096000;
break;
case 48000:
- default:
wm9713_div = 2;
- pll_out = 12288000;
- acds = 1;
break;
+ default:
+ /* Don't support OSS emulation */
+ return -EINVAL;
}
- ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
- SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
- if (ret < 0)
- return ret;
-
- ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
- SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
- if (ret < 0)
- return ret;
+ /* Add 1 to the width for the leading clock cycle */
+ pll_out = rate * (width + 1) * 8;
- ret = snd_soc_dai_set_tdm_slot(cpu_dai,
- params_channels(params),
- params_channels(params));
+ ret = snd_soc_dai_set_sysclk(cpu_dai, PXA_SSP_CLK_AUDIO, 0, 1);
if (ret < 0)
return ret;
if (ret < 0)
return ret;
- ret = snd_soc_dai_set_clkdiv(cpu_dai, PXA_SSP_AUDIO_DIV_ACDS, acds);
+ if (clk_pout)
+ ret = snd_soc_dai_set_clkdiv(codec_dai, WM9713_PCMCLK_PLL_DIV,
+ WM9713_PCMDIV(wm9713_div));
+ else
+ ret = snd_soc_dai_set_clkdiv(codec_dai, WM9713_PCMCLK_DIV,
+ WM9713_PCMDIV(wm9713_div));
if (ret < 0)
return ret;
- ret = snd_soc_dai_set_sysclk(cpu_dai, PXA_SSP_CLK_AUDIO, 0, 1);
+ ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
+ SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
if (ret < 0)
return ret;
- /* Note that if the PLL is in use the WM9713_PCMCLK_PLL_DIV needs
- * to be set instead.
- */
- ret = snd_soc_dai_set_clkdiv(codec_dai, WM9713_PCMCLK_DIV,
- WM9713_PCMDIV(wm9713_div));
+ ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
+ SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
if (ret < 0)
return ret;
},
};
+static int zylonite_probe(struct platform_device *pdev)
+{
+ int ret;
+
+ if (clk_pout) {
+ pout = clk_get(NULL, "CLK_POUT");
+ if (IS_ERR(pout)) {
+ dev_err(&pdev->dev, "Unable to obtain CLK_POUT: %ld\n",
+ PTR_ERR(pout));
+ return PTR_ERR(pout);
+ }
+
+ ret = clk_enable(pout);
+ if (ret != 0) {
+ dev_err(&pdev->dev, "Unable to enable CLK_POUT: %d\n",
+ ret);
+ clk_put(pout);
+ return ret;
+ }
+
+ dev_dbg(&pdev->dev, "MCLK enabled at %luHz\n",
+ clk_get_rate(pout));
+ }
+
+ return 0;
+}
+
+static int zylonite_remove(struct platform_device *pdev)
+{
+ if (clk_pout) {
+ clk_disable(pout);
+ clk_put(pout);
+ }
+
+ return 0;
+}
+
+static int zylonite_suspend_post(struct platform_device *pdev,
+ pm_message_t state)
+{
+ if (clk_pout)
+ clk_disable(pout);
+
+ return 0;
+}
+
+static int zylonite_resume_pre(struct platform_device *pdev)
+{
+ int ret = 0;
+
+ if (clk_pout) {
+ ret = clk_enable(pout);
+ if (ret != 0)
+ dev_err(&pdev->dev, "Unable to enable CLK_POUT: %d\n",
+ ret);
+ }
+
+ return ret;
+}
+
static struct snd_soc_card zylonite = {
.name = "Zylonite",
+ .probe = &zylonite_probe,
+ .remove = &zylonite_remove,
+ .suspend_post = &zylonite_suspend_post,
+ .resume_pre = &zylonite_resume_pre,
.platform = &pxa2xx_soc_platform,
.dai_link = zylonite_dai,
.num_links = ARRAY_SIZE(zylonite_dai),
config SND_S3C24XX_SOC
- tristate "SoC Audio for the Samsung S3C24XX chips"
- depends on ARCH_S3C2410
+ tristate "SoC Audio for the Samsung S3CXXXX chips"
+ depends on ARCH_S3C2410 || ARCH_S3C64XX
help
Say Y or M if you want to add support for codecs attached to
- the S3C24XX AC97, I2S or SSP interface. You will also need
- to select the audio interfaces to support below.
+ the S3C24XX and S3C64XX AC97, I2S or SSP interface. You will
+ also need to select the audio interfaces to support below.
config SND_S3C24XX_SOC_I2S
tristate
+ select S3C2410_DMA
+
+config SND_S3C_I2SV2_SOC
+ tristate
config SND_S3C2412_SOC_I2S
tristate
+ select SND_S3C_I2SV2_SOC
+ select S3C2410_DMA
+
+config SND_S3C64XX_SOC_I2S
+ tristate
+ select SND_S3C_I2SV2_SOC
+ select S3C64XX_DMA
config SND_S3C2443_SOC_AC97
tristate
+ select S3C2410_DMA
select AC97_BUS
select SND_SOC_AC97_BUS
Say Y if you want to add support for SoC audio on smdk2440
with the WM8753.
+config SND_S3C24XX_SOC_JIVE_WM8750
+ tristate "SoC I2S Audio support for Jive"
+ depends on SND_S3C24XX_SOC && MACH_JIVE
+ select SND_SOC_WM8750
+ select SND_S3C2412_SOC_I2S
+ help
+ Sat Y if you want to add support for SoC audio on the Jive.
+
config SND_S3C24XX_SOC_SMDK2443_WM9710
tristate "SoC AC97 Audio support for SMDK2443 - WM9710"
depends on SND_S3C24XX_SOC && MACH_SMDK2443
tristate "SoC I2S Audio support UDA134X wired to a S3C24XX"
depends on SND_S3C24XX_SOC
select SND_S3C24XX_SOC_I2S
+ select SND_SOC_L3
select SND_SOC_UDA134X
snd-soc-s3c24xx-objs := s3c24xx-pcm.o
snd-soc-s3c24xx-i2s-objs := s3c24xx-i2s.o
snd-soc-s3c2412-i2s-objs := s3c2412-i2s.o
+snd-soc-s3c64xx-i2s-objs := s3c64xx-i2s.o
snd-soc-s3c2443-ac97-objs := s3c2443-ac97.o
+snd-soc-s3c-i2s-v2-objs := s3c-i2s-v2.o
obj-$(CONFIG_SND_S3C24XX_SOC) += snd-soc-s3c24xx.o
obj-$(CONFIG_SND_S3C24XX_SOC_I2S) += snd-soc-s3c24xx-i2s.o
obj-$(CONFIG_SND_S3C2443_SOC_AC97) += snd-soc-s3c2443-ac97.o
obj-$(CONFIG_SND_S3C2412_SOC_I2S) += snd-soc-s3c2412-i2s.o
+obj-$(CONFIG_SND_S3C64XX_SOC_I2S) += snd-soc-s3c64xx-i2s.o
+obj-$(CONFIG_SND_S3C_I2SV2_SOC) += snd-soc-s3c-i2s-v2.o
# S3C24XX Machine Support
+snd-soc-jive-wm8750-objs := jive_wm8750.o
snd-soc-neo1973-wm8753-objs := neo1973_wm8753.o
snd-soc-smdk2443-wm9710-objs := smdk2443_wm9710.o
snd-soc-ln2440sbc-alc650-objs := ln2440sbc_alc650.o
snd-soc-s3c24xx-uda134x-objs := s3c24xx_uda134x.o
+obj-$(CONFIG_SND_S3C24XX_SOC_JIVE_WM8750) += snd-soc-jive-wm8750.o
obj-$(CONFIG_SND_S3C24XX_SOC_NEO1973_WM8753) += snd-soc-neo1973-wm8753.o
obj-$(CONFIG_SND_S3C24XX_SOC_SMDK2443_WM9710) += snd-soc-smdk2443-wm9710.o
obj-$(CONFIG_SND_S3C24XX_SOC_LN2440SBC_ALC650) += snd-soc-ln2440sbc-alc650.o
--- /dev/null
+/* sound/soc/s3c24xx/jive_wm8750.c
+ *
+ * Copyright 2007,2008 Simtec Electronics
+ *
+ * Based on sound/soc/pxa/spitz.c
+ * Copyright 2005 Wolfson Microelectronics PLC.
+ * Copyright 2005 Openedhand Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/timer.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+
+#include <asm/mach-types.h>
+
+#include "s3c24xx-pcm.h"
+#include "s3c2412-i2s.h"
+
+#include "../codecs/wm8750.h"
+
+static const struct snd_soc_dapm_route audio_map[] = {
+ { "Headphone Jack", NULL, "LOUT1" },
+ { "Headphone Jack", NULL, "ROUT1" },
+ { "Internal Speaker", NULL, "LOUT2" },
+ { "Internal Speaker", NULL, "ROUT2" },
+ { "LINPUT1", NULL, "Line Input" },
+ { "RINPUT1", NULL, "Line Input" },
+};
+
+static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = {
+ SND_SOC_DAPM_HP("Headphone Jack", NULL),
+ SND_SOC_DAPM_SPK("Internal Speaker", NULL),
+ SND_SOC_DAPM_LINE("Line In", NULL),
+};
+
+static int jive_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
+ struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
+ struct s3c_i2sv2_rate_calc div;
+ unsigned int clk = 0;
+ int ret = 0;
+
+ switch (params_rate(params)) {
+ case 8000:
+ case 16000:
+ case 48000:
+ case 96000:
+ clk = 12288000;
+ break;
+ case 11025:
+ case 22050:
+ case 44100:
+ clk = 11289600;
+ break;
+ }
+
+ s3c_i2sv2_calc_rate(&div, NULL, params_rate(params),
+ s3c2412_get_iisclk());
+
+ /* set codec DAI configuration */
+ ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
+ SND_SOC_DAIFMT_NB_NF |
+ SND_SOC_DAIFMT_CBS_CFS);
+ if (ret < 0)
+ return ret;
+
+ /* set cpu DAI configuration */
+ ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
+ SND_SOC_DAIFMT_NB_NF |
+ SND_SOC_DAIFMT_CBS_CFS);
+ if (ret < 0)
+ return ret;
+
+ /* set the codec system clock for DAC and ADC */
+ ret = snd_soc_dai_set_sysclk(codec_dai, WM8750_SYSCLK, clk,
+ SND_SOC_CLOCK_IN);
+ if (ret < 0)
+ return ret;
+
+ ret = snd_soc_dai_set_clkdiv(cpu_dai, S3C2412_DIV_RCLK, div.fs_div);
+ if (ret < 0)
+ return ret;
+
+ ret = snd_soc_dai_set_clkdiv(cpu_dai, S3C2412_DIV_PRESCALER,
+ div.clk_div - 1);
+ if (ret < 0)
+ return ret;
+
+ return 0;
+}
+
+static struct snd_soc_ops jive_ops = {
+ .hw_params = jive_hw_params,
+};
+
+static int jive_wm8750_init(struct snd_soc_codec *codec)
+{
+ int err;
+
+ /* These endpoints are not being used. */
+ snd_soc_dapm_nc_pin(codec, "LINPUT2");
+ snd_soc_dapm_nc_pin(codec, "RINPUT2");
+ snd_soc_dapm_nc_pin(codec, "LINPUT3");
+ snd_soc_dapm_nc_pin(codec, "RINPUT3");
+ snd_soc_dapm_nc_pin(codec, "OUT3");
+ snd_soc_dapm_nc_pin(codec, "MONO");
+
+ /* Add jive specific widgets */
+ err = snd_soc_dapm_new_controls(codec, wm8750_dapm_widgets,
+ ARRAY_SIZE(wm8750_dapm_widgets));
+ if (err) {
+ printk(KERN_ERR "%s: failed to add widgets (%d)\n",
+ __func__, err);
+ return err;
+ }
+
+ snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
+ snd_soc_dapm_sync(codec);
+
+ return 0;
+}
+
+static struct snd_soc_dai_link jive_dai = {
+ .name = "wm8750",
+ .stream_name = "WM8750",
+ .cpu_dai = &s3c2412_i2s_dai,
+ .codec_dai = &wm8750_dai,
+ .init = jive_wm8750_init,
+ .ops = &jive_ops,
+};
+
+/* jive audio machine driver */
+static struct snd_soc_machine snd_soc_machine_jive = {
+ .name = "Jive",
+ .dai_link = &jive_dai,
+ .num_links = 1,
+};
+
+/* jive audio private data */
+static struct wm8750_setup_data jive_wm8750_setup = {
+};
+
+/* jive audio subsystem */
+static struct snd_soc_device jive_snd_devdata = {
+ .machine = &snd_soc_machine_jive,
+ .platform = &s3c24xx_soc_platform,
+ .codec_dev = &soc_codec_dev_wm8750_spi,
+ .codec_data = &jive_wm8750_setup,
+};
+
+static struct platform_device *jive_snd_device;
+
+static int __init jive_init(void)
+{
+ int ret;
+
+ if (!machine_is_jive())
+ return 0;
+
+ printk("JIVE WM8750 Audio support\n");
+
+ jive_snd_device = platform_device_alloc("soc-audio", -1);
+ if (!jive_snd_device)
+ return -ENOMEM;
+
+ platform_set_drvdata(jive_snd_device, &jive_snd_devdata);
+ jive_snd_devdata.dev = &jive_snd_device->dev;
+ ret = platform_device_add(jive_snd_device);
+
+ if (ret)
+ platform_device_put(jive_snd_device);
+
+ return ret;
+}
+
+static void __exit jive_exit(void)
+{
+ platform_device_unregister(jive_snd_device);
+}
+
+module_init(jive_init);
+module_exit(jive_exit);
+
+MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
+MODULE_DESCRIPTION("ALSA SoC Jive Audio support");
+MODULE_LICENSE("GPL");
#include <mach/regs-clock.h>
#include <mach/regs-gpio.h>
#include <mach/hardware.h>
-#include <mach/audio.h>
+#include <plat/audio.h>
#include <linux/io.h>
#include <mach/spi-gpio.h>
-#include <asm/plat-s3c24xx/regs-iis.h>
+#include <plat/regs-iis.h>
#include "../codecs/wm8753.h"
#include "lm4857.h"
#include "s3c24xx-pcm.h"
#include "s3c24xx-i2s.h"
-/* Debugging stuff */
-#define S3C24XX_SOC_NEO1973_WM8753_DEBUG 0
-#if S3C24XX_SOC_NEO1973_WM8753_DEBUG
-#define DBG(x...) printk(KERN_DEBUG "s3c24xx-soc-neo1973-wm8753: " x)
-#else
-#define DBG(x...)
-#endif
-
/* define the scenarios */
#define NEO_AUDIO_OFF 0
#define NEO_GSM_CALL_AUDIO_HANDSET 1
int ret = 0;
unsigned long iis_clkrate;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
iis_clkrate = s3c24xx_i2s_get_clockrate();
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
/* disable the PLL */
return snd_soc_dai_set_pll(codec_dai, WM8753_PLL1, 0, 0);
int ret = 0;
unsigned long iis_clkrate;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
iis_clkrate = s3c24xx_i2s_get_clockrate();
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
/* disable the PLL */
return snd_soc_dai_set_pll(codec_dai, WM8753_PLL2, 0, 0);
static int set_scenario_endpoints(struct snd_soc_codec *codec, int scenario)
{
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
switch (neo1973_scenario) {
case NEO_AUDIO_OFF:
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
if (neo1973_scenario == ucontrol->value.integer.value[0])
return 0;
static void lm4857_write_regs(void)
{
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
if (i2c_master_send(i2c, lm4857_regs, 4) != 4)
printk(KERN_ERR "lm4857: i2c write failed\n");
int shift = (kcontrol->private_value >> 8) & 0x0F;
int mask = (kcontrol->private_value >> 16) & 0xFF;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
ucontrol->value.integer.value[0] = (lm4857_regs[reg] >> shift) & mask;
return 0;
{
u8 value = lm4857_regs[LM4857_CTRL] & 0x0F;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
if (value)
value -= 5;
{
u8 value = ucontrol->value.integer.value[0];
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
if (value)
value += 5;
*/
static int neo1973_wm8753_init(struct snd_soc_codec *codec)
{
- int i, err;
+ int err;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
/* set up NC codec pins */
snd_soc_dapm_nc_pin(codec, "LOUT2");
set_scenario_endpoints(codec, NEO_AUDIO_OFF);
/* add neo1973 specific controls */
- for (i = 0; i < ARRAY_SIZE(wm8753_neo1973_controls); i++) {
- err = snd_ctl_add(codec->card,
- snd_soc_cnew(&wm8753_neo1973_controls[i],
- codec, NULL));
- if (err < 0)
- return err;
- }
+ err = snd_soc_add_controls(codec, wm8753_neo1973_controls,
+ ARRAY_SIZE(8753_neo1973_controls));
+ if (err < 0)
+ return err;
/* set up neo1973 specific audio routes */
err = snd_soc_dapm_add_routes(codec, dapm_routes,
.num_links = ARRAY_SIZE(neo1973_dai),
};
-static struct wm8753_setup_data neo1973_wm8753_setup = {
- .i2c_bus = 0,
- .i2c_address = 0x1a,
-};
-
static struct snd_soc_device neo1973_snd_devdata = {
.card = &neo1973,
.codec_dev = &soc_codec_dev_wm8753,
- .codec_data = &neo1973_wm8753_setup,
};
static int lm4857_i2c_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
i2c = client;
static int lm4857_i2c_remove(struct i2c_client *client)
{
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
i2c = NULL;
static int lm4857_suspend(struct i2c_client *dev, pm_message_t state)
{
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
dev_dbg(&dev->dev, "lm4857_suspend\n");
lm4857_state = lm4857_regs[LM4857_CTRL] & 0xf;
static int lm4857_resume(struct i2c_client *dev)
{
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
if (lm4857_state) {
lm4857_regs[LM4857_CTRL] |= (lm4857_state & 0x0f);
static void lm4857_shutdown(struct i2c_client *dev)
{
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
dev_dbg(&dev->dev, "lm4857_shutdown\n");
lm4857_regs[LM4857_CTRL] &= 0xf0;
{
int ret;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
if (!machine_is_neo1973_gta01()) {
printk(KERN_INFO
static void __exit neo1973_exit(void)
{
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
i2c_del_driver(&lm4857_i2c_driver);
platform_device_unregister(neo1973_snd_device);
--- /dev/null
+/* sound/soc/s3c24xx/s3c-i2c-v2.c
+ *
+ * ALSA Soc Audio Layer - I2S core for newer Samsung SoCs.
+ *
+ * Copyright (c) 2006 Wolfson Microelectronics PLC.
+ * Graeme Gregory graeme.gregory@wolfsonmicro.com
+ * linux@wolfsonmicro.com
+ *
+ * Copyright (c) 2008, 2007, 2004-2005 Simtec Electronics
+ * http://armlinux.simtec.co.uk/
+ * Ben Dooks <ben@simtec.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/initval.h>
+#include <sound/soc.h>
+
+#include <plat/regs-s3c2412-iis.h>
+
+#include <plat/audio.h>
+#include <mach/dma.h>
+
+#include "s3c-i2s-v2.h"
+
+#define S3C2412_I2S_DEBUG_CON 0
+
+static inline struct s3c_i2sv2_info *to_info(struct snd_soc_dai *cpu_dai)
+{
+ return cpu_dai->private_data;
+}
+
+#define bit_set(v, b) (((v) & (b)) ? 1 : 0)
+
+#if S3C2412_I2S_DEBUG_CON
+static void dbg_showcon(const char *fn, u32 con)
+{
+ printk(KERN_DEBUG "%s: LRI=%d, TXFEMPT=%d, RXFEMPT=%d, TXFFULL=%d, RXFFULL=%d\n", fn,
+ bit_set(con, S3C2412_IISCON_LRINDEX),
+ bit_set(con, S3C2412_IISCON_TXFIFO_EMPTY),
+ bit_set(con, S3C2412_IISCON_RXFIFO_EMPTY),
+ bit_set(con, S3C2412_IISCON_TXFIFO_FULL),
+ bit_set(con, S3C2412_IISCON_RXFIFO_FULL));
+
+ printk(KERN_DEBUG "%s: PAUSE: TXDMA=%d, RXDMA=%d, TXCH=%d, RXCH=%d\n",
+ fn,
+ bit_set(con, S3C2412_IISCON_TXDMA_PAUSE),
+ bit_set(con, S3C2412_IISCON_RXDMA_PAUSE),
+ bit_set(con, S3C2412_IISCON_TXCH_PAUSE),
+ bit_set(con, S3C2412_IISCON_RXCH_PAUSE));
+ printk(KERN_DEBUG "%s: ACTIVE: TXDMA=%d, RXDMA=%d, IIS=%d\n", fn,
+ bit_set(con, S3C2412_IISCON_TXDMA_ACTIVE),
+ bit_set(con, S3C2412_IISCON_RXDMA_ACTIVE),
+ bit_set(con, S3C2412_IISCON_IIS_ACTIVE));
+}
+#else
+static inline void dbg_showcon(const char *fn, u32 con)
+{
+}
+#endif
+
+
+/* Turn on or off the transmission path. */
+void s3c2412_snd_txctrl(struct s3c_i2sv2_info *i2s, int on)
+{
+ void __iomem *regs = i2s->regs;
+ u32 fic, con, mod;
+
+ pr_debug("%s(%d)\n", __func__, on);
+
+ fic = readl(regs + S3C2412_IISFIC);
+ con = readl(regs + S3C2412_IISCON);
+ mod = readl(regs + S3C2412_IISMOD);
+
+ pr_debug("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic);
+
+ if (on) {
+ con |= S3C2412_IISCON_TXDMA_ACTIVE | S3C2412_IISCON_IIS_ACTIVE;
+ con &= ~S3C2412_IISCON_TXDMA_PAUSE;
+ con &= ~S3C2412_IISCON_TXCH_PAUSE;
+
+ switch (mod & S3C2412_IISMOD_MODE_MASK) {
+ case S3C2412_IISMOD_MODE_TXONLY:
+ case S3C2412_IISMOD_MODE_TXRX:
+ /* do nothing, we are in the right mode */
+ break;
+
+ case S3C2412_IISMOD_MODE_RXONLY:
+ mod &= ~S3C2412_IISMOD_MODE_MASK;
+ mod |= S3C2412_IISMOD_MODE_TXRX;
+ break;
+
+ default:
+ dev_err(i2s->dev, "TXEN: Invalid MODE in IISMOD\n");
+ }
+
+ writel(con, regs + S3C2412_IISCON);
+ writel(mod, regs + S3C2412_IISMOD);
+ } else {
+ /* Note, we do not have any indication that the FIFO problems
+ * tha the S3C2410/2440 had apply here, so we should be able
+ * to disable the DMA and TX without resetting the FIFOS.
+ */
+
+ con |= S3C2412_IISCON_TXDMA_PAUSE;
+ con |= S3C2412_IISCON_TXCH_PAUSE;
+ con &= ~S3C2412_IISCON_TXDMA_ACTIVE;
+
+ switch (mod & S3C2412_IISMOD_MODE_MASK) {
+ case S3C2412_IISMOD_MODE_TXRX:
+ mod &= ~S3C2412_IISMOD_MODE_MASK;
+ mod |= S3C2412_IISMOD_MODE_RXONLY;
+ break;
+
+ case S3C2412_IISMOD_MODE_TXONLY:
+ mod &= ~S3C2412_IISMOD_MODE_MASK;
+ con &= ~S3C2412_IISCON_IIS_ACTIVE;
+ break;
+
+ default:
+ dev_err(i2s->dev, "TXDIS: Invalid MODE in IISMOD\n");
+ }
+
+ writel(mod, regs + S3C2412_IISMOD);
+ writel(con, regs + S3C2412_IISCON);
+ }
+
+ fic = readl(regs + S3C2412_IISFIC);
+ dbg_showcon(__func__, con);
+ pr_debug("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic);
+}
+EXPORT_SYMBOL_GPL(s3c2412_snd_txctrl);
+
+void s3c2412_snd_rxctrl(struct s3c_i2sv2_info *i2s, int on)
+{
+ void __iomem *regs = i2s->regs;
+ u32 fic, con, mod;
+
+ pr_debug("%s(%d)\n", __func__, on);
+
+ fic = readl(regs + S3C2412_IISFIC);
+ con = readl(regs + S3C2412_IISCON);
+ mod = readl(regs + S3C2412_IISMOD);
+
+ pr_debug("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic);
+
+ if (on) {
+ con |= S3C2412_IISCON_RXDMA_ACTIVE | S3C2412_IISCON_IIS_ACTIVE;
+ con &= ~S3C2412_IISCON_RXDMA_PAUSE;
+ con &= ~S3C2412_IISCON_RXCH_PAUSE;
+
+ switch (mod & S3C2412_IISMOD_MODE_MASK) {
+ case S3C2412_IISMOD_MODE_TXRX:
+ case S3C2412_IISMOD_MODE_RXONLY:
+ /* do nothing, we are in the right mode */
+ break;
+
+ case S3C2412_IISMOD_MODE_TXONLY:
+ mod &= ~S3C2412_IISMOD_MODE_MASK;
+ mod |= S3C2412_IISMOD_MODE_TXRX;
+ break;
+
+ default:
+ dev_err(i2s->dev, "RXEN: Invalid MODE in IISMOD\n");
+ }
+
+ writel(mod, regs + S3C2412_IISMOD);
+ writel(con, regs + S3C2412_IISCON);
+ } else {
+ /* See txctrl notes on FIFOs. */
+
+ con &= ~S3C2412_IISCON_RXDMA_ACTIVE;
+ con |= S3C2412_IISCON_RXDMA_PAUSE;
+ con |= S3C2412_IISCON_RXCH_PAUSE;
+
+ switch (mod & S3C2412_IISMOD_MODE_MASK) {
+ case S3C2412_IISMOD_MODE_RXONLY:
+ con &= ~S3C2412_IISCON_IIS_ACTIVE;
+ mod &= ~S3C2412_IISMOD_MODE_MASK;
+ break;
+
+ case S3C2412_IISMOD_MODE_TXRX:
+ mod &= ~S3C2412_IISMOD_MODE_MASK;
+ mod |= S3C2412_IISMOD_MODE_TXONLY;
+ break;
+
+ default:
+ dev_err(i2s->dev, "RXEN: Invalid MODE in IISMOD\n");
+ }
+
+ writel(con, regs + S3C2412_IISCON);
+ writel(mod, regs + S3C2412_IISMOD);
+ }
+
+ fic = readl(regs + S3C2412_IISFIC);
+ pr_debug("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic);
+}
+EXPORT_SYMBOL_GPL(s3c2412_snd_rxctrl);
+
+/*
+ * Wait for the LR signal to allow synchronisation to the L/R clock
+ * from the codec. May only be needed for slave mode.
+ */
+static int s3c2412_snd_lrsync(struct s3c_i2sv2_info *i2s)
+{
+ u32 iiscon;
+ unsigned long timeout = jiffies + msecs_to_jiffies(5);
+
+ pr_debug("Entered %s\n", __func__);
+
+ while (1) {
+ iiscon = readl(i2s->regs + S3C2412_IISCON);
+ if (iiscon & S3C2412_IISCON_LRINDEX)
+ break;
+
+ if (timeout < jiffies) {
+ printk(KERN_ERR "%s: timeout\n", __func__);
+ return -ETIMEDOUT;
+ }
+ }
+
+ return 0;
+}
+
+/*
+ * Set S3C2412 I2S DAI format
+ */
+static int s3c2412_i2s_set_fmt(struct snd_soc_dai *cpu_dai,
+ unsigned int fmt)
+{
+ struct s3c_i2sv2_info *i2s = to_info(cpu_dai);
+ u32 iismod;
+
+ pr_debug("Entered %s\n", __func__);
+
+ iismod = readl(i2s->regs + S3C2412_IISMOD);
+ pr_debug("hw_params r: IISMOD: %x \n", iismod);
+
+#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413)
+#define IISMOD_MASTER_MASK S3C2412_IISMOD_MASTER_MASK
+#define IISMOD_SLAVE S3C2412_IISMOD_SLAVE
+#define IISMOD_MASTER S3C2412_IISMOD_MASTER_INTERNAL
+#endif
+
+#if defined(CONFIG_PLAT_S3C64XX)
+/* From Rev1.1 datasheet, we have two master and two slave modes:
+ * IMS[11:10]:
+ * 00 = master mode, fed from PCLK
+ * 01 = master mode, fed from CLKAUDIO
+ * 10 = slave mode, using PCLK
+ * 11 = slave mode, using I2SCLK
+ */
+#define IISMOD_MASTER_MASK (1 << 11)
+#define IISMOD_SLAVE (1 << 11)
+#define IISMOD_MASTER (0x0)
+#endif
+
+ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
+ case SND_SOC_DAIFMT_CBM_CFM:
+ i2s->master = 0;
+ iismod &= ~IISMOD_MASTER_MASK;
+ iismod |= IISMOD_SLAVE;
+ break;
+ case SND_SOC_DAIFMT_CBS_CFS:
+ i2s->master = 1;
+ iismod &= ~IISMOD_MASTER_MASK;
+ iismod |= IISMOD_MASTER;
+ break;
+ default:
+ pr_debug("unknwon master/slave format\n");
+ return -EINVAL;
+ }
+
+ iismod &= ~S3C2412_IISMOD_SDF_MASK;
+
+ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
+ case SND_SOC_DAIFMT_RIGHT_J:
+ iismod |= S3C2412_IISMOD_SDF_MSB;
+ break;
+ case SND_SOC_DAIFMT_LEFT_J:
+ iismod |= S3C2412_IISMOD_SDF_LSB;
+ break;
+ case SND_SOC_DAIFMT_I2S:
+ iismod |= S3C2412_IISMOD_SDF_IIS;
+ break;
+ default:
+ pr_debug("Unknown data format\n");
+ return -EINVAL;
+ }
+
+ writel(iismod, i2s->regs + S3C2412_IISMOD);
+ pr_debug("hw_params w: IISMOD: %x \n", iismod);
+ return 0;
+}
+
+static int s3c2412_i2s_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *socdai)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct snd_soc_dai_link *dai = rtd->dai;
+ struct s3c_i2sv2_info *i2s = to_info(dai->cpu_dai);
+ u32 iismod;
+
+ pr_debug("Entered %s\n", __func__);
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ dai->cpu_dai->dma_data = i2s->dma_playback;
+ else
+ dai->cpu_dai->dma_data = i2s->dma_capture;
+
+ /* Working copies of register */
+ iismod = readl(i2s->regs + S3C2412_IISMOD);
+ pr_debug("%s: r: IISMOD: %x\n", __func__, iismod);
+
+ switch (params_format(params)) {
+ case SNDRV_PCM_FORMAT_S8:
+ iismod |= S3C2412_IISMOD_8BIT;
+ break;
+ case SNDRV_PCM_FORMAT_S16_LE:
+ iismod &= ~S3C2412_IISMOD_8BIT;
+ break;
+ }
+
+ writel(iismod, i2s->regs + S3C2412_IISMOD);
+ pr_debug("%s: w: IISMOD: %x\n", __func__, iismod);
+ return 0;
+}
+
+static int s3c2412_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
+ struct snd_soc_dai *dai)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct s3c_i2sv2_info *i2s = to_info(rtd->dai->cpu_dai);
+ int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
+ unsigned long irqs;
+ int ret = 0;
+
+ pr_debug("Entered %s\n", __func__);
+
+ switch (cmd) {
+ case SNDRV_PCM_TRIGGER_START:
+ /* On start, ensure that the FIFOs are cleared and reset. */
+
+ writel(capture ? S3C2412_IISFIC_RXFLUSH : S3C2412_IISFIC_TXFLUSH,
+ i2s->regs + S3C2412_IISFIC);
+
+ /* clear again, just in case */
+ writel(0x0, i2s->regs + S3C2412_IISFIC);
+
+ case SNDRV_PCM_TRIGGER_RESUME:
+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+ if (!i2s->master) {
+ ret = s3c2412_snd_lrsync(i2s);
+ if (ret)
+ goto exit_err;
+ }
+
+ local_irq_save(irqs);
+
+ if (capture)
+ s3c2412_snd_rxctrl(i2s, 1);
+ else
+ s3c2412_snd_txctrl(i2s, 1);
+
+ local_irq_restore(irqs);
+ break;
+
+ case SNDRV_PCM_TRIGGER_STOP:
+ case SNDRV_PCM_TRIGGER_SUSPEND:
+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+ local_irq_save(irqs);
+
+ if (capture)
+ s3c2412_snd_rxctrl(i2s, 0);
+ else
+ s3c2412_snd_txctrl(i2s, 0);
+
+ local_irq_restore(irqs);
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+
+exit_err:
+ return ret;
+}
+
+/*
+ * Set S3C2412 Clock dividers
+ */
+static int s3c2412_i2s_set_clkdiv(struct snd_soc_dai *cpu_dai,
+ int div_id, int div)
+{
+ struct s3c_i2sv2_info *i2s = to_info(cpu_dai);
+ u32 reg;
+
+ pr_debug("%s(%p, %d, %d)\n", __func__, cpu_dai, div_id, div);
+
+ switch (div_id) {
+ case S3C_I2SV2_DIV_BCLK:
+ reg = readl(i2s->regs + S3C2412_IISMOD);
+ reg &= ~S3C2412_IISMOD_BCLK_MASK;
+ writel(reg | div, i2s->regs + S3C2412_IISMOD);
+
+ pr_debug("%s: MOD=%08x\n", __func__, readl(i2s->regs + S3C2412_IISMOD));
+ break;
+
+ case S3C_I2SV2_DIV_RCLK:
+ if (div > 3) {
+ /* convert value to bit field */
+
+ switch (div) {
+ case 256:
+ div = S3C2412_IISMOD_RCLK_256FS;
+ break;
+
+ case 384:
+ div = S3C2412_IISMOD_RCLK_384FS;
+ break;
+
+ case 512:
+ div = S3C2412_IISMOD_RCLK_512FS;
+ break;
+
+ case 768:
+ div = S3C2412_IISMOD_RCLK_768FS;
+ break;
+
+ default:
+ return -EINVAL;
+ }
+ }
+
+ reg = readl(i2s->regs + S3C2412_IISMOD);
+ reg &= ~S3C2412_IISMOD_RCLK_MASK;
+ writel(reg | div, i2s->regs + S3C2412_IISMOD);
+ pr_debug("%s: MOD=%08x\n", __func__, readl(i2s->regs + S3C2412_IISMOD));
+ break;
+
+ case S3C_I2SV2_DIV_PRESCALER:
+ if (div >= 0) {
+ writel((div << 8) | S3C2412_IISPSR_PSREN,
+ i2s->regs + S3C2412_IISPSR);
+ } else {
+ writel(0x0, i2s->regs + S3C2412_IISPSR);
+ }
+ pr_debug("%s: PSR=%08x\n", __func__, readl(i2s->regs + S3C2412_IISPSR));
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+/* default table of all avaialable root fs divisors */
+static unsigned int iis_fs_tab[] = { 256, 512, 384, 768 };
+
+int s3c2412_iis_calc_rate(struct s3c_i2sv2_rate_calc *info,
+ unsigned int *fstab,
+ unsigned int rate, struct clk *clk)
+{
+ unsigned long clkrate = clk_get_rate(clk);
+ unsigned int div;
+ unsigned int fsclk;
+ unsigned int actual;
+ unsigned int fs;
+ unsigned int fsdiv;
+ signed int deviation = 0;
+ unsigned int best_fs = 0;
+ unsigned int best_div = 0;
+ unsigned int best_rate = 0;
+ unsigned int best_deviation = INT_MAX;
+
+ if (fstab == NULL)
+ fstab = iis_fs_tab;
+
+ for (fs = 0; fs < ARRAY_SIZE(iis_fs_tab); fs++) {
+ fsdiv = iis_fs_tab[fs];
+
+ fsclk = clkrate / fsdiv;
+ div = fsclk / rate;
+
+ if ((fsclk % rate) > (rate / 2))
+ div++;
+
+ if (div <= 1)
+ continue;
+
+ actual = clkrate / (fsdiv * div);
+ deviation = actual - rate;
+
+ printk(KERN_DEBUG "%dfs: div %d => result %d, deviation %d\n",
+ fsdiv, div, actual, deviation);
+
+ deviation = abs(deviation);
+
+ if (deviation < best_deviation) {
+ best_fs = fsdiv;
+ best_div = div;
+ best_rate = actual;
+ best_deviation = deviation;
+ }
+
+ if (deviation == 0)
+ break;
+ }
+
+ printk(KERN_DEBUG "best: fs=%d, div=%d, rate=%d\n",
+ best_fs, best_div, best_rate);
+
+ info->fs_div = best_fs;
+ info->clk_div = best_div;
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(s3c2412_iis_calc_rate);
+
+int s3c_i2sv2_probe(struct platform_device *pdev,
+ struct snd_soc_dai *dai,
+ struct s3c_i2sv2_info *i2s,
+ unsigned long base)
+{
+ struct device *dev = &pdev->dev;
+
+ i2s->dev = dev;
+
+ /* record our i2s structure for later use in the callbacks */
+ dai->private_data = i2s;
+
+ i2s->regs = ioremap(base, 0x100);
+ if (i2s->regs == NULL) {
+ dev_err(dev, "cannot ioremap registers\n");
+ return -ENXIO;
+ }
+
+ i2s->iis_pclk = clk_get(dev, "iis");
+ if (i2s->iis_pclk == NULL) {
+ dev_err(dev, "failed to get iis_clock\n");
+ iounmap(i2s->regs);
+ return -ENOENT;
+ }
+
+ clk_enable(i2s->iis_pclk);
+
+ s3c2412_snd_txctrl(i2s, 0);
+ s3c2412_snd_rxctrl(i2s, 0);
+
+ return 0;
+}
+
+EXPORT_SYMBOL_GPL(s3c_i2sv2_probe);
+
+#ifdef CONFIG_PM
+static int s3c2412_i2s_suspend(struct snd_soc_dai *dai)
+{
+ struct s3c_i2sv2_info *i2s = to_info(dai);
+ u32 iismod;
+
+ if (dai->active) {
+ i2s->suspend_iismod = readl(i2s->regs + S3C2412_IISMOD);
+ i2s->suspend_iiscon = readl(i2s->regs + S3C2412_IISCON);
+ i2s->suspend_iispsr = readl(i2s->regs + S3C2412_IISPSR);
+
+ /* some basic suspend checks */
+
+ iismod = readl(i2s->regs + S3C2412_IISMOD);
+
+ if (iismod & S3C2412_IISCON_RXDMA_ACTIVE)
+ pr_warning("%s: RXDMA active?\n", __func__);
+
+ if (iismod & S3C2412_IISCON_TXDMA_ACTIVE)
+ pr_warning("%s: TXDMA active?\n", __func__);
+
+ if (iismod & S3C2412_IISCON_IIS_ACTIVE)
+ pr_warning("%s: IIS active\n", __func__);
+ }
+
+ return 0;
+}
+
+static int s3c2412_i2s_resume(struct snd_soc_dai *dai)
+{
+ struct s3c_i2sv2_info *i2s = to_info(dai);
+
+ pr_info("dai_active %d, IISMOD %08x, IISCON %08x\n",
+ dai->active, i2s->suspend_iismod, i2s->suspend_iiscon);
+
+ if (dai->active) {
+ writel(i2s->suspend_iiscon, i2s->regs + S3C2412_IISCON);
+ writel(i2s->suspend_iismod, i2s->regs + S3C2412_IISMOD);
+ writel(i2s->suspend_iispsr, i2s->regs + S3C2412_IISPSR);
+
+ writel(S3C2412_IISFIC_RXFLUSH | S3C2412_IISFIC_TXFLUSH,
+ i2s->regs + S3C2412_IISFIC);
+
+ ndelay(250);
+ writel(0x0, i2s->regs + S3C2412_IISFIC);
+ }
+
+ return 0;
+}
+#else
+#define s3c2412_i2s_suspend NULL
+#define s3c2412_i2s_resume NULL
+#endif
+
+int s3c_i2sv2_register_dai(struct snd_soc_dai *dai)
+{
+ dai->ops.trigger = s3c2412_i2s_trigger;
+ dai->ops.hw_params = s3c2412_i2s_hw_params;
+ dai->ops.set_fmt = s3c2412_i2s_set_fmt;
+ dai->ops.set_clkdiv = s3c2412_i2s_set_clkdiv;
+
+ dai->suspend = s3c2412_i2s_suspend;
+ dai->resume = s3c2412_i2s_resume;
+
+ return snd_soc_register_dai(dai);
+}
+
+EXPORT_SYMBOL_GPL(s3c_i2sv2_register_dai);
--- /dev/null
+/* sound/soc/s3c24xx/s3c-i2s-v2.h
+ *
+ * ALSA Soc Audio Layer - S3C_I2SV2 I2S driver
+ *
+ * Copyright (c) 2007 Simtec Electronics
+ * http://armlinux.simtec.co.uk/
+ * Ben Dooks <ben@simtec.co.uk>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+*/
+
+/* This code is the core support for the I2S block found in a number of
+ * Samsung SoC devices which is unofficially named I2S-V2. Currently the
+ * S3C2412 and the S3C64XX series use this block to provide 1 or 2 I2S
+ * channels via configurable GPIO.
+ */
+
+#ifndef __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H
+#define __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H __FILE__
+
+#define S3C_I2SV2_DIV_BCLK (1)
+#define S3C_I2SV2_DIV_RCLK (2)
+#define S3C_I2SV2_DIV_PRESCALER (3)
+
+/**
+ * struct s3c_i2sv2_info - S3C I2S-V2 information
+ * @dev: The parent device passed to use from the probe.
+ * @regs: The pointer to the device registe block.
+ * @master: True if the I2S core is the I2S bit clock master.
+ * @dma_playback: DMA information for playback channel.
+ * @dma_capture: DMA information for capture channel.
+ * @suspend_iismod: PM save for the IISMOD register.
+ * @suspend_iiscon: PM save for the IISCON register.
+ * @suspend_iispsr: PM save for the IISPSR register.
+ *
+ * This is the private codec state for the hardware associated with an
+ * I2S channel such as the register mappings and clock sources.
+ */
+struct s3c_i2sv2_info {
+ struct device *dev;
+ void __iomem *regs;
+
+ struct clk *iis_pclk;
+ struct clk *iis_cclk;
+ struct clk *iis_clk;
+
+ unsigned char master;
+
+ struct s3c24xx_pcm_dma_params *dma_playback;
+ struct s3c24xx_pcm_dma_params *dma_capture;
+
+ u32 suspend_iismod;
+ u32 suspend_iiscon;
+ u32 suspend_iispsr;
+};
+
+struct s3c_i2sv2_rate_calc {
+ unsigned int clk_div; /* for prescaler */
+ unsigned int fs_div; /* for root frame clock */
+};
+
+extern int s3c_i2sv2_iis_calc_rate(struct s3c_i2sv2_rate_calc *info,
+ unsigned int *fstab,
+ unsigned int rate, struct clk *clk);
+
+/**
+ * s3c_i2sv2_probe - probe for i2s device helper
+ * @pdev: The platform device supplied to the original probe.
+ * @dai: The ASoC DAI structure supplied to the original probe.
+ * @i2s: Our local i2s structure to fill in.
+ * @base: The base address for the registers.
+ */
+extern int s3c_i2sv2_probe(struct platform_device *pdev,
+ struct snd_soc_dai *dai,
+ struct s3c_i2sv2_info *i2s,
+ unsigned long base);
+
+/**
+ * s3c_i2sv2_register_dai - register dai with soc core
+ * @dai: The snd_soc_dai structure to register
+ *
+ * Fill in any missing fields and then register the given dai with the
+ * soc core.
+ */
+extern int s3c_i2sv2_register_dai(struct snd_soc_dai *dai);
+
+#endif /* __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H */
#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/kernel.h>
+#include <linux/io.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/soc.h>
#include <mach/hardware.h>
-#include <linux/io.h>
-#include <asm/dma.h>
-
-#include <asm/plat-s3c24xx/regs-s3c2412-iis.h>
+#include <plat/regs-s3c2412-iis.h>
-#include <mach/regs-gpio.h>
-#include <mach/audio.h>
+#include <plat/regs-gpio.h>
+#include <plat/audio.h>
#include <mach/dma.h>
#include "s3c24xx-pcm.h"
#include "s3c2412-i2s.h"
#define S3C2412_I2S_DEBUG 0
-#define S3C2412_I2S_DEBUG_CON 0
-
-#if S3C2412_I2S_DEBUG
-#define DBG(x...) printk(KERN_INFO x)
-#else
-#define DBG(x...) do { } while (0)
-#endif
static struct s3c2410_dma_client s3c2412_dma_client_out = {
.name = "I2S PCM Stereo out"
.dma_size = 4,
};
-struct s3c2412_i2s_info {
- struct device *dev;
- void __iomem *regs;
- struct clk *iis_clk;
- struct clk *iis_pclk;
- struct clk *iis_cclk;
-
- u32 suspend_iismod;
- u32 suspend_iiscon;
- u32 suspend_iispsr;
-};
-
-static struct s3c2412_i2s_info s3c2412_i2s;
-
-#define bit_set(v, b) (((v) & (b)) ? 1 : 0)
-
-#if S3C2412_I2S_DEBUG_CON
-static void dbg_showcon(const char *fn, u32 con)
-{
- printk(KERN_DEBUG "%s: LRI=%d, TXFEMPT=%d, RXFEMPT=%d, TXFFULL=%d, RXFFULL=%d\n", fn,
- bit_set(con, S3C2412_IISCON_LRINDEX),
- bit_set(con, S3C2412_IISCON_TXFIFO_EMPTY),
- bit_set(con, S3C2412_IISCON_RXFIFO_EMPTY),
- bit_set(con, S3C2412_IISCON_TXFIFO_FULL),
- bit_set(con, S3C2412_IISCON_RXFIFO_FULL));
-
- printk(KERN_DEBUG "%s: PAUSE: TXDMA=%d, RXDMA=%d, TXCH=%d, RXCH=%d\n",
- fn,
- bit_set(con, S3C2412_IISCON_TXDMA_PAUSE),
- bit_set(con, S3C2412_IISCON_RXDMA_PAUSE),
- bit_set(con, S3C2412_IISCON_TXCH_PAUSE),
- bit_set(con, S3C2412_IISCON_RXCH_PAUSE));
- printk(KERN_DEBUG "%s: ACTIVE: TXDMA=%d, RXDMA=%d, IIS=%d\n", fn,
- bit_set(con, S3C2412_IISCON_TXDMA_ACTIVE),
- bit_set(con, S3C2412_IISCON_RXDMA_ACTIVE),
- bit_set(con, S3C2412_IISCON_IIS_ACTIVE));
-}
-#else
-static inline void dbg_showcon(const char *fn, u32 con)
-{
-}
-#endif
-
-/* Turn on or off the transmission path. */
-static void s3c2412_snd_txctrl(int on)
-{
- struct s3c2412_i2s_info *i2s = &s3c2412_i2s;
- void __iomem *regs = i2s->regs;
- u32 fic, con, mod;
-
- DBG("%s(%d)\n", __func__, on);
-
- fic = readl(regs + S3C2412_IISFIC);
- con = readl(regs + S3C2412_IISCON);
- mod = readl(regs + S3C2412_IISMOD);
-
- DBG("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic);
-
- if (on) {
- con |= S3C2412_IISCON_TXDMA_ACTIVE | S3C2412_IISCON_IIS_ACTIVE;
- con &= ~S3C2412_IISCON_TXDMA_PAUSE;
- con &= ~S3C2412_IISCON_TXCH_PAUSE;
-
- switch (mod & S3C2412_IISMOD_MODE_MASK) {
- case S3C2412_IISMOD_MODE_TXONLY:
- case S3C2412_IISMOD_MODE_TXRX:
- /* do nothing, we are in the right mode */
- break;
-
- case S3C2412_IISMOD_MODE_RXONLY:
- mod &= ~S3C2412_IISMOD_MODE_MASK;
- mod |= S3C2412_IISMOD_MODE_TXRX;
- break;
-
- default:
- dev_err(i2s->dev, "TXEN: Invalid MODE in IISMOD\n");
- }
-
- writel(con, regs + S3C2412_IISCON);
- writel(mod, regs + S3C2412_IISMOD);
- } else {
- /* Note, we do not have any indication that the FIFO problems
- * tha the S3C2410/2440 had apply here, so we should be able
- * to disable the DMA and TX without resetting the FIFOS.
- */
-
- con |= S3C2412_IISCON_TXDMA_PAUSE;
- con |= S3C2412_IISCON_TXCH_PAUSE;
- con &= ~S3C2412_IISCON_TXDMA_ACTIVE;
-
- switch (mod & S3C2412_IISMOD_MODE_MASK) {
- case S3C2412_IISMOD_MODE_TXRX:
- mod &= ~S3C2412_IISMOD_MODE_MASK;
- mod |= S3C2412_IISMOD_MODE_RXONLY;
- break;
-
- case S3C2412_IISMOD_MODE_TXONLY:
- mod &= ~S3C2412_IISMOD_MODE_MASK;
- con &= ~S3C2412_IISCON_IIS_ACTIVE;
- break;
-
- default:
- dev_err(i2s->dev, "TXDIS: Invalid MODE in IISMOD\n");
- }
-
- writel(mod, regs + S3C2412_IISMOD);
- writel(con, regs + S3C2412_IISCON);
- }
-
- fic = readl(regs + S3C2412_IISFIC);
- dbg_showcon(__func__, con);
- DBG("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic);
-}
-
-static void s3c2412_snd_rxctrl(int on)
-{
- struct s3c2412_i2s_info *i2s = &s3c2412_i2s;
- void __iomem *regs = i2s->regs;
- u32 fic, con, mod;
-
- DBG("%s(%d)\n", __func__, on);
-
- fic = readl(regs + S3C2412_IISFIC);
- con = readl(regs + S3C2412_IISCON);
- mod = readl(regs + S3C2412_IISMOD);
-
- DBG("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic);
-
- if (on) {
- con |= S3C2412_IISCON_RXDMA_ACTIVE | S3C2412_IISCON_IIS_ACTIVE;
- con &= ~S3C2412_IISCON_RXDMA_PAUSE;
- con &= ~S3C2412_IISCON_RXCH_PAUSE;
-
- switch (mod & S3C2412_IISMOD_MODE_MASK) {
- case S3C2412_IISMOD_MODE_TXRX:
- case S3C2412_IISMOD_MODE_RXONLY:
- /* do nothing, we are in the right mode */
- break;
-
- case S3C2412_IISMOD_MODE_TXONLY:
- mod &= ~S3C2412_IISMOD_MODE_MASK;
- mod |= S3C2412_IISMOD_MODE_TXRX;
- break;
-
- default:
- dev_err(i2s->dev, "RXEN: Invalid MODE in IISMOD\n");
- }
-
- writel(mod, regs + S3C2412_IISMOD);
- writel(con, regs + S3C2412_IISCON);
- } else {
- /* See txctrl notes on FIFOs. */
-
- con &= ~S3C2412_IISCON_RXDMA_ACTIVE;
- con |= S3C2412_IISCON_RXDMA_PAUSE;
- con |= S3C2412_IISCON_RXCH_PAUSE;
-
- switch (mod & S3C2412_IISMOD_MODE_MASK) {
- case S3C2412_IISMOD_MODE_RXONLY:
- con &= ~S3C2412_IISCON_IIS_ACTIVE;
- mod &= ~S3C2412_IISMOD_MODE_MASK;
- break;
-
- case S3C2412_IISMOD_MODE_TXRX:
- mod &= ~S3C2412_IISMOD_MODE_MASK;
- mod |= S3C2412_IISMOD_MODE_TXONLY;
- break;
-
- default:
- dev_err(i2s->dev, "RXEN: Invalid MODE in IISMOD\n");
- }
-
- writel(con, regs + S3C2412_IISCON);
- writel(mod, regs + S3C2412_IISMOD);
- }
-
- fic = readl(regs + S3C2412_IISFIC);
- DBG("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic);
-}
-
-
-/*
- * Wait for the LR signal to allow synchronisation to the L/R clock
- * from the codec. May only be needed for slave mode.
- */
-static int s3c2412_snd_lrsync(void)
-{
- u32 iiscon;
- unsigned long timeout = jiffies + msecs_to_jiffies(5);
-
- DBG("Entered %s\n", __func__);
-
- while (1) {
- iiscon = readl(s3c2412_i2s.regs + S3C2412_IISCON);
- if (iiscon & S3C2412_IISCON_LRINDEX)
- break;
-
- if (timeout < jiffies) {
- printk(KERN_ERR "%s: timeout\n", __func__);
- return -ETIMEDOUT;
- }
- }
-
- return 0;
-}
-
-/*
- * Check whether CPU is the master or slave
- */
-static inline int s3c2412_snd_is_clkmaster(void)
-{
- u32 iismod = readl(s3c2412_i2s.regs + S3C2412_IISMOD);
-
- DBG("Entered %s\n", __func__);
-
- iismod &= S3C2412_IISMOD_MASTER_MASK;
- return !(iismod == S3C2412_IISMOD_SLAVE);
-}
-
-/*
- * Set S3C2412 I2S DAI format
- */
-static int s3c2412_i2s_set_fmt(struct snd_soc_dai *cpu_dai,
- unsigned int fmt)
-{
- u32 iismod;
-
-
- DBG("Entered %s\n", __func__);
-
- iismod = readl(s3c2412_i2s.regs + S3C2412_IISMOD);
- DBG("hw_params r: IISMOD: %x \n", iismod);
-
- switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
- case SND_SOC_DAIFMT_CBM_CFM:
- iismod &= ~S3C2412_IISMOD_MASTER_MASK;
- iismod |= S3C2412_IISMOD_SLAVE;
- break;
- case SND_SOC_DAIFMT_CBS_CFS:
- iismod &= ~S3C2412_IISMOD_MASTER_MASK;
- iismod |= S3C2412_IISMOD_MASTER_INTERNAL;
- break;
- default:
- DBG("unknwon master/slave format\n");
- return -EINVAL;
- }
-
- iismod &= ~S3C2412_IISMOD_SDF_MASK;
-
- switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
- case SND_SOC_DAIFMT_RIGHT_J:
- iismod |= S3C2412_IISMOD_SDF_MSB;
- break;
- case SND_SOC_DAIFMT_LEFT_J:
- iismod |= S3C2412_IISMOD_SDF_LSB;
- break;
- case SND_SOC_DAIFMT_I2S:
- iismod |= S3C2412_IISMOD_SDF_IIS;
- break;
- default:
- DBG("Unknown data format\n");
- return -EINVAL;
- }
-
- writel(iismod, s3c2412_i2s.regs + S3C2412_IISMOD);
- DBG("hw_params w: IISMOD: %x \n", iismod);
- return 0;
-}
-
-static int s3c2412_i2s_hw_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params,
- struct snd_soc_dai *dai)
-{
- struct snd_soc_pcm_runtime *rtd = substream->private_data;
- u32 iismod;
-
- DBG("Entered %s\n", __func__);
-
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
- rtd->dai->cpu_dai->dma_data = &s3c2412_i2s_pcm_stereo_out;
- else
- rtd->dai->cpu_dai->dma_data = &s3c2412_i2s_pcm_stereo_in;
-
- /* Working copies of register */
- iismod = readl(s3c2412_i2s.regs + S3C2412_IISMOD);
- DBG("%s: r: IISMOD: %x\n", __func__, iismod);
-
- switch (params_format(params)) {
- case SNDRV_PCM_FORMAT_S8:
- iismod |= S3C2412_IISMOD_8BIT;
- break;
- case SNDRV_PCM_FORMAT_S16_LE:
- iismod &= ~S3C2412_IISMOD_8BIT;
- break;
- }
-
- writel(iismod, s3c2412_i2s.regs + S3C2412_IISMOD);
- DBG("%s: w: IISMOD: %x\n", __func__, iismod);
- return 0;
-}
-
-static int s3c2412_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
- struct snd_soc_dai *dai)
-{
- int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
- unsigned long irqs;
- int ret = 0;
-
- DBG("Entered %s\n", __func__);
-
- switch (cmd) {
- case SNDRV_PCM_TRIGGER_START:
- /* On start, ensure that the FIFOs are cleared and reset. */
-
- writel(capture ? S3C2412_IISFIC_RXFLUSH : S3C2412_IISFIC_TXFLUSH,
- s3c2412_i2s.regs + S3C2412_IISFIC);
-
- /* clear again, just in case */
- writel(0x0, s3c2412_i2s.regs + S3C2412_IISFIC);
-
- case SNDRV_PCM_TRIGGER_RESUME:
- case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
- if (!s3c2412_snd_is_clkmaster()) {
- ret = s3c2412_snd_lrsync();
- if (ret)
- goto exit_err;
- }
-
- local_irq_save(irqs);
-
- if (capture)
- s3c2412_snd_rxctrl(1);
- else
- s3c2412_snd_txctrl(1);
-
- local_irq_restore(irqs);
- break;
-
- case SNDRV_PCM_TRIGGER_STOP:
- case SNDRV_PCM_TRIGGER_SUSPEND:
- case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
- local_irq_save(irqs);
-
- if (capture)
- s3c2412_snd_rxctrl(0);
- else
- s3c2412_snd_txctrl(0);
-
- local_irq_restore(irqs);
- break;
- default:
- ret = -EINVAL;
- break;
- }
-
-exit_err:
- return ret;
-}
-
-/* default table of all avaialable root fs divisors */
-static unsigned int s3c2412_iis_fs[] = { 256, 512, 384, 768, 0 };
-
-int s3c2412_iis_calc_rate(struct s3c2412_rate_calc *info,
- unsigned int *fstab,
- unsigned int rate, struct clk *clk)
-{
- unsigned long clkrate = clk_get_rate(clk);
- unsigned int div;
- unsigned int fsclk;
- unsigned int actual;
- unsigned int fs;
- unsigned int fsdiv;
- signed int deviation = 0;
- unsigned int best_fs = 0;
- unsigned int best_div = 0;
- unsigned int best_rate = 0;
- unsigned int best_deviation = INT_MAX;
-
-
- if (fstab == NULL)
- fstab = s3c2412_iis_fs;
-
- for (fs = 0;; fs++) {
- fsdiv = s3c2412_iis_fs[fs];
-
- if (fsdiv == 0)
- break;
-
- fsclk = clkrate / fsdiv;
- div = fsclk / rate;
-
- if ((fsclk % rate) > (rate / 2))
- div++;
-
- if (div <= 1)
- continue;
-
- actual = clkrate / (fsdiv * div);
- deviation = actual - rate;
-
- printk(KERN_DEBUG "%dfs: div %d => result %d, deviation %d\n",
- fsdiv, div, actual, deviation);
-
- deviation = abs(deviation);
-
- if (deviation < best_deviation) {
- best_fs = fsdiv;
- best_div = div;
- best_rate = actual;
- best_deviation = deviation;
- }
-
- if (deviation == 0)
- break;
- }
-
- printk(KERN_DEBUG "best: fs=%d, div=%d, rate=%d\n",
- best_fs, best_div, best_rate);
-
- info->fs_div = best_fs;
- info->clk_div = best_div;
-
- return 0;
-}
-EXPORT_SYMBOL_GPL(s3c2412_iis_calc_rate);
+static struct s3c_i2sv2_info s3c2412_i2s;
/*
* Set S3C2412 Clock source
{
u32 iismod = readl(s3c2412_i2s.regs + S3C2412_IISMOD);
- DBG("%s(%p, %d, %u, %d)\n", __func__, cpu_dai, clk_id,
+ pr_debug("%s(%p, %d, %u, %d)\n", __func__, cpu_dai, clk_id,
freq, dir);
switch (clk_id) {
case S3C2412_CLKSRC_PCLK:
+ s3c2412_i2s.master = 1;
iismod &= ~S3C2412_IISMOD_MASTER_MASK;
iismod |= S3C2412_IISMOD_MASTER_INTERNAL;
break;
case S3C2412_CLKSRC_I2SCLK:
+ s3c2412_i2s.master = 0;
iismod &= ~S3C2412_IISMOD_MASTER_MASK;
iismod |= S3C2412_IISMOD_MASTER_EXTERNAL;
break;
return 0;
}
-/*
- * Set S3C2412 Clock dividers
- */
-static int s3c2412_i2s_set_clkdiv(struct snd_soc_dai *cpu_dai,
- int div_id, int div)
-{
- struct s3c2412_i2s_info *i2s = &s3c2412_i2s;
- u32 reg;
-
- DBG("%s(%p, %d, %d)\n", __func__, cpu_dai, div_id, div);
-
- switch (div_id) {
- case S3C2412_DIV_BCLK:
- reg = readl(i2s->regs + S3C2412_IISMOD);
- reg &= ~S3C2412_IISMOD_BCLK_MASK;
- writel(reg | div, i2s->regs + S3C2412_IISMOD);
-
- DBG("%s: MOD=%08x\n", __func__, readl(i2s->regs + S3C2412_IISMOD));
- break;
-
- case S3C2412_DIV_RCLK:
- if (div > 3) {
- /* convert value to bit field */
-
- switch (div) {
- case 256:
- div = S3C2412_IISMOD_RCLK_256FS;
- break;
-
- case 384:
- div = S3C2412_IISMOD_RCLK_384FS;
- break;
-
- case 512:
- div = S3C2412_IISMOD_RCLK_512FS;
- break;
-
- case 768:
- div = S3C2412_IISMOD_RCLK_768FS;
- break;
-
- default:
- return -EINVAL;
- }
- }
-
- reg = readl(s3c2412_i2s.regs + S3C2412_IISMOD);
- reg &= ~S3C2412_IISMOD_RCLK_MASK;
- writel(reg | div, i2s->regs + S3C2412_IISMOD);
- DBG("%s: MOD=%08x\n", __func__, readl(i2s->regs + S3C2412_IISMOD));
- break;
-
- case S3C2412_DIV_PRESCALER:
- if (div >= 0) {
- writel((div << 8) | S3C2412_IISPSR_PSREN,
- i2s->regs + S3C2412_IISPSR);
- } else {
- writel(0x0, i2s->regs + S3C2412_IISPSR);
- }
- DBG("%s: PSR=%08x\n", __func__, readl(i2s->regs + S3C2412_IISPSR));
- break;
-
- default:
- return -EINVAL;
- }
-
- return 0;
-}
struct clk *s3c2412_get_iisclk(void)
{
static int s3c2412_i2s_probe(struct platform_device *pdev,
struct snd_soc_dai *dai)
{
- DBG("Entered %s\n", __func__);
+ int ret;
- s3c2412_i2s.dev = &pdev->dev;
+ pr_debug("Entered %s\n", __func__);
- s3c2412_i2s.regs = ioremap(S3C2410_PA_IIS, 0x100);
- if (s3c2412_i2s.regs == NULL)
- return -ENXIO;
+ ret = s3c_i2sv2_probe(pdev, dai, &s3c2412_i2s, S3C2410_PA_IIS);
+ if (ret)
+ return ret;
- s3c2412_i2s.iis_pclk = clk_get(&pdev->dev, "iis");
- if (s3c2412_i2s.iis_pclk == NULL) {
- DBG("failed to get iis_clock\n");
- iounmap(s3c2412_i2s.regs);
- return -ENODEV;
- }
+ s3c2412_i2s.dma_capture = &s3c2412_i2s_pcm_stereo_in;
+ s3c2412_i2s.dma_playback = &s3c2412_i2s_pcm_stereo_out;
s3c2412_i2s.iis_cclk = clk_get(&pdev->dev, "i2sclk");
if (s3c2412_i2s.iis_cclk == NULL) {
- DBG("failed to get i2sclk clock\n");
+ pr_debug("failed to get i2sclk clock\n");
iounmap(s3c2412_i2s.regs);
return -ENODEV;
}
- clk_set_parent(s3c2412_i2s.iis_cclk, clk_get(NULL, "mpll"));
+ /* Set MPLL as the source for IIS CLK */
- clk_enable(s3c2412_i2s.iis_pclk);
+ clk_set_parent(s3c2412_i2s.iis_cclk, clk_get(NULL, "mpll"));
clk_enable(s3c2412_i2s.iis_cclk);
- s3c2412_i2s.iis_clk = s3c2412_i2s.iis_pclk;
+ s3c2412_i2s.iis_cclk = s3c2412_i2s.iis_pclk;
/* Configure the I2S pins in correct mode */
s3c2410_gpio_cfgpin(S3C2410_GPE0, S3C2410_GPE0_I2SLRCK);
s3c2410_gpio_cfgpin(S3C2410_GPE3, S3C2410_GPE3_I2SSDI);
s3c2410_gpio_cfgpin(S3C2410_GPE4, S3C2410_GPE4_I2SSDO);
- s3c2412_snd_txctrl(0);
- s3c2412_snd_rxctrl(0);
-
return 0;
}
-#ifdef CONFIG_PM
-static int s3c2412_i2s_suspend(struct snd_soc_dai *dai)
-{
- struct s3c2412_i2s_info *i2s = &s3c2412_i2s;
- u32 iismod;
-
- if (dai->active) {
- i2s->suspend_iismod = readl(i2s->regs + S3C2412_IISMOD);
- i2s->suspend_iiscon = readl(i2s->regs + S3C2412_IISCON);
- i2s->suspend_iispsr = readl(i2s->regs + S3C2412_IISPSR);
-
- /* some basic suspend checks */
-
- iismod = readl(i2s->regs + S3C2412_IISMOD);
-
- if (iismod & S3C2412_IISCON_RXDMA_ACTIVE)
- pr_warning("%s: RXDMA active?\n", __func__);
-
- if (iismod & S3C2412_IISCON_TXDMA_ACTIVE)
- pr_warning("%s: TXDMA active?\n", __func__);
-
- if (iismod & S3C2412_IISCON_IIS_ACTIVE)
- pr_warning("%s: IIS active\n", __func__);
- }
-
- return 0;
-}
-
-static int s3c2412_i2s_resume(struct snd_soc_dai *dai)
-{
- struct s3c2412_i2s_info *i2s = &s3c2412_i2s;
-
- pr_info("dai_active %d, IISMOD %08x, IISCON %08x\n",
- dai->active, i2s->suspend_iismod, i2s->suspend_iiscon);
-
- if (dai->active) {
- writel(i2s->suspend_iiscon, i2s->regs + S3C2412_IISCON);
- writel(i2s->suspend_iismod, i2s->regs + S3C2412_IISMOD);
- writel(i2s->suspend_iispsr, i2s->regs + S3C2412_IISPSR);
-
- writel(S3C2412_IISFIC_RXFLUSH | S3C2412_IISFIC_TXFLUSH,
- i2s->regs + S3C2412_IISFIC);
-
- ndelay(250);
- writel(0x0, i2s->regs + S3C2412_IISFIC);
-
- }
-
- return 0;
-}
-#else
-#define s3c2412_i2s_suspend NULL
-#define s3c2412_i2s_resume NULL
-#endif /* CONFIG_PM */
-
#define S3C2412_I2S_RATES \
(SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \
SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
+static struct snd_soc_dai_ops s3c2412_i2s_dai_ops = {
+ .set_sysclk = s3c2412_i2s_set_sysclk,
+};
+
struct snd_soc_dai s3c2412_i2s_dai = {
- .name = "s3c2412-i2s",
- .id = 0,
- .probe = s3c2412_i2s_probe,
- .suspend = s3c2412_i2s_suspend,
- .resume = s3c2412_i2s_resume,
+ .name = "s3c2412-i2s",
+ .id = 0,
+ .probe = s3c2412_i2s_probe,
.playback = {
.channels_min = 2,
.channels_max = 2,
.rates = S3C2412_I2S_RATES,
.formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE,
},
- .ops = {
- .trigger = s3c2412_i2s_trigger,
- .hw_params = s3c2412_i2s_hw_params,
- .set_fmt = s3c2412_i2s_set_fmt,
- .set_clkdiv = s3c2412_i2s_set_clkdiv,
- .set_sysclk = s3c2412_i2s_set_sysclk,
- },
+ .ops = &s3c2412_i2s_dai_ops,
};
EXPORT_SYMBOL_GPL(s3c2412_i2s_dai);
static int __init s3c2412_i2s_init(void)
{
- return snd_soc_register_dai(&s3c2412_i2s_dai);
+ return s3c_i2sv2_register_dai(&s3c2412_i2s_dai);
}
module_init(s3c2412_i2s_init);
}
module_exit(s3c2412_i2s_exit);
-
/* Module information */
MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
MODULE_DESCRIPTION("S3C2412 I2S SoC Interface");
#ifndef __SND_SOC_S3C24XX_S3C2412_I2S_H
#define __SND_SOC_S3C24XX_S3C2412_I2S_H __FILE__
-#define S3C2412_DIV_BCLK (1)
-#define S3C2412_DIV_RCLK (2)
-#define S3C2412_DIV_PRESCALER (3)
+#include "s3c-i2s-v2.h"
+
+#define S3C2412_DIV_BCLK S3C_I2SV2_DIV_BCLK
+#define S3C2412_DIV_RCLK S3C_I2SV2_DIV_RCLK
+#define S3C2412_DIV_PRESCALER S3C_I2SV2_DIV_PRESCALER
#define S3C2412_CLKSRC_PCLK (0)
#define S3C2412_CLKSRC_I2SCLK (1)
extern struct snd_soc_dai s3c2412_i2s_dai;
-struct s3c2412_rate_calc {
- unsigned int clk_div; /* for prescaler */
- unsigned int fs_div; /* for root frame clock */
-};
-
-extern int s3c2412_iis_calc_rate(struct s3c2412_rate_calc *info,
- unsigned int *fstab,
- unsigned int rate, struct clk *clk);
-
#endif /* __SND_SOC_S3C24XX_S3C2412_I2S_H */
#include <plat/regs-ac97.h>
#include <mach/regs-gpio.h>
#include <mach/regs-clock.h>
-#include <mach/audio.h>
+#include <plat/audio.h>
#include <asm/dma.h>
#include <mach/dma.h>
SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
+static struct snd_soc_dai_ops s3c2443_ac97_dai_ops = {
+ .hw_params = s3c2443_ac97_hw_params,
+ .trigger = s3c2443_ac97_trigger,
+};
+
+static struct snd_soc_dai_ops s3c2443_ac97_mic_dai_ops = {
+ .hw_params = s3c2443_ac97_hw_mic_params,
+ .trigger = s3c2443_ac97_mic_trigger,
+};
+
struct snd_soc_dai s3c2443_ac97_dai[] = {
{
.name = "s3c2443-ac97",
.channels_max = 2,
.rates = s3c2443_AC97_RATES,
.formats = SNDRV_PCM_FMTBIT_S16_LE,},
- .ops = {
- .hw_params = s3c2443_ac97_hw_params,
- .trigger = s3c2443_ac97_trigger},
+ .ops = &s3c2443_ac97_dai_ops,
},
{
.name = "pxa2xx-ac97-mic",
.channels_max = 1,
.rates = s3c2443_AC97_RATES,
.formats = SNDRV_PCM_FMTBIT_S16_LE,},
- .ops = {
- .hw_params = s3c2443_ac97_hw_mic_params,
- .trigger = s3c2443_ac97_mic_trigger,},
+ .ops = &s3c2443_ac97_mic_dai_ops,
},
};
EXPORT_SYMBOL_GPL(s3c2443_ac97_dai);
* (c) 2006 Wolfson Microelectronics PLC.
* Graeme Gregory graeme.gregory@wolfsonmicro.com or linux@wolfsonmicro.com
*
- * (c) 2004-2005 Simtec Electronics
+ * Copyright 2004-2005 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
#include <mach/hardware.h>
#include <mach/regs-gpio.h>
#include <mach/regs-clock.h>
-#include <mach/audio.h>
+#include <plat/audio.h>
#include <asm/dma.h>
#include <mach/dma.h>
-#include <asm/plat-s3c24xx/regs-iis.h>
+#include <plat/regs-iis.h>
#include "s3c24xx-pcm.h"
#include "s3c24xx-i2s.h"
-#define S3C24XX_I2S_DEBUG 0
-#if S3C24XX_I2S_DEBUG
-#define DBG(x...) printk(KERN_DEBUG "s3c24xx-i2s: " x)
-#else
-#define DBG(x...)
-#endif
-
static struct s3c2410_dma_client s3c24xx_dma_client_out = {
.name = "I2S PCM Stereo out"
};
u32 iiscon;
u32 iismod;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
iisfcon = readl(s3c24xx_i2s.regs + S3C2410_IISFCON);
iiscon = readl(s3c24xx_i2s.regs + S3C2410_IISCON);
iismod = readl(s3c24xx_i2s.regs + S3C2410_IISMOD);
- DBG("r: IISCON: %lx IISMOD: %lx IISFCON: %lx\n", iiscon, iismod, iisfcon);
+ pr_debug("r: IISCON: %x IISMOD: %x IISFCON: %x\n", iiscon, iismod, iisfcon);
if (on) {
iisfcon |= S3C2410_IISFCON_TXDMA | S3C2410_IISFCON_TXENABLE;
writel(iismod, s3c24xx_i2s.regs + S3C2410_IISMOD);
}
- DBG("w: IISCON: %lx IISMOD: %lx IISFCON: %lx\n", iiscon, iismod, iisfcon);
+ pr_debug("w: IISCON: %x IISMOD: %x IISFCON: %x\n", iiscon, iismod, iisfcon);
}
static void s3c24xx_snd_rxctrl(int on)
u32 iiscon;
u32 iismod;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
iisfcon = readl(s3c24xx_i2s.regs + S3C2410_IISFCON);
iiscon = readl(s3c24xx_i2s.regs + S3C2410_IISCON);
iismod = readl(s3c24xx_i2s.regs + S3C2410_IISMOD);
- DBG("r: IISCON: %lx IISMOD: %lx IISFCON: %lx\n", iiscon, iismod, iisfcon);
+ pr_debug("r: IISCON: %x IISMOD: %x IISFCON: %x\n", iiscon, iismod, iisfcon);
if (on) {
iisfcon |= S3C2410_IISFCON_RXDMA | S3C2410_IISFCON_RXENABLE;
writel(iismod, s3c24xx_i2s.regs + S3C2410_IISMOD);
}
- DBG("w: IISCON: %lx IISMOD: %lx IISFCON: %lx\n", iiscon, iismod, iisfcon);
+ pr_debug("w: IISCON: %x IISMOD: %x IISFCON: %x\n", iiscon, iismod, iisfcon);
}
/*
u32 iiscon;
int timeout = 50; /* 5ms */
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
while (1) {
iiscon = readl(s3c24xx_i2s.regs + S3C2410_IISCON);
*/
static inline int s3c24xx_snd_is_clkmaster(void)
{
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
return (readl(s3c24xx_i2s.regs + S3C2410_IISMOD) & S3C2410_IISMOD_SLAVE) ? 0:1;
}
{
u32 iismod;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
iismod = readl(s3c24xx_i2s.regs + S3C2410_IISMOD);
- DBG("hw_params r: IISMOD: %lx \n", iismod);
+ pr_debug("hw_params r: IISMOD: %x \n", iismod);
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
case SND_SOC_DAIFMT_CBM_CFM:
}
writel(iismod, s3c24xx_i2s.regs + S3C2410_IISMOD);
- DBG("hw_params w: IISMOD: %lx \n", iismod);
+ pr_debug("hw_params w: IISMOD: %x \n", iismod);
return 0;
}
struct snd_soc_pcm_runtime *rtd = substream->private_data;
u32 iismod;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
rtd->dai->cpu_dai->dma_data = &s3c24xx_i2s_pcm_stereo_out;
/* Working copies of register */
iismod = readl(s3c24xx_i2s.regs + S3C2410_IISMOD);
- DBG("hw_params r: IISMOD: %lx\n", iismod);
+ pr_debug("hw_params r: IISMOD: %x\n", iismod);
switch (params_format(params)) {
case SNDRV_PCM_FORMAT_S8:
}
writel(iismod, s3c24xx_i2s.regs + S3C2410_IISMOD);
- DBG("hw_params w: IISMOD: %lx\n", iismod);
+ pr_debug("hw_params w: IISMOD: %x\n", iismod);
return 0;
}
{
int ret = 0;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
{
u32 iismod = readl(s3c24xx_i2s.regs + S3C2410_IISMOD);
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
iismod &= ~S3C2440_IISMOD_MPLL;
{
u32 reg;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
switch (div_id) {
case S3C24XX_DIV_BCLK:
static int s3c24xx_i2s_probe(struct platform_device *pdev,
struct snd_soc_dai *dai)
{
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
s3c24xx_i2s.regs = ioremap(S3C2410_PA_IIS, 0x100);
if (s3c24xx_i2s.regs == NULL)
s3c24xx_i2s.iis_clk = clk_get(&pdev->dev, "iis");
if (s3c24xx_i2s.iis_clk == NULL) {
- DBG("failed to get iis_clock\n");
+ pr_err("failed to get iis_clock\n");
iounmap(s3c24xx_i2s.regs);
return -ENODEV;
}
#ifdef CONFIG_PM
static int s3c24xx_i2s_suspend(struct snd_soc_dai *cpu_dai)
{
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
s3c24xx_i2s.iiscon = readl(s3c24xx_i2s.regs + S3C2410_IISCON);
s3c24xx_i2s.iismod = readl(s3c24xx_i2s.regs + S3C2410_IISMOD);
static int s3c24xx_i2s_resume(struct snd_soc_dai *cpu_dai)
{
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
clk_enable(s3c24xx_i2s.iis_clk);
writel(s3c24xx_i2s.iiscon, s3c24xx_i2s.regs + S3C2410_IISCON);
SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
+static struct snd_soc_dai_ops s3c24xx_i2s_dai_ops = {
+ .trigger = s3c24xx_i2s_trigger,
+ .hw_params = s3c24xx_i2s_hw_params,
+ .set_fmt = s3c24xx_i2s_set_fmt,
+ .set_clkdiv = s3c24xx_i2s_set_clkdiv,
+ .set_sysclk = s3c24xx_i2s_set_sysclk,
+};
+
struct snd_soc_dai s3c24xx_i2s_dai = {
.name = "s3c24xx-i2s",
.id = 0,
.channels_max = 2,
.rates = S3C24XX_I2S_RATES,
.formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE,},
- .ops = {
- .trigger = s3c24xx_i2s_trigger,
- .hw_params = s3c24xx_i2s_hw_params,
- .set_fmt = s3c24xx_i2s_set_fmt,
- .set_clkdiv = s3c24xx_i2s_set_clkdiv,
- .set_sysclk = s3c24xx_i2s_set_sysclk,
- },
+ .ops = &s3c24xx_i2s_dai_ops,
};
EXPORT_SYMBOL_GPL(s3c24xx_i2s_dai);
* (c) 2006 Wolfson Microelectronics PLC.
* Graeme Gregory graeme.gregory@wolfsonmicro.com or linux@wolfsonmicro.com
*
- * (c) 2004-2005 Simtec Electronics
+ * Copyright 2004-2005 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
#include <asm/dma.h>
#include <mach/hardware.h>
#include <mach/dma.h>
-#include <mach/audio.h>
+#include <plat/audio.h>
#include "s3c24xx-pcm.h"
-#define S3C24XX_PCM_DEBUG 0
-#if S3C24XX_PCM_DEBUG
-#define DBG(x...) printk(KERN_DEBUG "s3c24xx-pcm: " x)
-#else
-#define DBG(x...)
-#endif
-
static const struct snd_pcm_hardware s3c24xx_pcm_hardware = {
.info = SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
dma_addr_t pos = prtd->dma_pos;
int ret;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
while (prtd->dma_loaded < prtd->dma_limit) {
unsigned long len = prtd->dma_period;
- DBG("dma_loaded: %d\n", prtd->dma_loaded);
+ pr_debug("dma_loaded: %d\n", prtd->dma_loaded);
if ((pos + len) > prtd->dma_end) {
len = prtd->dma_end - pos;
- DBG(KERN_DEBUG "%s: corrected dma len %ld\n",
+ pr_debug(KERN_DEBUG "%s: corrected dma len %ld\n",
__func__, len);
}
struct snd_pcm_substream *substream = dev_id;
struct s3c24xx_runtime_data *prtd;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
if (result == S3C2410_RES_ABORT || result == S3C2410_RES_ERR)
return;
unsigned long totbytes = params_buffer_bytes(params);
int ret = 0;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
/* return if this is a bufferless transfer e.g.
* codec <--> BT codec or GSM modem -- lg FIXME */
/* prepare DMA */
prtd->params = dma;
- DBG("params %p, client %p, channel %d\n", prtd->params,
+ pr_debug("params %p, client %p, channel %d\n", prtd->params,
prtd->params->client, prtd->params->channel);
ret = s3c2410_dma_request(prtd->params->channel,
prtd->params->client, NULL);
if (ret < 0) {
- DBG(KERN_ERR "failed to get dma channel\n");
+ printk(KERN_ERR "failed to get dma channel\n");
return ret;
}
}
{
struct s3c24xx_runtime_data *prtd = substream->runtime->private_data;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
/* TODO - do we need to ensure DMA flushed */
snd_pcm_set_runtime_buffer(substream, NULL);
struct s3c24xx_runtime_data *prtd = substream->runtime->private_data;
int ret = 0;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
/* return if this is a bufferless transfer e.g.
* codec <--> BT codec or GSM modem -- lg FIXME */
struct s3c24xx_runtime_data *prtd = substream->runtime->private_data;
int ret = 0;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
spin_lock(&prtd->lock);
unsigned long res;
dma_addr_t src, dst;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
spin_lock(&prtd->lock);
s3c2410_dma_getposition(prtd->params->channel, &src, &dst);
spin_unlock(&prtd->lock);
- DBG("Pointer %x %x\n", src, dst);
+ pr_debug("Pointer %x %x\n", src, dst);
/* we seem to be getting the odd error from the pcm library due
* to out-of-bounds pointers. this is maybe due to the dma engine
struct snd_pcm_runtime *runtime = substream->runtime;
struct s3c24xx_runtime_data *prtd;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
snd_soc_set_runtime_hwparams(substream, &s3c24xx_pcm_hardware);
struct snd_pcm_runtime *runtime = substream->runtime;
struct s3c24xx_runtime_data *prtd = runtime->private_data;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
if (!prtd)
- DBG("s3c24xx_pcm_close called with prtd == NULL\n");
+ pr_debug("s3c24xx_pcm_close called with prtd == NULL\n");
kfree(prtd);
{
struct snd_pcm_runtime *runtime = substream->runtime;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
return dma_mmap_writecombine(substream->pcm->card->dev, vma,
runtime->dma_area,
struct snd_dma_buffer *buf = &substream->dma_buffer;
size_t size = s3c24xx_pcm_hardware.buffer_bytes_max;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
buf->dev.type = SNDRV_DMA_TYPE_DEV;
buf->dev.dev = pcm->card->dev;
struct snd_dma_buffer *buf;
int stream;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
for (stream = 0; stream < 2; stream++) {
substream = pcm->streams[stream].substream;
{
int ret = 0;
- DBG("Entered %s\n", __func__);
+ pr_debug("Entered %s\n", __func__);
if (!card->dev->dma_mask)
card->dev->dma_mask = &s3c24xx_pcm_dmamask;
#include <sound/s3c24xx_uda134x.h>
#include <sound/uda134x.h>
-#include <asm/plat-s3c24xx/regs-iis.h>
+#include <plat/regs-iis.h>
#include "s3c24xx-pcm.h"
#include "s3c24xx-i2s.h"
--- /dev/null
+/* sound/soc/s3c24xx/s3c64xx-i2s.c
+ *
+ * ALSA SoC Audio Layer - S3C64XX I2S driver
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>
+ * http://armlinux.simtec.co.uk/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <linux/io.h>
+
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/initval.h>
+#include <sound/soc.h>
+
+#include <plat/regs-s3c2412-iis.h>
+#include <plat/gpio-bank-d.h>
+#include <plat/gpio-bank-e.h>
+#include <plat/gpio-cfg.h>
+#include <plat/audio.h>
+
+#include <mach/map.h>
+#include <mach/dma.h>
+
+#include "s3c24xx-pcm.h"
+#include "s3c64xx-i2s.h"
+
+static struct s3c2410_dma_client s3c64xx_dma_client_out = {
+ .name = "I2S PCM Stereo out"
+};
+
+static struct s3c2410_dma_client s3c64xx_dma_client_in = {
+ .name = "I2S PCM Stereo in"
+};
+
+static struct s3c24xx_pcm_dma_params s3c64xx_i2s_pcm_stereo_out[2] = {
+ [0] = {
+ .channel = DMACH_I2S0_OUT,
+ .client = &s3c64xx_dma_client_out,
+ .dma_addr = S3C64XX_PA_IIS0 + S3C2412_IISTXD,
+ .dma_size = 4,
+ },
+ [1] = {
+ .channel = DMACH_I2S1_OUT,
+ .client = &s3c64xx_dma_client_out,
+ .dma_addr = S3C64XX_PA_IIS1 + S3C2412_IISTXD,
+ .dma_size = 4,
+ },
+};
+
+static struct s3c24xx_pcm_dma_params s3c64xx_i2s_pcm_stereo_in[2] = {
+ [0] = {
+ .channel = DMACH_I2S0_IN,
+ .client = &s3c64xx_dma_client_in,
+ .dma_addr = S3C64XX_PA_IIS0 + S3C2412_IISRXD,
+ .dma_size = 4,
+ },
+ [1] = {
+ .channel = DMACH_I2S1_IN,
+ .client = &s3c64xx_dma_client_in,
+ .dma_addr = S3C64XX_PA_IIS1 + S3C2412_IISRXD,
+ .dma_size = 4,
+ },
+};
+
+static struct s3c_i2sv2_info s3c64xx_i2s[2];
+
+static inline struct s3c_i2sv2_info *to_info(struct snd_soc_dai *cpu_dai)
+{
+ return cpu_dai->private_data;
+}
+
+static int s3c64xx_i2s_set_sysclk(struct snd_soc_dai *cpu_dai,
+ int clk_id, unsigned int freq, int dir)
+{
+ struct s3c_i2sv2_info *i2s = to_info(cpu_dai);
+ u32 iismod = readl(i2s->regs + S3C2412_IISMOD);
+
+ switch (clk_id) {
+ case S3C64XX_CLKSRC_PCLK:
+ iismod &= ~S3C64XX_IISMOD_IMS_SYSMUX;
+ break;
+
+ case S3C64XX_CLKSRC_MUX:
+ iismod |= S3C64XX_IISMOD_IMS_SYSMUX;
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ writel(iismod, i2s->regs + S3C2412_IISMOD);
+
+ return 0;
+}
+
+
+unsigned long s3c64xx_i2s_get_clockrate(struct snd_soc_dai *dai)
+{
+ struct s3c_i2sv2_info *i2s = to_info(dai);
+
+ return clk_get_rate(i2s->iis_cclk);
+}
+EXPORT_SYMBOL_GPL(s3c64xx_i2s_get_clockrate);
+
+static int s3c64xx_i2s_probe(struct platform_device *pdev,
+ struct snd_soc_dai *dai)
+{
+ struct device *dev = &pdev->dev;
+ struct s3c_i2sv2_info *i2s;
+ int ret;
+
+ dev_dbg(dev, "%s: probing dai %d\n", __func__, pdev->id);
+
+ if (pdev->id < 0 || pdev->id > ARRAY_SIZE(s3c64xx_i2s)) {
+ dev_err(dev, "id %d out of range\n", pdev->id);
+ return -EINVAL;
+ }
+
+ i2s = &s3c64xx_i2s[pdev->id];
+
+ ret = s3c_i2sv2_probe(pdev, dai, i2s,
+ pdev->id ? S3C64XX_PA_IIS1 : S3C64XX_PA_IIS0);
+ if (ret)
+ return ret;
+
+ i2s->dma_capture = &s3c64xx_i2s_pcm_stereo_in[pdev->id];
+ i2s->dma_playback = &s3c64xx_i2s_pcm_stereo_out[pdev->id];
+
+ i2s->iis_cclk = clk_get(dev, "audio-bus");
+ if (IS_ERR(i2s->iis_cclk)) {
+ dev_err(dev, "failed to get audio-bus");
+ iounmap(i2s->regs);
+ return -ENODEV;
+ }
+
+ /* configure GPIO for i2s port */
+ switch (pdev->id) {
+ case 0:
+ s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_I2S0_CLK);
+ s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_I2S0_CDCLK);
+ s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_I2S0_LRCLK);
+ s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_I2S0_DI);
+ s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_I2S0_D0);
+ break;
+ case 1:
+ s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_I2S1_CLK);
+ s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_I2S1_CDCLK);
+ s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_I2S1_LRCLK);
+ s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_I2S1_DI);
+ s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_I2S1_D0);
+ }
+
+ return 0;
+}
+
+
+#define S3C64XX_I2S_RATES \
+ (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \
+ SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
+ SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
+
+#define S3C64XX_I2S_FMTS \
+ (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE)
+
+static struct snd_soc_dai_ops s3c64xx_i2s_dai_ops = {
+ .set_sysclk = s3c64xx_i2s_set_sysclk,
+};
+
+struct snd_soc_dai s3c64xx_i2s_dai = {
+ .name = "s3c64xx-i2s",
+ .id = 0,
+ .probe = s3c64xx_i2s_probe,
+ .playback = {
+ .channels_min = 2,
+ .channels_max = 2,
+ .rates = S3C64XX_I2S_RATES,
+ .formats = S3C64XX_I2S_FMTS,
+ },
+ .capture = {
+ .channels_min = 2,
+ .channels_max = 2,
+ .rates = S3C64XX_I2S_RATES,
+ .formats = S3C64XX_I2S_FMTS,
+ },
+ .ops = &s3c64xx_i2s_dai_ops,
+};
+EXPORT_SYMBOL_GPL(s3c64xx_i2s_dai);
+
+static int __init s3c64xx_i2s_init(void)
+{
+ return s3c_i2sv2_register_dai(&s3c64xx_i2s_dai);
+}
+module_init(s3c64xx_i2s_init);
+
+static void __exit s3c64xx_i2s_exit(void)
+{
+ snd_soc_unregister_dai(&s3c64xx_i2s_dai);
+}
+module_exit(s3c64xx_i2s_exit);
+
+/* Module information */
+MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
+MODULE_DESCRIPTION("S3C64XX I2S SoC Interface");
+MODULE_LICENSE("GPL");
+
+
+
--- /dev/null
+/* sound/soc/s3c24xx/s3c64xx-i2s.h
+ *
+ * ALSA SoC Audio Layer - S3C64XX I2S driver
+ *
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>
+ * http://armlinux.simtec.co.uk/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __SND_SOC_S3C24XX_S3C64XX_I2S_H
+#define __SND_SOC_S3C24XX_S3C64XX_I2S_H __FILE__
+
+#include "s3c-i2s-v2.h"
+
+#define S3C64XX_DIV_BCLK S3C_I2SV2_DIV_BCLK
+#define S3C64XX_DIV_RCLK S3C_I2SV2_DIV_RCLK
+#define S3C64XX_DIV_PRESCALER S3C_I2SV2_DIV_PRESCALER
+
+#define S3C64XX_CLKSRC_PCLK (0)
+#define S3C64XX_CLKSRC_MUX (1)
+
+extern struct snd_soc_dai s3c64xx_i2s_dai;
+
+extern unsigned long s3c64xx_i2s_get_clockrate(struct snd_soc_dai *cpu_dai);
+
+#endif /* __SND_SOC_S3C24XX_S3C64XX_I2S_H */
#define AC97_FMTS \
SNDRV_PCM_FMTBIT_S16_LE
+static struct snd_soc_dai_ops hac_dai_ops = {
+ .hw_params = hac_hw_params,
+};
+
struct snd_soc_dai sh4_hac_dai[] = {
{
.name = "HAC0",
.channels_min = 2,
.channels_max = 2,
},
- .ops = {
- .hw_params = hac_hw_params,
- },
+ .ops = &hac_dai_ops,
},
#ifdef CONFIG_CPU_SUBTYPE_SH7760
{
.channels_min = 2,
.channels_max = 2,
},
- .ops = {
- .hw_params = hac_hw_params,
- },
+ .ops = &hac_dai_ops,
},
#endif
SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_U24_3LE | \
SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_U32_LE)
+static struct snd_soc_dai_ops ssi_dai_ops = {
+ .startup = ssi_startup,
+ .shutdown = ssi_shutdown,
+ .trigger = ssi_trigger,
+ .hw_params = ssi_hw_params,
+ .set_sysclk = ssi_set_sysclk,
+ .set_clkdiv = ssi_set_clkdiv,
+ .set_fmt = ssi_set_fmt,
+};
+
struct snd_soc_dai sh4_ssi_dai[] = {
{
.name = "SSI0",
.channels_min = 2,
.channels_max = 8,
},
- .ops = {
- .startup = ssi_startup,
- .shutdown = ssi_shutdown,
- .trigger = ssi_trigger,
- .hw_params = ssi_hw_params,
- .set_sysclk = ssi_set_sysclk,
- .set_clkdiv = ssi_set_clkdiv,
- .set_fmt = ssi_set_fmt,
- },
+ .ops = &ssi_dai_ops,
},
#ifdef CONFIG_CPU_SUBTYPE_SH7760
{
.channels_min = 2,
.channels_max = 8,
},
- .ops = {
- .startup = ssi_startup,
- .shutdown = ssi_shutdown,
- .trigger = ssi_trigger,
- .hw_params = ssi_hw_params,
- .set_sysclk = ssi_set_sysclk,
- .set_clkdiv = ssi_set_clkdiv,
- .set_fmt = ssi_set_fmt,
- },
+ .ops = &ssi_dai_ops,
},
#endif
};
mutex_lock(&pcm_mutex);
/* startup the audio subsystem */
- if (cpu_dai->ops.startup) {
- ret = cpu_dai->ops.startup(substream, cpu_dai);
+ if (cpu_dai->ops->startup) {
+ ret = cpu_dai->ops->startup(substream, cpu_dai);
if (ret < 0) {
printk(KERN_ERR "asoc: can't open interface %s\n",
cpu_dai->name);
}
}
- if (codec_dai->ops.startup) {
- ret = codec_dai->ops.startup(substream, codec_dai);
+ if (codec_dai->ops->startup) {
+ ret = codec_dai->ops->startup(substream, codec_dai);
if (ret < 0) {
printk(KERN_ERR "asoc: can't open codec %s\n",
codec_dai->name);
cpu_dai->capture.active = codec_dai->capture.active = 1;
cpu_dai->active = codec_dai->active = 1;
cpu_dai->runtime = runtime;
- socdev->codec->active++;
+ card->codec->active++;
mutex_unlock(&pcm_mutex);
return 0;
platform->pcm_ops->close(substream);
platform_err:
- if (cpu_dai->ops.shutdown)
- cpu_dai->ops.shutdown(substream, cpu_dai);
+ if (cpu_dai->ops->shutdown)
+ cpu_dai->ops->shutdown(substream, cpu_dai);
out:
mutex_unlock(&pcm_mutex);
return ret;
struct snd_soc_card *card = container_of(work, struct snd_soc_card,
delayed_work.work);
struct snd_soc_device *socdev = card->socdev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = card->codec;
struct snd_soc_dai *codec_dai;
int i;
struct snd_soc_platform *platform = card->platform;
struct snd_soc_dai *cpu_dai = machine->cpu_dai;
struct snd_soc_dai *codec_dai = machine->codec_dai;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = card->codec;
mutex_lock(&pcm_mutex);
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
snd_soc_dai_digital_mute(codec_dai, 1);
- if (cpu_dai->ops.shutdown)
- cpu_dai->ops.shutdown(substream, cpu_dai);
+ if (cpu_dai->ops->shutdown)
+ cpu_dai->ops->shutdown(substream, cpu_dai);
- if (codec_dai->ops.shutdown)
- codec_dai->ops.shutdown(substream, codec_dai);
+ if (codec_dai->ops->shutdown)
+ codec_dai->ops->shutdown(substream, codec_dai);
if (machine->ops && machine->ops->shutdown)
machine->ops->shutdown(substream);
struct snd_soc_platform *platform = card->platform;
struct snd_soc_dai *cpu_dai = machine->cpu_dai;
struct snd_soc_dai *codec_dai = machine->codec_dai;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = card->codec;
int ret = 0;
mutex_lock(&pcm_mutex);
}
}
- if (codec_dai->ops.prepare) {
- ret = codec_dai->ops.prepare(substream, codec_dai);
+ if (codec_dai->ops->prepare) {
+ ret = codec_dai->ops->prepare(substream, codec_dai);
if (ret < 0) {
printk(KERN_ERR "asoc: codec DAI prepare error\n");
goto out;
}
}
- if (cpu_dai->ops.prepare) {
- ret = cpu_dai->ops.prepare(substream, cpu_dai);
+ if (cpu_dai->ops->prepare) {
+ ret = cpu_dai->ops->prepare(substream, cpu_dai);
if (ret < 0) {
printk(KERN_ERR "asoc: cpu DAI prepare error\n");
goto out;
}
}
- if (codec_dai->ops.hw_params) {
- ret = codec_dai->ops.hw_params(substream, params, codec_dai);
+ if (codec_dai->ops->hw_params) {
+ ret = codec_dai->ops->hw_params(substream, params, codec_dai);
if (ret < 0) {
printk(KERN_ERR "asoc: can't set codec %s hw params\n",
codec_dai->name);
}
}
- if (cpu_dai->ops.hw_params) {
- ret = cpu_dai->ops.hw_params(substream, params, cpu_dai);
+ if (cpu_dai->ops->hw_params) {
+ ret = cpu_dai->ops->hw_params(substream, params, cpu_dai);
if (ret < 0) {
printk(KERN_ERR "asoc: interface %s hw params failed\n",
cpu_dai->name);
return ret;
platform_err:
- if (cpu_dai->ops.hw_free)
- cpu_dai->ops.hw_free(substream, cpu_dai);
+ if (cpu_dai->ops->hw_free)
+ cpu_dai->ops->hw_free(substream, cpu_dai);
interface_err:
- if (codec_dai->ops.hw_free)
- codec_dai->ops.hw_free(substream, codec_dai);
+ if (codec_dai->ops->hw_free)
+ codec_dai->ops->hw_free(substream, codec_dai);
codec_err:
if (machine->ops && machine->ops->hw_free)
struct snd_soc_platform *platform = card->platform;
struct snd_soc_dai *cpu_dai = machine->cpu_dai;
struct snd_soc_dai *codec_dai = machine->codec_dai;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = card->codec;
mutex_lock(&pcm_mutex);
platform->pcm_ops->hw_free(substream);
/* now free hw params for the DAI's */
- if (codec_dai->ops.hw_free)
- codec_dai->ops.hw_free(substream, codec_dai);
+ if (codec_dai->ops->hw_free)
+ codec_dai->ops->hw_free(substream, codec_dai);
- if (cpu_dai->ops.hw_free)
- cpu_dai->ops.hw_free(substream, cpu_dai);
+ if (cpu_dai->ops->hw_free)
+ cpu_dai->ops->hw_free(substream, cpu_dai);
mutex_unlock(&pcm_mutex);
return 0;
struct snd_soc_dai *codec_dai = machine->codec_dai;
int ret;
- if (codec_dai->ops.trigger) {
- ret = codec_dai->ops.trigger(substream, cmd, codec_dai);
+ if (codec_dai->ops->trigger) {
+ ret = codec_dai->ops->trigger(substream, cmd, codec_dai);
if (ret < 0)
return ret;
}
return ret;
}
- if (cpu_dai->ops.trigger) {
- ret = cpu_dai->ops.trigger(substream, cmd, cpu_dai);
+ if (cpu_dai->ops->trigger) {
+ ret = cpu_dai->ops->trigger(substream, cmd, cpu_dai);
if (ret < 0)
return ret;
}
struct snd_soc_card *card = socdev->card;
struct snd_soc_platform *platform = card->platform;
struct snd_soc_codec_device *codec_dev = socdev->codec_dev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = card->codec;
int i;
/* Due to the resume being scheduled into a workqueue we could
/* mute any active DAC's */
for (i = 0; i < card->num_links; i++) {
struct snd_soc_dai *dai = card->dai_link[i].codec_dai;
- if (dai->ops.digital_mute && dai->playback.active)
- dai->ops.digital_mute(dai, 1);
+ if (dai->ops->digital_mute && dai->playback.active)
+ dai->ops->digital_mute(dai, 1);
}
/* suspend all pcms */
struct snd_soc_device *socdev = card->socdev;
struct snd_soc_platform *platform = card->platform;
struct snd_soc_codec_device *codec_dev = socdev->codec_dev;
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = card->codec;
struct platform_device *pdev = to_platform_device(socdev->dev);
int i;
/* unmute any active DACs */
for (i = 0; i < card->num_links; i++) {
struct snd_soc_dai *dai = card->dai_link[i].codec_dai;
- if (dai->ops.digital_mute && dai->playback.active)
- dai->ops.digital_mute(dai, 0);
+ if (dai->ops->digital_mute && dai->playback.active)
+ dai->ops->digital_mute(dai, 0);
}
for (i = 0; i < card->num_links; i++) {
static int soc_new_pcm(struct snd_soc_device *socdev,
struct snd_soc_dai_link *dai_link, int num)
{
- struct snd_soc_codec *codec = socdev->codec;
struct snd_soc_card *card = socdev->card;
+ struct snd_soc_codec *codec = card->codec;
struct snd_soc_platform *platform = card->platform;
struct snd_soc_dai *codec_dai = dai_link->codec_dai;
struct snd_soc_dai *cpu_dai = dai_link->cpu_dai;
rtd->dai = dai_link;
rtd->socdev = socdev;
- codec_dai->codec = socdev->codec;
+ codec_dai->codec = card->codec;
/* check client and interface hw capabilities */
sprintf(new_name, "%s %s-%d", dai_link->stream_name, codec_dai->name,
}
/* codec register dump */
-static ssize_t soc_codec_reg_show(struct snd_soc_device *devdata, char *buf)
+static ssize_t soc_codec_reg_show(struct snd_soc_codec *codec, char *buf)
{
- struct snd_soc_codec *codec = devdata->codec;
int i, step = 1, count = 0;
if (!codec->reg_cache_size)
struct device_attribute *attr, char *buf)
{
struct snd_soc_device *devdata = dev_get_drvdata(dev);
- return soc_codec_reg_show(devdata, buf);
+ return soc_codec_reg_show(devdata->card->codec, buf);
}
static DEVICE_ATTR(codec_reg, 0444, codec_reg_show, NULL);
{
ssize_t ret;
struct snd_soc_codec *codec = file->private_data;
- struct device *card_dev = codec->card->dev;
- struct snd_soc_device *devdata = card_dev->driver_data;
char *buf = kmalloc(PAGE_SIZE, GFP_KERNEL);
if (!buf)
return -ENOMEM;
- ret = soc_codec_reg_show(devdata, buf);
+ ret = soc_codec_reg_show(codec, buf);
if (ret >= 0)
ret = simple_read_from_buffer(user_buf, count, ppos, buf, ret);
kfree(buf);
*/
int snd_soc_new_pcms(struct snd_soc_device *socdev, int idx, const char *xid)
{
- struct snd_soc_codec *codec = socdev->codec;
struct snd_soc_card *card = socdev->card;
- int ret = 0, i;
+ struct snd_soc_codec *codec = card->codec;
+ int ret, i;
mutex_lock(&codec->mutex);
/* register a sound card */
- codec->card = snd_card_new(idx, xid, codec->owner, 0);
- if (!codec->card) {
+ ret = snd_card_create(idx, xid, codec->owner, 0, &codec->card);
+ if (ret < 0) {
printk(KERN_ERR "asoc: can't create sound card for codec %s\n",
codec->name);
mutex_unlock(&codec->mutex);
- return -ENODEV;
+ return ret;
}
codec->card->dev = socdev->dev;
*/
int snd_soc_init_card(struct snd_soc_device *socdev)
{
- struct snd_soc_codec *codec = socdev->codec;
struct snd_soc_card *card = socdev->card;
+ struct snd_soc_codec *codec = card->codec;
int ret = 0, i, ac97 = 0, err = 0;
for (i = 0; i < card->num_links; i++) {
if (err < 0)
printk(KERN_WARNING "asoc: failed to add codec sysfs files\n");
- soc_init_codec_debugfs(socdev->codec);
+ soc_init_codec_debugfs(codec);
mutex_unlock(&codec->mutex);
out:
*/
void snd_soc_free_pcms(struct snd_soc_device *socdev)
{
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
#ifdef CONFIG_SND_SOC_AC97_BUS
struct snd_soc_dai *codec_dai;
int i;
#endif
mutex_lock(&codec->mutex);
- soc_cleanup_codec_debugfs(socdev->codec);
+ soc_cleanup_codec_debugfs(codec);
#ifdef CONFIG_SND_SOC_AC97_BUS
for (i = 0; i < codec->num_dai; i++) {
codec_dai = &codec->dai[i];
- if (codec_dai->ac97_control && codec->ac97) {
+ if (codec_dai->ac97_control && codec->ac97 &&
+ strcmp(codec->name, "AC97") != 0) {
soc_ac97_dev_unregister(codec);
goto free_card;
}
}
EXPORT_SYMBOL_GPL(snd_soc_cnew);
+/**
+ * snd_soc_add_controls - add an array of controls to a codec.
+ * Convienience function to add a list of controls. Many codecs were
+ * duplicating this code.
+ *
+ * @codec: codec to add controls to
+ * @controls: array of controls to add
+ * @num_controls: number of elements in the array
+ *
+ * Return 0 for success, else error.
+ */
+int snd_soc_add_controls(struct snd_soc_codec *codec,
+ const struct snd_kcontrol_new *controls, int num_controls)
+{
+ struct snd_card *card = codec->card;
+ int err, i;
+
+ for (i = 0; i < num_controls; i++) {
+ const struct snd_kcontrol_new *control = &controls[i];
+ err = snd_ctl_add(card, snd_soc_cnew(control, codec, NULL));
+ if (err < 0) {
+ dev_err(codec->dev, "%s: Failed to add %s\n",
+ codec->name, control->name);
+ return err;
+ }
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(snd_soc_add_controls);
+
/**
* snd_soc_info_enum_double - enumerated double mixer info callback
* @kcontrol: mixer control
int snd_soc_dai_set_sysclk(struct snd_soc_dai *dai, int clk_id,
unsigned int freq, int dir)
{
- if (dai->ops.set_sysclk)
- return dai->ops.set_sysclk(dai, clk_id, freq, dir);
+ if (dai->ops->set_sysclk)
+ return dai->ops->set_sysclk(dai, clk_id, freq, dir);
else
return -EINVAL;
}
int snd_soc_dai_set_clkdiv(struct snd_soc_dai *dai,
int div_id, int div)
{
- if (dai->ops.set_clkdiv)
- return dai->ops.set_clkdiv(dai, div_id, div);
+ if (dai->ops->set_clkdiv)
+ return dai->ops->set_clkdiv(dai, div_id, div);
else
return -EINVAL;
}
int snd_soc_dai_set_pll(struct snd_soc_dai *dai,
int pll_id, unsigned int freq_in, unsigned int freq_out)
{
- if (dai->ops.set_pll)
- return dai->ops.set_pll(dai, pll_id, freq_in, freq_out);
+ if (dai->ops->set_pll)
+ return dai->ops->set_pll(dai, pll_id, freq_in, freq_out);
else
return -EINVAL;
}
*/
int snd_soc_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
{
- if (dai->ops.set_fmt)
- return dai->ops.set_fmt(dai, fmt);
+ if (dai->ops->set_fmt)
+ return dai->ops->set_fmt(dai, fmt);
else
return -EINVAL;
}
int snd_soc_dai_set_tdm_slot(struct snd_soc_dai *dai,
unsigned int mask, int slots)
{
- if (dai->ops.set_sysclk)
- return dai->ops.set_tdm_slot(dai, mask, slots);
+ if (dai->ops->set_sysclk)
+ return dai->ops->set_tdm_slot(dai, mask, slots);
else
return -EINVAL;
}
*/
int snd_soc_dai_set_tristate(struct snd_soc_dai *dai, int tristate)
{
- if (dai->ops.set_sysclk)
- return dai->ops.set_tristate(dai, tristate);
+ if (dai->ops->set_sysclk)
+ return dai->ops->set_tristate(dai, tristate);
else
return -EINVAL;
}
*/
int snd_soc_dai_digital_mute(struct snd_soc_dai *dai, int mute)
{
- if (dai->ops.digital_mute)
- return dai->ops.digital_mute(dai, mute);
+ if (dai->ops->digital_mute)
+ return dai->ops->digital_mute(dai, mute);
else
return -EINVAL;
}
return 0;
}
+static struct snd_soc_dai_ops null_dai_ops = {
+};
+
/**
* snd_soc_register_dai - Register a DAI with the ASoC core
*
if (!dai->dev)
printk(KERN_WARNING "No device for DAI %s\n", dai->name);
+ if (!dai->ops)
+ dai->ops = &null_dai_ops;
+
INIT_LIST_HEAD(&dai->list);
mutex_lock(&client_mutex);
static int dapm_up_seq[] = {
snd_soc_dapm_pre, snd_soc_dapm_micbias, snd_soc_dapm_mic,
snd_soc_dapm_mux, snd_soc_dapm_value_mux, snd_soc_dapm_dac,
- snd_soc_dapm_mixer, snd_soc_dapm_pga, snd_soc_dapm_adc, snd_soc_dapm_hp,
- snd_soc_dapm_spk, snd_soc_dapm_post
+ snd_soc_dapm_mixer, snd_soc_dapm_mixer_named_ctl, snd_soc_dapm_pga,
+ snd_soc_dapm_adc, snd_soc_dapm_hp, snd_soc_dapm_spk, snd_soc_dapm_post
};
+
static int dapm_down_seq[] = {
snd_soc_dapm_pre, snd_soc_dapm_adc, snd_soc_dapm_hp, snd_soc_dapm_spk,
- snd_soc_dapm_pga, snd_soc_dapm_mixer, snd_soc_dapm_dac, snd_soc_dapm_mic,
- snd_soc_dapm_micbias, snd_soc_dapm_mux, snd_soc_dapm_value_mux,
- snd_soc_dapm_post
+ snd_soc_dapm_pga, snd_soc_dapm_mixer_named_ctl, snd_soc_dapm_mixer,
+ snd_soc_dapm_dac, snd_soc_dapm_mic, snd_soc_dapm_micbias,
+ snd_soc_dapm_mux, snd_soc_dapm_value_mux, snd_soc_dapm_post
};
static int dapm_status = 1;
{
switch (w->id) {
case snd_soc_dapm_switch:
- case snd_soc_dapm_mixer: {
+ case snd_soc_dapm_mixer:
+ case snd_soc_dapm_mixer_named_ctl: {
int val;
struct soc_mixer_control *mc = (struct soc_mixer_control *)
w->kcontrols[i].private_value;
if (path->name != (char*)w->kcontrols[i].name)
continue;
- /* add dapm control with long name */
- name_len = 2 + strlen(w->name)
- + strlen(w->kcontrols[i].name);
+ /* add dapm control with long name.
+ * for dapm_mixer this is the concatenation of the
+ * mixer and kcontrol name.
+ * for dapm_mixer_named_ctl this is simply the
+ * kcontrol name.
+ */
+ name_len = strlen(w->kcontrols[i].name) + 1;
+ if (w->id != snd_soc_dapm_mixer_named_ctl)
+ name_len += 1 + strlen(w->name);
+
path->long_name = kmalloc(name_len, GFP_KERNEL);
+
if (path->long_name == NULL)
return -ENOMEM;
- snprintf(path->long_name, name_len, "%s %s",
- w->name, w->kcontrols[i].name);
+ switch (w->id) {
+ default:
+ snprintf(path->long_name, name_len, "%s %s",
+ w->name, w->kcontrols[i].name);
+ break;
+ case snd_soc_dapm_mixer_named_ctl:
+ snprintf(path->long_name, name_len, "%s",
+ w->kcontrols[i].name);
+ break;
+ }
+
path->long_name[name_len - 1] = '\0';
path->kcontrol = snd_soc_cnew(&w->kcontrols[i], w,
}
EXPORT_SYMBOL_GPL(dapm_reg_event);
+/*
+ * Scan a single DAPM widget for a complete audio path and update the
+ * power status appropriately.
+ */
+static int dapm_power_widget(struct snd_soc_codec *codec, int event,
+ struct snd_soc_dapm_widget *w)
+{
+ int in, out, power_change, power, ret;
+
+ /* vmid - no action */
+ if (w->id == snd_soc_dapm_vmid)
+ return 0;
+
+ /* active ADC */
+ if (w->id == snd_soc_dapm_adc && w->active) {
+ in = is_connected_input_ep(w);
+ dapm_clear_walk(w->codec);
+ w->power = (in != 0) ? 1 : 0;
+ dapm_update_bits(w);
+ return 0;
+ }
+
+ /* active DAC */
+ if (w->id == snd_soc_dapm_dac && w->active) {
+ out = is_connected_output_ep(w);
+ dapm_clear_walk(w->codec);
+ w->power = (out != 0) ? 1 : 0;
+ dapm_update_bits(w);
+ return 0;
+ }
+
+ /* pre and post event widgets */
+ if (w->id == snd_soc_dapm_pre) {
+ if (!w->event)
+ return 0;
+
+ if (event == SND_SOC_DAPM_STREAM_START) {
+ ret = w->event(w,
+ NULL, SND_SOC_DAPM_PRE_PMU);
+ if (ret < 0)
+ return ret;
+ } else if (event == SND_SOC_DAPM_STREAM_STOP) {
+ ret = w->event(w,
+ NULL, SND_SOC_DAPM_PRE_PMD);
+ if (ret < 0)
+ return ret;
+ }
+ return 0;
+ }
+ if (w->id == snd_soc_dapm_post) {
+ if (!w->event)
+ return 0;
+
+ if (event == SND_SOC_DAPM_STREAM_START) {
+ ret = w->event(w,
+ NULL, SND_SOC_DAPM_POST_PMU);
+ if (ret < 0)
+ return ret;
+ } else if (event == SND_SOC_DAPM_STREAM_STOP) {
+ ret = w->event(w,
+ NULL, SND_SOC_DAPM_POST_PMD);
+ if (ret < 0)
+ return ret;
+ }
+ return 0;
+ }
+
+ /* all other widgets */
+ in = is_connected_input_ep(w);
+ dapm_clear_walk(w->codec);
+ out = is_connected_output_ep(w);
+ dapm_clear_walk(w->codec);
+ power = (out != 0 && in != 0) ? 1 : 0;
+ power_change = (w->power == power) ? 0 : 1;
+ w->power = power;
+
+ if (!power_change)
+ return 0;
+
+ /* call any power change event handlers */
+ if (w->event)
+ pr_debug("power %s event for %s flags %x\n",
+ w->power ? "on" : "off",
+ w->name, w->event_flags);
+
+ /* power up pre event */
+ if (power && w->event &&
+ (w->event_flags & SND_SOC_DAPM_PRE_PMU)) {
+ ret = w->event(w, NULL, SND_SOC_DAPM_PRE_PMU);
+ if (ret < 0)
+ return ret;
+ }
+
+ /* power down pre event */
+ if (!power && w->event &&
+ (w->event_flags & SND_SOC_DAPM_PRE_PMD)) {
+ ret = w->event(w, NULL, SND_SOC_DAPM_PRE_PMD);
+ if (ret < 0)
+ return ret;
+ }
+
+ /* Lower PGA volume to reduce pops */
+ if (w->id == snd_soc_dapm_pga && !power)
+ dapm_set_pga(w, power);
+
+ dapm_update_bits(w);
+
+ /* Raise PGA volume to reduce pops */
+ if (w->id == snd_soc_dapm_pga && power)
+ dapm_set_pga(w, power);
+
+ /* power up post event */
+ if (power && w->event &&
+ (w->event_flags & SND_SOC_DAPM_POST_PMU)) {
+ ret = w->event(w,
+ NULL, SND_SOC_DAPM_POST_PMU);
+ if (ret < 0)
+ return ret;
+ }
+
+ /* power down post event */
+ if (!power && w->event &&
+ (w->event_flags & SND_SOC_DAPM_POST_PMD)) {
+ ret = w->event(w, NULL, SND_SOC_DAPM_POST_PMD);
+ if (ret < 0)
+ return ret;
+ }
+
+ return 0;
+}
+
/*
* Scan each dapm widget for complete audio path.
* A complete path is a route that has valid endpoints i.e.:-
static int dapm_power_widgets(struct snd_soc_codec *codec, int event)
{
struct snd_soc_dapm_widget *w;
- int in, out, i, c = 1, *seq = NULL, ret = 0, power_change, power;
+ int i, c = 1, *seq = NULL, ret = 0;
/* do we have a sequenced stream event */
if (event == SND_SOC_DAPM_STREAM_START) {
seq = dapm_down_seq;
}
- for(i = 0; i < c; i++) {
+ for (i = 0; i < c; i++) {
list_for_each_entry(w, &codec->dapm_widgets, list) {
/* is widget in stream order */
if (seq && seq[i] && w->id != seq[i])
continue;
- /* vmid - no action */
- if (w->id == snd_soc_dapm_vmid)
- continue;
-
- /* active ADC */
- if (w->id == snd_soc_dapm_adc && w->active) {
- in = is_connected_input_ep(w);
- dapm_clear_walk(w->codec);
- w->power = (in != 0) ? 1 : 0;
- dapm_update_bits(w);
- continue;
- }
-
- /* active DAC */
- if (w->id == snd_soc_dapm_dac && w->active) {
- out = is_connected_output_ep(w);
- dapm_clear_walk(w->codec);
- w->power = (out != 0) ? 1 : 0;
- dapm_update_bits(w);
- continue;
- }
-
- /* pre and post event widgets */
- if (w->id == snd_soc_dapm_pre) {
- if (!w->event)
- continue;
-
- if (event == SND_SOC_DAPM_STREAM_START) {
- ret = w->event(w,
- NULL, SND_SOC_DAPM_PRE_PMU);
- if (ret < 0)
- return ret;
- } else if (event == SND_SOC_DAPM_STREAM_STOP) {
- ret = w->event(w,
- NULL, SND_SOC_DAPM_PRE_PMD);
- if (ret < 0)
- return ret;
- }
- continue;
- }
- if (w->id == snd_soc_dapm_post) {
- if (!w->event)
- continue;
-
- if (event == SND_SOC_DAPM_STREAM_START) {
- ret = w->event(w,
- NULL, SND_SOC_DAPM_POST_PMU);
- if (ret < 0)
- return ret;
- } else if (event == SND_SOC_DAPM_STREAM_STOP) {
- ret = w->event(w,
- NULL, SND_SOC_DAPM_POST_PMD);
- if (ret < 0)
- return ret;
- }
- continue;
- }
-
- /* all other widgets */
- in = is_connected_input_ep(w);
- dapm_clear_walk(w->codec);
- out = is_connected_output_ep(w);
- dapm_clear_walk(w->codec);
- power = (out != 0 && in != 0) ? 1 : 0;
- power_change = (w->power == power) ? 0: 1;
- w->power = power;
-
- if (!power_change)
- continue;
-
- /* call any power change event handlers */
- if (w->event)
- pr_debug("power %s event for %s flags %x\n",
- w->power ? "on" : "off",
- w->name, w->event_flags);
-
- /* power up pre event */
- if (power && w->event &&
- (w->event_flags & SND_SOC_DAPM_PRE_PMU)) {
- ret = w->event(w, NULL, SND_SOC_DAPM_PRE_PMU);
- if (ret < 0)
- return ret;
- }
-
- /* power down pre event */
- if (!power && w->event &&
- (w->event_flags & SND_SOC_DAPM_PRE_PMD)) {
- ret = w->event(w, NULL, SND_SOC_DAPM_PRE_PMD);
- if (ret < 0)
- return ret;
- }
-
- /* Lower PGA volume to reduce pops */
- if (w->id == snd_soc_dapm_pga && !power)
- dapm_set_pga(w, power);
-
- dapm_update_bits(w);
-
- /* Raise PGA volume to reduce pops */
- if (w->id == snd_soc_dapm_pga && power)
- dapm_set_pga(w, power);
-
- /* power up post event */
- if (power && w->event &&
- (w->event_flags & SND_SOC_DAPM_POST_PMU)) {
- ret = w->event(w,
- NULL, SND_SOC_DAPM_POST_PMU);
- if (ret < 0)
- return ret;
- }
-
- /* power down post event */
- if (!power && w->event &&
- (w->event_flags & SND_SOC_DAPM_POST_PMD)) {
- ret = w->event(w, NULL, SND_SOC_DAPM_POST_PMD);
- if (ret < 0)
- return ret;
- }
+ ret = dapm_power_widget(codec, event, w);
+ if (ret != 0)
+ return ret;
}
}
- return ret;
+ return 0;
}
#ifdef DEBUG
case snd_soc_dapm_adc:
case snd_soc_dapm_pga:
case snd_soc_dapm_mixer:
+ case snd_soc_dapm_mixer_named_ctl:
if (w->name) {
in = is_connected_input_ep(w);
dapm_clear_walk(w->codec);
int found = 0;
if (widget->id != snd_soc_dapm_mixer &&
+ widget->id != snd_soc_dapm_mixer_named_ctl &&
widget->id != snd_soc_dapm_switch)
return -ENODEV;
struct device_attribute *attr, char *buf)
{
struct snd_soc_device *devdata = dev_get_drvdata(dev);
- struct snd_soc_codec *codec = devdata->codec;
+ struct snd_soc_codec *codec = devdata->card->codec;
struct snd_soc_dapm_widget *w;
int count = 0;
char *state = "not set";
case snd_soc_dapm_adc:
case snd_soc_dapm_pga:
case snd_soc_dapm_mixer:
+ case snd_soc_dapm_mixer_named_ctl:
if (w->name)
count += sprintf(buf + count, "%s: %s\n",
w->name, w->power ? "On":"Off");
}
static int snd_soc_dapm_set_pin(struct snd_soc_codec *codec,
- char *pin, int status)
+ const char *pin, int status)
{
struct snd_soc_dapm_widget *w;
break;
case snd_soc_dapm_switch:
case snd_soc_dapm_mixer:
+ case snd_soc_dapm_mixer_named_ctl:
ret = dapm_connect_mixer(codec, wsource, wsink, path, control);
if (ret != 0)
goto err;
switch(w->id) {
case snd_soc_dapm_switch:
case snd_soc_dapm_mixer:
+ case snd_soc_dapm_mixer_named_ctl:
dapm_new_mixer(codec, w);
break;
case snd_soc_dapm_mux:
}
EXPORT_SYMBOL_GPL(snd_soc_dapm_put_value_enum_double);
+/**
+ * snd_soc_dapm_info_pin_switch - Info for a pin switch
+ *
+ * @kcontrol: mixer control
+ * @uinfo: control element information
+ *
+ * Callback to provide information about a pin switch control.
+ */
+int snd_soc_dapm_info_pin_switch(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_info *uinfo)
+{
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
+ uinfo->count = 1;
+ uinfo->value.integer.min = 0;
+ uinfo->value.integer.max = 1;
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(snd_soc_dapm_info_pin_switch);
+
+/**
+ * snd_soc_dapm_get_pin_switch - Get information for a pin switch
+ *
+ * @kcontrol: mixer control
+ * @ucontrol: Value
+ */
+int snd_soc_dapm_get_pin_switch(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ const char *pin = (const char *)kcontrol->private_value;
+
+ mutex_lock(&codec->mutex);
+
+ ucontrol->value.integer.value[0] =
+ snd_soc_dapm_get_pin_status(codec, pin);
+
+ mutex_unlock(&codec->mutex);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(snd_soc_dapm_get_pin_switch);
+
+/**
+ * snd_soc_dapm_put_pin_switch - Set information for a pin switch
+ *
+ * @kcontrol: mixer control
+ * @ucontrol: Value
+ */
+int snd_soc_dapm_put_pin_switch(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+ const char *pin = (const char *)kcontrol->private_value;
+
+ mutex_lock(&codec->mutex);
+
+ if (ucontrol->value.integer.value[0])
+ snd_soc_dapm_enable_pin(codec, pin);
+ else
+ snd_soc_dapm_disable_pin(codec, pin);
+
+ snd_soc_dapm_sync(codec);
+
+ mutex_unlock(&codec->mutex);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(snd_soc_dapm_put_pin_switch);
+
/**
* snd_soc_dapm_new_control - create new dapm control
* @codec: audio codec
int snd_soc_dapm_set_bias_level(struct snd_soc_device *socdev,
enum snd_soc_bias_level level)
{
- struct snd_soc_codec *codec = socdev->codec;
struct snd_soc_card *card = socdev->card;
+ struct snd_soc_codec *codec = socdev->card->codec;
int ret = 0;
if (card->set_bias_level)
* NOTE: snd_soc_dapm_sync() needs to be called after this for DAPM to
* do any widget power switching.
*/
-int snd_soc_dapm_enable_pin(struct snd_soc_codec *codec, char *pin)
+int snd_soc_dapm_enable_pin(struct snd_soc_codec *codec, const char *pin)
{
return snd_soc_dapm_set_pin(codec, pin, 1);
}
* NOTE: snd_soc_dapm_sync() needs to be called after this for DAPM to
* do any widget power switching.
*/
-int snd_soc_dapm_disable_pin(struct snd_soc_codec *codec, char *pin)
+int snd_soc_dapm_disable_pin(struct snd_soc_codec *codec, const char *pin)
{
return snd_soc_dapm_set_pin(codec, pin, 0);
}
* NOTE: snd_soc_dapm_sync() needs to be called after this for DAPM to
* do any widget power switching.
*/
-int snd_soc_dapm_nc_pin(struct snd_soc_codec *codec, char *pin)
+int snd_soc_dapm_nc_pin(struct snd_soc_codec *codec, const char *pin)
{
return snd_soc_dapm_set_pin(codec, pin, 0);
}
*
* Returns 1 for connected otherwise 0.
*/
-int snd_soc_dapm_get_pin_status(struct snd_soc_codec *codec, char *pin)
+int snd_soc_dapm_get_pin_status(struct snd_soc_codec *codec, const char *pin)
{
struct snd_soc_dapm_widget *w;
*/
void snd_soc_dapm_free(struct snd_soc_device *socdev)
{
- struct snd_soc_codec *codec = socdev->codec;
+ struct snd_soc_codec *codec = socdev->card->codec;
snd_soc_dapm_sys_remove(socdev->dev);
dapm_free_widgets(codec);
--- /dev/null
+/*
+ * soc-jack.c -- ALSA SoC jack handling
+ *
+ * Copyright 2008 Wolfson Microelectronics PLC.
+ *
+ * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <sound/jack.h>
+#include <sound/soc.h>
+#include <sound/soc-dapm.h>
+#include <linux/gpio.h>
+#include <linux/interrupt.h>
+#include <linux/workqueue.h>
+#include <linux/delay.h>
+
+/**
+ * snd_soc_jack_new - Create a new jack
+ * @card: ASoC card
+ * @id: an identifying string for this jack
+ * @type: a bitmask of enum snd_jack_type values that can be detected by
+ * this jack
+ * @jack: structure to use for the jack
+ *
+ * Creates a new jack object.
+ *
+ * Returns zero if successful, or a negative error code on failure.
+ * On success jack will be initialised.
+ */
+int snd_soc_jack_new(struct snd_soc_card *card, const char *id, int type,
+ struct snd_soc_jack *jack)
+{
+ jack->card = card;
+ INIT_LIST_HEAD(&jack->pins);
+
+ return snd_jack_new(card->codec->card, id, type, &jack->jack);
+}
+EXPORT_SYMBOL_GPL(snd_soc_jack_new);
+
+/**
+ * snd_soc_jack_report - Report the current status for a jack
+ *
+ * @jack: the jack
+ * @status: a bitmask of enum snd_jack_type values that are currently detected.
+ * @mask: a bitmask of enum snd_jack_type values that being reported.
+ *
+ * If configured using snd_soc_jack_add_pins() then the associated
+ * DAPM pins will be enabled or disabled as appropriate and DAPM
+ * synchronised.
+ *
+ * Note: This function uses mutexes and should be called from a
+ * context which can sleep (such as a workqueue).
+ */
+void snd_soc_jack_report(struct snd_soc_jack *jack, int status, int mask)
+{
+ struct snd_soc_codec *codec = jack->card->codec;
+ struct snd_soc_jack_pin *pin;
+ int enable;
+ int oldstatus;
+
+ if (!jack) {
+ WARN_ON_ONCE(!jack);
+ return;
+ }
+
+ mutex_lock(&codec->mutex);
+
+ oldstatus = jack->status;
+
+ jack->status &= ~mask;
+ jack->status |= status;
+
+ /* The DAPM sync is expensive enough to be worth skipping */
+ if (jack->status == oldstatus)
+ goto out;
+
+ list_for_each_entry(pin, &jack->pins, list) {
+ enable = pin->mask & status;
+
+ if (pin->invert)
+ enable = !enable;
+
+ if (enable)
+ snd_soc_dapm_enable_pin(codec, pin->pin);
+ else
+ snd_soc_dapm_disable_pin(codec, pin->pin);
+ }
+
+ snd_soc_dapm_sync(codec);
+
+ snd_jack_report(jack->jack, status);
+
+out:
+ mutex_unlock(&codec->mutex);
+}
+EXPORT_SYMBOL_GPL(snd_soc_jack_report);
+
+/**
+ * snd_soc_jack_add_pins - Associate DAPM pins with an ASoC jack
+ *
+ * @jack: ASoC jack
+ * @count: Number of pins
+ * @pins: Array of pins
+ *
+ * After this function has been called the DAPM pins specified in the
+ * pins array will have their status updated to reflect the current
+ * state of the jack whenever the jack status is updated.
+ */
+int snd_soc_jack_add_pins(struct snd_soc_jack *jack, int count,
+ struct snd_soc_jack_pin *pins)
+{
+ int i;
+
+ for (i = 0; i < count; i++) {
+ if (!pins[i].pin) {
+ printk(KERN_ERR "No name for pin %d\n", i);
+ return -EINVAL;
+ }
+ if (!pins[i].mask) {
+ printk(KERN_ERR "No mask for pin %d (%s)\n", i,
+ pins[i].pin);
+ return -EINVAL;
+ }
+
+ INIT_LIST_HEAD(&pins[i].list);
+ list_add(&(pins[i].list), &jack->pins);
+ }
+
+ /* Update to reflect the last reported status; canned jack
+ * implementations are likely to set their state before the
+ * card has an opportunity to associate pins.
+ */
+ snd_soc_jack_report(jack, 0, 0);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(snd_soc_jack_add_pins);
+
+#ifdef CONFIG_GPIOLIB
+/* gpio detect */
+static void snd_soc_jack_gpio_detect(struct snd_soc_jack_gpio *gpio)
+{
+ struct snd_soc_jack *jack = gpio->jack;
+ int enable;
+ int report;
+
+ if (gpio->debounce_time > 0)
+ mdelay(gpio->debounce_time);
+
+ enable = gpio_get_value(gpio->gpio);
+ if (gpio->invert)
+ enable = !enable;
+
+ if (enable)
+ report = gpio->report;
+ else
+ report = 0;
+
+ snd_soc_jack_report(jack, report, gpio->report);
+}
+
+/* irq handler for gpio pin */
+static irqreturn_t gpio_handler(int irq, void *data)
+{
+ struct snd_soc_jack_gpio *gpio = data;
+
+ schedule_work(&gpio->work);
+
+ return IRQ_HANDLED;
+}
+
+/* gpio work */
+static void gpio_work(struct work_struct *work)
+{
+ struct snd_soc_jack_gpio *gpio;
+
+ gpio = container_of(work, struct snd_soc_jack_gpio, work);
+ snd_soc_jack_gpio_detect(gpio);
+}
+
+/**
+ * snd_soc_jack_add_gpios - Associate GPIO pins with an ASoC jack
+ *
+ * @jack: ASoC jack
+ * @count: number of pins
+ * @gpios: array of gpio pins
+ *
+ * This function will request gpio, set data direction and request irq
+ * for each gpio in the array.
+ */
+int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count,
+ struct snd_soc_jack_gpio *gpios)
+{
+ int i, ret;
+
+ for (i = 0; i < count; i++) {
+ if (!gpio_is_valid(gpios[i].gpio)) {
+ printk(KERN_ERR "Invalid gpio %d\n",
+ gpios[i].gpio);
+ ret = -EINVAL;
+ goto undo;
+ }
+ if (!gpios[i].name) {
+ printk(KERN_ERR "No name for gpio %d\n",
+ gpios[i].gpio);
+ ret = -EINVAL;
+ goto undo;
+ }
+
+ ret = gpio_request(gpios[i].gpio, gpios[i].name);
+ if (ret)
+ goto undo;
+
+ ret = gpio_direction_input(gpios[i].gpio);
+ if (ret)
+ goto err;
+
+ ret = request_irq(gpio_to_irq(gpios[i].gpio),
+ gpio_handler,
+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+ jack->card->dev->driver->name,
+ &gpios[i]);
+ if (ret)
+ goto err;
+
+ INIT_WORK(&gpios[i].work, gpio_work);
+ gpios[i].jack = jack;
+ }
+
+ return 0;
+
+err:
+ gpio_free(gpios[i].gpio);
+undo:
+ snd_soc_jack_free_gpios(jack, i, gpios);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(snd_soc_jack_add_gpios);
+
+/**
+ * snd_soc_jack_free_gpios - Release GPIO pins' resources of an ASoC jack
+ *
+ * @jack: ASoC jack
+ * @count: number of pins
+ * @gpios: array of gpio pins
+ *
+ * Release gpio and irq resources for gpio pins associated with an ASoC jack.
+ */
+void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
+ struct snd_soc_jack_gpio *gpios)
+{
+ int i;
+
+ for (i = 0; i < count; i++) {
+ free_irq(gpio_to_irq(gpios[i].gpio), &gpios[i]);
+ gpio_free(gpios[i].gpio);
+ gpios[i].jack = NULL;
+ }
+}
+EXPORT_SYMBOL_GPL(snd_soc_jack_free_gpios);
+#endif /* CONFIG_GPIOLIB */
amd->regs = of_ioremap(&op->resource[0], 0,
resource_size(&op->resource[0]), "amd7930");
if (!amd->regs) {
- snd_printk("amd7930-%d: Unable to map chip registers.\n", dev);
+ snd_printk(KERN_ERR
+ "amd7930-%d: Unable to map chip registers.\n", dev);
return -EIO;
}
if (request_irq(irq, snd_amd7930_interrupt,
IRQF_DISABLED | IRQF_SHARED, "amd7930", amd)) {
- snd_printk("amd7930-%d: Unable to grab IRQ %d\n",
+ snd_printk(KERN_ERR "amd7930-%d: Unable to grab IRQ %d\n",
dev, irq);
snd_amd7930_free(amd);
return -EBUSY;
return -ENOENT;
}
- card = snd_card_new(index[dev_num], id[dev_num], THIS_MODULE, 0);
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev_num], id[dev_num], THIS_MODULE, 0,
+ &card);
+ if (err < 0)
+ return err;
strcpy(card->driver, "AMD7930");
strcpy(card->shortname, "Sun AMD7930");
{
struct snd_card *card;
struct snd_cs4231 *chip;
+ int err;
*rcard = NULL;
return -ENOENT;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(struct snd_cs4231));
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct snd_cs4231), &card);
+ if (err < 0)
+ return err;
strcpy(card->driver, "CS4231");
strcpy(card->shortname, "Sun CS4231");
return -ENODEV;
}
- card = snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(struct snd_dbri));
- if (card == NULL)
- return -ENOMEM;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct snd_dbri), &card);
+ if (err < 0)
+ return err;
strcpy(card->driver, "DBRI");
strcpy(card->shortname, "Sun DBRI");
return PTR_ERR(board->dac_clk);
}
- retval = -ENOMEM;
-
/* Allocate "card" using some unused identifiers. */
snprintf(id, sizeof id, "at73c213_%d", board->ssc_id);
- card = snd_card_new(-1, id, THIS_MODULE, sizeof(struct snd_at73c213));
- if (!card)
+ retval = snd_card_create(-1, id, THIS_MODULE,
+ sizeof(struct snd_at73c213), &card);
+ if (retval < 0)
goto out;
chip = card->private_data;
#include <asm/uaccess.h>
#include "emux_voice.h"
-/*
- * open the hwdep device
- */
-static int
-snd_emux_hwdep_open(struct snd_hwdep *hw, struct file *file)
-{
- return 0;
-}
-
-
-/*
- * close the device
- */
-static int
-snd_emux_hwdep_release(struct snd_hwdep *hw, struct file *file)
-{
- return 0;
-}
-
#define TMP_CLIENT_ID 0x1001
emu->hwdep = hw;
strcpy(hw->name, SNDRV_EMUX_HWDEP_NAME);
hw->iface = SNDRV_HWDEP_IFACE_EMUX_WAVETABLE;
- hw->ops.open = snd_emux_hwdep_open;
- hw->ops.release = snd_emux_hwdep_release;
hw->ops.ioctl = snd_emux_hwdep_ioctl;
hw->exclusive = 1;
hw->private_data = emu;
p = snd_emux_create_port(emu, tmpname, 32,
1, &callback);
if (p == NULL) {
- snd_printk("can't create port\n");
+ snd_printk(KERN_ERR "can't create port\n");
snd_emux_dec_count(emu);
mutex_unlock(&emu->register_mutex);
return -ENOMEM;
emu->client = snd_seq_create_kernel_client(card, index,
"%s WaveTable", emu->name);
if (emu->client < 0) {
- snd_printk("can't create client\n");
+ snd_printk(KERN_ERR "can't create client\n");
return -ENODEV;
}
if (emu->num_ports < 0) {
- snd_printk("seqports must be greater than zero\n");
+ snd_printk(KERN_WARNING "seqports must be greater than zero\n");
emu->num_ports = 1;
} else if (emu->num_ports >= SNDRV_EMUX_MAX_PORTS) {
- snd_printk("too many ports."
+ snd_printk(KERN_WARNING "too many ports."
"limited max. ports %d\n", SNDRV_EMUX_MAX_PORTS);
emu->num_ports = SNDRV_EMUX_MAX_PORTS;
}
p = snd_emux_create_port(emu, tmpname, MIDI_CHANNELS,
0, &pinfo);
if (p == NULL) {
- snd_printk("can't create port\n");
+ snd_printk(KERN_ERR "can't create port\n");
return -ENOMEM;
}
/* Allocate structures for this channel */
if ((p = kzalloc(sizeof(*p), GFP_KERNEL)) == NULL) {
- snd_printk("no memory\n");
+ snd_printk(KERN_ERR "no memory\n");
return NULL;
}
p->chset.channels = kcalloc(max_channels, sizeof(struct snd_midi_channel), GFP_KERNEL);
if (p->chset.channels == NULL) {
- snd_printk("no memory\n");
+ snd_printk(KERN_ERR "no memory\n");
kfree(p);
return NULL;
}
goto __error;
}
emu->vmidi[i] = rmidi;
- //snd_printk("virmidi %d ok\n", i);
+ /* snd_printk(KERN_DEBUG "virmidi %d ok\n", i); */
}
return 0;
__error:
- //snd_printk("error init..\n");
+ /* snd_printk(KERN_DEBUG "error init..\n"); */
snd_emux_delete_virmidi(emu);
return -ENOMEM;
}
if (emu->voices[voice].state == SNDRV_EMUX_ST_OFF)
emu->voices[voice].state = SNDRV_EMUX_ST_LOCKED;
else
- snd_printk("invalid voice for lock %d (state = %x)\n",
+ snd_printk(KERN_WARNING
+ "invalid voice for lock %d (state = %x)\n",
voice, emu->voices[voice].state);
spin_unlock_irqrestore(&emu->voice_lock, flags);
}
if (emu->voices[voice].state == SNDRV_EMUX_ST_LOCKED)
emu->voices[voice].state = SNDRV_EMUX_ST_OFF;
else
- snd_printk("invalid voice for unlock %d (state = %x)\n",
+ snd_printk(KERN_WARNING
+ "invalid voice for unlock %d (state = %x)\n",
voice, emu->voices[voice].state);
spin_unlock_irqrestore(&emu->voice_lock, flags);
}
int rc;
if (count < (long)sizeof(patch)) {
- snd_printk("patch record too small %ld\n", count);
+ snd_printk(KERN_ERR "patch record too small %ld\n", count);
return -EINVAL;
}
if (copy_from_user(&patch, data, sizeof(patch)))
data += sizeof(patch);
if (patch.key != SNDRV_OSS_SOUNDFONT_PATCH) {
- snd_printk("'The wrong kind of patch' %x\n", patch.key);
+ snd_printk(KERN_ERR "The wrong kind of patch %x\n", patch.key);
return -EINVAL;
}
if (count < patch.len) {
- snd_printk("Patch too short %ld, need %d\n", count, patch.len);
+ snd_printk(KERN_ERR "Patch too short %ld, need %d\n",
+ count, patch.len);
return -EINVAL;
}
if (patch.len < 0) {
- snd_printk("poor length %d\n", patch.len);
+ snd_printk(KERN_ERR "poor length %d\n", patch.len);
return -EINVAL;
}
case SNDRV_SFNT_REMOVE_INFO:
/* patch must be opened */
if (!sflist->currsf) {
- snd_printk("soundfont: remove_info: patch not opened\n");
+ snd_printk(KERN_ERR "soundfont: remove_info: "
+ "patch not opened\n");
rc = -EINVAL;
} else {
int bank, instr;
return -EINVAL;
if (count < (long)sizeof(hdr)) {
- printk("Soundfont error: invalid patch zone length\n");
+ printk(KERN_ERR "Soundfont error: invalid patch zone length\n");
return -EINVAL;
}
if (copy_from_user((char*)&hdr, data, sizeof(hdr)))
count -= sizeof(hdr);
if (hdr.nvoices <= 0 || hdr.nvoices >= 100) {
- printk("Soundfont error: Illegal voice number %d\n", hdr.nvoices);
+ printk(KERN_ERR "Soundfont error: Illegal voice number %d\n",
+ hdr.nvoices);
return -EINVAL;
}
if (count < (long)sizeof(struct soundfont_voice_info) * hdr.nvoices) {
- printk("Soundfont Error: patch length(%ld) is smaller than nvoices(%d)\n",
+ printk(KERN_ERR "Soundfont Error: "
+ "patch length(%ld) is smaller than nvoices(%d)\n",
count, hdr.nvoices);
return -EINVAL;
}
int rc;
if (count < (long)sizeof(patch)) {
- snd_printk("patch record too small %ld\n", count);
+ snd_printk(KERN_ERR "patch record too small %ld\n", count);
return -EINVAL;
}
if (copy_from_user(&patch, data, sizeof(patch)))
/* panning position; -128 - 127 => 0-127 */
zone->v.pan = (patch.panning + 128) / 2;
#if 0
- snd_printk("gus: basefrq=%d (ofs=%d) root=%d,tune=%d, range:%d-%d\n",
+ snd_printk(KERN_DEBUG
+ "gus: basefrq=%d (ofs=%d) root=%d,tune=%d, range:%d-%d\n",
(int)patch.base_freq, zone->v.rate_offset,
zone->v.root, zone->v.tune, zone->v.low, zone->v.high);
#endif
zone->v.parm.volrelease = 0x8000 | snd_sf_calc_parm_decay(release);
zone->v.attenuation = calc_gus_attenuation(patch.env_offset[0]);
#if 0
- snd_printk("gus: atkhld=%x, dcysus=%x, volrel=%x, att=%d\n",
+ snd_printk(KERN_DEBUG
+ "gus: atkhld=%x, dcysus=%x, volrel=%x, att=%d\n",
zone->v.parm.volatkhld,
zone->v.parm.voldcysus,
zone->v.parm.volrelease,
log("Unable to set up control system (ret=%d)\n", ret);
}
-static struct snd_card* create_card(struct usb_device* usb_dev)
+static int create_card(struct usb_device* usb_dev, struct snd_card **cardp)
{
int devnum;
+ int err;
struct snd_card *card;
struct snd_usb_caiaqdev *dev;
break;
if (devnum >= SNDRV_CARDS)
- return NULL;
+ return -ENODEV;
- card = snd_card_new(index[devnum], id[devnum], THIS_MODULE,
- sizeof(struct snd_usb_caiaqdev));
- if (!card)
- return NULL;
+ err = snd_card_create(index[devnum], id[devnum], THIS_MODULE,
+ sizeof(struct snd_usb_caiaqdev), &card);
+ if (err < 0)
+ return err;
dev = caiaqdev(card);
dev->chip.dev = usb_dev;
spin_lock_init(&dev->spinlock);
snd_card_set_dev(card, &usb_dev->dev);
- return card;
+ *cardp = card;
+ return 0;
}
static int __devinit init_card(struct snd_usb_caiaqdev *dev)
struct snd_card *card;
struct usb_device *device = interface_to_usbdev(intf);
- card = create_card(device);
+ ret = create_card(device, &card);
- if (!card)
- return -ENOMEM;
+ if (ret < 0)
+ return ret;
usb_set_intfdata(intf, card);
ret = init_card(caiaqdev(card));
return -ENXIO;
}
- card = snd_card_new(index[idx], id[idx], THIS_MODULE, 0);
- if (card == NULL) {
+ err = snd_card_create(index[idx], id[idx], THIS_MODULE, 0, &card);
+ if (err < 0) {
snd_printk(KERN_ERR "cannot create card instance %d\n", idx);
- return -ENOMEM;
+ return err;
}
chip = kzalloc(sizeof(*chip), GFP_KERNEL);
/* Sound Blaster remote control stuff */
const struct rc_config *rc_cfg;
- unsigned long rc_hwdep_open;
u32 rc_code;
wait_queue_head_t rc_waitq;
struct urb *rc_urb;
wake_up(&mixer->rc_waitq);
}
-static int snd_usb_sbrc_hwdep_open(struct snd_hwdep *hw, struct file *file)
-{
- struct usb_mixer_interface *mixer = hw->private_data;
-
- if (test_and_set_bit(0, &mixer->rc_hwdep_open))
- return -EBUSY;
- return 0;
-}
-
-static int snd_usb_sbrc_hwdep_release(struct snd_hwdep *hw, struct file *file)
-{
- struct usb_mixer_interface *mixer = hw->private_data;
-
- clear_bit(0, &mixer->rc_hwdep_open);
- smp_mb__after_clear_bit();
- return 0;
-}
-
static long snd_usb_sbrc_hwdep_read(struct snd_hwdep *hw, char __user *buf,
long count, loff_t *offset)
{
hwdep->iface = SNDRV_HWDEP_IFACE_SB_RC;
hwdep->private_data = mixer;
hwdep->ops.read = snd_usb_sbrc_hwdep_read;
- hwdep->ops.open = snd_usb_sbrc_hwdep_open;
- hwdep->ops.release = snd_usb_sbrc_hwdep_release;
hwdep->ops.poll = snd_usb_sbrc_hwdep_poll;
+ hwdep->exclusive = 1;
mixer->rc_urb = usb_alloc_urb(0, GFP_KERNEL);
if (!mixer->rc_urb)
return true;
}
-static struct snd_card *usx2y_create_card(struct usb_device *device)
+static int usx2y_create_card(struct usb_device *device, struct snd_card **cardp)
{
int dev;
struct snd_card *card;
+ int err;
+
for (dev = 0; dev < SNDRV_CARDS; ++dev)
if (enable[dev] && !snd_us122l_card_used[dev])
break;
if (dev >= SNDRV_CARDS)
- return NULL;
- card = snd_card_new(index[dev], id[dev], THIS_MODULE,
- sizeof(struct us122l));
- if (!card)
- return NULL;
+ return -ENODEV;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct us122l), &card);
+ if (err < 0)
+ return err;
snd_us122l_card_used[US122L(card)->chip.index = dev] = 1;
US122L(card)->chip.dev = device;
US122L(card)->chip.dev->devnum
);
snd_card_set_dev(card, &device->dev);
- return card;
+ *cardp = card;
+ return 0;
}
-static void *us122l_usb_probe(struct usb_interface *intf,
- const struct usb_device_id *device_id)
+static int us122l_usb_probe(struct usb_interface *intf,
+ const struct usb_device_id *device_id,
+ struct snd_card **cardp)
{
struct usb_device *device = interface_to_usbdev(intf);
- struct snd_card *card = usx2y_create_card(device);
+ struct snd_card *card;
+ int err;
- if (!card)
- return NULL;
+ err = usx2y_create_card(device, &card);
+ if (err < 0)
+ return err;
- if (!us122l_create_card(card) ||
- snd_card_register(card) < 0) {
+ if (!us122l_create_card(card)) {
snd_card_free(card);
- return NULL;
+ return -EINVAL;
+ }
+
+ err = snd_card_register(card);
+ if (err < 0) {
+ snd_card_free(card);
+ return err;
}
usb_get_dev(device);
- return card;
+ *cardp = card;
+ return 0;
}
static int snd_us122l_probe(struct usb_interface *intf,
const struct usb_device_id *id)
{
struct snd_card *card;
+ int err;
+
snd_printdd(KERN_DEBUG"%p:%i\n",
intf, intf->cur_altsetting->desc.bInterfaceNumber);
if (intf->cur_altsetting->desc.bInterfaceNumber != 1)
return 0;
- card = us122l_usb_probe(usb_get_intf(intf), id);
-
- if (card) {
- usb_set_intfdata(intf, card);
- return 0;
+ err = us122l_usb_probe(usb_get_intf(intf), id, &card);
+ if (err < 0) {
+ usb_put_intf(intf);
+ return err;
}
- usb_put_intf(intf);
- return -EIO;
+ usb_set_intfdata(intf, card);
+ return 0;
}
static void snd_us122l_disconnect(struct usb_interface *intf)
#include "usbusx2y.h"
#include "usX2Yhwdep.h"
-int usX2Y_hwdep_pcm_new(struct snd_card *card);
-
-
static int snd_us428ctls_vm_fault(struct vm_area_struct *area,
struct vm_fault *vmf)
{
}
-static int snd_usX2Y_hwdep_open(struct snd_hwdep *hw, struct file *file)
-{
- return 0;
-}
-
-static int snd_usX2Y_hwdep_release(struct snd_hwdep *hw, struct file *file)
-{
- return 0;
-}
-
static int snd_usX2Y_hwdep_dsp_status(struct snd_hwdep *hw,
struct snd_hwdep_dsp_status *info)
{
hw->iface = SNDRV_HWDEP_IFACE_USX2Y;
hw->private_data = usX2Y(card);
- hw->ops.open = snd_usX2Y_hwdep_open;
- hw->ops.release = snd_usX2Y_hwdep_release;
hw->ops.dsp_status = snd_usX2Y_hwdep_dsp_status;
hw->ops.dsp_load = snd_usX2Y_hwdep_dsp_load;
hw->ops.mmap = snd_us428ctls_mmap;
if (usX2Y->US04) {
if (0 == usX2Y->US04->submitted)
- do
+ do {
err = usb_submit_urb(usX2Y->US04->urb[usX2Y->US04->submitted++], GFP_ATOMIC);
- while (!err && usX2Y->US04->submitted < usX2Y->US04->len);
+ } while (!err && usX2Y->US04->submitted < usX2Y->US04->len);
} else
if (us428ctls && us428ctls->p4outLast >= 0 && us428ctls->p4outLast < N_us428_p4out_BUFS) {
if (us428ctls->p4outLast != us428ctls->p4outSent) {
{ /* terminator */ }
};
-static struct snd_card *usX2Y_create_card(struct usb_device *device)
+static int usX2Y_create_card(struct usb_device *device, struct snd_card **cardp)
{
int dev;
struct snd_card * card;
+ int err;
+
for (dev = 0; dev < SNDRV_CARDS; ++dev)
if (enable[dev] && !snd_usX2Y_card_used[dev])
break;
if (dev >= SNDRV_CARDS)
- return NULL;
- card = snd_card_new(index[dev], id[dev], THIS_MODULE, sizeof(struct usX2Ydev));
- if (!card)
- return NULL;
+ return -ENODEV;
+ err = snd_card_create(index[dev], id[dev], THIS_MODULE,
+ sizeof(struct usX2Ydev), &card);
+ if (err < 0)
+ return err;
snd_usX2Y_card_used[usX2Y(card)->chip.index = dev] = 1;
card->private_free = snd_usX2Y_card_private_free;
usX2Y(card)->chip.dev = device;
usX2Y(card)->chip.dev->bus->busnum, usX2Y(card)->chip.dev->devnum
);
snd_card_set_dev(card, &device->dev);
- return card;
+ *cardp = card;
+ return 0;
}
-static void *usX2Y_usb_probe(struct usb_device *device, struct usb_interface *intf, const struct usb_device_id *device_id)
+static int usX2Y_usb_probe(struct usb_device *device,
+ struct usb_interface *intf,
+ const struct usb_device_id *device_id,
+ struct snd_card **cardp)
{
int err;
struct snd_card * card;
+
+ *cardp = NULL;
if (le16_to_cpu(device->descriptor.idVendor) != 0x1604 ||
(le16_to_cpu(device->descriptor.idProduct) != USB_ID_US122 &&
le16_to_cpu(device->descriptor.idProduct) != USB_ID_US224 &&
- le16_to_cpu(device->descriptor.idProduct) != USB_ID_US428) ||
- !(card = usX2Y_create_card(device)))
- return NULL;
+ le16_to_cpu(device->descriptor.idProduct) != USB_ID_US428))
+ return -EINVAL;
+
+ err = usX2Y_create_card(device, &card);
+ if (err < 0)
+ return err;
if ((err = usX2Y_hwdep_new(card, device)) < 0 ||
(err = snd_card_register(card)) < 0) {
snd_card_free(card);
- return NULL;
+ return err;
}
- return card;
+ *cardp = card;
+ return 0;
}
/*
*/
static int snd_usX2Y_probe(struct usb_interface *intf, const struct usb_device_id *id)
{
- void *chip;
- chip = usX2Y_usb_probe(interface_to_usbdev(intf), intf, id);
- if (chip) {
- usb_set_intfdata(intf, chip);
- return 0;
- } else
- return -EIO;
+ struct snd_card *card;
+ int err;
+
+ err = usX2Y_usb_probe(interface_to_usbdev(intf), intf, id, &card);
+ if (err < 0)
+ return err;
+ dev_set_drvdata(&intf->dev, card);
+ return 0;
}
static void snd_usX2Y_disconnect(struct usb_interface *intf)
volatile unsigned captured_iso_frames;
int capture_iso_start;
};
+
+int usX2Y_hwdep_pcm_new(struct snd_card *card);
projects / linux-2.6-omap-h63xx.git / commitdiff
