bool "PXA2xx-based"
depends on MMU
select ARCH_MTD_XIP
+++ +++ select GENERIC_TIME
help
Support for Intel's PXA2XX processor line.
Support for StrongARM 11x0 based boards.
config ARCH_S3C2410
---- -- bool "Samsung S3C2410, S3C2412, S3C2413, S3C2440, S3C2442"
++++ ++ bool "Samsung S3C2410, S3C2412, S3C2413, S3C2440, S3C2442, S3C2443"
help
Samsung S3C2410X CPU based systems, such as the Simtec Electronics
BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
source "arch/arm/mach-omap2/Kconfig"
++++ ++source "arch/arm/plat-s3c24xx/Kconfig"
++++ ++
++++ ++if ARCH_S3C2410
++++ ++source "arch/arm/mach-s3c2400/Kconfig"
source "arch/arm/mach-s3c2410/Kconfig"
++++ ++source "arch/arm/mach-s3c2412/Kconfig"
++++ ++source "arch/arm/mach-s3c2440/Kconfig"
++++ ++source "arch/arm/mach-s3c2442/Kconfig"
++++ ++source "arch/arm/mach-s3c2443/Kconfig"
++++ ++endif
source "arch/arm/mach-lh7a40x/Kconfig"
source "arch/arm/mach-realview/Kconfig"
- -----source "arch/arm/mach-at91rm9200/Kconfig"
+ +++++source "arch/arm/mach-at91/Kconfig"
source "arch/arm/mach-netx/Kconfig"
be linked for and stored to. This address is dependent on your
own flash usage.
++++++config KEXEC
++++++ bool "Kexec system call (EXPERIMENTAL)"
++++++ depends on EXPERIMENTAL
++++++ help
++++++ kexec is a system call that implements the ability to shutdown your
++++++ current kernel, and to start another kernel. It is like a reboot
++++++ but it is indepedent of the system firmware. And like a reboot
++++++ you can start any kernel with it, not just Linux.
++++++
++++++ It is an ongoing process to be certain the hardware in a machine
++++++ is properly shutdown, so do not be surprised if this code does not
++++++ initially work for you. It may help to enable device hotplugging
++++++ support.
++++++
endmenu
if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX )
machine-$(CONFIG_ARCH_H720X) := h720x
machine-$(CONFIG_ARCH_AAEC2000) := aaec2000
machine-$(CONFIG_ARCH_REALVIEW) := realview
- ----- machine-$(CONFIG_ARCH_AT91) := at91rm9200
+ +++++ machine-$(CONFIG_ARCH_AT91) := at91
machine-$(CONFIG_ARCH_EP93XX) := ep93xx
machine-$(CONFIG_ARCH_PNX4008) := pnx4008
machine-$(CONFIG_ARCH_NETX) := netx
else
MACHINE :=
endif
---- --
++++ ++
export TEXT_OFFSET GZFLAGS MMUEXT
# Do we have FASTFPE?
# If we have a machine-specific directory, then include it in the build.
core-y += arch/arm/kernel/ arch/arm/mm/ arch/arm/common/
core-y += $(MACHINE)
++++ ++core-$(CONFIG_ARCH_S3C2410) += arch/arm/mach-s3c2400/
++++ ++core-$(CONFIG_ARCH_S3C2410) += arch/arm/mach-s3c2412/
++++ ++core-$(CONFIG_ARCH_S3C2410) += arch/arm/mach-s3c2440/
++++ ++core-$(CONFIG_ARCH_S3C2410) += arch/arm/mach-s3c2442/
++++ ++core-$(CONFIG_ARCH_S3C2410) += arch/arm/mach-s3c2443/
core-$(CONFIG_FPE_NWFPE) += arch/arm/nwfpe/
core-$(CONFIG_FPE_FASTFPE) += $(FASTFPE_OBJ)
core-$(CONFIG_VFP) += arch/arm/vfp/
# If we have a common platform directory, then include it in the build.
core-$(CONFIG_PLAT_IOP) += arch/arm/plat-iop/
core-$(CONFIG_ARCH_OMAP) += arch/arm/plat-omap/
++++ ++core-$(CONFIG_PLAT_S3C24XX) += arch/arm/plat-s3c24xx/
drivers-$(CONFIG_OPROFILE) += arch/arm/oprofile/
drivers-$(CONFIG_ARCH_CLPS7500) += drivers/acorn/char/
#include <asm/cacheflush.h>
------#undef DEBUG
#undef STATS
#ifdef STATS
};
struct dmabounce_device_info {
------ struct list_head node;
------
struct device *dev;
struct list_head safe_buffers;
#ifdef STATS
unsigned long total_allocs;
unsigned long map_op_count;
unsigned long bounce_count;
++++++ int attr_res;
#endif
struct dmabounce_pool small;
struct dmabounce_pool large;
rwlock_t lock;
};
------static LIST_HEAD(dmabounce_devs);
------
#ifdef STATS
------static void print_alloc_stats(struct dmabounce_device_info *device_info)
++++++static ssize_t dmabounce_show(struct device *dev, struct device_attribute *attr,
++++++ char *buf)
{
------ printk(KERN_INFO
------ "%s: dmabounce: sbp: %lu, lbp: %lu, other: %lu, total: %lu\n",
------ device_info->dev->bus_id,
------ device_info->small.allocs, device_info->large.allocs,
++++++ struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
++++++ return sprintf(buf, "%lu %lu %lu %lu %lu %lu\n",
++++++ device_info->small.allocs,
++++++ device_info->large.allocs,
device_info->total_allocs - device_info->small.allocs -
device_info->large.allocs,
------ device_info->total_allocs);
++++++ device_info->total_allocs,
++++++ device_info->map_op_count,
++++++ device_info->bounce_count);
}
------#endif
---- -
---- -/* find the given device in the dmabounce device list */
---- -static inline struct dmabounce_device_info *
---- -find_dmabounce_dev(struct device *dev)
---- -{
---- - struct dmabounce_device_info *d;
- /* find the given device in the dmabounce device list */
- static inline struct dmabounce_device_info *
- find_dmabounce_dev(struct device *dev)
- {
- struct dmabounce_device_info *d;
-
------ list_for_each_entry(d, &dmabounce_devs, node)
------ if (d->dev == dev)
------ return d;
------
------ return NULL;
------}
++++++static DEVICE_ATTR(dmabounce_stats, 0400, dmabounce_show, NULL);
++++++#endif
/* allocate a 'safe' buffer and keep track of it */
if (pool)
pool->allocs++;
device_info->total_allocs++;
------ if (device_info->total_allocs % 1000 == 0)
------ print_alloc_stats(device_info);
#endif
write_lock_irqsave(&device_info->lock, flags);
/* ************************************************** */
------#ifdef STATS
------static void print_map_stats(struct dmabounce_device_info *device_info)
------{
------ dev_info(device_info->dev,
------ "dmabounce: map_op_count=%lu, bounce_count=%lu\n",
------ device_info->map_op_count, device_info->bounce_count);
------}
------#endif
------
static inline dma_addr_t
map_single(struct device *dev, void *ptr, size_t size,
enum dma_data_direction dir)
{
------ struct dmabounce_device_info *device_info = find_dmabounce_dev(dev);
++++++ struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
dma_addr_t dma_addr;
int needs_bounce = 0;
ptr = buf->safe;
dma_addr = buf->safe_dma_addr;
+++++ + } else {
+++++ + /*
+++++ + * We don't need to sync the DMA buffer since
+++++ + * it was allocated via the coherent allocators.
+++++ + */
+++++ + consistent_sync(ptr, size, dir);
}
----- - consistent_sync(ptr, size, dir);
----- -
return dma_addr;
}
unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
enum dma_data_direction dir)
{
------ struct dmabounce_device_info *device_info = find_dmabounce_dev(dev);
++++++ struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
struct safe_buffer *buf = NULL;
/*
DO_STATS ( device_info->bounce_count++ );
if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) {
----- - unsigned long ptr;
+++++ + void *ptr = buf->ptr;
dev_dbg(dev,
"%s: copy back safe %p to unsafe %p size %d\n",
----- - __func__, buf->safe, buf->ptr, size);
----- - memcpy(buf->ptr, buf->safe, size);
+++++ + __func__, buf->safe, ptr, size);
+++++ + memcpy(ptr, buf->safe, size);
/*
* DMA buffers must have the same cache properties
* bidirectional case because we know the cache
* lines will be coherent with the data written.
*/
----- - ptr = (unsigned long)buf->ptr;
dmac_clean_range(ptr, ptr + size);
+++++ + outer_clean_range(__pa(ptr), __pa(ptr) + size);
}
free_safe_buffer(device_info, buf);
}
sync_single(struct device *dev, dma_addr_t dma_addr, size_t size,
enum dma_data_direction dir)
{
------ struct dmabounce_device_info *device_info = find_dmabounce_dev(dev);
++++++ struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
struct safe_buffer *buf = NULL;
if (device_info)
default:
BUG();
}
----- - consistent_sync(buf->safe, size, dir);
+++++ + /*
+++++ + * No need to sync the safe buffer - it was allocated
+++++ + * via the coherent allocators.
+++++ + */
} else {
consistent_sync(dma_to_virt(dev, dma_addr), size, dir);
}
device_info->total_allocs = 0;
device_info->map_op_count = 0;
device_info->bounce_count = 0;
++++++ device_info->attr_res = device_create_file(dev, &dev_attr_dmabounce_stats);
#endif
------ list_add(&device_info->node, &dmabounce_devs);
++++++ dev->archdata.dmabounce = device_info;
printk(KERN_INFO "dmabounce: registered device %s on %s bus\n",
dev->bus_id, dev->bus->name);
void
dmabounce_unregister_dev(struct device *dev)
{
------ struct dmabounce_device_info *device_info = find_dmabounce_dev(dev);
++++++ struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
++++++
++++++ dev->archdata.dmabounce = NULL;
if (!device_info) {
printk(KERN_WARNING
dma_pool_destroy(device_info->large.pool);
#ifdef STATS
------ print_alloc_stats(device_info);
------ print_map_stats(device_info);
++++++ if (device_info->attr_res == 0)
++++++ device_remove_file(dev, &dev_attr_dmabounce_stats);
#endif
------ list_del(&device_info->node);
------
kfree(device_info);
printk(KERN_INFO "dmabounce: device %s on %s bus unregistered\n",
* Serial Audio Controller
*/
------/* FIXME: This clash with SA1111 defines */
------#ifndef _ASM_ARCH_SA1111
------
#define SACR0 __REG(0x40400000) /* Global Control Register */
#define SACR1 __REG(0x40400004) /* Serial Audio I 2 S/MSB-Justified Control Register */
#define SASR0 __REG(0x4040000C) /* Serial Audio I 2 S/MSB-Justified Interface and FIFO Status Register */
#define SADIV __REG(0x40400060) /* Audio Clock Divider Register. */
#define SADR __REG(0x40400080) /* Serial Audio Data Register (TX and RX FIFO access Register). */
--- ---#define SACR0_RFTH(x) (x << 12) /* Rx FIFO Interrupt or DMA Trigger Threshold */
--- ---#define SACR0_TFTH(x) (x << 8) /* Tx FIFO Interrupt or DMA Trigger Threshold */
+++ +++#define SACR0_RFTH(x) ((x) << 12) /* Rx FIFO Interrupt or DMA Trigger Threshold */
+++ +++#define SACR0_TFTH(x) ((x) << 8) /* Tx FIFO Interrupt or DMA Trigger Threshold */
#define SACR0_STRF (1 << 5) /* FIFO Select for EFWR Special Function */
#define SACR0_EFWR (1 << 4) /* Enable EFWR Function */
#define SACR0_RST (1 << 3) /* FIFO, i2s Register Reset */
#define SAIMR_RFS (1 << 4) /* Enable Rx FIFO Service Interrupt */
#define SAIMR_TFS (1 << 3) /* Enable Tx FIFO Service Interrupt */
------#endif
------
/*
* AC97 Controller registers
*/
#define SSSR_PINT (1 << 18) /* Peripheral Trailing Byte Interrupt */
#define SSPSP_FSRT (1 << 25) /* Frame Sync Relative Timing */
--- ---#define SSPSP_DMYSTOP(x) (x << 23) /* Dummy Stop */
--- ---#define SSPSP_SFRMWDTH(x) (x << 16) /* Serial Frame Width */
--- ---#define SSPSP_SFRMDLY(x) (x << 9) /* Serial Frame Delay */
--- ---#define SSPSP_DMYSTRT(x) (x << 7) /* Dummy Start */
--- ---#define SSPSP_STRTDLY(x) (x << 4) /* Start Delay */
+++ +++#define SSPSP_DMYSTOP(x) ((x) << 23) /* Dummy Stop */
+++ +++#define SSPSP_SFRMWDTH(x) ((x) << 16) /* Serial Frame Width */
+++ +++#define SSPSP_SFRMDLY(x) ((x) << 9) /* Serial Frame Delay */
+++ +++#define SSPSP_DMYSTRT(x) ((x) << 7) /* Dummy Start */
+++ +++#define SSPSP_STRTDLY(x) ((x) << 4) /* Start Delay */
#define SSPSP_ETDS (1 << 3) /* End of Transfer data State */
#define SSPSP_SFRMP (1 << 2) /* Serial Frame Polarity */
--- ---#define SSPSP_SCMODE(x) (x << 0) /* Serial Bit Rate Clock Mode */
+++ +++#define SSPSP_SCMODE(x) ((x) << 0) /* Serial Bit Rate Clock Mode */
+++ +++#define SSACD_SCDB (1 << 3) /* SSPSYSCLK Divider Bypass */
+++ +++#define SSACD_ACPS(x) ((x) << 4) /* Audio clock PLL select */
+++ +++#define SSACD_ACDS(x) ((x) << 0) /* Audio clock divider select */
#define SSCR0_P1 __REG(0x41000000) /* SSP Port 1 Control Register 0 */
#define SSCR1_P1 __REG(0x41000004) /* SSP Port 1 Control Register 1 */
projects / linux-2.6-omap-h63xx.git / commitdiff