]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
[PATCH] Au1550/1200: add missing PSC #define's, make OSS driver use the proper ones
authorSergei Shtylyov <sshtylyov@ru.mvista.com>
Fri, 23 Jun 2006 09:04:13 +0000 (02:04 -0700)
committerLinus Torvalds <torvalds@g5.osdl.org>
Fri, 23 Jun 2006 14:42:56 +0000 (07:42 -0700)
Add missing PSC #define's required for the drivers using PSC on DBAu1550
board (also fixing Au1550 PSC3 address) and all Au1200-based boards as
well.  Make the OSS driver use the correct PSC definitions fo each board.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
include/asm-mips/mach-au1x00/au1xxx_psc.h
include/asm-mips/mach-db1x00/db1x00.h
sound/oss/au1550_ac97.c

index 5c3e2a38ce12fa261b9bafd421497371323f129e..d7cbacdd21fe57107b9dc925dae5526010bf7c32 100644 (file)
 #define PSC0_BASE_ADDR         0xb1a00000
 #define PSC1_BASE_ADDR         0xb1b00000
 #define PSC2_BASE_ADDR         0xb0a00000
-#define PSC3_BASE_ADDR         0xb0d00000
+#define PSC3_BASE_ADDR         0xb0b00000
+#endif
+
+#ifdef CONFIG_SOC_AU1200
+#define PSC0_BASE_ADDR         0xb1a00000
+#define PSC1_BASE_ADDR         0xb1b00000
 #endif
 
 /* The PSC select and control registers are common to
@@ -227,6 +232,8 @@ typedef struct      psc_i2s {
 #define PSC_I2SCFG_DD_DISABLE  (1 << 27)
 #define PSC_I2SCFG_DE_ENABLE   (1 << 26)
 #define PSC_I2SCFG_SET_WS(x)   (((((x) / 2) - 1) & 0x7f) << 16)
+#define PSC_I2SCFG_WS(n)       ((n & 0xFF) << 16)
+#define PSC_I2SCFG_WS_MASK     (PSC_I2SCFG_WS(0x3F))
 #define PSC_I2SCFG_WI          (1 << 15)
 
 #define PSC_I2SCFG_DIV_MASK    (3 << 13)
index 8fbb4b42a8b502860b79f974fb8cc2f6853ceec9..0f5f4c29f4e864d31c73797d2897618eee567b2e 100644 (file)
 
 
 #ifdef CONFIG_MIPS_DB1550
+
+#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
+#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
+#define DBDMA_I2S_TX_CHAN  DSCR_CMD0_PSC3_TX
+#define DBDMA_I2S_RX_CHAN  DSCR_CMD0_PSC3_RX
+
+#define SPI_PSC_BASE       PSC0_BASE_ADDR
+#define AC97_PSC_BASE      PSC1_BASE_ADDR
+#define SMBUS_PSC_BASE     PSC2_BASE_ADDR
+#define I2S_PSC_BASE       PSC3_BASE_ADDR
+
 #define BCSR_KSEG1_ADDR 0xAF000000
 #define NAND_PHYS_ADDR  0x20000000
+
 #else
 #define BCSR_KSEG1_ADDR 0xAE000000
 #endif
index c1168fae6be63666f20f561fc2fd5ca6cb46795e..9011abe241abdb5be10596d66ccd39ad43ca9b7e 100644 (file)
@@ -57,9 +57,9 @@
 #include <asm/io.h>
 #include <asm/uaccess.h>
 #include <asm/hardirq.h>
-#include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-au1x00/au1xxx_psc.h>
 #include <asm/mach-au1x00/au1xxx_dbdma.h>
+#include <asm/mach-au1x00/au1xxx.h>
 
 #undef OSS_DOCUMENTED_MIXER_SEMANTICS