From: Olaf Hartmann <olaf.hartmann@s1998.tu-chemnitz.de>
The attached patch observes the stir4200 fifo size and will clear the
fifo, if the size is increasing, while it should be transmitting bytes
Signed-off-by: Samuel Ortiz <samuel@sortiz.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
 };
 
 enum StirFifoCtlMask {
-       FIFOCTL_EOF = 0x80,
-       FIFOCTL_UNDER = 0x40,
-       FIFOCTL_OVER = 0x20,
        FIFOCTL_DIR = 0x10,
        FIFOCTL_CLR = 0x08,
        FIFOCTL_EMPTY = 0x04,
 {
        int err;
        unsigned long count, status;
+       unsigned long prev_count = 0x1fff;
 
        /* Read FIFO status and count */
-       for(;;) {
+       for (;; prev_count = count) {
                err = read_reg(stir, REG_FIFOCTL, stir->fifo_status, 
                                   FIFO_REGS_SIZE);
                if (unlikely(err != FIFO_REGS_SIZE)) {
                if (space >= 0 && STIR_FIFO_SIZE - 4 > space + count)
                        return 0;
 
+               /* queue confused */
+               if (prev_count < count)
+                       break;
+
                /* estimate transfer time for remaining chars */
                msleep((count * 8000) / stir->speed);
        }