ARM: OMAP: Mux update

Sync with linux-omap tree. Improves the locking for pin multiplexing.

Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/mach-omap/mux.c b/arch/arm/mach-omap/mux.c
index bcf3c6e5ecd06802b3a11d3ad85250f0dd21a95b..b8284ad5653812eca64b25b5f1b760482070d09b 100644 (file)
--- a/arch/arm/mach-omap/mux.c
+++ b/arch/arm/mach-omap/mux.c
@@ -55,17 +55,11 @@ omap_cfg_reg(const reg_cfg_t reg_cfg)
 
        cfg = &reg_cfg_table[reg_cfg];
 
-       /*
-        * We do a pretty long section here with lock on, but pin muxing
-        * should only happen on driver init for each driver, so it's not time
-        * critical.
-        */
-       spin_lock_irqsave(&mux_spin_lock, flags);
-
        /* Check the mux register in question */
        if (cfg->mux_reg) {
                unsigned        tmp1, tmp2;
 
+               spin_lock_irqsave(&mux_spin_lock, flags);
                reg_orig = omap_readl(cfg->mux_reg);
 
                /* The mux registers always seem to be 3 bits long */
@@ -80,11 +74,13 @@ omap_cfg_reg(const reg_cfg_t reg_cfg)
                        warn = 1;
 
                omap_writel(reg, cfg->mux_reg);
+               spin_unlock_irqrestore(&mux_spin_lock, flags);
        }
 
        /* Check for pull up or pull down selection on 1610 */
        if (!cpu_is_omap1510()) {
                if (cfg->pu_pd_reg && cfg->pull_val) {
+                       spin_lock_irqsave(&mux_spin_lock, flags);
                        pu_pd_orig = omap_readl(cfg->pu_pd_reg);
                        mask = 1 << cfg->pull_bit;
 
@@ -100,11 +96,13 @@ omap_cfg_reg(const reg_cfg_t reg_cfg)
                                pu_pd = pu_pd_orig & ~mask;
                        }
                        omap_writel(pu_pd, cfg->pu_pd_reg);
+                       spin_unlock_irqrestore(&mux_spin_lock, flags);
                }
        }
 
        /* Check for an associated pull down register */
        if (cfg->pull_reg) {
+               spin_lock_irqsave(&mux_spin_lock, flags);
                pull_orig = omap_readl(cfg->pull_reg);
                mask = 1 << cfg->pull_bit;
 
@@ -121,6 +119,7 @@ omap_cfg_reg(const reg_cfg_t reg_cfg)
                }
 
                omap_writel(pull, cfg->pull_reg);
+               spin_unlock_irqrestore(&mux_spin_lock, flags);
        }
 
        if (warn) {
@@ -149,8 +148,6 @@ omap_cfg_reg(const reg_cfg_t reg_cfg)
        }
 #endif
 
-       spin_unlock_irqrestore(&mux_spin_lock, flags);
-
 #ifdef CONFIG_OMAP_MUX_ERRORS
        return warn ? -ETXTBSY : 0;
 #else

diff --git a/include/asm-arm/arch-omap/mux.h b/include/asm-arm/arch-omap/mux.h
index 39f99decbb7ba2f64d69108ea7b5a7f579f4554d..cfc1c02b4e0891fe59eee559111538851a0b63e5 100644 (file)
--- a/include/asm-arm/arch-omap/mux.h
+++ b/include/asm-arm/arch-omap/mux.h
@@ -332,7 +332,7 @@ typedef enum {
  * Table of various FUNC_MUX and PULL_DWN combinations for each device.
  * See also reg_cfg_t above for the lookup table.
  */
-static reg_cfg_set __initdata_or_module
+static const reg_cfg_set __initdata_or_module
 reg_cfg_table[] = {
 /*
  *      description            mux  mode   mux  pull pull  pull  pu_pd  pu  dbg
@@ -503,7 +503,7 @@ MUX_CFG("Y10_USB0_SUSP",     B,   3,     5,   2,  17,   0,    2,     0,  1)
 MUX_CFG("W9_USB2_TXEN",                 B,   9,     1,  NA,   0,   0,   NA,     0,  1)
 MUX_CFG("AA9_USB2_VP",          B,   6,     1,  NA,   0,   0,   NA,     0,  1)
 MUX_CFG("Y5_USB2_RCV",          C,  21,     1,  NA,   0,   0,   NA,     0,  1)
-MUX_CFG("R8_USB2_VM",           C,  18,     1,  NA,   0,   0,   NA,     0,  1)
+MUX_CFG("R9_USB2_VM",           C,  18,     1,  NA,   0,   0,   NA,     0,  1)
 MUX_CFG("V6_USB2_TXD",          C,  27,     2,  NA,   0,   0,   NA,     0,  1)
 MUX_CFG("W5_USB2_SE0",          C,  24,     2,  NA,   0,   0,   NA,     0,  1)