]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
Pad irq_desc to internode cacheline size
authorRavikiran G Thirumalai <kiran@scalex86.org>
Tue, 8 May 2007 07:29:13 +0000 (00:29 -0700)
committerLinus Torvalds <torvalds@woody.linux-foundation.org>
Tue, 8 May 2007 18:15:09 +0000 (11:15 -0700)
We noticed a drop in n/w performance due to the irq_desc being cacheline
aligned rather than internode aligned.  We see 50% of expected performance
when two e1000 nics local to two different nodes have consecutive irq
descriptors allocated, due to false sharing.

Note that this patch does away with cacheline padding for the UP case, as
it does not seem useful for UP configurations.

Signed-off-by: Ravikiran Thirumalai <kiran@scalex86.org>
Signed-off-by: Shai Fultheim <shai@scalex86.org>
Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
include/linux/irq.h
kernel/irq/handle.c

index a6899402b5220233c53fe926655d788b2dce7f1c..1695054e8c63909a62b8e12d16fe5ca1c8cc625c 100644 (file)
@@ -147,8 +147,6 @@ struct irq_chip {
  * @dir:               /proc/irq/ procfs entry
  * @affinity_entry:    /proc/irq/smp_affinity procfs entry on SMP
  * @name:              flow handler name for /proc/interrupts output
- *
- * Pad this out to 32 bytes for cache and indexing reasons.
  */
 struct irq_desc {
        irq_flow_handler_t      handle_irq;
@@ -175,7 +173,7 @@ struct irq_desc {
        struct proc_dir_entry   *dir;
 #endif
        const char              *name;
-} ____cacheline_aligned;
+} ____cacheline_internodealigned_in_smp;
 
 extern struct irq_desc irq_desc[NR_IRQS];
 
index aff1f0fabb0df0b462c0d83ea4eb35d0ecc24fe0..515ad40bde15a874ea7471ceef32f8978a317cfd 100644 (file)
@@ -48,7 +48,7 @@ handle_bad_irq(unsigned int irq, struct irq_desc *desc)
  *
  * Controller mappings for all interrupt sources:
  */
-struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned = {
+struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = {
        [0 ... NR_IRQS-1] = {
                .status = IRQ_DISABLED,
                .chip = &no_irq_chip,