]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
PRCM: Combine 34xx l3_icks and l4_icks
authorHögander Jouni <jouni.hogander@nokia.com>
Mon, 28 Apr 2008 08:29:53 +0000 (11:29 +0300)
committerTony Lindgren <tony@atomide.com>
Wed, 30 Apr 2008 00:31:50 +0000 (17:31 -0700)
E.g dss_l3_ick and dss_l4_ick have same gating control. Having own
clock for both of them causes race condition between enable / disable.

This patch combines this kind of clocks and names new clock as <module>_ick.

Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap2/clock34xx.h
drivers/usb/host/ehci-omap.c

index 4b1dd71f2b36a4af00b2a458cc307bb729d9431d..85afe1e62a5f24e9ba737800edacd0589de5c15b 100644 (file)
@@ -1200,27 +1200,34 @@ static const struct clksel gfx_l3_clksel[] = {
        { .parent = NULL }
 };
 
-static struct clk gfx_l3_fck = {
-       .name           = "gfx_l3_fck",
+/* Virtual parent clock for gfx_l3_ick and gfx_l3_fck */
+static struct clk gfx_l3_ck = {
+       .name           = "gfx_l3_ck",
        .parent         = &l3_ick,
        .init           = &omap2_init_clksel_parent,
        .enable_reg     = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN),
        .enable_bit     = OMAP_EN_GFX_SHIFT,
+       .flags          = CLOCK_IN_OMAP3430ES1,
+       .recalc         = &followparent_recalc,
+};
+
+static struct clk gfx_l3_fck = {
+       .name           = "gfx_l3_fck",
+       .parent         = &gfx_l3_ck,
+       .init           = &omap2_init_clksel_parent,
        .clksel_reg     = OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL),
        .clksel_mask    = OMAP_CLKSEL_GFX_MASK,
        .clksel         = gfx_l3_clksel,
-       .flags          = CLOCK_IN_OMAP3430ES1 | RATE_PROPAGATES,
+       .flags          = CLOCK_IN_OMAP3430ES1 | RATE_PROPAGATES |
+                               PARENT_CONTROLS_CLOCK,
        .clkdm_name     = "gfx_3430es1_clkdm",
        .recalc         = &omap2_clksel_recalc,
 };
 
 static struct clk gfx_l3_ick = {
        .name           = "gfx_l3_ick",
-       .parent         = &l3_ick,
-       .init           = &omap2_init_clk_clkdm,
-       .enable_reg     = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN),
-       .enable_bit     = OMAP_EN_GFX_SHIFT,
-       .flags          = CLOCK_IN_OMAP3430ES1,
+       .parent         = &gfx_l3_ck,
+       .flags          = CLOCK_IN_OMAP3430ES1 | PARENT_CONTROLS_CLOCK,
        .clkdm_name     = "gfx_3430es1_clkdm",
        .recalc         = &followparent_recalc,
 };
@@ -2160,19 +2167,9 @@ static struct clk cam_mclk = {
        .recalc         = &omap2_clksel_recalc,
 };
 
-static struct clk cam_l3_ick = {
-       .name           = "cam_l3_ick",
-       .parent         = &l3_ick,
-       .init           = &omap2_init_clk_clkdm,
-       .enable_reg     = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN),
-       .enable_bit     = OMAP3430_EN_CAM_SHIFT,
-       .flags          = CLOCK_IN_OMAP343X,
-       .clkdm_name     = "cam_clkdm",
-       .recalc         = &followparent_recalc,
-};
-
-static struct clk cam_l4_ick = {
-       .name           = "cam_l4_ick",
+static struct clk cam_ick = {
+       /* Handles both L3 and L4 clocks */
+       .name           = "cam_ick",
        .parent         = &l4_ick,
        .init           = &omap2_init_clk_clkdm,
        .enable_reg     = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN),
@@ -2206,19 +2203,9 @@ static struct clk usbhost_48m_fck = {
        .recalc         = &followparent_recalc,
 };
 
-static struct clk usbhost_l3_ick = {
-       .name           = "usbhost_l3_ick",
-       .parent         = &l3_ick,
-       .init           = &omap2_init_clk_clkdm,
-       .enable_reg     = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN),
-       .enable_bit     = OMAP3430ES2_EN_USBHOST_SHIFT,
-       .flags          = CLOCK_IN_OMAP3430ES2,
-       .clkdm_name     = "usbhost_clkdm",
-       .recalc         = &followparent_recalc,
-};
-
-static struct clk usbhost_l4_ick = {
-       .name           = "usbhost_l4_ick",
+static struct clk usbhost_ick = {
+       /* Handles both L3 and L4 clocks */
+       .name           = "usbhost_ick",
        .parent         = &l4_ick,
        .init           = &omap2_init_clk_clkdm,
        .enable_reg     = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN),
@@ -3094,6 +3081,7 @@ static struct clk *onchip_34xx_clks[] __initdata = {
        &l3_ick,
        &l4_ick,
        &rm_ick,
+       &gfx_l3_ck,
        &gfx_l3_fck,
        &gfx_l3_ick,
        &gfx_cg1_ck,
@@ -3175,12 +3163,10 @@ static struct clk *onchip_34xx_clks[] __initdata = {
        &dss2_alwon_fck,
        &dss_ick,
        &cam_mclk,
-       &cam_l3_ick,
-       &cam_l4_ick,
+       &cam_ick,
        &usbhost_120m_fck,
        &usbhost_48m_fck,
-       &usbhost_l3_ick,
-       &usbhost_l4_ick,
+       &usbhost_ick,
        &usbhost_sar_fck,
        &usim_fck,
        &gpt1_fck,
index 495c9791b6a06f92125c60568dfb6fdd840ea291..8ca21c276ed019a6a4bd1318e09937b3ae4b45ee 100644 (file)
@@ -73,7 +73,7 @@ struct ehci_omap_clock_defs {
 };
 
 /* Clock names as per clock framework: May change so keep as #defs */
-#define USBHOST_ICKL   "usbhost_l4_ick"
+#define USBHOST_ICKL           "usbhost_ick"
 #define USBHOST_120M_FCLK      "usbhost_120m_fck"
 #define USBHOST_48M_FCLK       "usbhost_48m_fck"
 #define USBHOST_TLL_ICKL       "usbtll_ick"