]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
[PATCH] skge: handle Tx/Rx arbiter timeout
authorStephen Hemminger <shemminger@osdl.org>
Mon, 27 Jun 2005 18:33:14 +0000 (11:33 -0700)
committerJeff Garzik <jgarzik@pobox.com>
Mon, 27 Jun 2005 22:05:07 +0000 (18:05 -0400)
Need to handle receive and transmit packet arbiter timeouts.
Transmit arbiter timeouts happens when Gigabit sends to 100Mbit port
on same switch and pause occurs.

Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
drivers/net/skge.c
drivers/net/skge.h

index 290d6aa923832267bbee660c0d0b63d54afe94a0..9f24714260bec7977f9f319a2e42451f358b8dfa 100644 (file)
@@ -2731,6 +2731,24 @@ static irqreturn_t skge_intr(int irq, void *dev_id, struct pt_regs *regs)
        if (status & IS_XA2_F)
                skge_tx_intr(hw->dev[1]);
 
+       if (status & IS_PA_TO_RX1) {
+               struct skge_port *skge = netdev_priv(hw->dev[0]);
+               ++skge->net_stats.rx_over_errors;
+               skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_RX1);
+       }
+
+       if (status & IS_PA_TO_RX2) {
+               struct skge_port *skge = netdev_priv(hw->dev[1]);
+               ++skge->net_stats.rx_over_errors;
+               skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_RX2);
+       }
+
+       if (status & IS_PA_TO_TX1)
+               skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_TX1);
+
+       if (status & IS_PA_TO_TX2)
+               skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_TX2);
+
        if (status & IS_MAC1)
                skge_mac_intr(hw, 0);
 
index ba6dfd2f01d87227d8ee40b44a7edcf94573671c..37323cd29e7e194ca721c9cf5a7281421eab931c 100644 (file)
@@ -203,8 +203,11 @@ enum {
        IS_XA2_F        = 1<<1,         /* Q_XA2 End of Frame */
        IS_XA2_C        = 1<<0,         /* Q_XA2 Encoding Error */
 
-       IS_PORT_1       = IS_XA1_F| IS_R1_F| IS_MAC1,
-       IS_PORT_2       = IS_XA2_F| IS_R2_F| IS_MAC2,
+       IS_TO_PORT1     = IS_PA_TO_RX1 | IS_PA_TO_TX1,
+       IS_TO_PORT2     = IS_PA_TO_RX2 | IS_PA_TO_TX2,
+
+       IS_PORT_1       = IS_XA1_F| IS_R1_F | IS_TO_PORT1 | IS_MAC1,
+       IS_PORT_2       = IS_XA2_F| IS_R2_F | IS_TO_PORT2 | IS_MAC2,
 };