Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
                  | (0 * SARMODE0_SHADEN) /* We don't use shadow registers. */
                  | (1 * SARMODE0_INTMODE_READCLEAR)
                  | (1 * SARMODE0_CWRE)
-                 | IS_FS50(dev)?SARMODE0_PRPWT_FS50_5: 
-                                SARMODE0_PRPWT_FS155_3
+                 | (IS_FS50(dev) ? SARMODE0_PRPWT_FS50_5:
+                         SARMODE0_PRPWT_FS155_3)
                  | (1 * SARMODE0_CALSUP_1)
-                 | IS_FS50 (dev)?(0
+                 | (IS_FS50(dev) ? (0
                                   | SARMODE0_RXVCS_32
                                   | SARMODE0_ABRVCS_32 
                                   | SARMODE0_TXVCS_32):
                                  (0
                                   | SARMODE0_RXVCS_1k
                                   | SARMODE0_ABRVCS_1k 
-                                  | SARMODE0_TXVCS_1k));
+                                  | SARMODE0_TXVCS_1k)));
 
        /* 10ms * 100 is 1 second. That should be enough, as AN3:9 says it takes
           1ms. */