/* The routine to call when the Guest pings us. */
void (*handle_output)(int fd, struct virtqueue *me);
+
+ /* Outstanding buffers */
+ unsigned int inflight;
};
/* Remember the arguments to the program so we can "reboot" */
errx(1, "Looped descriptor");
} while ((i = next_desc(vq, i)) != vq->vring.num);
+ vq->inflight++;
return head;
}
/* Make sure buffer is written before we update index. */
wmb();
vq->vring.used->idx++;
+ vq->inflight--;
}
/* This actually sends the interrupt for this virtqueue */
{
unsigned long buf[] = { LHREQ_IRQ, vq->config.irq };
- /* If they don't want an interrupt, don't send one. */
- if (vq->vring.avail->flags & VRING_AVAIL_F_NO_INTERRUPT)
+ /* If they don't want an interrupt, don't send one, unless empty. */
+ if ((vq->vring.avail->flags & VRING_AVAIL_F_NO_INTERRUPT)
+ && vq->inflight)
return;
/* Send the Guest an interrupt tell them we used something up. */
vq->next = NULL;
vq->last_avail_idx = 0;
vq->dev = dev;
+ vq->inflight = 0;
/* Initialize the configuration. */
vq->config.num = num_descs;
/* Tell Guest what MAC address to use. */
add_feature(dev, VIRTIO_NET_F_MAC);
+ add_feature(dev, VIRTIO_F_NOTIFY_ON_EMPTY);
set_config(dev, sizeof(conf), &conf);
/* We don't need the socket any more; setup is done. */
#include <linux/kernel.h>
#include <linux/module.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/blackfin.h>
#include <asm/gptimers.h>
R0 = R0 + R1;
.Lword8_loop_e: W[P0] = R0;
RTS;
-ENDPROC(_outsw)
+ENDPROC(_outsw_8)
{
.modalias = "ad7877",
.platform_data = &bfin_ad7877_ts_info,
- .irq = IRQ_PF6,
+ .irq = IRQ_PF8,
.max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0,
- .chip_select = 1,
+ .chip_select = 2,
.controller_data = &spi_ad7877_chip_info,
},
#endif
#
obj-$(CONFIG_GENERIC_BF537_BOARD) += generic_board.o
-obj-$(CONFIG_BFIN537_STAMP) += stamp.o led.o
+obj-$(CONFIG_BFIN537_STAMP) += stamp.o
obj-$(CONFIG_BFIN537_BLUETECHNIX_CM) += cm_bf537.o
obj-$(CONFIG_PNAV10) += pnav10.o
obj-$(CONFIG_CAMSIG_MINOTAUR) += minotaur.o
+++ /dev/null
-/****************************************************
- * LED1 ---- PF6 LED2 ---- PF7 *
- * LED3 ---- PF8 LED4 ---- PF9 *
- * LED5 ---- PF10 LED6 ---- PF11 *
- ****************************************************/
-
-#include <linux/linkage.h>
-#include <asm/blackfin.h>
-
-/* All functions in this file save the registers they uses.
- So there is no need to save any registers before calling them. */
-
- .text;
-
-/* Initialize LEDs. */
-
-ENTRY(_led_init)
- LINK 12;
- [--SP] = P0;
- [--SP] = R0;
- [--SP] = R1;
- [--SP] = R2;
- R1 = PF6|PF7|PF8|PF9|PF10|PF11 (Z);
- R2 = ~R1;
-
- P0.H = hi(PORTF_FER);
- P0.L = lo(PORTF_FER);
- R0 = W[P0](Z);
- SSYNC;
- R0 = R0 & R2;
- W[P0] = R0.L;
- SSYNC;
-
- P0.H = hi(PORTFIO_DIR);
- P0.L = lo(PORTFIO_DIR);
- R0 = W[P0](Z);
- SSYNC;
- R0 = R0 | R1;
- W[P0] = R0.L;
- SSYNC;
-
- P0.H = hi(PORTFIO_INEN);
- P0.L = lo(PORTFIO_INEN);
- R0 = W[P0](Z);
- SSYNC;
- R0 = R0 & R2;
- W[P0] = R0.L;
- SSYNC;
-
- R2 = [SP++];
- R1 = [SP++];
- R0 = [SP++];
- P0 = [SP++];
- UNLINK;
- RTS;
- .size _led_init, .-_led_init
-
-/* Set one LED on. Leave other LEDs unchanged.
- It expects the LED number passed through R0. */
-
-ENTRY(_led_on)
- LINK 12;
- [--SP] = P0;
- [--SP] = R1;
- CALL _led_init;
- R1 = 1;
- R0 += 5;
- R1 <<= R0;
- P0.H = hi(PORTFIO);
- P0.L = lo(PORTFIO);
- R0 = W[P0](Z);
- SSYNC;
- R0 = R0 | R1;
- W[P0] = R0.L;
- SSYNC;
- R1 = [SP++];
- P0 = [SP++];
- UNLINK;
- RTS;
- .size _led_on, .-_led_on
-
-/* Set one LED off. Leave other LEDs unchanged. */
-
-ENTRY(_led_off)
- LINK 12;
- [--SP] = P0;
- [--SP] = R1;
- CALL _led_init;
- R1 = 1;
- R0 += 5;
- R1 <<= R0;
- R1 = ~R1;
- P0.H = hi(PORTFIO);
- P0.L = lo(PORTFIO);
- R0 = W[P0](Z);
- SSYNC;
- R0 = R0 & R1;
- W[P0] = R0.L;
- SSYNC;
- R1 = [SP++];
- P0 = [SP++];
- UNLINK;
- RTS;
- .size _led_off, .-_led_off
-
-/* Toggle one LED. Leave other LEDs unchanged. */
-
-ENTRY(_led_toggle)
- LINK 12;
- [--SP] = P0;
- [--SP] = R1;
- CALL _led_init;
- R1 = 1;
- R0 += 5;
- R1 <<= R0;
- P0.H = hi(PORTFIO);
- P0.L = lo(PORTFIO);
- R0 = W[P0](Z);
- SSYNC;
- R0 = R0 ^ R1;
- W[P0] = R0.L;
- SSYNC;
- R1 = [SP++];
- P0 = [SP++];
- UNLINK;
- RTS;
- .size _led_toggle, .-_led_toggle
-
-/* Display the number using LEDs in binary format. */
-
-ENTRY(_led_disp_num)
- LINK 12;
- [--SP] = P0;
- [--SP] = R1;
- [--SP] = R2;
- CALL _led_init;
- R1 = 0x3f(X);
- R0 = R0 & R1;
- R2 = 6(X);
- R0 <<= R2;
- R1 <<= R2;
- P0.H = hi(PORTFIO);
- P0.L = lo(PORTFIO);
- R2 = W[P0](Z);
- SSYNC;
- R1 = ~R1;
- R2 = R2 & R1;
- R2 = R2 | R0;
- W[P0] = R2.L;
- SSYNC;
- R2 = [SP++];
- R1 = [SP++];
- P0 = [SP++];
- UNLINK;
- RTS;
- .size _led_disp_num, .-_led_disp_num
-
-/* Toggle the number using LEDs in binary format. */
-
-ENTRY(_led_toggle_num)
- LINK 12;
- [--SP] = P0;
- [--SP] = R1;
- [--SP] = R2;
- CALL _led_init;
- R1 = 0x3f(X);
- R0 = R0 & R1;
- R1 = 6(X);
- R0 <<= R1;
- P0.H = hi(PORTFIO);
- P0.L = lo(PORTFIO);
- R1 = W[P0](Z);
- SSYNC;
- R1 = R1 ^ R0;
- W[P0] = R1.L;
- SSYNC;
- R2 = [SP++];
- R1 = [SP++];
- P0 = [SP++];
- UNLINK;
- RTS;
- .size _led_toggle_num, .-_led_toggle_num
-
# arch/blackfin/mach-bf548/boards/Makefile
#
-obj-$(CONFIG_BFIN548_EZKIT) += ezkit.o led.o
+obj-$(CONFIG_BFIN548_EZKIT) += ezkit.o
obj-$(CONFIG_BFIN548_BLUETECHNIX_CM) += cm_bf548.o
static int __init cm_bf548_init(void)
{
- printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
+ printk(KERN_INFO "%s(): registering device resources\n", __func__);
platform_add_devices(cm_bf548_devices, ARRAY_SIZE(cm_bf548_devices));
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
+++ /dev/null
-/****************************************************
- * LED1 ---- PG6 LED2 ---- PG7 *
- * LED3 ---- PG8 LED4 ---- PG9 *
- * LED5 ---- PG10 LED6 ---- PG11 *
- ****************************************************/
-
-#include <linux/linkage.h>
-#include <asm/blackfin.h>
-
-/* All functions in this file save the registers they uses.
- So there is no need to save any registers before calling them. */
-
- .text;
-
-/* Initialize LEDs. */
-
-ENTRY(_led_init)
- LINK 0;
- [--SP] = P0;
- [--SP] = R0;
- [--SP] = R1;
- [--SP] = R2;
- R1 = (PG6|PG7|PG8|PG9|PG10|PG11)(Z);
- R2 = ~R1;
-
- P0.H = hi(PORTG_FER);
- P0.L = lo(PORTG_FER);
- R0 = W[P0](Z);
- SSYNC;
- R0 = R0 & R2;
- W[P0] = R0.L;
- SSYNC;
-
- P0.H = hi(PORTG_DIR_SET);
- P0.L = lo(PORTG_DIR_SET);
- W[P0] = R1.L;
- SSYNC;
-
- P0.H = hi(PORTG_INEN);
- P0.L = lo(PORTG_INEN);
- R0 = W[P0](Z);
- SSYNC;
- R0 = R0 & R2;
- W[P0] = R0.L;
- SSYNC;
-
- R2 = [SP++];
- R1 = [SP++];
- R0 = [SP++];
- P0 = [SP++];
- RTS;
- .size _led_init, .-_led_init
-
-/* Set one LED on. Leave other LEDs unchanged.
- It expects the LED number passed through R0. */
-
-ENTRY(_led_on)
- LINK 0;
- [--SP] = P0;
- [--SP] = R1;
- CALL _led_init;
- R1 = 1;
- R0 += 5;
- R1 <<= R0;
- P0.H = hi(PORTG_SET);
- P0.L = lo(PORTG_SET);
- W[P0] = R1.L;
- SSYNC;
- R1 = [SP++];
- P0 = [SP++];
- UNLINK;
- RTS;
- .size _led_on, .-_led_on
-
-/* Set one LED off. Leave other LEDs unchanged. */
-
-ENTRY(_led_off)
- LINK 0;
- [--SP] = P0;
- [--SP] = R1;
- CALL _led_init;
- R1 = 1;
- R0 += 5;
- R1 <<= R0;
- P0.H = hi(PORTG_CLEAR);
- P0.L = lo(PORTG_CLEAR);
- W[P0] = R1.L;
- SSYNC;
- R1 = [SP++];
- P0 = [SP++];
- UNLINK;
- RTS;
- .size _led_off, .-_led_off
-
-/* Toggle one LED. Leave other LEDs unchanged. */
-
-ENTRY(_led_toggle)
- LINK 0;
- [--SP] = P0;
- [--SP] = R1;
- CALL _led_init;
- R1 = 1;
- R0 += 5;
- R1 <<= R0;
- P0.H = hi(PORTG);
- P0.L = lo(PORTG);
- R0 = W[P0](Z);
- SSYNC;
- R0 = R0 ^ R1;
- W[P0] = R0.L;
- SSYNC;
- R1 = [SP++];
- P0 = [SP++];
- UNLINK;
- RTS;
- .size _led_toggle, .-_led_toggle
-
-/* Display the number using LEDs in binary format. */
-
-ENTRY(_led_disp_num)
- LINK 0;
- [--SP] = P0;
- [--SP] = R1;
- [--SP] = R2;
- CALL _led_init;
- R1 = 0x3f(X);
- R0 = R0 & R1;
- R2 = 6(X);
- R0 <<= R2;
- R1 <<= R2;
- P0.H = hi(PORTG);
- P0.L = lo(PORTG);
- R2 = W[P0](Z);
- SSYNC;
- R1 = ~R1;
- R2 = R2 & R1;
- R2 = R2 | R0;
- W[P0] = R2.L;
- SSYNC;
- R2 = [SP++];
- R1 = [SP++];
- P0 = [SP++];
- UNLINK;
- RTS;
- .size _led_disp_num, .-_led_disp_num
-
-/* Toggle the number using LEDs in binary format. */
-
-ENTRY(_led_toggle_num)
- LINK 0;
- [--SP] = P0;
- [--SP] = R1;
- [--SP] = R2;
- CALL _led_init;
- R1 = 0x3f(X);
- R0 = R0 & R1;
- R1 = 6(X);
- R0 <<= R1;
- P0.H = hi(PORTG);
- P0.L = lo(PORTG);
- R1 = W[P0](Z);
- SSYNC;
- R1 = R1 ^ R0;
- W[P0] = R1.L;
- SSYNC;
- R2 = [SP++];
- R1 = [SP++];
- P0 = [SP++];
- UNLINK;
- RTS;
- .size _led_toggle_num, .-_led_toggle_num
-
dma@c300 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "fsl,mpc8610-dma", "fsl,mpc8540-dma";
+ compatible = "fsl,mpc8610-dma", "fsl,eloplus-dma";
cell-index = <1>;
reg = <0xc300 0x4>; /* DMA general status register */
ranges = <0x0 0xc100 0x200>;
dma-channel@0 {
compatible = "fsl,mpc8610-dma-channel",
- "fsl,mpc8540-dma-channel";
+ "fsl,eloplus-dma-channel";
cell-index = <0>;
reg = <0x0 0x80>;
interrupt-parent = <&mpic>;
};
dma-channel@1 {
compatible = "fsl,mpc8610-dma-channel",
- "fsl,mpc8540-dma-channel";
+ "fsl,eloplus-dma-channel";
cell-index = <1>;
reg = <0x80 0x80>;
interrupt-parent = <&mpic>;
};
dma-channel@2 {
compatible = "fsl,mpc8610-dma-channel",
- "fsl,mpc8540-dma-channel";
+ "fsl,eloplus-dma-channel";
cell-index = <2>;
reg = <0x100 0x80>;
interrupt-parent = <&mpic>;
};
dma-channel@3 {
compatible = "fsl,mpc8610-dma-channel",
- "fsl,mpc8540-dma-channel";
+ "fsl,eloplus-dma-channel";
cell-index = <3>;
reg = <0x180 0x80>;
interrupt-parent = <&mpic>;
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.25-rc6
-# Tue Mar 25 10:25:48 2008
+# Linux kernel version: 2.6.26-rc3
+# Tue May 27 16:08:06 2008
#
CONFIG_PPC64=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_HAVE_SETUP_PER_CPU_AREA=y
CONFIG_IRQ_PER_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_ARCH_HAS_ILOG2_U32=y
CONFIG_ARCH_HAS_ILOG2_U64=y
CONFIG_SYSCTL=y
# CONFIG_EMBEDDED is not set
CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
# CONFIG_KPROBES is not set
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_DMA_ATTRS is not set
CONFIG_PROC_PAGE_MONITOR=y
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
CONFIG_PPC_PASEMI_IOMMU=y
# CONFIG_PPC_PASEMI_IOMMU_DMA_FORCE is not set
CONFIG_PPC_PASEMI_MDIO=y
-# CONFIG_PPC_CELLEB is not set
# CONFIG_PPC_PS3 is not set
# CONFIG_PPC_CELL is not set
# CONFIG_PPC_CELL_NATIVE is not set
# CONFIG_PPC_IBM_CELL_BLADE is not set
+# CONFIG_PPC_CELLEB is not set
# CONFIG_PQ2ADS is not set
CONFIG_PPC_NATIVE=y
# CONFIG_IPIC is not set
CONFIG_CPU_FREQ_STAT=y
# CONFIG_CPU_FREQ_STAT_DETAILS is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
CONFIG_BINFMT_ELF=y
CONFIG_COMPAT_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
-CONFIG_FORCE_MAX_ZONEORDER=9
CONFIG_HUGETLB_PAGE_SIZE_VARIABLE=y
CONFIG_IOMMU_VMERGE=y
CONFIG_IOMMU_HELPER=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
+CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_RESOURCES_64BIT=y
CONFIG_ZONE_DMA_FLAG=1
CONFIG_BOUNCE=y
CONFIG_PPC_HAS_HASH_64K=y
CONFIG_PPC_64K_PAGES=y
+CONFIG_FORCE_MAX_ZONEORDER=9
# CONFIG_PPC_SUBPAGE_PROT is not set
# CONFIG_SCHED_SMT is not set
CONFIG_PROC_DEVICETREE=y
# CONFIG_YENTA is not set
# CONFIG_PD6729 is not set
# CONFIG_I82092 is not set
-# CONFIG_ELECTRA_CF is not set
+CONFIG_ELECTRA_CF=y
# CONFIG_HOTPLUG_PCI is not set
+# CONFIG_HAS_RAPIDIO is not set
+CONFIG_PAGE_OFFSET=0xc000000000000000
CONFIG_KERNEL_START=0xc000000000000000
+CONFIG_PHYSICAL_START=0x00000000
#
# Networking
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
#
# CONFIG_MTD_UBI is not set
CONFIG_OF_DEVICE=y
+CONFIG_OF_I2C=y
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_FD is not set
#
# IDE chipset support/bugfixes
#
-# CONFIG_IDE_GENERIC is not set
# CONFIG_BLK_DEV_PLATFORM is not set
#
# CONFIG_BLK_DEV_VIA82CXXX is not set
# CONFIG_BLK_DEV_TC86C001 is not set
# CONFIG_BLK_DEV_IDEDMA is not set
-CONFIG_IDE_ARCH_OBSOLETE_INIT=y
+# CONFIG_BLK_DEV_HD_ONLY is not set
# CONFIG_BLK_DEV_HD is not set
#
# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
CONFIG_ATA=y
# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_SATA_PMP=y
# CONFIG_SATA_AHCI is not set
+CONFIG_SATA_SIL24=y
+CONFIG_ATA_SFF=y
# CONFIG_SATA_SVW is not set
# CONFIG_ATA_PIIX is not set
CONFIG_SATA_MV=y
# CONFIG_SATA_PROMISE is not set
# CONFIG_SATA_SX4 is not set
# CONFIG_SATA_SIL is not set
-CONFIG_SATA_SIL24=y
# CONFIG_SATA_SIS is not set
# CONFIG_SATA_ULI is not set
# CONFIG_SATA_VIA is not set
# CONFIG_PATA_WINBOND is not set
CONFIG_PATA_PLATFORM=y
CONFIG_PATA_OF_PLATFORM=y
+# CONFIG_PATA_SCH is not set
CONFIG_MD=y
CONFIG_BLK_DEV_MD=y
CONFIG_MD_LINEAR=y
# CONFIG_SIS190 is not set
# CONFIG_SKGE is not set
# CONFIG_SKY2 is not set
-# CONFIG_SK98LIN is not set
# CONFIG_VIA_VELOCITY is not set
CONFIG_TIGON3=y
# CONFIG_BNX2 is not set
# CONFIG_MLX4_CORE is not set
# CONFIG_TEHUTI is not set
# CONFIG_BNX2X is not set
+# CONFIG_SFC is not set
# CONFIG_TR is not set
#
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
#
# USB Network Adapters
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_NOZOMI is not set
# CONFIG_IPMI_HANDLER is not set
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_PASEMI=y
-# CONFIG_GEN_RTC is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
-
-#
-# I2C Algorithms
-#
CONFIG_I2C_ALGOBIT=y
-CONFIG_I2C_ALGOPCF=y
-CONFIG_I2C_ALGOPCA=y
#
# I2C Hardware Bus support
# CONFIG_I2C_VIA is not set
# CONFIG_I2C_VIAPRO is not set
# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
#
# Miscellaneous I2C Chip support
# CONFIG_SENSORS_PCF8574 is not set
# CONFIG_PCF8575 is not set
# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_TPS65010 is not set
# CONFIG_SENSORS_MAX6875 is not set
# CONFIG_SENSORS_TSL2550 is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_I2C_DEBUG_CHIP is not set
-
-#
-# SPI support
-#
# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
CONFIG_HWMON=y
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
#
# Multimedia devices
#
+
+#
+# Multimedia core support
+#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
CONFIG_DAB=y
# CONFIG_USB_DABUSB is not set
# CONFIG_FB_SYS_FILLRECT is not set
# CONFIG_FB_SYS_COPYAREA is not set
# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
# CONFIG_FB_SYS_FOPS is not set
-CONFIG_FB_DEFERRED_IO=y
# CONFIG_FB_SVGALIB is not set
CONFIG_FB_MACMODES=y
CONFIG_FB_BACKLIGHT=y
# CONFIG_SND_AU8810 is not set
# CONFIG_SND_AU8820 is not set
# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AW2 is not set
# CONFIG_SND_AZT3328 is not set
# CONFIG_SND_BT87X is not set
# CONFIG_SND_CA0106 is not set
# CONFIG_SND_SOC is not set
#
-# SoC Audio support for SuperH
+# ALSA SoC audio for Freescale SOCs
#
#
-# ALSA SoC audio for Freescale SOCs
+# SoC Audio for the Texas Instruments OMAP
#
#
#
# USB Host Controller Drivers
#
+# CONFIG_USB_C67X00_HCD is not set
CONFIG_USB_EHCI_HCD=y
# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
# CONFIG_USB_EHCI_TT_NEWSCHED is not set
CONFIG_USB_EHCI_HCD_PPC_OF=y
# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
CONFIG_USB_OHCI_HCD=y
# CONFIG_USB_OHCI_HCD_PPC_OF is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
#
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
# CONFIG_USB_STORAGE_ALAUDA is not set
# CONFIG_USB_STORAGE_ONETOUCH is not set
# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
CONFIG_USB_LIBUSUAL=y
#
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set
CONFIG_EDAC=y
# on-CPU RTC drivers
#
# CONFIG_DMADEVICES is not set
-
-#
-# Userspace I/O
-#
# CONFIG_UIO is not set
#
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
CONFIG_NFSD=y
CONFIG_NFSD_V3=y
# CONFIG_NFSD_V3_ACL is not set
CONFIG_NFSD_V4=y
-CONFIG_NFSD_TCP=y
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
# Library routines
#
CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
CONFIG_CRC_CCITT=y
# CONFIG_CRC16 is not set
-# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC_ITU_T=y
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
CONFIG_LIBCRC32C=m
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
#
# Kernel hacking
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=2048
CONFIG_MAGIC_SYSRQ=y
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_SCHED_DEBUG is not set
# CONFIG_SCHEDSTATS is not set
# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_SLUB_DEBUG_ON is not set
# CONFIG_SLUB_STATS is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_BOOT_PRINTK_DELAY is not set
CONFIG_ASYNC_MEMCPY=y
CONFIG_ASYNC_XOR=y
CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_AEAD=y
CONFIG_CRYPTO_BLKCIPHER=y
-# CONFIG_CRYPTO_SEQIV is not set
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_AUTHENC=y
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
CONFIG_CRYPTO_HMAC=y
# CONFIG_CRYPTO_XCBC is not set
-# CONFIG_CRYPTO_NULL is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=y
-# CONFIG_CRYPTO_WP512 is not set
# CONFIG_CRYPTO_TGR192 is not set
-# CONFIG_CRYPTO_GF128MUL is not set
-# CONFIG_CRYPTO_ECB is not set
-CONFIG_CRYPTO_CBC=y
-# CONFIG_CRYPTO_PCBC is not set
-# CONFIG_CRYPTO_LRW is not set
-# CONFIG_CRYPTO_XTS is not set
-# CONFIG_CRYPTO_CTR is not set
-# CONFIG_CRYPTO_GCM is not set
-# CONFIG_CRYPTO_CCM is not set
-# CONFIG_CRYPTO_CRYPTD is not set
-CONFIG_CRYPTO_DES=y
-# CONFIG_CRYPTO_FCRYPT is not set
-CONFIG_CRYPTO_BLOWFISH=y
-# CONFIG_CRYPTO_TWOFISH is not set
-# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_BLOWFISH=y
+# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_TEA is not set
-# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_KHAZAD is not set
-# CONFIG_CRYPTO_ANUBIS is not set
-# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
# CONFIG_CRYPTO_DEFLATE is not set
-# CONFIG_CRYPTO_MICHAEL_MIC is not set
-# CONFIG_CRYPTO_CRC32C is not set
-# CONFIG_CRYPTO_CAMELLIA is not set
-# CONFIG_CRYPTO_TEST is not set
-CONFIG_CRYPTO_AUTHENC=y
# CONFIG_CRYPTO_LZO is not set
CONFIG_CRYPTO_HW=y
# CONFIG_CRYPTO_DEV_HIFN_795X is not set
# CONFIG_PPC_CLOCK is not set
+# CONFIG_VIRTUALIZATION is not set
long long __ashldi3(long long, int);
long long __lshrdi3(long long, int);
+EXPORT_SYMBOL(empty_zero_page);
EXPORT_SYMBOL(clear_pages);
EXPORT_SYMBOL(clear_user_page);
+EXPORT_SYMBOL(copy_page);
EXPORT_SYMBOL(transfer_to_handler);
EXPORT_SYMBOL(do_IRQ);
EXPORT_SYMBOL(machine_check_exception);
int vector = FIRST_EXTERNAL_VECTOR + i;
if (vector != SYSCALL_VECTOR) {
set_intr_gate(vector, interrupt[i]);
- set_irq_chip_and_handler(i, &lguest_irq_controller,
- handle_level_irq);
+ set_irq_chip_and_handler_name(i, &lguest_irq_controller,
+ handle_level_irq,
+ "level");
}
}
/* This call is required to set up for 4k stacks, where we have
{ PCI_VDEVICE(NVIDIA, 0x0bcd), board_ahci }, /* MCP7B */
{ PCI_VDEVICE(NVIDIA, 0x0bce), board_ahci }, /* MCP7B */
{ PCI_VDEVICE(NVIDIA, 0x0bcf), board_ahci }, /* MCP7B */
- { PCI_VDEVICE(NVIDIA, 0x0bd0), board_ahci }, /* MCP7B */
- { PCI_VDEVICE(NVIDIA, 0x0bd1), board_ahci }, /* MCP7B */
- { PCI_VDEVICE(NVIDIA, 0x0bd2), board_ahci }, /* MCP7B */
- { PCI_VDEVICE(NVIDIA, 0x0bd3), board_ahci }, /* MCP7B */
+ { PCI_VDEVICE(NVIDIA, 0x0bc4), board_ahci }, /* MCP7B */
+ { PCI_VDEVICE(NVIDIA, 0x0bc5), board_ahci }, /* MCP7B */
+ { PCI_VDEVICE(NVIDIA, 0x0bc6), board_ahci }, /* MCP7B */
+ { PCI_VDEVICE(NVIDIA, 0x0bc7), board_ahci }, /* MCP7B */
/* SiS */
{ PCI_VDEVICE(SI, 0x1184), board_ahci }, /* SiS 966 */
{ 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* SATA Controller 2 IDE (ICH8) */
{ 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
- /* Mobile SATA Controller IDE (ICH8M) */
- { 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* Mobile SATA Controller IDE (ICH8M), Apple */
{ 0x8086, 0x2828, 0x106b, 0x00a0, 0, 0, ich8m_apple_sata },
+ { 0x8086, 0x2828, 0x106b, 0x00a1, 0, 0, ich8m_apple_sata },
+ /* Mobile SATA Controller IDE (ICH8M) */
+ { 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* SATA Controller IDE (ICH9) */
{ 0x8086, 0x2920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* SATA Controller IDE (ICH9) */
[ich8m_apple_sata] =
{
- .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR,
+ .flags = PIIX_SATA_FLAGS,
.pio_mask = 0x1f, /* pio0-4 */
.mwdma_mask = 0x07, /* mwdma0-2 */
.udma_mask = ATA_UDMA6,
*/
static void ata_finalize_port_ops(struct ata_port_operations *ops)
{
- static spinlock_t lock = SPIN_LOCK_UNLOCKED;
+ static DEFINE_SPINLOCK(lock);
const struct ata_port_operations *cur;
void **begin = (void **)ops;
void **end = (void **)&ops->inherits;
if (vendor == 0x1095 && devid == 0x3726) {
/* sil3726 quirks */
ata_port_for_each_link(link, ap) {
- /* class code report is unreliable */
+ /* Class code report is unreliable and SRST
+ * times out under certain configurations.
+ */
if (link->pmp < 5)
- link->flags |= ATA_LFLAG_ASSUME_ATA;
+ link->flags |= ATA_LFLAG_NO_SRST |
+ ATA_LFLAG_ASSUME_ATA;
/* port 5 is for SEMB device and it doesn't like SRST */
if (link->pmp == 5)
/**
* ata_scsi_rbuf_get - Map response buffer.
+ * @cmd: SCSI command containing buffer to be mapped.
* @flags: unsigned long variable to store irq enable status
* @copy_in: copy in from user buffer
*
/**
* ata_msense_rw_recovery - Simulate MODE SENSE r/w error recovery page
- * @bufp: output buffer
+ * @buf: output buffer
*
* Generate a generic MODE SENSE r/w error recovery page.
*
SATA_FSL_HOST_FLAGS = (ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA |
- ATA_FLAG_NCQ),
+ ATA_FLAG_PMP | ATA_FLAG_NCQ),
SATA_FSL_MAX_CMDS = SATA_FSL_QUEUE_DEPTH,
SATA_FSL_CMD_HDR_SIZE = 16, /* 4 DWORDS */
cd = (struct command_desc *)pp->cmdentry + tag;
cd_paddr = pp->cmdentry_paddr + tag * SATA_FSL_CMD_DESC_SIZE;
- ata_tf_to_fis(&qc->tf, 0, 1, (u8 *) &cd->cfis);
+ ata_tf_to_fis(&qc->tf, qc->dev->link->pmp, 1, (u8 *) &cd->cfis);
VPRINTK("Dumping cfis : 0x%x, 0x%x, 0x%x\n",
cd->cfis[0], cd->cfis[1], cd->cfis[2]);
ioread32(CA + hcr_base),
ioread32(CE + hcr_base), ioread32(CC + hcr_base));
+ iowrite32(qc->dev->link->pmp, CQPMP + hcr_base);
+
/* Simply queue command to the controller/device */
iowrite32(1 << tag, CQ + hcr_base);
ioread32(hcr_base + HCONTROL), ioread32(hcr_base + HSTATUS));
}
+static void sata_fsl_pmp_attach(struct ata_port *ap)
+{
+ struct sata_fsl_host_priv *host_priv = ap->host->private_data;
+ void __iomem *hcr_base = host_priv->hcr_base;
+ u32 temp;
+
+ temp = ioread32(hcr_base + HCONTROL);
+ iowrite32((temp | HCONTROL_PMP_ATTACHED), hcr_base + HCONTROL);
+}
+
+static void sata_fsl_pmp_detach(struct ata_port *ap)
+{
+ struct sata_fsl_host_priv *host_priv = ap->host->private_data;
+ void __iomem *hcr_base = host_priv->hcr_base;
+ u32 temp;
+
+ temp = ioread32(hcr_base + HCONTROL);
+ temp &= ~HCONTROL_PMP_ATTACHED;
+ iowrite32(temp, hcr_base + HCONTROL);
+
+ /* enable interrupts on the controller/port */
+ temp = ioread32(hcr_base + HCONTROL);
+ iowrite32((temp | DEFAULT_PORT_IRQ_ENABLE_MASK), hcr_base + HCONTROL);
+
+}
+
static int sata_fsl_port_start(struct ata_port *ap)
{
struct device *dev = ap->host->dev;
struct sata_fsl_port_priv *pp;
- int retval;
void *mem;
dma_addr_t mem_dma;
struct sata_fsl_host_priv *host_priv = ap->host->private_data;
}
static int sata_fsl_softreset(struct ata_link *link, unsigned int *class,
- unsigned long deadline)
+ unsigned long deadline)
{
struct ata_port *ap = link->ap;
struct sata_fsl_port_priv *pp = ap->private_data;
struct sata_fsl_host_priv *host_priv = ap->host->private_data;
void __iomem *hcr_base = host_priv->hcr_base;
+ int pmp = sata_srst_pmp(link);
u32 temp;
struct ata_taskfile tf;
u8 *cfis;
DPRINTK("in xx_softreset\n");
+ if (pmp != SATA_PMP_CTRL_PORT)
+ goto issue_srst;
+
try_offline_again:
/*
* Force host controller to go off-line, aborting current operations
temp = ioread32(hcr_base + HCONTROL);
temp |= (HCONTROL_ONLINE_PHY_RST | HCONTROL_SNOOP_ENABLE);
+ temp |= HCONTROL_PMP_ATTACHED;
iowrite32(temp, hcr_base + HCONTROL);
temp = ata_wait_register(hcr_base + HSTATUS, ONLINE, 0, 1, 500);
ata_port_printk(ap, KERN_WARNING,
"No Device OR PHYRDY change,Hstatus = 0x%x\n",
ioread32(hcr_base + HSTATUS));
- goto err;
+ *class = ATA_DEV_NONE;
+ goto out;
}
/*
if ((temp & 0xFF) != 0x18) {
ata_port_printk(ap, KERN_WARNING, "No Signature Update\n");
- goto err;
+ *class = ATA_DEV_NONE;
+ goto out;
} else {
ata_port_printk(ap, KERN_INFO,
"Signature Update detected @ %d msecs\n",
* reached here, we can send a command to the target device
*/
+issue_srst:
DPRINTK("Sending SRST/device reset\n");
ata_tf_init(link->device, &tf);
SRST_CMD | CMD_DESC_SNOOP_ENABLE, 0, 0, 5);
tf.ctl |= ATA_SRST; /* setup SRST bit in taskfile control reg */
- ata_tf_to_fis(&tf, 0, 0, cfis);
+ ata_tf_to_fis(&tf, pmp, 0, cfis);
DPRINTK("Dumping cfis : 0x%x, 0x%x, 0x%x, 0x%x\n",
cfis[0], cfis[1], cfis[2], cfis[3]);
sata_fsl_setup_cmd_hdr_entry(pp, 0, CMD_DESC_SNOOP_ENABLE, 0, 0, 5);
tf.ctl &= ~ATA_SRST; /* 2nd H2D Ctl. register FIS */
- ata_tf_to_fis(&tf, 0, 0, cfis);
+ ata_tf_to_fis(&tf, pmp, 0, cfis);
+ if (pmp != SATA_PMP_CTRL_PORT)
+ iowrite32(pmp, CQPMP + hcr_base);
iowrite32(1, CQ + hcr_base);
msleep(150); /* ?? */
VPRINTK("cereg = 0x%x\n", ioread32(hcr_base + CE));
}
+out:
return 0;
err:
return -EIO;
}
+static void sata_fsl_error_handler(struct ata_port *ap)
+{
+
+ DPRINTK("in xx_error_handler\n");
+ sata_pmp_error_handler(ap);
+
+}
+
static void sata_fsl_post_internal_cmd(struct ata_queued_cmd *qc)
{
if (qc->flags & ATA_QCFLAG_FAILED)
static void sata_fsl_error_intr(struct ata_port *ap)
{
- struct ata_link *link = &ap->link;
- struct ata_eh_info *ehi = &link->eh_info;
struct sata_fsl_host_priv *host_priv = ap->host->private_data;
void __iomem *hcr_base = host_priv->hcr_base;
- u32 hstatus, dereg, cereg = 0, SError = 0;
+ u32 hstatus, dereg=0, cereg = 0, SError = 0;
unsigned int err_mask = 0, action = 0;
- struct ata_queued_cmd *qc;
- int freeze = 0;
+ int freeze = 0, abort=0;
+ struct ata_link *link = NULL;
+ struct ata_queued_cmd *qc = NULL;
+ struct ata_eh_info *ehi;
hstatus = ioread32(hcr_base + HSTATUS);
cereg = ioread32(hcr_base + CE);
+ /* first, analyze and record host port events */
+ link = &ap->link;
+ ehi = &link->eh_info;
ata_ehi_clear_desc(ehi);
/*
sata_fsl_scr_read(ap, SCR_ERROR, &SError);
if (unlikely(SError & 0xFFFF0000)) {
sata_fsl_scr_write(ap, SCR_ERROR, SError);
- err_mask |= AC_ERR_ATA_BUS;
}
DPRINTK("error_intr,hStat=0x%x,CE=0x%x,DE =0x%x,SErr=0x%x\n",
hstatus, cereg, ioread32(hcr_base + DE), SError);
- /* handle single device errors */
- if (cereg) {
- /*
- * clear the command error, also clears queue to the device
- * in error, and we can (re)issue commands to this device.
- * When a device is in error all commands queued into the
- * host controller and at the device are considered aborted
- * and the queue for that device is stopped. Now, after
- * clearing the device error, we can issue commands to the
- * device to interrogate it to find the source of the error.
- */
- dereg = ioread32(hcr_base + DE);
- iowrite32(dereg, hcr_base + DE);
- iowrite32(cereg, hcr_base + CE);
+ /* handle fatal errors */
+ if (hstatus & FATAL_ERROR_DECODE) {
+ ehi->err_mask |= AC_ERR_ATA_BUS;
+ ehi->action |= ATA_EH_SOFTRESET;
- DPRINTK("single device error, CE=0x%x, DE=0x%x\n",
- ioread32(hcr_base + CE), ioread32(hcr_base + DE));
/*
- * We should consider this as non fatal error, and TF must
- * be updated as done below.
+ * Ignore serror in case of fatal errors as we always want
+ * to do a soft-reset of the FSL SATA controller. Analyzing
+ * serror may cause libata to schedule a hard-reset action,
+ * and hard-reset currently does not do controller
+ * offline/online, causing command timeouts and leads to an
+ * un-recoverable state, hence make libATA ignore
+ * autopsy in case of fatal errors.
*/
- err_mask |= AC_ERR_DEV;
- }
+ ehi->flags |= ATA_EHI_NO_AUTOPSY;
- /* handle fatal errors */
- if (hstatus & FATAL_ERROR_DECODE) {
- err_mask |= AC_ERR_ATA_BUS;
- action |= ATA_EH_RESET;
- /* how will fatal error interrupts be completed ?? */
freeze = 1;
}
/* Setup a soft-reset EH action */
ata_ehi_hotplugged(ehi);
+ ata_ehi_push_desc(ehi, "%s", "PHY RDY changed");
freeze = 1;
}
- /* record error info */
- qc = ata_qc_from_tag(ap, link->active_tag);
+ /* handle single device errors */
+ if (cereg) {
+ /*
+ * clear the command error, also clears queue to the device
+ * in error, and we can (re)issue commands to this device.
+ * When a device is in error all commands queued into the
+ * host controller and at the device are considered aborted
+ * and the queue for that device is stopped. Now, after
+ * clearing the device error, we can issue commands to the
+ * device to interrogate it to find the source of the error.
+ */
+ abort = 1;
+
+ DPRINTK("single device error, CE=0x%x, DE=0x%x\n",
+ ioread32(hcr_base + CE), ioread32(hcr_base + DE));
- if (qc)
+ /* find out the offending link and qc */
+ if (ap->nr_pmp_links) {
+ dereg = ioread32(hcr_base + DE);
+ iowrite32(dereg, hcr_base + DE);
+ iowrite32(cereg, hcr_base + CE);
+
+ if (dereg < ap->nr_pmp_links) {
+ link = &ap->pmp_link[dereg];
+ ehi = &link->eh_info;
+ qc = ata_qc_from_tag(ap, link->active_tag);
+ /*
+ * We should consider this as non fatal error,
+ * and TF must be updated as done below.
+ */
+
+ err_mask |= AC_ERR_DEV;
+
+ } else {
+ err_mask |= AC_ERR_HSM;
+ action |= ATA_EH_HARDRESET;
+ freeze = 1;
+ }
+ } else {
+ dereg = ioread32(hcr_base + DE);
+ iowrite32(dereg, hcr_base + DE);
+ iowrite32(cereg, hcr_base + CE);
+
+ qc = ata_qc_from_tag(ap, link->active_tag);
+ /*
+ * We should consider this as non fatal error,
+ * and TF must be updated as done below.
+ */
+ err_mask |= AC_ERR_DEV;
+ }
+ }
+
+ /* record error info */
+ if (qc) {
qc->err_mask |= err_mask;
- else
+ } else
ehi->err_mask |= err_mask;
ehi->action |= action;
- ehi->serror |= SError;
/* freeze or abort */
if (freeze)
ata_port_freeze(ap);
- else
- ata_port_abort(ap);
+ else if (abort) {
+ if (qc)
+ ata_link_abort(qc->dev->link);
+ else
+ ata_port_abort(ap);
+ }
}
static void sata_fsl_host_intr(struct ata_port *ap)
{
- struct ata_link *link = &ap->link;
struct sata_fsl_host_priv *host_priv = ap->host->private_data;
void __iomem *hcr_base = host_priv->hcr_base;
u32 hstatus, qc_active = 0;
return;
}
- if (link->sactive) { /* only true for NCQ commands */
+ /* Read command completed register */
+ qc_active = ioread32(hcr_base + CC);
+
+ VPRINTK("Status of all queues :\n");
+ VPRINTK("qc_active/CC = 0x%x, CA = 0x%x, CE=0x%x,CQ=0x%x,apqa=0x%x\n",
+ qc_active,
+ ioread32(hcr_base + CA),
+ ioread32(hcr_base + CE),
+ ioread32(hcr_base + CQ),
+ ap->qc_active);
+
+ if (qc_active & ap->qc_active) {
int i;
- /* Read command completed register */
- qc_active = ioread32(hcr_base + CC);
/* clear CC bit, this will also complete the interrupt */
iowrite32(qc_active, hcr_base + CC);
for (i = 0; i < SATA_FSL_QUEUE_DEPTH; i++) {
if (qc_active & (1 << i)) {
qc = ata_qc_from_tag(ap, i);
- if (qc)
+ if (qc) {
ata_qc_complete(qc);
+ }
DPRINTK
("completing ncq cmd,tag=%d,CC=0x%x,CA=0x%x\n",
i, ioread32(hcr_base + CC),
}
return;
- } else if (ap->qc_active) {
+ } else if ((ap->qc_active & (1 << ATA_TAG_INTERNAL))) {
iowrite32(1, hcr_base + CC);
- qc = ata_qc_from_tag(ap, link->active_tag);
+ qc = ata_qc_from_tag(ap, ATA_TAG_INTERNAL);
- DPRINTK("completing non-ncq cmd, tag=%d,CC=0x%x\n",
- link->active_tag, ioread32(hcr_base + CC));
+ DPRINTK("completing non-ncq cmd, CC=0x%x\n",
+ ioread32(hcr_base + CC));
- if (qc)
+ if (qc) {
ata_qc_complete(qc);
+ }
} else {
/* Spurious Interrupt!! */
DPRINTK("spurious interrupt!!, CC = 0x%x\n",
ioread32(hcr_base + CC));
+ iowrite32(qc_active, hcr_base + CC);
return;
}
}
iowrite32(0x00000FFFF, hcr_base + CE);
iowrite32(0x00000FFFF, hcr_base + DE);
- /* initially assuming no Port multiplier, set CQPMP to 0 */
- iowrite32(0x0, hcr_base + CQPMP);
-
/*
* host controller will be brought on-line, during xx_port_start()
* callback, that should also initiate the OOB, COMINIT sequence
.dma_boundary = ATA_DMA_BOUNDARY,
};
-static const struct ata_port_operations sata_fsl_ops = {
- .inherits = &sata_port_ops,
+static struct ata_port_operations sata_fsl_ops = {
+ .inherits = &sata_pmp_port_ops,
.qc_prep = sata_fsl_qc_prep,
.qc_issue = sata_fsl_qc_issue,
.thaw = sata_fsl_thaw,
.prereset = sata_fsl_prereset,
.softreset = sata_fsl_softreset,
+ .pmp_softreset = sata_fsl_softreset,
+ .error_handler = sata_fsl_error_handler,
.post_internal_cmd = sata_fsl_post_internal_cmd,
.port_start = sata_fsl_port_start,
.port_stop = sata_fsl_port_stop,
+
+ .pmp_attach = sata_fsl_pmp_attach,
+ .pmp_detach = sata_fsl_pmp_detach,
};
static const struct ata_port_info sata_fsl_port_info[] = {
#include <linux/libata.h>
#define DRV_NAME "sata_mv"
-#define DRV_VERSION "1.21"
+#define DRV_VERSION "1.24"
enum {
/* BAR's are enumerated in terms of pci_resource_start() terms */
/* Host Flags */
MV_FLAG_DUAL_HC = (1 << 30), /* two SATA Host Controllers */
MV_FLAG_IRQ_COALESCE = (1 << 29), /* IRQ coalescing capability */
- /* SoC integrated controllers, no PCI interface */
- MV_FLAG_SOC = (1 << 28),
MV_COMMON_FLAGS = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
ATA_FLAG_MMIO | ATA_FLAG_NO_ATAPI |
MV_HP_ERRATA_50XXB2 = (1 << 2),
MV_HP_ERRATA_60X1B2 = (1 << 3),
MV_HP_ERRATA_60X1C0 = (1 << 4),
- MV_HP_ERRATA_XX42A0 = (1 << 5),
MV_HP_GEN_I = (1 << 6), /* Generation I: 50xx */
MV_HP_GEN_II = (1 << 7), /* Generation II: 60xx */
MV_HP_GEN_IIE = (1 << 8), /* Generation IIE: 6042/7042 */
MV_HP_PCIE = (1 << 9), /* PCIe bus/regs: 7042 */
MV_HP_CUT_THROUGH = (1 << 10), /* can use EDMA cut-through */
+ MV_HP_FLAG_SOC = (1 << 11), /* SystemOnChip, no PCI */
/* Port private flags (pp_flags) */
MV_PP_FLAG_EDMA_EN = (1 << 0), /* is EDMA engine enabled? */
#define IS_GEN_II(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_II)
#define IS_GEN_IIE(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_IIE)
#define IS_PCIE(hpriv) ((hpriv)->hp_flags & MV_HP_PCIE)
-#define HAS_PCI(host) (!((host)->ports[0]->flags & MV_FLAG_SOC))
+#define IS_SOC(hpriv) ((hpriv)->hp_flags & MV_HP_FLAG_SOC)
#define WINDOW_CTRL(i) (0x20030 + ((i) << 4))
#define WINDOW_BASE(i) (0x20034 + ((i) << 4))
.port_ops = &mv_iie_ops,
},
{ /* chip_soc */
- .flags = MV_GENIIE_FLAGS | MV_FLAG_SOC,
+ .flags = MV_GENIIE_FLAGS,
.pio_mask = 0x1f, /* pio0-4 */
.udma_mask = ATA_UDMA6,
.port_ops = &mv_iie_ops,
writel((pp->crqb_dma >> 16) >> 16, port_mmio + EDMA_REQ_Q_BASE_HI_OFS);
writelfl((pp->crqb_dma & EDMA_REQ_Q_BASE_LO_MASK) | index,
port_mmio + EDMA_REQ_Q_IN_PTR_OFS);
-
- if (hpriv->hp_flags & MV_HP_ERRATA_XX42A0)
- writelfl((pp->crqb_dma & 0xffffffff) | index,
- port_mmio + EDMA_REQ_Q_OUT_PTR_OFS);
- else
- writelfl(index, port_mmio + EDMA_REQ_Q_OUT_PTR_OFS);
+ writelfl(index, port_mmio + EDMA_REQ_Q_OUT_PTR_OFS);
/*
* initialize response queue
WARN_ON(pp->crpb_dma & 0xff);
writel((pp->crpb_dma >> 16) >> 16, port_mmio + EDMA_RSP_Q_BASE_HI_OFS);
-
- if (hpriv->hp_flags & MV_HP_ERRATA_XX42A0)
- writelfl((pp->crpb_dma & 0xffffffff) | index,
- port_mmio + EDMA_RSP_Q_IN_PTR_OFS);
- else
- writelfl(index, port_mmio + EDMA_RSP_Q_IN_PTR_OFS);
-
+ writelfl(index, port_mmio + EDMA_RSP_Q_IN_PTR_OFS);
writelfl((pp->crpb_dma & EDMA_RSP_Q_BASE_LO_MASK) | index,
port_mmio + EDMA_RSP_Q_OUT_PTR_OFS);
}
cfg |= (1 << 23); /* do not mask PM field in rx'd FIS */
cfg |= (1 << 22); /* enab 4-entry host queue cache */
- if (HAS_PCI(ap->host))
+ if (!IS_SOC(hpriv))
cfg |= (1 << 18); /* enab early completion */
if (hpriv->hp_flags & MV_HP_CUT_THROUGH)
cfg |= (1 << 17); /* enab cut-thru (dis stor&forwrd) */
* a bogus register value which can indicate HW removal or PCI fault.
*/
if (pending_irqs && main_irq_cause != 0xffffffffU) {
- if (unlikely((pending_irqs & PCI_ERR) && HAS_PCI(host)))
+ if (unlikely((pending_irqs & PCI_ERR) && !IS_SOC(hpriv)))
handled = mv_pci_error(host, hpriv->base);
else
handled = mv_host_intr(host, pending_irqs);
hp_flags & (MV_HP_ERRATA_60X1B2 | MV_HP_ERRATA_60X1C0);
int fix_phy_mode4 =
hp_flags & (MV_HP_ERRATA_60X1B2 | MV_HP_ERRATA_60X1C0);
- u32 m2, tmp;
+ u32 m2, m3;
if (fix_phy_mode2) {
m2 = readl(port_mmio + PHY_MODE2);
udelay(200);
}
- /* who knows what this magic does */
- tmp = readl(port_mmio + PHY_MODE3);
- tmp &= ~0x7F800000;
- tmp |= 0x2A800000;
- writel(tmp, port_mmio + PHY_MODE3);
+ /*
+ * Gen-II/IIe PHY_MODE3 errata RM#2:
+ * Achieves better receiver noise performance than the h/w default:
+ */
+ m3 = readl(port_mmio + PHY_MODE3);
+ m3 = (m3 & 0x1f) | (0x5555601 << 5);
+
+ /* Guideline 88F5182 (GL# SATA-S11) */
+ if (IS_SOC(hpriv))
+ m3 &= ~0x1c;
if (fix_phy_mode4) {
u32 m4;
m4 = readl(port_mmio + PHY_MODE4);
- if (hp_flags & MV_HP_ERRATA_60X1B2)
- tmp = readl(port_mmio + PHY_MODE3);
-
/* workaround for errata FEr SATA#10 (part 1) */
m4 = (m4 & ~(1 << 1)) | (1 << 0);
- writel(m4, port_mmio + PHY_MODE4);
+ /* enforce bit restrictions on GenIIe devices */
+ if (IS_GEN_IIE(hpriv))
+ m4 = (m4 & ~0x5DE3FFFC) | (1 << 2);
- if (hp_flags & MV_HP_ERRATA_60X1B2)
- writel(tmp, port_mmio + PHY_MODE3);
+ writel(m4, port_mmio + PHY_MODE4);
}
+ /*
+ * Workaround for 60x1-B2 errata SATA#13:
+ * Any write to PHY_MODE4 (above) may corrupt PHY_MODE3,
+ * so we must always rewrite PHY_MODE3 after PHY_MODE4.
+ */
+ writel(m3, port_mmio + PHY_MODE3);
/* Revert values of pre-emphasis and signal amps to the saved ones */
m2 = readl(port_mmio + PHY_MODE2);
void __iomem *mmio = hpriv->base;
u32 reg;
- if (!HAS_PCI(host) || !IS_PCIE(hpriv))
+ if (IS_SOC(hpriv) || !IS_PCIE(hpriv))
return 0; /* not PCI-X capable */
reg = readl(mmio + MV_PCI_MODE_OFS);
if ((reg & MV_PCI_MODE_MASK) == 0)
hp_flags |= MV_HP_CUT_THROUGH;
switch (pdev->revision) {
- case 0x0:
- hp_flags |= MV_HP_ERRATA_XX42A0;
- break;
- case 0x1:
+ case 0x2: /* Rev.B0: the first/only public release */
hp_flags |= MV_HP_ERRATA_60X1C0;
break;
default:
break;
case chip_soc:
hpriv->ops = &mv_soc_ops;
- hp_flags |= MV_HP_ERRATA_60X1C0;
+ hp_flags |= MV_HP_FLAG_SOC | MV_HP_ERRATA_60X1C0;
break;
default:
if (rc)
goto done;
- if (HAS_PCI(host)) {
- hpriv->main_irq_cause_addr = mmio + PCI_HC_MAIN_IRQ_CAUSE_OFS;
- hpriv->main_irq_mask_addr = mmio + PCI_HC_MAIN_IRQ_MASK_OFS;
- } else {
+ if (IS_SOC(hpriv)) {
hpriv->main_irq_cause_addr = mmio + SOC_HC_MAIN_IRQ_CAUSE_OFS;
hpriv->main_irq_mask_addr = mmio + SOC_HC_MAIN_IRQ_MASK_OFS;
+ } else {
+ hpriv->main_irq_cause_addr = mmio + PCI_HC_MAIN_IRQ_CAUSE_OFS;
+ hpriv->main_irq_mask_addr = mmio + PCI_HC_MAIN_IRQ_MASK_OFS;
}
/* global interrupt mask: 0 == mask everything */
mv_port_init(&ap->ioaddr, port_mmio);
#ifdef CONFIG_PCI
- if (HAS_PCI(host)) {
+ if (!IS_SOC(hpriv)) {
unsigned int offset = port_mmio - mmio;
ata_port_pbar_desc(ap, MV_PRIMARY_BAR, -1, "mmio");
ata_port_pbar_desc(ap, MV_PRIMARY_BAR, offset, "port");
writelfl(0, hc_mmio + HC_IRQ_CAUSE_OFS);
}
- if (HAS_PCI(host)) {
+ if (!IS_SOC(hpriv)) {
/* Clear any currently outstanding host interrupt conditions */
writelfl(0, mmio + hpriv->irq_cause_ofs);
if (virtio_has_feature(vdev, VIRTIO_BLK_F_BARRIER))
blk_queue_ordered(vblk->disk->queue, QUEUE_ORDERED_TAG, NULL);
+ /* If disk is read-only in the host, the guest should obey */
+ if (virtio_has_feature(vdev, VIRTIO_BLK_F_RO))
+ set_disk_ro(vblk->disk, 1);
+
/* Host must always specify the capacity. */
vdev->config->get(vdev, offsetof(struct virtio_blk_config, capacity),
&cap, sizeof(cap));
/* Stop all the virtqueues. */
vdev->config->reset(vdev);
+ del_gendisk(vblk->disk);
blk_cleanup_queue(vblk->disk->queue);
put_disk(vblk->disk);
mempool_destroy(vblk->pool);
static unsigned int features[] = {
VIRTIO_BLK_F_BARRIER, VIRTIO_BLK_F_SEG_MAX, VIRTIO_BLK_F_SIZE_MAX,
- VIRTIO_BLK_F_GEOMETRY,
+ VIRTIO_BLK_F_GEOMETRY, VIRTIO_BLK_F_RO,
};
static struct virtio_driver virtio_blk = {
If unsure, say Y.
+config HW_RANDOM_VIRTIO
+ tristate "VirtIO Random Number Generator support"
+ depends on HW_RANDOM && VIRTIO
+ ---help---
+ This driver provides kernel-side support for the virtual Random Number
+ Generator hardware.
+
+ To compile this driver as a module, choose M here: the
+ module will be called virtio-rng. If unsure, say N.
obj-$(CONFIG_HW_RANDOM_IXP4XX) += ixp4xx-rng.o
obj-$(CONFIG_HW_RANDOM_OMAP) += omap-rng.o
obj-$(CONFIG_HW_RANDOM_PASEMI) += pasemi-rng.o
+obj-$(CONFIG_HW_RANDOM_VIRTIO) += virtio-rng.o
--- /dev/null
+/*
+ * Randomness driver for virtio
+ * Copyright (C) 2007, 2008 Rusty Russell IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <linux/err.h>
+#include <linux/hw_random.h>
+#include <linux/scatterlist.h>
+#include <linux/spinlock.h>
+#include <linux/virtio.h>
+#include <linux/virtio_rng.h>
+
+/* The host will fill any buffer we give it with sweet, sweet randomness. We
+ * give it 64 bytes at a time, and the hwrng framework takes it 4 bytes at a
+ * time. */
+#define RANDOM_DATA_SIZE 64
+
+static struct virtqueue *vq;
+static u32 *random_data;
+static unsigned int data_left;
+static DECLARE_COMPLETION(have_data);
+
+static void random_recv_done(struct virtqueue *vq)
+{
+ int len;
+
+ /* We never get spurious callbacks. */
+ if (!vq->vq_ops->get_buf(vq, &len))
+ BUG();
+
+ data_left = len / sizeof(random_data[0]);
+ complete(&have_data);
+}
+
+static void register_buffer(void)
+{
+ struct scatterlist sg;
+
+ sg_init_one(&sg, random_data, RANDOM_DATA_SIZE);
+ /* There should always be room for one buffer. */
+ if (vq->vq_ops->add_buf(vq, &sg, 0, 1, random_data) != 0)
+ BUG();
+ vq->vq_ops->kick(vq);
+}
+
+/* At least we don't udelay() in a loop like some other drivers. */
+static int virtio_data_present(struct hwrng *rng, int wait)
+{
+ if (data_left)
+ return 1;
+
+ if (!wait)
+ return 0;
+
+ wait_for_completion(&have_data);
+ return 1;
+}
+
+/* virtio_data_present() must have succeeded before this is called. */
+static int virtio_data_read(struct hwrng *rng, u32 *data)
+{
+ BUG_ON(!data_left);
+
+ *data = random_data[--data_left];
+
+ if (!data_left) {
+ init_completion(&have_data);
+ register_buffer();
+ }
+ return sizeof(*data);
+}
+
+static struct hwrng virtio_hwrng = {
+ .name = "virtio",
+ .data_present = virtio_data_present,
+ .data_read = virtio_data_read,
+};
+
+static int virtrng_probe(struct virtio_device *vdev)
+{
+ int err;
+
+ /* We expect a single virtqueue. */
+ vq = vdev->config->find_vq(vdev, 0, random_recv_done);
+ if (IS_ERR(vq))
+ return PTR_ERR(vq);
+
+ err = hwrng_register(&virtio_hwrng);
+ if (err) {
+ vdev->config->del_vq(vq);
+ return err;
+ }
+
+ register_buffer();
+ return 0;
+}
+
+static void virtrng_remove(struct virtio_device *vdev)
+{
+ vdev->config->reset(vdev);
+ hwrng_unregister(&virtio_hwrng);
+ vdev->config->del_vq(vq);
+}
+
+static struct virtio_device_id id_table[] = {
+ { VIRTIO_ID_RNG, VIRTIO_DEV_ANY_ID },
+ { 0 },
+};
+
+static struct virtio_driver virtio_rng = {
+ .driver.name = KBUILD_MODNAME,
+ .driver.owner = THIS_MODULE,
+ .id_table = id_table,
+ .probe = virtrng_probe,
+ .remove = __devexit_p(virtrng_remove),
+};
+
+static int __init init(void)
+{
+ int err;
+
+ random_data = kmalloc(RANDOM_DATA_SIZE, GFP_KERNEL);
+ if (!random_data)
+ return -ENOMEM;
+
+ err = register_virtio_driver(&virtio_rng);
+ if (err)
+ kfree(random_data);
+ return err;
+}
+
+static void __exit fini(void)
+{
+ kfree(random_data);
+ unregister_virtio_driver(&virtio_rng);
+}
+module_init(init);
+module_exit(fini);
+
+MODULE_DEVICE_TABLE(virtio, id_table);
+MODULE_DESCRIPTION("Virtio random number driver");
+MODULE_LICENSE("GPL");
static void atkbd_cleanup(struct serio *serio)
{
struct atkbd *atkbd = serio_get_drvdata(serio);
+
+ atkbd_disable(atkbd);
ps2_command(&atkbd->ps2dev, NULL, ATKBD_CMD_RESET_BAT);
}
set_bit(code, input_dev->keybit);
}
+ for (i = 0; i < pdata->direct_key_num; i++)
+ set_bit(pdata->direct_key_map[i], input_dev->keybit);
+
keypad->rotary_up_key[0] = pdata->rotary0_up_key;
keypad->rotary_up_key[1] = pdata->rotary1_up_key;
keypad->rotary_down_key[0] = pdata->rotary0_down_key;
keypad->rotary_rel_code[0] = pdata->rotary0_rel_code;
keypad->rotary_rel_code[1] = pdata->rotary1_rel_code;
- if (pdata->rotary0_up_key && pdata->rotary0_down_key) {
- set_bit(pdata->rotary0_up_key, input_dev->keybit);
- set_bit(pdata->rotary0_down_key, input_dev->keybit);
- } else
- set_bit(pdata->rotary0_rel_code, input_dev->relbit);
-
- if (pdata->rotary1_up_key && pdata->rotary1_down_key) {
- set_bit(pdata->rotary1_up_key, input_dev->keybit);
- set_bit(pdata->rotary1_down_key, input_dev->keybit);
- } else
- set_bit(pdata->rotary1_rel_code, input_dev->relbit);
+ if (pdata->enable_rotary0) {
+ if (pdata->rotary0_up_key && pdata->rotary0_down_key) {
+ set_bit(pdata->rotary0_up_key, input_dev->keybit);
+ set_bit(pdata->rotary0_down_key, input_dev->keybit);
+ } else
+ set_bit(pdata->rotary0_rel_code, input_dev->relbit);
+ }
+
+ if (pdata->enable_rotary1) {
+ if (pdata->rotary1_up_key && pdata->rotary1_down_key) {
+ set_bit(pdata->rotary1_up_key, input_dev->keybit);
+ set_bit(pdata->rotary1_down_key, input_dev->keybit);
+ } else
+ set_bit(pdata->rotary1_rel_code, input_dev->relbit);
+ }
}
static inline unsigned int lookup_matrix_keycode(
keypad->input_dev = input_dev;
input_set_drvdata(input_dev, keypad);
- input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP) |
- BIT_MASK(EV_REL);
+ input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP);
+ if ((keypad->pdata->enable_rotary0 &&
+ keypad->pdata->rotary0_rel_code) ||
+ (keypad->pdata->enable_rotary1 &&
+ keypad->pdata->rotary1_rel_code)) {
+ input_dev->evbit[0] |= BIT_MASK(EV_REL);
+ }
pxa27x_keypad_build_keycode(keypad);
platform_set_drvdata(pdev, keypad);
#include <linux/module.h>
#include <linux/ioport.h>
#include <linux/io.h>
-#include <linux/module.h>
#include <linux/input-polldev.h>
#include <linux/i2c.h>
#include <linux/workqueue.h>
DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 9110"),
},
},
+ {
+ .ident = "Acer TravelMate 660",
+ .matches = {
+ DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
+ DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 660"),
+ },
+ },
{
.ident = "Acer TravelMate 2490",
.matches = {
#undef DELAY
+#ifdef CONFIG_X86
+static void i8042_dritek_enable(void)
+{
+ char param = 0x90;
+ int error;
+
+ error = i8042_command(¶m, 0x1059);
+ if (error)
+ printk(KERN_WARNING
+ "Failed to enable DRITEK extension: %d\n",
+ error);
+}
+#endif
+
#ifdef CONFIG_PM
/*
* Here we try to restore the original BIOS settings. We only want to
return -EIO;
}
+
+#ifdef CONFIG_X86
+ if (i8042_dritek)
+ i8042_dritek_enable();
+#endif
+
if (i8042_mux_present) {
if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports())
printk(KERN_WARNING
if (error)
return error;
+#ifdef CONFIG_X86
+ if (i8042_dritek)
+ i8042_dritek_enable();
+#endif
+
if (!i8042_noaux) {
error = i8042_setup_aux();
if (error && error != -ENODEV && error != -EBUSY)
if (error)
goto out_fail;
}
-#ifdef CONFIG_X86
- if (i8042_dritek) {
- char param = 0x90;
- error = i8042_command(¶m, 0x1059);
- if (error)
- goto out_fail;
- }
-#endif
/*
* Ok, everything is ready, let's register all serio ports
*/
struct gtco *gtco;
struct input_dev *input_dev;
struct hid_descriptor *hid_desc;
- char *report = NULL;
+ char *report;
int result = 0, retry;
int error;
struct usb_endpoint_descriptor *endpoint;
le16_to_cpu(hid_desc->wDescriptorLength),
5000); /* 5 secs */
- if (result == le16_to_cpu(hid_desc->wDescriptorLength))
+ dbg("usb_control_msg result: %d", result);
+ if (result == le16_to_cpu(hid_desc->wDescriptorLength)) {
+ parse_hid_report_descriptor(gtco, report, result);
break;
+ }
}
+ kfree(report);
+
/* If we didn't get the report, fail */
- dbg("usb_control_msg result: :%d", result);
if (result != le16_to_cpu(hid_desc->wDescriptorLength)) {
err("Failed to get HID Report Descriptor of size: %d",
hid_desc->wDescriptorLength);
goto err_free_urb;
}
- /* Now we parse the report */
- parse_hid_report_descriptor(gtco, report, result);
-
- /* Now we delete it */
- kfree(report);
-
/* Create a device file node */
usb_make_path(gtco->usbdev, gtco->usbpath, sizeof(gtco->usbpath));
strlcat(gtco->usbpath, "/input0", sizeof(gtco->usbpath));
usb_buffer_free(gtco->usbdev, REPORT_MAX_SIZE,
gtco->buffer, gtco->buf_dma);
err_free_devs:
- kfree(report);
input_free_device(input_dev);
kfree(gtco);
return error;
module_param(delay, int, 0);
MODULE_PARM_DESC(delay, "Set adc sample delay.");
+/*
+ * Set five_wire = 1 to use a 5 wire touchscreen.
+ *
+ * NOTE: Five wire mode does not allow for readback of pressure.
+ */
+static int five_wire;
+module_param(five_wire, int, 0);
+MODULE_PARM_DESC(five_wire, "Set to '1' to use 5-wire touchscreen.");
+
/*
* Set adc mask function.
*
64000 / rpu);
}
+ /* Five wire panel? */
+ if (five_wire) {
+ dig3 |= WM9713_45W;
+ dev_info(wm->dev, "setting 5-wire touchscreen mode.");
+
+ if (pil) {
+ dev_warn(wm->dev,
+ "Pressure measurement not supported in 5 "
+ "wire mode, disabling\n");
+ pil = 0;
+ }
+ }
+
/* touchpanel pressure */
if (pil == 2) {
dig3 |= WM9712_PIL;
goto alloc_err;
}
+ /* set up physical characteristics */
+ wm->codec->phy_init(wm);
+
+ /* load gpio cache */
+ wm->gpio[0] = wm97xx_reg_read(wm, AC97_GPIO_CFG);
+ wm->gpio[1] = wm97xx_reg_read(wm, AC97_GPIO_POLARITY);
+ wm->gpio[2] = wm97xx_reg_read(wm, AC97_GPIO_STICKY);
+ wm->gpio[3] = wm97xx_reg_read(wm, AC97_GPIO_WAKEUP);
+ wm->gpio[4] = wm97xx_reg_read(wm, AC97_GPIO_STATUS);
+ wm->gpio[5] = wm97xx_reg_read(wm, AC97_MISC_AFE);
+
wm->input_dev = input_allocate_device();
if (wm->input_dev == NULL) {
ret = -ENOMEM;
/* set up touch configuration */
wm->input_dev->name = "wm97xx touchscreen";
+ wm->input_dev->phys = "wm97xx";
wm->input_dev->open = wm97xx_ts_input_open;
wm->input_dev->close = wm97xx_ts_input_close;
set_bit(EV_ABS, wm->input_dev->evbit);
if (ret < 0)
goto dev_alloc_err;
- /* set up physical characteristics */
- wm->codec->phy_init(wm);
-
- /* load gpio cache */
- wm->gpio[0] = wm97xx_reg_read(wm, AC97_GPIO_CFG);
- wm->gpio[1] = wm97xx_reg_read(wm, AC97_GPIO_POLARITY);
- wm->gpio[2] = wm97xx_reg_read(wm, AC97_GPIO_STICKY);
- wm->gpio[3] = wm97xx_reg_read(wm, AC97_GPIO_WAKEUP);
- wm->gpio[4] = wm97xx_reg_read(wm, AC97_GPIO_STATUS);
- wm->gpio[5] = wm97xx_reg_read(wm, AC97_MISC_AFE);
-
/* register our battery device */
wm->battery_dev = platform_device_alloc("wm97xx-battery", -1);
if (!wm->battery_dev) {
EXPORT_SYMBOL_GPL(wm97xx_unregister_mach_ops);
static struct device_driver wm97xx_driver = {
- .name = "ac97",
+ .name = "wm97xx-ts",
.bus = &ac97_bus_type,
.owner = THIS_MODULE,
.probe = wm97xx_probe,
/* The pointer to our (page) of device descriptions. */
static void *lguest_devices;
-/* Unique numbering for lguest devices. */
-static unsigned int dev_index;
-
/* For Guests, device memory can be used as normal memory, so we cast away the
* __iomem to quieten sparse. */
static inline void *lguest_map(unsigned long phys_addr, unsigned long pages)
{
- return (__force void *)ioremap(phys_addr, PAGE_SIZE*pages);
+ return (__force void *)ioremap_cache(phys_addr, PAGE_SIZE*pages);
}
static inline void lguest_unmap(void *addr)
* As Andrew Tridgell says, "Untested code is buggy code".
*
* It's worth reading this carefully: we start with a pointer to the new device
- * descriptor in the "lguest_devices" page. */
-static void add_lguest_device(struct lguest_device_desc *d)
+ * descriptor in the "lguest_devices" page, and the offset into the device
+ * descriptor page so we can uniquely identify it if things go badly wrong. */
+static void add_lguest_device(struct lguest_device_desc *d,
+ unsigned int offset)
{
struct lguest_device *ldev;
* it. */
ldev = kzalloc(sizeof(*ldev), GFP_KERNEL);
if (!ldev) {
- printk(KERN_EMERG "Cannot allocate lguest dev %u\n",
- dev_index++);
+ printk(KERN_EMERG "Cannot allocate lguest dev %u type %u\n",
+ offset, d->type);
return;
}
/* This devices' parent is the lguest/ dir. */
ldev->vdev.dev.parent = &lguest_root;
/* We have a unique device index thanks to the dev_index counter. */
- ldev->vdev.index = dev_index++;
- /* The device type comes straight from the descriptor. There's also a
- * device vendor field in the virtio_device struct, which we leave as
- * 0. */
ldev->vdev.id.device = d->type;
/* We have a simple set of routines for querying the device's
* configuration information and setting its status. */
* virtio_device and calls device_register(). This makes the bus
* infrastructure look for a matching driver. */
if (register_virtio_device(&ldev->vdev) != 0) {
- printk(KERN_ERR "Failed to register lguest device %u\n",
- ldev->vdev.index);
+ printk(KERN_ERR "Failed to register lguest dev %u type %u\n",
+ offset, d->type);
kfree(ldev);
}
}
break;
printk("Device at %i has size %u\n", i, desc_size(d));
- add_lguest_device(d);
+ add_lguest_device(d, i);
}
}
#include "rpadlpar.h"
#define DLPAR_KOBJ_NAME "control"
-#define ADD_SLOT_ATTR_NAME "add_slot"
-#define REMOVE_SLOT_ATTR_NAME "remove_slot"
+
+/* Those two have no quotes because they are passed to __ATTR() which
+ * stringifies the argument (yuck !)
+ */
+#define ADD_SLOT_ATTR_NAME add_slot
+#define REMOVE_SLOT_ATTR_NAME remove_slot
#define MAX_DRC_NAME_LEN 64
},
{},
};
+MODULE_DEVICE_TABLE(of, electra_cf_match);
static struct of_platform_driver electra_cf_driver = {
.name = (char *)driver_name,
*/
static void *kvm_devices;
-/*
- * Unique numbering for kvm devices.
- */
-static unsigned int dev_index;
-
struct kvm_device {
struct virtio_device vdev;
struct kvm_device_desc *desc;
* adds a new device and register it with virtio
* appropriate drivers are loaded by the device model
*/
-static void add_kvm_device(struct kvm_device_desc *d)
+static void add_kvm_device(struct kvm_device_desc *d, unsigned int offset)
{
struct kvm_device *kdev;
kdev = kzalloc(sizeof(*kdev), GFP_KERNEL);
if (!kdev) {
- printk(KERN_EMERG "Cannot allocate kvm dev %u\n",
- dev_index++);
+ printk(KERN_EMERG "Cannot allocate kvm dev %u type %u\n",
+ offset, d->type);
return;
}
kdev->vdev.dev.parent = &kvm_root;
- kdev->vdev.index = dev_index++;
kdev->vdev.id.device = d->type;
kdev->vdev.config = &kvm_vq_configspace_ops;
kdev->desc = d;
if (register_virtio_device(&kdev->vdev) != 0) {
- printk(KERN_ERR "Failed to register kvm device %u\n",
- kdev->vdev.index);
+ printk(KERN_ERR "Failed to register kvm device %u type %u\n",
+ offset, d->type);
kfree(kdev);
}
}
if (d->type == 0)
break;
- add_kvm_device(d);
+ add_kvm_device(d, i);
}
}
#include <asm/io.h>
#include <asm/irq.h>
-#include <asm/serial.h>
#include "8250.h"
*/
#define CONFIG_HUB6 1
+#include <asm/serial.h>
/*
* SERIAL_PORT_DFNS tells us about built-in ports that have no
* standard enumeration mechanism. Platforms that can find all
i->head = &up->list;
spin_unlock_irq(&i->lock);
- irq_flags |= SERIAL_EXTRA_IRQ_FLAGS;
-
ret = request_irq(up->port.irq, serial8250_interrupt,
irq_flags, "serial", i);
if (ret < 0)
#else
#define ALPHA_KLUDGE_MCR 0
#endif
-
-#ifndef SERIAL_EXTRA_IRQ_FLAGS
-#define SERIAL_EXTRA_IRQ_FLAGS 0
-#endif
-
#include <linux/spinlock.h>
#include <linux/virtio_config.h>
+/* Unique numbering for virtio devices. */
+static unsigned int dev_index;
+
static ssize_t device_show(struct device *_d,
struct device_attribute *attr, char *buf)
{
int err;
dev->dev.bus = &virtio_bus;
- sprintf(dev->dev.bus_id, "%u", dev->index);
+
+ /* Assign a unique device index and hence name. */
+ dev->index = dev_index++;
+ sprintf(dev->dev.bus_id, "virtio%u", dev->index);
/* We always start by resetting the device, in case a previous
* driver messed it up. This also tests that code path a little. */
.bus_id = "virtio-pci",
};
-/* Unique numbering for devices under the kvm root */
-static unsigned int dev_index;
-
/* Convert a generic virtio device to our structure */
static struct virtio_pci_device *to_vp_device(struct virtio_device *vdev)
{
if (vp_dev == NULL)
return -ENOMEM;
- snprintf(vp_dev->vdev.dev.bus_id, BUS_ID_SIZE, "virtio%d", dev_index);
- vp_dev->vdev.index = dev_index;
- dev_index++;
-
vp_dev->vdev.dev.parent = &virtio_pci_root;
vp_dev->vdev.config = &virtio_pci_config_ops;
vp_dev->pci_dev = pci_dev;
struct vring_virtqueue *vq = to_vvq(_vq);
START_USE(vq);
- BUG_ON(!(vq->vring.avail->flags & VRING_AVAIL_F_NO_INTERRUPT));
/* We optimistically turn back on interrupts, then check if there was
* more to do. */
if (unlikely(vq->broken))
return IRQ_HANDLED;
- /* Other side may have missed us turning off the interrupt,
- * but we should preserve disable semantic for virtio users. */
- if (unlikely(vq->vring.avail->flags & VRING_AVAIL_F_NO_INTERRUPT)) {
- pr_debug("virtqueue interrupt after disable for %p\n", vq);
- return IRQ_HANDLED;
- }
-
pr_debug("virtqueue callback for %p (%p)\n", vq, vq->vq.callback);
if (vq->vq.callback)
vq->vq.callback(&vq->vq);
{
int ret, timer;
- timer = geode_mfgpt_alloc_timer(MFGPT_TIMER_ANY,
- MFGPT_DOMAIN_WORKING, THIS_MODULE);
+ timer = geode_mfgpt_alloc_timer(MFGPT_TIMER_ANY, MFGPT_DOMAIN_WORKING);
if (timer == -1) {
printk(KERN_ERR "geodewdt: No timers were available\n");
static void o2net_sc_postpone_idle(struct o2net_sock_container *sc);
static void o2net_sc_reset_idle_timer(struct o2net_sock_container *sc);
-static void o2net_init_nst(struct o2net_send_tracking *nst, u32 msgtype,
- u32 msgkey, struct task_struct *task, u8 node)
-{
#ifdef CONFIG_DEBUG_FS
+void o2net_init_nst(struct o2net_send_tracking *nst, u32 msgtype,
+ u32 msgkey, struct task_struct *task, u8 node)
+{
INIT_LIST_HEAD(&nst->st_net_debug_item);
nst->st_task = task;
nst->st_msg_type = msgtype;
nst->st_msg_key = msgkey;
nst->st_node = node;
-#endif
}
-static void o2net_set_nst_sock_time(struct o2net_send_tracking *nst)
+void o2net_set_nst_sock_time(struct o2net_send_tracking *nst)
{
-#ifdef CONFIG_DEBUG_FS
do_gettimeofday(&nst->st_sock_time);
-#endif
}
-static void o2net_set_nst_send_time(struct o2net_send_tracking *nst)
+void o2net_set_nst_send_time(struct o2net_send_tracking *nst)
{
-#ifdef CONFIG_DEBUG_FS
do_gettimeofday(&nst->st_send_time);
-#endif
}
-static void o2net_set_nst_status_time(struct o2net_send_tracking *nst)
+void o2net_set_nst_status_time(struct o2net_send_tracking *nst)
{
-#ifdef CONFIG_DEBUG_FS
do_gettimeofday(&nst->st_status_time);
-#endif
}
-static void o2net_set_nst_sock_container(struct o2net_send_tracking *nst,
+void o2net_set_nst_sock_container(struct o2net_send_tracking *nst,
struct o2net_sock_container *sc)
{
-#ifdef CONFIG_DEBUG_FS
nst->st_sc = sc;
-#endif
}
-static void o2net_set_nst_msg_id(struct o2net_send_tracking *nst, u32 msg_id)
+void o2net_set_nst_msg_id(struct o2net_send_tracking *nst, u32 msg_id)
{
-#ifdef CONFIG_DEBUG_FS
nst->st_id = msg_id;
-#endif
}
+#endif /* CONFIG_DEBUG_FS */
static inline int o2net_reconnect_delay(void)
{
void o2net_debug_add_sc(struct o2net_sock_container *sc);
void o2net_debug_del_sc(struct o2net_sock_container *sc);
#else
-static int o2net_debugfs_init(void)
+static inline int o2net_debugfs_init(void)
{
return 0;
}
-static void o2net_debugfs_exit(void)
+static inline void o2net_debugfs_exit(void)
{
}
-static void o2net_debug_add_nst(struct o2net_send_tracking *nst)
+static inline void o2net_debug_add_nst(struct o2net_send_tracking *nst)
{
}
-static void o2net_debug_del_nst(struct o2net_send_tracking *nst)
+static inline void o2net_debug_del_nst(struct o2net_send_tracking *nst)
{
}
-static void o2net_debug_add_sc(struct o2net_sock_container *sc)
+static inline void o2net_debug_add_sc(struct o2net_sock_container *sc)
{
}
-static void o2net_debug_del_sc(struct o2net_sock_container *sc)
+static inline void o2net_debug_del_sc(struct o2net_sock_container *sc)
{
}
#endif /* CONFIG_DEBUG_FS */
struct timeval st_send_time;
struct timeval st_status_time;
};
+
+void o2net_init_nst(struct o2net_send_tracking *nst, u32 msgtype,
+ u32 msgkey, struct task_struct *task, u8 node);
+void o2net_set_nst_sock_time(struct o2net_send_tracking *nst);
+void o2net_set_nst_send_time(struct o2net_send_tracking *nst);
+void o2net_set_nst_status_time(struct o2net_send_tracking *nst);
+void o2net_set_nst_sock_container(struct o2net_send_tracking *nst,
+ struct o2net_sock_container *sc);
+void o2net_set_nst_msg_id(struct o2net_send_tracking *nst, u32 msg_id);
+
#else
struct o2net_send_tracking {
u32 dummy;
};
+
+static inline void o2net_init_nst(struct o2net_send_tracking *nst, u32 msgtype,
+ u32 msgkey, struct task_struct *task, u8 node)
+{
+}
+static inline void o2net_set_nst_sock_time(struct o2net_send_tracking *nst)
+{
+}
+static inline void o2net_set_nst_send_time(struct o2net_send_tracking *nst)
+{
+}
+static inline void o2net_set_nst_status_time(struct o2net_send_tracking *nst)
+{
+}
+static inline void o2net_set_nst_sock_container(struct o2net_send_tracking *nst,
+ struct o2net_sock_container *sc)
+{
+}
+static inline void o2net_set_nst_msg_id(struct o2net_send_tracking *nst,
+ u32 msg_id)
+{
+}
#endif /* CONFIG_DEBUG_FS */
#endif /* O2CLUSTER_TCP_INTERNAL_H */
#else
-static int dlm_debug_init(struct dlm_ctxt *dlm)
+static inline int dlm_debug_init(struct dlm_ctxt *dlm)
{
return 0;
}
-static void dlm_debug_shutdown(struct dlm_ctxt *dlm)
+static inline void dlm_debug_shutdown(struct dlm_ctxt *dlm)
{
}
-static int dlm_create_debugfs_subroot(struct dlm_ctxt *dlm)
+static inline int dlm_create_debugfs_subroot(struct dlm_ctxt *dlm)
{
return 0;
}
-static void dlm_destroy_debugfs_subroot(struct dlm_ctxt *dlm)
+static inline void dlm_destroy_debugfs_subroot(struct dlm_ctxt *dlm)
{
}
-static int dlm_create_debugfs_root(void)
+static inline int dlm_create_debugfs_root(void)
{
return 0;
}
-static void dlm_destroy_debugfs_root(void)
+static inline void dlm_destroy_debugfs_root(void)
{
}
* negotiated by the client. The client negotiates based on the maximum
* version advertised in /sys/fs/ocfs2/max_locking_protocol. The major
* number from the "SETV" message must match
- * user_stack.sp_proto->lp_max_version.pv_major, and the minor number
+ * ocfs2_user_plugin.sp_proto->lp_max_version.pv_major, and the minor number
* must be less than or equal to ...->lp_max_version.pv_minor.
*
* Once this information has been set, mounts will be allowed. From this
struct ocfs2_control_message_down u_down;
};
-static struct ocfs2_stack_plugin user_stack;
+static struct ocfs2_stack_plugin ocfs2_user_plugin;
static atomic_t ocfs2_control_opened;
static int ocfs2_control_this_node = -1;
char *ptr = NULL;
struct ocfs2_control_private *p = file->private_data;
struct ocfs2_protocol_version *max =
- &user_stack.sp_proto->lp_max_version;
+ &ocfs2_user_plugin.sp_proto->lp_max_version;
if (ocfs2_control_get_handshake_state(file) !=
OCFS2_CONTROL_HANDSHAKE_PROTOCOL)
struct dlm_lksb *lksb = fsdlm_astarg_to_lksb(astarg);
int status = lksb->sb_status;
- BUG_ON(user_stack.sp_proto == NULL);
+ BUG_ON(ocfs2_user_plugin.sp_proto == NULL);
/*
* For now we're punting on the issue of other non-standard errors
*/
if (status == -DLM_EUNLOCK || status == -DLM_ECANCEL)
- user_stack.sp_proto->lp_unlock_ast(astarg, 0);
+ ocfs2_user_plugin.sp_proto->lp_unlock_ast(astarg, 0);
else
- user_stack.sp_proto->lp_lock_ast(astarg);
+ ocfs2_user_plugin.sp_proto->lp_lock_ast(astarg);
}
static void fsdlm_blocking_ast_wrapper(void *astarg, int level)
{
- BUG_ON(user_stack.sp_proto == NULL);
+ BUG_ON(ocfs2_user_plugin.sp_proto == NULL);
- user_stack.sp_proto->lp_blocking_ast(astarg, level);
+ ocfs2_user_plugin.sp_proto->lp_blocking_ast(astarg, level);
}
static int user_dlm_lock(struct ocfs2_cluster_connection *conn,
return 0;
}
-static struct ocfs2_stack_operations user_stack_ops = {
+static struct ocfs2_stack_operations ocfs2_user_plugin_ops = {
.connect = user_cluster_connect,
.disconnect = user_cluster_disconnect,
.this_node = user_cluster_this_node,
.dump_lksb = user_dlm_dump_lksb,
};
-static struct ocfs2_stack_plugin user_stack = {
+static struct ocfs2_stack_plugin ocfs2_user_plugin = {
.sp_name = "user",
- .sp_ops = &user_stack_ops,
+ .sp_ops = &ocfs2_user_plugin_ops,
.sp_owner = THIS_MODULE,
};
-static int __init user_stack_init(void)
+static int __init ocfs2_user_plugin_init(void)
{
int rc;
rc = ocfs2_control_init();
if (!rc) {
- rc = ocfs2_stack_glue_register(&user_stack);
+ rc = ocfs2_stack_glue_register(&ocfs2_user_plugin);
if (rc)
ocfs2_control_exit();
}
return rc;
}
-static void __exit user_stack_exit(void)
+static void __exit ocfs2_user_plugin_exit(void)
{
- ocfs2_stack_glue_unregister(&user_stack);
+ ocfs2_stack_glue_unregister(&ocfs2_user_plugin);
ocfs2_control_exit();
}
MODULE_AUTHOR("Oracle");
MODULE_DESCRIPTION("ocfs2 driver for userspace cluster stacks");
MODULE_LICENSE("GPL");
-module_init(user_stack_init);
-module_exit(user_stack_exit);
+module_init(ocfs2_user_plugin_init);
+module_exit(ocfs2_user_plugin_exit);
extern void *sram_alloc_with_lsl(size_t, unsigned long);
extern int sram_free_with_lsl(const void*);
-extern void led_on(int);
-extern void led_off(int);
-extern void led_toggle(int);
-extern void led_disp_num(int);
-extern void led_toggle_num(int);
-extern void init_leds(void);
-
extern const char bfin_board_name[];
extern unsigned long wall_jiffies;
/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */
#define ANOMALY_05000074 (1)
+/* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */
+#define ANOMALY_05000119 (1)
/* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */
#define ANOMALY_05000122 (1)
/* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */
#define ANOMALY_05000245 (1)
/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
#define ANOMALY_05000265 (1)
+/* Errors when SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
+#define ANOMALY_05000312 (1)
/* Incorrect Access of OTP_STATUS During otp_write() Function */
#define ANOMALY_05000328 (1)
/* Disallowed Configuration Prevents Subsequent Allowed Configuration on Host DMA Port */
#define ANOMALY_05000266 (0)
#define ANOMALY_05000273 (0)
#define ANOMALY_05000311 (0)
-#define ANOMALY_05000312 (0)
#define ANOMALY_05000323 (0)
#define ANOMALY_05000363 (0)
* File: include/asm-blackfin/mach-bf533/anomaly.h
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
- * Copyright (C) 2004-2007 Analog Devices Inc.
+ * Copyright (C) 2004-2008 Analog Devices Inc.
* Licensed under the GPL-2 or later.
*/
#define ANOMALY_05000315 (1)
/* Internal Voltage Regulator Values of 1.05V, 1.10V and 1.15V Not Allowed for LQFP Packages */
#define ANOMALY_05000319 (ANOMALY_BF531 || ANOMALY_BF532)
+/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */
+#define ANOMALY_05000357 (1)
+/* UART Break Signal Issues */
+#define ANOMALY_05000363 (__SILICON_REVISION__ < 5)
+/* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */
+#define ANOMALY_05000366 (1)
+/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
+#define ANOMALY_05000371 (1)
+/* PPI Does Not Start Properly In Specific Mode */
+#define ANOMALY_05000400 (__SILICON_REVISION__ >= 5)
+/* SSYNC Stalls Processor when Executed from Non-Cacheable Memory */
+#define ANOMALY_05000402 (__SILICON_REVISION__ >= 5)
+/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
+#define ANOMALY_05000403 (1)
+
/* These anomalies have been "phased" out of analog.com anomaly sheets and are
* here to show running on older silicon just isn't feasible.
#define ANOMALY_05000192 (__SILICON_REVISION__ < 3)
/* Internal Voltage Regulator may not start up */
#define ANOMALY_05000206 (__SILICON_REVISION__ < 3)
-/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */
-#define ANOMALY_05000357 (1)
-/* UART Break Signal Issues */
-#define ANOMALY_05000363 (__SILICON_REVISION__ < 5)
-/* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */
-#define ANOMALY_05000366 (1)
-/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
-#define ANOMALY_05000371 (1)
-/* PPI Does Not Start Properly In Specific Mode */
-#define ANOMALY_05000400 (__SILICON_REVISION__ == 5)
-/* SSYNC Stalls Processor when Executed from Non-Cacheable Memory */
-#define ANOMALY_05000402 (__SILICON_REVISION__ == 5)
-/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
-#define ANOMALY_05000403 (1)
/* Anomalies that don't exist on this proc */
#define ANOMALY_05000266 (0)
* File: include/asm-blackfin/mach-bf537/anomaly.h
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
- * Copyright (C) 2004-2007 Analog Devices Inc.
+ * Copyright (C) 2004-2008 Analog Devices Inc.
* Licensed under the GPL-2 or later.
*/
#define ANOMALY_05000322 (1)
/* Ethernet MAC MDIO Reads Do Not Meet IEEE Specification */
#define ANOMALY_05000341 (__SILICON_REVISION__ >= 3)
-/* New Feature: UART Remains Enabled after UART Boot (Not Available on Older Silicon) */
-#define ANOMALY_05000350 (__SILICON_REVISION__ < 3)
+/* New Feature: UART Remains Enabled after UART Boot */
+#define ANOMALY_05000350 (__SILICON_REVISION__ >= 3)
/* Regulator Programming Blocked when Hibernate Wakeup Source Remains Active */
#define ANOMALY_05000355 (1)
/* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */
/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
#define ANOMALY_05000371 (1)
/* SSYNC Stalls Processor when Executed from Non-Cacheable Memory */
-#define ANOMALY_05000402 (__SILICON_REVISION__ >= 3)
+#define ANOMALY_05000402 (__SILICON_REVISION__ >= 5)
/* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
#define ANOMALY_05000403 (1)
-
-
/* Anomalies that don't exist on this proc */
#define ANOMALY_05000125 (0)
#define ANOMALY_05000158 (0)
#define ANOMALY_05000365 (1)
/* Addressing Conflict between Boot ROM and Asynchronous Memory */
#define ANOMALY_05000369 (1)
+/* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
+#define ANOMALY_05000371 (1)
/* Mobile DDR Operation Not Functional */
#define ANOMALY_05000377 (1)
/* Security/Authentication Speedpath Causes Authentication To Fail To Initiate */
* File: include/asm-blackfin/mach-bf561/anomaly.h
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
- * Copyright (C) 2004-2007 Analog Devices Inc.
+ * Copyright (C) 2004-2008 Analog Devices Inc.
* Licensed under the GPL-2 or later.
*/
{ \
type ret; \
__asm__ __volatile__("sync;" insn ";twi 0,%0,0;isync" \
- : "=r" (ret) : "r" (addr), "m" (*addr)); \
+ : "=r" (ret) : "r" (addr), "m" (*addr) : "memory"); \
return ret; \
}
static inline void name(volatile type __iomem *addr, type val) \
{ \
__asm__ __volatile__("sync;" insn \
- : "=m" (*addr) : "r" (val), "r" (addr)); \
- IO_SET_SYNC_FLAG(); \
+ : "=m" (*addr) : "r" (val), "r" (addr) : "memory"); \
+ IO_SET_SYNC_FLAG(); \
}
" .long 3b,5b\n" \
".previous" \
: "=&r" (x) \
- : "r" (port + _IO_BASE)); \
+ : "r" (port + _IO_BASE) \
+ : "memory"); \
return x; \
}
" .long 0b,2b\n" \
" .long 1b,2b\n" \
".previous" \
- : : "r" (val), "r" (port + _IO_BASE)); \
+ : : "r" (val), "r" (port + _IO_BASE) \
+ : "memory"); \
}
__do_in_asm(_rec_inb, "lbzx")
#define SW_LID 0x00 /* set = lid shut */
#define SW_TABLET_MODE 0x01 /* set = tablet mode */
#define SW_HEADPHONE_INSERT 0x02 /* set = inserted */
-#define SW_RADIO 0x03 /* set = radio enabled */
+#define SW_RFKILL_ALL 0x03 /* rfkill master switch, type "any"
+ set = radio enabled */
+#define SW_RADIO SW_RFKILL_ALL /* deprecated */
#define SW_MAX 0x0f
#define SW_CNT (SW_MAX+1)
#ifndef __LINUX_SPI_MMC_SPI_H
#define __LINUX_SPI_MMC_SPI_H
+#include <linux/interrupt.h>
+
struct device;
struct mmc_host;
#define VIRTIO_BLK_F_SIZE_MAX 1 /* Indicates maximum segment size */
#define VIRTIO_BLK_F_SEG_MAX 2 /* Indicates maximum # of segments */
#define VIRTIO_BLK_F_GEOMETRY 4 /* Legacy geometry available */
+#define VIRTIO_BLK_F_RO 5 /* Disk is read-only */
struct virtio_blk_config
{
/* The capacity (in 512-byte sectors). */
- __le64 capacity;
+ __u64 capacity;
/* The maximum segment size (if VIRTIO_BLK_F_SIZE_MAX) */
- __le32 size_max;
+ __u32 size_max;
/* The maximum number of segments (if VIRTIO_BLK_F_SEG_MAX) */
- __le32 seg_max;
+ __u32 seg_max;
/* geometry the device (if VIRTIO_BLK_F_GEOMETRY) */
struct virtio_blk_geometry {
- __le16 cylinders;
+ __u16 cylinders;
__u8 heads;
__u8 sectors;
} geometry;
/* We've given up on this device. */
#define VIRTIO_CONFIG_S_FAILED 0x80
+/* Do we get callbacks when the ring is completely used, even if we've
+ * suppressed them? */
+#define VIRTIO_F_NOTIFY_ON_EMPTY 24
+
#ifdef __KERNEL__
#include <linux/virtio.h>
* The return value is -ENOENT if the feature doesn't exist. Otherwise
* the config value is copied into whatever is pointed to by v. */
#define virtio_config_val(vdev, fbit, offset, v) \
- virtio_config_buf((vdev), (fbit), (offset), (v), sizeof(v))
+ virtio_config_buf((vdev), (fbit), (offset), (v), sizeof(*v))
static inline int virtio_config_buf(struct virtio_device *vdev,
unsigned int fbit,
--- /dev/null
+#ifndef _LINUX_VIRTIO_RNG_H
+#define _LINUX_VIRTIO_RNG_H
+#include <linux/virtio_config.h>
+
+/* The ID for virtio_rng */
+#define VIRTIO_ID_RNG 4
+
+#endif /* _LINUX_VIRTIO_RNG_H */
#define WM9713_ADCSEL_Y 0x0004 /* Y measurement */
#define WM9713_ADCSEL_PRES 0x0008 /* Pressure measurement */
#define WM9713_COO 0x0001 /* enable coordinate mode */
+#define WM9713_45W 0x1000 /* set for 5 wire panel */
#define WM9713_PDEN 0x0800 /* measure only when pen down */
#define WM9713_ADCSEL_MASK 0x00fe /* ADC selection mask */
#define WM9713_WAIT 0x0200 /* coordinate wait */
include include/config/auto.conf
include scripts/Kbuild.include
+# When building external modules load the Kbuild file to retreive EXTRA_SYMBOLS info
ifneq ($(KBUILD_EXTMOD),)
+
+# set src + obj - they may be used when building the .mod.c file
+obj := $(KBUILD_EXTMOD)
+src := $(obj)
+
# Include the module's Makefile to find KBUILD_EXTRA_SYMBOLS
include $(if $(wildcard $(KBUILD_EXTMOD)/Kbuild), \
$(KBUILD_EXTMOD)/Kbuild, $(KBUILD_EXTMOD)/Makefile)
projects / linux-2.6-omap-h63xx.git / commitdiff