.pmc_mask       = 1 << AT91RM9200_ID_PIOD,
        .type           = CLK_TYPE_PERIPHERAL,
 };
+static struct clk tc0_clk = {
+       .name           = "tc0_clk",
+       .pmc_mask       = 1 << AT91RM9200_ID_TC0,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk tc1_clk = {
+       .name           = "tc1_clk",
+       .pmc_mask       = 1 << AT91RM9200_ID_TC1,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk tc2_clk = {
+       .name           = "tc2_clk",
+       .pmc_mask       = 1 << AT91RM9200_ID_TC2,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk tc3_clk = {
+       .name           = "tc3_clk",
+       .pmc_mask       = 1 << AT91RM9200_ID_TC3,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk tc4_clk = {
+       .name           = "tc4_clk",
+       .pmc_mask       = 1 << AT91RM9200_ID_TC4,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk tc5_clk = {
+       .name           = "tc5_clk",
+       .pmc_mask       = 1 << AT91RM9200_ID_TC5,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
 
 static struct clk *periph_clocks[] __initdata = {
        &pioA_clk,
        &twi_clk,
        &spi_clk,
        // ssc 0 .. ssc2
-       // tc0 .. tc5
+       &tc0_clk,
+       &tc1_clk,
+       &tc2_clk,
+       &tc3_clk,
+       &tc4_clk,
+       &tc5_clk,
        &ohci_clk,
        ðer_clk,
        // irq0 .. irq6
 
        .pmc_mask       = 1 << AT91SAM9260_ID_SPI1,
        .type           = CLK_TYPE_PERIPHERAL,
 };
+static struct clk tc0_clk = {
+       .name           = "tc0_clk",
+       .pmc_mask       = 1 << AT91SAM9260_ID_TC0,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk tc1_clk = {
+       .name           = "tc1_clk",
+       .pmc_mask       = 1 << AT91SAM9260_ID_TC1,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk tc2_clk = {
+       .name           = "tc2_clk",
+       .pmc_mask       = 1 << AT91SAM9260_ID_TC2,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
 static struct clk ohci_clk = {
        .name           = "ohci_clk",
        .pmc_mask       = 1 << AT91SAM9260_ID_UHP,
        .pmc_mask       = 1 << AT91SAM9260_ID_US5,
        .type           = CLK_TYPE_PERIPHERAL,
 };
+static struct clk tc3_clk = {
+       .name           = "tc3_clk",
+       .pmc_mask       = 1 << AT91SAM9260_ID_TC3,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk tc4_clk = {
+       .name           = "tc4_clk",
+       .pmc_mask       = 1 << AT91SAM9260_ID_TC4,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk tc5_clk = {
+       .name           = "tc5_clk",
+       .pmc_mask       = 1 << AT91SAM9260_ID_TC5,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
 
 static struct clk *periph_clocks[] __initdata = {
        &pioA_clk,
        &spi0_clk,
        &spi1_clk,
        // ssc
-       // tc0 .. tc2
+       &tc0_clk,
+       &tc1_clk,
+       &tc2_clk,
        &ohci_clk,
        ðer_clk,
        &isi_clk,
        &usart3_clk,
        &usart4_clk,
        &usart5_clk,
-       // tc3 .. tc5
+       &tc3_clk,
+       &tc4_clk,
+       &tc5_clk,
        // irq0 .. irq2
 };
 
 
        .pmc_mask       = 1 << AT91SAM9261_ID_SPI1,
        .type           = CLK_TYPE_PERIPHERAL,
 };
+static struct clk tc0_clk = {
+       .name           = "tc0_clk",
+       .pmc_mask       = 1 << AT91SAM9261_ID_TC0,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk tc1_clk = {
+       .name           = "tc1_clk",
+       .pmc_mask       = 1 << AT91SAM9261_ID_TC1,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk tc2_clk = {
+       .name           = "tc2_clk",
+       .pmc_mask       = 1 << AT91SAM9261_ID_TC2,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
 static struct clk ohci_clk = {
        .name           = "ohci_clk",
        .pmc_mask       = 1 << AT91SAM9261_ID_UHP,
        &spi0_clk,
        &spi1_clk,
        // ssc 0 .. ssc2
-       // tc0 .. tc2
+       &tc0_clk,
+       &tc1_clk,
+       &tc2_clk,
        &ohci_clk,
        &lcdc_clk,
        // irq0 .. irq2