Enable a hardware workaround which avoids problems with the clocking of
the ADCs in certain configurations.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
 
                        /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
                        wm8990_write(codec, WM8990_ANTIPOP2, WM8990_BUFIOEN);
-               } else {
-                       /* ON -> standby */
 
+                       /* Enable workaround for ADC clocking issue. */
+                       wm8990_write(codec, WM8990_EXT_ACCESS_ENA, 0x2);
+                       wm8990_write(codec, WM8990_EXT_CTL1, 0xa003);
+                       wm8990_write(codec, WM8990_EXT_ACCESS_ENA, 0);
                }
                break;
 
 
 #define WM8990_PLL3                             0x3E
 #define WM8990_INTDRIVBITS                     0x3F
 
-#define WM8990_REGISTER_COUNT                   60
-#define WM8990_MAX_REGISTER                     0x3F
+#define WM8990_EXT_ACCESS_ENA                  0x75
+#define WM8990_EXT_CTL1                                0x7a
 
 /*
  * Field Definitions.