Merge branch 'cleanups' into boards

diff --combined arch/avr32/boards/favr-32/setup.c
index 1ee4faf0742dba057a8dd6db0eb589e9758d5936,006a04e8bef2c1a6da0d1da541ca6c9c80f0b8e9..1a12930df8e7956451939e49df5efe57f0adf0d0
--- 1/arch/avr32/boards/favr-32/setup.c
--- 2/arch/avr32/boards/favr-32/setup.c
+++ b/arch/avr32/boards/favr-32/setup.c
@@@ -25,10 -25,10 +25,10 @@@
  
  #include <asm/setup.h>
  
 -#include <asm/arch/at32ap700x.h>
 -#include <asm/arch/init.h>
 -#include <asm/arch/board.h>
 -#include <asm/arch/portmux.h>
 +#include <mach/at32ap700x.h>
 +#include <mach/init.h>
 +#include <mach/board.h>
 +#include <mach/portmux.h>
  
  /* Oscillator frequencies. These are board-specific */
  unsigned long at32_board_osc_rates[3] = {
@@@ -307,28 -307,10 +307,10 @@@ static int __init favr32_init(void
         * Favr-32 uses 32-bit SDRAM interface. Reserve the SDRAM-specific
         * pins so that nobody messes with them.
         */
-       at32_reserve_pin(GPIO_PIN_PE(0));       /* DATA[16]     */
-       at32_reserve_pin(GPIO_PIN_PE(1));       /* DATA[17]     */
-       at32_reserve_pin(GPIO_PIN_PE(2));       /* DATA[18]     */
-       at32_reserve_pin(GPIO_PIN_PE(3));       /* DATA[19]     */
-       at32_reserve_pin(GPIO_PIN_PE(4));       /* DATA[20]     */
-       at32_reserve_pin(GPIO_PIN_PE(5));       /* DATA[21]     */
-       at32_reserve_pin(GPIO_PIN_PE(6));       /* DATA[22]     */
-       at32_reserve_pin(GPIO_PIN_PE(7));       /* DATA[23]     */
-       at32_reserve_pin(GPIO_PIN_PE(8));       /* DATA[24]     */
-       at32_reserve_pin(GPIO_PIN_PE(9));       /* DATA[25]     */
-       at32_reserve_pin(GPIO_PIN_PE(10));      /* DATA[26]     */
-       at32_reserve_pin(GPIO_PIN_PE(11));      /* DATA[27]     */
-       at32_reserve_pin(GPIO_PIN_PE(12));      /* DATA[28]     */
-       at32_reserve_pin(GPIO_PIN_PE(13));      /* DATA[29]     */
-       at32_reserve_pin(GPIO_PIN_PE(14));      /* DATA[30]     */
-       at32_reserve_pin(GPIO_PIN_PE(15));      /* DATA[31]     */
-       at32_reserve_pin(GPIO_PIN_PE(26));      /* SDCS         */
+       at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
  
        at32_select_gpio(GPIO_PIN_PB(3), 0);    /* IRQ from ADS7843 */
  
-       at32_add_system_devices();
- 
        at32_add_device_usart(0);
  
        set_hw_addr(at32_add_device_eth(0, &eth_data[0]));