/* Nothing to do. */
 }
 
+#ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                        enum pci_dma_burst_strategy *strat,
                                        unsigned long *strategy_parameter)
        *strat = PCI_DMA_BURST_BOUNDARY;
        *strategy_parameter = cacheline_size;
 }
+#endif
 
 /* TODO: integrate with include/asm-generic/pci.h ? */
 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
 
 #define pci_unmap_len(PTR, LEN_NAME)           ((PTR)->LEN_NAME)
 #define pci_unmap_len_set(PTR, LEN_NAME, VAL)  (((PTR)->LEN_NAME) = (VAL))
 
+#ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                        enum pci_dma_burst_strategy *strat,
                                        unsigned long *strategy_parameter)
        *strat = PCI_DMA_BURST_INFINITY;
        *strategy_parameter = ~0UL;
 }
+#endif
 
 #define HAVE_PCI_MMAP
 extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
 
  */
 #define PCI_DMA_BUS_IS_PHYS    (1)
 
+#ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                        enum pci_dma_burst_strategy *strat,
                                        unsigned long *strategy_parameter)
        *strat = PCI_DMA_BURST_INFINITY;
        *strategy_parameter = ~0UL;
 }
+#endif
 
 /*
  *     These are pretty much arbitary with the CoMEM implementation.
 
 {
 }
 
+#ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                        enum pci_dma_burst_strategy *strat,
                                        unsigned long *strategy_parameter)
        *strat = PCI_DMA_BURST_INFINITY;
        *strategy_parameter = ~0UL;
 }
+#endif
 
 #endif /* __KERNEL__ */
 
 
 #define sg_dma_len(sg)         ((sg)->dma_length)
 #define sg_dma_address(sg)     ((sg)->dma_address)
 
+#ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                        enum pci_dma_burst_strategy *strat,
                                        unsigned long *strategy_parameter)
        *strat = PCI_DMA_BURST_MULTIPLE;
        *strategy_parameter = cacheline_size;
 }
+#endif
 
 #define HAVE_PCI_MMAP
 extern int pci_mmap_page_range (struct pci_dev *dev, struct vm_area_struct *vma,
 
 extern void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev,
        dma64_addr_t dma_addr, size_t len, int direction);
 
+#ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                        enum pci_dma_burst_strategy *strat,
                                        unsigned long *strategy_parameter)
        *strat = PCI_DMA_BURST_INFINITY;
        *strategy_parameter = ~0UL;
 }
+#endif
 
 extern void pcibios_resource_to_bus(struct pci_dev *dev,
        struct pci_bus_region *region, struct resource *res);
 
 /* export the pci_ DMA API in terms of the dma_ one */
 #include <asm-generic/pci-dma-compat.h>
 
+#ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                        enum pci_dma_burst_strategy *strat,
                                        unsigned long *strategy_parameter)
        *strat = PCI_DMA_BURST_MULTIPLE;
        *strategy_parameter = cacheline_size;
 }
+#endif
 
 extern void
 pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
 
 #define pci_unmap_len(PTR, LEN_NAME)           (0)
 #define pci_unmap_len_set(PTR, LEN_NAME, VAL)  do { } while (0)
 
+#ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                        enum pci_dma_burst_strategy *strat,
                                        unsigned long *strategy_parameter)
        *strat = PCI_DMA_BURST_INFINITY;
        *strategy_parameter = ~0UL;
 }
+#endif
 
 /*
  * At present there are very few 32-bit PPC machines that can have
 
        return 0;
 }
 
+#ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                        enum pci_dma_burst_strategy *strat,
                                        unsigned long *strategy_parameter)
        *strat = PCI_DMA_BURST_MULTIPLE;
        *strategy_parameter = cacheline_size;
 }
+#endif
 
 extern int pci_domain_nr(struct pci_bus *bus);
 
 
 #define sg_dma_address(sg)     (virt_to_bus((sg)->dma_address))
 #define sg_dma_len(sg)         ((sg)->length)
 
+#ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                        enum pci_dma_burst_strategy *strat,
                                        unsigned long *strategy_parameter)
        *strat = PCI_DMA_BURST_INFINITY;
        *strategy_parameter = ~0UL;
 }
+#endif
 
 /* Board-specific fixup routines. */
 extern void pcibios_fixup(void);
 
 #define sg_dma_address(sg)     ((sg)->dma_address)
 #define sg_dma_len(sg)         ((sg)->length)
 
+#ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                        enum pci_dma_burst_strategy *strat,
                                        unsigned long *strategy_parameter)
        *strat = PCI_DMA_BURST_INFINITY;
        *strategy_parameter = ~0UL;
 }
+#endif
 
 /* Board-specific fixup routines. */
 extern void pcibios_fixup(void);
 
 
 #define pci_dac_dma_supported(dev, mask)       (0)
 
+#ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                        enum pci_dma_burst_strategy *strat,
                                        unsigned long *strategy_parameter)
        *strat = PCI_DMA_BURST_INFINITY;
        *strategy_parameter = ~0UL;
 }
+#endif
 
 static inline void pcibios_add_platform_entries(struct pci_dev *dev)
 {
 
        return (dma_addr == PCI_DMA_ERROR_CODE);
 }
 
+#ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                        enum pci_dma_burst_strategy *strat,
                                        unsigned long *strategy_parameter)
        *strat = PCI_DMA_BURST_BOUNDARY;
        *strategy_parameter = cacheline_size;
 }
+#endif
 
 /* Return the index of the PCI controller for device PDEV. */
 
 
 pci_free_consistent (struct pci_dev *pdev, size_t size, void *cpu_addr,
                     dma_addr_t dma_addr);
 
+#ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                        enum pci_dma_burst_strategy *strat,
                                        unsigned long *strategy_parameter)
        *strat = PCI_DMA_BURST_INFINITY;
        *strategy_parameter = ~0UL;
 }
+#endif
 
 static inline void pcibios_add_platform_entries(struct pci_dev *dev)
 {
 
        flush_write_buffers();
 }
 
+#ifdef CONFIG_PCI
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                        enum pci_dma_burst_strategy *strat,
                                        unsigned long *strategy_parameter)
        *strat = PCI_DMA_BURST_INFINITY;
        *strategy_parameter = ~0UL;
 }
+#endif
 
 #define HAVE_PCI_MMAP
 extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
 
 }
 #endif
 
+#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
+
 #endif /* !CONFIG_PCI */
 
 /* these helpers provide future and backwards compatibility