]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
Merge current mainline tree into linux-omap tree
authorTony Lindgren <tony@atomide.com>
Sat, 12 Apr 2008 00:32:10 +0000 (17:32 -0700)
committerTony Lindgren <tony@atomide.com>
Sat, 12 Apr 2008 00:32:10 +0000 (17:32 -0700)
Merge branches 'master' and 'linus'

1  2 
Makefile
drivers/rtc/Kconfig
drivers/usb/gadget/omap_udc.c
drivers/usb/host/ohci-omap.c
drivers/watchdog/omap_wdt.c

diff --combined Makefile
index 44dbadd4a6dfb5419729e4e5997f1c27750bff4b,21c76f715bf5da65978c1401db678533609993c3..9fa1d3038a30af31bfd10714d52b9e928dd0a4e4
+++ b/Makefile
@@@ -1,7 -1,7 +1,7 @@@
  VERSION = 2
  PATCHLEVEL = 6
  SUBLEVEL = 25
- EXTRAVERSION = -rc8
+ EXTRAVERSION = -rc9
  NAME = Funky Weasel is Jiggy wit it
  
  # *DOCUMENTATION*
@@@ -16,9 -16,6 +16,9 @@@
  # o  print "Entering directory ...";
  MAKEFLAGS += -rR --no-print-directory
  
 +# Add custom flags here to avoid conflict with updates
 +EXTRAVERSION := $(EXTRAVERSION)-omap1
 +
  # We are using a recursive build, so we need to do a little thinking
  # to get the ordering right.
  #
@@@ -174,8 -171,6 +174,8 @@@ SUBARCH := $(shell uname -m | sed -e s/
                                  -e s/ppc.*/powerpc/ -e s/mips.*/mips/ \
                                  -e s/sh.*/sh/ )
  
 +SUBARCH := arm
 +
  # Cross compiling and selecting different set of gcc/bin-utils
  # ---------------------------------------------------------------------------
  #
  # Note: Some architectures assign CROSS_COMPILE in their arch/*/Makefile
  export KBUILD_BUILDHOST := $(SUBARCH)
  ARCH          ?= $(SUBARCH)
 -CROSS_COMPILE ?=
 +CROSS_COMPILE ?= arm-linux-
  
  # Architecture as present in compile.h
  UTS_MACHINE   := $(ARCH)
diff --combined drivers/rtc/Kconfig
index ee75f3ff5f3676ef92d051fcf44d222a8979f547,02a4c8cf2b2d8c5d240e2349d190b0ef620ad9f7..50189de2dbc5a175b7f673763e66d02f34f36a54
@@@ -250,18 -250,9 +250,19 @@@ config RTC_DRV_TWL9233
          platforms.  The support is integrated with the rest of
          the Menelaus driver; it's not separate module.
  
 +config RTC_DRV_TWL4030
 +      tristate "OMAP TWL4030 Real Time Clock"
 +      depends on RTC_CLASS && TWL4030_CORE
 +      help
 +        If you say yes here you get support for internal Real-Time 
 +        Clock of TWL4030 chip.
 +
 +        This driver can also be built as a module. If so, the module
 +        will be called rtc-twl4030.
 +
  config RTC_DRV_S35390A
        tristate "Seiko Instruments S-35390A"
+       select BITREVERSE
        help
          If you say yes here you will get support for the Seiko
          Instruments S-35390A.
index 9aa5946b99c41bde72253caf0e52208e1b15767d,ee1e9a314cd1b07fa08f8460d6bb13364b021984..699ff42ff6d7d37398da45b6e755a4ea2c589b8e
@@@ -54,7 -54,6 +54,7 @@@
  
  #include <asm/arch/dma.h>
  #include <asm/arch/usb.h>
 +#include <asm/arch/control.h>
  
  #include "omap_udc.h"
  
@@@ -2291,15 -2290,8 +2291,15 @@@ static int proc_otg_show(struct seq_fil
  
        tmp = OTG_REV_REG;
        if (cpu_is_omap24xx()) {
 +              /*
 +               * REVISIT: Not clear how this works on OMAP2.  trans
 +               * is ANDed to produce bits 7 and 8, which might make
 +               * sense for USB_TRANSCEIVER_CTRL_REG on OMAP1,
 +               * but with CONTROL_DEVCONF, these bits have something to
 +               * do with the frame adjustment counter and McBSP2.
 +               */
                ctrl_name = "control_devconf";
 -              trans = CONTROL_DEVCONF_REG;
 +              trans = omap_ctrl_readb(OMAP2_CONTROL_DEVCONF0);
        } else {
                ctrl_name = "tranceiver_ctrl";
                trans = USB_TRANSCEIVER_CTRL_REG;
@@@ -2585,9 -2577,7 +2585,9 @@@ omap_ep_setup(char *name, u8 addr, u8 t
                 * and ignored for PIO-IN on newer chips
                 * (for more reliable behavior)
                 */
 -              if (!use_dma || cpu_is_omap15xx() || cpu_is_omap24xx())
 +              if ((!use_dma && (addr & USB_DIR_IN))
 +                              || machine_is_omap_apollon()
 +                              || cpu_is_omap15xx())
                        dbuf = 0;
  
                switch (maxp) {
@@@ -3119,4 -3109,4 +3119,4 @@@ module_exit(udc_exit)
  
  MODULE_DESCRIPTION(DRIVER_DESC);
  MODULE_LICENSE("GPL");
+ MODULE_ALIAS("platform:omap_udc");
index 4ece3b29ba3629915cafaf2ed87320bfa22efcb3,7bfca1ed1b585e73413fbba86aaf16a5d9c3c42f..b05f216b024bf19bdeb544a0b569709c0bea2c7c
@@@ -227,7 -227,7 +227,7 @@@ static int ohci_omap_init(struct usb_hc
  
        omap_ohci_clock_power(1);
  
 -      if (cpu_is_omap1510()) {
 +      if (cpu_is_omap15xx()) {
                omap_1510_local_bus_power(1);
                omap_1510_local_bus_init();
        }
@@@ -315,7 -315,7 +315,7 @@@ static int usb_hcd_omap_probe (const st
        if (IS_ERR(usb_host_ck))
                return PTR_ERR(usb_host_ck);
  
 -      if (!cpu_is_omap1510())
 +      if (!cpu_is_omap15xx())
                usb_dc_ck = clk_get(0, "usb_dc_ck");
        else
                usb_dc_ck = clk_get(0, "lb_ck");
@@@ -544,3 -544,4 +544,4 @@@ static struct platform_driver ohci_hcd_
        },
  };
  
+ MODULE_ALIAS("platform:ohci");
index e939a5fd9cdd2c21d9e1d4842fc7a77e75cbf858,74bc39aa1ce87b1b7715e88e1c11ab4f114a94d4..d4c7959cffd0bee6674cdf1e28bbae61182024a3
@@@ -1,7 -1,7 +1,7 @@@
  /*
 - * linux/drivers/char/watchdog/omap_wdt.c
 + * linux/drivers/watchdog/omap_wdt.c
   *
 - * Watchdog driver for the TI OMAP 16xx & 24xx 32KHz (non-secure) watchdog
 + * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
   *
   * Author: MontaVista Software, Inc.
   *     <gdavis@mvista.com> or <source@mvista.com>
  #include <linux/platform_device.h>
  #include <linux/moduleparam.h>
  #include <linux/clk.h>
 -#include <linux/bitops.h>
  
  #include <asm/io.h>
  #include <asm/uaccess.h>
  #include <asm/hardware.h>
 +#include <asm/bitops.h>
  
  #include <asm/arch/prcm.h>
  
  #include "omap_wdt.h"
  
 +static struct platform_device *omap_wdt_dev;
 +
  static unsigned timer_margin;
  module_param(timer_margin, uint, 0);
  MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
  
 -static int omap_wdt_users;
 -static struct clk *armwdt_ck = NULL;
 -static struct clk *mpu_wdt_ick = NULL;
 -static struct clk *mpu_wdt_fck = NULL;
 -
  static unsigned int wdt_trgr_pattern = 0x1234;
 +struct omap_wdt_dev {
 +      void __iomem    *base;          /* physical */
 +      struct device   *dev;
 +      int             omap_wdt_users;
 +      struct clk      *armwdt_ck;
 +      struct clk      *mpu_wdt_ick;
 +      struct clk      *mpu_wdt_fck;
 +      struct resource *mem;
 +      struct miscdevice omap_wdt_miscdev;
 +};
  
 -static void omap_wdt_ping(void)
 +static void omap_wdt_ping(struct omap_wdt_dev *wdev)
  {
 +      void __iomem    *base = wdev->base;
        /* wait for posted write to complete */
 -      while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08)
 +      while ((omap_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
                cpu_relax();
        wdt_trgr_pattern = ~wdt_trgr_pattern;
 -      omap_writel(wdt_trgr_pattern, (OMAP_WATCHDOG_TGR));
 +      omap_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
        /* wait for posted write to complete */
 -      while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08)
 +      while ((omap_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
                cpu_relax();
        /* reloaded WCRR from WLDR */
  }
  
 -static void omap_wdt_enable(void)
 +static void omap_wdt_enable(struct omap_wdt_dev *wdev)
  {
 +      void __iomem *base;
 +      base = wdev->base;
        /* Sequence to enable the watchdog */
 -      omap_writel(0xBBBB, OMAP_WATCHDOG_SPR);
 -      while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10)
 +      omap_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
 +      while ((omap_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
                cpu_relax();
 -      omap_writel(0x4444, OMAP_WATCHDOG_SPR);
 -      while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10)
 +      omap_writel(0x4444, base + OMAP_WATCHDOG_SPR);
 +      while ((omap_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
                cpu_relax();
  }
  
 -static void omap_wdt_disable(void)
 +static void omap_wdt_disable(struct omap_wdt_dev *wdev)
  {
 +      void __iomem *base;
 +      base = wdev->base;
        /* sequence required to disable watchdog */
 -      omap_writel(0xAAAA, OMAP_WATCHDOG_SPR); /* TIMER_MODE */
 -      while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10)
 +      omap_writel(0xAAAA, base + OMAP_WATCHDOG_SPR);  /* TIMER_MODE */
 +      while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
                cpu_relax();
 -      omap_writel(0x5555, OMAP_WATCHDOG_SPR); /* TIMER_MODE */
 -      while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10)
 +      omap_writel(0x5555, base + OMAP_WATCHDOG_SPR);  /* TIMER_MODE */
 +      while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
                cpu_relax();
  }
  
@@@ -116,17 -104,15 +116,17 @@@ static void omap_wdt_adjust_timeout(uns
        timer_margin = new_timeout;
  }
  
 -static void omap_wdt_set_timeout(void)
 +static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev)
  {
        u32 pre_margin = GET_WLDR_VAL(timer_margin);
 +      void __iomem *base;
 +      base = wdev->base;
  
        /* just count up at 32 KHz */
 -      while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04)
 +      while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
                cpu_relax();
 -      omap_writel(pre_margin, OMAP_WATCHDOG_LDR);
 -      while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04)
 +      omap_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
 +      while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
                cpu_relax();
  }
  
  
  static int omap_wdt_open(struct inode *inode, struct file *file)
  {
 -      if (test_and_set_bit(1, (unsigned long *)&omap_wdt_users))
 +      struct omap_wdt_dev *wdev;
 +      void __iomem *base;
 +      wdev = platform_get_drvdata(omap_wdt_dev);
 +      base = wdev->base;
 +      if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
                return -EBUSY;
  
        if (cpu_is_omap16xx())
 -              clk_enable(armwdt_ck);  /* Enable the clock */
 +              clk_enable(wdev->armwdt_ck);    /* Enable the clock */
  
 -      if (cpu_is_omap24xx()) {
 -              clk_enable(mpu_wdt_ick);    /* Enable the interface clock */
 -              clk_enable(mpu_wdt_fck);    /* Enable the functional clock */
 +      if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
 +              clk_enable(wdev->mpu_wdt_ick);    /* Enable the interface clock */
 +              clk_enable(wdev->mpu_wdt_fck);    /* Enable the functional clock */
        }
  
        /* initialize prescaler */
 -      while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01)
 +      while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
                cpu_relax();
 -      omap_writel((1 << 5) | (PTV << 2), OMAP_WATCHDOG_CNTRL);
 -      while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01)
 +      omap_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
 +      while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
                cpu_relax();
  
 -      omap_wdt_set_timeout();
 -      omap_wdt_enable();
 +      file->private_data = (void *) wdev;
 +
 +      omap_wdt_set_timeout(wdev);
 +      omap_wdt_enable(wdev);
        return nonseekable_open(inode, file);
  }
  
  static int omap_wdt_release(struct inode *inode, struct file *file)
  {
 +      struct omap_wdt_dev *wdev;
 +      wdev = file->private_data;
        /*
         *      Shut off the timer unless NOWAYOUT is defined.
         */
  #ifndef CONFIG_WATCHDOG_NOWAYOUT
 -      omap_wdt_disable();
  
 -      if (cpu_is_omap16xx()) {
 -              clk_disable(armwdt_ck); /* Disable the clock */
 -              clk_put(armwdt_ck);
 -              armwdt_ck = NULL;
 -      }
 +      omap_wdt_disable(wdev);
  
 -      if (cpu_is_omap24xx()) {
 -              clk_disable(mpu_wdt_ick);       /* Disable the clock */
 -              clk_disable(mpu_wdt_fck);       /* Disable the clock */
 -              clk_put(mpu_wdt_ick);
 -              clk_put(mpu_wdt_fck);
 -              mpu_wdt_ick = NULL;
 -              mpu_wdt_fck = NULL;
 +      if (cpu_is_omap16xx())
 +              clk_disable(wdev->armwdt_ck);   /* Disable the clock */
 +
 +      if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
 +              clk_disable(wdev->mpu_wdt_ick); /* Disable the clock */
 +              clk_disable(wdev->mpu_wdt_fck); /* Disable the clock */
        }
  #else
        printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
  #endif
 -      omap_wdt_users = 0;
 +      wdev->omap_wdt_users = 0;
        return 0;
  }
  
@@@ -194,11 -178,9 +194,11 @@@ static ssize_
  omap_wdt_write(struct file *file, const char __user *data,
                size_t len, loff_t *ppos)
  {
 +      struct omap_wdt_dev *wdev;
 +      wdev = file->private_data;
        /* Refresh LOAD_TIME. */
        if (len)
 -              omap_wdt_ping();
 +              omap_wdt_ping(wdev);
        return len;
  }
  
@@@ -206,14 -188,12 +206,14 @@@ static in
  omap_wdt_ioctl(struct inode *inode, struct file *file,
        unsigned int cmd, unsigned long arg)
  {
 +      struct omap_wdt_dev *wdev;
        int new_margin;
        static struct watchdog_info ident = {
                .identity = "OMAP Watchdog",
                .options = WDIOF_SETTIMEOUT,
                .firmware_version = 0,
        };
 +      wdev = file->private_data;
  
        switch (cmd) {
        default:
                        return put_user(omap_prcm_get_reset_sources(),
                                        (int __user *)arg);
        case WDIOC_KEEPALIVE:
 -              omap_wdt_ping();
 +              omap_wdt_ping(wdev);
                return 0;
        case WDIOC_SETTIMEOUT:
                if (get_user(new_margin, (int __user *)arg))
                        return -EFAULT;
                omap_wdt_adjust_timeout(new_margin);
  
 -              omap_wdt_disable();
 -              omap_wdt_set_timeout();
 -              omap_wdt_enable();
 +              omap_wdt_disable(wdev);
 +              omap_wdt_set_timeout(wdev);
 +              omap_wdt_enable(wdev);
  
 -              omap_wdt_ping();
 +              omap_wdt_ping(wdev);
                /* Fall */
        case WDIOC_GETTIMEOUT:
                return put_user(timer_margin, (int __user *)arg);
        }
 +      return 0;
  }
  
  static const struct file_operations omap_wdt_fops = {
        .release = omap_wdt_release,
  };
  
 -static struct miscdevice omap_wdt_miscdev = {
 -      .minor = WATCHDOG_MINOR,
 -      .name = "watchdog",
 -      .fops = &omap_wdt_fops
 -};
  
  static int __init omap_wdt_probe(struct platform_device *pdev)
  {
        struct resource *res, *mem;
        int ret;
 +      struct omap_wdt_dev *wdev;
  
        /* reserve static register mappings */
        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
        if (!res)
                return -ENOENT;
  
 +      if (omap_wdt_dev)
 +              return -EBUSY;
 +
        mem = request_mem_region(res->start, res->end - res->start + 1,
                                 pdev->name);
        if (mem == NULL)
                return -EBUSY;
  
 -      platform_set_drvdata(pdev, mem);
 -
 -      omap_wdt_users = 0;
 +      wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL);
 +      if (!wdev) {
 +              ret = -ENOMEM;
 +              goto fail;
 +      }
 +      wdev->omap_wdt_users = 0;
 +      wdev->mem = mem;
  
        if (cpu_is_omap16xx()) {
 -              armwdt_ck = clk_get(&pdev->dev, "armwdt_ck");
 -              if (IS_ERR(armwdt_ck)) {
 -                      ret = PTR_ERR(armwdt_ck);
 -                      armwdt_ck = NULL;
 +              wdev->armwdt_ck = clk_get(&pdev->dev, "armwdt_ck");
 +              if (IS_ERR(wdev->armwdt_ck)) {
 +                      ret = PTR_ERR(wdev->armwdt_ck);
 +                      wdev->armwdt_ck = NULL;
                        goto fail;
                }
        }
  
        if (cpu_is_omap24xx()) {
 -              mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick");
 -              if (IS_ERR(mpu_wdt_ick)) {
 -                      ret = PTR_ERR(mpu_wdt_ick);
 -                      mpu_wdt_ick = NULL;
 +              wdev->mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick");
 +              if (IS_ERR(wdev->mpu_wdt_ick)) {
 +                      ret = PTR_ERR(wdev->mpu_wdt_ick);
 +                      wdev->mpu_wdt_ick = NULL;
 +                      goto fail;
 +              }
 +              wdev->mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck");
 +              if (IS_ERR(wdev->mpu_wdt_fck)) {
 +                      ret = PTR_ERR(wdev->mpu_wdt_fck);
 +                      wdev->mpu_wdt_fck = NULL;
 +                      goto fail;
 +              }
 +      }
 +
 +      if (cpu_is_omap34xx()) {
 +              wdev->mpu_wdt_ick = clk_get(&pdev->dev, "wdt2_ick");
 +              if (IS_ERR(wdev->mpu_wdt_ick)) {
 +                      ret = PTR_ERR(wdev->mpu_wdt_ick);
 +                      wdev->mpu_wdt_ick = NULL;
                        goto fail;
                }
 -              mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck");
 -              if (IS_ERR(mpu_wdt_fck)) {
 -                      ret = PTR_ERR(mpu_wdt_fck);
 -                      mpu_wdt_fck = NULL;
 +              wdev->mpu_wdt_fck = clk_get(&pdev->dev, "wdt2_fck");
 +              if (IS_ERR(wdev->mpu_wdt_fck)) {
 +                      ret = PTR_ERR(wdev->mpu_wdt_fck);
 +                      wdev->mpu_wdt_fck = NULL;
                        goto fail;
                }
        }
 +      wdev->base = (void __iomem *) (mem->start);
 +      platform_set_drvdata(pdev, wdev);
  
 -      omap_wdt_disable();
 +      omap_wdt_disable(wdev);
        omap_wdt_adjust_timeout(timer_margin);
  
 -      omap_wdt_miscdev.parent = &pdev->dev;
 -      ret = misc_register(&omap_wdt_miscdev);
 +      wdev->omap_wdt_miscdev.parent = &pdev->dev;
 +      wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR;
 +      wdev->omap_wdt_miscdev.name = "watchdog";
 +      wdev->omap_wdt_miscdev.fops = &omap_wdt_fops;
 +
 +      ret = misc_register(&(wdev->omap_wdt_miscdev));
        if (ret)
                goto fail;
  
 -      pr_info("OMAP Watchdog Timer: initial timeout %d sec\n", timer_margin);
 +      pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
 +              omap_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
 +              timer_margin);
  
        /* autogate OCP interface clock */
 -      omap_writel(0x01, OMAP_WATCHDOG_SYS_CONFIG);
 +      omap_writel(0x01, wdev->base + OMAP_WATCHDOG_SYS_CONFIG);
 +
 +      omap_wdt_dev = pdev;
 +
        return 0;
  
  fail:
 -      if (armwdt_ck)
 -              clk_put(armwdt_ck);
 -      if (mpu_wdt_ick)
 -              clk_put(mpu_wdt_ick);
 -      if (mpu_wdt_fck)
 -              clk_put(mpu_wdt_fck);
 -      release_resource(mem);
 +      if (wdev) {
 +              platform_set_drvdata(pdev, NULL);
 +              if (wdev->armwdt_ck)
 +                      clk_put(wdev->armwdt_ck);
 +              if (wdev->mpu_wdt_ick)
 +                      clk_put(wdev->mpu_wdt_ick);
 +              if (wdev->mpu_wdt_fck)
 +                      clk_put(wdev->mpu_wdt_fck);
 +              kfree(wdev);
 +      }
 +      if (mem) {
 +              release_resource(mem);
 +      }
        return ret;
  }
  
  static void omap_wdt_shutdown(struct platform_device *pdev)
  {
 -      omap_wdt_disable();
 +      struct omap_wdt_dev *wdev;
 +      wdev = platform_get_drvdata(pdev);
 +
 +      if (wdev->omap_wdt_users)
 +              omap_wdt_disable(wdev);
  }
  
  static int omap_wdt_remove(struct platform_device *pdev)
  {
 -      struct resource *mem = platform_get_drvdata(pdev);
 -      misc_deregister(&omap_wdt_miscdev);
 -      release_resource(mem);
 -      if (armwdt_ck)
 -              clk_put(armwdt_ck);
 -      if (mpu_wdt_ick)
 -              clk_put(mpu_wdt_ick);
 -      if (mpu_wdt_fck)
 -              clk_put(mpu_wdt_fck);
 +      struct omap_wdt_dev *wdev;
 +      wdev = platform_get_drvdata(pdev);
 +
 +      misc_deregister(&(wdev->omap_wdt_miscdev));
 +      release_resource(wdev->mem);
 +      platform_set_drvdata(pdev, NULL);
 +      if (wdev->armwdt_ck) {
 +              clk_put(wdev->armwdt_ck);
 +              wdev->armwdt_ck = NULL;
 +      }
 +      if (wdev->mpu_wdt_ick) {
 +              clk_put(wdev->mpu_wdt_ick);
 +              wdev->mpu_wdt_ick = NULL;
 +      }
 +      if (wdev->mpu_wdt_fck) {
 +              clk_put(wdev->mpu_wdt_fck);
 +              wdev->mpu_wdt_fck = NULL;
 +      }
 +      kfree(wdev);
 +      omap_wdt_dev = NULL;
        return 0;
  }
  
  
  static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
  {
 -      if (omap_wdt_users)
 -              omap_wdt_disable();
 +      struct omap_wdt_dev *wdev;
 +      wdev = platform_get_drvdata(pdev);
 +      if (wdev->omap_wdt_users)
 +              omap_wdt_disable(wdev);
        return 0;
  }
  
  static int omap_wdt_resume(struct platform_device *pdev)
  {
 -      if (omap_wdt_users) {
 -              omap_wdt_enable();
 -              omap_wdt_ping();
 +      struct omap_wdt_dev *wdev;
 +      wdev = platform_get_drvdata(pdev);
 +      if (wdev->omap_wdt_users) {
 +              omap_wdt_enable(wdev);
 +              omap_wdt_ping(wdev);
        }
        return 0;
  }
@@@ -462,3 -387,4 +462,4 @@@ module_exit(omap_wdt_exit)
  MODULE_AUTHOR("George G. Davis");
  MODULE_LICENSE("GPL");
  MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
+ MODULE_ALIAS("platform:omap_wdt");