if(!(readl(olympic_mmio+BCTL) & BCTL_MODE_INDICATOR)) { 
                t=jiffies;
-               while (!readl(olympic_mmio+CLKCTL) & CLKCTL_PAUSE) { 
+               while (!(readl(olympic_mmio+CLKCTL) & CLKCTL_PAUSE)) {
                        schedule() ; 
                        if(time_after(jiffies, t + 2*HZ)) {
                                printk(KERN_ERR "IBM Cardbus tokenring adapter not responsing.\n") ; 
 
        writel(BMCTL_TX1_DIS,olympic_mmio+BMCTL_RWM); /* Yes, this enables TX channel 1 */
        for(i=0;i<OLYMPIC_TX_RING_SIZE;i++) 
-               olympic_priv->olympic_tx_ring[i].buffer=0xdeadbeef;
+               olympic_priv->olympic_tx_ring[i].buffer=cpu_to_le32(0xdeadbeef);
 
        olympic_priv->free_tx_ring_entries=OLYMPIC_TX_RING_SIZE;
        olympic_priv->tx_ring_dma_addr = pci_map_single(olympic_priv->pdev,olympic_priv->olympic_tx_ring,
                        dev_kfree_skb_irq(olympic_priv->rx_ring_skb[olympic_priv->rx_status_last_received]);
                        olympic_priv->rx_ring_skb[olympic_priv->rx_status_last_received] = NULL;
                }
-               if (olympic_priv->olympic_rx_ring[olympic_priv->rx_status_last_received].buffer != 0xdeadbeef) {
+               if (olympic_priv->olympic_rx_ring[olympic_priv->rx_status_last_received].buffer != cpu_to_le32(0xdeadbeef)) {
                        pci_unmap_single(olympic_priv->pdev, 
                        le32_to_cpu(olympic_priv->olympic_rx_ring[olympic_priv->rx_status_last_received].buffer),
                        olympic_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE);
                                        le32_to_cpu(olympic_priv->olympic_tx_ring[olympic_priv->tx_ring_last_status].buffer), 
                                        olympic_priv->tx_ring_skb[olympic_priv->tx_ring_last_status]->len,PCI_DMA_TODEVICE);
                                dev_kfree_skb_irq(olympic_priv->tx_ring_skb[olympic_priv->tx_ring_last_status]);
-                               olympic_priv->olympic_tx_ring[olympic_priv->tx_ring_last_status].buffer=0xdeadbeef;
+                               olympic_priv->olympic_tx_ring[olympic_priv->tx_ring_last_status].buffer=cpu_to_le32(0xdeadbeef);
                                olympic_priv->olympic_tx_status_ring[olympic_priv->tx_ring_last_status].status=0;
                        }
                        netif_wake_queue(dev);
                        buffer_len = swab16(readw(buf_ptr+offsetof(struct mac_receive_buffer,buffer_length))); 
                        memcpy_fromio(skb_put(mac_frame, buffer_len), frame_data , buffer_len ) ;
                        next_ptr=readw(buf_ptr+offsetof(struct mac_receive_buffer,next)); 
-               } while (next_ptr && (buf_ptr=olympic_priv->olympic_lap + ntohs(next_ptr)));
+               } while (next_ptr && (buf_ptr=olympic_priv->olympic_lap + swab16(next_ptr)));
 
                mac_frame->protocol = tr_type_trans(mac_frame, dev);
 
 
 /* xxxx These structures are all little endian in hardware. */
 
 struct olympic_tx_desc {
-       u32 buffer;
-       u32 status_length;
+       __le32 buffer;
+       __le32 status_length;
 };
 
 struct olympic_tx_status {
-       u32 status;
+       __le32 status;
 };
 
 struct olympic_rx_desc {
-       u32 buffer;
-       u32 res_length; 
+       __le32 buffer;
+       __le32 res_length; 
 };
 
 struct olympic_rx_status {
-       u32 fragmentcnt_framelen;
-       u32 status_buffercnt;
+       __le32 fragmentcnt_framelen;
+       __le32 status_buffercnt;
 };
 /* xxxx END These structures are all little endian in hardware. */
 /* xxxx There may be more, but I'm pretty sure about these */
 
 struct mac_receive_buffer {
-       u16 next ; 
+       __le16 next ; 
        u8 padding ; 
        u8 frame_status ;
-       u16 buffer_length ; 
+       __le16 buffer_length ; 
        u8 frame_data ; 
 };