ARM: OMAP: Minor GPIO cleanup for upstream merge

Minor GPIO cleanup for upstream merge

Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 972f81c66f78ff40260b96a65cf628c07d4ca069..e07cc9b4ce9c2a3973021035f3775999f65891c3 100644 (file)
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -493,42 +493,15 @@ do {      \
        __raw_writel(l, base + reg); \
 } while(0)
 
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
-static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
-{
-       void __iomem *base = bank->base;
-       u32 gpio_bit = 1 << gpio;
-
-       MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
-               trigger & __IRQT_LOWLVL);
-       MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
-               trigger & __IRQT_HIGHLVL);
-       MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
-               trigger & __IRQT_RISEDGE);
-       MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
-               trigger & __IRQT_FALEDGE);
-       if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
-               if (trigger != 0)
-                       __raw_writel(1 << gpio, bank->base + OMAP24XX_GPIO_SETWKUENA);
-               else
-                       __raw_writel(1 << gpio, bank->base + OMAP24XX_GPIO_CLEARWKUENA);
-       } else {
-               if (trigger != 0)
-                       bank->enabled_non_wakeup_gpios |= gpio_bit;
-               else
-                       bank->enabled_non_wakeup_gpios &= ~gpio_bit;
-       }
-       /* FIXME: Possibly do 'set_irq_handler(j, handle_level_irq)' if only level
-        * triggering requested. */
-}
-
-void
-omap_set_gpio_debounce(int gpio, int enable)
+void omap_set_gpio_debounce(int gpio, int enable)
 {
        struct gpio_bank *bank;
        void __iomem *reg;
        u32 val, l = 1 << get_gpio_index(gpio);
 
+       if (cpu_class_is_omap1())
+               return;
+
        bank = get_gpio_bank(gpio);
        reg = bank->base;
 
@@ -544,12 +517,14 @@ omap_set_gpio_debounce(int gpio, int enable)
 }
 EXPORT_SYMBOL(omap_set_gpio_debounce);
 
-void
-omap_set_gpio_debounce_time(int gpio, int enc_time)
+void omap_set_gpio_debounce_time(int gpio, int enc_time)
 {
        struct gpio_bank *bank;
        void __iomem *reg;
 
+       if (cpu_class_is_omap1())
+               return;
+
        bank = get_gpio_bank(gpio);
        reg = bank->base;
 
@@ -558,6 +533,42 @@ omap_set_gpio_debounce_time(int gpio, int enc_time)
        __raw_writel(enc_time, reg);
 }
 EXPORT_SYMBOL(omap_set_gpio_debounce_time);
+
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
+static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
+                                               int trigger)
+{
+       void __iomem *base = bank->base;
+       u32 gpio_bit = 1 << gpio;
+
+       MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
+                                       trigger & __IRQT_LOWLVL);
+       MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
+                                       trigger & __IRQT_HIGHLVL);
+       MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
+                                       trigger & __IRQT_RISEDGE);
+       MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
+                                       trigger & __IRQT_FALEDGE);
+
+       if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
+               if (trigger != 0)
+                       __raw_writel(1 << gpio, bank->base
+                                       + OMAP24XX_GPIO_SETWKUENA);
+               else
+                       __raw_writel(1 << gpio, bank->base
+                                       + OMAP24XX_GPIO_CLEARWKUENA);
+       } else {
+               if (trigger != 0)
+                       bank->enabled_non_wakeup_gpios |= gpio_bit;
+               else
+                       bank->enabled_non_wakeup_gpios &= ~gpio_bit;
+       }
+
+       /*
+        * FIXME: Possibly do 'set_irq_handler(j, handle_level_irq)' if only
+        *level triggering requested.
+        */
+}
 #endif
 
 static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)

diff --git a/include/asm-arm/arch-omap/gpio.h b/include/asm-arm/arch-omap/gpio.h
index f926b6b1e2c97938606d7f413c4cb695bc67e604..9ff5cbb0e3e4e6575c16a2cb19f73d0fc91d1e91 100644 (file)
--- a/include/asm-arm/arch-omap/gpio.h
+++ b/include/asm-arm/arch-omap/gpio.h
@@ -5,7 +5,7 @@
  *
  * Copyright (C) 2003-2005 Nokia Corporation
  *
- * Written by Juha Yrj�l� <juha.yrjola@nokia.com>
+ * Written by Juha Yrjölä <juha.yrjola@nokia.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -79,11 +79,8 @@ extern void omap_set_gpio_dataout(int gpio, int enable);
 extern int omap_get_gpio_datain(int gpio);
 extern void omap2_gpio_prepare_for_retention(void);
 extern void omap2_gpio_resume_after_retention(void);
-
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
 extern void omap_set_gpio_debounce(int gpio, int enable);
 extern void omap_set_gpio_debounce_time(int gpio, int enable);
-#endif
 
 /*-------------------------------------------------------------------------*/