There are a couple more Feroceon-based SoCs out in the field that use
different Variant and Architecture fields in their Main ID registers
-- this patch tweaks the processor match/mask in proc-feroceon.S to
catch those SoCs as well.
Signed-off-by: Ke Wei <kewei@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
 #ifdef CONFIG_CPU_FEROCEON_OLD_ID
        .type   __feroceon_old_id_proc_info,#object
 __feroceon_old_id_proc_info:
-       .long   0x41069260
-       .long   0xfffffff0
+       .long   0x41009260
+       .long   0xff00fff0
        .long   PMD_TYPE_SECT | \
                PMD_SECT_BUFFERABLE | \
                PMD_SECT_CACHEABLE | \