#include <asm/ptrace.h>
 #include <asm/system.h>
 #include <asm/pmc.h>
+#include <asm/cputable.h>
 
 #include "op_impl.h"
 
                case PV_630:
                case PV_630p:
                        model = &op_model_rs64;
-                       model->num_counters = 8;
                        ops->cpu_type = "ppc64/power3";
                        break;
 
                case PV_ICESTAR:
                case PV_SSTAR:
                        model = &op_model_rs64;
-                       model->num_counters = 8;
                        ops->cpu_type = "ppc64/rs64";
                        break;
 
                case PV_POWER4:
                case PV_POWER4p:
                        model = &op_model_power4;
-                       model->num_counters = 8;
                        ops->cpu_type = "ppc64/power4";
                        break;
 
                case PV_970FX:
                case PV_970MP:
                        model = &op_model_power4;
-                       model->num_counters = 8;
                        ops->cpu_type = "ppc64/970";
                        break;
 
                case PV_POWER5:
                case PV_POWER5p:
                        model = &op_model_power4;
-                       model->num_counters = 6;
                        ops->cpu_type = "ppc64/power5";
                        break;
 
                        return -ENODEV;
        }
 
+       model->num_counters = cur_cpu_spec->num_pmcs;
        ops->create_files = op_ppc64_create_files;
        ops->setup = op_ppc64_setup;
        ops->shutdown = op_ppc64_shutdown;
 
 
 static unsigned long reset_value[OP_MAX_COUNTER];
 
-static int num_counters;
 static int oprofile_running;
 static int mmcra_has_sihv;
 
 {
        int i;
 
-       num_counters = num_ctrs;
-
        /*
         * SIHV / SIPR bits are only implemented on POWER4+ (GQ) and above.
         * However we disable it on all POWER4 until we verify it works
 
        backtrace_spinlocks = sys->backtrace_spinlocks;
 
-       for (i = 0; i < num_counters; ++i)
+       for (i = 0; i < cur_cpu_spec->num_pmcs; ++i)
                reset_value[i] = 0x80000000UL - ctr[i].count;
 
        /* setup user and kernel profiling */
        /* set the PMM bit (see comment below) */
        mtmsrd(mfmsr() | MSR_PMM);
 
-       for (i = 0; i < num_counters; ++i) {
+       for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) {
                if (ctr[i].enabled) {
                        ctr_write(i, reset_value[i]);
                } else {
        /* set the PMM bit (see comment below) */
        mtmsrd(mfmsr() | MSR_PMM);
 
-       for (i = 0; i < num_counters; ++i) {
+       for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) {
                val = ctr_read(i);
                if (val < 0) {
                        if (oprofile_running && ctr[i].enabled) {