* Only enable those clocks we will need, let the drivers
         * enable other clocks as necessary
         */
-       clk_enable(&sync_32k_ick);
-       clk_enable(&omapctrl_ick);
-
-       /* Force the APLLs always active. The clocks are idled
-        * automatically by hardware. */
-       clk_enable(&apll96_ck);
-       clk_enable(&apll54_ck);
-
-       if (cpu_is_omap2430())
-               clk_enable(&sdrc_ick);
+       clk_enable_init_clocks();
 
        /* Avoid sleeping sleeping during omap2_clk_prepare_for_reboot() */
        vclk = clk_get(NULL, "virt_prcm_set");
 
        .parent         = &sys_ck,
        .rate           = 96000000,
        .flags          = CLOCK_IN_OMAP242X |CLOCK_IN_OMAP243X |
-                               RATE_FIXED | RATE_PROPAGATES,
+                               RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT,
        .enable_reg     = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
        .enable_bit     = OMAP24XX_EN_96M_PLL_SHIFT,
        .enable         = &omap2_clk_fixed_enable,
        .parent         = &sys_ck,
        .rate           = 54000000,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               RATE_FIXED | RATE_PROPAGATES,
+                               RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT,
        .enable_reg     = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
        .enable_bit     = OMAP24XX_EN_54M_PLL_SHIFT,
        .enable         = &omap2_clk_fixed_enable,
 static struct clk sync_32k_ick = {
        .name           = "sync_32k_ick",
        .parent         = &l4_ck,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ENABLE_ON_INIT,
        .enable_reg     = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
        .enable_bit     = OMAP24XX_EN_32KSYNC_SHIFT,
        .recalc         = &followparent_recalc,
 static struct clk omapctrl_ick = {
        .name           = "omapctrl_ick",
        .parent         = &l4_ck,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ENABLE_ON_INIT,
        .enable_reg     = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
        .enable_bit     = OMAP24XX_EN_OMAPCTRL_SHIFT,
        .recalc         = &followparent_recalc,
 static struct clk sdrc_ick = {
        .name           = "sdrc_ick",
        .parent         = &l4_ck,
-       .flags          = CLOCK_IN_OMAP243X,
+       .flags          = CLOCK_IN_OMAP243X | ENABLE_ON_INIT,
        .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, OMAP2430_CM_ICLKEN3),
        .enable_bit     = OMAP2430_EN_SDRC_SHIFT,
        .recalc         = &followparent_recalc,
 
 }
 EXPORT_SYMBOL(clk_allow_idle);
 
+void clk_enable_init_clocks(void)
+{
+       struct clk *clkp;
+
+       list_for_each_entry(clkp, &clocks, node) {
+               if (clkp->flags & ENABLE_ON_INIT)
+                       clk_enable(clkp);
+       }
+}
+EXPORT_SYMBOL(clk_enable_init_clocks);
+
 /*-------------------------------------------------------------------------*/
 
 #ifdef CONFIG_OMAP_RESET_CLOCKS
 
 extern void clk_allow_idle(struct clk *clk);
 extern void clk_deny_idle(struct clk *clk);
 extern int clk_get_usecount(struct clk *clk);
+extern void clk_enable_init_clocks(void);
 
 /* Clock flags */
 #define RATE_CKCTL             (1 << 0)        /* Main fixed ratio clocks */
 #define CLOCK_NO_IDLE_PARENT   (1 << 8)
 #define DELAYED_APP            (1 << 9)        /* Delay application of clock */
 #define CONFIG_PARTICIPANT     (1 << 10)       /* Fundamental clock */
-/* bits 11-20 are currently free */
+#define ENABLE_ON_INIT         (1 << 11)       /* Enable upon framework init */
+/* bits 12-20 are currently free */
 #define CLOCK_IN_OMAP310       (1 << 21)
 #define CLOCK_IN_OMAP730       (1 << 22)
 #define CLOCK_IN_OMAP1510      (1 << 23)