static int ipath_pe_intconfig(struct ipath_devdata *dd)
 {
-       u64 val;
        u32 chiprev;
 
        /*
        if ((chiprev & INFINIPATH_R_CHIPREVMINOR_MASK) > 1) {
                /* Rev2+ reports extra errors via internal GPIO pins */
                dd->ipath_flags |= IPATH_GPIO_ERRINTRS;
-               val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_gpio_mask);
-               val |= IPATH_GPIO_ERRINTR_MASK;
-               ipath_write_kreg( dd, dd->ipath_kregs->kr_gpio_mask, val);
+               dd->ipath_gpio_mask |= IPATH_GPIO_ERRINTR_MASK;
+               ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_mask,
+                                dd->ipath_gpio_mask);
        }
        return 0;
 }
 
                        gpiostatus &= ~(1 << IPATH_GPIO_PORT0_BIT);
                        chk0rcv = 1;
                }
-               if (unlikely(gpiostatus)) {
+               if (gpiostatus) {
                        /*
                         * Some unexpected bits remain. If they could have
                         * caused the interrupt, complain and clear.
                         * GPIO interrupts, possibly on a "three strikes"
                         * basis.
                         */
-                       u32 mask;
-                       mask = ipath_read_kreg32(
-                               dd, dd->ipath_kregs->kr_gpio_mask);
+                       const u32 mask = (u32) dd->ipath_gpio_mask;
+
                        if (mask & gpiostatus) {
                                ipath_dbg("Unexpected GPIO IRQ bits %x\n",
                                  gpiostatus & mask);
 
        unsigned long ipath_pioavailshadow[8];
        /* shadow of kr_gpio_out, for rmw ops */
        u64 ipath_gpio_out;
+       /* shadow the gpio mask register */
+       u64 ipath_gpio_mask;
        /* kr_revision shadow */
        u64 ipath_revision;
        /*
 
         * processing.
         */
        if (dd->ipath_flags & IPATH_GPIO_INTR) {
-               u64 val;
                ipath_write_kreg(dd, dd->ipath_kregs->kr_debugportselect,
                                 0x2074076542310ULL);
                /* Enable GPIO bit 2 interrupt */
-               val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_gpio_mask);
-               val |= (u64) (1 << IPATH_GPIO_PORT0_BIT);
-               ipath_write_kreg( dd, dd->ipath_kregs->kr_gpio_mask, val);
+               dd->ipath_gpio_mask |= (u64) (1 << IPATH_GPIO_PORT0_BIT);
+               ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_mask,
+                                dd->ipath_gpio_mask);
        }
 
        init_timer(&dd->verbs_timer);
                 u64 val;
                 /* Disable GPIO bit 2 interrupt */
                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_gpio_mask);
-                val &= ~((u64) (1 << IPATH_GPIO_PORT0_BIT));
-                ipath_write_kreg( dd, dd->ipath_kregs->kr_gpio_mask, val);
+               dd->ipath_gpio_mask &= ~((u64) (1 << IPATH_GPIO_PORT0_BIT));
+               ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_mask,
+                                dd->ipath_gpio_mask);
                /*
                 * We might want to undo changes to debugportselect,
                 * but how?