Enable the PCI slow clock workaround, if we're running a PCI core rev <= 10.
Signed-off-by: Michael Buesch <mb@bu3sch.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
        }
        if (sprom->boardflags_lo & B43_BFL_XTAL_NOSLOW)
                hf |= B43_HF_DSCRQ; /* Disable slowclock requests from ucode. */
+       if ((bus->bustype == SSB_BUSTYPE_PCI) &&
+           (bus->pcicore.dev->id.revision <= 10))
+               hf |= B43_HF_PCISCW; /* PCI slow clock workaround. */
        b43_hf_write(dev, hf);
 
        b43_set_retry_limits(dev, B43_DEFAULT_SHORT_RETRY_LIMIT,