#include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+
+#include <mach/cpu.h>
 #include <mach/at91cap9.h>
 #include <mach/at91_pmc.h>
 #include <mach/at91_rstc.h>
 
        /* Register GPIO subsystem */
        at91_gpio_init(at91cap9_gpio, 4);
+
+       /* Remember the silicon revision */
+       if (cpu_is_at91cap9_revB())
+               system_rev = 0xB;
+       else if (cpu_is_at91cap9_revC())
+               system_rev = 0xC;
 }
 
 /* --------------------------------------------------------------------
 
  */
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
+#include <asm/mach/irq.h>
 
 #include <linux/dma-mapping.h>
 #include <linux/platform_device.h>
 #include <video/atmel_lcdc.h>
 
 #include <mach/board.h>
+#include <mach/cpu.h>
 #include <mach/gpio.h>
 #include <mach/at91cap9.h>
 #include <mach/at91cap9_matrix.h>
        if (!data)
                return;
 
+       if (cpu_is_at91cap9_revB())
+               set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
+
        /* Enable VBus control for UHP ports */
        for (i = 0; i < data->ports; i++) {
                if (data->vbus_pin[i])
 
 void __init at91_add_device_usba(struct usba_platform_data *data)
 {
-       at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS |
-                                         AT91_MATRIX_UDPHS_BYPASS_LOCK);
+       if (cpu_is_at91cap9_revB()) {
+               set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
+               at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS |
+                                                 AT91_MATRIX_UDPHS_BYPASS_LOCK);
+       }
+       else
+               at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS);
 
        /*
         * Invalid pins are 0 on AT91, but the usba driver is shared
        if (!data)
                return;
 
+       if (cpu_is_at91cap9_revB())
+               set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
+
        at91_set_A_periph(AT91_PIN_PC1, 0);     /* LCDHSYNC */
        at91_set_A_periph(AT91_PIN_PC2, 0);     /* LCDDOTCK */
        at91_set_A_periph(AT91_PIN_PC3, 0);     /* LCDDEN */
 
 #include <mach/hardware.h>
 #include <asm/setup.h>
 #include <asm/mach-types.h>
-#include <asm/irq.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <asm/mach/irq.h>
 
 #include <mach/board.h>
 #include <mach/gpio.h>
        /* Serial */
        at91_add_device_serial();
        /* USB Host */
-       set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH);
        at91_add_device_usbh(&cap9adk_usbh_data);
        /* USB HS */
-       set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH);
        at91_add_device_usba(&cap9adk_usba_udc_data);
        /* SPI */
        at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices));
        /* I2C */
        at91_add_device_i2c(NULL, 0);
        /* LCD Controller */
-       set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH);
        at91_add_device_lcdc(&cap9adk_lcdc_data);
        /* AC97 */
        at91_add_device_ac97(&cap9adk_ac97_data);
 
 #define                AT91_PMC_PCK            (1 <<  0)               /* Processor Clock */
 #define                AT91RM9200_PMC_UDP      (1 <<  1)               /* USB Devcice Port Clock [AT91RM9200 only] */
 #define                AT91RM9200_PMC_MCKUDP   (1 <<  2)               /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */
+#define                AT91CAP9_PMC_DDR        (1 <<  2)               /* DDR Clock [AT91CAP9 revC only] */
 #define                AT91RM9200_PMC_UHP      (1 <<  4)               /* USB Host Port Clock [AT91RM9200 only] */
 #define                AT91SAM926x_PMC_UHP     (1 <<  6)               /* USB Host Port Clock [AT91SAM926x only] */
 #define                AT91CAP9_PMC_UHP        (1 <<  6)               /* USB Host Port Clock [AT91CAP9 only] */
 #define                AT91_PMC_LOCKB          (1 <<  2)               /* PLLB Lock */
 #define                AT91_PMC_MCKRDY         (1 <<  3)               /* Master Clock */
 #define                AT91_PMC_LOCKU          (1 <<  6)               /* UPLL Lock [AT91CAP9 only] */
+#define                AT91_PMC_OSCSEL         (1 <<  7)               /* Slow Clock Oscillator [AT91CAP9 revC only] */
 #define                AT91_PMC_PCK0RDY        (1 <<  8)               /* Programmable Clock 0 */
 #define                AT91_PMC_PCK1RDY        (1 <<  9)               /* Programmable Clock 1 */
 #define                AT91_PMC_PCK2RDY        (1 << 10)               /* Programmable Clock 2 */
 #define                AT91_PMC_PCK3RDY        (1 << 11)               /* Programmable Clock 3 */
 #define        AT91_PMC_IMR            (AT91_PMC + 0x6c)       /* Interrupt Mask Register */
 
+#define AT91_PMC_PROT          (AT91_PMC + 0xe4)       /* Protect Register [AT91CAP9 revC only] */
+#define                AT91_PMC_PROTKEY        0x504d4301      /* Activation Code */
+
+#define AT91_PMC_VER           (AT91_PMC + 0xfc)       /* PMC Module Version [AT91CAP9 only] */
+
 #endif
 
 #define AT91_RTT       (0xfffffd20 - AT91_BASE_SYS)
 #define AT91_PIT       (0xfffffd30 - AT91_BASE_SYS)
 #define AT91_WDT       (0xfffffd40 - AT91_BASE_SYS)
-#define AT91_GPBR      (0xfffffd50 - AT91_BASE_SYS)
+#define AT91_GPBR      (cpu_is_at91cap9_revB() ?       \
+                       (0xfffffd50 - AT91_BASE_SYS) :  \
+                       (0xfffffd60 - AT91_BASE_SYS))
 
 #define AT91_USART0    AT91CAP9_BASE_US0
 #define AT91_USART1    AT91CAP9_BASE_US1
 
        return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH);
 }
 
+#ifdef CONFIG_ARCH_AT91CAP9
+#include <mach/at91_pmc.h>
+
+#define ARCH_REVISION_CAP9_B   0x399
+#define ARCH_REVISION_CAP9_C   0x601
+
+static inline unsigned long at91cap9_rev_identify(void)
+{
+       return (at91_sys_read(AT91_PMC_VER));
+}
+#endif
 
 #ifdef CONFIG_ARCH_AT91RM9200
 #define cpu_is_at91rm9200()    (at91_cpu_identify() == ARCH_ID_AT91RM9200)
 
 #ifdef CONFIG_ARCH_AT91CAP9
 #define cpu_is_at91cap9()      (at91_cpu_identify() == ARCH_ID_AT91CAP9)
+#define cpu_is_at91cap9_revB() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_B)
+#define cpu_is_at91cap9_revC() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_C)
 #else
 #define cpu_is_at91cap9()      (0)
+#define cpu_is_at91cap9_revB() (0)
+#define cpu_is_at91cap9_revC() (0)
 #endif
 
 /*
 
 
 #include <mach/board.h>
 #include <mach/at91_rtt.h>
+#include <mach/cpu.h>
 
 
 /*