#define CM_CH0_SRATE_176K      0x00000200
 #define CM_CH0_SRATE_96K       0x00000200      /* model 055? */
 #define CM_CH0_SRATE_88K       0x00000100
+#define CM_CH0_SRATE_128K      0x00000300
+#define CM_CH0_SRATE_MASK      0x00000300
 
 #define CM_SPDIF_INVERSE2      0x00000080      /* model 055? */
 #define CM_DBLSPDS             0x00000040      /* double SPDIF sample rate 88.2/96 */
        unsigned int can_ac3_sw: 1;
        unsigned int can_ac3_hw: 1;
        unsigned int can_multi_ch: 1;
+       unsigned int can_96k: 1;        /* samplerate above 48k */
        unsigned int do_soft_ac3: 1;
 
        unsigned int spdif_playback_avail: 1;   /* spdif ready? */
 {
        unsigned int i;
 
-       if (rate > 48000)
-               rate /= 2;
        for (i = 0; i < ARRAY_SIZE(rates); i++) {
                if (rates[i] == rate)
                        return i;
 static int snd_cmipci_pcm_prepare(struct cmipci *cm, struct cmipci_pcm *rec,
                                 struct snd_pcm_substream *substream)
 {
-       unsigned int reg, freq, val;
+       unsigned int reg, freq, freq_ext, val;
        unsigned int period_size;
        struct snd_pcm_runtime *runtime = substream->runtime;
 
        //snd_printd("cmipci: functrl0 = %08x\n", cm->ctrl);
 
        /* set sample rate */
-       freq = snd_cmipci_rate_freq(runtime->rate);
+       freq = 0;
+       freq_ext = 0;
+       if (runtime->rate > 48000)
+               switch (runtime->rate) {
+               case 88200:  freq_ext = CM_CH0_SRATE_88K; break;
+               case 96000:  freq_ext = CM_CH0_SRATE_96K; break;
+               case 128000: freq_ext = CM_CH0_SRATE_128K; break;
+               default:     snd_BUG(); break;
+               }
+       else
+               freq = snd_cmipci_rate_freq(runtime->rate);
        val = snd_cmipci_read(cm, CM_REG_FUNCTRL1);
        if (rec->ch) {
                val &= ~CM_DSFC_MASK;
                val &= ~CM_CH0FMT_MASK;
                val |= rec->fmt << CM_CH0FMT_SHIFT;
        }
-       if (cm->chip_version == 68) {
-               if (runtime->rate == 88200)
-                       val |= CM_CH0_SRATE_88K << (rec->ch * 2);
-               else
-                       val &= ~(CM_CH0_SRATE_88K << (rec->ch * 2));
-               if (runtime->rate == 96000)
-                       val |= CM_CH0_SRATE_96K << (rec->ch * 2);
-               else
-                       val &= ~(CM_CH0_SRATE_96K << (rec->ch * 2));
+       if (cm->can_96k) {
+               val &= ~(CM_CH0_SRATE_MASK << (rec->ch * 2));
+               val |= freq_ext << (rec->ch * 2);
        }
        snd_cmipci_write(cm, CM_REG_CHFORMAT, val);
        //snd_printd("cmipci: chformat = %08x\n", val);
        int rate = substream->runtime->rate;
        int err, do_spdif, do_ac3 = 0;
 
-       do_spdif = (rate >= 44100 &&
+       do_spdif = (rate >= 44100 && rate <= 96000 &&
                    substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE &&
                    substream->runtime->channels == 2);
        if (do_spdif && cm->can_ac3_hw) 
                val = snd_cmipci_read(cm, CM_REG_CHFORMAT);
                val &= ~(CM_CH0FMT_MASK << (rec->ch * 2));
                val |= (3 << CM_CH0FMT_SHIFT) << (rec->ch * 2);
-               if (cm->chip_version == 68) {
-                       val &= ~(CM_CH0_SRATE_88K << (rec->ch * 2));
-                       val &= ~(CM_CH0_SRATE_96K << (rec->ch * 2));
-               }
+               if (cm->can_96k)
+                       val &= ~(CM_CH0_SRATE_MASK << (rec->ch * 2));
                snd_cmipci_write(cm, CM_REG_CHFORMAT, val);
        
                /* start stream (we don't need interrupts) */
 
        spin_lock_irq(&cm->reg_lock);
        snd_cmipci_set_bit(cm, CM_REG_FUNCTRL1, CM_CAPTURE_SPDF);
+       if (cm->can_96k) {
+               if (substream->runtime->rate > 48000)
+                       snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_DBLSPDS);
+               else
+                       snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_DBLSPDS);
+       }
        spin_unlock_irq(&cm->reg_lock);
 
        return snd_cmipci_pcm_prepare(cm, &cm->channel[CM_CH_CAPT], substream);
        .fifo_size =            0,
 };
 
+static unsigned int rate_constraints[] = { 5512, 8000, 11025, 16000, 22050,
+                       32000, 44100, 48000, 88200, 96000, 128000 };
+static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
+               .count = ARRAY_SIZE(rate_constraints),
+               .list = rate_constraints,
+               .mask = 0,
+};
+
 /*
  * check device open/close
  */
                runtime->hw.rates |= SNDRV_PCM_RATE_88200 |
                                     SNDRV_PCM_RATE_96000;
                runtime->hw.rate_max = 96000;
+       } else if (cm->chip_version == 55) {
+               err = snd_pcm_hw_constraint_list(runtime, 0,
+                       SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
+               if (err < 0)
+                       return err;
+               runtime->hw.rates |= SNDRV_PCM_RATE_KNOT;
+               runtime->hw.rate_max = 128000;
        }
        snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 0, 0x10000);
        cm->dig_pcm_status = cm->dig_status;
        if (cm->chip_version == 68) {   // 8768 only supports 44k/48k recording
                runtime->hw.rate_min = 41000;
                runtime->hw.rates = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000;
+       } else if (cm->chip_version == 55) {
+               err = snd_pcm_hw_constraint_list(runtime, 0,
+                       SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
+               if (err < 0)
+                       return err;
+               runtime->hw.rates |= SNDRV_PCM_RATE_KNOT;
+               runtime->hw.rate_max = 128000;
        }
        snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 0, 0x10000);
        return 0;
                runtime->hw.rates |= SNDRV_PCM_RATE_88200 |
                                     SNDRV_PCM_RATE_96000;
                runtime->hw.rate_max = 96000;
+       } else if (cm->chip_version == 55) {
+               err = snd_pcm_hw_constraint_list(runtime, 0,
+                       SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
+               if (err < 0)
+                       return err;
+               runtime->hw.rates |= SNDRV_PCM_RATE_KNOT;
+               runtime->hw.rate_max = 128000;
        }
        snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 0, 0x10000);
        return 0;
                        runtime->hw.formats |= SNDRV_PCM_FMTBIT_S32_LE;
                        snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
                }
-               if (cm->chip_version == 68) {
+               if (cm->can_96k) {
                        runtime->hw.rates |= SNDRV_PCM_RATE_88200 |
                                             SNDRV_PCM_RATE_96000;
                        runtime->hw.rate_max = 96000;
        if ((err = open_device_check(cm, CM_OPEN_SPDIF_CAPTURE, substream)) < 0) /* use channel B */
                return err;
        runtime->hw = snd_cmipci_capture_spdif;
+       if (cm->can_96k && !(cm->chip_version == 68)) {
+               runtime->hw.rates |= SNDRV_PCM_RATE_88200 |
+                                    SNDRV_PCM_RATE_96000;
+               runtime->hw.rate_max = 96000;
+       }
        snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 0, 0x40000);
        return 0;
 }
                } else if (detect & CM_CHIP_8768) {
                        cm->chip_version = 68;
                        cm->max_channels = 8;
+                       cm->can_96k = 1;
                } else {
                        cm->chip_version = 55;
                        cm->max_channels = 6;
+                       cm->can_96k = 1;
                }
                cm->can_ac3_hw = 1;
                cm->can_multi_ch = 1;