{
        int apic1, pin1, apic2, pin2;
        int vector;
+       unsigned int ver;
        unsigned long flags;
 
        local_irq_save(flags);
 
+       ver = apic_read(APIC_LVR);
+       ver = GET_APIC_VERSION(ver);
+
        /*
         * get/set the timer IRQ vector:
         */
         * mode for the 8259A whenever interrupts are routed
         * through I/O APICs.  Also IRQ0 has to be enabled in
         * the 8259A which implies the virtual wire has to be
-        * disabled in the local APIC.
+        * disabled in the local APIC.  Finally timer interrupts
+        * need to be acknowledged manually in the 8259A for
+        * timer_interrupt() and for the i82489DX when using
+        * the NMI watchdog.
         */
        apic_write_around(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT);
        init_8259A(1);
-       timer_ack = 1;
+       timer_ack = !cpu_has_tsc;
+       timer_ack |= (nmi_watchdog == NMI_IO_APIC && !APIC_INTEGRATED(ver));
        if (timer_over_8254 > 0)
                enable_8259A_irq(0);
 
 
 
 #include <asm/smp.h>
 #include <asm/nmi.h>
+#include <asm/timer.h>
 
 #include "mach_traps.h"
 
 
        prev_nmi_count = kmalloc(NR_CPUS * sizeof(int), GFP_KERNEL);
        if (!prev_nmi_count)
-               return -1;
+               goto error;
 
        printk(KERN_INFO "Testing NMI watchdog ... ");
 
        if (!atomic_read(&nmi_active)) {
                kfree(prev_nmi_count);
                atomic_set(&nmi_active, -1);
-               return -1;
+               goto error;
        }
        printk("OK.\n");
 
 
        kfree(prev_nmi_count);
        return 0;
+error:
+       timer_ack = !cpu_has_tsc;
+
+       return -1;
 }
 
 static int __init setup_nmi_watchdog(char *str)