spinlock_t ehca_qp_idr_lock;
 spinlock_t ehca_cq_idr_lock;
+spinlock_t hcall_lock;
 DEFINE_IDR(ehca_qp_idr);
 DEFINE_IDR(ehca_cq_idr);
 
        idr_init(&ehca_cq_idr);
        spin_lock_init(&ehca_qp_idr_lock);
        spin_lock_init(&ehca_cq_idr_lock);
+       spin_lock_init(&hcall_lock);
 
        INIT_LIST_HEAD(&shca_list);
        spin_lock_init(&shca_list_lock);
 
                              unsigned long arg9)
 {
        long ret;
-       int i, sleep_msecs;
+       int i, sleep_msecs, lock_is_set = 0;
+       unsigned long flags;
 
        ehca_gen_dbg("opcode=%lx arg1=%lx arg2=%lx arg3=%lx arg4=%lx "
                     "arg5=%lx arg6=%lx arg7=%lx arg8=%lx arg9=%lx",
                     arg8, arg9);
 
        for (i = 0; i < 5; i++) {
+               if ((opcode == H_ALLOC_RESOURCE) && (arg2 == 5)) {
+                       spin_lock_irqsave(&hcall_lock, flags);
+                       lock_is_set = 1;
+               }
+
                ret = plpar_hcall9(opcode, outs,
                                   arg1, arg2, arg3, arg4, arg5,
                                   arg6, arg7, arg8, arg9);
 
+               if (lock_is_set)
+                       spin_unlock_irqrestore(&hcall_lock, flags);
+
                if (H_IS_LONG_BUSY(ret)) {
                        sleep_msecs = get_longbusy_msecs(ret);
                        msleep_interruptible(sleep_msecs);
                             opcode, ret, outs[0], outs[1], outs[2], outs[3],
                             outs[4], outs[5], outs[6], outs[7], outs[8]);
                return ret;
-
        }
 
        return H_BUSY;
 }
+
 u64 hipz_h_alloc_resource_eq(const struct ipz_adapter_handle adapter_handle,
                             struct ehca_pfeq *pfeq,
                             const u32 neq_control,