]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
[ARM SMP] Ensure secondary CPUs have a clean TLB
authorRussell King <rmk@dyn-67.arm.linux.org.uk>
Thu, 28 Jul 2005 19:32:47 +0000 (20:32 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 28 Jul 2005 19:32:47 +0000 (20:32 +0100)
Since ARMv6 CPUs will not flush the TLB on context switches, it is
possible that we may end up with some global TLB entries remaining
present, eventually upsetting userspace.  Explicitly flush the
entire TLB on secondary CPUs as they startup, after we have switched
to the init_mm page tables.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/kernel/smp.c

index 295e0a8379cfc9c95e080f063b815b968acf6a10..b2085735a2baf1833c90ab1ad9c237d58e869e28 100644 (file)
@@ -176,6 +176,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
        cpu_set(cpu, mm->cpu_vm_mask);
        cpu_switch_mm(mm->pgd, mm);
        enter_lazy_tlb(mm, current);
+       local_flush_tlb_all();
 
        cpu_init();