#include <linux/err.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
+ #include <linux/cpufreq.h>
-#include <asm/hardware.h>
+#include <asm/arch/hardware.h>
#include <asm/irq.h>
#include <asm/io.h>
unsigned int tx_setup;
enum s3c24xx_i2c_state state;
+ unsigned long clkrate;
void __iomem *regs;
struct clk *clk;
struct resource *irq;
struct resource *ioarea;
struct i2c_adapter adap;
+
+ #ifdef CONFIG_CPU_FREQ
+ struct notifier_block freq_transition;
+ #endif
};
/* default platform data to use if not supplied in the platform_device
unsigned long timeout;
int ret;
+ if (!readl(i2c->regs + S3C2410_IICCON) & S3C2410_IICCON_IRQEN)
+ return -EIO;
+
ret = s3c24xx_i2c_set_master(i2c);
if (ret != 0) {
dev_err(i2c->dev, "cannot get bus (error %d)\n", ret);
return (diff >= -2 && diff <= 2);
}
- /* s3c24xx_i2c_getdivisor
+ /* s3c24xx_i2c_clockrate
*
* work out a divisor for the user requested frequency setting,
* either by the requested frequency, or scanning the acceptable
* range of frequencies until something is found
*/
- static int s3c24xx_i2c_getdivisor(struct s3c24xx_i2c *i2c,
- struct s3c2410_platform_i2c *pdata,
- unsigned long *iicon,
- unsigned int *got)
+ static int s3c24xx_i2c_clockrate(struct s3c24xx_i2c *i2c, unsigned int *got)
{
+ struct s3c2410_platform_i2c *pdata;
unsigned long clkin = clk_get_rate(i2c->clk);
-
unsigned int divs, div1;
+ u32 iiccon;
int freq;
int start, end;
+ i2c->clkrate = clkin;
+
+ pdata = s3c24xx_i2c_get_platformdata(i2c->adap.dev.parent);
clkin /= 1000; /* clkin now in KHz */
- dev_dbg(i2c->dev, "pdata %p, freq %lu %lu..%lu\n",
+ dev_dbg(i2c->dev, "pdata %p, freq %lu %lu..%lu\n",
pdata, pdata->bus_freq, pdata->min_freq, pdata->max_freq);
if (pdata->bus_freq != 0) {
found:
*got = freq;
- *iicon |= (divs-1);
- *iicon |= (div1 == 512) ? S3C2410_IICCON_TXDIV_512 : 0;
+
+ iiccon = readl(i2c->regs + S3C2410_IICCON);
+ iiccon &= ~(S3C2410_IICCON_SCALEMASK | S3C2410_IICCON_TXDIV_512);
+ iiccon |= (divs-1);
+
+ if (div1 == 512)
+ iiccon |= S3C2410_IICCON_TXDIV_512;
+
+ writel(iiccon, i2c->regs + S3C2410_IICCON);
+
+ return 0;
+ }
+
+ #ifdef CONFIG_CPU_FREQ
+
+ #define freq_to_i2c(_n) container_of(_n, struct s3c24xx_i2c, freq_transition)
+
+ static int s3c24xx_i2c_cpufreq_transition(struct notifier_block *nb,
+ unsigned long val, void *data)
+ {
+ struct s3c24xx_i2c *i2c = freq_to_i2c(nb);
+ unsigned long flags;
+ unsigned int got;
+ int delta_f;
+ int ret;
+
+ delta_f = clk_get_rate(i2c->clk) - i2c->clkrate;
+
+ /* if we're post-change and the input clock has slowed down
+ * or at pre-change and the clock is about to speed up, then
+ * adjust our clock rate. <0 is slow, >0 speedup.
+ */
+
+ if ((val == CPUFREQ_POSTCHANGE && delta_f < 0) ||
+ (val == CPUFREQ_PRECHANGE && delta_f > 0)) {
+ spin_lock_irqsave(&i2c->lock, flags);
+ ret = s3c24xx_i2c_clockrate(i2c, &got);
+ spin_unlock_irqrestore(&i2c->lock, flags);
+
+ if (ret < 0)
+ dev_err(i2c->dev, "cannot find frequency\n");
+ else
+ dev_info(i2c->dev, "setting freq %d\n", got);
+ }
+
+ return 0;
+ }
+
+ static inline int s3c24xx_i2c_register_cpufreq(struct s3c24xx_i2c *i2c)
+ {
+ i2c->freq_transition.notifier_call = s3c24xx_i2c_cpufreq_transition;
+
+ return cpufreq_register_notifier(&i2c->freq_transition,
+ CPUFREQ_TRANSITION_NOTIFIER);
+ }
+
+ static inline void s3c24xx_i2c_deregister_cpufreq(struct s3c24xx_i2c *i2c)
+ {
+ cpufreq_unregister_notifier(&i2c->freq_transition,
+ CPUFREQ_TRANSITION_NOTIFIER);
+ }
+
+ #else
+ static inline int s3c24xx_i2c_register_cpufreq(struct s3c24xx_i2c *i2c)
+ {
return 0;
}
+ static inline void s3c24xx_i2c_deregister_cpufreq(struct s3c24xx_i2c *i2c)
+ {
+ }
+ #endif
+
/* s3c24xx_i2c_init
*
* initialise the controller, set the IO lines and frequency
dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr);
+ writel(iicon, i2c->regs + S3C2410_IICCON);
+
/* we need to work out the divisors for the clock... */
- if (s3c24xx_i2c_getdivisor(i2c, pdata, &iicon, &freq) != 0) {
+ if (s3c24xx_i2c_clockrate(i2c, &freq) != 0) {
+ writel(0, i2c->regs + S3C2410_IICCON);
dev_err(i2c->dev, "cannot meet bus frequency required\n");
return -EINVAL;
}
dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq);
dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02lx\n", iicon);
-
- writel(iicon, i2c->regs + S3C2410_IICCON);
/* check for s3c2440 i2c controller */
static int s3c24xx_i2c_probe(struct platform_device *pdev)
{
struct s3c24xx_i2c *i2c = &s3c24xx_i2c;
+ struct s3c2410_platform_i2c *pdata;
struct resource *res;
int ret;
+ pdata = s3c24xx_i2c_get_platformdata(&pdev->dev);
+
/* find the clock and enable it */
i2c->dev = &pdev->dev;
dev_dbg(&pdev->dev, "irq resource %p (%lu)\n", res,
(unsigned long)res->start);
- ret = i2c_add_adapter(&i2c->adap);
+ ret = s3c24xx_i2c_register_cpufreq(i2c);
if (ret < 0) {
- dev_err(&pdev->dev, "failed to add bus to i2c core\n");
+ dev_err(&pdev->dev, "failed to register cpufreq notifier\n");
goto err_irq;
}
+ /* Note, previous versions of the driver used i2c_add_adapter()
+ * to add the bus at any number. We now pass the bus number via
+ * the platform data, so if unset it will now default to always
+ * being bus 0.
+ */
+
+ i2c->adap.nr = pdata->bus_num;
+
+ ret = i2c_add_numbered_adapter(&i2c->adap);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "failed to add bus to i2c core\n");
+ goto err_cpufreq;
+ }
+
platform_set_drvdata(pdev, i2c);
dev_info(&pdev->dev, "%s: S3C I2C adapter\n", i2c->adap.dev.bus_id);
return 0;
+ err_cpufreq:
+ s3c24xx_i2c_deregister_cpufreq(i2c);
+
err_irq:
free_irq(i2c->irq->start, i2c);
{
struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev);
+ s3c24xx_i2c_deregister_cpufreq(i2c);
+
i2c_del_adapter(&i2c->adap);
free_irq(i2c->irq->start, i2c);
#include <asm/io.h>
#include <asm/dma.h>
-#include <asm/hardware.h>
+#include <asm/arch/hardware.h>
#include <asm/arch/regs-gpio.h>
#include <asm/plat-s3c24xx/regs-spi.h>
return IRQ_HANDLED;
}
+ static void s3c24xx_spi_initialsetup(struct s3c24xx_spi *hw)
+ {
+ /* for the moment, permanently enable the clock */
+
+ clk_enable(hw->clk);
+
+ /* program defaults into the registers */
+
+ writeb(0xff, hw->regs + S3C2410_SPPRE);
+ writeb(SPPIN_DEFAULT, hw->regs + S3C2410_SPPIN);
+ writeb(SPCON_DEFAULT, hw->regs + S3C2410_SPCON);
+ }
+
static int __init s3c24xx_spi_probe(struct platform_device *pdev)
{
struct s3c2410_spi_info *pdata;
/* setup the master state. */
master->num_chipselect = hw->pdata->num_cs;
+ master->bus_num = pdata->bus_num;
/* setup the state for the bitbang driver */
goto err_no_clk;
}
- /* for the moment, permanently enable the clock */
-
- clk_enable(hw->clk);
-
- /* program defaults into the registers */
-
- writeb(0xff, hw->regs + S3C2410_SPPRE);
- writeb(SPPIN_DEFAULT, hw->regs + S3C2410_SPPIN);
- writeb(SPCON_DEFAULT, hw->regs + S3C2410_SPCON);
+ s3c24xx_spi_initialsetup(hw);
/* setup any gpio we can */
{
struct s3c24xx_spi *hw = platform_get_drvdata(pdev);
- clk_enable(hw->clk);
+ s3c24xx_spi_initialsetup(hw);
return 0;
}
projects / linux-2.6-omap-h63xx.git / commitdiff