#include <linux/module.h>
 #include <linux/moduleparam.h>
-#include <linux/videodev.h>
+#include <linux/videodev2.h>
 #include <linux/delay.h>
 #include <linux/dvb/frontend.h>
 #include <linux/i2c.h>
 
        .qam_if        = 44000,
        .inversion     = S5H1409_INVERSION_OFF,
        .status_mode   = S5H1409_DEMODLOCKING,
+       .mpeg_timing   = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
 };
 
 static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
                }
                break;
        case CX88_BOARD_PINNACLE_PCTV_HD_800i:
-               /* Parallel mpeg data port and punctured clock mode */
-               dev->ts_gen_cntrl = 0x04;
-
                dev->dvb.frontend = dvb_attach(s5h1409_attach,
                                               &pinnacle_pctv_hd_800i_config,
                                               &dev->core->i2c_adap);
 
        case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
        case CX88_BOARD_HAUPPAUGE_HVR1100:
        case CX88_BOARD_HAUPPAUGE_HVR3000:
+       case CX88_BOARD_PINNACLE_PCTV_HD_800i:
                ir_codes = ir_codes_hauppauge_new;
                ir_type = IR_TYPE_RC5;
                ir->sampling = 1;
        case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
        case CX88_BOARD_HAUPPAUGE_HVR1100:
        case CX88_BOARD_HAUPPAUGE_HVR3000:
+       case CX88_BOARD_PINNACLE_PCTV_HD_800i:
                ircode = ir_decode_biphase(ir->samples, ir->scount, 5, 7);
                ir_dprintk("biphase decoded: %x\n", ircode);
                if ((ircode & 0xfffff000) != 0x3000)
 
                case CX88_BOARD_HAUPPAUGE_HVR1300:
                        break;
                case CX88_BOARD_PINNACLE_PCTV_HD_800i:
-                       /* Enable MPEG parallel port */
-                       cx_write(MO_PINMUX_IO, 0x80);
+                       /* Enable MPEG parallel IO and video signal pins */
+                       cx_write(MO_PINMUX_IO, 0x88);
+                       cx_write(TS_HW_SOP_CNTRL, (0x47 << 16) | (188 << 4));
+                       dev->ts_gen_cntrl = 5;
+                       cx_write(TS_SOP_STAT, 0);
+                       cx_write(TS_VALERR_CNTRL, 0);
                        udelay(100);
                        break;
                default: