]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
[POWERPC] Uartlite: change name of ports to ulite_ports
authorGrant Likely <grant.likely@secretlab.ca>
Tue, 2 Oct 2007 02:15:44 +0000 (12:15 +1000)
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>
Wed, 3 Oct 2007 12:23:15 +0000 (07:23 -0500)
Changed to match naming convention used in the rest of the module

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
drivers/serial/uartlite.c

index 59b674aa2c012d5e340851ff5866e248eb2a0258..ae05a67d9dbedaae67621eb6d6b17a86edd6d530 100644 (file)
@@ -46,7 +46,7 @@
 #define ULITE_CONTROL_IE       0x10
 
 
-static struct uart_port ports[ULITE_NR_UARTS];
+static struct uart_port ulite_ports[ULITE_NR_UARTS];
 
 static int ulite_receive(struct uart_port *port, int stat)
 {
@@ -329,7 +329,7 @@ static void ulite_console_putchar(struct uart_port *port, int ch)
 static void ulite_console_write(struct console *co, const char *s,
                                unsigned int count)
 {
-       struct uart_port *port = &ports[co->index];
+       struct uart_port *port = &ulite_ports[co->index];
        unsigned long flags;
        unsigned int ier;
        int locked = 1;
@@ -366,7 +366,7 @@ static int __init ulite_console_setup(struct console *co, char *options)
        if (co->index < 0 || co->index >= ULITE_NR_UARTS)
                return -EINVAL;
 
-       port = &ports[co->index];
+       port = &ulite_ports[co->index];
 
        /* not initialized yet? */
        if (!port->membase)
@@ -420,7 +420,7 @@ static int __devinit ulite_probe(struct platform_device *pdev)
        if (pdev->id < 0 || pdev->id >= ULITE_NR_UARTS)
                return -EINVAL;
 
-       if (ports[pdev->id].membase)
+       if (ulite_ports[pdev->id].membase)
                return -EBUSY;
 
        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -431,7 +431,7 @@ static int __devinit ulite_probe(struct platform_device *pdev)
        if (!res2)
                return -ENODEV;
 
-       port = &ports[pdev->id];
+       port = &ulite_ports[pdev->id];
 
        port->fifosize  = 16;
        port->regshift  = 2;