It provides for dynamic discovery of sensors in the system and the
ability to monitor the sensors and be informed when the sensor's
values change or go outside certain boundaries. It also has a
-standardized database for field-replacable units (FRUs) and a watchdog
+standardized database for field-replaceable units (FRUs) and a watchdog
timer.
To use this, you need an interface to an IPMI controller in your
IPMI defines a standard watchdog timer. You can enable this with the
'IPMI Watchdog Timer' config option. If you compile the driver into
the kernel, then via a kernel command-line option you can have the
-watchdog timer start as soon as it intitializes. It also have a lot
+watchdog timer start as soon as it initializes. It also have a lot
of other options, see the 'Watchdog' section below for more details.
Note that you can also have the watchdog continue to run if it is
closed (by default it is disabled on close). Go into the 'Watchdog
};
+struct simple_children {
+ struct config_group group;
+};
+
+static inline struct simple_children *to_simple_children(struct config_item *item)
+{
+ return item ? container_of(to_config_group(item), struct simple_children, group) : NULL;
+}
+
static struct config_item *simple_children_make_item(struct config_group *group, const char *name)
{
struct simple_child *simple_child;
"items have only one attribute that is readable and writeable.\n");
}
+static void simple_children_release(struct config_item *item)
+{
+ kfree(to_simple_children(item));
+}
+
static struct configfs_item_operations simple_children_item_ops = {
+ .release = simple_children_release,
.show_attribute = simple_children_attr_show,
};
* children of its own.
*/
-struct simple_children {
- struct config_group group;
-};
-
static struct config_group *group_children_make_group(struct config_group *group, const char *name)
{
struct simple_children *simple_children;
- block_dump
- drop-caches
- zone_reclaim_mode
-- zone_reclaim_interval
- panic_on_oom
==============================================================
shrink operation is global, may take a long time and free slabs
in all nodes of the system.
-================================================================
-
-zone_reclaim_interval:
-
-The time allowed for off node allocations after zone reclaim
-has failed to reclaim enough pages to allow a local allocation.
-
-Time is set in seconds and set by default to 30 seconds.
-
-Reduce the interval if undesired off node allocations occur. However, too
-frequent scans will have a negative impact onoff node allocation performance.
-
=============================================================
panic_on_oom
EDAC-CORE
P: Doug Thompson
-M: norsk5@xmission.com, dthompson@linuxnetworx.com
-P: Dave Peterson
-M: dsp@llnl.gov, dave_peterson@pobox.com
+M: norsk5@xmission.com
L: bluesmoke-devel@lists.sourceforge.net
W: bluesmoke.sourceforge.net
-S: Maintained
+S: Supported
EDAC-E752X
-P: Dave Peterson
-M: dsp@llnl.gov, dave_peterson@pobox.com
+P: Mark Gross
+M: mark.gross@intel.com
L: bluesmoke-devel@lists.sourceforge.net
W: bluesmoke.sourceforge.net
S: Maintained
EDAC-E7XXX
-P: Dave Peterson
-M: dsp@llnl.gov, dave_peterson@pobox.com
+P: Doug Thompson
+M: norsk5@xmission.com
L: bluesmoke-devel@lists.sourceforge.net
W: bluesmoke.sourceforge.net
S: Maintained
pte = pmd_page(*pmd);
pmd_clear(pmd);
- dec_page_state(nr_page_table_pages);
+ dec_zone_page_state(virt_to_page((unsigned long *)pgd), NR_PAGETABLE);
pte_lock_deinit(pte);
pte_free(pte);
pmd_free(pmd);
return err;
}
-static int msr_class_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
+#ifdef CONFIG_HOTPLUG_CPU
+static int msr_class_cpu_callback(struct notifier_block *nfb,
+ unsigned long action, void *hcpu)
{
unsigned int cpu = (unsigned long)hcpu;
{
.notifier_call = msr_class_cpu_callback,
};
+#endif
static int __init msr_init(void)
{
if (err != 0)
goto out_class;
}
- register_cpu_notifier(&msr_class_cpu_notifier);
+ register_hotcpu_notifier(&msr_class_cpu_notifier);
err = 0;
goto out;
class_device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu));
class_destroy(msr_class);
unregister_chrdev(MSR_MAJOR, "cpu/msr");
- unregister_cpu_notifier(&msr_class_cpu_notifier);
+ unregister_hotcpu_notifier(&msr_class_cpu_notifier);
}
module_init(msr_init);
{
zap_low_mappings();
}
+
+void __init
+smp_setup_processor_id(void)
+{
+ current_thread_info()->cpu = hard_smp_processor_id();
+}
struct page *page;
pg_data_t *pgdat;
unsigned long i;
- struct page_state ps;
unsigned long flags;
printk(KERN_INFO "Mem-info:\n");
printk(KERN_INFO "%d pages shared\n", shared);
printk(KERN_INFO "%d pages swap cached\n", cached);
- get_page_state(&ps);
- printk(KERN_INFO "%lu pages dirty\n", ps.nr_dirty);
- printk(KERN_INFO "%lu pages writeback\n", ps.nr_writeback);
- printk(KERN_INFO "%lu pages mapped\n", ps.nr_mapped);
- printk(KERN_INFO "%lu pages slab\n", ps.nr_slab);
- printk(KERN_INFO "%lu pages pagetables\n", ps.nr_page_table_pages);
+ printk(KERN_INFO "%lu pages dirty\n", global_page_state(NR_FILE_DIRTY));
+ printk(KERN_INFO "%lu pages writeback\n",
+ global_page_state(NR_WRITEBACK));
+ printk(KERN_INFO "%lu pages mapped\n", global_page_state(NR_FILE_MAPPED));
+ printk(KERN_INFO "%lu pages slab\n", global_page_state(NR_SLAB));
+ printk(KERN_INFO "%lu pages pagetables\n",
+ global_page_state(NR_PAGETABLE));
}
/*
bool
default y
+config DMA_IS_NORMAL
+ bool
+ depends on IA64_SGI_SN2
+ default y
+
choice
prompt "System type"
default IA64_GENERIC
#endif /* MODULE */
EXPORT_SYMBOL_GPL(si_swapinfo);
EXPORT_SYMBOL_GPL(nr_threads);
-EXPORT_SYMBOL_GPL(get_full_page_state);
EXPORT_SYMBOL_GPL(nr_running);
EXPORT_SYMBOL_GPL(nr_iowait);
//EXPORT_SYMBOL_GPL(nr_context_switches);
* serialized through the appldata_ops_lock and can use static
*/
static struct sysinfo val;
- static struct page_state ps;
+ unsigned long ev[NR_VM_EVENT_ITEMS];
struct appldata_mem_data *mem_data;
mem_data = data;
mem_data->sync_count_1++;
- get_full_page_state(&ps);
- mem_data->pgpgin = ps.pgpgin >> 1;
- mem_data->pgpgout = ps.pgpgout >> 1;
- mem_data->pswpin = ps.pswpin;
- mem_data->pswpout = ps.pswpout;
- mem_data->pgalloc = ps.pgalloc_high + ps.pgalloc_normal +
- ps.pgalloc_dma;
- mem_data->pgfault = ps.pgfault;
- mem_data->pgmajfault = ps.pgmajfault;
+ all_vm_events(ev);
+ mem_data->pgpgin = ev[PGPGIN] >> 1;
+ mem_data->pgpgout = ev[PGPGOUT] >> 1;
+ mem_data->pswpin = ev[PSWPIN];
+ mem_data->pswpout = ev[PSWPOUT];
+ mem_data->pgalloc = ev[PGALLOC_HIGH] + ev[PGALLOC_NORMAL] +
+ ev[PGALLOC_DMA];
+ mem_data->pgfault = ev[PGFAULT];
+ mem_data->pgmajfault = ev[PGMAJFAULT];
si_meminfo(&val);
mem_data->sharedram = val.sharedram;
mem_data->totalhigh = P2K(val.totalhigh);
mem_data->freehigh = P2K(val.freehigh);
mem_data->bufferram = P2K(val.bufferram);
- mem_data->cached = P2K(atomic_read(&nr_pagecache) - val.bufferram);
+ mem_data->cached = P2K(global_page_state(NR_FILE_PAGES)
+ - val.bufferram);
si_swapinfo(&val);
mem_data->totalswap = P2K(val.totalswap);
*/
#include <linux/config.h>
+#include <linux/module.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <asm/vaddrs.h>
#include <asm/oplib.h>
#include <asm/prom.h>
+#include <asm/of_device.h>
#include <asm/sbus.h>
#include <asm/page.h>
#include <asm/pgalloc.h>
phyres->start + offset, size, name);
}
+void __iomem *of_ioremap(struct resource *res, unsigned long offset,
+ unsigned long size, char *name)
+{
+ return _sparc_alloc_io(res->flags & 0xF,
+ res->start + offset,
+ size, name);
+}
+EXPORT_SYMBOL(of_ioremap);
+
+void of_iounmap(void __iomem *base, unsigned long size)
+{
+ iounmap(base);
+}
+EXPORT_SYMBOL(of_iounmap);
+
/*
*/
void sbus_iounmap(volatile void __iomem *addr, unsigned long size)
return error;
}
+static int node_match(struct device *dev, void *data)
+{
+ struct of_device *op = to_of_device(dev);
+ struct device_node *dp = data;
+
+ return (op->node == dp);
+}
+
+struct of_device *of_find_device_by_node(struct device_node *dp)
+{
+ struct device *dev = bus_find_device(&of_bus_type, NULL,
+ dp, node_match);
+
+ if (dev)
+ return to_of_device(dev);
+
+ return NULL;
+}
+EXPORT_SYMBOL(of_find_device_by_node);
+
#ifdef CONFIG_PCI
struct bus_type ebus_bus_type = {
.name = "ebus",
EXPORT_SYMBOL(sbus_bus_type);
#endif
+struct bus_type of_bus_type = {
+ .name = "of",
+ .match = of_platform_bus_match,
+ .probe = of_device_probe,
+ .remove = of_device_remove,
+ .suspend = of_device_suspend,
+ .resume = of_device_resume,
+};
+EXPORT_SYMBOL(of_bus_type);
+
+static inline u64 of_read_addr(u32 *cell, int size)
+{
+ u64 r = 0;
+ while (size--)
+ r = (r << 32) | *(cell++);
+ return r;
+}
+
+static void __init get_cells(struct device_node *dp,
+ int *addrc, int *sizec)
+{
+ if (addrc)
+ *addrc = of_n_addr_cells(dp);
+ if (sizec)
+ *sizec = of_n_size_cells(dp);
+}
+
+/* Max address size we deal with */
+#define OF_MAX_ADDR_CELLS 4
+
+struct of_bus {
+ const char *name;
+ const char *addr_prop_name;
+ int (*match)(struct device_node *parent);
+ void (*count_cells)(struct device_node *child,
+ int *addrc, int *sizec);
+ u64 (*map)(u32 *addr, u32 *range, int na, int ns, int pna);
+ int (*translate)(u32 *addr, u64 offset, int na);
+ unsigned int (*get_flags)(u32 *addr);
+};
+
+/*
+ * Default translator (generic bus)
+ */
+
+static void of_bus_default_count_cells(struct device_node *dev,
+ int *addrc, int *sizec)
+{
+ get_cells(dev, addrc, sizec);
+}
+
+static u64 of_bus_default_map(u32 *addr, u32 *range, int na, int ns, int pna)
+{
+ u64 cp, s, da;
+
+ cp = of_read_addr(range, na);
+ s = of_read_addr(range + na + pna, ns);
+ da = of_read_addr(addr, na);
+
+ if (da < cp || da >= (cp + s))
+ return OF_BAD_ADDR;
+ return da - cp;
+}
+
+static int of_bus_default_translate(u32 *addr, u64 offset, int na)
+{
+ u64 a = of_read_addr(addr, na);
+ memset(addr, 0, na * 4);
+ a += offset;
+ if (na > 1)
+ addr[na - 2] = a >> 32;
+ addr[na - 1] = a & 0xffffffffu;
+
+ return 0;
+}
+
+static unsigned int of_bus_default_get_flags(u32 *addr)
+{
+ return IORESOURCE_MEM;
+}
+
+
+/*
+ * PCI bus specific translator
+ */
+
+static int of_bus_pci_match(struct device_node *np)
+{
+ return !strcmp(np->type, "pci") || !strcmp(np->type, "pciex");
+}
+
+static void of_bus_pci_count_cells(struct device_node *np,
+ int *addrc, int *sizec)
+{
+ if (addrc)
+ *addrc = 3;
+ if (sizec)
+ *sizec = 2;
+}
+
+static u64 of_bus_pci_map(u32 *addr, u32 *range, int na, int ns, int pna)
+{
+ u64 cp, s, da;
+
+ /* Check address type match */
+ if ((addr[0] ^ range[0]) & 0x03000000)
+ return OF_BAD_ADDR;
+
+ /* Read address values, skipping high cell */
+ cp = of_read_addr(range + 1, na - 1);
+ s = of_read_addr(range + na + pna, ns);
+ da = of_read_addr(addr + 1, na - 1);
+
+ if (da < cp || da >= (cp + s))
+ return OF_BAD_ADDR;
+ return da - cp;
+}
+
+static int of_bus_pci_translate(u32 *addr, u64 offset, int na)
+{
+ return of_bus_default_translate(addr + 1, offset, na - 1);
+}
+
+static unsigned int of_bus_pci_get_flags(u32 *addr)
+{
+ unsigned int flags = 0;
+ u32 w = addr[0];
+
+ switch((w >> 24) & 0x03) {
+ case 0x01:
+ flags |= IORESOURCE_IO;
+ case 0x02: /* 32 bits */
+ case 0x03: /* 64 bits */
+ flags |= IORESOURCE_MEM;
+ }
+ if (w & 0x40000000)
+ flags |= IORESOURCE_PREFETCH;
+ return flags;
+}
+
+/*
+ * SBUS bus specific translator
+ */
+
+static int of_bus_sbus_match(struct device_node *np)
+{
+ return !strcmp(np->name, "sbus") ||
+ !strcmp(np->name, "sbi");
+}
+
+static void of_bus_sbus_count_cells(struct device_node *child,
+ int *addrc, int *sizec)
+{
+ if (addrc)
+ *addrc = 2;
+ if (sizec)
+ *sizec = 1;
+}
+
+static u64 of_bus_sbus_map(u32 *addr, u32 *range, int na, int ns, int pna)
+{
+ return of_bus_default_map(addr, range, na, ns, pna);
+}
+
+static int of_bus_sbus_translate(u32 *addr, u64 offset, int na)
+{
+ return of_bus_default_translate(addr, offset, na);
+}
+
+static unsigned int of_bus_sbus_get_flags(u32 *addr)
+{
+ return IORESOURCE_MEM;
+}
+
+
+/*
+ * Array of bus specific translators
+ */
+
+static struct of_bus of_busses[] = {
+ /* PCI */
+ {
+ .name = "pci",
+ .addr_prop_name = "assigned-addresses",
+ .match = of_bus_pci_match,
+ .count_cells = of_bus_pci_count_cells,
+ .map = of_bus_pci_map,
+ .translate = of_bus_pci_translate,
+ .get_flags = of_bus_pci_get_flags,
+ },
+ /* SBUS */
+ {
+ .name = "sbus",
+ .addr_prop_name = "reg",
+ .match = of_bus_sbus_match,
+ .count_cells = of_bus_sbus_count_cells,
+ .map = of_bus_sbus_map,
+ .translate = of_bus_sbus_translate,
+ .get_flags = of_bus_sbus_get_flags,
+ },
+ /* Default */
+ {
+ .name = "default",
+ .addr_prop_name = "reg",
+ .match = NULL,
+ .count_cells = of_bus_default_count_cells,
+ .map = of_bus_default_map,
+ .translate = of_bus_default_translate,
+ .get_flags = of_bus_default_get_flags,
+ },
+};
+
+static struct of_bus *of_match_bus(struct device_node *np)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(of_busses); i ++)
+ if (!of_busses[i].match || of_busses[i].match(np))
+ return &of_busses[i];
+ BUG();
+ return NULL;
+}
+
+static int __init build_one_resource(struct device_node *parent,
+ struct of_bus *bus,
+ struct of_bus *pbus,
+ u32 *addr,
+ int na, int ns, int pna)
+{
+ u32 *ranges;
+ unsigned int rlen;
+ int rone;
+ u64 offset = OF_BAD_ADDR;
+
+ ranges = of_get_property(parent, "ranges", &rlen);
+ if (ranges == NULL || rlen == 0) {
+ offset = of_read_addr(addr, na);
+ memset(addr, 0, pna * 4);
+ goto finish;
+ }
+
+ /* Now walk through the ranges */
+ rlen /= 4;
+ rone = na + pna + ns;
+ for (; rlen >= rone; rlen -= rone, ranges += rone) {
+ offset = bus->map(addr, ranges, na, ns, pna);
+ if (offset != OF_BAD_ADDR)
+ break;
+ }
+ if (offset == OF_BAD_ADDR)
+ return 1;
+
+ memcpy(addr, ranges + na, 4 * pna);
+
+finish:
+ /* Translate it into parent bus space */
+ return pbus->translate(addr, offset, pna);
+}
+
+static void __init build_device_resources(struct of_device *op,
+ struct device *parent)
+{
+ struct of_device *p_op;
+ struct of_bus *bus;
+ int na, ns;
+ int index, num_reg;
+ void *preg;
+
+ if (!parent)
+ return;
+
+ p_op = to_of_device(parent);
+ bus = of_match_bus(p_op->node);
+ bus->count_cells(op->node, &na, &ns);
+
+ preg = of_get_property(op->node, bus->addr_prop_name, &num_reg);
+ if (!preg || num_reg == 0)
+ return;
+
+ /* Convert to num-cells. */
+ num_reg /= 4;
+
+ /* Conver to num-entries. */
+ num_reg /= na + ns;
+
+ for (index = 0; index < num_reg; index++) {
+ struct resource *r = &op->resource[index];
+ u32 addr[OF_MAX_ADDR_CELLS];
+ u32 *reg = (preg + (index * ((na + ns) * 4)));
+ struct device_node *dp = op->node;
+ struct device_node *pp = p_op->node;
+ struct of_bus *pbus;
+ u64 size, result = OF_BAD_ADDR;
+ unsigned long flags;
+ int dna, dns;
+ int pna, pns;
+
+ size = of_read_addr(reg + na, ns);
+ flags = bus->get_flags(reg);
+
+ memcpy(addr, reg, na * 4);
+
+ /* If the immediate parent has no ranges property to apply,
+ * just use a 1<->1 mapping.
+ */
+ if (of_find_property(pp, "ranges", NULL) == NULL) {
+ result = of_read_addr(addr, na);
+ goto build_res;
+ }
+
+ dna = na;
+ dns = ns;
+
+ while (1) {
+ dp = pp;
+ pp = dp->parent;
+ if (!pp) {
+ result = of_read_addr(addr, dna);
+ break;
+ }
+
+ pbus = of_match_bus(pp);
+ pbus->count_cells(dp, &pna, &pns);
+
+ if (build_one_resource(dp, bus, pbus, addr, dna, dns, pna))
+ break;
+
+ dna = pna;
+ dns = pns;
+ bus = pbus;
+ }
+
+ build_res:
+ memset(r, 0, sizeof(*r));
+ if (result != OF_BAD_ADDR) {
+ r->start = result & 0xffffffff;
+ r->end = result + size - 1;
+ r->flags = flags | ((result >> 32ULL) & 0xffUL);
+ } else {
+ r->start = ~0UL;
+ r->end = ~0UL;
+ }
+ r->name = op->node->name;
+ }
+}
+
+static struct of_device * __init scan_one_device(struct device_node *dp,
+ struct device *parent)
+{
+ struct of_device *op = kzalloc(sizeof(*op), GFP_KERNEL);
+ struct linux_prom_irqs *intr;
+ int len, i;
+
+ if (!op)
+ return NULL;
+
+ op->node = dp;
+
+ op->clock_freq = of_getintprop_default(dp, "clock-frequency",
+ (25*1000*1000));
+ op->portid = of_getintprop_default(dp, "upa-portid", -1);
+ if (op->portid == -1)
+ op->portid = of_getintprop_default(dp, "portid", -1);
+
+ intr = of_get_property(dp, "intr", &len);
+ if (intr) {
+ op->num_irqs = len / sizeof(struct linux_prom_irqs);
+ for (i = 0; i < op->num_irqs; i++)
+ op->irqs[i] = intr[i].pri;
+ } else {
+ unsigned int *irq = of_get_property(dp, "interrupts", &len);
+
+ if (irq) {
+ op->num_irqs = len / sizeof(unsigned int);
+ for (i = 0; i < op->num_irqs; i++)
+ op->irqs[i] = irq[i];
+ } else {
+ op->num_irqs = 0;
+ }
+ }
+ if (sparc_cpu_model == sun4d) {
+ static int pil_to_sbus[] = {
+ 0, 0, 1, 2, 0, 3, 0, 4, 0, 5, 0, 6, 0, 7, 0, 0,
+ };
+ struct device_node *busp = dp->parent;
+ struct linux_prom_registers *regs;
+ int board = of_getintprop_default(busp, "board#", 0);
+ int slot;
+
+ regs = of_get_property(dp, "reg", NULL);
+ slot = regs->which_io;
+
+ for (i = 0; i < op->num_irqs; i++) {
+ int this_irq = op->irqs[i];
+ int sbusl = pil_to_sbus[this_irq];
+
+ if (sbusl)
+ this_irq = (((board + 1) << 5) +
+ (sbusl << 2) +
+ slot);
+
+ op->irqs[i] = this_irq;
+ }
+ }
+
+ build_device_resources(op, parent);
+
+ op->dev.parent = parent;
+ op->dev.bus = &of_bus_type;
+ if (!parent)
+ strcpy(op->dev.bus_id, "root");
+ else
+ strcpy(op->dev.bus_id, dp->path_component_name);
+
+ if (of_device_register(op)) {
+ printk("%s: Could not register of device.\n",
+ dp->full_name);
+ kfree(op);
+ op = NULL;
+ }
+
+ return op;
+}
+
+static void __init scan_tree(struct device_node *dp, struct device *parent)
+{
+ while (dp) {
+ struct of_device *op = scan_one_device(dp, parent);
+
+ if (op)
+ scan_tree(dp->child, &op->dev);
+
+ dp = dp->sibling;
+ }
+}
+
+static void __init scan_of_devices(void)
+{
+ struct device_node *root = of_find_node_by_path("/");
+ struct of_device *parent;
+
+ parent = scan_one_device(root, NULL);
+ if (!parent)
+ return;
+
+ scan_tree(root->child, &parent->dev);
+}
+
static int __init of_bus_driver_init(void)
{
- int err = 0;
+ int err;
+ err = bus_register(&of_bus_type);
#ifdef CONFIG_PCI
if (!err)
err = bus_register(&ebus_bus_type);
if (!err)
err = bus_register(&sbus_bus_type);
#endif
- return 0;
+
+ if (!err)
+ scan_of_devices();
+
+ return err;
}
postcore_initcall(of_bus_driver_init);
}
EXPORT_SYMBOL(of_getintprop_default);
+int of_n_addr_cells(struct device_node *np)
+{
+ int* ip;
+ do {
+ if (np->parent)
+ np = np->parent;
+ ip = of_get_property(np, "#address-cells", NULL);
+ if (ip != NULL)
+ return *ip;
+ } while (np->parent);
+ /* No #address-cells property for the root node, default to 2 */
+ return 2;
+}
+EXPORT_SYMBOL(of_n_addr_cells);
+
+int of_n_size_cells(struct device_node *np)
+{
+ int* ip;
+ do {
+ if (np->parent)
+ np = np->parent;
+ ip = of_get_property(np, "#size-cells", NULL);
+ if (ip != NULL)
+ return *ip;
+ } while (np->parent);
+ /* No #size-cells property for the root node, default to 1 */
+ return 1;
+}
+EXPORT_SYMBOL(of_n_size_cells);
+
int of_set_property(struct device_node *dp, const char *name, void *val, int len)
{
struct property **prevp;
* simple, it hopefully works in most obvious cases.. Easy to
* fool it, but this should catch most mistakes.
*/
- freepages = get_page_cache_size();
+ freepages = global_page_state(NR_FILE_PAGES);
freepages >>= 1;
freepages += nr_free_pages();
freepages += nr_swap_pages;
#include <asm/sun4paddr.h>
#include <asm/page.h>
#include <asm/pcic.h>
+#include <asm/of_device.h>
extern unsigned long wall_jiffies;
#endif
}
-/* Probe for the mostek real time clock chip. */
-static __inline__ void clock_probe(void)
+static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
{
- struct linux_prom_registers clk_reg[2];
- char model[128];
- register int node, cpuunit, bootbus;
- struct resource r;
-
- cpuunit = bootbus = 0;
- memset(&r, 0, sizeof(r));
-
- /* Determine the correct starting PROM node for the probe. */
- node = prom_getchild(prom_root_node);
- switch (sparc_cpu_model) {
- case sun4c:
- break;
- case sun4m:
- node = prom_getchild(prom_searchsiblings(node, "obio"));
- break;
- case sun4d:
- node = prom_getchild(bootbus = prom_searchsiblings(prom_getchild(cpuunit = prom_searchsiblings(node, "cpu-unit")), "bootbus"));
- break;
- default:
- prom_printf("CLOCK: Unsupported architecture!\n");
- prom_halt();
- }
+ struct device_node *dp = op->node;
+ char *model = of_get_property(dp, "model", NULL);
- /* Find the PROM node describing the real time clock. */
- sp_clock_typ = MSTK_INVALID;
- node = prom_searchsiblings(node,"eeprom");
- if (!node) {
- prom_printf("CLOCK: No clock found!\n");
- prom_halt();
- }
+ if (!model)
+ return -ENODEV;
- /* Get the model name and setup everything up. */
- model[0] = '\0';
- prom_getstring(node, "model", model, sizeof(model));
- if (strcmp(model, "mk48t02") == 0) {
+ if (!strcmp(model, "mk48t02")) {
sp_clock_typ = MSTK48T02;
- if (prom_getproperty(node, "reg", (char *) clk_reg, sizeof(clk_reg)) == -1) {
- prom_printf("clock_probe: FAILED!\n");
- prom_halt();
- }
- if (sparc_cpu_model == sun4d)
- prom_apply_generic_ranges (bootbus, cpuunit, clk_reg, 1);
- else
- prom_apply_obio_ranges(clk_reg, 1);
+
/* Map the clock register io area read-only */
- r.flags = clk_reg[0].which_io;
- r.start = clk_reg[0].phys_addr;
- mstk48t02_regs = sbus_ioremap(&r, 0,
- sizeof(struct mostek48t02), "mk48t02");
+ mstk48t02_regs = of_ioremap(&op->resource[0], 0,
+ sizeof(struct mostek48t02),
+ "mk48t02");
mstk48t08_regs = NULL; /* To catch weirdness */
- } else if (strcmp(model, "mk48t08") == 0) {
+ } else if (!strcmp(model, "mk48t08")) {
sp_clock_typ = MSTK48T08;
- if(prom_getproperty(node, "reg", (char *) clk_reg,
- sizeof(clk_reg)) == -1) {
- prom_printf("clock_probe: FAILED!\n");
- prom_halt();
- }
- if (sparc_cpu_model == sun4d)
- prom_apply_generic_ranges (bootbus, cpuunit, clk_reg, 1);
- else
- prom_apply_obio_ranges(clk_reg, 1);
- /* Map the clock register io area read-only */
- /* XXX r/o attribute is somewhere in r.flags */
- r.flags = clk_reg[0].which_io;
- r.start = clk_reg[0].phys_addr;
- mstk48t08_regs = sbus_ioremap(&r, 0,
- sizeof(struct mostek48t08), "mk48t08");
+ mstk48t08_regs = of_ioremap(&op->resource[0], 0,
+ sizeof(struct mostek48t08),
+ "mk48t08");
mstk48t02_regs = &mstk48t08_regs->regs;
- } else {
- prom_printf("CLOCK: Unknown model name '%s'\n",model);
- prom_halt();
- }
+ } else
+ return -ENODEV;
/* Report a low battery voltage condition. */
if (has_low_battery())
/* Kick start the clock if it is completely stopped. */
if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
kick_start_clock();
+
+ return 0;
+}
+
+static struct of_device_id clock_match[] = {
+ {
+ .name = "eeprom",
+ },
+ {},
+};
+
+static struct of_platform_driver clock_driver = {
+ .name = "clock",
+ .match_table = clock_match,
+ .probe = clock_probe,
+};
+
+
+/* Probe for the mostek real time clock chip. */
+static void clock_init(void)
+{
+ of_register_driver(&clock_driver, &of_bus_type);
}
void __init sbus_time_init(void)
if (ARCH_SUN4)
sun4_clock_probe();
else
- clock_probe();
+ clock_init();
sparc_init_timers(timer_interrupt);
#include <linux/init.h>
#include <linux/ioport.h>
-#include <asm/oplib.h>
+#include <asm/prom.h>
+#include <asm/of_device.h>
#include <asm/io.h>
-#include <asm/sbus.h>
-#include <asm/ebus.h>
#include <asm/auxio.h>
void __iomem *auxio_register = NULL;
}
}
-static void __devinit auxio_report_dev(struct device_node *dp)
-{
- printk(KERN_INFO "AUXIO: Found device at %s\n",
- dp->full_name);
-}
-
static struct of_device_id auxio_match[] = {
{
.name = "auxio",
MODULE_DEVICE_TABLE(of, auxio_match);
-#ifdef CONFIG_SBUS
-static int __devinit auxio_sbus_probe(struct of_device *dev, const struct of_device_id *match)
+static int __devinit auxio_probe(struct of_device *dev, const struct of_device_id *match)
{
- struct sbus_dev *sdev = to_sbus_device(&dev->dev);
-
- auxio_devtype = AUXIO_TYPE_SBUS;
- auxio_register = sbus_ioremap(&sdev->resource[0], 0,
- sdev->reg_addrs[0].reg_size,
- "auxiliaryIO");
- if (!auxio_register)
+ struct device_node *dp = dev->node;
+ unsigned long size;
+
+ if (!strcmp(dp->parent->name, "ebus")) {
+ auxio_devtype = AUXIO_TYPE_EBUS;
+ size = sizeof(u32);
+ } else if (!strcmp(dp->parent->name, "sbus")) {
+ auxio_devtype = AUXIO_TYPE_SBUS;
+ size = 1;
+ } else {
+ printk("auxio: Unknown parent bus type [%s]\n",
+ dp->parent->name);
return -ENODEV;
-
- auxio_report_dev(dev->node);
- return 0;
-}
-
-static struct of_platform_driver auxio_sbus_driver = {
- .name = "auxio",
- .match_table = auxio_match,
- .probe = auxio_sbus_probe,
-};
-#endif
-
-#ifdef CONFIG_PCI
-static int __devinit auxio_ebus_probe(struct of_device *dev, const struct of_device_id *match)
-{
- struct linux_ebus_device *edev = to_ebus_device(&dev->dev);
-
- auxio_devtype = AUXIO_TYPE_EBUS;
- auxio_register = ioremap(edev->resource[0].start, sizeof(u32));
+ }
+ auxio_register = of_ioremap(&dev->resource[0], 0, size, "auxio");
if (!auxio_register)
return -ENODEV;
- auxio_report_dev(dev->node);
+ printk(KERN_INFO "AUXIO: Found device at %s\n",
+ dp->full_name);
- auxio_set_led(AUXIO_LED_ON);
+ if (auxio_devtype == AUXIO_TYPE_EBUS)
+ auxio_set_led(AUXIO_LED_ON);
return 0;
}
-static struct of_platform_driver auxio_ebus_driver = {
+static struct of_platform_driver auxio_driver = {
.name = "auxio",
.match_table = auxio_match,
- .probe = auxio_ebus_probe,
+ .probe = auxio_probe,
};
-#endif
-static int __init auxio_probe(void)
+static int __init auxio_init(void)
{
-#ifdef CONFIG_SBUS
- of_register_driver(&auxio_sbus_driver, &sbus_bus_type);
-#endif
-#ifdef CONFIG_PCI
- of_register_driver(&auxio_ebus_driver, &ebus_bus_type);
-#endif
-
- return 0;
+ return of_register_driver(&auxio_driver, &of_bus_type);
}
/* Must be after subsys_initcall() so that busses are probed. Must
* be before device_initcall() because things like the floppy driver
* need to use the AUXIO register.
*/
-fs_initcall(auxio_probe);
+fs_initcall(auxio_init);
#include <asm/pbm.h>
#include <asm/ebus.h>
#include <asm/oplib.h>
+#include <asm/prom.h>
+#include <asm/of_device.h>
#include <asm/bpp.h>
#include <asm/irq.h>
return mem;
}
-int __init ebus_intmap_match(struct linux_ebus *ebus,
- struct linux_prom_registers *reg,
- int *interrupt)
-{
- struct linux_prom_ebus_intmap *imap;
- struct linux_prom_ebus_intmask *imask;
- unsigned int hi, lo, irq;
- int i, len, n_imap;
-
- imap = of_get_property(ebus->prom_node, "interrupt-map", &len);
- if (!imap)
- return 0;
- n_imap = len / sizeof(imap[0]);
-
- imask = of_get_property(ebus->prom_node, "interrupt-map-mask", NULL);
- if (!imask)
- return 0;
-
- hi = reg->which_io & imask->phys_hi;
- lo = reg->phys_addr & imask->phys_lo;
- irq = *interrupt & imask->interrupt;
- for (i = 0; i < n_imap; i++) {
- if ((imap[i].phys_hi == hi) &&
- (imap[i].phys_lo == lo) &&
- (imap[i].interrupt == irq)) {
- *interrupt = imap[i].cinterrupt;
- return 0;
- }
- }
- return -1;
-}
-
-void __init fill_ebus_child(struct device_node *dp,
- struct linux_prom_registers *preg,
- struct linux_ebus_child *dev,
- int non_standard_regs)
+static void __init fill_ebus_child(struct device_node *dp,
+ struct linux_ebus_child *dev,
+ int non_standard_regs)
{
+ struct of_device *op;
int *regs;
- int *irqs;
int i, len;
dev->prom_node = dp;
}
}
- for (i = 0; i < PROMINTR_MAX; i++)
- dev->irqs[i] = PCI_IRQ_NONE;
-
- irqs = of_get_property(dp, "interrupts", &len);
- if (!irqs) {
+ op = of_find_device_by_node(dp);
+ if (!op) {
dev->num_irqs = 0;
+ } else {
+ dev->num_irqs = op->num_irqs;
+ for (i = 0; i < dev->num_irqs; i++)
+ dev->irqs[i] = op->irqs[i];
+ }
+
+ if (!dev->num_irqs) {
/*
* Oh, well, some PROMs don't export interrupts
* property to children of EBus devices...
dev->irqs[0] = dev->parent->irqs[1];
}
}
- } else {
- dev->num_irqs = len / sizeof(irqs[0]);
- for (i = 0; i < dev->num_irqs; i++) {
- struct pci_pbm_info *pbm = dev->bus->parent;
- struct pci_controller_info *p = pbm->parent;
-
- if (ebus_intmap_match(dev->bus, preg, &irqs[i]) != -1) {
- dev->irqs[i] = p->irq_build(pbm,
- dev->bus->self,
- irqs[i]);
- } else {
- /* If we get a bogus interrupt property, just
- * record the raw value instead of punting.
- */
- dev->irqs[i] = irqs[i];
- }
- }
}
}
return 0;
}
-void __init fill_ebus_device(struct device_node *dp, struct linux_ebus_device *dev)
+static void __init fill_ebus_device(struct device_node *dp, struct linux_ebus_device *dev)
{
- struct linux_prom_registers *regs;
struct linux_ebus_child *child;
- int *irqs;
- int i, n, len;
+ struct of_device *op;
+ int i, len;
dev->prom_node = dp;
printk(" [%s", dp->name);
- regs = of_get_property(dp, "reg", &len);
- if (!regs) {
+ op = of_find_device_by_node(dp);
+ if (!op) {
dev->num_addrs = 0;
- goto probe_interrupts;
- }
-
- if (len % sizeof(struct linux_prom_registers)) {
- prom_printf("UGH: proplen for %s was %d, need multiple of %d\n",
- dev->prom_node->name, len,
- (int)sizeof(struct linux_prom_registers));
- prom_halt();
- }
- dev->num_addrs = len / sizeof(struct linux_prom_registers);
-
- for (i = 0; i < dev->num_addrs; i++) {
- /* XXX Learn how to interpret ebus ranges... -DaveM */
- if (regs[i].which_io >= 0x10)
- n = (regs[i].which_io - 0x10) >> 2;
- else
- n = regs[i].which_io;
-
- dev->resource[i].start = dev->bus->self->resource[n].start;
- dev->resource[i].start += (unsigned long)regs[i].phys_addr;
- dev->resource[i].end =
- (dev->resource[i].start + (unsigned long)regs[i].reg_size - 1UL);
- dev->resource[i].flags = IORESOURCE_MEM;
- dev->resource[i].name = dev->prom_node->name;
- request_resource(&dev->bus->self->resource[n],
- &dev->resource[i]);
- }
-
-probe_interrupts:
- for (i = 0; i < PROMINTR_MAX; i++)
- dev->irqs[i] = PCI_IRQ_NONE;
-
- irqs = of_get_property(dp, "interrupts", &len);
- if (!irqs) {
dev->num_irqs = 0;
} else {
- dev->num_irqs = len / sizeof(irqs[0]);
- for (i = 0; i < dev->num_irqs; i++) {
- struct pci_pbm_info *pbm = dev->bus->parent;
- struct pci_controller_info *p = pbm->parent;
-
- if (ebus_intmap_match(dev->bus, ®s[0], &irqs[i]) != -1) {
- dev->irqs[i] = p->irq_build(pbm,
- dev->bus->self,
- irqs[i]);
- } else {
- /* If we get a bogus interrupt property, just
- * record the raw value instead of punting.
- */
- dev->irqs[i] = irqs[i];
- }
- }
+ (void) of_get_property(dp, "reg", &len);
+ dev->num_addrs = len / sizeof(struct linux_prom_registers);
+
+ for (i = 0; i < dev->num_addrs; i++)
+ memcpy(&dev->resource[i],
+ &op->resource[i],
+ sizeof(struct resource));
+
+ dev->num_irqs = op->num_irqs;
+ for (i = 0; i < dev->num_irqs; i++)
+ dev->irqs[i] = op->irqs[i];
}
dev->ofdev.node = dp;
child->next = NULL;
child->parent = dev;
child->bus = dev->bus;
- fill_ebus_child(dp, regs, child,
+ fill_ebus_child(dp, child,
child_regs_nonstandard(dev));
while ((dp = dp->sibling) != NULL) {
child->next = NULL;
child->parent = dev;
child->bus = dev->bus;
- fill_ebus_child(dp, regs, child,
+ fill_ebus_child(dp, child,
child_regs_nonstandard(dev));
}
}
data->pre_handler_arg1 = arg1;
data->pre_handler_arg2 = arg2;
+ if (desc->chip == &sun4u_irq_ack ||
+ desc->chip == &sun4v_irq_ack)
+ return;
+
desc->chip = (desc->chip == &sun4u_irq ?
&sun4u_irq_ack : &sun4v_irq_ack);
}
#include <linux/pci.h>
#include <linux/slab.h>
#include <asm/oplib.h>
+#include <asm/prom.h>
+#include <asm/of_device.h>
#include <asm/isa.h>
struct sparc_isa_bridge *isa_chain;
return pregs;
}
-/* I can't believe they didn't put a real INO in the isa device
- * interrupts property. The whole point of the OBP properties
- * is to shield the kernel from IRQ routing details.
- *
- * The P1275 standard for ISA devices seems to also have been
- * totally ignored.
- *
- * On later systems, an interrupt-map and interrupt-map-mask scheme
- * akin to EBUS is used.
- */
-static struct {
- int obp_irq;
- int pci_ino;
-} grover_irq_table[] = {
- { 1, 0x00 }, /* dma, unknown ino at this point */
- { 2, 0x27 }, /* floppy */
- { 3, 0x22 }, /* parallel */
- { 4, 0x2b }, /* serial */
- { 5, 0x25 }, /* acpi power management */
-
- { 0, 0x00 } /* end of table */
-};
-
-static int __init isa_dev_get_irq_using_imap(struct sparc_isa_device *isa_dev,
- struct sparc_isa_bridge *isa_br,
- int *interrupt,
- struct linux_prom_registers *reg)
-{
- struct linux_prom_ebus_intmap *imap;
- struct linux_prom_ebus_intmap *imask;
- unsigned int hi, lo, irq;
- int i, len, n_imap;
-
- imap = of_get_property(isa_br->prom_node, "interrupt-map", &len);
- if (!imap)
- return 0;
- n_imap = len / sizeof(imap[0]);
-
- imask = of_get_property(isa_br->prom_node, "interrupt-map-mask", NULL);
- if (!imask)
- return 0;
-
- hi = reg->which_io & imask->phys_hi;
- lo = reg->phys_addr & imask->phys_lo;
- irq = *interrupt & imask->interrupt;
- for (i = 0; i < n_imap; i++) {
- if ((imap[i].phys_hi == hi) &&
- (imap[i].phys_lo == lo) &&
- (imap[i].interrupt == irq)) {
- *interrupt = imap[i].cinterrupt;
- return 0;
- }
- }
- return -1;
-}
-
static void __init isa_dev_get_irq(struct sparc_isa_device *isa_dev,
struct linux_prom_registers *pregs)
{
- int irq_prop;
+ struct of_device *op = of_find_device_by_node(isa_dev->prom_node);
- irq_prop = of_getintprop_default(isa_dev->prom_node,
- "interrupts", -1);
- if (irq_prop <= 0) {
- goto no_irq;
+ if (!op || !op->num_irqs) {
+ isa_dev->irq = PCI_IRQ_NONE;
} else {
- struct pci_controller_info *pcic;
- struct pci_pbm_info *pbm;
- int i;
-
- if (of_find_property(isa_dev->bus->prom_node,
- "interrupt-map", NULL)) {
- if (!isa_dev_get_irq_using_imap(isa_dev,
- isa_dev->bus,
- &irq_prop,
- pregs))
- goto route_irq;
- }
-
- for (i = 0; grover_irq_table[i].obp_irq != 0; i++) {
- if (grover_irq_table[i].obp_irq == irq_prop) {
- int ino = grover_irq_table[i].pci_ino;
-
- if (ino == 0)
- goto no_irq;
-
- irq_prop = ino;
- goto route_irq;
- }
- }
- goto no_irq;
-
-route_irq:
- pbm = isa_dev->bus->parent;
- pcic = pbm->parent;
- isa_dev->irq = pcic->irq_build(pbm, NULL, irq_prop);
- return;
+ isa_dev->irq = op->irqs[0];
}
-
-no_irq:
- isa_dev->irq = PCI_IRQ_NONE;
}
static void __init isa_fill_children(struct sparc_isa_device *parent_isa_dev)
return error;
}
+void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name)
+{
+ unsigned long ret = res->start + offset;
+
+ if (!request_region(ret, size, name))
+ ret = 0;
+
+ return (void __iomem *) ret;
+}
+EXPORT_SYMBOL(of_ioremap);
+
+void of_iounmap(void __iomem *base, unsigned long size)
+{
+ release_region((unsigned long) base, size);
+}
+EXPORT_SYMBOL(of_iounmap);
+
+static int node_match(struct device *dev, void *data)
+{
+ struct of_device *op = to_of_device(dev);
+ struct device_node *dp = data;
+
+ return (op->node == dp);
+}
+
+struct of_device *of_find_device_by_node(struct device_node *dp)
+{
+ struct device *dev = bus_find_device(&of_bus_type, NULL,
+ dp, node_match);
+
+ if (dev)
+ return to_of_device(dev);
+
+ return NULL;
+}
+EXPORT_SYMBOL(of_find_device_by_node);
+
#ifdef CONFIG_PCI
struct bus_type isa_bus_type = {
.name = "isa",
EXPORT_SYMBOL(sbus_bus_type);
#endif
+struct bus_type of_bus_type = {
+ .name = "of",
+ .match = of_platform_bus_match,
+ .probe = of_device_probe,
+ .remove = of_device_remove,
+ .suspend = of_device_suspend,
+ .resume = of_device_resume,
+};
+EXPORT_SYMBOL(of_bus_type);
+
+static inline u64 of_read_addr(u32 *cell, int size)
+{
+ u64 r = 0;
+ while (size--)
+ r = (r << 32) | *(cell++);
+ return r;
+}
+
+static void __init get_cells(struct device_node *dp,
+ int *addrc, int *sizec)
+{
+ if (addrc)
+ *addrc = of_n_addr_cells(dp);
+ if (sizec)
+ *sizec = of_n_size_cells(dp);
+}
+
+/* Max address size we deal with */
+#define OF_MAX_ADDR_CELLS 4
+
+struct of_bus {
+ const char *name;
+ const char *addr_prop_name;
+ int (*match)(struct device_node *parent);
+ void (*count_cells)(struct device_node *child,
+ int *addrc, int *sizec);
+ u64 (*map)(u32 *addr, u32 *range, int na, int ns, int pna);
+ int (*translate)(u32 *addr, u64 offset, int na);
+ unsigned int (*get_flags)(u32 *addr);
+};
+
+/*
+ * Default translator (generic bus)
+ */
+
+static void of_bus_default_count_cells(struct device_node *dev,
+ int *addrc, int *sizec)
+{
+ get_cells(dev, addrc, sizec);
+}
+
+static u64 of_bus_default_map(u32 *addr, u32 *range, int na, int ns, int pna)
+{
+ u64 cp, s, da;
+
+ cp = of_read_addr(range, na);
+ s = of_read_addr(range + na + pna, ns);
+ da = of_read_addr(addr, na);
+
+ if (da < cp || da >= (cp + s))
+ return OF_BAD_ADDR;
+ return da - cp;
+}
+
+static int of_bus_default_translate(u32 *addr, u64 offset, int na)
+{
+ u64 a = of_read_addr(addr, na);
+ memset(addr, 0, na * 4);
+ a += offset;
+ if (na > 1)
+ addr[na - 2] = a >> 32;
+ addr[na - 1] = a & 0xffffffffu;
+
+ return 0;
+}
+
+static unsigned int of_bus_default_get_flags(u32 *addr)
+{
+ return IORESOURCE_MEM;
+}
+
+/*
+ * PCI bus specific translator
+ */
+
+static int of_bus_pci_match(struct device_node *np)
+{
+ return !strcmp(np->type, "pci") || !strcmp(np->type, "pciex");
+}
+
+static void of_bus_pci_count_cells(struct device_node *np,
+ int *addrc, int *sizec)
+{
+ if (addrc)
+ *addrc = 3;
+ if (sizec)
+ *sizec = 2;
+}
+
+static u64 of_bus_pci_map(u32 *addr, u32 *range, int na, int ns, int pna)
+{
+ u64 cp, s, da;
+
+ /* Check address type match */
+ if ((addr[0] ^ range[0]) & 0x03000000)
+ return OF_BAD_ADDR;
+
+ /* Read address values, skipping high cell */
+ cp = of_read_addr(range + 1, na - 1);
+ s = of_read_addr(range + na + pna, ns);
+ da = of_read_addr(addr + 1, na - 1);
+
+ if (da < cp || da >= (cp + s))
+ return OF_BAD_ADDR;
+ return da - cp;
+}
+
+static int of_bus_pci_translate(u32 *addr, u64 offset, int na)
+{
+ return of_bus_default_translate(addr + 1, offset, na - 1);
+}
+
+static unsigned int of_bus_pci_get_flags(u32 *addr)
+{
+ unsigned int flags = 0;
+ u32 w = addr[0];
+
+ switch((w >> 24) & 0x03) {
+ case 0x01:
+ flags |= IORESOURCE_IO;
+ case 0x02: /* 32 bits */
+ case 0x03: /* 64 bits */
+ flags |= IORESOURCE_MEM;
+ }
+ if (w & 0x40000000)
+ flags |= IORESOURCE_PREFETCH;
+ return flags;
+}
+
+/*
+ * ISA bus specific translator
+ */
+
+static int of_bus_isa_match(struct device_node *np)
+{
+ return !strcmp(np->name, "isa");
+}
+
+static void of_bus_isa_count_cells(struct device_node *child,
+ int *addrc, int *sizec)
+{
+ if (addrc)
+ *addrc = 2;
+ if (sizec)
+ *sizec = 1;
+}
+
+static u64 of_bus_isa_map(u32 *addr, u32 *range, int na, int ns, int pna)
+{
+ u64 cp, s, da;
+
+ /* Check address type match */
+ if ((addr[0] ^ range[0]) & 0x00000001)
+ return OF_BAD_ADDR;
+
+ /* Read address values, skipping high cell */
+ cp = of_read_addr(range + 1, na - 1);
+ s = of_read_addr(range + na + pna, ns);
+ da = of_read_addr(addr + 1, na - 1);
+
+ if (da < cp || da >= (cp + s))
+ return OF_BAD_ADDR;
+ return da - cp;
+}
+
+static int of_bus_isa_translate(u32 *addr, u64 offset, int na)
+{
+ return of_bus_default_translate(addr + 1, offset, na - 1);
+}
+
+static unsigned int of_bus_isa_get_flags(u32 *addr)
+{
+ unsigned int flags = 0;
+ u32 w = addr[0];
+
+ if (w & 1)
+ flags |= IORESOURCE_IO;
+ else
+ flags |= IORESOURCE_MEM;
+ return flags;
+}
+
+/*
+ * SBUS bus specific translator
+ */
+
+static int of_bus_sbus_match(struct device_node *np)
+{
+ return !strcmp(np->name, "sbus") ||
+ !strcmp(np->name, "sbi");
+}
+
+static void of_bus_sbus_count_cells(struct device_node *child,
+ int *addrc, int *sizec)
+{
+ if (addrc)
+ *addrc = 2;
+ if (sizec)
+ *sizec = 1;
+}
+
+static u64 of_bus_sbus_map(u32 *addr, u32 *range, int na, int ns, int pna)
+{
+ return of_bus_default_map(addr, range, na, ns, pna);
+}
+
+static int of_bus_sbus_translate(u32 *addr, u64 offset, int na)
+{
+ return of_bus_default_translate(addr, offset, na);
+}
+
+static unsigned int of_bus_sbus_get_flags(u32 *addr)
+{
+ return IORESOURCE_MEM;
+}
+
+
+/*
+ * Array of bus specific translators
+ */
+
+static struct of_bus of_busses[] = {
+ /* PCI */
+ {
+ .name = "pci",
+ .addr_prop_name = "assigned-addresses",
+ .match = of_bus_pci_match,
+ .count_cells = of_bus_pci_count_cells,
+ .map = of_bus_pci_map,
+ .translate = of_bus_pci_translate,
+ .get_flags = of_bus_pci_get_flags,
+ },
+ /* ISA */
+ {
+ .name = "isa",
+ .addr_prop_name = "reg",
+ .match = of_bus_isa_match,
+ .count_cells = of_bus_isa_count_cells,
+ .map = of_bus_isa_map,
+ .translate = of_bus_isa_translate,
+ .get_flags = of_bus_isa_get_flags,
+ },
+ /* SBUS */
+ {
+ .name = "sbus",
+ .addr_prop_name = "reg",
+ .match = of_bus_sbus_match,
+ .count_cells = of_bus_sbus_count_cells,
+ .map = of_bus_sbus_map,
+ .translate = of_bus_sbus_translate,
+ .get_flags = of_bus_sbus_get_flags,
+ },
+ /* Default */
+ {
+ .name = "default",
+ .addr_prop_name = "reg",
+ .match = NULL,
+ .count_cells = of_bus_default_count_cells,
+ .map = of_bus_default_map,
+ .translate = of_bus_default_translate,
+ .get_flags = of_bus_default_get_flags,
+ },
+};
+
+static struct of_bus *of_match_bus(struct device_node *np)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(of_busses); i ++)
+ if (!of_busses[i].match || of_busses[i].match(np))
+ return &of_busses[i];
+ BUG();
+ return NULL;
+}
+
+static int __init build_one_resource(struct device_node *parent,
+ struct of_bus *bus,
+ struct of_bus *pbus,
+ u32 *addr,
+ int na, int ns, int pna)
+{
+ u32 *ranges;
+ unsigned int rlen;
+ int rone;
+ u64 offset = OF_BAD_ADDR;
+
+ ranges = of_get_property(parent, "ranges", &rlen);
+ if (ranges == NULL || rlen == 0) {
+ offset = of_read_addr(addr, na);
+ memset(addr, 0, pna * 4);
+ goto finish;
+ }
+
+ /* Now walk through the ranges */
+ rlen /= 4;
+ rone = na + pna + ns;
+ for (; rlen >= rone; rlen -= rone, ranges += rone) {
+ offset = bus->map(addr, ranges, na, ns, pna);
+ if (offset != OF_BAD_ADDR)
+ break;
+ }
+ if (offset == OF_BAD_ADDR)
+ return 1;
+
+ memcpy(addr, ranges + na, 4 * pna);
+
+finish:
+ /* Translate it into parent bus space */
+ return pbus->translate(addr, offset, pna);
+}
+
+static void __init build_device_resources(struct of_device *op,
+ struct device *parent)
+{
+ struct of_device *p_op;
+ struct of_bus *bus;
+ int na, ns;
+ int index, num_reg;
+ void *preg;
+
+ if (!parent)
+ return;
+
+ p_op = to_of_device(parent);
+ bus = of_match_bus(p_op->node);
+ bus->count_cells(op->node, &na, &ns);
+
+ preg = of_get_property(op->node, bus->addr_prop_name, &num_reg);
+ if (!preg || num_reg == 0)
+ return;
+
+ /* Convert to num-cells. */
+ num_reg /= 4;
+
+ /* Conver to num-entries. */
+ num_reg /= na + ns;
+
+ for (index = 0; index < num_reg; index++) {
+ struct resource *r = &op->resource[index];
+ u32 addr[OF_MAX_ADDR_CELLS];
+ u32 *reg = (preg + (index * ((na + ns) * 4)));
+ struct device_node *dp = op->node;
+ struct device_node *pp = p_op->node;
+ struct of_bus *pbus;
+ u64 size, result = OF_BAD_ADDR;
+ unsigned long flags;
+ int dna, dns;
+ int pna, pns;
+
+ size = of_read_addr(reg + na, ns);
+ flags = bus->get_flags(reg);
+
+ memcpy(addr, reg, na * 4);
+
+ /* If the immediate parent has no ranges property to apply,
+ * just use a 1<->1 mapping. Unless it is the 'dma' child
+ * of an isa bus, which must be passed up towards the root.
+ *
+ * Also, don't try to translate PMU bus device registers.
+ */
+ if ((of_find_property(pp, "ranges", NULL) == NULL &&
+ strcmp(pp->name, "dma") != 0) ||
+ !strcmp(pp->name, "pmu")) {
+ result = of_read_addr(addr, na);
+ goto build_res;
+ }
+
+ dna = na;
+ dns = ns;
+
+ while (1) {
+ dp = pp;
+ pp = dp->parent;
+ if (!pp) {
+ result = of_read_addr(addr, dna);
+ break;
+ }
+
+ pbus = of_match_bus(pp);
+ pbus->count_cells(dp, &pna, &pns);
+
+ if (build_one_resource(dp, bus, pbus, addr, dna, dns, pna))
+ break;
+
+ dna = pna;
+ dns = pns;
+ bus = pbus;
+ }
+
+ build_res:
+ memset(r, 0, sizeof(*r));
+ if (result != OF_BAD_ADDR) {
+ r->start = result;
+ r->end = result + size - 1;
+ r->flags = flags;
+ } else {
+ r->start = ~0UL;
+ r->end = ~0UL;
+ }
+ r->name = op->node->name;
+ }
+}
+
+static struct device_node * __init
+apply_interrupt_map(struct device_node *dp, struct device_node *pp,
+ u32 *imap, int imlen, u32 *imask,
+ unsigned int *irq_p)
+{
+ struct device_node *cp;
+ unsigned int irq = *irq_p;
+ struct of_bus *bus;
+ phandle handle;
+ u32 *reg;
+ int na, num_reg, i;
+
+ bus = of_match_bus(pp);
+ bus->count_cells(dp, &na, NULL);
+
+ reg = of_get_property(dp, "reg", &num_reg);
+ if (!reg || !num_reg)
+ return NULL;
+
+ imlen /= ((na + 3) * 4);
+ handle = 0;
+ for (i = 0; i < imlen; i++) {
+ int j;
+
+ for (j = 0; j < na; j++) {
+ if ((reg[j] & imask[j]) != imap[j])
+ goto next;
+ }
+ if (imap[na] == irq) {
+ handle = imap[na + 1];
+ irq = imap[na + 2];
+ break;
+ }
+
+ next:
+ imap += (na + 3);
+ }
+ if (i == imlen)
+ return NULL;
+
+ *irq_p = irq;
+ cp = of_find_node_by_phandle(handle);
+
+ return cp;
+}
+
+static unsigned int __init pci_irq_swizzle(struct device_node *dp,
+ struct device_node *pp,
+ unsigned int irq)
+{
+ struct linux_prom_pci_registers *regs;
+ unsigned int devfn, slot, ret;
+
+ if (irq < 1 || irq > 4)
+ return irq;
+
+ regs = of_get_property(dp, "reg", NULL);
+ if (!regs)
+ return irq;
+
+ devfn = (regs->phys_hi >> 8) & 0xff;
+ slot = (devfn >> 3) & 0x1f;
+
+ ret = ((irq - 1 + (slot & 3)) & 3) + 1;
+
+ return ret;
+}
+
+static unsigned int __init build_one_device_irq(struct of_device *op,
+ struct device *parent,
+ unsigned int irq)
+{
+ struct device_node *dp = op->node;
+ struct device_node *pp, *ip;
+ unsigned int orig_irq = irq;
+
+ if (irq == 0xffffffff)
+ return irq;
+
+ if (dp->irq_trans) {
+ irq = dp->irq_trans->irq_build(dp, irq,
+ dp->irq_trans->data);
+#if 1
+ printk("%s: direct translate %x --> %x\n",
+ dp->full_name, orig_irq, irq);
+#endif
+ return irq;
+ }
+
+ /* Something more complicated. Walk up to the root, applying
+ * interrupt-map or bus specific translations, until we hit
+ * an IRQ translator.
+ *
+ * If we hit a bus type or situation we cannot handle, we
+ * stop and assume that the original IRQ number was in a
+ * format which has special meaning to it's immediate parent.
+ */
+ pp = dp->parent;
+ ip = NULL;
+ while (pp) {
+ void *imap, *imsk;
+ int imlen;
+
+ imap = of_get_property(pp, "interrupt-map", &imlen);
+ imsk = of_get_property(pp, "interrupt-map-mask", NULL);
+ if (imap && imsk) {
+ struct device_node *iret;
+ int this_orig_irq = irq;
+
+ iret = apply_interrupt_map(dp, pp,
+ imap, imlen, imsk,
+ &irq);
+#if 1
+ printk("%s: Apply [%s:%x] imap --> [%s:%x]\n",
+ op->node->full_name,
+ pp->full_name, this_orig_irq,
+ (iret ? iret->full_name : "NULL"), irq);
+#endif
+ if (!iret)
+ break;
+
+ if (iret->irq_trans) {
+ ip = iret;
+ break;
+ }
+ } else {
+ if (!strcmp(pp->type, "pci") ||
+ !strcmp(pp->type, "pciex")) {
+ unsigned int this_orig_irq = irq;
+
+ irq = pci_irq_swizzle(dp, pp, irq);
+#if 1
+ printk("%s: PCI swizzle [%s] %x --> %x\n",
+ op->node->full_name,
+ pp->full_name, this_orig_irq, irq);
+#endif
+ }
+
+ if (pp->irq_trans) {
+ ip = pp;
+ break;
+ }
+ }
+ dp = pp;
+ pp = pp->parent;
+ }
+ if (!ip)
+ return orig_irq;
+
+ irq = ip->irq_trans->irq_build(op->node, irq,
+ ip->irq_trans->data);
+#if 1
+ printk("%s: Apply IRQ trans [%s] %x --> %x\n",
+ op->node->full_name, ip->full_name, orig_irq, irq);
+#endif
+
+ return irq;
+}
+
+static struct of_device * __init scan_one_device(struct device_node *dp,
+ struct device *parent)
+{
+ struct of_device *op = kzalloc(sizeof(*op), GFP_KERNEL);
+ unsigned int *irq;
+ int len, i;
+
+ if (!op)
+ return NULL;
+
+ op->node = dp;
+
+ op->clock_freq = of_getintprop_default(dp, "clock-frequency",
+ (25*1000*1000));
+ op->portid = of_getintprop_default(dp, "upa-portid", -1);
+ if (op->portid == -1)
+ op->portid = of_getintprop_default(dp, "portid", -1);
+
+ irq = of_get_property(dp, "interrupts", &len);
+ if (irq) {
+ memcpy(op->irqs, irq, len);
+ op->num_irqs = len / 4;
+ } else {
+ op->num_irqs = 0;
+ }
+
+ build_device_resources(op, parent);
+ for (i = 0; i < op->num_irqs; i++)
+ op->irqs[i] = build_one_device_irq(op, parent, op->irqs[i]);
+
+ op->dev.parent = parent;
+ op->dev.bus = &of_bus_type;
+ if (!parent)
+ strcpy(op->dev.bus_id, "root");
+ else
+ strcpy(op->dev.bus_id, dp->path_component_name);
+
+ if (of_device_register(op)) {
+ printk("%s: Could not register of device.\n",
+ dp->full_name);
+ kfree(op);
+ op = NULL;
+ }
+
+ return op;
+}
+
+static void __init scan_tree(struct device_node *dp, struct device *parent)
+{
+ while (dp) {
+ struct of_device *op = scan_one_device(dp, parent);
+
+ if (op)
+ scan_tree(dp->child, &op->dev);
+
+ dp = dp->sibling;
+ }
+}
+
+static void __init scan_of_devices(void)
+{
+ struct device_node *root = of_find_node_by_path("/");
+ struct of_device *parent;
+
+ parent = scan_one_device(root, NULL);
+ if (!parent)
+ return;
+
+ scan_tree(root->child, &parent->dev);
+}
+
static int __init of_bus_driver_init(void)
{
- int err = 0;
+ int err;
+ err = bus_register(&of_bus_type);
#ifdef CONFIG_PCI
if (!err)
err = bus_register(&isa_bus_type);
if (!err)
err = bus_register(&sbus_bus_type);
#endif
- return 0;
+
+ if (!err)
+ scan_of_devices();
+
+ return err;
}
postcore_initcall(of_bus_driver_init);
p->scan_bus(p);
}
-extern void clock_probe(void);
extern void power_init(void);
static int __init pcibios_init(void)
isa_init();
ebus_init();
- clock_probe();
power_init();
return 0;
}
EXPORT_SYMBOL(pcibios_bus_to_resource);
-extern int pci_irq_verbose;
-
char * __init pcibios_setup(char *str)
{
- if (!strcmp(str, "irq_verbose")) {
- pci_irq_verbose = 1;
- return NULL;
- }
return str;
}
#include <asm/pbm.h>
#include <asm/prom.h>
+#include <asm/of_device.h>
#include "pci_impl.h"
-/* Pass "pci=irq_verbose" on the kernel command line to enable this. */
-int pci_irq_verbose;
-
/* Fix self device of BUS and hook it into BUS->self.
* The pci_scan_bus does not do this for the host bridge.
*/
}
pcp->pbm = pbm;
pcp->prom_node = dp;
+ pcp->op = of_find_device_by_node(dp);
memcpy(pcp->prom_regs, pregs,
nregs * sizeof(struct linux_prom_pci_registers));
pcp->num_prom_regs = nregs;
pci_assign_unassigned(pbm, bus);
}
-static inline unsigned int pci_slot_swivel(struct pci_pbm_info *pbm,
- struct pci_dev *toplevel_pdev,
- struct pci_dev *pdev,
- unsigned int interrupt)
-{
- unsigned int ret;
-
- if (unlikely(interrupt < 1 || interrupt > 4)) {
- printk("%s: Device %s interrupt value of %u is strange.\n",
- pbm->name, pci_name(pdev), interrupt);
- return interrupt;
- }
-
- ret = ((interrupt - 1 + (PCI_SLOT(pdev->devfn) & 3)) & 3) + 1;
-
- if (pci_irq_verbose)
- printk("%s: %s IRQ Swivel %s [%x:%x] -> [%x]\n",
- pbm->name, pci_name(toplevel_pdev), pci_name(pdev),
- interrupt, PCI_SLOT(pdev->devfn), ret);
-
- return ret;
-}
-
-static inline unsigned int pci_apply_intmap(struct pci_pbm_info *pbm,
- struct pci_dev *toplevel_pdev,
- struct pci_dev *pbus,
- struct pci_dev *pdev,
- unsigned int interrupt,
- struct device_node **cnode)
-{
- struct linux_prom_pci_intmap *imap;
- struct linux_prom_pci_intmask *imask;
- struct pcidev_cookie *pbus_pcp = pbus->sysdata;
- struct pcidev_cookie *pdev_pcp = pdev->sysdata;
- struct linux_prom_pci_registers *pregs = pdev_pcp->prom_regs;
- struct property *prop;
- int plen, num_imap, i;
- unsigned int hi, mid, lo, irq, orig_interrupt;
-
- *cnode = pbus_pcp->prom_node;
-
- prop = of_find_property(pbus_pcp->prom_node, "interrupt-map", &plen);
- if (!prop ||
- (plen % sizeof(struct linux_prom_pci_intmap)) != 0) {
- printk("%s: Device %s interrupt-map has bad len %d\n",
- pbm->name, pci_name(pbus), plen);
- goto no_intmap;
- }
- imap = prop->value;
- num_imap = plen / sizeof(struct linux_prom_pci_intmap);
-
- prop = of_find_property(pbus_pcp->prom_node, "interrupt-map-mask", &plen);
- if (!prop ||
- (plen % sizeof(struct linux_prom_pci_intmask)) != 0) {
- printk("%s: Device %s interrupt-map-mask has bad len %d\n",
- pbm->name, pci_name(pbus), plen);
- goto no_intmap;
- }
- imask = prop->value;
-
- orig_interrupt = interrupt;
-
- hi = pregs->phys_hi & imask->phys_hi;
- mid = pregs->phys_mid & imask->phys_mid;
- lo = pregs->phys_lo & imask->phys_lo;
- irq = interrupt & imask->interrupt;
-
- for (i = 0; i < num_imap; i++) {
- if (imap[i].phys_hi == hi &&
- imap[i].phys_mid == mid &&
- imap[i].phys_lo == lo &&
- imap[i].interrupt == irq) {
- *cnode = of_find_node_by_phandle(imap[i].cnode);
- interrupt = imap[i].cinterrupt;
- }
- }
-
- if (pci_irq_verbose)
- printk("%s: %s MAP BUS %s DEV %s [%x] -> [%x]\n",
- pbm->name, pci_name(toplevel_pdev),
- pci_name(pbus), pci_name(pdev),
- orig_interrupt, interrupt);
-
-no_intmap:
- return interrupt;
-}
-
-/* For each PCI bus on the way to the root:
- * 1) If it has an interrupt-map property, apply it.
- * 2) Else, swivel the interrupt number based upon the PCI device number.
- *
- * Return the "IRQ controller" node. If this is the PBM's device node,
- * all interrupt translations are complete, else we should use that node's
- * "reg" property to apply the PBM's "interrupt-{map,mask}" to the interrupt.
- */
-static struct device_node * __init
-pci_intmap_match_to_root(struct pci_pbm_info *pbm,
- struct pci_dev *pdev,
- unsigned int *interrupt)
-{
- struct pci_dev *toplevel_pdev = pdev;
- struct pcidev_cookie *toplevel_pcp = toplevel_pdev->sysdata;
- struct device_node *cnode = toplevel_pcp->prom_node;
-
- while (pdev->bus->number != pbm->pci_first_busno) {
- struct pci_dev *pbus = pdev->bus->self;
- struct pcidev_cookie *pcp = pbus->sysdata;
- struct property *prop;
-
- prop = of_find_property(pcp->prom_node, "interrupt-map", NULL);
- if (!prop) {
- *interrupt = pci_slot_swivel(pbm, toplevel_pdev,
- pdev, *interrupt);
- cnode = pcp->prom_node;
- } else {
- *interrupt = pci_apply_intmap(pbm, toplevel_pdev,
- pbus, pdev,
- *interrupt, &cnode);
-
- while (pcp->prom_node != cnode &&
- pbus->bus->number != pbm->pci_first_busno) {
- pbus = pbus->bus->self;
- pcp = pbus->sysdata;
- }
- }
- pdev = pbus;
-
- if (cnode == pbm->prom_node)
- break;
- }
-
- return cnode;
-}
-
-static int __init pci_intmap_match(struct pci_dev *pdev, unsigned int *interrupt)
-{
- struct pcidev_cookie *dev_pcp = pdev->sysdata;
- struct pci_pbm_info *pbm = dev_pcp->pbm;
- struct linux_prom_pci_registers *reg;
- struct device_node *cnode;
- struct property *prop;
- unsigned int hi, mid, lo, irq;
- int i, plen;
-
- cnode = pci_intmap_match_to_root(pbm, pdev, interrupt);
- if (cnode == pbm->prom_node)
- goto success;
-
- prop = of_find_property(cnode, "reg", &plen);
- if (!prop ||
- (plen % sizeof(struct linux_prom_pci_registers)) != 0) {
- printk("%s: OBP node %s reg property has bad len %d\n",
- pbm->name, cnode->full_name, plen);
- goto fail;
- }
- reg = prop->value;
-
- hi = reg[0].phys_hi & pbm->pbm_intmask->phys_hi;
- mid = reg[0].phys_mid & pbm->pbm_intmask->phys_mid;
- lo = reg[0].phys_lo & pbm->pbm_intmask->phys_lo;
- irq = *interrupt & pbm->pbm_intmask->interrupt;
-
- for (i = 0; i < pbm->num_pbm_intmap; i++) {
- struct linux_prom_pci_intmap *intmap;
-
- intmap = &pbm->pbm_intmap[i];
-
- if (intmap->phys_hi == hi &&
- intmap->phys_mid == mid &&
- intmap->phys_lo == lo &&
- intmap->interrupt == irq) {
- *interrupt = intmap->cinterrupt;
- goto success;
- }
- }
-
-fail:
- return 0;
-
-success:
- if (pci_irq_verbose)
- printk("%s: Routing bus[%2x] slot[%2x] to INO[%02x]\n",
- pbm->name,
- pdev->bus->number, PCI_SLOT(pdev->devfn),
- *interrupt);
- return 1;
-}
-
static void __init pdev_fixup_irq(struct pci_dev *pdev)
{
struct pcidev_cookie *pcp = pdev->sysdata;
- struct pci_pbm_info *pbm = pcp->pbm;
- struct pci_controller_info *p = pbm->parent;
- unsigned int portid = pbm->portid;
- unsigned int prom_irq;
- struct device_node *dp = pcp->prom_node;
- struct property *prop;
-
- /* If this is an empty EBUS device, sometimes OBP fails to
- * give it a valid fully specified interrupts property.
- * The EBUS hooked up to SunHME on PCI I/O boards of
- * Ex000 systems is one such case.
- *
- * The interrupt is not important so just ignore it.
- */
- if (pdev->vendor == PCI_VENDOR_ID_SUN &&
- pdev->device == PCI_DEVICE_ID_SUN_EBUS &&
- !dp->child) {
- pdev->irq = 0;
- return;
- }
+ struct of_device *op = pcp->op;
- prop = of_find_property(dp, "interrupts", NULL);
- if (!prop) {
- pdev->irq = 0;
+ if (op->irqs[0] == 0xffffffff) {
+ pdev->irq = PCI_IRQ_NONE;
return;
}
- prom_irq = *(unsigned int *) prop->value;
-
- if (tlb_type != hypervisor) {
- /* Fully specified already? */
- if (((prom_irq & PCI_IRQ_IGN) >> 6) == portid) {
- pdev->irq = p->irq_build(pbm, pdev, prom_irq);
- goto have_irq;
- }
-
- /* An onboard device? (bit 5 set) */
- if ((prom_irq & PCI_IRQ_INO) & 0x20) {
- pdev->irq = p->irq_build(pbm, pdev, (portid << 6 | prom_irq));
- goto have_irq;
- }
- }
-
- /* Can we find a matching entry in the interrupt-map? */
- if (pci_intmap_match(pdev, &prom_irq)) {
- pdev->irq = p->irq_build(pbm, pdev, (portid << 6) | prom_irq);
- goto have_irq;
- }
-
- /* Ok, we have to do it the hard way. */
- {
- unsigned int bus, slot, line;
-
- bus = (pbm == &pbm->parent->pbm_B) ? (1 << 4) : 0;
-
- /* If we have a legal interrupt property, use it as
- * the IRQ line.
- */
- if (prom_irq > 0 && prom_irq < 5) {
- line = ((prom_irq - 1) & 3);
- } else {
- u8 pci_irq_line;
- /* Else just directly consult PCI config space. */
- pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pci_irq_line);
- line = ((pci_irq_line - 1) & 3);
- }
-
- /* Now figure out the slot.
- *
- * Basically, device number zero on the top-level bus is
- * always the PCI host controller. Slot 0 is then device 1.
- * PBM A supports two external slots (0 and 1), and PBM B
- * supports 4 external slots (0, 1, 2, and 3). On-board PCI
- * devices are wired to device numbers outside of these
- * ranges. -DaveM
- */
- if (pdev->bus->number == pbm->pci_first_busno) {
- slot = PCI_SLOT(pdev->devfn) - pbm->pci_first_slot;
- } else {
- struct pci_dev *bus_dev;
-
- /* Underneath a bridge, use slot number of parent
- * bridge which is closest to the PBM.
- */
- bus_dev = pdev->bus->self;
- while (bus_dev->bus &&
- bus_dev->bus->number != pbm->pci_first_busno)
- bus_dev = bus_dev->bus->self;
-
- slot = PCI_SLOT(bus_dev->devfn) - pbm->pci_first_slot;
- }
- slot = slot << 2;
-
- pdev->irq = p->irq_build(pbm, pdev,
- ((portid << 6) & PCI_IRQ_IGN) |
- (bus | slot | line));
- }
+ pdev->irq = op->irqs[0];
-have_irq:
pci_write_config_byte(pdev, PCI_INTERRUPT_LINE,
pdev->irq & PCI_IRQ_INO);
}
#include <asm/irq.h>
#include <asm/starfire.h>
#include <asm/prom.h>
+#include <asm/of_device.h>
#include "pci_impl.h"
#include "iommu_common.h"
.write = psycho_write_pci_cfg,
};
-/* PSYCHO interrupt mapping support. */
-#define PSYCHO_IMAP_A_SLOT0 0x0c00UL
-#define PSYCHO_IMAP_B_SLOT0 0x0c20UL
-static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
-{
- unsigned int bus = (ino & 0x10) >> 4;
- unsigned int slot = (ino & 0x0c) >> 2;
-
- if (bus == 0)
- return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
- else
- return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
-}
-
-#define PSYCHO_IMAP_SCSI 0x1000UL
-#define PSYCHO_IMAP_ETH 0x1008UL
-#define PSYCHO_IMAP_BPP 0x1010UL
-#define PSYCHO_IMAP_AU_REC 0x1018UL
-#define PSYCHO_IMAP_AU_PLAY 0x1020UL
-#define PSYCHO_IMAP_PFAIL 0x1028UL
-#define PSYCHO_IMAP_KMS 0x1030UL
-#define PSYCHO_IMAP_FLPY 0x1038UL
-#define PSYCHO_IMAP_SHW 0x1040UL
-#define PSYCHO_IMAP_KBD 0x1048UL
-#define PSYCHO_IMAP_MS 0x1050UL
-#define PSYCHO_IMAP_SER 0x1058UL
-#define PSYCHO_IMAP_TIM0 0x1060UL
-#define PSYCHO_IMAP_TIM1 0x1068UL
-#define PSYCHO_IMAP_UE 0x1070UL
-#define PSYCHO_IMAP_CE 0x1078UL
-#define PSYCHO_IMAP_A_ERR 0x1080UL
-#define PSYCHO_IMAP_B_ERR 0x1088UL
-#define PSYCHO_IMAP_PMGMT 0x1090UL
-#define PSYCHO_IMAP_GFX 0x1098UL
-#define PSYCHO_IMAP_EUPA 0x10a0UL
-
-static unsigned long __onboard_imap_off[] = {
-/*0x20*/ PSYCHO_IMAP_SCSI,
-/*0x21*/ PSYCHO_IMAP_ETH,
-/*0x22*/ PSYCHO_IMAP_BPP,
-/*0x23*/ PSYCHO_IMAP_AU_REC,
-/*0x24*/ PSYCHO_IMAP_AU_PLAY,
-/*0x25*/ PSYCHO_IMAP_PFAIL,
-/*0x26*/ PSYCHO_IMAP_KMS,
-/*0x27*/ PSYCHO_IMAP_FLPY,
-/*0x28*/ PSYCHO_IMAP_SHW,
-/*0x29*/ PSYCHO_IMAP_KBD,
-/*0x2a*/ PSYCHO_IMAP_MS,
-/*0x2b*/ PSYCHO_IMAP_SER,
-/*0x2c*/ PSYCHO_IMAP_TIM0,
-/*0x2d*/ PSYCHO_IMAP_TIM1,
-/*0x2e*/ PSYCHO_IMAP_UE,
-/*0x2f*/ PSYCHO_IMAP_CE,
-/*0x30*/ PSYCHO_IMAP_A_ERR,
-/*0x31*/ PSYCHO_IMAP_B_ERR,
-/*0x32*/ PSYCHO_IMAP_PMGMT
-};
-#define PSYCHO_ONBOARD_IRQ_BASE 0x20
-#define PSYCHO_ONBOARD_IRQ_LAST 0x32
-#define psycho_onboard_imap_offset(__ino) \
- __onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
-
-#define PSYCHO_ICLR_A_SLOT0 0x1400UL
-#define PSYCHO_ICLR_SCSI 0x1800UL
-
-#define psycho_iclr_offset(ino) \
- ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \
- (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
-
-static unsigned int psycho_irq_build(struct pci_pbm_info *pbm,
- struct pci_dev *pdev,
- unsigned int ino)
-{
- unsigned long imap, iclr;
- unsigned long imap_off, iclr_off;
- int inofixup = 0;
-
- ino &= PCI_IRQ_INO;
- if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
- /* PCI slot */
- imap_off = psycho_pcislot_imap_offset(ino);
- } else {
- /* Onboard device */
- if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
- prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
- prom_halt();
- }
- imap_off = psycho_onboard_imap_offset(ino);
- }
-
- /* Now build the IRQ bucket. */
- imap = pbm->controller_regs + imap_off;
- imap += 4;
-
- iclr_off = psycho_iclr_offset(ino);
- iclr = pbm->controller_regs + iclr_off;
- iclr += 4;
-
- if ((ino & 0x20) == 0)
- inofixup = ino & 0x03;
-
- return build_irq(inofixup, iclr, imap);
-}
-
/* PSYCHO error handling support. */
enum psycho_error_type {
UE_ERR, CE_ERR, PCI_ERR
#define PSYCHO_ECCCTRL_EE 0x8000000000000000UL /* Enable ECC Checking */
#define PSYCHO_ECCCTRL_UE 0x4000000000000000UL /* Enable UE Interrupts */
#define PSYCHO_ECCCTRL_CE 0x2000000000000000UL /* Enable CE INterrupts */
-#define PSYCHO_UE_INO 0x2e
-#define PSYCHO_CE_INO 0x2f
-#define PSYCHO_PCIERR_A_INO 0x30
-#define PSYCHO_PCIERR_B_INO 0x31
static void psycho_register_error_handlers(struct pci_controller_info *p)
{
struct pci_pbm_info *pbm = &p->pbm_A; /* arbitrary */
+ struct of_device *op = of_find_device_by_node(pbm->prom_node);
unsigned long base = p->pbm_A.controller_regs;
- unsigned int irq, portid = pbm->portid;
u64 tmp;
- /* Build IRQs and register handlers. */
- irq = psycho_irq_build(pbm, NULL, (portid << 6) | PSYCHO_UE_INO);
- if (request_irq(irq, psycho_ue_intr,
- SA_SHIRQ, "PSYCHO UE", p) < 0) {
- prom_printf("PSYCHO%d: Cannot register UE interrupt.\n",
- p->index);
- prom_halt();
- }
+ if (!op)
+ return;
- irq = psycho_irq_build(pbm, NULL, (portid << 6) | PSYCHO_CE_INO);
- if (request_irq(irq, psycho_ce_intr,
- SA_SHIRQ, "PSYCHO CE", p) < 0) {
- prom_printf("PSYCHO%d: Cannot register CE interrupt.\n",
- p->index);
- prom_halt();
- }
+ /* Psycho interrupt property order is:
+ * 0: PCIERR PBM B INO
+ * 1: UE ERR
+ * 2: CE ERR
+ * 3: POWER FAIL
+ * 4: SPARE HARDWARE
+ * 5: PCIERR PBM A INO
+ */
- pbm = &p->pbm_A;
- irq = psycho_irq_build(pbm, NULL, (portid << 6) | PSYCHO_PCIERR_A_INO);
- if (request_irq(irq, psycho_pcierr_intr,
- SA_SHIRQ, "PSYCHO PCIERR", &p->pbm_A) < 0) {
- prom_printf("PSYCHO%d(PBMA): Cannot register PciERR interrupt.\n",
- p->index);
- prom_halt();
- }
+ if (op->num_irqs < 6)
+ return;
- pbm = &p->pbm_B;
- irq = psycho_irq_build(pbm, NULL, (portid << 6) | PSYCHO_PCIERR_B_INO);
- if (request_irq(irq, psycho_pcierr_intr,
- SA_SHIRQ, "PSYCHO PCIERR", &p->pbm_B) < 0) {
- prom_printf("PSYCHO%d(PBMB): Cannot register PciERR interrupt.\n",
- p->index);
- prom_halt();
- }
+ request_irq(op->irqs[1], psycho_ue_intr, SA_SHIRQ, "PSYCHO UE", p);
+ request_irq(op->irqs[2], psycho_ce_intr, SA_SHIRQ, "PSYCHO CE", p);
+ request_irq(op->irqs[5], psycho_pcierr_intr, SA_SHIRQ,
+ "PSYCHO PCIERR-A", &p->pbm_A);
+ request_irq(op->irqs[0], psycho_pcierr_intr, SA_SHIRQ,
+ "PSYCHO PCIERR-B", &p->pbm_B);
/* Enable UE and CE interrupts for controller. */
psycho_write(base + PSYCHO_ECC_CTRL,
/* If necessary, hook us up for starfire IRQ translations. */
if (this_is_starfire)
- p->starfire_cookie = starfire_hookup(p->pbm_A.portid);
- else
- p->starfire_cookie = NULL;
+ starfire_hookup(p->pbm_A.portid);
}
#define PSYCHO_IRQ_RETRY 0x1a00UL
p->index = pci_num_controllers++;
p->pbms_same_domain = 0;
p->scan_bus = psycho_scan_bus;
- p->irq_build = psycho_irq_build;
p->base_address_update = psycho_base_address_update;
p->resource_adjust = psycho_resource_adjust;
p->pci_ops = &psycho_ops;
.write = sabre_write_pci_cfg,
};
-static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
-{
- unsigned int bus = (ino & 0x10) >> 4;
- unsigned int slot = (ino & 0x0c) >> 2;
-
- if (bus == 0)
- return SABRE_IMAP_A_SLOT0 + (slot * 8);
- else
- return SABRE_IMAP_B_SLOT0 + (slot * 8);
-}
-
-static unsigned long __onboard_imap_off[] = {
-/*0x20*/ SABRE_IMAP_SCSI,
-/*0x21*/ SABRE_IMAP_ETH,
-/*0x22*/ SABRE_IMAP_BPP,
-/*0x23*/ SABRE_IMAP_AU_REC,
-/*0x24*/ SABRE_IMAP_AU_PLAY,
-/*0x25*/ SABRE_IMAP_PFAIL,
-/*0x26*/ SABRE_IMAP_KMS,
-/*0x27*/ SABRE_IMAP_FLPY,
-/*0x28*/ SABRE_IMAP_SHW,
-/*0x29*/ SABRE_IMAP_KBD,
-/*0x2a*/ SABRE_IMAP_MS,
-/*0x2b*/ SABRE_IMAP_SER,
-/*0x2c*/ 0 /* reserved */,
-/*0x2d*/ 0 /* reserved */,
-/*0x2e*/ SABRE_IMAP_UE,
-/*0x2f*/ SABRE_IMAP_CE,
-/*0x30*/ SABRE_IMAP_PCIERR,
-};
-#define SABRE_ONBOARD_IRQ_BASE 0x20
-#define SABRE_ONBOARD_IRQ_LAST 0x30
-#define sabre_onboard_imap_offset(__ino) \
- __onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
-
-#define sabre_iclr_offset(ino) \
- ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \
- (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
-
-/* When a device lives behind a bridge deeper in the PCI bus topology
- * than APB, a special sequence must run to make sure all pending DMA
- * transfers at the time of IRQ delivery are visible in the coherency
- * domain by the cpu. This sequence is to perform a read on the far
- * side of the non-APB bridge, then perform a read of Sabre's DMA
- * write-sync register.
- */
-static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
-{
- struct pci_dev *pdev = _arg1;
- unsigned long sync_reg = (unsigned long) _arg2;
- u16 _unused;
-
- pci_read_config_word(pdev, PCI_VENDOR_ID, &_unused);
- sabre_read(sync_reg);
-}
-
-static unsigned int sabre_irq_build(struct pci_pbm_info *pbm,
- struct pci_dev *pdev,
- unsigned int ino)
-{
- unsigned long imap, iclr;
- unsigned long imap_off, iclr_off;
- int inofixup = 0;
- int virt_irq;
-
- ino &= PCI_IRQ_INO;
- if (ino < SABRE_ONBOARD_IRQ_BASE) {
- /* PCI slot */
- imap_off = sabre_pcislot_imap_offset(ino);
- } else {
- /* onboard device */
- if (ino > SABRE_ONBOARD_IRQ_LAST) {
- prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
- prom_halt();
- }
- imap_off = sabre_onboard_imap_offset(ino);
- }
-
- /* Now build the IRQ bucket. */
- imap = pbm->controller_regs + imap_off;
- imap += 4;
-
- iclr_off = sabre_iclr_offset(ino);
- iclr = pbm->controller_regs + iclr_off;
- iclr += 4;
-
- if ((ino & 0x20) == 0)
- inofixup = ino & 0x03;
-
- virt_irq = build_irq(inofixup, iclr, imap);
-
- if (pdev) {
- struct pcidev_cookie *pcp = pdev->sysdata;
-
- if (pdev->bus->number != pcp->pbm->pci_first_busno) {
- struct pci_controller_info *p = pcp->pbm->parent;
-
- irq_install_pre_handler(virt_irq,
- sabre_wsync_handler,
- pdev,
- (void *)
- p->pbm_A.controller_regs +
- SABRE_WRSYNC);
- }
- }
- return virt_irq;
-}
-
/* SABRE error handling support. */
static void sabre_check_iommu_error(struct pci_controller_info *p,
unsigned long afsr,
return IRQ_HANDLED;
}
-/* XXX What about PowerFail/PowerManagement??? -DaveM */
-#define SABRE_UE_INO 0x2e
-#define SABRE_CE_INO 0x2f
-#define SABRE_PCIERR_INO 0x30
static void sabre_register_error_handlers(struct pci_controller_info *p)
{
struct pci_pbm_info *pbm = &p->pbm_A; /* arbitrary */
+ struct device_node *dp = pbm->prom_node;
+ struct of_device *op;
unsigned long base = pbm->controller_regs;
- unsigned long irq, portid = pbm->portid;
u64 tmp;
+ if (pbm->chip_type == PBM_CHIP_TYPE_SABRE)
+ dp = dp->parent;
+
+ op = of_find_device_by_node(dp);
+ if (!op)
+ return;
+
+ /* Sabre/Hummingbird IRQ property layout is:
+ * 0: PCI ERR
+ * 1: UE ERR
+ * 2: CE ERR
+ * 3: POWER FAIL
+ */
+ if (op->num_irqs < 4)
+ return;
+
/* We clear the error bits in the appropriate AFSR before
* registering the handler so that we don't get spurious
* interrupts.
(SABRE_UEAFSR_PDRD | SABRE_UEAFSR_PDWR |
SABRE_UEAFSR_SDRD | SABRE_UEAFSR_SDWR |
SABRE_UEAFSR_SDTE | SABRE_UEAFSR_PDTE));
- irq = sabre_irq_build(pbm, NULL, (portid << 6) | SABRE_UE_INO);
- if (request_irq(irq, sabre_ue_intr,
- SA_SHIRQ, "SABRE UE", p) < 0) {
- prom_printf("SABRE%d: Cannot register UE interrupt.\n",
- p->index);
- prom_halt();
- }
+
+ request_irq(op->irqs[1], sabre_ue_intr, SA_SHIRQ, "SABRE UE", p);
sabre_write(base + SABRE_CE_AFSR,
(SABRE_CEAFSR_PDRD | SABRE_CEAFSR_PDWR |
SABRE_CEAFSR_SDRD | SABRE_CEAFSR_SDWR));
- irq = sabre_irq_build(pbm, NULL, (portid << 6) | SABRE_CE_INO);
- if (request_irq(irq, sabre_ce_intr,
- SA_SHIRQ, "SABRE CE", p) < 0) {
- prom_printf("SABRE%d: Cannot register CE interrupt.\n",
- p->index);
- prom_halt();
- }
- irq = sabre_irq_build(pbm, NULL, (portid << 6) | SABRE_PCIERR_INO);
- if (request_irq(irq, sabre_pcierr_intr,
- SA_SHIRQ, "SABRE PCIERR", p) < 0) {
- prom_printf("SABRE%d: Cannot register PciERR interrupt.\n",
- p->index);
- prom_halt();
- }
+ request_irq(op->irqs[2], sabre_ce_intr, SA_SHIRQ, "SABRE CE", p);
+ request_irq(op->irqs[0], sabre_pcierr_intr, SA_SHIRQ,
+ "SABRE PCIERR", p);
tmp = sabre_read(base + SABRE_PCICTRL);
tmp |= SABRE_PCICTRL_ERREN;
p->index = pci_num_controllers++;
p->pbms_same_domain = 1;
p->scan_bus = sabre_scan_bus;
- p->irq_build = sabre_irq_build;
p->base_address_update = sabre_base_address_update;
p->resource_adjust = sabre_resource_adjust;
p->pci_ops = &sabre_ops;
.write = schizo_write_pci_cfg,
};
-/* SCHIZO interrupt mapping support. Unlike Psycho, for this controller the
- * imap/iclr registers are per-PBM.
- */
-#define SCHIZO_IMAP_BASE 0x1000UL
-#define SCHIZO_ICLR_BASE 0x1400UL
-
-static unsigned long schizo_imap_offset(unsigned long ino)
-{
- return SCHIZO_IMAP_BASE + (ino * 8UL);
-}
-
-static unsigned long schizo_iclr_offset(unsigned long ino)
-{
- return SCHIZO_ICLR_BASE + (ino * 8UL);
-}
-
-static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
-{
- unsigned long sync_reg = (unsigned long) _arg2;
- u64 mask = 1UL << (ino & IMAP_INO);
- u64 val;
- int limit;
-
- schizo_write(sync_reg, mask);
-
- limit = 100000;
- val = 0;
- while (--limit) {
- val = schizo_read(sync_reg);
- if (!(val & mask))
- break;
- }
- if (limit <= 0) {
- printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
- val, mask);
- }
-
- if (_arg1) {
- static unsigned char cacheline[64]
- __attribute__ ((aligned (64)));
-
- __asm__ __volatile__("rd %%fprs, %0\n\t"
- "or %0, %4, %1\n\t"
- "wr %1, 0x0, %%fprs\n\t"
- "stda %%f0, [%5] %6\n\t"
- "wr %0, 0x0, %%fprs\n\t"
- "membar #Sync"
- : "=&r" (mask), "=&r" (val)
- : "0" (mask), "1" (val),
- "i" (FPRS_FEF), "r" (&cacheline[0]),
- "i" (ASI_BLK_COMMIT_P));
- }
-}
-
-static unsigned long schizo_ino_to_iclr(struct pci_pbm_info *pbm,
- unsigned int ino)
-{
- ino &= PCI_IRQ_INO;
- return pbm->pbm_regs + schizo_iclr_offset(ino) + 4;
-}
-
-static unsigned long schizo_ino_to_imap(struct pci_pbm_info *pbm,
- unsigned int ino)
-{
- ino &= PCI_IRQ_INO;
- return pbm->pbm_regs + schizo_imap_offset(ino) + 4;
-}
-
-static unsigned int schizo_irq_build(struct pci_pbm_info *pbm,
- struct pci_dev *pdev,
- unsigned int ino)
-{
- unsigned long imap, iclr;
- int ign_fixup;
- int virt_irq;
-
- ino &= PCI_IRQ_INO;
-
- /* Now build the IRQ bucket. */
- imap = schizo_ino_to_imap(pbm, ino);
- iclr = schizo_ino_to_iclr(pbm, ino);
-
- /* On Schizo, no inofixup occurs. This is because each
- * INO has it's own IMAP register. On Psycho and Sabre
- * there is only one IMAP register for each PCI slot even
- * though four different INOs can be generated by each
- * PCI slot.
- *
- * But, for JBUS variants (essentially, Tomatillo), we have
- * to fixup the lowest bit of the interrupt group number.
- */
- ign_fixup = 0;
- if (pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO) {
- if (pbm->portid & 1)
- ign_fixup = (1 << 6);
- }
-
- virt_irq = build_irq(ign_fixup, iclr, imap);
-
- if (pdev && pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO) {
- irq_install_pre_handler(virt_irq,
- tomatillo_wsync_handler,
- ((pbm->chip_version <= 4) ?
- (void *) 1 : (void *) 0),
- (void *) pbm->sync_reg);
- }
-
- return virt_irq;
-}
-
/* SCHIZO error handling support. */
enum schizo_error_type {
UE_ERR, CE_ERR, PCI_ERR, SAFARI_ERR
return &p->pbm_A;
}
-static void schizo_clear_other_err_intr(struct pci_controller_info *p, int irq)
-{
- struct pci_pbm_info *pbm;
- unsigned long iclr;
-
- /* Do not clear the interrupt for the other PCI bus.
- *
- * This "ACK both PBM IRQs" only needs to be performed
- * for chip-wide error interrupts.
- */
- if ((irq & IMAP_INO) == SCHIZO_PCIERR_A_INO ||
- (irq & IMAP_INO) == SCHIZO_PCIERR_B_INO)
- return;
-
- pbm = pbm_for_ino(p, irq);
- if (pbm == &p->pbm_A)
- pbm = &p->pbm_B;
- else
- pbm = &p->pbm_A;
-
- schizo_irq_build(pbm, NULL,
- (pbm->portid << 6) | (irq & IMAP_INO));
-
- iclr = schizo_ino_to_iclr(pbm,
- (pbm->portid << 6) | (irq & IMAP_INO));
- upa_writel(ICLR_IDLE, iclr);
-}
-
#define SCHIZO_STC_ERR 0xb800UL /* --> 0xba00 */
#define SCHIZO_STC_TAG 0xba00UL /* --> 0xba80 */
#define SCHIZO_STC_LINE 0xbb00UL /* --> 0xbb80 */
/* Interrogate IOMMU for error status. */
schizo_check_iommu_error(p, UE_ERR);
- schizo_clear_other_err_intr(p, irq);
-
return IRQ_HANDLED;
}
printk("(none)");
printk("]\n");
- schizo_clear_other_err_intr(p, irq);
-
return IRQ_HANDLED;
}
if (error_bits & (SCHIZO_PCIAFSR_PPERR | SCHIZO_PCIAFSR_SPERR))
pci_scan_for_parity_error(p, pbm, pbm->pci_bus);
- schizo_clear_other_err_intr(p, irq);
-
return IRQ_HANDLED;
}
printk("PCI%d: Unexpected Safari/JBUS error interrupt, errlog[%016lx]\n",
p->index, errlog);
- schizo_clear_other_err_intr(p, irq);
return IRQ_HANDLED;
}
p->index);
schizo_check_iommu_error(p, SAFARI_ERR);
- schizo_clear_other_err_intr(p, irq);
return IRQ_HANDLED;
}
static void tomatillo_register_error_handlers(struct pci_controller_info *p)
{
struct pci_pbm_info *pbm;
- unsigned int irq;
+ struct of_device *op;
u64 tmp, err_mask, err_no_mask;
- /* Build IRQs and register handlers. */
+ /* Tomatillo IRQ property layout is:
+ * 0: PCIERR
+ * 1: UE ERR
+ * 2: CE ERR
+ * 3: SERR
+ * 4: POWER FAIL?
+ */
+
pbm = pbm_for_ino(p, SCHIZO_UE_INO);
- irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_UE_INO);
- if (request_irq(irq, schizo_ue_intr,
- SA_SHIRQ, "TOMATILLO UE", p) < 0) {
- prom_printf("%s: Cannot register UE interrupt.\n",
- pbm->name);
- prom_halt();
- }
- tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_UE_INO));
- upa_writel(tmp, (pbm->pbm_regs +
- schizo_imap_offset(SCHIZO_UE_INO) + 4));
+ op = of_find_device_by_node(pbm->prom_node);
+ if (op)
+ request_irq(op->irqs[1], schizo_ue_intr, SA_SHIRQ,
+ "TOMATILLO_UE", p);
pbm = pbm_for_ino(p, SCHIZO_CE_INO);
- irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_CE_INO);
- if (request_irq(irq, schizo_ce_intr,
- SA_SHIRQ, "TOMATILLO CE", p) < 0) {
- prom_printf("%s: Cannot register CE interrupt.\n",
- pbm->name);
- prom_halt();
- }
- tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_CE_INO));
- upa_writel(tmp, (pbm->pbm_regs +
- schizo_imap_offset(SCHIZO_CE_INO) + 4));
+ op = of_find_device_by_node(pbm->prom_node);
+ if (op)
+ request_irq(op->irqs[2], schizo_ce_intr, SA_SHIRQ,
+ "TOMATILLO CE", p);
pbm = pbm_for_ino(p, SCHIZO_PCIERR_A_INO);
- irq = schizo_irq_build(pbm, NULL, ((pbm->portid << 6) |
- SCHIZO_PCIERR_A_INO));
- if (request_irq(irq, schizo_pcierr_intr,
- SA_SHIRQ, "TOMATILLO PCIERR", pbm) < 0) {
- prom_printf("%s: Cannot register PBM A PciERR interrupt.\n",
- pbm->name);
- prom_halt();
- }
- tmp = upa_readl(schizo_ino_to_imap(pbm, ((pbm->portid << 6) |
- SCHIZO_PCIERR_A_INO)));
- upa_writel(tmp, (pbm->pbm_regs +
- schizo_imap_offset(SCHIZO_PCIERR_A_INO) + 4));
+ op = of_find_device_by_node(pbm->prom_node);
+ if (op)
+ request_irq(op->irqs[0], schizo_pcierr_intr, SA_SHIRQ,
+ "TOMATILLO PCIERR-A", pbm);
+
pbm = pbm_for_ino(p, SCHIZO_PCIERR_B_INO);
- irq = schizo_irq_build(pbm, NULL, ((pbm->portid << 6) |
- SCHIZO_PCIERR_B_INO));
- if (request_irq(irq, schizo_pcierr_intr,
- SA_SHIRQ, "TOMATILLO PCIERR", pbm) < 0) {
- prom_printf("%s: Cannot register PBM B PciERR interrupt.\n",
- pbm->name);
- prom_halt();
- }
- tmp = upa_readl(schizo_ino_to_imap(pbm, ((pbm->portid << 6) |
- SCHIZO_PCIERR_B_INO)));
- upa_writel(tmp, (pbm->pbm_regs +
- schizo_imap_offset(SCHIZO_PCIERR_B_INO) + 4));
+ op = of_find_device_by_node(pbm->prom_node);
+ if (op)
+ request_irq(op->irqs[0], schizo_pcierr_intr, SA_SHIRQ,
+ "TOMATILLO PCIERR-B", pbm);
pbm = pbm_for_ino(p, SCHIZO_SERR_INO);
- irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_SERR_INO);
- if (request_irq(irq, schizo_safarierr_intr,
- SA_SHIRQ, "TOMATILLO SERR", p) < 0) {
- prom_printf("%s: Cannot register SafariERR interrupt.\n",
- pbm->name);
- prom_halt();
- }
- tmp = upa_readl(schizo_ino_to_imap(pbm, ((pbm->portid << 6) |
- SCHIZO_SERR_INO)));
- upa_writel(tmp, (pbm->pbm_regs +
- schizo_imap_offset(SCHIZO_SERR_INO) + 4));
+ op = of_find_device_by_node(pbm->prom_node);
+ if (op)
+ request_irq(op->irqs[3], schizo_safarierr_intr, SA_SHIRQ,
+ "TOMATILLO SERR", p);
/* Enable UE and CE interrupts for controller. */
schizo_write(p->pbm_A.controller_regs + SCHIZO_ECC_CTRL,
static void schizo_register_error_handlers(struct pci_controller_info *p)
{
struct pci_pbm_info *pbm;
- unsigned int irq;
+ struct of_device *op;
u64 tmp, err_mask, err_no_mask;
- /* Build IRQs and register handlers. */
+ /* Schizo IRQ property layout is:
+ * 0: PCIERR
+ * 1: UE ERR
+ * 2: CE ERR
+ * 3: SERR
+ * 4: POWER FAIL?
+ */
+
pbm = pbm_for_ino(p, SCHIZO_UE_INO);
- irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_UE_INO);
- if (request_irq(irq, schizo_ue_intr,
- SA_SHIRQ, "SCHIZO UE", p) < 0) {
- prom_printf("%s: Cannot register UE interrupt.\n",
- pbm->name);
- prom_halt();
- }
- tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_UE_INO));
- upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_UE_INO) + 4));
+ op = of_find_device_by_node(pbm->prom_node);
+ if (op)
+ request_irq(op->irqs[1], schizo_ue_intr, SA_SHIRQ,
+ "SCHIZO_UE", p);
pbm = pbm_for_ino(p, SCHIZO_CE_INO);
- irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_CE_INO);
- if (request_irq(irq, schizo_ce_intr,
- SA_SHIRQ, "SCHIZO CE", p) < 0) {
- prom_printf("%s: Cannot register CE interrupt.\n",
- pbm->name);
- prom_halt();
- }
- tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_CE_INO));
- upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_CE_INO) + 4));
+ op = of_find_device_by_node(pbm->prom_node);
+ if (op)
+ request_irq(op->irqs[2], schizo_ce_intr, SA_SHIRQ,
+ "SCHIZO CE", p);
pbm = pbm_for_ino(p, SCHIZO_PCIERR_A_INO);
- irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_PCIERR_A_INO);
- if (request_irq(irq, schizo_pcierr_intr,
- SA_SHIRQ, "SCHIZO PCIERR", pbm) < 0) {
- prom_printf("%s: Cannot register PBM A PciERR interrupt.\n",
- pbm->name);
- prom_halt();
- }
- tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_PCIERR_A_INO));
- upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_PCIERR_A_INO) + 4));
+ op = of_find_device_by_node(pbm->prom_node);
+ if (op)
+ request_irq(op->irqs[0], schizo_pcierr_intr, SA_SHIRQ,
+ "SCHIZO PCIERR-A", pbm);
+
pbm = pbm_for_ino(p, SCHIZO_PCIERR_B_INO);
- irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_PCIERR_B_INO);
- if (request_irq(irq, schizo_pcierr_intr,
- SA_SHIRQ, "SCHIZO PCIERR", &p->pbm_B) < 0) {
- prom_printf("%s: Cannot register PBM B PciERR interrupt.\n",
- pbm->name);
- prom_halt();
- }
- tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_PCIERR_B_INO));
- upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_PCIERR_B_INO) + 4));
+ op = of_find_device_by_node(pbm->prom_node);
+ if (op)
+ request_irq(op->irqs[0], schizo_pcierr_intr, SA_SHIRQ,
+ "SCHIZO PCIERR-B", pbm);
pbm = pbm_for_ino(p, SCHIZO_SERR_INO);
- irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_SERR_INO);
- if (request_irq(irq, schizo_safarierr_intr,
- SA_SHIRQ, "SCHIZO SERR", p) < 0) {
- prom_printf("%s: Cannot register SafariERR interrupt.\n",
- pbm->name);
- prom_halt();
- }
- tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_SERR_INO));
- upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_SERR_INO) + 4));
+ op = of_find_device_by_node(pbm->prom_node);
+ if (op)
+ request_irq(op->irqs[3], schizo_safarierr_intr, SA_SHIRQ,
+ "SCHIZO SERR", p);
/* Enable UE and CE interrupts for controller. */
schizo_write(p->pbm_A.controller_regs + SCHIZO_ECC_CTRL,
p->scan_bus = (chip_type == PBM_CHIP_TYPE_TOMATILLO ?
tomatillo_scan_bus :
schizo_scan_bus);
- p->irq_build = schizo_irq_build;
p->base_address_update = schizo_base_address_update;
p->resource_adjust = schizo_resource_adjust;
p->pci_ops = &schizo_ops;
/* XXX register error interrupt handlers XXX */
}
-static unsigned int pci_sun4v_irq_build(struct pci_pbm_info *pbm,
- struct pci_dev *pdev,
- unsigned int devino)
-{
- u32 devhandle = pbm->devhandle;
-
- return sun4v_build_irq(devhandle, devino);
-}
-
static void pci_sun4v_base_address_update(struct pci_dev *pdev, int resource)
{
struct pcidev_cookie *pcp = pdev->sysdata;
p->pbms_same_domain = 0;
p->scan_bus = pci_sun4v_scan_bus;
- p->irq_build = pci_sun4v_irq_build;
p->base_address_update = pci_sun4v_base_address_update;
p->resource_adjust = pci_sun4v_resource_adjust;
p->pci_ops = &pci_sun4v_ops;
#include <linux/pm.h>
#include <asm/system.h>
-#include <asm/ebus.h>
-#include <asm/isa.h>
#include <asm/auxio.h>
+#include <asm/prom.h>
+#include <asm/of_device.h>
+#include <asm/io.h>
#include <linux/unistd.h>
int scons_pwroff = 1;
#ifdef CONFIG_PCI
+#include <linux/pci.h>
static void __iomem *power_reg;
static DECLARE_WAIT_QUEUE_HEAD(powerd_wait);
return 1;
}
-static void __devinit power_probe_common(struct of_device *dev, struct resource *res, unsigned int irq)
+static int __devinit power_probe(struct of_device *op, const struct of_device_id *match)
{
- power_reg = ioremap(res->start, 0x4);
+ struct resource *res = &op->resource[0];
+ unsigned int irq= op->irqs[0];
- printk("power: Control reg at %p ... ", power_reg);
+ power_reg = of_ioremap(res, 0, 0x4, "power");
+
+ printk("%s: Control reg at %lx ... ",
+ op->node->name, res->start);
poweroff_method = machine_halt; /* able to use the standard halt */
- if (has_button_interrupt(irq, dev->node)) {
+ if (has_button_interrupt(irq, op->node)) {
if (kernel_thread(powerd, NULL, CLONE_FS) < 0) {
printk("Failed to start power daemon.\n");
- return;
+ return 0;
}
printk("powerd running.\n");
if (request_irq(irq,
- power_handler, SA_SHIRQ, "power", NULL) < 0)
+ power_handler, 0, "power", NULL) < 0)
printk("power: Error, cannot register IRQ handler.\n");
} else {
printk("not using powerd.\n");
}
+
+ return 0;
}
static struct of_device_id power_match[] = {
{},
};
-static int __devinit ebus_power_probe(struct of_device *dev, const struct of_device_id *match)
-{
- struct linux_ebus_device *edev = to_ebus_device(&dev->dev);
- struct resource *res = &edev->resource[0];
- unsigned int irq = edev->irqs[0];
-
- power_probe_common(dev, res,irq);
-
- return 0;
-}
-
-static struct of_platform_driver ebus_power_driver = {
- .name = "power",
- .match_table = power_match,
- .probe = ebus_power_probe,
-};
-
-static int __devinit isa_power_probe(struct of_device *dev, const struct of_device_id *match)
-{
- struct sparc_isa_device *idev = to_isa_device(&dev->dev);
- struct resource *res = &idev->resource;
- unsigned int irq = idev->irq;
-
- power_probe_common(dev, res,irq);
-
- return 0;
-}
-
-static struct of_platform_driver isa_power_driver = {
+static struct of_platform_driver power_driver = {
.name = "power",
.match_table = power_match,
- .probe = isa_power_probe,
+ .probe = power_probe,
};
void __init power_init(void)
{
- of_register_driver(&ebus_power_driver, &ebus_bus_type);
- of_register_driver(&isa_power_driver, &isa_bus_type);
+ of_register_driver(&power_driver, &of_bus_type);
return;
}
#endif /* CONFIG_PCI */
* 2 of the License, or (at your option) any later version.
*/
+#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/string.h>
#include <linux/module.h>
#include <asm/prom.h>
+#include <asm/of_device.h>
#include <asm/oplib.h>
+#include <asm/irq.h>
+#include <asm/asi.h>
+#include <asm/upa.h>
static struct device_node *allnodes;
}
EXPORT_SYMBOL(of_getintprop_default);
+int of_n_addr_cells(struct device_node *np)
+{
+ int* ip;
+ do {
+ if (np->parent)
+ np = np->parent;
+ ip = of_get_property(np, "#address-cells", NULL);
+ if (ip != NULL)
+ return *ip;
+ } while (np->parent);
+ /* No #address-cells property for the root node, default to 2 */
+ return 2;
+}
+EXPORT_SYMBOL(of_n_addr_cells);
+
+int of_n_size_cells(struct device_node *np)
+{
+ int* ip;
+ do {
+ if (np->parent)
+ np = np->parent;
+ ip = of_get_property(np, "#size-cells", NULL);
+ if (ip != NULL)
+ return *ip;
+ } while (np->parent);
+ /* No #size-cells property for the root node, default to 1 */
+ return 1;
+}
+EXPORT_SYMBOL(of_n_size_cells);
+
int of_set_property(struct device_node *dp, const char *name, void *val, int len)
{
struct property **prevp;
return ret;
}
+#ifdef CONFIG_PCI
+/* PSYCHO interrupt mapping support. */
+#define PSYCHO_IMAP_A_SLOT0 0x0c00UL
+#define PSYCHO_IMAP_B_SLOT0 0x0c20UL
+static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
+{
+ unsigned int bus = (ino & 0x10) >> 4;
+ unsigned int slot = (ino & 0x0c) >> 2;
+
+ if (bus == 0)
+ return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
+ else
+ return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
+}
+
+#define PSYCHO_IMAP_SCSI 0x1000UL
+#define PSYCHO_IMAP_ETH 0x1008UL
+#define PSYCHO_IMAP_BPP 0x1010UL
+#define PSYCHO_IMAP_AU_REC 0x1018UL
+#define PSYCHO_IMAP_AU_PLAY 0x1020UL
+#define PSYCHO_IMAP_PFAIL 0x1028UL
+#define PSYCHO_IMAP_KMS 0x1030UL
+#define PSYCHO_IMAP_FLPY 0x1038UL
+#define PSYCHO_IMAP_SHW 0x1040UL
+#define PSYCHO_IMAP_KBD 0x1048UL
+#define PSYCHO_IMAP_MS 0x1050UL
+#define PSYCHO_IMAP_SER 0x1058UL
+#define PSYCHO_IMAP_TIM0 0x1060UL
+#define PSYCHO_IMAP_TIM1 0x1068UL
+#define PSYCHO_IMAP_UE 0x1070UL
+#define PSYCHO_IMAP_CE 0x1078UL
+#define PSYCHO_IMAP_A_ERR 0x1080UL
+#define PSYCHO_IMAP_B_ERR 0x1088UL
+#define PSYCHO_IMAP_PMGMT 0x1090UL
+#define PSYCHO_IMAP_GFX 0x1098UL
+#define PSYCHO_IMAP_EUPA 0x10a0UL
+
+static unsigned long __psycho_onboard_imap_off[] = {
+/*0x20*/ PSYCHO_IMAP_SCSI,
+/*0x21*/ PSYCHO_IMAP_ETH,
+/*0x22*/ PSYCHO_IMAP_BPP,
+/*0x23*/ PSYCHO_IMAP_AU_REC,
+/*0x24*/ PSYCHO_IMAP_AU_PLAY,
+/*0x25*/ PSYCHO_IMAP_PFAIL,
+/*0x26*/ PSYCHO_IMAP_KMS,
+/*0x27*/ PSYCHO_IMAP_FLPY,
+/*0x28*/ PSYCHO_IMAP_SHW,
+/*0x29*/ PSYCHO_IMAP_KBD,
+/*0x2a*/ PSYCHO_IMAP_MS,
+/*0x2b*/ PSYCHO_IMAP_SER,
+/*0x2c*/ PSYCHO_IMAP_TIM0,
+/*0x2d*/ PSYCHO_IMAP_TIM1,
+/*0x2e*/ PSYCHO_IMAP_UE,
+/*0x2f*/ PSYCHO_IMAP_CE,
+/*0x30*/ PSYCHO_IMAP_A_ERR,
+/*0x31*/ PSYCHO_IMAP_B_ERR,
+/*0x32*/ PSYCHO_IMAP_PMGMT
+};
+#define PSYCHO_ONBOARD_IRQ_BASE 0x20
+#define PSYCHO_ONBOARD_IRQ_LAST 0x32
+#define psycho_onboard_imap_offset(__ino) \
+ __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
+
+#define PSYCHO_ICLR_A_SLOT0 0x1400UL
+#define PSYCHO_ICLR_SCSI 0x1800UL
+
+#define psycho_iclr_offset(ino) \
+ ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \
+ (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
+
+static unsigned int psycho_irq_build(struct device_node *dp,
+ unsigned int ino,
+ void *_data)
+{
+ unsigned long controller_regs = (unsigned long) _data;
+ unsigned long imap, iclr;
+ unsigned long imap_off, iclr_off;
+ int inofixup = 0;
+
+ ino &= 0x3f;
+ if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
+ /* PCI slot */
+ imap_off = psycho_pcislot_imap_offset(ino);
+ } else {
+ /* Onboard device */
+ if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
+ prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
+ prom_halt();
+ }
+ imap_off = psycho_onboard_imap_offset(ino);
+ }
+
+ /* Now build the IRQ bucket. */
+ imap = controller_regs + imap_off;
+ imap += 4;
+
+ iclr_off = psycho_iclr_offset(ino);
+ iclr = controller_regs + iclr_off;
+ iclr += 4;
+
+ if ((ino & 0x20) == 0)
+ inofixup = ino & 0x03;
+
+ return build_irq(inofixup, iclr, imap);
+}
+
+static void psycho_irq_trans_init(struct device_node *dp)
+{
+ struct linux_prom64_registers *regs;
+
+ dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
+ dp->irq_trans->irq_build = psycho_irq_build;
+
+ regs = of_get_property(dp, "reg", NULL);
+ dp->irq_trans->data = (void *) regs[2].phys_addr;
+}
+
+#define sabre_read(__reg) \
+({ u64 __ret; \
+ __asm__ __volatile__("ldxa [%1] %2, %0" \
+ : "=r" (__ret) \
+ : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
+ : "memory"); \
+ __ret; \
+})
+
+struct sabre_irq_data {
+ unsigned long controller_regs;
+ unsigned int pci_first_busno;
+};
+#define SABRE_CONFIGSPACE 0x001000000UL
+#define SABRE_WRSYNC 0x1c20UL
+
+#define SABRE_CONFIG_BASE(CONFIG_SPACE) \
+ (CONFIG_SPACE | (1UL << 24))
+#define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG) \
+ (((unsigned long)(BUS) << 16) | \
+ ((unsigned long)(DEVFN) << 8) | \
+ ((unsigned long)(REG)))
+
+/* When a device lives behind a bridge deeper in the PCI bus topology
+ * than APB, a special sequence must run to make sure all pending DMA
+ * transfers at the time of IRQ delivery are visible in the coherency
+ * domain by the cpu. This sequence is to perform a read on the far
+ * side of the non-APB bridge, then perform a read of Sabre's DMA
+ * write-sync register.
+ */
+static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
+{
+ unsigned int phys_hi = (unsigned int) (unsigned long) _arg1;
+ struct sabre_irq_data *irq_data = _arg2;
+ unsigned long controller_regs = irq_data->controller_regs;
+ unsigned long sync_reg = controller_regs + SABRE_WRSYNC;
+ unsigned long config_space = controller_regs + SABRE_CONFIGSPACE;
+ unsigned int bus, devfn;
+ u16 _unused;
+
+ config_space = SABRE_CONFIG_BASE(config_space);
+
+ bus = (phys_hi >> 16) & 0xff;
+ devfn = (phys_hi >> 8) & 0xff;
+
+ config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00);
+
+ __asm__ __volatile__("membar #Sync\n\t"
+ "lduha [%1] %2, %0\n\t"
+ "membar #Sync"
+ : "=r" (_unused)
+ : "r" ((u16 *) config_space),
+ "i" (ASI_PHYS_BYPASS_EC_E_L)
+ : "memory");
+
+ sabre_read(sync_reg);
+}
+
+#define SABRE_IMAP_A_SLOT0 0x0c00UL
+#define SABRE_IMAP_B_SLOT0 0x0c20UL
+#define SABRE_IMAP_SCSI 0x1000UL
+#define SABRE_IMAP_ETH 0x1008UL
+#define SABRE_IMAP_BPP 0x1010UL
+#define SABRE_IMAP_AU_REC 0x1018UL
+#define SABRE_IMAP_AU_PLAY 0x1020UL
+#define SABRE_IMAP_PFAIL 0x1028UL
+#define SABRE_IMAP_KMS 0x1030UL
+#define SABRE_IMAP_FLPY 0x1038UL
+#define SABRE_IMAP_SHW 0x1040UL
+#define SABRE_IMAP_KBD 0x1048UL
+#define SABRE_IMAP_MS 0x1050UL
+#define SABRE_IMAP_SER 0x1058UL
+#define SABRE_IMAP_UE 0x1070UL
+#define SABRE_IMAP_CE 0x1078UL
+#define SABRE_IMAP_PCIERR 0x1080UL
+#define SABRE_IMAP_GFX 0x1098UL
+#define SABRE_IMAP_EUPA 0x10a0UL
+#define SABRE_ICLR_A_SLOT0 0x1400UL
+#define SABRE_ICLR_B_SLOT0 0x1480UL
+#define SABRE_ICLR_SCSI 0x1800UL
+#define SABRE_ICLR_ETH 0x1808UL
+#define SABRE_ICLR_BPP 0x1810UL
+#define SABRE_ICLR_AU_REC 0x1818UL
+#define SABRE_ICLR_AU_PLAY 0x1820UL
+#define SABRE_ICLR_PFAIL 0x1828UL
+#define SABRE_ICLR_KMS 0x1830UL
+#define SABRE_ICLR_FLPY 0x1838UL
+#define SABRE_ICLR_SHW 0x1840UL
+#define SABRE_ICLR_KBD 0x1848UL
+#define SABRE_ICLR_MS 0x1850UL
+#define SABRE_ICLR_SER 0x1858UL
+#define SABRE_ICLR_UE 0x1870UL
+#define SABRE_ICLR_CE 0x1878UL
+#define SABRE_ICLR_PCIERR 0x1880UL
+
+static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
+{
+ unsigned int bus = (ino & 0x10) >> 4;
+ unsigned int slot = (ino & 0x0c) >> 2;
+
+ if (bus == 0)
+ return SABRE_IMAP_A_SLOT0 + (slot * 8);
+ else
+ return SABRE_IMAP_B_SLOT0 + (slot * 8);
+}
+
+static unsigned long __sabre_onboard_imap_off[] = {
+/*0x20*/ SABRE_IMAP_SCSI,
+/*0x21*/ SABRE_IMAP_ETH,
+/*0x22*/ SABRE_IMAP_BPP,
+/*0x23*/ SABRE_IMAP_AU_REC,
+/*0x24*/ SABRE_IMAP_AU_PLAY,
+/*0x25*/ SABRE_IMAP_PFAIL,
+/*0x26*/ SABRE_IMAP_KMS,
+/*0x27*/ SABRE_IMAP_FLPY,
+/*0x28*/ SABRE_IMAP_SHW,
+/*0x29*/ SABRE_IMAP_KBD,
+/*0x2a*/ SABRE_IMAP_MS,
+/*0x2b*/ SABRE_IMAP_SER,
+/*0x2c*/ 0 /* reserved */,
+/*0x2d*/ 0 /* reserved */,
+/*0x2e*/ SABRE_IMAP_UE,
+/*0x2f*/ SABRE_IMAP_CE,
+/*0x30*/ SABRE_IMAP_PCIERR,
+};
+#define SABRE_ONBOARD_IRQ_BASE 0x20
+#define SABRE_ONBOARD_IRQ_LAST 0x30
+#define sabre_onboard_imap_offset(__ino) \
+ __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
+
+#define sabre_iclr_offset(ino) \
+ ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \
+ (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
+
+static unsigned int sabre_irq_build(struct device_node *dp,
+ unsigned int ino,
+ void *_data)
+{
+ struct sabre_irq_data *irq_data = _data;
+ unsigned long controller_regs = irq_data->controller_regs;
+ struct linux_prom_pci_registers *regs;
+ unsigned long imap, iclr;
+ unsigned long imap_off, iclr_off;
+ int inofixup = 0;
+ int virt_irq;
+
+ ino &= 0x3f;
+ if (ino < SABRE_ONBOARD_IRQ_BASE) {
+ /* PCI slot */
+ imap_off = sabre_pcislot_imap_offset(ino);
+ } else {
+ /* onboard device */
+ if (ino > SABRE_ONBOARD_IRQ_LAST) {
+ prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
+ prom_halt();
+ }
+ imap_off = sabre_onboard_imap_offset(ino);
+ }
+
+ /* Now build the IRQ bucket. */
+ imap = controller_regs + imap_off;
+ imap += 4;
+
+ iclr_off = sabre_iclr_offset(ino);
+ iclr = controller_regs + iclr_off;
+ iclr += 4;
+
+ if ((ino & 0x20) == 0)
+ inofixup = ino & 0x03;
+
+ virt_irq = build_irq(inofixup, iclr, imap);
+
+ regs = of_get_property(dp, "reg", NULL);
+ if (regs &&
+ ((regs->phys_hi >> 16) & 0xff) != irq_data->pci_first_busno) {
+ irq_install_pre_handler(virt_irq,
+ sabre_wsync_handler,
+ (void *) (long) regs->phys_hi,
+ (void *)
+ controller_regs +
+ SABRE_WRSYNC);
+ }
+
+ return virt_irq;
+}
+
+static void sabre_irq_trans_init(struct device_node *dp)
+{
+ struct linux_prom64_registers *regs;
+ struct sabre_irq_data *irq_data;
+ u32 *busrange;
+
+ dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
+ dp->irq_trans->irq_build = sabre_irq_build;
+
+ irq_data = prom_early_alloc(sizeof(struct sabre_irq_data));
+
+ regs = of_get_property(dp, "reg", NULL);
+ irq_data->controller_regs = regs[0].phys_addr;
+
+ busrange = of_get_property(dp, "bus-range", NULL);
+ irq_data->pci_first_busno = busrange[0];
+
+ dp->irq_trans->data = irq_data;
+}
+
+/* SCHIZO interrupt mapping support. Unlike Psycho, for this controller the
+ * imap/iclr registers are per-PBM.
+ */
+#define SCHIZO_IMAP_BASE 0x1000UL
+#define SCHIZO_ICLR_BASE 0x1400UL
+
+static unsigned long schizo_imap_offset(unsigned long ino)
+{
+ return SCHIZO_IMAP_BASE + (ino * 8UL);
+}
+
+static unsigned long schizo_iclr_offset(unsigned long ino)
+{
+ return SCHIZO_ICLR_BASE + (ino * 8UL);
+}
+
+static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs,
+ unsigned int ino)
+{
+ return pbm_regs + schizo_iclr_offset(ino) + 4;
+}
+
+static unsigned long schizo_ino_to_imap(unsigned long pbm_regs,
+ unsigned int ino)
+{
+ return pbm_regs + schizo_imap_offset(ino) + 4;
+}
+
+#define schizo_read(__reg) \
+({ u64 __ret; \
+ __asm__ __volatile__("ldxa [%1] %2, %0" \
+ : "=r" (__ret) \
+ : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
+ : "memory"); \
+ __ret; \
+})
+#define schizo_write(__reg, __val) \
+ __asm__ __volatile__("stxa %0, [%1] %2" \
+ : /* no outputs */ \
+ : "r" (__val), "r" (__reg), \
+ "i" (ASI_PHYS_BYPASS_EC_E) \
+ : "memory")
+
+static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
+{
+ unsigned long sync_reg = (unsigned long) _arg2;
+ u64 mask = 1UL << (ino & IMAP_INO);
+ u64 val;
+ int limit;
+
+ schizo_write(sync_reg, mask);
+
+ limit = 100000;
+ val = 0;
+ while (--limit) {
+ val = schizo_read(sync_reg);
+ if (!(val & mask))
+ break;
+ }
+ if (limit <= 0) {
+ printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
+ val, mask);
+ }
+
+ if (_arg1) {
+ static unsigned char cacheline[64]
+ __attribute__ ((aligned (64)));
+
+ __asm__ __volatile__("rd %%fprs, %0\n\t"
+ "or %0, %4, %1\n\t"
+ "wr %1, 0x0, %%fprs\n\t"
+ "stda %%f0, [%5] %6\n\t"
+ "wr %0, 0x0, %%fprs\n\t"
+ "membar #Sync"
+ : "=&r" (mask), "=&r" (val)
+ : "0" (mask), "1" (val),
+ "i" (FPRS_FEF), "r" (&cacheline[0]),
+ "i" (ASI_BLK_COMMIT_P));
+ }
+}
+
+struct schizo_irq_data {
+ unsigned long pbm_regs;
+ unsigned long sync_reg;
+ u32 portid;
+ int chip_version;
+};
+
+static unsigned int schizo_irq_build(struct device_node *dp,
+ unsigned int ino,
+ void *_data)
+{
+ struct schizo_irq_data *irq_data = _data;
+ unsigned long pbm_regs = irq_data->pbm_regs;
+ unsigned long imap, iclr;
+ int ign_fixup;
+ int virt_irq;
+ int is_tomatillo;
+
+ ino &= 0x3f;
+
+ /* Now build the IRQ bucket. */
+ imap = schizo_ino_to_imap(pbm_regs, ino);
+ iclr = schizo_ino_to_iclr(pbm_regs, ino);
+
+ /* On Schizo, no inofixup occurs. This is because each
+ * INO has it's own IMAP register. On Psycho and Sabre
+ * there is only one IMAP register for each PCI slot even
+ * though four different INOs can be generated by each
+ * PCI slot.
+ *
+ * But, for JBUS variants (essentially, Tomatillo), we have
+ * to fixup the lowest bit of the interrupt group number.
+ */
+ ign_fixup = 0;
+
+ is_tomatillo = (irq_data->sync_reg != 0UL);
+
+ if (is_tomatillo) {
+ if (irq_data->portid & 1)
+ ign_fixup = (1 << 6);
+ }
+
+ virt_irq = build_irq(ign_fixup, iclr, imap);
+
+ if (is_tomatillo) {
+ irq_install_pre_handler(virt_irq,
+ tomatillo_wsync_handler,
+ ((irq_data->chip_version <= 4) ?
+ (void *) 1 : (void *) 0),
+ (void *) irq_data->sync_reg);
+ }
+
+ return virt_irq;
+}
+
+static void schizo_irq_trans_init(struct device_node *dp)
+{
+ struct linux_prom64_registers *regs;
+ struct schizo_irq_data *irq_data;
+
+ dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
+ dp->irq_trans->irq_build = schizo_irq_build;
+
+ irq_data = prom_early_alloc(sizeof(struct schizo_irq_data));
+
+ regs = of_get_property(dp, "reg", NULL);
+ dp->irq_trans->data = irq_data;
+
+ irq_data->pbm_regs = regs[0].phys_addr;
+ irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL;
+ irq_data->portid = of_getintprop_default(dp, "portid", 0);
+ irq_data->chip_version = of_getintprop_default(dp, "version#", 0);
+}
+
+static unsigned int pci_sun4v_irq_build(struct device_node *dp,
+ unsigned int devino,
+ void *_data)
+{
+ u32 devhandle = (u32) (unsigned long) _data;
+
+ return sun4v_build_irq(devhandle, devino);
+}
+
+static void pci_sun4v_irq_trans_init(struct device_node *dp)
+{
+ struct linux_prom64_registers *regs;
+
+ dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
+ dp->irq_trans->irq_build = pci_sun4v_irq_build;
+
+ regs = of_get_property(dp, "reg", NULL);
+ dp->irq_trans->data = (void *) (unsigned long)
+ ((regs->phys_addr >> 32UL) & 0x0fffffff);
+}
+#endif /* CONFIG_PCI */
+
+#ifdef CONFIG_SBUS
+/* INO number to IMAP register offset for SYSIO external IRQ's.
+ * This should conform to both Sunfire/Wildfire server and Fusion
+ * desktop designs.
+ */
+#define SYSIO_IMAP_SLOT0 0x2c04UL
+#define SYSIO_IMAP_SLOT1 0x2c0cUL
+#define SYSIO_IMAP_SLOT2 0x2c14UL
+#define SYSIO_IMAP_SLOT3 0x2c1cUL
+#define SYSIO_IMAP_SCSI 0x3004UL
+#define SYSIO_IMAP_ETH 0x300cUL
+#define SYSIO_IMAP_BPP 0x3014UL
+#define SYSIO_IMAP_AUDIO 0x301cUL
+#define SYSIO_IMAP_PFAIL 0x3024UL
+#define SYSIO_IMAP_KMS 0x302cUL
+#define SYSIO_IMAP_FLPY 0x3034UL
+#define SYSIO_IMAP_SHW 0x303cUL
+#define SYSIO_IMAP_KBD 0x3044UL
+#define SYSIO_IMAP_MS 0x304cUL
+#define SYSIO_IMAP_SER 0x3054UL
+#define SYSIO_IMAP_TIM0 0x3064UL
+#define SYSIO_IMAP_TIM1 0x306cUL
+#define SYSIO_IMAP_UE 0x3074UL
+#define SYSIO_IMAP_CE 0x307cUL
+#define SYSIO_IMAP_SBERR 0x3084UL
+#define SYSIO_IMAP_PMGMT 0x308cUL
+#define SYSIO_IMAP_GFX 0x3094UL
+#define SYSIO_IMAP_EUPA 0x309cUL
+
+#define bogon ((unsigned long) -1)
+static unsigned long sysio_irq_offsets[] = {
+ /* SBUS Slot 0 --> 3, level 1 --> 7 */
+ SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
+ SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
+ SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
+ SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
+ SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
+ SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
+ SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
+ SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
+
+ /* Onboard devices (not relevant/used on SunFire). */
+ SYSIO_IMAP_SCSI,
+ SYSIO_IMAP_ETH,
+ SYSIO_IMAP_BPP,
+ bogon,
+ SYSIO_IMAP_AUDIO,
+ SYSIO_IMAP_PFAIL,
+ bogon,
+ bogon,
+ SYSIO_IMAP_KMS,
+ SYSIO_IMAP_FLPY,
+ SYSIO_IMAP_SHW,
+ SYSIO_IMAP_KBD,
+ SYSIO_IMAP_MS,
+ SYSIO_IMAP_SER,
+ bogon,
+ bogon,
+ SYSIO_IMAP_TIM0,
+ SYSIO_IMAP_TIM1,
+ bogon,
+ bogon,
+ SYSIO_IMAP_UE,
+ SYSIO_IMAP_CE,
+ SYSIO_IMAP_SBERR,
+ SYSIO_IMAP_PMGMT,
+};
+
+#undef bogon
+
+#define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
+
+/* Convert Interrupt Mapping register pointer to associated
+ * Interrupt Clear register pointer, SYSIO specific version.
+ */
+#define SYSIO_ICLR_UNUSED0 0x3400UL
+#define SYSIO_ICLR_SLOT0 0x340cUL
+#define SYSIO_ICLR_SLOT1 0x344cUL
+#define SYSIO_ICLR_SLOT2 0x348cUL
+#define SYSIO_ICLR_SLOT3 0x34ccUL
+static unsigned long sysio_imap_to_iclr(unsigned long imap)
+{
+ unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
+ return imap + diff;
+}
+
+static unsigned int sbus_of_build_irq(struct device_node *dp,
+ unsigned int ino,
+ void *_data)
+{
+ unsigned long reg_base = (unsigned long) _data;
+ struct linux_prom_registers *regs;
+ unsigned long imap, iclr;
+ int sbus_slot = 0;
+ int sbus_level = 0;
+
+ ino &= 0x3f;
+
+ regs = of_get_property(dp, "reg", NULL);
+ if (regs)
+ sbus_slot = regs->which_io;
+
+ if (ino < 0x20)
+ ino += (sbus_slot * 8);
+
+ imap = sysio_irq_offsets[ino];
+ if (imap == ((unsigned long)-1)) {
+ prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
+ ino);
+ prom_halt();
+ }
+ imap += reg_base;
+
+ /* SYSIO inconsistency. For external SLOTS, we have to select
+ * the right ICLR register based upon the lower SBUS irq level
+ * bits.
+ */
+ if (ino >= 0x20) {
+ iclr = sysio_imap_to_iclr(imap);
+ } else {
+ sbus_level = ino & 0x7;
+
+ switch(sbus_slot) {
+ case 0:
+ iclr = reg_base + SYSIO_ICLR_SLOT0;
+ break;
+ case 1:
+ iclr = reg_base + SYSIO_ICLR_SLOT1;
+ break;
+ case 2:
+ iclr = reg_base + SYSIO_ICLR_SLOT2;
+ break;
+ default:
+ case 3:
+ iclr = reg_base + SYSIO_ICLR_SLOT3;
+ break;
+ };
+
+ iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
+ }
+ return build_irq(sbus_level, iclr, imap);
+}
+
+static void sbus_irq_trans_init(struct device_node *dp)
+{
+ struct linux_prom64_registers *regs;
+
+ dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
+ dp->irq_trans->irq_build = sbus_of_build_irq;
+
+ regs = of_get_property(dp, "reg", NULL);
+ dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr;
+}
+#endif /* CONFIG_SBUS */
+
+
+static unsigned int central_build_irq(struct device_node *dp,
+ unsigned int ino,
+ void *_data)
+{
+ struct device_node *central_dp = _data;
+ struct of_device *central_op = of_find_device_by_node(central_dp);
+ struct resource *res;
+ unsigned long imap, iclr;
+ u32 tmp;
+
+ if (!strcmp(dp->name, "eeprom")) {
+ res = ¢ral_op->resource[5];
+ } else if (!strcmp(dp->name, "zs")) {
+ res = ¢ral_op->resource[4];
+ } else if (!strcmp(dp->name, "clock-board")) {
+ res = ¢ral_op->resource[3];
+ } else {
+ return ino;
+ }
+
+ imap = res->start + 0x00UL;
+ iclr = res->start + 0x10UL;
+
+ /* Set the INO state to idle, and disable. */
+ upa_writel(0, iclr);
+ upa_readl(iclr);
+
+ tmp = upa_readl(imap);
+ tmp &= ~0x80000000;
+ upa_writel(tmp, imap);
+
+ return build_irq(0, iclr, imap);
+}
+
+static void central_irq_trans_init(struct device_node *dp)
+{
+ dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
+ dp->irq_trans->irq_build = central_build_irq;
+
+ dp->irq_trans->data = dp;
+}
+
+struct irq_trans {
+ const char *name;
+ void (*init)(struct device_node *);
+};
+
+#ifdef CONFIG_PCI
+static struct irq_trans pci_irq_trans_table[] = {
+ { "SUNW,sabre", sabre_irq_trans_init },
+ { "pci108e,a000", sabre_irq_trans_init },
+ { "pci108e,a001", sabre_irq_trans_init },
+ { "SUNW,psycho", psycho_irq_trans_init },
+ { "pci108e,8000", psycho_irq_trans_init },
+ { "SUNW,schizo", schizo_irq_trans_init },
+ { "pci108e,8001", schizo_irq_trans_init },
+ { "SUNW,schizo+", schizo_irq_trans_init },
+ { "pci108e,8002", schizo_irq_trans_init },
+ { "SUNW,tomatillo", schizo_irq_trans_init },
+ { "pci108e,a801", schizo_irq_trans_init },
+ { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init },
+};
+#endif
+
+static void irq_trans_init(struct device_node *dp)
+{
+ const char *model;
+ int i;
+
+ model = of_get_property(dp, "model", NULL);
+ if (!model)
+ model = of_get_property(dp, "compatible", NULL);
+ if (!model)
+ return;
+
+#ifdef CONFIG_PCI
+ for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) {
+ struct irq_trans *t = &pci_irq_trans_table[i];
+
+ if (!strcmp(model, t->name))
+ return t->init(dp);
+ }
+#endif
+#ifdef CONFIG_SBUS
+ if (!strcmp(dp->name, "sbus") ||
+ !strcmp(dp->name, "sbi"))
+ return sbus_irq_trans_init(dp);
+#endif
+ if (!strcmp(dp->name, "central"))
+ return central_irq_trans_init(dp->child);
+}
+
static int is_root_node(const struct device_node *dp)
{
if (!dp)
dp->type = get_one_property(node, "device_type");
dp->node = node;
- /* Build interrupts later... */
-
dp->properties = build_prop_list(node);
+ irq_trans_init(dp);
+
return dp;
}
/* Now some Xfire specific grot... */
if (this_is_starfire)
- sbus->starfire_cookie = starfire_hookup(sbus->portid);
- else
- sbus->starfire_cookie = NULL;
+ starfire_hookup(sbus->portid);
sysio_register_error_handlers(sbus);
}
void __init sbus_arch_postinit(void)
{
extern void firetruck_init(void);
- extern void clock_probe(void);
firetruck_init();
- clock_probe();
}
static struct starfire_irqinfo *sflist = NULL;
/* Beam me up Scott(McNeil)y... */
-void *starfire_hookup(int upaid)
+void starfire_hookup(int upaid)
{
struct starfire_irqinfo *p;
unsigned long treg_base, hwmid, i;
p->upaid = upaid;
p->next = sflist;
sflist = p;
-
- return (void *) p;
}
unsigned int starfire_translate(unsigned long imap,
* simple, it hopefully works in most obvious cases.. Easy to
* fool it, but this should catch most mistakes.
*/
- freepages = get_page_cache_size();
+ freepages = global_page_state(NR_FILE_PAGES);
freepages >>= 1;
freepages += nr_free_pages();
freepages += nr_swap_pages;
#include <asm/timer.h>
#include <asm/irq.h>
#include <asm/io.h>
-#include <asm/sbus.h>
-#include <asm/fhc.h>
-#include <asm/pbm.h>
-#include <asm/ebus.h>
-#include <asm/isa.h>
+#include <asm/prom.h>
+#include <asm/of_device.h>
#include <asm/starfire.h>
#include <asm/smp.h>
#include <asm/sections.h>
return 1;
}
-static void __init __clock_assign_common(void __iomem *addr, char *model)
+static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
{
- if (model[5] == '0' && model[6] == '2') {
- mstk48t02_regs = addr;
- } else if(model[5] == '0' && model[6] == '8') {
- mstk48t08_regs = addr;
- mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
- } else {
- mstk48t59_regs = addr;
- mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
- }
-}
-
-static void __init clock_assign_clk_reg(struct linux_prom_registers *clk_reg,
- char *model)
-{
- unsigned long addr;
-
- addr = ((unsigned long) clk_reg[0].phys_addr |
- (((unsigned long) clk_reg[0].which_io) << 32UL));
-
- __clock_assign_common((void __iomem *) addr, model);
-}
-
-static int __init clock_probe_central(void)
-{
- struct linux_prom_registers clk_reg[2], *pr;
- struct device_node *dp;
- char *model;
+ struct device_node *dp = op->node;
+ char *model = of_get_property(dp, "model", NULL);
+ unsigned long size, flags;
+ void __iomem *regs;
- if (!central_bus)
- return 0;
-
- /* Get Central FHC's prom node. */
- dp = central_bus->child->prom_node;
-
- /* Then get the first child device below it. */
- dp = dp->child;
-
- while (dp) {
- model = of_get_property(dp, "model", NULL);
- if (!model || !clock_model_matches(model))
- goto next_sibling;
-
- pr = of_get_property(dp, "reg", NULL);
- memcpy(clk_reg, pr, sizeof(clk_reg));
-
- apply_fhc_ranges(central_bus->child, clk_reg, 1);
- apply_central_ranges(central_bus, clk_reg, 1);
-
- clock_assign_clk_reg(clk_reg, model);
- return 1;
+ if (!model || !clock_model_matches(model))
+ return -ENODEV;
- next_sibling:
- dp = dp->sibling;
- }
+ /* On an Enterprise system there can be multiple mostek clocks.
+ * We should only match the one that is on the central FHC bus.
+ */
+ if (!strcmp(dp->parent->name, "fhc") &&
+ strcmp(dp->parent->parent->name, "central") != 0)
+ return -ENODEV;
- return 0;
-}
+ size = (op->resource[0].end - op->resource[0].start) + 1;
+ regs = of_ioremap(&op->resource[0], 0, size, "clock");
+ if (!regs)
+ return -ENOMEM;
-#ifdef CONFIG_PCI
-static void __init clock_isa_ebus_assign_regs(struct resource *res, char *model)
-{
if (!strcmp(model, "ds1287") ||
!strcmp(model, "m5819") ||
!strcmp(model, "m5819p") ||
!strcmp(model, "m5823")) {
- ds1287_regs = res->start;
+ ds1287_regs = (unsigned long) regs;
+ } else if (model[5] == '0' && model[6] == '2') {
+ mstk48t02_regs = regs;
+ } else if(model[5] == '0' && model[6] == '8') {
+ mstk48t08_regs = regs;
+ mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
} else {
- mstk48t59_regs = (void __iomem *) res->start;
+ mstk48t59_regs = regs;
mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
}
-}
-
-static int __init clock_probe_one_ebus_dev(struct linux_ebus_device *edev)
-{
- struct device_node *dp = edev->prom_node;
- char *model;
-
- model = of_get_property(dp, "model", NULL);
- if (!clock_model_matches(model))
- return 0;
- clock_isa_ebus_assign_regs(&edev->resource[0], model);
+ printk(KERN_INFO "%s: Clock regs at %p\n", dp->full_name, regs);
- return 1;
-}
-
-static int __init clock_probe_ebus(void)
-{
- struct linux_ebus *ebus;
+ local_irq_save(flags);
- for_each_ebus(ebus) {
- struct linux_ebus_device *edev;
+ if (mstk48t02_regs != NULL) {
+ /* Report a low battery voltage condition. */
+ if (has_low_battery())
+ prom_printf("NVRAM: Low battery voltage!\n");
- for_each_ebusdev(edev, ebus) {
- if (clock_probe_one_ebus_dev(edev))
- return 1;
- }
+ /* Kick start the clock if it is completely stopped. */
+ if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
+ kick_start_clock();
}
- return 0;
-}
-
-static int __init clock_probe_one_isa_dev(struct sparc_isa_device *idev)
-{
- struct device_node *dp = idev->prom_node;
- char *model;
-
- model = of_get_property(dp, "model", NULL);
- if (!clock_model_matches(model))
- return 0;
-
- clock_isa_ebus_assign_regs(&idev->resource, model);
-
- return 1;
-}
-
-static int __init clock_probe_isa(void)
-{
- struct sparc_isa_bridge *isa_br;
-
- for_each_isa(isa_br) {
- struct sparc_isa_device *isa_dev;
-
- for_each_isadev(isa_dev, isa_br) {
- if (clock_probe_one_isa_dev(isa_dev))
- return 1;
- }
- }
+ set_system_time();
+
+ local_irq_restore(flags);
return 0;
}
-#endif /* CONFIG_PCI */
-
-#ifdef CONFIG_SBUS
-static int __init clock_probe_one_sbus_dev(struct sbus_bus *sbus, struct sbus_dev *sdev)
-{
- struct resource *res;
- char model[64];
- void __iomem *addr;
-
- prom_getstring(sdev->prom_node, "model", model, sizeof(model));
- if (!clock_model_matches(model))
- return 0;
-
- res = &sdev->resource[0];
- addr = sbus_ioremap(res, 0, 0x800UL, "eeprom");
- __clock_assign_common(addr, model);
-
- return 1;
-}
-
-static int __init clock_probe_sbus(void)
-{
- struct sbus_bus *sbus;
-
- for_each_sbus(sbus) {
- struct sbus_dev *sdev;
-
- for_each_sbusdev(sdev, sbus) {
- if (clock_probe_one_sbus_dev(sbus, sdev))
- return 1;
- }
- }
+static struct of_device_id clock_match[] = {
+ {
+ .name = "eeprom",
+ },
+ {
+ .name = "rtc",
+ },
+ {},
+};
- return 0;
-}
-#endif
+static struct of_platform_driver clock_driver = {
+ .name = "clock",
+ .match_table = clock_match,
+ .probe = clock_probe,
+};
-void __init clock_probe(void)
+static int __init clock_init(void)
{
- static int invoked;
- unsigned long flags;
-
- if (invoked)
- return;
- invoked = 1;
-
if (this_is_starfire) {
xtime.tv_sec = starfire_get_time();
xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
set_normalized_timespec(&wall_to_monotonic,
-xtime.tv_sec, -xtime.tv_nsec);
- return;
+ return 0;
}
if (tlb_type == hypervisor) {
xtime.tv_sec = hypervisor_get_time();
xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
set_normalized_timespec(&wall_to_monotonic,
-xtime.tv_sec, -xtime.tv_nsec);
- return;
- }
-
- /* Check FHC Central then EBUSs then ISA bridges then SBUSs.
- * That way we handle the presence of multiple properly.
- *
- * As a special case, machines with Central must provide the
- * timer chip there.
- */
- if (!clock_probe_central() &&
-#ifdef CONFIG_PCI
- !clock_probe_ebus() &&
- !clock_probe_isa() &&
-#endif
-#ifdef CONFIG_SBUS
- !clock_probe_sbus()
-#endif
- ) {
- printk(KERN_WARNING "No clock chip found.\n");
- return;
- }
-
- local_irq_save(flags);
-
- if (mstk48t02_regs != NULL) {
- /* Report a low battery voltage condition. */
- if (has_low_battery())
- prom_printf("NVRAM: Low battery voltage!\n");
-
- /* Kick start the clock if it is completely stopped. */
- if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
- kick_start_clock();
+ return 0;
}
- set_system_time();
-
- local_irq_restore(flags);
+ return of_register_driver(&clock_driver, &of_bus_type);
}
+/* Must be after subsys_initcall() so that busses are probed. Must
+ * be before device_initcall() because things like the RTC driver
+ * need to see the clock registers.
+ */
+fs_initcall(clock_init);
+
/* This is gets the master TICK_INT timer going. */
static unsigned long sparc64_init_timers(void)
{
#include <linux/smp.h>
#include <linux/smp_lock.h>
#include <linux/bitops.h>
+#include <linux/kallsyms.h>
#include <asm/fpumacro.h>
/* #define DEBUG_MNA */
if (count < 5) {
last_time = jiffies;
count++;
- printk("Kernel unaligned access at TPC[%lx]\n", regs->tpc);
+ printk("Kernel unaligned access at TPC[%lx] ", regs->tpc);
+ print_symbol("%s\n", regs->tpc);
}
if (!ok_for_kernel(insn) || dir == both) {
#We #undef __x86_64__ for kernelspace, not for userspace where
#it's needed for headers to work!
-CFLAGS += -U__$(SUBARCH)__ -fno-builtin
-USER_CFLAGS += -fno-builtin
+CFLAGS += -U__$(SUBARCH)__ -fno-builtin -m64
+USER_CFLAGS += -fno-builtin -m64
CHECKFLAGS += -m64
+AFLAGS += -m64
+LDFLAGS += -m elf_x86_64
ELF_ARCH := i386:x86-64
ELF_FORMAT := elf64-x86-64
# Not on all 64-bit distros /lib is a symlink to /lib64. PLD is an example.
LINK-$(CONFIG_LD_SCRIPT_DYN) += -Wl,-rpath,/lib64
+LINK-y += -m64
/*
* Don't register by default -- as this registeres very early in the
- * boot process it becomes the default console. And as this isn't a
- * real tty driver init isn't able to open /dev/console then.
- *
- * In most cases this isn't what you want ...
+ * boot process it becomes the default console.
*/
static int use_stderr_console = 0;
return 1;
}
__setup("stderr=", stderr_setup);
+
+/* The previous behavior of not unregistering led to /dev/console being
+ * impossible to open. My FC5 filesystem started having init die, and the
+ * system panicing because of this. Unregistering causes the real
+ * console to become the default console, and /dev/console can then be
+ * opened. Making this an initcall makes this happen late enough that
+ * there is no added value in dumping everything to stderr, and the
+ * normal console is good enough to show you all available output.
+ */
+static int __init unregister_stderr(void)
+{
+ unregister_console(&stderr_console);
+
+ return 0;
+}
+
+__initcall(unregister_stderr);
free_page(mmu->id.stack);
pte_lock_deinit(virt_to_page(mmu->last_page_table));
pte_free_kernel((pte_t *) mmu->last_page_table);
- dec_page_state(nr_page_table_pages);
+ dec_zone_page_state(virt_to_page(mmu->last_page_table), NR_PAGETABLE);
#ifdef CONFIG_3_LEVEL_PGTABLES
pmd_free((pmd_t *) mmu->last_pmd);
#endif
+++ /dev/null
-/*
- * Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com)
- * Licensed under the GPL
- */
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include <time.h>
-#include <sys/time.h>
-#include <signal.h>
-#include <errno.h>
-#include "user_util.h"
-#include "kern_util.h"
-#include "user.h"
-#include "process.h"
-#include "time_user.h"
-#include "kern_constants.h"
-#include "os.h"
-
-/* XXX This really needs to be declared and initialized in a kernel file since
- * it's in <linux/time.h>
- */
-extern struct timespec wall_to_monotonic;
-
-extern struct timeval xtime;
-
-struct timeval local_offset = { 0, 0 };
-
-void timer(void)
-{
- gettimeofday(&xtime, NULL);
- timeradd(&xtime, &local_offset, &xtime);
-}
-
-static void set_interval(int timer_type)
-{
- int usec = 1000000/hz();
- struct itimerval interval = ((struct itimerval) { { 0, usec },
- { 0, usec } });
-
- if(setitimer(timer_type, &interval, NULL) == -1)
- panic("setitimer failed - errno = %d\n", errno);
-}
-
-void enable_timer(void)
-{
- set_interval(ITIMER_VIRTUAL);
-}
-
-void prepare_timer(void * ptr)
-{
- int usec = 1000000/hz();
- *(struct itimerval *)ptr = ((struct itimerval) { { 0, usec },
- { 0, usec }});
-}
-
-void disable_timer(void)
-{
- struct itimerval disable = ((struct itimerval) { { 0, 0 }, { 0, 0 }});
- if((setitimer(ITIMER_VIRTUAL, &disable, NULL) < 0) ||
- (setitimer(ITIMER_REAL, &disable, NULL) < 0))
- printk("disnable_timer - setitimer failed, errno = %d\n",
- errno);
- /* If there are signals already queued, after unblocking ignore them */
- set_handler(SIGALRM, SIG_IGN, 0, -1);
- set_handler(SIGVTALRM, SIG_IGN, 0, -1);
-}
-
-void switch_timers(int to_real)
-{
- struct itimerval disable = ((struct itimerval) { { 0, 0 }, { 0, 0 }});
- struct itimerval enable = ((struct itimerval) { { 0, 1000000/hz() },
- { 0, 1000000/hz() }});
- int old, new;
-
- if(to_real){
- old = ITIMER_VIRTUAL;
- new = ITIMER_REAL;
- }
- else {
- old = ITIMER_REAL;
- new = ITIMER_VIRTUAL;
- }
-
- if((setitimer(old, &disable, NULL) < 0) ||
- (setitimer(new, &enable, NULL)))
- printk("switch_timers - setitimer failed, errno = %d\n",
- errno);
-}
-
-void uml_idle_timer(void)
-{
- if(signal(SIGVTALRM, SIG_IGN) == SIG_ERR)
- panic("Couldn't unset SIGVTALRM handler");
-
- set_handler(SIGALRM, (__sighandler_t) alarm_handler,
- SA_RESTART, SIGUSR1, SIGIO, SIGWINCH, SIGVTALRM, -1);
- set_interval(ITIMER_REAL);
-}
-
-extern void ktime_get_ts(struct timespec *ts);
-#define do_posix_clock_monotonic_gettime(ts) ktime_get_ts(ts)
-
-void time_init(void)
-{
- struct timespec now;
-
- if(signal(SIGVTALRM, boot_timer_handler) == SIG_ERR)
- panic("Couldn't set SIGVTALRM handler");
- set_interval(ITIMER_VIRTUAL);
-
- do_posix_clock_monotonic_gettime(&now);
- wall_to_monotonic.tv_sec = -now.tv_sec;
- wall_to_monotonic.tv_nsec = -now.tv_nsec;
-}
-
-/* Defined in linux/ktimer.h, which can't be included here */
-#define clock_was_set() do { } while (0)
-
-void do_gettimeofday(struct timeval *tv)
-{
- unsigned long flags;
-
- flags = time_lock();
- gettimeofday(tv, NULL);
- timeradd(tv, &local_offset, tv);
- time_unlock(flags);
- clock_was_set();
-}
-
-int do_settimeofday(struct timespec *tv)
-{
- struct timeval now;
- unsigned long flags;
- struct timeval tv_in;
-
- if ((unsigned long) tv->tv_nsec >= UM_NSEC_PER_SEC)
- return -EINVAL;
-
- tv_in.tv_sec = tv->tv_sec;
- tv_in.tv_usec = tv->tv_nsec / 1000;
-
- flags = time_lock();
- gettimeofday(&now, NULL);
- timersub(&tv_in, &now, &local_offset);
- time_unlock(flags);
-
- return(0);
-}
-
-void idle_sleep(int secs)
-{
- struct timespec ts;
-
- ts.tv_sec = secs;
- ts.tv_nsec = 0;
- nanosleep(&ts, NULL);
-}
-
-/* XXX This partly duplicates init_irq_signals */
-
-void user_time_init(void)
-{
- set_handler(SIGVTALRM, (__sighandler_t) alarm_handler,
- SA_ONSTACK | SA_RESTART, SIGUSR1, SIGIO, SIGWINCH,
- SIGALRM, SIGUSR2, -1);
- set_handler(SIGALRM, (__sighandler_t) alarm_handler,
- SA_ONSTACK | SA_RESTART, SIGUSR1, SIGIO, SIGWINCH,
- SIGVTALRM, SIGUSR2, -1);
- set_interval(ITIMER_VIRTUAL);
-}
void do_boot_timer_handler(struct sigcontext * sc)
{
+ unsigned long flags;
struct pt_regs regs;
CHOOSE_MODE((void) (UPT_SC(®s.regs) = sc),
(void) (regs.regs.skas.is_user = 0));
+
+ write_seqlock_irqsave(&xtime_lock, flags);
do_timer(®s);
+ write_sequnlock_irqrestore(&xtime_lock, flags);
}
static DEFINE_SPINLOCK(timer_spinlock);
unsigned long long nsecs;
unsigned long flags;
+ write_seqlock_irqsave(&xtime_lock, flags);
+
do_timer(regs);
- write_seqlock_irqsave(&xtime_lock, flags);
nsecs = get_time() + local_offset;
xtime.tv_sec = nsecs / NSEC_PER_SEC;
xtime.tv_nsec = nsecs - xtime.tv_sec * NSEC_PER_SEC;
- write_sequnlock_irqrestore(&xtime_lock, flags);
-
- return(IRQ_HANDLED);
-}
-long um_time(int __user *tloc)
-{
- long ret = get_time() / NSEC_PER_SEC;
-
- if((tloc != NULL) && put_user(ret, tloc))
- return -EFAULT;
+ write_sequnlock_irqrestore(&xtime_lock, flags);
- return ret;
+ return IRQ_HANDLED;
}
void do_gettimeofday(struct timeval *tv)
clock_was_set();
}
-long um_stime(int __user *tptr)
-{
- int value;
-
- if (get_user(value, tptr))
- return -EFAULT;
-
- set_time((unsigned long long) value * NSEC_PER_SEC);
-
- return 0;
-}
-
int do_settimeofday(struct timespec *tv)
{
set_time((unsigned long long) tv->tv_sec * NSEC_PER_SEC + tv->tv_nsec);
#include <linux/config.h>
+/* in case the preprocessor is a 32bit one */
+#undef i386
#ifdef CONFIG_LD_SCRIPT_STATIC
#include "uml.lds.S"
#else
*/
static int next(int fd, char *buf, int size, char c)
{
- int n;
+ int n, len;
char *ptr;
while((ptr = strchr(buf, c)) == NULL){
}
ptr++;
- memmove(buf, ptr, strlen(ptr) + 1);
+ len = strlen(ptr);
+ memmove(buf, ptr, len + 1);
+
+ /* Refill the buffer so that if there's a partial string that we care
+ * about, it will be completed, and we can recognize it.
+ */
+ n = read(fd, &buf[len], size - len - 1);
+ if(n < 0)
+ return -errno;
+
+ buf[len + n] = '\0';
return 1;
}
exit(1);
}
- if (lseek64(fd, len, SEEK_SET) < 0) {
- perror("os_seek_file");
+ /* Seek to len - 1 because writing a character there will
+ * increase the file size by one byte, to the desired length.
+ */
+ if (lseek64(fd, len - 1, SEEK_SET) < 0) {
+ perror("os_seek_file");
exit(1);
}
#define sys_vm86old sys_ni_syscall
#define sys_vm86 sys_ni_syscall
-#define sys_stime um_stime
-#define sys_time um_time
#define old_mmap old_mmap_i386
#include "../../i386/kernel/syscall_table.S"
/*#define sys_set_thread_area sys_ni_syscall
#define sys_get_thread_area sys_ni_syscall*/
-/* For __NR_time. The x86-64 name hopefully will change from sys_time64 to
- * sys_time (since the current situation is bogus). I've sent a patch to cleanup
- * this. Remove below the obsoleted line. */
-#define sys_time64 um_time
-#define sys_time um_time
-
/* On UML we call it this way ("old" means it's not mmap2) */
#define sys_mmap old_mmap
/* On x86-64 sys_uname is actually sys_newuname plus a compatibility trick.
*(.text.__end_that_request_first)
*(.text.wake_up_bit)
*(.text.unuse_mm)
-*(.text.skb_release_data)
*(.text.shrink_icache_memory)
*(.text.sched_balance_self)
*(.text.__pmd_alloc)
BIO_BUG_ON(!bio->bi_io_vec);
bio->bi_rw |= rw;
if (rw & WRITE)
- mod_page_state(pgpgout, count);
+ count_vm_events(PGPGOUT, count);
else
- mod_page_state(pgpgin, count);
+ count_vm_events(PGPGIN, count);
if (unlikely(block_dump)) {
char b[BDEVNAME_SIZE];
#
menu "Acorn-specific block devices"
- depends on ARCH_ACORN
+ depends on ARCH_ARC || ARCH_A5K
config BLK_DEV_FD1772
tristate "Old Archimedes floppy (1772) support"
return 0;
}
-static int __init
+static int __devinit
he_start(struct atm_dev *dev)
{
struct he_dev *he_dev;
};
-int idt77105_init(struct atm_dev *dev)
+int __devinit idt77105_init(struct atm_dev *dev)
{
dev->phy = &idt77105_ops;
return 0;
#define IDT77105_CTRSEL_RHEC 0x01 /* W, Rx HEC Error Counter */
#ifdef __KERNEL__
-int idt77105_init(struct atm_dev *dev) __init;
+int idt77105_init(struct atm_dev *dev);
#endif
/*
}
-static int __init ia_init(struct atm_dev *dev)
+static int __devinit ia_init(struct atm_dev *dev)
{
IADEV *iadev;
unsigned long real_base;
iadev->rx_dle_dma);
}
-static int __init ia_start(struct atm_dev *dev)
+static int __devinit ia_start(struct atm_dev *dev)
{
IADEV *iadev;
int error;
};
-int suni_init(struct atm_dev *dev)
+int __devinit suni_init(struct atm_dev *dev)
{
unsigned char mri;
int n;
int nid = dev->id;
struct sysinfo i;
- struct page_state ps;
unsigned long inactive;
unsigned long active;
unsigned long free;
si_meminfo_node(&i, nid);
- get_page_state_node(&ps, nid);
__get_zone_counts(&active, &inactive, &free, NODE_DATA(nid));
- /* Check for negative values in these approximate counters */
- if ((long)ps.nr_dirty < 0)
- ps.nr_dirty = 0;
- if ((long)ps.nr_writeback < 0)
- ps.nr_writeback = 0;
- if ((long)ps.nr_mapped < 0)
- ps.nr_mapped = 0;
- if ((long)ps.nr_slab < 0)
- ps.nr_slab = 0;
n = sprintf(buf, "\n"
"Node %d MemTotal: %8lu kB\n"
"Node %d LowFree: %8lu kB\n"
"Node %d Dirty: %8lu kB\n"
"Node %d Writeback: %8lu kB\n"
+ "Node %d FilePages: %8lu kB\n"
"Node %d Mapped: %8lu kB\n"
+ "Node %d AnonPages: %8lu kB\n"
+ "Node %d PageTables: %8lu kB\n"
+ "Node %d NFS Unstable: %8lu kB\n"
+ "Node %d Bounce: %8lu kB\n"
"Node %d Slab: %8lu kB\n",
nid, K(i.totalram),
nid, K(i.freeram),
nid, K(i.freehigh),
nid, K(i.totalram - i.totalhigh),
nid, K(i.freeram - i.freehigh),
- nid, K(ps.nr_dirty),
- nid, K(ps.nr_writeback),
- nid, K(ps.nr_mapped),
- nid, K(ps.nr_slab));
+ nid, K(node_page_state(nid, NR_FILE_DIRTY)),
+ nid, K(node_page_state(nid, NR_WRITEBACK)),
+ nid, K(node_page_state(nid, NR_FILE_PAGES)),
+ nid, K(node_page_state(nid, NR_FILE_MAPPED)),
+ nid, K(node_page_state(nid, NR_ANON_PAGES)),
+ nid, K(node_page_state(nid, NR_PAGETABLE)),
+ nid, K(node_page_state(nid, NR_UNSTABLE_NFS)),
+ nid, K(node_page_state(nid, NR_BOUNCE)),
+ nid, K(node_page_state(nid, NR_SLAB)));
n += hugetlb_report_node_meminfo(nid, buf + n);
return n;
}
static ssize_t node_read_numastat(struct sys_device * dev, char * buf)
{
- unsigned long numa_hit, numa_miss, interleave_hit, numa_foreign;
- unsigned long local_node, other_node;
- int i, cpu;
- pg_data_t *pg = NODE_DATA(dev->id);
- numa_hit = 0;
- numa_miss = 0;
- interleave_hit = 0;
- numa_foreign = 0;
- local_node = 0;
- other_node = 0;
- for (i = 0; i < MAX_NR_ZONES; i++) {
- struct zone *z = &pg->node_zones[i];
- for_each_online_cpu(cpu) {
- struct per_cpu_pageset *ps = zone_pcp(z,cpu);
- numa_hit += ps->numa_hit;
- numa_miss += ps->numa_miss;
- numa_foreign += ps->numa_foreign;
- interleave_hit += ps->interleave_hit;
- local_node += ps->local_node;
- other_node += ps->other_node;
- }
- }
return sprintf(buf,
"numa_hit %lu\n"
"numa_miss %lu\n"
"interleave_hit %lu\n"
"local_node %lu\n"
"other_node %lu\n",
- numa_hit,
- numa_miss,
- numa_foreign,
- interleave_hit,
- local_node,
- other_node);
+ node_page_state(dev->id, NUMA_HIT),
+ node_page_state(dev->id, NUMA_MISS),
+ node_page_state(dev->id, NUMA_FOREIGN),
+ node_page_state(dev->id, NUMA_INTERLEAVE_HIT),
+ node_page_state(dev->id, NUMA_LOCAL),
+ node_page_state(dev->id, NUMA_OTHER));
}
static SYSDEV_ATTR(numastat, S_IRUGO, node_read_numastat, NULL);
cd->dsb = wait_dsb();
}
-uch bcdbin(unsigned char bcd)
+static uch bcdbin(unsigned char bcd)
{ /* stolen from mcd.c! */
return (bcd >> 4) * 10 + (bcd & 0xf);
}
}
}
-static int __cm206_init(void)
+static int __init __cm206_init(void)
{
parse_options();
#if !defined(AUTO_PROBE_MODULE)
#endif /* !MODULE */
MODULE_ALIAS_BLOCKDEV_MAJOR(CM206_CDROM_MAJOR);
-/*
- * Local variables:
- * compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/include -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -pipe -fno-strength-reduce -m486 -DMODULE -DMODVERSIONS -include /usr/src/linux/include/linux/modversions.h -c -o cm206.o cm206.c"
- * End:
- */
/*****************************************************************************/
-#ifdef MODULE
/*
* Define some string labels for arguments passed from the module
* load line. These allow for easy board definitions, and easy
module_param_array(board3, charp, NULL, 0);
MODULE_PARM_DESC(board3, "Board 3 config -> name[,ioaddr[,memaddr]");
-#endif
-
/*
* Set up a default memory address table for EISA board probing.
* The default addresses are all bellow 1Mbyte, which has to be the
* Prototype all functions in this driver!
*/
-#ifdef MODULE
-static void stli_argbrds(void);
static int stli_parsebrd(stlconf_t *confp, char **argp);
-
-static unsigned long stli_atol(char *str);
-#endif
-
-int stli_init(void);
+static int stli_init(void);
static int stli_open(struct tty_struct *tty, struct file *filp);
static void stli_close(struct tty_struct *tty, struct file *filp);
static int stli_write(struct tty_struct *tty, const unsigned char *buf, int count);
static struct class *istallion_class;
-#ifdef MODULE
-
/*
* Loadable module initialization stuff.
*/
return(1);
}
-#endif
-
/*****************************************************************************/
static int stli_open(struct tty_struct *tty, struct file *filp)
/*****************************************************************************/
-int __init stli_init(void)
+static int __init stli_init(void)
{
int i;
printk(KERN_INFO "%s: version %s\n", stli_drvtitle, stli_drvversion);
return 0;
undo_platform_dev_add:
- platform_device_put(pdev);
+ platform_device_del(pdev);
undo_platform_dev_alloc:
- kfree(pdev);
+ platform_device_put(pdev);
+
return rc;
}
undo_chrdev_region:
unregister_chrdev_region(dev, num_pins);
undo_platform_device_add:
- platform_device_put(pdev);
+ platform_device_del(pdev);
undo_malloc:
- kfree(pdev);
+ platform_device_put(pdev);
+
return rc;
}
{
kfree(scx200_devices);
unregister_chrdev_region(MKDEV(major, 0), num_pins);
- platform_device_put(pdev);
platform_device_unregister(pdev);
/* kfree(pdev); */
}
#include <linux/slab.h>
#include "edac_mc.h"
+#define AMD76X_REVISION " Ver: 2.0.0 " __DATE__
+
+
#define amd76x_printk(level, fmt, arg...) \
edac_printk(level, "amd76x", fmt, ##arg)
static void amd76x_get_error_info(struct mem_ctl_info *mci,
struct amd76x_error_info *info)
{
- pci_read_config_dword(mci->pdev, AMD76X_ECC_MODE_STATUS,
+ struct pci_dev *pdev;
+
+ pdev = to_pci_dev(mci->dev);
+ pci_read_config_dword(pdev, AMD76X_ECC_MODE_STATUS,
&info->ecc_mode_status);
if (info->ecc_mode_status & BIT(8))
- pci_write_bits32(mci->pdev, AMD76X_ECC_MODE_STATUS,
+ pci_write_bits32(pdev, AMD76X_ECC_MODE_STATUS,
(u32) BIT(8), (u32) BIT(8));
if (info->ecc_mode_status & BIT(9))
- pci_write_bits32(mci->pdev, AMD76X_ECC_MODE_STATUS,
+ pci_write_bits32(pdev, AMD76X_ECC_MODE_STATUS,
(u32) BIT(9), (u32) BIT(9));
}
amd76x_process_error_info(mci, &info, 1);
}
+static void amd76x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
+ enum edac_type edac_mode)
+{
+ struct csrow_info *csrow;
+ u32 mba, mba_base, mba_mask, dms;
+ int index;
+
+ for (index = 0; index < mci->nr_csrows; index++) {
+ csrow = &mci->csrows[index];
+
+ /* find the DRAM Chip Select Base address and mask */
+ pci_read_config_dword(pdev,
+ AMD76X_MEM_BASE_ADDR + (index * 4),
+ &mba);
+
+ if (!(mba & BIT(0)))
+ continue;
+
+ mba_base = mba & 0xff800000UL;
+ mba_mask = ((mba & 0xff80) << 16) | 0x7fffffUL;
+ pci_read_config_dword(pdev, AMD76X_DRAM_MODE_STATUS, &dms);
+ csrow->first_page = mba_base >> PAGE_SHIFT;
+ csrow->nr_pages = (mba_mask + 1) >> PAGE_SHIFT;
+ csrow->last_page = csrow->first_page + csrow->nr_pages - 1;
+ csrow->page_mask = mba_mask >> PAGE_SHIFT;
+ csrow->grain = csrow->nr_pages << PAGE_SHIFT;
+ csrow->mtype = MEM_RDDR;
+ csrow->dtype = ((dms >> index) & 0x1) ? DEV_X4 : DEV_UNKNOWN;
+ csrow->edac_mode = edac_mode;
+ }
+}
+
/**
* amd76x_probe1 - Perform set up for detected device
* @pdev; PCI device detected
*/
static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
{
- int rc = -ENODEV;
- int index;
- struct mem_ctl_info *mci = NULL;
- enum edac_type ems_modes[] = {
+ static const enum edac_type ems_modes[] = {
EDAC_NONE,
EDAC_EC,
EDAC_SECDED,
EDAC_SECDED
};
+ struct mem_ctl_info *mci = NULL;
u32 ems;
u32 ems_mode;
struct amd76x_error_info discard;
mci = edac_mc_alloc(0, AMD76X_NR_CSROWS, AMD76X_NR_CHANS);
if (mci == NULL) {
- rc = -ENOMEM;
- goto fail;
+ return -ENOMEM;
}
debugf0("%s(): mci = %p\n", __func__, mci);
- mci->pdev = pdev;
+ mci->dev = &pdev->dev;
mci->mtype_cap = MEM_FLAG_RDDR;
mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
mci->edac_cap = ems_mode ?
(EDAC_FLAG_EC | EDAC_FLAG_SECDED) : EDAC_FLAG_NONE;
mci->mod_name = EDAC_MOD_STR;
- mci->mod_ver = "$Revision: 1.4.2.5 $";
+ mci->mod_ver = AMD76X_REVISION;
mci->ctl_name = amd76x_devs[dev_idx].ctl_name;
mci->edac_check = amd76x_check;
mci->ctl_page_to_phys = NULL;
- for (index = 0; index < mci->nr_csrows; index++) {
- struct csrow_info *csrow = &mci->csrows[index];
- u32 mba;
- u32 mba_base;
- u32 mba_mask;
- u32 dms;
-
- /* find the DRAM Chip Select Base address and mask */
- pci_read_config_dword(mci->pdev,
- AMD76X_MEM_BASE_ADDR + (index * 4), &mba);
-
- if (!(mba & BIT(0)))
- continue;
-
- mba_base = mba & 0xff800000UL;
- mba_mask = ((mba & 0xff80) << 16) | 0x7fffffUL;
- pci_read_config_dword(mci->pdev, AMD76X_DRAM_MODE_STATUS,
- &dms);
- csrow->first_page = mba_base >> PAGE_SHIFT;
- csrow->nr_pages = (mba_mask + 1) >> PAGE_SHIFT;
- csrow->last_page = csrow->first_page + csrow->nr_pages - 1;
- csrow->page_mask = mba_mask >> PAGE_SHIFT;
- csrow->grain = csrow->nr_pages << PAGE_SHIFT;
- csrow->mtype = MEM_RDDR;
- csrow->dtype = ((dms >> index) & 0x1) ? DEV_X4 : DEV_UNKNOWN;
- csrow->edac_mode = ems_modes[ems_mode];
- }
-
+ amd76x_init_csrows(mci, pdev, ems_modes[ems_mode]);
amd76x_get_error_info(mci, &discard); /* clear counters */
- if (edac_mc_add_mc(mci)) {
+ /* Here we assume that we will never see multiple instances of this
+ * type of memory controller. The ID is therefore hardcoded to 0.
+ */
+ if (edac_mc_add_mc(mci,0)) {
debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
goto fail;
}
return 0;
fail:
- if (mci != NULL)
- edac_mc_free(mci);
- return rc;
+ edac_mc_free(mci);
+ return -ENODEV;
}
/* returns count (>= 0), or negative on error */
debugf0("%s()\n", __func__);
- if ((mci = edac_mc_del_mc(pdev)) == NULL)
+ if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
return;
edac_mc_free(mci);
#include <linux/slab.h>
#include "edac_mc.h"
+#define E752X_REVISION " Ver: 2.0.0 " __DATE__
+
static int force_function_unhide;
#define e752x_printk(level, fmt, arg...) \
e752x_process_error_info(mci, &info, 1);
}
-static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
+/* Return 1 if dual channel mode is active. Else return 0. */
+static inline int dual_channel_active(u16 ddrcsr)
+{
+ return (((ddrcsr >> 12) & 3) == 3);
+}
+
+static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
+ u16 ddrcsr)
+{
+ struct csrow_info *csrow;
+ unsigned long last_cumul_size;
+ int index, mem_dev, drc_chan;
+ int drc_drbg; /* DRB granularity 0=64mb, 1=128mb */
+ int drc_ddim; /* DRAM Data Integrity Mode 0=none, 2=edac */
+ u8 value;
+ u32 dra, drc, cumul_size;
+
+ pci_read_config_dword(pdev, E752X_DRA, &dra);
+ pci_read_config_dword(pdev, E752X_DRC, &drc);
+ drc_chan = dual_channel_active(ddrcsr);
+ drc_drbg = drc_chan + 1; /* 128 in dual mode, 64 in single */
+ drc_ddim = (drc >> 20) & 0x3;
+
+ /* The dram row boundary (DRB) reg values are boundary address for
+ * each DRAM row with a granularity of 64 or 128MB (single/dual
+ * channel operation). DRB regs are cumulative; therefore DRB7 will
+ * contain the total memory contained in all eight rows.
+ */
+ for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
+ /* mem_dev 0=x8, 1=x4 */
+ mem_dev = (dra >> (index * 4 + 2)) & 0x3;
+ csrow = &mci->csrows[index];
+
+ mem_dev = (mem_dev == 2);
+ pci_read_config_byte(pdev, E752X_DRB + index, &value);
+ /* convert a 128 or 64 MiB DRB to a page size. */
+ cumul_size = value << (25 + drc_drbg - PAGE_SHIFT);
+ debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
+ cumul_size);
+ if (cumul_size == last_cumul_size)
+ continue; /* not populated */
+
+ csrow->first_page = last_cumul_size;
+ csrow->last_page = cumul_size - 1;
+ csrow->nr_pages = cumul_size - last_cumul_size;
+ last_cumul_size = cumul_size;
+ csrow->grain = 1 << 12; /* 4KiB - resolution of CELOG */
+ csrow->mtype = MEM_RDDR; /* only one type supported */
+ csrow->dtype = mem_dev ? DEV_X4 : DEV_X8;
+
+ /*
+ * if single channel or x8 devices then SECDED
+ * if dual channel and x4 then S4ECD4ED
+ */
+ if (drc_ddim) {
+ if (drc_chan && mem_dev) {
+ csrow->edac_mode = EDAC_S4ECD4ED;
+ mci->edac_cap |= EDAC_FLAG_S4ECD4ED;
+ } else {
+ csrow->edac_mode = EDAC_SECDED;
+ mci->edac_cap |= EDAC_FLAG_SECDED;
+ }
+ } else
+ csrow->edac_mode = EDAC_NONE;
+ }
+}
+
+static void e752x_init_mem_map_table(struct pci_dev *pdev,
+ struct e752x_pvt *pvt)
{
- int rc = -ENODEV;
int index;
+ u8 value, last, row, stat8;
+
+ last = 0;
+ row = 0;
+
+ for (index = 0; index < 8; index += 2) {
+ pci_read_config_byte(pdev, E752X_DRB + index, &value);
+ /* test if there is a dimm in this slot */
+ if (value == last) {
+ /* no dimm in the slot, so flag it as empty */
+ pvt->map[index] = 0xff;
+ pvt->map[index + 1] = 0xff;
+ } else { /* there is a dimm in the slot */
+ pvt->map[index] = row;
+ row++;
+ last = value;
+ /* test the next value to see if the dimm is double
+ * sided
+ */
+ pci_read_config_byte(pdev, E752X_DRB + index + 1,
+ &value);
+ pvt->map[index + 1] = (value == last) ?
+ 0xff : /* the dimm is single sided,
+ so flag as empty */
+ row; /* this is a double sided dimm
+ to save the next row # */
+ row++;
+ last = value;
+ }
+ }
+
+ /* set the map type. 1 = normal, 0 = reversed */
+ pci_read_config_byte(pdev, E752X_DRM, &stat8);
+ pvt->map_type = ((stat8 & 0x0f) > ((stat8 >> 4) & 0x0f));
+}
+
+/* Return 0 on success or 1 on failure. */
+static int e752x_get_devs(struct pci_dev *pdev, int dev_idx,
+ struct e752x_pvt *pvt)
+{
+ struct pci_dev *dev;
+
+ pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL,
+ pvt->dev_info->err_dev,
+ pvt->bridge_ck);
+
+ if (pvt->bridge_ck == NULL)
+ pvt->bridge_ck = pci_scan_single_device(pdev->bus,
+ PCI_DEVFN(0, 1));
+
+ if (pvt->bridge_ck == NULL) {
+ e752x_printk(KERN_ERR, "error reporting device not found:"
+ "vendor %x device 0x%x (broken BIOS?)\n",
+ PCI_VENDOR_ID_INTEL, e752x_devs[dev_idx].err_dev);
+ return 1;
+ }
+
+ dev = pci_get_device(PCI_VENDOR_ID_INTEL, e752x_devs[dev_idx].ctl_dev,
+ NULL);
+
+ if (dev == NULL)
+ goto fail;
+
+ pvt->dev_d0f0 = dev;
+ pvt->dev_d0f1 = pci_dev_get(pvt->bridge_ck);
+
+ return 0;
+
+fail:
+ pci_dev_put(pvt->bridge_ck);
+ return 1;
+}
+
+static void e752x_init_error_reporting_regs(struct e752x_pvt *pvt)
+{
+ struct pci_dev *dev;
+
+ dev = pvt->dev_d0f1;
+ /* Turn off error disable & SMI in case the BIOS turned it on */
+ pci_write_config_byte(dev, E752X_HI_ERRMASK, 0x00);
+ pci_write_config_byte(dev, E752X_HI_SMICMD, 0x00);
+ pci_write_config_word(dev, E752X_SYSBUS_ERRMASK, 0x00);
+ pci_write_config_word(dev, E752X_SYSBUS_SMICMD, 0x00);
+ pci_write_config_byte(dev, E752X_BUF_ERRMASK, 0x00);
+ pci_write_config_byte(dev, E752X_BUF_SMICMD, 0x00);
+ pci_write_config_byte(dev, E752X_DRAM_ERRMASK, 0x00);
+ pci_write_config_byte(dev, E752X_DRAM_SMICMD, 0x00);
+}
+
+static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
+{
u16 pci_data;
u8 stat8;
- struct mem_ctl_info *mci = NULL;
- struct e752x_pvt *pvt = NULL;
+ struct mem_ctl_info *mci;
+ struct e752x_pvt *pvt;
u16 ddrcsr;
- u32 drc;
int drc_chan; /* Number of channels 0=1chan,1=2chan */
- int drc_drbg; /* DRB granularity 0=64mb, 1=128mb */
- int drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
- u32 dra;
- unsigned long last_cumul_size;
- struct pci_dev *dev = NULL;
struct e752x_error_info discard;
debugf0("%s(): mci\n", __func__);
if (!force_function_unhide && !(stat8 & (1 << 5))) {
printk(KERN_INFO "Contact your BIOS vendor to see if the "
"E752x error registers can be safely un-hidden\n");
- goto fail;
+ return -ENOMEM;
}
stat8 |= (1 << 5);
pci_write_config_byte(pdev, E752X_DEVPRES1, stat8);
- /* need to find out the number of channels */
- pci_read_config_dword(pdev, E752X_DRC, &drc);
pci_read_config_word(pdev, E752X_DDRCSR, &ddrcsr);
/* FIXME: should check >>12 or 0xf, true for all? */
/* Dual channel = 1, Single channel = 0 */
- drc_chan = (((ddrcsr >> 12) & 3) == 3);
- drc_drbg = drc_chan + 1; /* 128 in dual mode, 64 in single */
- drc_ddim = (drc >> 20) & 0x3;
+ drc_chan = dual_channel_active(ddrcsr);
mci = edac_mc_alloc(sizeof(*pvt), E752X_NR_CSROWS, drc_chan + 1);
if (mci == NULL) {
- rc = -ENOMEM;
- goto fail;
+ return -ENOMEM;
}
debugf3("%s(): init mci\n", __func__);
EDAC_FLAG_S4ECD4ED;
/* FIXME - what if different memory types are in different csrows? */
mci->mod_name = EDAC_MOD_STR;
- mci->mod_ver = "$Revision: 1.5.2.11 $";
- mci->pdev = pdev;
+ mci->mod_ver = E752X_REVISION;
+ mci->dev = &pdev->dev;
debugf3("%s(): init pvt\n", __func__);
pvt = (struct e752x_pvt *) mci->pvt_info;
pvt->dev_info = &e752x_devs[dev_idx];
- pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL,
- pvt->dev_info->err_dev,
- pvt->bridge_ck);
-
- if (pvt->bridge_ck == NULL)
- pvt->bridge_ck = pci_scan_single_device(pdev->bus,
- PCI_DEVFN(0, 1));
+ pvt->mc_symmetric = ((ddrcsr & 0x10) != 0);
- if (pvt->bridge_ck == NULL) {
- e752x_printk(KERN_ERR, "error reporting device not found:"
- "vendor %x device 0x%x (broken BIOS?)\n",
- PCI_VENDOR_ID_INTEL, e752x_devs[dev_idx].err_dev);
- goto fail;
+ if (e752x_get_devs(pdev, dev_idx, pvt)) {
+ edac_mc_free(mci);
+ return -ENODEV;
}
- pvt->mc_symmetric = ((ddrcsr & 0x10) != 0);
debugf3("%s(): more mci init\n", __func__);
mci->ctl_name = pvt->dev_info->ctl_name;
mci->edac_check = e752x_check;
mci->ctl_page_to_phys = ctl_page_to_phys;
- /* find out the device types */
- pci_read_config_dword(pdev, E752X_DRA, &dra);
-
- /*
- * The dram row boundary (DRB) reg values are boundary address for
- * each DRAM row with a granularity of 64 or 128MB (single/dual
- * channel operation). DRB regs are cumulative; therefore DRB7 will
- * contain the total memory contained in all eight rows.
- */
- for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
- u8 value;
- u32 cumul_size;
-
- /* mem_dev 0=x8, 1=x4 */
- int mem_dev = (dra >> (index * 4 + 2)) & 0x3;
- struct csrow_info *csrow = &mci->csrows[index];
-
- mem_dev = (mem_dev == 2);
- pci_read_config_byte(mci->pdev, E752X_DRB + index, &value);
- /* convert a 128 or 64 MiB DRB to a page size. */
- cumul_size = value << (25 + drc_drbg - PAGE_SHIFT);
- debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
- cumul_size);
-
- if (cumul_size == last_cumul_size)
- continue; /* not populated */
-
- csrow->first_page = last_cumul_size;
- csrow->last_page = cumul_size - 1;
- csrow->nr_pages = cumul_size - last_cumul_size;
- last_cumul_size = cumul_size;
- csrow->grain = 1 << 12; /* 4KiB - resolution of CELOG */
- csrow->mtype = MEM_RDDR; /* only one type supported */
- csrow->dtype = mem_dev ? DEV_X4 : DEV_X8;
-
- /*
- * if single channel or x8 devices then SECDED
- * if dual channel and x4 then S4ECD4ED
- */
- if (drc_ddim) {
- if (drc_chan && mem_dev) {
- csrow->edac_mode = EDAC_S4ECD4ED;
- mci->edac_cap |= EDAC_FLAG_S4ECD4ED;
- } else {
- csrow->edac_mode = EDAC_SECDED;
- mci->edac_cap |= EDAC_FLAG_SECDED;
- }
- } else
- csrow->edac_mode = EDAC_NONE;
- }
-
- /* Fill in the memory map table */
- {
- u8 value;
- u8 last = 0;
- u8 row = 0;
-
- for (index = 0; index < 8; index += 2) {
- pci_read_config_byte(mci->pdev, E752X_DRB + index,
- &value);
-
- /* test if there is a dimm in this slot */
- if (value == last) {
- /* no dimm in the slot, so flag it as empty */
- pvt->map[index] = 0xff;
- pvt->map[index + 1] = 0xff;
- } else { /* there is a dimm in the slot */
- pvt->map[index] = row;
- row++;
- last = value;
- /* test the next value to see if the dimm is
- double sided */
- pci_read_config_byte(mci->pdev,
- E752X_DRB + index + 1,
- &value);
- pvt->map[index + 1] = (value == last) ?
- 0xff : /* the dimm is single sided,
- * so flag as empty
- */
- row; /* this is a double sided dimm
- * to save the next row #
- */
- row++;
- last = value;
- }
- }
- }
+ e752x_init_csrows(mci, pdev, ddrcsr);
+ e752x_init_mem_map_table(pdev, pvt);
/* set the map type. 1 = normal, 0 = reversed */
- pci_read_config_byte(mci->pdev, E752X_DRM, &stat8);
+ pci_read_config_byte(pdev, E752X_DRM, &stat8);
pvt->map_type = ((stat8 & 0x0f) > ((stat8 >> 4) & 0x0f));
mci->edac_cap |= EDAC_FLAG_NONE;
debugf3("%s(): tolm, remapbase, remaplimit\n", __func__);
/* load the top of low memory, remap base, and remap limit vars */
- pci_read_config_word(mci->pdev, E752X_TOLM, &pci_data);
+ pci_read_config_word(pdev, E752X_TOLM, &pci_data);
pvt->tolm = ((u32) pci_data) << 4;
- pci_read_config_word(mci->pdev, E752X_REMAPBASE, &pci_data);
+ pci_read_config_word(pdev, E752X_REMAPBASE, &pci_data);
pvt->remapbase = ((u32) pci_data) << 14;
- pci_read_config_word(mci->pdev, E752X_REMAPLIMIT, &pci_data);
+ pci_read_config_word(pdev, E752X_REMAPLIMIT, &pci_data);
pvt->remaplimit = ((u32) pci_data) << 14;
e752x_printk(KERN_INFO,
"tolm = %x, remapbase = %x, remaplimit = %x\n", pvt->tolm,
pvt->remapbase, pvt->remaplimit);
- if (edac_mc_add_mc(mci)) {
+ /* Here we assume that we will never see multiple instances of this
+ * type of memory controller. The ID is therefore hardcoded to 0.
+ */
+ if (edac_mc_add_mc(mci,0)) {
debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
goto fail;
}
- dev = pci_get_device(PCI_VENDOR_ID_INTEL, e752x_devs[dev_idx].ctl_dev,
- NULL);
- pvt->dev_d0f0 = dev;
- /* find the error reporting device and clear errors */
- dev = pvt->dev_d0f1 = pci_dev_get(pvt->bridge_ck);
- /* Turn off error disable & SMI in case the BIOS turned it on */
- pci_write_config_byte(dev, E752X_HI_ERRMASK, 0x00);
- pci_write_config_byte(dev, E752X_HI_SMICMD, 0x00);
- pci_write_config_word(dev, E752X_SYSBUS_ERRMASK, 0x00);
- pci_write_config_word(dev, E752X_SYSBUS_SMICMD, 0x00);
- pci_write_config_byte(dev, E752X_BUF_ERRMASK, 0x00);
- pci_write_config_byte(dev, E752X_BUF_SMICMD, 0x00);
- pci_write_config_byte(dev, E752X_DRAM_ERRMASK, 0x00);
- pci_write_config_byte(dev, E752X_DRAM_SMICMD, 0x00);
-
+ e752x_init_error_reporting_regs(pvt);
e752x_get_error_info(mci, &discard); /* clear other MCH errors */
/* get this far and it's successful */
return 0;
fail:
- if (mci) {
- if (pvt->dev_d0f0)
- pci_dev_put(pvt->dev_d0f0);
-
- if (pvt->dev_d0f1)
- pci_dev_put(pvt->dev_d0f1);
-
- if (pvt->bridge_ck)
- pci_dev_put(pvt->bridge_ck);
-
- edac_mc_free(mci);
- }
+ pci_dev_put(pvt->dev_d0f0);
+ pci_dev_put(pvt->dev_d0f1);
+ pci_dev_put(pvt->bridge_ck);
+ edac_mc_free(mci);
- return rc;
+ return -ENODEV;
}
/* returns count (>= 0), or negative on error */
debugf0("%s()\n", __func__);
- if ((mci = edac_mc_del_mc(pdev)) == NULL)
+ if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
return;
pvt = (struct e752x_pvt *) mci->pvt_info;
#include <linux/slab.h>
#include "edac_mc.h"
+#define E7XXX_REVISION " Ver: 2.0.0 " __DATE__
+
#define e7xxx_printk(level, fmt, arg...) \
edac_printk(level, "e7xxx", fmt, ##arg)
e7xxx_process_error_info(mci, &info, 1);
}
-static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
+/* Return 1 if dual channel mode is active. Else return 0. */
+static inline int dual_channel_active(u32 drc, int dev_idx)
{
- int rc = -ENODEV;
- int index;
- u16 pci_data;
- struct mem_ctl_info *mci = NULL;
- struct e7xxx_pvt *pvt = NULL;
- u32 drc;
- int drc_chan = 1; /* Number of channels 0=1chan,1=2chan */
- int drc_drbg = 1; /* DRB granularity 0=32mb,1=64mb */
- int drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
- u32 dra;
- unsigned long last_cumul_size;
- struct e7xxx_error_info discard;
-
- debugf0("%s(): mci\n", __func__);
+ return (dev_idx == E7501) ? ((drc >> 22) & 0x1) : 1;
+}
- /* need to find out the number of channels */
- pci_read_config_dword(pdev, E7XXX_DRC, &drc);
+/* Return DRB granularity (0=32mb, 1=64mb). */
+static inline int drb_granularity(u32 drc, int dev_idx)
+{
/* only e7501 can be single channel */
- if (dev_idx == E7501) {
- drc_chan = ((drc >> 22) & 0x1);
- drc_drbg = (drc >> 18) & 0x3;
- }
-
- drc_ddim = (drc >> 20) & 0x3;
- mci = edac_mc_alloc(sizeof(*pvt), E7XXX_NR_CSROWS, drc_chan + 1);
-
- if (mci == NULL) {
- rc = -ENOMEM;
- goto fail;
- }
-
- debugf3("%s(): init mci\n", __func__);
- mci->mtype_cap = MEM_FLAG_RDDR;
- mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED |
- EDAC_FLAG_S4ECD4ED;
- /* FIXME - what if different memory types are in different csrows? */
- mci->mod_name = EDAC_MOD_STR;
- mci->mod_ver = "$Revision: 1.5.2.9 $";
- mci->pdev = pdev;
+ return (dev_idx == E7501) ? ((drc >> 18) & 0x3) : 1;
+}
- debugf3("%s(): init pvt\n", __func__);
- pvt = (struct e7xxx_pvt *) mci->pvt_info;
- pvt->dev_info = &e7xxx_devs[dev_idx];
- pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL,
- pvt->dev_info->err_dev,
- pvt->bridge_ck);
- if (!pvt->bridge_ck) {
- e7xxx_printk(KERN_ERR, "error reporting device not found:"
- "vendor %x device 0x%x (broken BIOS?)\n",
- PCI_VENDOR_ID_INTEL, e7xxx_devs[dev_idx].err_dev);
- goto fail;
- }
-
- debugf3("%s(): more mci init\n", __func__);
- mci->ctl_name = pvt->dev_info->ctl_name;
- mci->edac_check = e7xxx_check;
- mci->ctl_page_to_phys = ctl_page_to_phys;
+static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
+ int dev_idx, u32 drc)
+{
+ unsigned long last_cumul_size;
+ int index;
+ u8 value;
+ u32 dra, cumul_size;
+ int drc_chan, drc_drbg, drc_ddim, mem_dev;
+ struct csrow_info *csrow;
- /* find out the device types */
pci_read_config_dword(pdev, E7XXX_DRA, &dra);
+ drc_chan = dual_channel_active(drc, dev_idx);
+ drc_drbg = drb_granularity(drc, dev_idx);
+ drc_ddim = (drc >> 20) & 0x3;
+ last_cumul_size = 0;
- /*
- * The dram row boundary (DRB) reg values are boundary address
+ /* The dram row boundary (DRB) reg values are boundary address
* for each DRAM row with a granularity of 32 or 64MB (single/dual
* channel operation). DRB regs are cumulative; therefore DRB7 will
* contain the total memory contained in all eight rows.
*/
- for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
- u8 value;
- u32 cumul_size;
+ for (index = 0; index < mci->nr_csrows; index++) {
/* mem_dev 0=x8, 1=x4 */
- int mem_dev = (dra >> (index * 4 + 3)) & 0x1;
- struct csrow_info *csrow = &mci->csrows[index];
+ mem_dev = (dra >> (index * 4 + 3)) & 0x1;
+ csrow = &mci->csrows[index];
- pci_read_config_byte(mci->pdev, E7XXX_DRB + index, &value);
+ pci_read_config_byte(pdev, E7XXX_DRB + index, &value);
/* convert a 64 or 32 MiB DRB to a page size. */
cumul_size = value << (25 + drc_drbg - PAGE_SHIFT);
debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
cumul_size);
-
if (cumul_size == last_cumul_size)
- continue; /* not populated */
+ continue; /* not populated */
csrow->first_page = last_cumul_size;
csrow->last_page = cumul_size - 1;
csrow->nr_pages = cumul_size - last_cumul_size;
last_cumul_size = cumul_size;
- csrow->grain = 1 << 12; /* 4KiB - resolution of CELOG */
- csrow->mtype = MEM_RDDR; /* only one type supported */
+ csrow->grain = 1 << 12; /* 4KiB - resolution of CELOG */
+ csrow->mtype = MEM_RDDR; /* only one type supported */
csrow->dtype = mem_dev ? DEV_X4 : DEV_X8;
/*
} else
csrow->edac_mode = EDAC_NONE;
}
+}
- mci->edac_cap |= EDAC_FLAG_NONE;
+static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
+{
+ u16 pci_data;
+ struct mem_ctl_info *mci = NULL;
+ struct e7xxx_pvt *pvt = NULL;
+ u32 drc;
+ int drc_chan;
+ struct e7xxx_error_info discard;
+
+ debugf0("%s(): mci\n", __func__);
+ pci_read_config_dword(pdev, E7XXX_DRC, &drc);
+
+ drc_chan = dual_channel_active(drc, dev_idx);
+ mci = edac_mc_alloc(sizeof(*pvt), E7XXX_NR_CSROWS, drc_chan + 1);
+
+ if (mci == NULL)
+ return -ENOMEM;
+
+ debugf3("%s(): init mci\n", __func__);
+ mci->mtype_cap = MEM_FLAG_RDDR;
+ mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED |
+ EDAC_FLAG_S4ECD4ED;
+ /* FIXME - what if different memory types are in different csrows? */
+ mci->mod_name = EDAC_MOD_STR;
+ mci->mod_ver = E7XXX_REVISION;
+ mci->dev = &pdev->dev;
+ debugf3("%s(): init pvt\n", __func__);
+ pvt = (struct e7xxx_pvt *) mci->pvt_info;
+ pvt->dev_info = &e7xxx_devs[dev_idx];
+ pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL,
+ pvt->dev_info->err_dev,
+ pvt->bridge_ck);
+ if (!pvt->bridge_ck) {
+ e7xxx_printk(KERN_ERR, "error reporting device not found:"
+ "vendor %x device 0x%x (broken BIOS?)\n",
+ PCI_VENDOR_ID_INTEL, e7xxx_devs[dev_idx].err_dev);
+ goto fail0;
+ }
+
+ debugf3("%s(): more mci init\n", __func__);
+ mci->ctl_name = pvt->dev_info->ctl_name;
+ mci->edac_check = e7xxx_check;
+ mci->ctl_page_to_phys = ctl_page_to_phys;
+ e7xxx_init_csrows(mci, pdev, dev_idx, drc);
+ mci->edac_cap |= EDAC_FLAG_NONE;
debugf3("%s(): tolm, remapbase, remaplimit\n", __func__);
/* load the top of low memory, remap base, and remap limit vars */
- pci_read_config_word(mci->pdev, E7XXX_TOLM, &pci_data);
+ pci_read_config_word(pdev, E7XXX_TOLM, &pci_data);
pvt->tolm = ((u32) pci_data) << 4;
- pci_read_config_word(mci->pdev, E7XXX_REMAPBASE, &pci_data);
+ pci_read_config_word(pdev, E7XXX_REMAPBASE, &pci_data);
pvt->remapbase = ((u32) pci_data) << 14;
- pci_read_config_word(mci->pdev, E7XXX_REMAPLIMIT, &pci_data);
+ pci_read_config_word(pdev, E7XXX_REMAPLIMIT, &pci_data);
pvt->remaplimit = ((u32) pci_data) << 14;
e7xxx_printk(KERN_INFO,
"tolm = %x, remapbase = %x, remaplimit = %x\n", pvt->tolm,
/* clear any pending errors, or initial state bits */
e7xxx_get_error_info(mci, &discard);
- if (edac_mc_add_mc(mci) != 0) {
+ /* Here we assume that we will never see multiple instances of this
+ * type of memory controller. The ID is therefore hardcoded to 0.
+ */
+ if (edac_mc_add_mc(mci,0)) {
debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
- goto fail;
+ goto fail1;
}
/* get this far and it's successful */
debugf3("%s(): success\n", __func__);
return 0;
-fail:
- if (mci != NULL) {
- if(pvt != NULL && pvt->bridge_ck)
- pci_dev_put(pvt->bridge_ck);
- edac_mc_free(mci);
- }
+fail1:
+ pci_dev_put(pvt->bridge_ck);
+
+fail0:
+ edac_mc_free(mci);
- return rc;
+ return -ENODEV;
}
/* returns count (>= 0), or negative on error */
debugf0("%s()\n", __func__);
- if ((mci = edac_mc_del_mc(pdev)) == NULL)
+ if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
return;
pvt = (struct e7xxx_pvt *) mci->pvt_info;
static int panic_on_ue;
static int poll_msec = 1000;
-static int check_pci_parity = 0; /* default YES check PCI parity */
-static int panic_on_pci_parity; /* default no panic on PCI Parity */
-static atomic_t pci_parity_count = ATOMIC_INIT(0);
-
/* lock to memory controller's control array */
static DECLARE_MUTEX(mem_ctls_mutex);
static struct list_head mc_devices = LIST_HEAD_INIT(mc_devices);
static struct task_struct *edac_thread;
+#ifdef CONFIG_PCI
+static int check_pci_parity = 0; /* default YES check PCI parity */
+static int panic_on_pci_parity; /* default no panic on PCI Parity */
+static atomic_t pci_parity_count = ATOMIC_INIT(0);
+
/* Structure of the whitelist and blacklist arrays */
struct edac_pci_device_list {
unsigned int vendor; /* Vendor ID */
static struct edac_pci_device_list pci_whitelist[MAX_LISTED_PCI_DEVICES];
static int pci_whitelist_count ;
+#ifndef DISABLE_EDAC_SYSFS
+static struct kobject edac_pci_kobj; /* /sys/devices/system/edac/pci */
+static struct completion edac_pci_kobj_complete;
+#endif /* DISABLE_EDAC_SYSFS */
+#endif /* CONFIG_PCI */
+
/* START sysfs data and methods */
#ifndef DISABLE_EDAC_SYSFS
set_kset_name("edac"),
};
-/* sysfs objects:
+/* sysfs object:
* /sys/devices/system/edac/mc
- * /sys/devices/system/edac/pci
*/
static struct kobject edac_memctrl_kobj;
-static struct kobject edac_pci_kobj;
/* We use these to wait for the reference counts on edac_memctrl_kobj and
* edac_pci_kobj to reach 0.
*/
static struct completion edac_memctrl_kobj_complete;
-static struct completion edac_pci_kobj_complete;
/*
* /sys/devices/system/edac/mc;
#endif /* DISABLE_EDAC_SYSFS */
}
+#ifdef CONFIG_PCI
+
#ifndef DISABLE_EDAC_SYSFS
/*
#endif
}
+
+static u16 get_pci_parity_status(struct pci_dev *dev, int secondary)
+{
+ int where;
+ u16 status;
+
+ where = secondary ? PCI_SEC_STATUS : PCI_STATUS;
+ pci_read_config_word(dev, where, &status);
+
+ /* If we get back 0xFFFF then we must suspect that the card has been
+ * pulled but the Linux PCI layer has not yet finished cleaning up.
+ * We don't want to report on such devices
+ */
+
+ if (status == 0xFFFF) {
+ u32 sanity;
+
+ pci_read_config_dword(dev, 0, &sanity);
+
+ if (sanity == 0xFFFFFFFF)
+ return 0;
+ }
+
+ status &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR |
+ PCI_STATUS_PARITY;
+
+ if (status)
+ /* reset only the bits we are interested in */
+ pci_write_config_word(dev, where, status);
+
+ return status;
+}
+
+typedef void (*pci_parity_check_fn_t) (struct pci_dev *dev);
+
+/* Clear any PCI parity errors logged by this device. */
+static void edac_pci_dev_parity_clear(struct pci_dev *dev)
+{
+ u8 header_type;
+
+ get_pci_parity_status(dev, 0);
+
+ /* read the device TYPE, looking for bridges */
+ pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
+
+ if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE)
+ get_pci_parity_status(dev, 1);
+}
+
+/*
+ * PCI Parity polling
+ *
+ */
+static void edac_pci_dev_parity_test(struct pci_dev *dev)
+{
+ u16 status;
+ u8 header_type;
+
+ /* read the STATUS register on this device
+ */
+ status = get_pci_parity_status(dev, 0);
+
+ debugf2("PCI STATUS= 0x%04x %s\n", status, dev->dev.bus_id );
+
+ /* check the status reg for errors */
+ if (status) {
+ if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
+ edac_printk(KERN_CRIT, EDAC_PCI,
+ "Signaled System Error on %s\n",
+ pci_name(dev));
+
+ if (status & (PCI_STATUS_PARITY)) {
+ edac_printk(KERN_CRIT, EDAC_PCI,
+ "Master Data Parity Error on %s\n",
+ pci_name(dev));
+
+ atomic_inc(&pci_parity_count);
+ }
+
+ if (status & (PCI_STATUS_DETECTED_PARITY)) {
+ edac_printk(KERN_CRIT, EDAC_PCI,
+ "Detected Parity Error on %s\n",
+ pci_name(dev));
+
+ atomic_inc(&pci_parity_count);
+ }
+ }
+
+ /* read the device TYPE, looking for bridges */
+ pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
+
+ debugf2("PCI HEADER TYPE= 0x%02x %s\n", header_type, dev->dev.bus_id );
+
+ if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
+ /* On bridges, need to examine secondary status register */
+ status = get_pci_parity_status(dev, 1);
+
+ debugf2("PCI SEC_STATUS= 0x%04x %s\n",
+ status, dev->dev.bus_id );
+
+ /* check the secondary status reg for errors */
+ if (status) {
+ if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
+ edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
+ "Signaled System Error on %s\n",
+ pci_name(dev));
+
+ if (status & (PCI_STATUS_PARITY)) {
+ edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
+ "Master Data Parity Error on "
+ "%s\n", pci_name(dev));
+
+ atomic_inc(&pci_parity_count);
+ }
+
+ if (status & (PCI_STATUS_DETECTED_PARITY)) {
+ edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
+ "Detected Parity Error on %s\n",
+ pci_name(dev));
+
+ atomic_inc(&pci_parity_count);
+ }
+ }
+ }
+}
+
+/*
+ * check_dev_on_list: Scan for a PCI device on a white/black list
+ * @list: an EDAC &edac_pci_device_list white/black list pointer
+ * @free_index: index of next free entry on the list
+ * @pci_dev: PCI Device pointer
+ *
+ * see if list contains the device.
+ *
+ * Returns: 0 not found
+ * 1 found on list
+ */
+static int check_dev_on_list(struct edac_pci_device_list *list,
+ int free_index, struct pci_dev *dev)
+{
+ int i;
+ int rc = 0; /* Assume not found */
+ unsigned short vendor=dev->vendor;
+ unsigned short device=dev->device;
+
+ /* Scan the list, looking for a vendor/device match */
+ for (i = 0; i < free_index; i++, list++ ) {
+ if ((list->vendor == vendor ) && (list->device == device )) {
+ rc = 1;
+ break;
+ }
+ }
+
+ return rc;
+}
+
+/*
+ * pci_dev parity list iterator
+ * Scan the PCI device list for one iteration, looking for SERRORs
+ * Master Parity ERRORS or Parity ERRORs on primary or secondary devices
+ */
+static inline void edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn)
+{
+ struct pci_dev *dev = NULL;
+
+ /* request for kernel access to the next PCI device, if any,
+ * and while we are looking at it have its reference count
+ * bumped until we are done with it
+ */
+ while((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
+ /* if whitelist exists then it has priority, so only scan
+ * those devices on the whitelist
+ */
+ if (pci_whitelist_count > 0 ) {
+ if (check_dev_on_list(pci_whitelist,
+ pci_whitelist_count, dev))
+ fn(dev);
+ } else {
+ /*
+ * if no whitelist, then check if this devices is
+ * blacklisted
+ */
+ if (!check_dev_on_list(pci_blacklist,
+ pci_blacklist_count, dev))
+ fn(dev);
+ }
+ }
+}
+
+static void do_pci_parity_check(void)
+{
+ unsigned long flags;
+ int before_count;
+
+ debugf3("%s()\n", __func__);
+
+ if (!check_pci_parity)
+ return;
+
+ before_count = atomic_read(&pci_parity_count);
+
+ /* scan all PCI devices looking for a Parity Error on devices and
+ * bridges
+ */
+ local_irq_save(flags);
+ edac_pci_dev_parity_iterator(edac_pci_dev_parity_test);
+ local_irq_restore(flags);
+
+ /* Only if operator has selected panic on PCI Error */
+ if (panic_on_pci_parity) {
+ /* If the count is different 'after' from 'before' */
+ if (before_count != atomic_read(&pci_parity_count))
+ panic("EDAC: PCI Parity Error");
+ }
+}
+
+static inline void clear_pci_parity_errors(void)
+{
+ /* Clear any PCI bus parity errors that devices initially have logged
+ * in their registers.
+ */
+ edac_pci_dev_parity_iterator(edac_pci_dev_parity_clear);
+}
+
+#else /* CONFIG_PCI */
+
+static inline void do_pci_parity_check(void)
+{
+ /* no-op */
+}
+
+static inline void clear_pci_parity_errors(void)
+{
+ /* no-op */
+}
+
+static void edac_sysfs_pci_teardown(void)
+{
+}
+
+static int edac_sysfs_pci_setup(void)
+{
+ return 0;
+}
+#endif /* CONFIG_PCI */
+
#ifndef DISABLE_EDAC_SYSFS
/* EDAC sysfs CSROW data structures and methods */
return err;
/* create a symlink for the device */
- err = sysfs_create_link(edac_mci_kobj, &mci->pdev->dev.kobj,
+ err = sysfs_create_link(edac_mci_kobj, &mci->dev->kobj,
EDAC_DEVICE_SYMLINK);
if (err)
debugf4("\tmci->edac_check = %p\n", mci->edac_check);
debugf3("\tmci->nr_csrows = %d, csrows = %p\n",
mci->nr_csrows, mci->csrows);
- debugf3("\tpdev = %p\n", mci->pdev);
+ debugf3("\tdev = %p\n", mci->dev);
debugf3("\tmod_name:ctl_name = %s:%s\n",
mci->mod_name, mci->ctl_name);
debugf3("\tpvt_info = %p\n\n", mci->pvt_info);
}
EXPORT_SYMBOL_GPL(edac_mc_free);
-static struct mem_ctl_info *find_mci_by_pdev(struct pci_dev *pdev)
+static struct mem_ctl_info *find_mci_by_dev(struct device *dev)
{
struct mem_ctl_info *mci;
struct list_head *item;
list_for_each(item, &mc_devices) {
mci = list_entry(item, struct mem_ctl_info, link);
- if (mci->pdev == pdev)
+ if (mci->dev == dev)
return mci;
}
return NULL;
}
-static int add_mc_to_global_list(struct mem_ctl_info *mci)
+/* Return 0 on success, 1 on failure.
+ * Before calling this function, caller must
+ * assign a unique value to mci->mc_idx.
+ */
+static int add_mc_to_global_list (struct mem_ctl_info *mci)
{
struct list_head *item, *insert_before;
struct mem_ctl_info *p;
- int i;
- if (list_empty(&mc_devices)) {
- mci->mc_idx = 0;
- insert_before = &mc_devices;
- } else {
- if (find_mci_by_pdev(mci->pdev)) {
- edac_printk(KERN_WARNING, EDAC_MC,
- "%s (%s) %s %s already assigned %d\n",
- mci->pdev->dev.bus_id,
- pci_name(mci->pdev), mci->mod_name,
- mci->ctl_name, mci->mc_idx);
- return 1;
- }
+ insert_before = &mc_devices;
- insert_before = NULL;
- i = 0;
+ if (unlikely((p = find_mci_by_dev(mci->dev)) != NULL))
+ goto fail0;
- list_for_each(item, &mc_devices) {
- p = list_entry(item, struct mem_ctl_info, link);
+ list_for_each(item, &mc_devices) {
+ p = list_entry(item, struct mem_ctl_info, link);
- if (p->mc_idx != i) {
- insert_before = item;
- break;
- }
+ if (p->mc_idx >= mci->mc_idx) {
+ if (unlikely(p->mc_idx == mci->mc_idx))
+ goto fail1;
- i++;
+ insert_before = item;
+ break;
}
-
- mci->mc_idx = i;
-
- if (insert_before == NULL)
- insert_before = &mc_devices;
}
list_add_tail_rcu(&mci->link, insert_before);
return 0;
+
+fail0:
+ edac_printk(KERN_WARNING, EDAC_MC,
+ "%s (%s) %s %s already assigned %d\n", p->dev->bus_id,
+ dev_name(p->dev), p->mod_name, p->ctl_name, p->mc_idx);
+ return 1;
+
+fail1:
+ edac_printk(KERN_WARNING, EDAC_MC,
+ "bug in low-level driver: attempt to assign\n"
+ " duplicate mc_idx %d in %s()\n", p->mc_idx, __func__);
+ return 1;
}
static void complete_mc_list_del(struct rcu_head *head)
* edac_mc_add_mc: Insert the 'mci' structure into the mci global list and
* create sysfs entries associated with mci structure
* @mci: pointer to the mci structure to be added to the list
+ * @mc_idx: A unique numeric identifier to be assigned to the 'mci' structure.
*
* Return:
* 0 Success
*/
/* FIXME - should a warning be printed if no error detection? correction? */
-int edac_mc_add_mc(struct mem_ctl_info *mci)
+int edac_mc_add_mc(struct mem_ctl_info *mci, int mc_idx)
{
debugf0("%s()\n", __func__);
+ mci->mc_idx = mc_idx;
#ifdef CONFIG_EDAC_DEBUG
if (edac_debug_level >= 3)
edac_mc_dump_mci(mci);
}
/* Report action taken */
- edac_mc_printk(mci, KERN_INFO, "Giving out device to %s %s: PCI %s\n",
- mci->mod_name, mci->ctl_name, pci_name(mci->pdev));
+ edac_mc_printk(mci, KERN_INFO, "Giving out device to %s %s: DEV %s\n",
+ mci->mod_name, mci->ctl_name, dev_name(mci->dev));
up(&mem_ctls_mutex);
return 0;
/**
* edac_mc_del_mc: Remove sysfs entries for specified mci structure and
* remove mci structure from global list
- * @pdev: Pointer to 'struct pci_dev' representing mci structure to remove.
+ * @pdev: Pointer to 'struct device' representing mci structure to remove.
*
* Return pointer to removed mci structure, or NULL if device not found.
*/
-struct mem_ctl_info * edac_mc_del_mc(struct pci_dev *pdev)
+struct mem_ctl_info * edac_mc_del_mc(struct device *dev)
{
struct mem_ctl_info *mci;
debugf0("MC: %s()\n", __func__);
down(&mem_ctls_mutex);
- if ((mci = find_mci_by_pdev(pdev)) == NULL) {
+ if ((mci = find_mci_by_dev(dev)) == NULL) {
up(&mem_ctls_mutex);
return NULL;
}
del_mc_from_global_list(mci);
up(&mem_ctls_mutex);
edac_printk(KERN_INFO, EDAC_MC,
- "Removed device %d for %s %s: PCI %s\n", mci->mc_idx,
- mci->mod_name, mci->ctl_name, pci_name(mci->pdev));
+ "Removed device %d for %s %s: DEV %s\n", mci->mc_idx,
+ mci->mod_name, mci->ctl_name, dev_name(mci->dev));
return mci;
}
EXPORT_SYMBOL_GPL(edac_mc_del_mc);
}
EXPORT_SYMBOL_GPL(edac_mc_handle_ue_no_info);
-#ifdef CONFIG_PCI
-
-static u16 get_pci_parity_status(struct pci_dev *dev, int secondary)
-{
- int where;
- u16 status;
-
- where = secondary ? PCI_SEC_STATUS : PCI_STATUS;
- pci_read_config_word(dev, where, &status);
-
- /* If we get back 0xFFFF then we must suspect that the card has been
- * pulled but the Linux PCI layer has not yet finished cleaning up.
- * We don't want to report on such devices
- */
-
- if (status == 0xFFFF) {
- u32 sanity;
-
- pci_read_config_dword(dev, 0, &sanity);
-
- if (sanity == 0xFFFFFFFF)
- return 0;
- }
-
- status &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR |
- PCI_STATUS_PARITY;
-
- if (status)
- /* reset only the bits we are interested in */
- pci_write_config_word(dev, where, status);
-
- return status;
-}
-
-typedef void (*pci_parity_check_fn_t) (struct pci_dev *dev);
-
-/* Clear any PCI parity errors logged by this device. */
-static void edac_pci_dev_parity_clear(struct pci_dev *dev)
-{
- u8 header_type;
-
- get_pci_parity_status(dev, 0);
-
- /* read the device TYPE, looking for bridges */
- pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
-
- if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE)
- get_pci_parity_status(dev, 1);
-}
-
-/*
- * PCI Parity polling
- *
- */
-static void edac_pci_dev_parity_test(struct pci_dev *dev)
-{
- u16 status;
- u8 header_type;
-
- /* read the STATUS register on this device
- */
- status = get_pci_parity_status(dev, 0);
-
- debugf2("PCI STATUS= 0x%04x %s\n", status, dev->dev.bus_id );
-
- /* check the status reg for errors */
- if (status) {
- if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
- edac_printk(KERN_CRIT, EDAC_PCI,
- "Signaled System Error on %s\n",
- pci_name(dev));
-
- if (status & (PCI_STATUS_PARITY)) {
- edac_printk(KERN_CRIT, EDAC_PCI,
- "Master Data Parity Error on %s\n",
- pci_name(dev));
-
- atomic_inc(&pci_parity_count);
- }
-
- if (status & (PCI_STATUS_DETECTED_PARITY)) {
- edac_printk(KERN_CRIT, EDAC_PCI,
- "Detected Parity Error on %s\n",
- pci_name(dev));
-
- atomic_inc(&pci_parity_count);
- }
- }
-
- /* read the device TYPE, looking for bridges */
- pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
-
- debugf2("PCI HEADER TYPE= 0x%02x %s\n", header_type, dev->dev.bus_id );
-
- if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
- /* On bridges, need to examine secondary status register */
- status = get_pci_parity_status(dev, 1);
-
- debugf2("PCI SEC_STATUS= 0x%04x %s\n",
- status, dev->dev.bus_id );
-
- /* check the secondary status reg for errors */
- if (status) {
- if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
- edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
- "Signaled System Error on %s\n",
- pci_name(dev));
-
- if (status & (PCI_STATUS_PARITY)) {
- edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
- "Master Data Parity Error on "
- "%s\n", pci_name(dev));
-
- atomic_inc(&pci_parity_count);
- }
-
- if (status & (PCI_STATUS_DETECTED_PARITY)) {
- edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
- "Detected Parity Error on %s\n",
- pci_name(dev));
-
- atomic_inc(&pci_parity_count);
- }
- }
- }
-}
-
-/*
- * check_dev_on_list: Scan for a PCI device on a white/black list
- * @list: an EDAC &edac_pci_device_list white/black list pointer
- * @free_index: index of next free entry on the list
- * @pci_dev: PCI Device pointer
- *
- * see if list contains the device.
- *
- * Returns: 0 not found
- * 1 found on list
- */
-static int check_dev_on_list(struct edac_pci_device_list *list,
- int free_index, struct pci_dev *dev)
-{
- int i;
- int rc = 0; /* Assume not found */
- unsigned short vendor=dev->vendor;
- unsigned short device=dev->device;
-
- /* Scan the list, looking for a vendor/device match */
- for (i = 0; i < free_index; i++, list++ ) {
- if ((list->vendor == vendor ) && (list->device == device )) {
- rc = 1;
- break;
- }
- }
-
- return rc;
-}
-
-/*
- * pci_dev parity list iterator
- * Scan the PCI device list for one iteration, looking for SERRORs
- * Master Parity ERRORS or Parity ERRORs on primary or secondary devices
- */
-static inline void edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn)
-{
- struct pci_dev *dev = NULL;
-
- /* request for kernel access to the next PCI device, if any,
- * and while we are looking at it have its reference count
- * bumped until we are done with it
- */
- while((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- /* if whitelist exists then it has priority, so only scan
- * those devices on the whitelist
- */
- if (pci_whitelist_count > 0 ) {
- if (check_dev_on_list(pci_whitelist,
- pci_whitelist_count, dev))
- fn(dev);
- } else {
- /*
- * if no whitelist, then check if this devices is
- * blacklisted
- */
- if (!check_dev_on_list(pci_blacklist,
- pci_blacklist_count, dev))
- fn(dev);
- }
- }
-}
-
-static void do_pci_parity_check(void)
-{
- unsigned long flags;
- int before_count;
-
- debugf3("%s()\n", __func__);
-
- if (!check_pci_parity)
- return;
-
- before_count = atomic_read(&pci_parity_count);
-
- /* scan all PCI devices looking for a Parity Error on devices and
- * bridges
- */
- local_irq_save(flags);
- edac_pci_dev_parity_iterator(edac_pci_dev_parity_test);
- local_irq_restore(flags);
-
- /* Only if operator has selected panic on PCI Error */
- if (panic_on_pci_parity) {
- /* If the count is different 'after' from 'before' */
- if (before_count != atomic_read(&pci_parity_count))
- panic("EDAC: PCI Parity Error");
- }
-}
-
-static inline void clear_pci_parity_errors(void)
-{
- /* Clear any PCI bus parity errors that devices initially have logged
- * in their registers.
- */
- edac_pci_dev_parity_iterator(edac_pci_dev_parity_clear);
-}
-
-#else /* CONFIG_PCI */
-
-static inline void do_pci_parity_check(void)
-{
- /* no-op */
-}
-
-static inline void clear_pci_parity_errors(void)
-{
- /* no-op */
-}
-
-#endif /* CONFIG_PCI */
/*
* Iterate over all MC instances and check for ECC, et al, errors
module_param(panic_on_ue, int, 0644);
MODULE_PARM_DESC(panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
+#ifdef CONFIG_PCI
module_param(check_pci_parity, int, 0644);
MODULE_PARM_DESC(check_pci_parity, "Check for PCI bus parity errors: 0=off 1=on");
module_param(panic_on_pci_parity, int, 0644);
MODULE_PARM_DESC(panic_on_pci_parity, "Panic on PCI Bus Parity error: 0=off 1=on");
+#endif
module_param(log_ue, int, 0644);
MODULE_PARM_DESC(log_ue, "Log uncorrectable error to console: 0=off 1=on");
module_param(log_ce, int, 0644);
#define PCI_VEND_DEV(vend, dev) PCI_VENDOR_ID_ ## vend, \
PCI_DEVICE_ID_ ## vend ## _ ## dev
+#if defined(CONFIG_X86) && defined(CONFIG_PCI)
+#define dev_name(dev) pci_name(to_pci_dev(dev))
+#else
+#define dev_name(dev) to_platform_device(dev)->name
+#endif
+
/* memory devices */
enum dev_type {
DEV_UNKNOWN = 0,
struct csrow_info *csrows;
/*
* FIXME - what about controllers on other busses? - IDs must be
- * unique. pdev pointer should be sufficiently unique, but
+ * unique. dev pointer should be sufficiently unique, but
* BUS:SLOT.FUNC numbers may not be unique.
*/
- struct pci_dev *pdev;
+ struct device *dev;
const char *mod_name;
const char *mod_ver;
const char *ctl_name;
struct completion kobj_complete;
};
+#ifdef CONFIG_PCI
+
/* write all or some bits in a byte-register*/
static inline void pci_write_bits8(struct pci_dev *pdev, int offset, u8 value,
u8 mask)
pci_write_config_dword(pdev, offset, value);
}
+#endif /* CONFIG_PCI */
+
#ifdef CONFIG_EDAC_DEBUG
void edac_mc_dump_channel(struct channel_info *chan);
void edac_mc_dump_mci(struct mem_ctl_info *mci);
void edac_mc_dump_csrow(struct csrow_info *csrow);
#endif /* CONFIG_EDAC_DEBUG */
-extern int edac_mc_add_mc(struct mem_ctl_info *mci);
-extern struct mem_ctl_info * edac_mc_del_mc(struct pci_dev *pdev);
+extern int edac_mc_add_mc(struct mem_ctl_info *mci,int mc_idx);
+extern struct mem_ctl_info * edac_mc_del_mc(struct device *dev);
extern int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci,
unsigned long page);
extern void edac_mc_scrub_block(unsigned long page, unsigned long offset,
#include <linux/slab.h>
#include "edac_mc.h"
+#define I82860_REVISION " Ver: 2.0.0 " __DATE__
+
#define i82860_printk(level, fmt, arg...) \
edac_printk(level, "i82860", fmt, ##arg)
static void i82860_get_error_info(struct mem_ctl_info *mci,
struct i82860_error_info *info)
{
+ struct pci_dev *pdev;
+
+ pdev = to_pci_dev(mci->dev);
+
/*
* This is a mess because there is no atomic way to read all the
* registers at once and the registers can transition from CE being
* overwritten by UE.
*/
- pci_read_config_word(mci->pdev, I82860_ERRSTS, &info->errsts);
- pci_read_config_dword(mci->pdev, I82860_EAP, &info->eap);
- pci_read_config_word(mci->pdev, I82860_DERRCTL_STS, &info->derrsyn);
- pci_read_config_word(mci->pdev, I82860_ERRSTS, &info->errsts2);
+ pci_read_config_word(pdev, I82860_ERRSTS, &info->errsts);
+ pci_read_config_dword(pdev, I82860_EAP, &info->eap);
+ pci_read_config_word(pdev, I82860_DERRCTL_STS, &info->derrsyn);
+ pci_read_config_word(pdev, I82860_ERRSTS, &info->errsts2);
- pci_write_bits16(mci->pdev, I82860_ERRSTS, 0x0003, 0x0003);
+ pci_write_bits16(pdev, I82860_ERRSTS, 0x0003, 0x0003);
/*
* If the error is the same for both reads then the first set of reads
return;
if ((info->errsts ^ info->errsts2) & 0x0003) {
- pci_read_config_dword(mci->pdev, I82860_EAP, &info->eap);
- pci_read_config_word(mci->pdev, I82860_DERRCTL_STS,
+ pci_read_config_dword(pdev, I82860_EAP, &info->eap);
+ pci_read_config_word(pdev, I82860_DERRCTL_STS,
&info->derrsyn);
}
}
i82860_process_error_info(mci, &info, 1);
}
-static int i82860_probe1(struct pci_dev *pdev, int dev_idx)
+static void i82860_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev)
{
- int rc = -ENODEV;
- int index;
- struct mem_ctl_info *mci = NULL;
unsigned long last_cumul_size;
- struct i82860_error_info discard;
+ u16 mchcfg_ddim; /* DRAM Data Integrity Mode 0=none, 2=edac */
+ u16 value;
+ u32 cumul_size;
+ struct csrow_info *csrow;
+ int index;
+
+ pci_read_config_word(pdev, I82860_MCHCFG, &mchcfg_ddim);
+ mchcfg_ddim = mchcfg_ddim & 0x180;
+ last_cumul_size = 0;
+
+ /* The group row boundary (GRA) reg values are boundary address
+ * for each DRAM row with a granularity of 16MB. GRA regs are
+ * cumulative; therefore GRA15 will contain the total memory contained
+ * in all eight rows.
+ */
+ for (index = 0; index < mci->nr_csrows; index++) {
+ csrow = &mci->csrows[index];
+ pci_read_config_word(pdev, I82860_GBA + index * 2, &value);
+ cumul_size = (value & I82860_GBA_MASK) <<
+ (I82860_GBA_SHIFT - PAGE_SHIFT);
+ debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
+ cumul_size);
- u16 mchcfg_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
+ if (cumul_size == last_cumul_size)
+ continue; /* not populated */
+
+ csrow->first_page = last_cumul_size;
+ csrow->last_page = cumul_size - 1;
+ csrow->nr_pages = cumul_size - last_cumul_size;
+ last_cumul_size = cumul_size;
+ csrow->grain = 1 << 12; /* I82860_EAP has 4KiB reolution */
+ csrow->mtype = MEM_RMBS;
+ csrow->dtype = DEV_UNKNOWN;
+ csrow->edac_mode = mchcfg_ddim ? EDAC_SECDED : EDAC_NONE;
+ }
+}
+
+static int i82860_probe1(struct pci_dev *pdev, int dev_idx)
+{
+ struct mem_ctl_info *mci;
+ struct i82860_error_info discard;
/* RDRAM has channels but these don't map onto the abstractions that
edac uses.
return -ENOMEM;
debugf3("%s(): init mci\n", __func__);
- mci->pdev = pdev;
+ mci->dev = &pdev->dev;
mci->mtype_cap = MEM_FLAG_DDR;
-
mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
/* I"m not sure about this but I think that all RDRAM is SECDED */
mci->edac_cap = EDAC_FLAG_SECDED;
- /* adjust FLAGS */
-
mci->mod_name = EDAC_MOD_STR;
- mci->mod_ver = "$Revision: 1.1.2.6 $";
+ mci->mod_ver = I82860_REVISION;
mci->ctl_name = i82860_devs[dev_idx].ctl_name;
mci->edac_check = i82860_check;
mci->ctl_page_to_phys = NULL;
+ i82860_init_csrows(mci, pdev);
+ i82860_get_error_info(mci, &discard); /* clear counters */
- pci_read_config_word(mci->pdev, I82860_MCHCFG, &mchcfg_ddim);
- mchcfg_ddim = mchcfg_ddim & 0x180;
-
- /*
- * The group row boundary (GRA) reg values are boundary address
- * for each DRAM row with a granularity of 16MB. GRA regs are
- * cumulative; therefore GRA15 will contain the total memory contained
- * in all eight rows.
+ /* Here we assume that we will never see multiple instances of this
+ * type of memory controller. The ID is therefore hardcoded to 0.
*/
- for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
- u16 value;
- u32 cumul_size;
- struct csrow_info *csrow = &mci->csrows[index];
-
- pci_read_config_word(mci->pdev, I82860_GBA + index * 2,
- &value);
-
- cumul_size = (value & I82860_GBA_MASK) <<
- (I82860_GBA_SHIFT - PAGE_SHIFT);
- debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
- cumul_size);
-
- if (cumul_size == last_cumul_size)
- continue; /* not populated */
-
- csrow->first_page = last_cumul_size;
- csrow->last_page = cumul_size - 1;
- csrow->nr_pages = cumul_size - last_cumul_size;
- last_cumul_size = cumul_size;
- csrow->grain = 1 << 12; /* I82860_EAP has 4KiB reolution */
- csrow->mtype = MEM_RMBS;
- csrow->dtype = DEV_UNKNOWN;
- csrow->edac_mode = mchcfg_ddim ? EDAC_SECDED : EDAC_NONE;
+ if (edac_mc_add_mc(mci,0)) {
+ debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
+ goto fail;
}
- i82860_get_error_info(mci, &discard); /* clear counters */
+ /* get this far and it's successful */
+ debugf3("%s(): success\n", __func__);
- if (edac_mc_add_mc(mci)) {
- debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
- edac_mc_free(mci);
- } else {
- /* get this far and it's successful */
- debugf3("%s(): success\n", __func__);
- rc = 0;
- }
+ return 0;
- return rc;
+fail:
+ edac_mc_free(mci);
+ return -ENODEV;
}
/* returns count (>= 0), or negative on error */
debugf0("%s()\n", __func__);
- if ((mci = edac_mc_del_mc(pdev)) == NULL)
+ if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
return;
edac_mc_free(mci);
#include <linux/slab.h>
#include "edac_mc.h"
+#define I82875P_REVISION " Ver: 2.0.0 " __DATE__
+
#define i82875p_printk(level, fmt, arg...) \
edac_printk(level, "i82875p", fmt, ##arg)
static void i82875p_get_error_info(struct mem_ctl_info *mci,
struct i82875p_error_info *info)
{
+ struct pci_dev *pdev;
+
+ pdev = to_pci_dev(mci->dev);
+
/*
* This is a mess because there is no atomic way to read all the
* registers at once and the registers can transition from CE being
* overwritten by UE.
*/
- pci_read_config_word(mci->pdev, I82875P_ERRSTS, &info->errsts);
- pci_read_config_dword(mci->pdev, I82875P_EAP, &info->eap);
- pci_read_config_byte(mci->pdev, I82875P_DES, &info->des);
- pci_read_config_byte(mci->pdev, I82875P_DERRSYN, &info->derrsyn);
- pci_read_config_word(mci->pdev, I82875P_ERRSTS, &info->errsts2);
+ pci_read_config_word(pdev, I82875P_ERRSTS, &info->errsts);
+ pci_read_config_dword(pdev, I82875P_EAP, &info->eap);
+ pci_read_config_byte(pdev, I82875P_DES, &info->des);
+ pci_read_config_byte(pdev, I82875P_DERRSYN, &info->derrsyn);
+ pci_read_config_word(pdev, I82875P_ERRSTS, &info->errsts2);
- pci_write_bits16(mci->pdev, I82875P_ERRSTS, 0x0081, 0x0081);
+ pci_write_bits16(pdev, I82875P_ERRSTS, 0x0081, 0x0081);
/*
* If the error is the same then we can for both reads then
return;
if ((info->errsts ^ info->errsts2) & 0x0081) {
- pci_read_config_dword(mci->pdev, I82875P_EAP, &info->eap);
- pci_read_config_byte(mci->pdev, I82875P_DES, &info->des);
- pci_read_config_byte(mci->pdev, I82875P_DERRSYN,
+ pci_read_config_dword(pdev, I82875P_EAP, &info->eap);
+ pci_read_config_byte(pdev, I82875P_DES, &info->des);
+ pci_read_config_byte(pdev, I82875P_DERRSYN,
&info->derrsyn);
}
}
extern int pci_proc_attach_device(struct pci_dev *);
#endif
-static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
+/* Return 0 on success or 1 on failure. */
+static int i82875p_setup_overfl_dev(struct pci_dev *pdev,
+ struct pci_dev **ovrfl_pdev, void __iomem **ovrfl_window)
{
- int rc = -ENODEV;
- int index;
- struct mem_ctl_info *mci = NULL;
- struct i82875p_pvt *pvt = NULL;
- unsigned long last_cumul_size;
- struct pci_dev *ovrfl_pdev;
- void __iomem *ovrfl_window = NULL;
- u32 drc;
- u32 drc_chan; /* Number of channels 0=1chan,1=2chan */
- u32 nr_chans;
- u32 drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
- struct i82875p_error_info discard;
+ struct pci_dev *dev;
+ void __iomem *window;
- debugf0("%s()\n", __func__);
- ovrfl_pdev = pci_get_device(PCI_VEND_DEV(INTEL, 82875_6), NULL);
+ *ovrfl_pdev = NULL;
+ *ovrfl_window = NULL;
+ dev = pci_get_device(PCI_VEND_DEV(INTEL, 82875_6), NULL);
- if (!ovrfl_pdev) {
- /*
- * Intel tells BIOS developers to hide device 6 which
+ if (dev == NULL) {
+ /* Intel tells BIOS developers to hide device 6 which
* configures the overflow device access containing
* the DRBs - this is where we expose device 6.
* http://www.x86-secret.com/articles/tweak/pat/patsecrets-2.htm
*/
pci_write_bits8(pdev, 0xf4, 0x2, 0x2);
- ovrfl_pdev =
- pci_scan_single_device(pdev->bus, PCI_DEVFN(6, 0));
+ dev = pci_scan_single_device(pdev->bus, PCI_DEVFN(6, 0));
- if (!ovrfl_pdev)
- return -ENODEV;
+ if (dev == NULL)
+ return 1;
}
+ *ovrfl_pdev = dev;
+
#ifdef CONFIG_PROC_FS
- if (!ovrfl_pdev->procent && pci_proc_attach_device(ovrfl_pdev)) {
- i82875p_printk(KERN_ERR,
- "%s(): Failed to attach overflow device\n", __func__);
- return -ENODEV;
+ if ((dev->procent == NULL) && pci_proc_attach_device(dev)) {
+ i82875p_printk(KERN_ERR, "%s(): Failed to attach overflow "
+ "device\n", __func__);
+ return 1;
}
-#endif
- /* CONFIG_PROC_FS */
- if (pci_enable_device(ovrfl_pdev)) {
- i82875p_printk(KERN_ERR,
- "%s(): Failed to enable overflow device\n", __func__);
- return -ENODEV;
+#endif /* CONFIG_PROC_FS */
+ if (pci_enable_device(dev)) {
+ i82875p_printk(KERN_ERR, "%s(): Failed to enable overflow "
+ "device\n", __func__);
+ return 1;
}
- if (pci_request_regions(ovrfl_pdev, pci_name(ovrfl_pdev))) {
+ if (pci_request_regions(dev, pci_name(dev))) {
#ifdef CORRECT_BIOS
goto fail0;
#endif
}
/* cache is irrelevant for PCI bus reads/writes */
- ovrfl_window = ioremap_nocache(pci_resource_start(ovrfl_pdev, 0),
- pci_resource_len(ovrfl_pdev, 0));
+ window = ioremap_nocache(pci_resource_start(dev, 0),
+ pci_resource_len(dev, 0));
- if (!ovrfl_window) {
+ if (window == NULL) {
i82875p_printk(KERN_ERR, "%s(): Failed to ioremap bar6\n",
- __func__);
+ __func__);
goto fail1;
}
- /* need to find out the number of channels */
- drc = readl(ovrfl_window + I82875P_DRC);
- drc_chan = ((drc >> 21) & 0x1);
- nr_chans = drc_chan + 1;
+ *ovrfl_window = window;
+ return 0;
- drc_ddim = (drc >> 18) & 0x1;
- mci = edac_mc_alloc(sizeof(*pvt), I82875P_NR_CSROWS(nr_chans),
- nr_chans);
+fail1:
+ pci_release_regions(dev);
- if (!mci) {
- rc = -ENOMEM;
- goto fail2;
- }
+#ifdef CORRECT_BIOS
+fail0:
+ pci_disable_device(dev);
+#endif
+ /* NOTE: the ovrfl proc entry and pci_dev are intentionally left */
+ return 1;
+}
- debugf3("%s(): init mci\n", __func__);
- mci->pdev = pdev;
- mci->mtype_cap = MEM_FLAG_DDR;
- mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
- mci->edac_cap = EDAC_FLAG_UNKNOWN;
- /* adjust FLAGS */
- mci->mod_name = EDAC_MOD_STR;
- mci->mod_ver = "$Revision: 1.5.2.11 $";
- mci->ctl_name = i82875p_devs[dev_idx].ctl_name;
- mci->edac_check = i82875p_check;
- mci->ctl_page_to_phys = NULL;
- debugf3("%s(): init pvt\n", __func__);
- pvt = (struct i82875p_pvt *) mci->pvt_info;
- pvt->ovrfl_pdev = ovrfl_pdev;
- pvt->ovrfl_window = ovrfl_window;
+/* Return 1 if dual channel mode is active. Else return 0. */
+static inline int dual_channel_active(u32 drc)
+{
+ return (drc >> 21) & 0x1;
+}
- /*
- * The dram row boundary (DRB) reg values are boundary address
+
+static void i82875p_init_csrows(struct mem_ctl_info *mci,
+ struct pci_dev *pdev, void __iomem *ovrfl_window, u32 drc)
+{
+ struct csrow_info *csrow;
+ unsigned long last_cumul_size;
+ u8 value;
+ u32 drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
+ u32 cumul_size;
+ int index;
+
+ drc_ddim = (drc >> 18) & 0x1;
+ last_cumul_size = 0;
+
+ /* The dram row boundary (DRB) reg values are boundary address
* for each DRAM row with a granularity of 32 or 64MB (single/dual
* channel operation). DRB regs are cumulative; therefore DRB7 will
* contain the total memory contained in all eight rows.
*/
- for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
- u8 value;
- u32 cumul_size;
- struct csrow_info *csrow = &mci->csrows[index];
+
+ for (index = 0; index < mci->nr_csrows; index++) {
+ csrow = &mci->csrows[index];
value = readb(ovrfl_window + I82875P_DRB + index);
cumul_size = value << (I82875P_DRB_SHIFT - PAGE_SHIFT);
debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
cumul_size);
-
if (cumul_size == last_cumul_size)
continue; /* not populated */
csrow->last_page = cumul_size - 1;
csrow->nr_pages = cumul_size - last_cumul_size;
last_cumul_size = cumul_size;
- csrow->grain = 1 << 12; /* I82875P_EAP has 4KiB reolution */
+ csrow->grain = 1 << 12; /* I82875P_EAP has 4KiB reolution */
csrow->mtype = MEM_DDR;
csrow->dtype = DEV_UNKNOWN;
csrow->edac_mode = drc_ddim ? EDAC_SECDED : EDAC_NONE;
}
+}
+
+static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
+{
+ int rc = -ENODEV;
+ struct mem_ctl_info *mci;
+ struct i82875p_pvt *pvt;
+ struct pci_dev *ovrfl_pdev;
+ void __iomem *ovrfl_window;
+ u32 drc;
+ u32 nr_chans;
+ struct i82875p_error_info discard;
+
+ debugf0("%s()\n", __func__);
+ ovrfl_pdev = pci_get_device(PCI_VEND_DEV(INTEL, 82875_6), NULL);
+
+ if (i82875p_setup_overfl_dev(pdev, &ovrfl_pdev, &ovrfl_window))
+ return -ENODEV;
+ drc = readl(ovrfl_window + I82875P_DRC);
+ nr_chans = dual_channel_active(drc) + 1;
+ mci = edac_mc_alloc(sizeof(*pvt), I82875P_NR_CSROWS(nr_chans),
+ nr_chans);
+
+ if (!mci) {
+ rc = -ENOMEM;
+ goto fail0;
+ }
+ debugf3("%s(): init mci\n", __func__);
+ mci->dev = &pdev->dev;
+ mci->mtype_cap = MEM_FLAG_DDR;
+ mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
+ mci->edac_cap = EDAC_FLAG_UNKNOWN;
+ mci->mod_name = EDAC_MOD_STR;
+ mci->mod_ver = I82875P_REVISION;
+ mci->ctl_name = i82875p_devs[dev_idx].ctl_name;
+ mci->edac_check = i82875p_check;
+ mci->ctl_page_to_phys = NULL;
+ debugf3("%s(): init pvt\n", __func__);
+ pvt = (struct i82875p_pvt *) mci->pvt_info;
+ pvt->ovrfl_pdev = ovrfl_pdev;
+ pvt->ovrfl_window = ovrfl_window;
+ i82875p_init_csrows(mci, pdev, ovrfl_window, drc);
i82875p_get_error_info(mci, &discard); /* clear counters */
- if (edac_mc_add_mc(mci)) {
+ /* Here we assume that we will never see multiple instances of this
+ * type of memory controller. The ID is therefore hardcoded to 0.
+ */
+ if (edac_mc_add_mc(mci,0)) {
debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
- goto fail3;
+ goto fail1;
}
/* get this far and it's successful */
debugf3("%s(): success\n", __func__);
return 0;
-fail3:
+fail1:
edac_mc_free(mci);
-fail2:
+fail0:
iounmap(ovrfl_window);
-
-fail1:
pci_release_regions(ovrfl_pdev);
-#ifdef CORRECT_BIOS
-fail0:
-#endif
pci_disable_device(ovrfl_pdev);
/* NOTE: the ovrfl proc entry and pci_dev are intentionally left */
return rc;
debugf0("%s()\n", __func__);
- if ((mci = edac_mc_del_mc(pdev)) == NULL)
+ if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
return;
pvt = (struct i82875p_pvt *) mci->pvt_info;
#include <linux/slab.h>
#include "edac_mc.h"
+#define R82600_REVISION " Ver: 2.0.0 " __DATE__
+
#define r82600_printk(level, fmt, arg...) \
edac_printk(level, "r82600", fmt, ##arg)
static void r82600_get_error_info (struct mem_ctl_info *mci,
struct r82600_error_info *info)
{
- pci_read_config_dword(mci->pdev, R82600_EAP, &info->eapr);
+ struct pci_dev *pdev;
+
+ pdev = to_pci_dev(mci->dev);
+ pci_read_config_dword(pdev, R82600_EAP, &info->eapr);
if (info->eapr & BIT(0))
/* Clear error to allow next error to be reported [p.62] */
- pci_write_bits32(mci->pdev, R82600_EAP,
+ pci_write_bits32(pdev, R82600_EAP,
((u32) BIT(0) & (u32) BIT(1)),
((u32) BIT(0) & (u32) BIT(1)));
if (info->eapr & BIT(1))
/* Clear error to allow next error to be reported [p.62] */
- pci_write_bits32(mci->pdev, R82600_EAP,
+ pci_write_bits32(pdev, R82600_EAP,
((u32) BIT(0) & (u32) BIT(1)),
((u32) BIT(0) & (u32) BIT(1)));
}
r82600_process_error_info(mci, &info, 1);
}
-static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
+static inline int ecc_enabled(u8 dramcr)
+{
+ return dramcr & BIT(5);
+}
+
+static void r82600_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
+ u8 dramcr)
{
- int rc = -ENODEV;
+ struct csrow_info *csrow;
int index;
- struct mem_ctl_info *mci = NULL;
+ u8 drbar; /* SDRAM Row Boundry Address Register */
+ u32 row_high_limit, row_high_limit_last;
+ u32 reg_sdram, ecc_on, row_base;
+
+ ecc_on = ecc_enabled(dramcr);
+ reg_sdram = dramcr & BIT(4);
+ row_high_limit_last = 0;
+
+ for (index = 0; index < mci->nr_csrows; index++) {
+ csrow = &mci->csrows[index];
+
+ /* find the DRAM Chip Select Base address and mask */
+ pci_read_config_byte(pdev, R82600_DRBA + index, &drbar);
+
+ debugf1("%s() Row=%d DRBA = %#0x\n", __func__, index, drbar);
+
+ row_high_limit = ((u32) drbar << 24);
+/* row_high_limit = ((u32)drbar << 24) | 0xffffffUL; */
+
+ debugf1("%s() Row=%d, Boundry Address=%#0x, Last = %#0x\n",
+ __func__, index, row_high_limit, row_high_limit_last);
+
+ /* Empty row [p.57] */
+ if (row_high_limit == row_high_limit_last)
+ continue;
+
+ row_base = row_high_limit_last;
+
+ csrow->first_page = row_base >> PAGE_SHIFT;
+ csrow->last_page = (row_high_limit >> PAGE_SHIFT) - 1;
+ csrow->nr_pages = csrow->last_page - csrow->first_page + 1;
+ /* Error address is top 19 bits - so granularity is *
+ * 14 bits */
+ csrow->grain = 1 << 14;
+ csrow->mtype = reg_sdram ? MEM_RDDR : MEM_DDR;
+ /* FIXME - check that this is unknowable with this chipset */
+ csrow->dtype = DEV_UNKNOWN;
+
+ /* Mode is global on 82600 */
+ csrow->edac_mode = ecc_on ? EDAC_SECDED : EDAC_NONE;
+ row_high_limit_last = row_high_limit;
+ }
+}
+
+static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
+{
+ struct mem_ctl_info *mci;
u8 dramcr;
- u32 ecc_on;
- u32 reg_sdram;
u32 eapr;
u32 scrub_disabled;
u32 sdram_refresh_rate;
- u32 row_high_limit_last = 0;
struct r82600_error_info discard;
debugf0("%s()\n", __func__);
pci_read_config_byte(pdev, R82600_DRAMC, &dramcr);
pci_read_config_dword(pdev, R82600_EAP, &eapr);
- ecc_on = dramcr & BIT(5);
- reg_sdram = dramcr & BIT(4);
scrub_disabled = eapr & BIT(31);
sdram_refresh_rate = dramcr & (BIT(0) | BIT(1));
debugf2("%s(): sdram refresh rate = %#0x\n", __func__,
debugf2("%s(): DRAMC register = %#0x\n", __func__, dramcr);
mci = edac_mc_alloc(0, R82600_NR_CSROWS, R82600_NR_CHANS);
- if (mci == NULL) {
- rc = -ENOMEM;
- goto fail;
- }
+ if (mci == NULL)
+ return -ENOMEM;
debugf0("%s(): mci = %p\n", __func__, mci);
- mci->pdev = pdev;
+ mci->dev = &pdev->dev;
mci->mtype_cap = MEM_FLAG_RDDR | MEM_FLAG_DDR;
mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
/* FIXME try to work out if the chip leads have been used for COM2
* is possible. */
mci->edac_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
- if (ecc_on) {
+ if (ecc_enabled(dramcr)) {
if (scrub_disabled)
debugf3("%s(): mci = %p - Scrubbing disabled! EAP: "
"%#0x\n", __func__, mci, eapr);
mci->edac_cap = EDAC_FLAG_NONE;
mci->mod_name = EDAC_MOD_STR;
- mci->mod_ver = "$Revision: 1.1.2.6 $";
+ mci->mod_ver = R82600_REVISION;
mci->ctl_name = "R82600";
mci->edac_check = r82600_check;
mci->ctl_page_to_phys = NULL;
-
- for (index = 0; index < mci->nr_csrows; index++) {
- struct csrow_info *csrow = &mci->csrows[index];
- u8 drbar; /* sDram Row Boundry Address Register */
- u32 row_high_limit;
- u32 row_base;
-
- /* find the DRAM Chip Select Base address and mask */
- pci_read_config_byte(mci->pdev, R82600_DRBA + index, &drbar);
-
- debugf1("MC%d: %s() Row=%d DRBA = %#0x\n", mci->mc_idx,
- __func__, index, drbar);
-
- row_high_limit = ((u32) drbar << 24);
-/* row_high_limit = ((u32)drbar << 24) | 0xffffffUL; */
-
- debugf1("MC%d: %s() Row=%d, Boundry Address=%#0x, Last = "
- "%#0x \n", mci->mc_idx, __func__, index,
- row_high_limit, row_high_limit_last);
-
- /* Empty row [p.57] */
- if (row_high_limit == row_high_limit_last)
- continue;
-
- row_base = row_high_limit_last;
- csrow->first_page = row_base >> PAGE_SHIFT;
- csrow->last_page = (row_high_limit >> PAGE_SHIFT) - 1;
- csrow->nr_pages = csrow->last_page - csrow->first_page + 1;
- /* Error address is top 19 bits - so granularity is *
- * 14 bits */
- csrow->grain = 1 << 14;
- csrow->mtype = reg_sdram ? MEM_RDDR : MEM_DDR;
- /* FIXME - check that this is unknowable with this chipset */
- csrow->dtype = DEV_UNKNOWN;
-
- /* Mode is global on 82600 */
- csrow->edac_mode = ecc_on ? EDAC_SECDED : EDAC_NONE;
- row_high_limit_last = row_high_limit;
- }
-
+ r82600_init_csrows(mci, pdev, dramcr);
r82600_get_error_info(mci, &discard); /* clear counters */
- if (edac_mc_add_mc(mci)) {
+ /* Here we assume that we will never see multiple instances of this
+ * type of memory controller. The ID is therefore hardcoded to 0.
+ */
+ if (edac_mc_add_mc(mci,0)) {
debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
goto fail;
}
if (disable_hardware_scrub) {
debugf3("%s(): Disabling Hardware Scrub (scrub on error)\n",
__func__);
- pci_write_bits32(mci->pdev, R82600_EAP, BIT(31), BIT(31));
+ pci_write_bits32(pdev, R82600_EAP, BIT(31), BIT(31));
}
debugf3("%s(): success\n", __func__);
return 0;
fail:
- if (mci)
- edac_mc_free(mci);
-
- return rc;
+ edac_mc_free(mci);
+ return -ENODEV;
}
/* returns count (>= 0), or negative on error */
debugf0("%s()\n", __func__);
- if ((mci = edac_mc_del_mc(pdev)) == NULL)
+ if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
return;
edac_mc_free(mci);
err = pci_request_region(dev, SMBBAR, i801_driver.name);
if (err) {
dev_err(&dev->dev, "Failed to request SMBus region "
- "0x%lx-0x%lx\n", i801_smba,
- pci_resource_end(dev, SMBBAR));
+ "0x%lx-0x%Lx\n", i801_smba,
+ (unsigned long long)pci_resource_end(dev, SMBBAR));
goto exit;
}
#include <linux/blkdev.h>
#include <linux/init.h>
#include <linux/ioctl.h>
-#include <linux/devfs_fs_kernel.h>
#include <linux/cdev.h>
#include <linux/in.h>
#include <linux/net.h>
#include <linux/config.h>
#include <asm/io.h>
-
-#ifdef CONFIG_PCI
#include <asm/oplib.h>
-#include <asm/ebus.h>
-#endif
+#include <asm/prom.h>
+#include <asm/of_device.h>
static int i8042_kbd_irq = -1;
static int i8042_aux_irq = -1;
#define OBP_PS2MS_NAME1 "kdmouse"
#define OBP_PS2MS_NAME2 "mouse"
+static int __devinit sparc_i8042_probe(struct of_device *op, const struct of_device_id *match)
+{
+ struct device_node *dp = op->node;
+
+ dp = dp->child;
+ while (dp) {
+ if (!strcmp(dp->name, OBP_PS2KBD_NAME1) ||
+ !strcmp(dp->name, OBP_PS2KBD_NAME2)) {
+ struct of_device *kbd = of_find_device_by_node(dp);
+ unsigned int irq = kbd->irqs[0];
+ if (irq == 0xffffffff)
+ irq = op->irqs[0];
+ i8042_kbd_irq = irq;
+ kbd_iobase = of_ioremap(&kbd->resource[0],
+ 0, 8, "kbd");
+ } else if (!strcmp(dp->name, OBP_PS2MS_NAME1) ||
+ !strcmp(dp->name, OBP_PS2MS_NAME2)) {
+ struct of_device *ms = of_find_device_by_node(dp);
+ unsigned int irq = ms->irqs[0];
+ if (irq == 0xffffffff)
+ irq = op->irqs[0];
+ i8042_aux_irq = irq;
+ }
+
+ dp = dp->sibling;
+ }
+
+ return 0;
+}
+
+static int __devexit sparc_i8042_remove(struct of_device *op)
+{
+ of_iounmap(kbd_iobase, 8);
+
+ return 0;
+}
+
+static struct of_device_id sparc_i8042_match[] = {
+ {
+ .name = "8042",
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, i8042_match);
+
+static struct of_platform_driver sparc_i8042_driver = {
+ .name = "i8042",
+ .match_table = sparc_i8042_match,
+ .probe = sparc_i8042_probe,
+ .remove = __devexit_p(sparc_i8042_remove),
+};
+
static int __init i8042_platform_init(void)
{
#ifndef CONFIG_PCI
return -ENODEV;
#else
- char prop[128];
- int len;
+ struct device_node *root = of_find_node_by_path("/");
- len = prom_getproperty(prom_root_node, "name", prop, sizeof(prop));
- if (len < 0) {
- printk("i8042: Cannot get name property of root OBP node.\n");
- return -ENODEV;
- }
- if (strncmp(prop, "SUNW,JavaStation-1", len) == 0) {
+ if (!strcmp(root->name, "SUNW,JavaStation-1")) {
/* Hardcoded values for MrCoffee. */
i8042_kbd_irq = i8042_aux_irq = 13 | 0x20;
kbd_iobase = ioremap(0x71300060, 8);
if (!kbd_iobase)
return -ENODEV;
} else {
- struct linux_ebus *ebus;
- struct linux_ebus_device *edev;
- struct linux_ebus_child *child;
-
- for_each_ebus(ebus) {
- for_each_ebusdev(edev, ebus) {
- if (!strcmp(edev->prom_node->name, "8042"))
- goto edev_found;
- }
- }
- return -ENODEV;
-
- edev_found:
- for_each_edevchild(edev, child) {
- if (!strcmp(child->prom_node->name, OBP_PS2KBD_NAME1) ||
- !strcmp(child->prom_node->name, OBP_PS2KBD_NAME2)) {
- i8042_kbd_irq = child->irqs[0];
- kbd_iobase =
- ioremap(child->resource[0].start, 8);
- }
- if (!strcmp(child->prom_node->name, OBP_PS2MS_NAME1) ||
- !strcmp(child->prom_node->name, OBP_PS2MS_NAME2))
- i8042_aux_irq = child->irqs[0];
- }
+ int err = of_register_driver(&sparc_i8042_driver,
+ &of_bus_type);
+ if (err)
+ return err;
+
if (i8042_kbd_irq == -1 ||
i8042_aux_irq == -1) {
- printk("i8042: Error, 8042 device lacks both kbd and "
- "mouse nodes.\n");
+ if (kbd_iobase) {
+ of_iounmap(kbd_iobase, 8);
+ kbd_iobase = (void __iomem *) NULL;
+ }
return -ENODEV;
}
}
static inline void i8042_platform_exit(void)
{
#ifdef CONFIG_PCI
- iounmap(kbd_iobase);
+ struct device_node *root = of_find_node_by_path("/");
+
+ if (strcmp(root->name, "SUNW,JavaStation-1"))
+ of_unregister_driver(&sparc_i8042_driver);
#endif
}
#define DRV_MODULE_NAME "bnx2"
#define PFX DRV_MODULE_NAME ": "
-#define DRV_MODULE_VERSION "1.4.42"
-#define DRV_MODULE_RELDATE "June 12, 2006"
+#define DRV_MODULE_VERSION "1.4.43"
+#define DRV_MODULE_RELDATE "June 28, 2006"
#define RUN_AT(x) (jiffies + (x))
tx_free_bd += last + 1;
- dev_kfree_skb_irq(skb);
+ dev_kfree_skb(skb);
hw_cons = bp->hw_tx_cons =
sblk->status_tx_quick_consumer_index0;
if ((len > (bp->dev->mtu + ETH_HLEN)) &&
(ntohs(skb->protocol) != 0x8100)) {
- dev_kfree_skb_irq(skb);
+ dev_kfree_skb(skb);
goto next_rx;
}
skb_shinfo(skb)->frags[j].size,
PCI_DMA_TODEVICE);
}
- dev_kfree_skb_any(skb);
+ dev_kfree_skb(skb);
i += j + 1;
}
rx_buf->skb = NULL;
- dev_kfree_skb_any(skb);
+ dev_kfree_skb(skb);
}
}
udelay(5);
pci_unmap_single(bp->pdev, map, pkt_size, PCI_DMA_TODEVICE);
- dev_kfree_skb_irq(skb);
+ dev_kfree_skb(skb);
if (bp->status_blk->status_tx_quick_consumer_index0 != bp->tx_prod) {
goto loopback_test_done;
bnx2_netif_stop(bp);
del_timer_sync(&bp->timer);
if (bp->flags & NO_WOL_FLAG)
- reset_code = BNX2_DRV_MSG_CODE_UNLOAD;
+ reset_code = BNX2_DRV_MSG_CODE_UNLOAD_LNK_DN;
else if (bp->wol)
reset_code = BNX2_DRV_MSG_CODE_SUSPEND_WOL;
else
return 0;
}
+static int
+bnx2_set_tso(struct net_device *dev, u32 data)
+{
+ if (data)
+ dev->features |= NETIF_F_TSO | NETIF_F_TSO_ECN;
+ else
+ dev->features &= ~(NETIF_F_TSO | NETIF_F_TSO_ECN);
+ return 0;
+}
+
#define BNX2_NUM_STATS 46
static struct {
.set_sg = ethtool_op_set_sg,
#ifdef BCM_TSO
.get_tso = ethtool_op_get_tso,
- .set_tso = ethtool_op_set_tso,
+ .set_tso = bnx2_set_tso,
#endif
.self_test_count = bnx2_self_test_count,
.self_test = bnx2_self_test,
dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
#endif
#ifdef BCM_TSO
- dev->features |= NETIF_F_TSO;
+ dev->features |= NETIF_F_TSO | NETIF_F_TSO_ECN;
#endif
netif_carrier_off(bp->dev);
netif_device_detach(dev);
del_timer_sync(&bp->timer);
if (bp->flags & NO_WOL_FLAG)
- reset_code = BNX2_DRV_MSG_CODE_UNLOAD;
+ reset_code = BNX2_DRV_MSG_CODE_UNLOAD_LNK_DN;
else if (bp->wol)
reset_code = BNX2_DRV_MSG_CODE_SUSPEND_WOL;
else
#define BNX2_DRV_MSG_CODE_PULSE 0x06000000
#define BNX2_DRV_MSG_CODE_DIAG 0x07000000
#define BNX2_DRV_MSG_CODE_SUSPEND_NO_WOL 0x09000000
+#define BNX2_DRV_MSG_CODE_UNLOAD_LNK_DN 0x0b000000
#define BNX2_DRV_MSG_DATA 0x00ff0000
#define BNX2_DRV_MSG_DATA_WAIT0 0x00010000
config AU1000_FIR
tristate "Alchemy Au1000 SIR/FIR"
- depends on MIPS_AU1000 && IRDA
+ depends on SOC_AU1000 && IRDA
config SMC_IRCC_FIR
tristate "SMSC IrCC (EXPERIMENTAL)"
module_param(transceiver_type, int, 0444);
MODULE_PARM_DESC(transceiver_type, "IR transceiver type, see mcs7780.h.");
-struct usb_driver mcs_driver = {
+static struct usb_driver mcs_driver = {
.name = "mcs7780",
.probe = mcs_probe,
.disconnect = mcs_disconnect,
static int hme_version_printed;
#ifdef CONFIG_SBUS
-void __init quattro_get_ranges(struct quattro *qp)
+void __devinit quattro_get_ranges(struct quattro *qp)
{
struct sbus_dev *sdev = qp->quattro_dev;
int err;
qp->nranges = (err / sizeof(struct linux_prom_ranges));
}
-static void __init quattro_apply_ranges(struct quattro *qp, struct happy_meal *hp)
+static void __devinit quattro_apply_ranges(struct quattro *qp, struct happy_meal *hp)
{
struct sbus_dev *sdev = hp->happy_dev;
int rng;
*
* Return NULL on failure.
*/
-static struct quattro * __init quattro_sbus_find(struct sbus_dev *goal_sdev)
+static struct quattro * __devinit quattro_sbus_find(struct sbus_dev *goal_sdev)
{
struct sbus_dev *sdev;
struct quattro *qp;
}
}
-static void __devexit quattro_sbus_free_irqs(void)
+static void quattro_sbus_free_irqs(void)
{
struct quattro *qp;
#endif /* CONFIG_PCI */
#ifdef CONFIG_SBUS
-static int __init happy_meal_sbus_probe_one(struct sbus_dev *sdev, int is_qfe)
+static int __devinit happy_meal_sbus_probe_one(struct sbus_dev *sdev, int is_qfe)
{
struct device_node *dp = sdev->ofdev.node;
struct quattro *qp = NULL;
static __inline__ int led_get_diskio_activity(void)
{
static unsigned long last_pgpgin, last_pgpgout;
- struct page_state pgstat;
+ unsigned long events[NR_VM_EVENT_ITEMS];
int changed;
- get_full_page_state(&pgstat); /* get no of sectors in & out */
+ all_vm_events(events);
/* Just use a very simple calculation here. Do not care about overflow,
since we only want to know if there was activity or not. */
- changed = (pgstat.pgpgin != last_pgpgin) || (pgstat.pgpgout != last_pgpgout);
- last_pgpgin = pgstat.pgpgin;
- last_pgpgout = pgstat.pgpgout;
+ changed = (events[PGPGIN] != last_pgpgin) ||
+ (events[PGPGOUT] != last_pgpgout);
+ last_pgpgin = events[PGPGIN];
+ last_pgpgout = events[PGPGOUT];
return (changed ? LED_DISK_IO : 0);
}
/* sunsab.c: ASYNC Driver for the SIEMENS SAB82532 DUSCC.
*
* Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
- * Copyright (C) 2002 David S. Miller (davem@redhat.com)
+ * Copyright (C) 2002, 2006 David S. Miller (davem@davemloft.net)
*
* Rewrote buffer handling to use CIRC(Circular Buffer) macros.
* Maxim Krasnyanskiy <maxk@qualcomm.com>
* Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
*
* Ported to new 2.5.x UART layer.
- * David S. Miller <davem@redhat.com>
+ * David S. Miller <davem@davemloft.net>
*/
#include <linux/config.h>
#include <asm/io.h>
#include <asm/irq.h>
-#include <asm/oplib.h>
-#include <asm/ebus.h>
+#include <asm/prom.h>
+#include <asm/of_device.h>
#if defined(CONFIG_SERIAL_SUNZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
#define SUPPORT_SYSRQ
#define sunsab_console_init() do { } while (0)
#endif
-static void __init for_each_sab_edev(void (*callback)(struct linux_ebus_device *, void *), void *arg)
+static int __devinit sunsab_init_one(struct uart_sunsab_port *up,
+ struct of_device *op,
+ unsigned long offset,
+ int line)
{
- struct linux_ebus *ebus;
- struct linux_ebus_device *edev = NULL;
-
- for_each_ebus(ebus) {
- for_each_ebusdev(edev, ebus) {
- if (!strcmp(edev->prom_node->name, "se")) {
- callback(edev, arg);
- continue;
- } else if (!strcmp(edev->prom_node->name, "serial")) {
- char *compat;
- int clen;
-
- /* On RIO this can be an SE, check it. We could
- * just check ebus->is_rio, but this is more portable.
- */
- compat = of_get_property(edev->prom_node,
- "compatible", &clen);
- if (compat && clen > 0) {
- if (strncmp(compat, "sab82532", 8) == 0) {
- callback(edev, arg);
- continue;
- }
- }
- }
- }
- }
-}
+ up->port.line = line;
+ up->port.dev = &op->dev;
+
+ up->port.mapbase = op->resource[0].start + offset;
+ up->port.membase = of_ioremap(&op->resource[0], offset,
+ sizeof(union sab82532_async_regs),
+ "sab");
+ if (!up->port.membase)
+ return -ENOMEM;
+ up->regs = (union sab82532_async_regs __iomem *) up->port.membase;
-static void __init sab_count_callback(struct linux_ebus_device *edev, void *arg)
-{
- int *count_p = arg;
+ up->port.irq = op->irqs[0];
- (*count_p)++;
-}
+ up->port.fifosize = SAB82532_XMIT_FIFO_SIZE;
+ up->port.iotype = UPIO_MEM;
-static void __init sab_attach_callback(struct linux_ebus_device *edev, void *arg)
-{
- int *instance_p = arg;
- struct uart_sunsab_port *up;
- unsigned long regs, offset;
- int i;
+ writeb(SAB82532_IPC_IC_ACT_LOW, &up->regs->w.ipc);
- /* Note: ports are located in reverse order */
- regs = edev->resource[0].start;
- offset = sizeof(union sab82532_async_regs);
- for (i = 0; i < 2; i++) {
- up = &sunsab_ports[(*instance_p * 2) + 1 - i];
+ up->port.ops = &sunsab_pops;
+ up->port.type = PORT_SUNSAB;
+ up->port.uartclk = SAB_BASE_BAUD;
- memset(up, 0, sizeof(*up));
- up->regs = ioremap(regs + offset, sizeof(union sab82532_async_regs));
- up->port.irq = edev->irqs[0];
- up->port.fifosize = SAB82532_XMIT_FIFO_SIZE;
- up->port.mapbase = (unsigned long)up->regs;
- up->port.iotype = UPIO_MEM;
+ up->type = readb(&up->regs->r.vstr) & 0x0f;
+ writeb(~((1 << 1) | (1 << 2) | (1 << 4)), &up->regs->w.pcr);
+ writeb(0xff, &up->regs->w.pim);
+ if ((up->port.line & 0x1) == 0) {
+ up->pvr_dsr_bit = (1 << 0);
+ up->pvr_dtr_bit = (1 << 1);
+ } else {
+ up->pvr_dsr_bit = (1 << 3);
+ up->pvr_dtr_bit = (1 << 2);
+ }
+ up->cached_pvr = (1 << 1) | (1 << 2) | (1 << 4);
+ writeb(up->cached_pvr, &up->regs->w.pvr);
+ up->cached_mode = readb(&up->regs->rw.mode);
+ up->cached_mode |= SAB82532_MODE_FRTS;
+ writeb(up->cached_mode, &up->regs->rw.mode);
+ up->cached_mode |= SAB82532_MODE_RTS;
+ writeb(up->cached_mode, &up->regs->rw.mode);
- writeb(SAB82532_IPC_IC_ACT_LOW, &up->regs->w.ipc);
+ up->tec_timeout = SAB82532_MAX_TEC_TIMEOUT;
+ up->cec_timeout = SAB82532_MAX_CEC_TIMEOUT;
- offset -= sizeof(union sab82532_async_regs);
+ if (!(up->port.line & 0x01)) {
+ int err;
+
+ err = request_irq(up->port.irq, sunsab_interrupt,
+ SA_SHIRQ, "sab", up);
+ if (err) {
+ of_iounmap(up->port.membase,
+ sizeof(union sab82532_async_regs));
+ return err;
+ }
}
-
- (*instance_p)++;
+
+ return 0;
}
-static int __init probe_for_sabs(void)
+static int __devinit sab_probe(struct of_device *op, const struct of_device_id *match)
{
- int this_sab = 0;
+ static int inst;
+ struct uart_sunsab_port *up;
+ int err;
+
+ up = &sunsab_ports[inst * 2];
+
+ err = sunsab_init_one(&up[0], op,
+ sizeof(union sab82532_async_regs),
+ (inst * 2) + 0);
+ if (err)
+ return err;
+
+ err = sunsab_init_one(&up[0], op, 0,
+ (inst * 2) + 1);
+ if (err) {
+ of_iounmap(up[0].port.membase,
+ sizeof(union sab82532_async_regs));
+ free_irq(up[0].port.irq, &up[0]);
+ return err;
+ }
- /* Find device instances. */
- for_each_sab_edev(&sab_count_callback, &this_sab);
- if (!this_sab)
- return -ENODEV;
+ uart_add_one_port(&sunsab_reg, &up[0].port);
+ uart_add_one_port(&sunsab_reg, &up[1].port);
- /* Allocate tables. */
- sunsab_ports = kmalloc(sizeof(struct uart_sunsab_port) * this_sab * 2,
- GFP_KERNEL);
- if (!sunsab_ports)
- return -ENOMEM;
+ dev_set_drvdata(&op->dev, &up[0]);
- num_channels = this_sab * 2;
+ inst++;
- this_sab = 0;
- for_each_sab_edev(&sab_attach_callback, &this_sab);
return 0;
}
-static void __init sunsab_init_hw(void)
+static void __devexit sab_remove_one(struct uart_sunsab_port *up)
{
- int i;
-
- for (i = 0; i < num_channels; i++) {
- struct uart_sunsab_port *up = &sunsab_ports[i];
-
- up->port.line = i;
- up->port.ops = &sunsab_pops;
- up->port.type = PORT_SUNSAB;
- up->port.uartclk = SAB_BASE_BAUD;
-
- up->type = readb(&up->regs->r.vstr) & 0x0f;
- writeb(~((1 << 1) | (1 << 2) | (1 << 4)), &up->regs->w.pcr);
- writeb(0xff, &up->regs->w.pim);
- if (up->port.line == 0) {
- up->pvr_dsr_bit = (1 << 0);
- up->pvr_dtr_bit = (1 << 1);
- } else {
- up->pvr_dsr_bit = (1 << 3);
- up->pvr_dtr_bit = (1 << 2);
- }
- up->cached_pvr = (1 << 1) | (1 << 2) | (1 << 4);
- writeb(up->cached_pvr, &up->regs->w.pvr);
- up->cached_mode = readb(&up->regs->rw.mode);
- up->cached_mode |= SAB82532_MODE_FRTS;
- writeb(up->cached_mode, &up->regs->rw.mode);
- up->cached_mode |= SAB82532_MODE_RTS;
- writeb(up->cached_mode, &up->regs->rw.mode);
-
- up->tec_timeout = SAB82532_MAX_TEC_TIMEOUT;
- up->cec_timeout = SAB82532_MAX_CEC_TIMEOUT;
-
- if (!(up->port.line & 0x01)) {
- if (request_irq(up->port.irq, sunsab_interrupt,
- SA_SHIRQ, "serial(sab82532)", up)) {
- printk("sunsab%d: can't get IRQ %x\n",
- i, up->port.irq);
- continue;
- }
- }
- }
+ uart_remove_one_port(&sunsab_reg, &up->port);
+ if (!(up->port.line & 1))
+ free_irq(up->port.irq, up);
+ of_iounmap(up->port.membase,
+ sizeof(union sab82532_async_regs));
}
-static int __init sunsab_init(void)
+static int __devexit sab_remove(struct of_device *op)
{
- int ret = probe_for_sabs();
- int i;
-
- if (ret < 0)
- return ret;
+ struct uart_sunsab_port *up = dev_get_drvdata(&op->dev);
- sunsab_init_hw();
+ sab_remove_one(&up[0]);
+ sab_remove_one(&up[1]);
- sunsab_reg.minor = sunserial_current_minor;
- sunsab_reg.nr = num_channels;
+ dev_set_drvdata(&op->dev, NULL);
- ret = uart_register_driver(&sunsab_reg);
- if (ret < 0) {
- int i;
+ return 0;
+}
- for (i = 0; i < num_channels; i++) {
- struct uart_sunsab_port *up = &sunsab_ports[i];
+static struct of_device_id sab_match[] = {
+ {
+ .name = "se",
+ },
+ {
+ .name = "serial",
+ .compatible = "sab82532",
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, sab_match);
- if (!(up->port.line & 0x01))
- free_irq(up->port.irq, up);
- iounmap(up->regs);
- }
- kfree(sunsab_ports);
- sunsab_ports = NULL;
+static struct of_platform_driver sab_driver = {
+ .name = "sab",
+ .match_table = sab_match,
+ .probe = sab_probe,
+ .remove = __devexit_p(sab_remove),
+};
- return ret;
+static int __init sunsab_init(void)
+{
+ struct device_node *dp;
+ int err;
+
+ num_channels = 0;
+ for_each_node_by_name(dp, "su")
+ num_channels += 2;
+ for_each_node_by_name(dp, "serial") {
+ if (of_device_is_compatible(dp, "sab82532"))
+ num_channels += 2;
}
- sunsab_reg.tty_driver->name_base = sunsab_reg.minor - 64;
+ if (num_channels) {
+ sunsab_ports = kzalloc(sizeof(struct uart_sunsab_port) *
+ num_channels, GFP_KERNEL);
+ if (!sunsab_ports)
+ return -ENOMEM;
- sunsab_reg.cons = SUNSAB_CONSOLE();
+ sunsab_reg.minor = sunserial_current_minor;
+ sunsab_reg.nr = num_channels;
- sunserial_current_minor += num_channels;
-
- for (i = 0; i < num_channels; i++) {
- struct uart_sunsab_port *up = &sunsab_ports[i];
+ err = uart_register_driver(&sunsab_reg);
+ if (err) {
+ kfree(sunsab_ports);
+ sunsab_ports = NULL;
- uart_add_one_port(&sunsab_reg, &up->port);
+ return err;
+ }
+
+ sunsab_reg.tty_driver->name_base = sunsab_reg.minor - 64;
+ sunsab_reg.cons = SUNSAB_CONSOLE();
+ sunserial_current_minor += num_channels;
}
- return 0;
+ return of_register_driver(&sab_driver, &of_bus_type);
}
static void __exit sunsab_exit(void)
{
- int i;
-
- for (i = 0; i < num_channels; i++) {
- struct uart_sunsab_port *up = &sunsab_ports[i];
-
- uart_remove_one_port(&sunsab_reg, &up->port);
-
- if (!(up->port.line & 0x01))
- free_irq(up->port.irq, up);
- iounmap(up->regs);
+ of_unregister_driver(&sab_driver);
+ if (num_channels) {
+ sunserial_current_minor -= num_channels;
+ uart_unregister_driver(&sunsab_reg);
}
- sunserial_current_minor -= num_channels;
- uart_unregister_driver(&sunsab_reg);
-
kfree(sunsab_ports);
sunsab_ports = NULL;
}
* Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
*
* Converted to new 2.5.x UART layer.
- * David S. Miller (davem@redhat.com), 2002-Jul-29
+ * David S. Miller (davem@davemloft.net), 2002-Jul-29
*/
#include <linux/config.h>
#include <asm/io.h>
#include <asm/irq.h>
-#include <asm/oplib.h>
-#include <asm/ebus.h>
-#ifdef CONFIG_SPARC64
-#include <asm/isa.h>
-#endif
+#include <asm/prom.h>
+#include <asm/of_device.h>
#if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
#define SUPPORT_SYSRQ
/* Probing information. */
enum su_type su_type;
unsigned int type_probed; /* XXX Stupid */
- int port_node;
+ unsigned long reg_size;
#ifdef CONFIG_SERIO
- struct serio *serio;
+ struct serio serio;
int serio_open;
#endif
};
/* Stop-A is handled by drivers/char/keyboard.c now. */
if (up->su_type == SU_PORT_KBD) {
#ifdef CONFIG_SERIO
- serio_interrupt(up->serio, ch, 0, regs);
+ serio_interrupt(&up->serio, ch, 0, regs);
#endif
} else if (up->su_type == SU_PORT_MS) {
int ret = suncore_mouse_baud_detection(ch, is_break);
case 0:
#ifdef CONFIG_SERIO
- serio_interrupt(up->serio, ch, 0, regs);
+ serio_interrupt(&up->serio, ch, 0, regs);
#endif
break;
};
{
unsigned char status1, status2, scratch, scratch2, scratch3;
unsigned char save_lcr, save_mcr;
- struct linux_ebus_device *dev = NULL;
- struct linux_ebus *ebus;
-#ifdef CONFIG_SPARC64
- struct sparc_isa_bridge *isa_br;
- struct sparc_isa_device *isa_dev;
-#endif
-#ifndef CONFIG_SPARC64
- struct linux_prom_registers reg0;
-#endif
unsigned long flags;
- if (!up->port_node || !up->su_type)
+ if (up->su_type == SU_PORT_NONE)
return;
up->type_probed = PORT_UNKNOWN;
up->port.iotype = UPIO_MEM;
- /*
- * First we look for Ebus-bases su's
- */
- for_each_ebus(ebus) {
- for_each_ebusdev(dev, ebus) {
- if (dev->prom_node->node == up->port_node) {
- /*
- * The EBus is broken on sparc; it delivers
- * virtual addresses in resources. Oh well...
- * This is correct on sparc64, though.
- */
- up->port.membase = (char *) dev->resource[0].start;
- /*
- * This is correct on both architectures.
- */
- up->port.mapbase = dev->resource[0].start;
- up->port.irq = dev->irqs[0];
- goto ebus_done;
- }
- }
- }
-
-#ifdef CONFIG_SPARC64
- for_each_isa(isa_br) {
- for_each_isadev(isa_dev, isa_br) {
- if (isa_dev->prom_node->node == up->port_node) {
- /* Same on sparc64. Cool architecure... */
- up->port.membase = (char *) isa_dev->resource.start;
- up->port.mapbase = isa_dev->resource.start;
- up->port.irq = isa_dev->irq;
- goto ebus_done;
- }
- }
- }
-#endif
-
-#ifdef CONFIG_SPARC64
- /*
- * Not on Ebus, bailing.
- */
- return;
-#else
- /*
- * Not on Ebus, must be OBIO.
- */
- if (prom_getproperty(up->port_node, "reg",
- (char *)®0, sizeof(reg0)) == -1) {
- prom_printf("sunsu: no \"reg\" property\n");
- return;
- }
- prom_apply_obio_ranges(®0, 1);
- if (reg0.which_io != 0) { /* Just in case... */
- prom_printf("sunsu: bus number nonzero: 0x%x:%x\n",
- reg0.which_io, reg0.phys_addr);
- return;
- }
- up->port.mapbase = reg0.phys_addr;
- if ((up->port.membase = ioremap(reg0.phys_addr, reg0.reg_size)) == 0) {
- prom_printf("sunsu: Cannot map registers.\n");
- return;
- }
-
- /*
- * 0x20 is sun4m thing, Dave Redman heritage.
- * See arch/sparc/kernel/irq.c.
- */
-#define IRQ_4M(n) ((n)|0x20)
-
- /*
- * There is no intr property on MrCoffee, so hardwire it.
- */
- up->port.irq = IRQ_4M(13);
-#endif
-
-ebus_done:
-
spin_lock_irqsave(&up->port.lock, flags);
if (!(up->port.flags & UPF_BUGGY_UART)) {
.major = TTY_MAJOR,
};
-static int __init sunsu_kbd_ms_init(struct uart_sunsu_port *up, int channel)
+static int __init sunsu_kbd_ms_init(struct uart_sunsu_port *up)
{
int quot, baud;
#ifdef CONFIG_SERIO
struct serio *serio;
#endif
- spin_lock_init(&up->port.lock);
- up->port.line = channel;
- up->port.type = PORT_UNKNOWN;
- up->port.uartclk = (SU_BASE_BAUD * 16);
-
if (up->su_type == SU_PORT_KBD) {
up->cflag = B1200 | CS8 | CLOCAL | CREAD;
baud = 1200;
sunsu_autoconfig(up);
if (up->port.type == PORT_UNKNOWN)
- return -1;
-
- printk(KERN_INFO "su%d at 0x%p (irq = %d) is a %s\n",
- channel,
- up->port.membase, up->port.irq,
- sunsu_type(&up->port));
+ return -ENODEV;
#ifdef CONFIG_SERIO
- up->serio = serio = kmalloc(sizeof(struct serio), GFP_KERNEL);
- if (serio) {
- memset(serio, 0, sizeof(*serio));
-
- serio->port_data = up;
-
- serio->id.type = SERIO_RS232;
- if (up->su_type == SU_PORT_KBD) {
- serio->id.proto = SERIO_SUNKBD;
- strlcpy(serio->name, "sukbd", sizeof(serio->name));
- } else {
- serio->id.proto = SERIO_SUN;
- serio->id.extra = 1;
- strlcpy(serio->name, "sums", sizeof(serio->name));
- }
- strlcpy(serio->phys, (channel == 0 ? "su/serio0" : "su/serio1"),
- sizeof(serio->phys));
-
- serio->write = sunsu_serio_write;
- serio->open = sunsu_serio_open;
- serio->close = sunsu_serio_close;
+ serio = &up->serio;
+ serio->port_data = up;
- serio_register_port(serio);
+ serio->id.type = SERIO_RS232;
+ if (up->su_type == SU_PORT_KBD) {
+ serio->id.proto = SERIO_SUNKBD;
+ strlcpy(serio->name, "sukbd", sizeof(serio->name));
} else {
- printk(KERN_WARNING "su%d: not enough memory for serio port\n",
- channel);
+ serio->id.proto = SERIO_SUN;
+ serio->id.extra = 1;
+ strlcpy(serio->name, "sums", sizeof(serio->name));
}
+ strlcpy(serio->phys,
+ (!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
+ sizeof(serio->phys));
+
+ serio->write = sunsu_serio_write;
+ serio->open = sunsu_serio_open;
+ serio->close = sunsu_serio_close;
+ serio->dev.parent = up->port.dev;
+
+ serio_register_port(serio);
#endif
sunsu_change_speed(&up->port, up->cflag, 0, quot);
* Register console.
*/
-static inline struct console *SUNSU_CONSOLE(void)
+static inline struct console *SUNSU_CONSOLE(int num_uart)
{
int i;
if (con_is_present())
return NULL;
- for (i = 0; i < UART_NR; i++) {
+ for (i = 0; i < num_uart; i++) {
int this_minor = sunsu_reg.minor + i;
if ((this_minor - 64) == (serial_console - 1))
break;
}
- if (i == UART_NR)
- return NULL;
- if (sunsu_ports[i].port_node == 0)
+ if (i == num_uart)
return NULL;
sunsu_cons.index = i;
return &sunsu_cons;
}
#else
-#define SUNSU_CONSOLE() (NULL)
+#define SUNSU_CONSOLE(num_uart) (NULL)
#define sunsu_serial_console_init() do { } while (0)
#endif
-static int __init sunsu_serial_init(void)
+static enum su_type __devinit su_get_type(struct device_node *dp)
{
- int instance, ret, i;
+ struct device_node *ap = of_find_node_by_path("/aliases");
- /* How many instances do we need? */
- instance = 0;
- for (i = 0; i < UART_NR; i++) {
- struct uart_sunsu_port *up = &sunsu_ports[i];
+ if (ap) {
+ char *keyb = of_get_property(ap, "keyboard", NULL);
+ char *ms = of_get_property(ap, "mouse", NULL);
- if (up->su_type == SU_PORT_MS ||
- up->su_type == SU_PORT_KBD)
- continue;
-
- spin_lock_init(&up->port.lock);
- up->port.flags |= UPF_BOOT_AUTOCONF;
- up->port.type = PORT_UNKNOWN;
- up->port.uartclk = (SU_BASE_BAUD * 16);
+ if (keyb) {
+ if (dp == of_find_node_by_path(keyb))
+ return SU_PORT_KBD;
+ }
+ if (ms) {
+ if (dp == of_find_node_by_path(ms))
+ return SU_PORT_MS;
+ }
+ }
- sunsu_autoconfig(up);
- if (up->port.type == PORT_UNKNOWN)
- continue;
+ return SU_PORT_PORT;
+}
- up->port.line = instance++;
- up->port.ops = &sunsu_pops;
- }
+static int __devinit su_probe(struct of_device *op, const struct of_device_id *match)
+{
+ static int inst;
+ struct device_node *dp = op->node;
+ struct uart_sunsu_port *up;
+ struct resource *rp;
+ int err;
- sunsu_reg.minor = sunserial_current_minor;
+ if (inst >= UART_NR)
+ return -EINVAL;
- sunsu_reg.nr = instance;
+ up = &sunsu_ports[inst];
+ up->port.line = inst;
- ret = uart_register_driver(&sunsu_reg);
- if (ret < 0)
- return ret;
+ spin_lock_init(&up->port.lock);
- sunsu_reg.tty_driver->name_base = sunsu_reg.minor - 64;
+ up->su_type = su_get_type(dp);
- sunserial_current_minor += instance;
+ rp = &op->resource[0];
+ up->port.mapbase = op->resource[0].start;
- sunsu_reg.cons = SUNSU_CONSOLE();
+ up->reg_size = (rp->end - rp->start) + 1;
+ up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
+ if (!up->port.membase)
+ return -ENOMEM;
- for (i = 0; i < UART_NR; i++) {
- struct uart_sunsu_port *up = &sunsu_ports[i];
+ up->port.irq = op->irqs[0];
- /* Do not register Keyboard/Mouse lines with UART
- * layer.
- */
- if (up->su_type == SU_PORT_MS ||
- up->su_type == SU_PORT_KBD)
- continue;
+ up->port.dev = &op->dev;
- if (up->port.type == PORT_UNKNOWN)
- continue;
+ up->port.type = PORT_UNKNOWN;
+ up->port.uartclk = (SU_BASE_BAUD * 16);
- uart_add_one_port(&sunsu_reg, &up->port);
+ err = 0;
+ if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
+ err = sunsu_kbd_ms_init(up);
+ if (err)
+ goto out_unmap;
}
- return 0;
-}
+ up->port.flags |= UPF_BOOT_AUTOCONF;
-static int su_node_ok(int node, char *name, int namelen)
-{
- if (strncmp(name, "su", namelen) == 0 ||
- strncmp(name, "su_pnp", namelen) == 0)
- return 1;
-
- if (strncmp(name, "serial", namelen) == 0) {
- char compat[32];
- int clen;
-
- /* Is it _really_ a 'su' device? */
- clen = prom_getproperty(node, "compatible", compat, sizeof(compat));
- if (clen > 0) {
- if (strncmp(compat, "sab82532", 8) == 0) {
- /* Nope, Siemens serial, not for us. */
- return 0;
- }
- }
- return 1;
- }
+ sunsu_autoconfig(up);
- return 0;
-}
+ err = -ENODEV;
+ if (up->port.type == PORT_UNKNOWN)
+ goto out_unmap;
-#define SU_PROPSIZE 128
+ up->port.ops = &sunsu_pops;
-/*
- * Scan status structure.
- * "prop" is a local variable but it eats stack to keep it in each
- * stack frame of a recursive procedure.
- */
-struct su_probe_scan {
- int msnode, kbnode; /* PROM nodes for mouse and keyboard */
- int msx, kbx; /* minors for mouse and keyboard */
- int devices; /* scan index */
- char prop[SU_PROPSIZE];
-};
+ err = uart_add_one_port(&sunsu_reg, &up->port);
+ if (err)
+ goto out_unmap;
-/*
- * We have several platforms which present 'su' in different parts
- * of the device tree. 'su' may be found under obio, ebus, isa and pci.
- * We walk over the tree and find them wherever PROM hides them.
- */
-static void __init su_probe_any(struct su_probe_scan *t, int sunode)
-{
- struct uart_sunsu_port *up;
- int len;
+ dev_set_drvdata(&op->dev, up);
- if (t->devices >= UART_NR)
- return;
+ inst++;
- for (; sunode != 0; sunode = prom_getsibling(sunode)) {
- len = prom_getproperty(sunode, "name", t->prop, SU_PROPSIZE);
- if (len <= 1)
- continue; /* Broken PROM node */
-
- if (su_node_ok(sunode, t->prop, len)) {
- up = &sunsu_ports[t->devices];
- if (t->kbnode != 0 && sunode == t->kbnode) {
- t->kbx = t->devices;
- up->su_type = SU_PORT_KBD;
- } else if (t->msnode != 0 && sunode == t->msnode) {
- t->msx = t->devices;
- up->su_type = SU_PORT_MS;
- } else {
-#ifdef CONFIG_SPARC64
- /*
- * Do not attempt to use the truncated
- * keyboard/mouse ports as serial ports
- * on Ultras with PC keyboard attached.
- */
- if (prom_getbool(sunode, "mouse"))
- continue;
- if (prom_getbool(sunode, "keyboard"))
- continue;
-#endif
- up->su_type = SU_PORT_PORT;
- }
- up->port_node = sunode;
- ++t->devices;
- } else {
- su_probe_any(t, prom_getchild(sunode));
- }
- }
+ return 0;
+
+out_unmap:
+ of_iounmap(up->port.membase, up->reg_size);
+ return err;
}
-static int __init sunsu_probe(void)
+static int __devexit su_remove(struct of_device *dev)
{
- int node;
- int len;
- struct su_probe_scan scan;
+ struct uart_sunsu_port *up = dev_get_drvdata(&dev->dev);;
- /*
- * First, we scan the tree.
- */
- scan.devices = 0;
- scan.msx = -1;
- scan.kbx = -1;
- scan.kbnode = 0;
- scan.msnode = 0;
+ if (up->su_type == SU_PORT_MS ||
+ up->su_type == SU_PORT_KBD) {
+#ifdef CONFIG_SERIO
+ serio_unregister_port(&up->serio);
+#endif
+ } else if (up->port.type != PORT_UNKNOWN)
+ uart_remove_one_port(&sunsu_reg, &up->port);
- /*
- * Get the nodes for keyboard and mouse from 'aliases'...
- */
- node = prom_getchild(prom_root_node);
- node = prom_searchsiblings(node, "aliases");
- if (node != 0) {
- len = prom_getproperty(node, "keyboard", scan.prop, SU_PROPSIZE);
- if (len > 0) {
- scan.prop[len] = 0;
- scan.kbnode = prom_finddevice(scan.prop);
- }
+ return 0;
+}
- len = prom_getproperty(node, "mouse", scan.prop, SU_PROPSIZE);
- if (len > 0) {
- scan.prop[len] = 0;
- scan.msnode = prom_finddevice(scan.prop);
- }
- }
+static struct of_device_id su_match[] = {
+ {
+ .name = "su",
+ },
+ {
+ .name = "su_pnp",
+ },
+ {
+ .name = "serial",
+ .compatible = "su",
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, su_match);
- su_probe_any(&scan, prom_getchild(prom_root_node));
+static struct of_platform_driver su_driver = {
+ .name = "su",
+ .match_table = su_match,
+ .probe = su_probe,
+ .remove = __devexit_p(su_remove),
+};
- /*
- * Second, we process the special case of keyboard and mouse.
- *
- * Currently if we got keyboard and mouse hooked to "su" ports
- * we do not use any possible remaining "su" as a serial port.
- * Thus, we ignore values of .msx and .kbx, then compact ports.
- */
- if (scan.msx != -1 && scan.kbx != -1) {
- sunsu_ports[0].su_type = SU_PORT_MS;
- sunsu_ports[0].port_node = scan.msnode;
- sunsu_kbd_ms_init(&sunsu_ports[0], 0);
+static int num_uart;
- sunsu_ports[1].su_type = SU_PORT_KBD;
- sunsu_ports[1].port_node = scan.kbnode;
- sunsu_kbd_ms_init(&sunsu_ports[1], 1);
+static int __init sunsu_init(void)
+{
+ struct device_node *dp;
+ int err;
- return 0;
+ num_uart = 0;
+ for_each_node_by_name(dp, "su") {
+ if (su_get_type(dp) == SU_PORT_PORT)
+ num_uart++;
}
-
- if (scan.msx != -1 || scan.kbx != -1) {
- printk("sunsu_probe: cannot match keyboard and mouse, confused\n");
- return -ENODEV;
+ for_each_node_by_name(dp, "su_pnp") {
+ if (su_get_type(dp) == SU_PORT_PORT)
+ num_uart++;
+ }
+ for_each_node_by_name(dp, "serial") {
+ if (of_device_is_compatible(dp, "su")) {
+ if (su_get_type(dp) == SU_PORT_PORT)
+ num_uart++;
+ }
}
- if (scan.devices == 0)
- return -ENODEV;
+ if (num_uart) {
+ sunsu_reg.minor = sunserial_current_minor;
+ sunsu_reg.nr = num_uart;
+ err = uart_register_driver(&sunsu_reg);
+ if (err)
+ return err;
+ sunsu_reg.tty_driver->name_base = sunsu_reg.minor - 64;
+ sunserial_current_minor += num_uart;
+ sunsu_reg.cons = SUNSU_CONSOLE(num_uart);
+ }
- /*
- * Console must be initiated after the generic initialization.
- */
- sunsu_serial_init();
+ err = of_register_driver(&su_driver, &of_bus_type);
+ if (err && num_uart)
+ uart_unregister_driver(&sunsu_reg);
- return 0;
+ return err;
}
static void __exit sunsu_exit(void)
{
- int i, saw_uart;
-
- saw_uart = 0;
- for (i = 0; i < UART_NR; i++) {
- struct uart_sunsu_port *up = &sunsu_ports[i];
-
- if (up->su_type == SU_PORT_MS ||
- up->su_type == SU_PORT_KBD) {
-#ifdef CONFIG_SERIO
- if (up->serio) {
- serio_unregister_port(up->serio);
- up->serio = NULL;
- }
-#endif
- } else if (up->port.type != PORT_UNKNOWN) {
- uart_remove_one_port(&sunsu_reg, &up->port);
- saw_uart++;
- }
- }
-
- if (saw_uart)
+ if (num_uart)
uart_unregister_driver(&sunsu_reg);
}
-module_init(sunsu_probe);
+module_init(sunsu_init);
module_exit(sunsu_exit);
+
+MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
+MODULE_DESCRIPTION("Sun SU serial port driver");
+MODULE_VERSION("2.0");
MODULE_LICENSE("GPL");
-/*
- * sunzilog.c
+/* sunzilog.c: Zilog serial driver for Sparc systems.
*
* Driver for Zilog serial chips found on Sun workstations and
* servers. This driver could actually be made more generic.
* C. Dost, Pete Zaitcev, Ted Ts'o and Alex Buell for their
* work there.
*
- * Copyright (C) 2002 David S. Miller (davem@redhat.com)
+ * Copyright (C) 2002, 2006 David S. Miller (davem@davemloft.net)
*/
#include <linux/config.h>
#include <asm/io.h>
#include <asm/irq.h>
-#ifdef CONFIG_SPARC64
-#include <asm/fhc.h>
-#endif
-#include <asm/sbus.h>
+#include <asm/prom.h>
+#include <asm/of_device.h>
#if defined(CONFIG_SERIAL_SUNZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
#define SUPPORT_SYSRQ
#define ZSDELAY()
#define ZSDELAY_LONG()
#define ZS_WSYNC(__channel) \
- sbus_readb(&((__channel)->control))
+ readb(&((__channel)->control))
#endif
static int num_sunzilog;
unsigned char prev_status;
#ifdef CONFIG_SERIO
- struct serio *serio;
+ struct serio serio;
int serio_open;
#endif
};
{
unsigned char retval;
- sbus_writeb(reg, &channel->control);
+ writeb(reg, &channel->control);
ZSDELAY();
- retval = sbus_readb(&channel->control);
+ retval = readb(&channel->control);
ZSDELAY();
return retval;
static void write_zsreg(struct zilog_channel __iomem *channel,
unsigned char reg, unsigned char value)
{
- sbus_writeb(reg, &channel->control);
+ writeb(reg, &channel->control);
ZSDELAY();
- sbus_writeb(value, &channel->control);
+ writeb(value, &channel->control);
ZSDELAY();
}
for (i = 0; i < 32; i++) {
unsigned char regval;
- regval = sbus_readb(&channel->control);
+ regval = readb(&channel->control);
ZSDELAY();
if (regval & Rx_CH_AV)
break;
regval = read_zsreg(channel, R1);
- sbus_readb(&channel->data);
+ readb(&channel->data);
ZSDELAY();
if (regval & (PAR_ERR | Rx_OVR | CRC_ERR)) {
- sbus_writeb(ERR_RES, &channel->control);
+ writeb(ERR_RES, &channel->control);
ZSDELAY();
ZS_WSYNC(channel);
}
udelay(100);
}
- sbus_writeb(ERR_RES, &channel->control);
+ writeb(ERR_RES, &channel->control);
ZSDELAY();
ZS_WSYNC(channel);
/* Stop-A is handled by drivers/char/keyboard.c now. */
#ifdef CONFIG_SERIO
if (up->serio_open)
- serio_interrupt(up->serio, ch, 0, regs);
+ serio_interrupt(&up->serio, ch, 0, regs);
#endif
} else if (ZS_IS_MOUSE(up)) {
int ret = suncore_mouse_baud_detection(ch, is_break);
case 0:
#ifdef CONFIG_SERIO
if (up->serio_open)
- serio_interrupt(up->serio, ch, 0, regs);
+ serio_interrupt(&up->serio, ch, 0, regs);
#endif
break;
};
r1 = read_zsreg(channel, R1);
if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR)) {
- sbus_writeb(ERR_RES, &channel->control);
+ writeb(ERR_RES, &channel->control);
ZSDELAY();
ZS_WSYNC(channel);
}
- ch = sbus_readb(&channel->control);
+ ch = readb(&channel->control);
ZSDELAY();
/* This funny hack depends upon BRK_ABRT not interfering
if (!(ch & Rx_CH_AV))
break;
- ch = sbus_readb(&channel->data);
+ ch = readb(&channel->data);
ZSDELAY();
ch &= up->parity_mask;
{
unsigned char status;
- status = sbus_readb(&channel->control);
+ status = readb(&channel->control);
ZSDELAY();
- sbus_writeb(RES_EXT_INT, &channel->control);
+ writeb(RES_EXT_INT, &channel->control);
ZSDELAY();
ZS_WSYNC(channel);
* confusing the PROM.
*/
while (1) {
- status = sbus_readb(&channel->control);
+ status = readb(&channel->control);
ZSDELAY();
if (!(status & BRK_ABRT))
break;
struct circ_buf *xmit;
if (ZS_IS_CONS(up)) {
- unsigned char status = sbus_readb(&channel->control);
+ unsigned char status = readb(&channel->control);
ZSDELAY();
/* TX still busy? Just wait for the next TX done interrupt.
if (up->port.x_char) {
up->flags |= SUNZILOG_FLAG_TX_ACTIVE;
- sbus_writeb(up->port.x_char, &channel->data);
+ writeb(up->port.x_char, &channel->data);
ZSDELAY();
ZS_WSYNC(channel);
goto ack_tx_int;
up->flags |= SUNZILOG_FLAG_TX_ACTIVE;
- sbus_writeb(xmit->buf[xmit->tail], &channel->data);
+ writeb(xmit->buf[xmit->tail], &channel->data);
ZSDELAY();
ZS_WSYNC(channel);
return;
ack_tx_int:
- sbus_writeb(RES_Tx_P, &channel->control);
+ writeb(RES_Tx_P, &channel->control);
ZSDELAY();
ZS_WSYNC(channel);
}
/* Channel A */
tty = NULL;
if (r3 & (CHAEXT | CHATxIP | CHARxIP)) {
- sbus_writeb(RES_H_IUS, &channel->control);
+ writeb(RES_H_IUS, &channel->control);
ZSDELAY();
ZS_WSYNC(channel);
spin_lock(&up->port.lock);
tty = NULL;
if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) {
- sbus_writeb(RES_H_IUS, &channel->control);
+ writeb(RES_H_IUS, &channel->control);
ZSDELAY();
ZS_WSYNC(channel);
unsigned char status;
channel = ZILOG_CHANNEL_FROM_PORT(port);
- status = sbus_readb(&channel->control);
+ status = readb(&channel->control);
ZSDELAY();
return status;
up->flags |= SUNZILOG_FLAG_TX_ACTIVE;
up->flags &= ~SUNZILOG_FLAG_TX_STOPPED;
- status = sbus_readb(&channel->control);
+ status = readb(&channel->control);
ZSDELAY();
/* TX busy? Just wait for the TX done interrupt. */
* IRQ sending engine.
*/
if (port->x_char) {
- sbus_writeb(port->x_char, &channel->data);
+ writeb(port->x_char, &channel->data);
ZSDELAY();
ZS_WSYNC(channel);
} else {
struct circ_buf *xmit = &port->info->xmit;
- sbus_writeb(xmit->buf[xmit->tail], &channel->data);
+ writeb(xmit->buf[xmit->tail], &channel->data);
ZSDELAY();
ZS_WSYNC(channel);
struct zilog_channel __iomem *channel;
channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
- up->prev_status = sbus_readb(&channel->control);
+ up->prev_status = readb(&channel->control);
/* Enable receiver and transmitter. */
up->curregs[R3] |= RxENAB;
static const char *sunzilog_type(struct uart_port *port)
{
- return "SunZilog";
+ return "zs";
}
/* We do not request/release mappings of the registers here, this
static struct zilog_layout __iomem **sunzilog_chip_regs;
static struct uart_sunzilog_port *sunzilog_irq_chain;
-static int zilog_irq = -1;
static struct uart_driver sunzilog_reg = {
.owner = THIS_MODULE,
.major = TTY_MAJOR,
};
-static void * __init alloc_one_table(unsigned long size)
-{
- void *ret;
-
- ret = kmalloc(size, GFP_KERNEL);
- if (ret != NULL)
- memset(ret, 0, size);
-
- return ret;
-}
-
-static void __init sunzilog_alloc_tables(void)
-{
- sunzilog_port_table =
- alloc_one_table(NUM_CHANNELS * sizeof(struct uart_sunzilog_port));
- sunzilog_chip_regs =
- alloc_one_table(NUM_SUNZILOG * sizeof(struct zilog_layout __iomem *));
-
- if (sunzilog_port_table == NULL || sunzilog_chip_regs == NULL) {
- prom_printf("SunZilog: Cannot allocate tables.\n");
- prom_halt();
- }
-}
-
-#ifdef CONFIG_SPARC64
-
-/* We used to attempt to use the address property of the Zilog device node
- * but that totally is not necessary on sparc64.
- */
-static struct zilog_layout __iomem * __init get_zs_sun4u(int chip, int zsnode)
+static int __init sunzilog_alloc_tables(void)
{
- void __iomem *mapped_addr;
- unsigned int sun4u_ino;
- struct sbus_bus *sbus = NULL;
- struct sbus_dev *sdev = NULL;
- int err;
-
- if (central_bus == NULL) {
- for_each_sbus(sbus) {
- for_each_sbusdev(sdev, sbus) {
- if (sdev->prom_node == zsnode)
- goto found;
- }
- }
- }
- found:
- if (sdev == NULL && central_bus == NULL) {
- prom_printf("SunZilog: sdev&¢ral == NULL for "
- "Zilog %d in get_zs_sun4u.\n", chip);
- prom_halt();
- }
- if (central_bus == NULL) {
- mapped_addr =
- sbus_ioremap(&sdev->resource[0], 0,
- PAGE_SIZE,
- "Zilog Registers");
- } else {
- struct linux_prom_registers zsregs[1];
-
- err = prom_getproperty(zsnode, "reg",
- (char *) &zsregs[0],
- sizeof(zsregs));
- if (err == -1) {
- prom_printf("SunZilog: Cannot map "
- "Zilog %d regs on "
- "central bus.\n", chip);
- prom_halt();
- }
- apply_fhc_ranges(central_bus->child,
- &zsregs[0], 1);
- apply_central_ranges(central_bus, &zsregs[0], 1);
- mapped_addr = (void __iomem *)
- ((((u64)zsregs[0].which_io)<<32UL) |
- ((u64)zsregs[0].phys_addr));
- }
-
- if (zilog_irq == -1) {
- if (central_bus) {
- unsigned long iclr, imap;
-
- iclr = central_bus->child->fhc_regs.uregs
- + FHC_UREGS_ICLR;
- imap = central_bus->child->fhc_regs.uregs
- + FHC_UREGS_IMAP;
- zilog_irq = build_irq(0, iclr, imap);
- } else {
- err = prom_getproperty(zsnode, "interrupts",
- (char *) &sun4u_ino,
- sizeof(sun4u_ino));
- zilog_irq = sbus_build_irq(sbus_root, sun4u_ino);
- }
- }
-
- return (struct zilog_layout __iomem *) mapped_addr;
-}
-#else /* CONFIG_SPARC64 */
-
-/*
- * XXX The sun4d case is utterly screwed: it tries to re-walk the tree
- * (for the 3rd time) in order to find bootbus and cpu. Streamline it.
- */
-static struct zilog_layout __iomem * __init get_zs_sun4cmd(int chip, int node)
-{
- struct linux_prom_irqs irq_info[2];
- void __iomem *mapped_addr = NULL;
- int zsnode, cpunode, bbnode;
- struct linux_prom_registers zsreg[4];
- struct resource res;
-
- if (sparc_cpu_model == sun4d) {
- int walk;
-
- zsnode = 0;
- bbnode = 0;
- cpunode = 0;
- for (walk = prom_getchild(prom_root_node);
- (walk = prom_searchsiblings(walk, "cpu-unit")) != 0;
- walk = prom_getsibling(walk)) {
- bbnode = prom_getchild(walk);
- if (bbnode &&
- (bbnode = prom_searchsiblings(bbnode, "bootbus"))) {
- if ((zsnode = prom_getchild(bbnode)) == node) {
- cpunode = walk;
- break;
- }
- }
- }
- if (!walk) {
- prom_printf("SunZilog: Cannot find the %d'th bootbus on sun4d.\n",
- (chip / 2));
- prom_halt();
- }
+ struct uart_sunzilog_port *up;
+ unsigned long size;
+ int i;
- if (prom_getproperty(zsnode, "reg",
- (char *) zsreg, sizeof(zsreg)) == -1) {
- prom_printf("SunZilog: Cannot map Zilog %d\n", chip);
- prom_halt();
- }
- /* XXX Looks like an off by one? */
- prom_apply_generic_ranges(bbnode, cpunode, zsreg, 1);
- res.start = zsreg[0].phys_addr;
- res.end = res.start + (8 - 1);
- res.flags = zsreg[0].which_io | IORESOURCE_IO;
- mapped_addr = sbus_ioremap(&res, 0, 8, "Zilog Serial");
+ size = NUM_CHANNELS * sizeof(struct uart_sunzilog_port);
+ sunzilog_port_table = kzalloc(size, GFP_KERNEL);
+ if (!sunzilog_port_table)
+ return -ENOMEM;
- } else {
- zsnode = node;
+ for (i = 0; i < NUM_CHANNELS; i++) {
+ up = &sunzilog_port_table[i];
-#if 0 /* XXX When was this used? */
- if (prom_getintdefault(zsnode, "slave", -1) != chipid) {
- zsnode = prom_getsibling(zsnode);
- continue;
- }
-#endif
+ spin_lock_init(&up->port.lock);
- /*
- * "address" is only present on ports that OBP opened
- * (from Mitch Bradley's "Hitchhiker's Guide to OBP").
- * We do not use it.
- */
+ if (i == 0)
+ sunzilog_irq_chain = up;
- if (prom_getproperty(zsnode, "reg",
- (char *) zsreg, sizeof(zsreg)) == -1) {
- prom_printf("SunZilog: Cannot map Zilog %d\n", chip);
- prom_halt();
- }
- if (sparc_cpu_model == sun4m) /* Crude. Pass parent. XXX */
- prom_apply_obio_ranges(zsreg, 1);
- res.start = zsreg[0].phys_addr;
- res.end = res.start + (8 - 1);
- res.flags = zsreg[0].which_io | IORESOURCE_IO;
- mapped_addr = sbus_ioremap(&res, 0, 8, "Zilog Serial");
+ if (i < NUM_CHANNELS - 1)
+ up->next = up + 1;
+ else
+ up->next = NULL;
}
- if (prom_getproperty(zsnode, "intr",
- (char *) irq_info, sizeof(irq_info))
- % sizeof(struct linux_prom_irqs)) {
- prom_printf("SunZilog: Cannot get IRQ property for Zilog %d.\n",
- chip);
- prom_halt();
- }
- if (zilog_irq == -1) {
- zilog_irq = irq_info[0].pri;
- } else if (zilog_irq != irq_info[0].pri) {
- /* XXX. Dumb. Should handle per-chip IRQ, for add-ons. */
- prom_printf("SunZilog: Inconsistent IRQ layout for Zilog %d.\n",
- chip);
- prom_halt();
+ size = NUM_SUNZILOG * sizeof(struct zilog_layout __iomem *);
+ sunzilog_chip_regs = kzalloc(size, GFP_KERNEL);
+ if (!sunzilog_chip_regs) {
+ kfree(sunzilog_port_table);
+ sunzilog_irq_chain = NULL;
+ return -ENOMEM;
}
- return (struct zilog_layout __iomem *) mapped_addr;
+ return 0;
}
-#endif /* !(CONFIG_SPARC64) */
-/* Get the address of the registers for SunZilog instance CHIP. */
-static struct zilog_layout __iomem * __init get_zs(int chip, int node)
+static void sunzilog_free_tables(void)
{
- if (chip < 0 || chip >= NUM_SUNZILOG) {
- prom_printf("SunZilog: Illegal chip number %d in get_zs.\n", chip);
- prom_halt();
- }
-
-#ifdef CONFIG_SPARC64
- return get_zs_sun4u(chip, node);
-#else
-
- if (sparc_cpu_model == sun4) {
- struct resource res;
-
- /* Not probe-able, hard code it. */
- switch (chip) {
- case 0:
- res.start = 0xf1000000;
- break;
- case 1:
- res.start = 0xf0000000;
- break;
- };
- zilog_irq = 12;
- res.end = (res.start + (8 - 1));
- res.flags = IORESOURCE_IO;
- return sbus_ioremap(&res, 0, 8, "SunZilog");
- }
-
- return get_zs_sun4cmd(chip, node);
-#endif
+ kfree(sunzilog_port_table);
+ sunzilog_irq_chain = NULL;
+ kfree(sunzilog_chip_regs);
}
#define ZS_PUT_CHAR_MAX_DELAY 2000 /* 10 ms */
* udelay with ZSDELAY as that is a NOP on some platforms. -DaveM
*/
do {
- unsigned char val = sbus_readb(&channel->control);
+ unsigned char val = readb(&channel->control);
if (val & Tx_BUF_EMP) {
ZSDELAY();
break;
udelay(5);
} while (--loops);
- sbus_writeb(ch, &channel->data);
+ writeb(ch, &channel->data);
ZSDELAY();
ZS_WSYNC(channel);
}
.data = &sunzilog_reg,
};
-static int __init sunzilog_console_init(void)
-{
- int i;
-
- if (con_is_present())
- return 0;
-
- for (i = 0; i < NUM_CHANNELS; i++) {
- int this_minor = sunzilog_reg.minor + i;
-
- if ((this_minor - 64) == (serial_console - 1))
- break;
- }
- if (i == NUM_CHANNELS)
- return 0;
-
- sunzilog_console.index = i;
- sunzilog_port_table[i].flags |= SUNZILOG_FLAG_IS_CONS;
- register_console(&sunzilog_console);
- return 0;
-}
-
static inline struct console *SUNZILOG_CONSOLE(void)
{
int i;
#else
#define SUNZILOG_CONSOLE() (NULL)
-#define sunzilog_console_init() do { } while (0)
#endif
-/*
- * We scan the PROM tree recursively. This is the most reliable way
- * to find Zilog nodes on various platforms. However, we face an extreme
- * shortage of kernel stack, so we must be very careful. To that end,
- * we scan only to a certain depth, and we use a common property buffer
- * in the scan structure.
- */
-#define ZS_PROPSIZE 128
-#define ZS_SCAN_DEPTH 5
-
-struct zs_probe_scan {
- int depth;
- void (*scanner)(struct zs_probe_scan *t, int node);
-
- int devices;
- char prop[ZS_PROPSIZE];
-};
-
-static int __inline__ sunzilog_node_ok(int node, const char *name, int len)
-{
- if (strncmp(name, "zs", len) == 0)
- return 1;
- /* Don't fold this procedure just yet. Compare to su_node_ok(). */
- return 0;
-}
-
-static void __init sunzilog_scan(struct zs_probe_scan *t, int node)
-{
- int len;
-
- for (; node != 0; node = prom_getsibling(node)) {
- len = prom_getproperty(node, "name", t->prop, ZS_PROPSIZE);
- if (len <= 1)
- continue; /* Broken PROM node */
- if (sunzilog_node_ok(node, t->prop, len)) {
- (*t->scanner)(t, node);
- } else {
- if (t->depth < ZS_SCAN_DEPTH) {
- t->depth++;
- sunzilog_scan(t, prom_getchild(node));
- --t->depth;
- }
- }
- }
-}
-
-static void __init sunzilog_prepare(void)
-{
- struct uart_sunzilog_port *up;
- struct zilog_layout __iomem *rp;
- int channel, chip;
-
- /*
- * Temporary fix.
- */
- for (channel = 0; channel < NUM_CHANNELS; channel++)
- spin_lock_init(&sunzilog_port_table[channel].port.lock);
-
- sunzilog_irq_chain = up = &sunzilog_port_table[0];
- for (channel = 0; channel < NUM_CHANNELS - 1; channel++)
- up[channel].next = &up[channel + 1];
- up[channel].next = NULL;
-
- for (chip = 0; chip < NUM_SUNZILOG; chip++) {
- rp = sunzilog_chip_regs[chip];
- up[(chip * 2) + 0].port.membase = (void __iomem *)&rp->channelA;
- up[(chip * 2) + 1].port.membase = (void __iomem *)&rp->channelB;
-
- /* Channel A */
- up[(chip * 2) + 0].port.iotype = UPIO_MEM;
- up[(chip * 2) + 0].port.irq = zilog_irq;
- up[(chip * 2) + 0].port.uartclk = ZS_CLOCK;
- up[(chip * 2) + 0].port.fifosize = 1;
- up[(chip * 2) + 0].port.ops = &sunzilog_pops;
- up[(chip * 2) + 0].port.type = PORT_SUNZILOG;
- up[(chip * 2) + 0].port.flags = 0;
- up[(chip * 2) + 0].port.line = (chip * 2) + 0;
- up[(chip * 2) + 0].flags |= SUNZILOG_FLAG_IS_CHANNEL_A;
-
- /* Channel B */
- up[(chip * 2) + 1].port.iotype = UPIO_MEM;
- up[(chip * 2) + 1].port.irq = zilog_irq;
- up[(chip * 2) + 1].port.uartclk = ZS_CLOCK;
- up[(chip * 2) + 1].port.fifosize = 1;
- up[(chip * 2) + 1].port.ops = &sunzilog_pops;
- up[(chip * 2) + 1].port.type = PORT_SUNZILOG;
- up[(chip * 2) + 1].port.flags = 0;
- up[(chip * 2) + 1].port.line = (chip * 2) + 1;
- up[(chip * 2) + 1].flags |= 0;
- }
-}
-
static void __init sunzilog_init_kbdms(struct uart_sunzilog_port *up, int channel)
{
int baud, brg;
up->cflag = B4800 | CS8 | CLOCAL | CREAD;
baud = 4800;
}
- printk(KERN_INFO "zs%d at 0x%p (irq = %d) is a SunZilog\n",
- channel, up->port.membase, zilog_irq);
up->curregs[R15] = BRKIE;
brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR);
#ifdef CONFIG_SERIO
static void __init sunzilog_register_serio(struct uart_sunzilog_port *up, int channel)
{
- struct serio *serio;
-
- up->serio = serio = kmalloc(sizeof(struct serio), GFP_KERNEL);
- if (serio) {
- memset(serio, 0, sizeof(*serio));
-
- serio->port_data = up;
-
- serio->id.type = SERIO_RS232;
- if (channel == KEYBOARD_LINE) {
- serio->id.proto = SERIO_SUNKBD;
- strlcpy(serio->name, "zskbd", sizeof(serio->name));
- } else {
- serio->id.proto = SERIO_SUN;
- serio->id.extra = 1;
- strlcpy(serio->name, "zsms", sizeof(serio->name));
- }
- strlcpy(serio->phys,
- (channel == KEYBOARD_LINE ? "zs/serio0" : "zs/serio1"),
- sizeof(serio->phys));
+ struct serio *serio = &up->serio;
- serio->write = sunzilog_serio_write;
- serio->open = sunzilog_serio_open;
- serio->close = sunzilog_serio_close;
+ serio->port_data = up;
- serio_register_port(serio);
+ serio->id.type = SERIO_RS232;
+ if (channel == KEYBOARD_LINE) {
+ serio->id.proto = SERIO_SUNKBD;
+ strlcpy(serio->name, "zskbd", sizeof(serio->name));
} else {
- printk(KERN_WARNING "zs%d: not enough memory for serio port\n",
- channel);
+ serio->id.proto = SERIO_SUN;
+ serio->id.extra = 1;
+ strlcpy(serio->name, "zsms", sizeof(serio->name));
}
+ strlcpy(serio->phys,
+ (channel == KEYBOARD_LINE ? "zs/serio0" : "zs/serio1"),
+ sizeof(serio->phys));
+
+ serio->write = sunzilog_serio_write;
+ serio->open = sunzilog_serio_open;
+ serio->close = sunzilog_serio_close;
+ serio->dev.parent = up->port.dev;
+
+ serio_register_port(serio);
}
#endif
-static void __init sunzilog_init_hw(void)
+static void __init sunzilog_init_hw(struct uart_sunzilog_port *up)
{
- int i;
-
- for (i = 0; i < NUM_CHANNELS; i++) {
- struct uart_sunzilog_port *up = &sunzilog_port_table[i];
- struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
- unsigned long flags;
- int baud, brg;
+ struct zilog_channel __iomem *channel;
+ unsigned long flags;
+ int baud, brg;
- spin_lock_irqsave(&up->port.lock, flags);
+ channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
- if (ZS_IS_CHANNEL_A(up)) {
- write_zsreg(channel, R9, FHWRES);
- ZSDELAY_LONG();
- (void) read_zsreg(channel, R0);
- }
+ spin_lock_irqsave(&up->port.lock, flags);
+ if (ZS_IS_CHANNEL_A(up)) {
+ write_zsreg(channel, R9, FHWRES);
+ ZSDELAY_LONG();
+ (void) read_zsreg(channel, R0);
+ }
- if (i == KEYBOARD_LINE || i == MOUSE_LINE) {
- sunzilog_init_kbdms(up, i);
- up->curregs[R9] |= (NV | MIE);
- write_zsreg(channel, R9, up->curregs[R9]);
- } else {
- /* Normal serial TTY. */
- up->parity_mask = 0xff;
- up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB;
- up->curregs[R4] = PAR_EVEN | X16CLK | SB1;
- up->curregs[R3] = RxENAB | Rx8;
- up->curregs[R5] = TxENAB | Tx8;
- up->curregs[R9] = NV | MIE;
- up->curregs[R10] = NRZ;
- up->curregs[R11] = TCBR | RCBR;
- baud = 9600;
- brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR);
- up->curregs[R12] = (brg & 0xff);
- up->curregs[R13] = (brg >> 8) & 0xff;
- up->curregs[R14] = BRSRC | BRENAB;
- __load_zsregs(channel, up->curregs);
- write_zsreg(channel, R9, up->curregs[R9]);
- }
+ if (up->port.line == KEYBOARD_LINE ||
+ up->port.line == MOUSE_LINE) {
+ sunzilog_init_kbdms(up, up->port.line);
+ up->curregs[R9] |= (NV | MIE);
+ write_zsreg(channel, R9, up->curregs[R9]);
+ } else {
+ /* Normal serial TTY. */
+ up->parity_mask = 0xff;
+ up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB;
+ up->curregs[R4] = PAR_EVEN | X16CLK | SB1;
+ up->curregs[R3] = RxENAB | Rx8;
+ up->curregs[R5] = TxENAB | Tx8;
+ up->curregs[R9] = NV | MIE;
+ up->curregs[R10] = NRZ;
+ up->curregs[R11] = TCBR | RCBR;
+ baud = 9600;
+ brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR);
+ up->curregs[R12] = (brg & 0xff);
+ up->curregs[R13] = (brg >> 8) & 0xff;
+ up->curregs[R14] = BRSRC | BRENAB;
+ __load_zsregs(channel, up->curregs);
+ write_zsreg(channel, R9, up->curregs[R9]);
+ }
- spin_unlock_irqrestore(&up->port.lock, flags);
+ spin_unlock_irqrestore(&up->port.lock, flags);
#ifdef CONFIG_SERIO
- if (i == KEYBOARD_LINE || i == MOUSE_LINE)
- sunzilog_register_serio(up, i);
+ if (up->port.line == KEYBOARD_LINE || up->port.line == MOUSE_LINE)
+ sunzilog_register_serio(up, up->port.line);
#endif
- }
-}
-
-static struct zilog_layout __iomem * __init get_zs(int chip, int node);
-
-static void __init sunzilog_scan_probe(struct zs_probe_scan *t, int node)
-{
- sunzilog_chip_regs[t->devices] = get_zs(t->devices, node);
- t->devices++;
}
-static int __init sunzilog_ports_init(void)
+static int __devinit zs_get_instance(struct device_node *dp)
{
- struct zs_probe_scan scan;
int ret;
- int uart_count;
- int i;
-
- printk(KERN_DEBUG "SunZilog: %d chips.\n", NUM_SUNZILOG);
-
- scan.scanner = sunzilog_scan_probe;
- scan.depth = 0;
- scan.devices = 0;
- sunzilog_scan(&scan, prom_getchild(prom_root_node));
-
- sunzilog_prepare();
- if (request_irq(zilog_irq, sunzilog_interrupt, SA_SHIRQ,
- "SunZilog", sunzilog_irq_chain)) {
- prom_printf("SunZilog: Unable to register zs interrupt handler.\n");
- prom_halt();
- }
+ ret = of_getintprop_default(dp, "slave", -1);
+ if (ret != -1)
+ return ret;
- sunzilog_init_hw();
+ if (of_find_property(dp, "keyboard", NULL))
+ ret = 1;
+ else
+ ret = 0;
- /* We can only init this once we have probed the Zilogs
- * in the system. Do not count channels assigned to keyboards
- * or mice when we are deciding how many ports to register.
- */
- uart_count = 0;
- for (i = 0; i < NUM_CHANNELS; i++) {
- struct uart_sunzilog_port *up = &sunzilog_port_table[i];
+ return ret;
+}
- if (ZS_IS_KEYB(up) || ZS_IS_MOUSE(up))
- continue;
+static int zilog_irq = -1;
- uart_count++;
- }
-
- sunzilog_reg.nr = uart_count;
- sunzilog_reg.minor = sunserial_current_minor;
+static int __devinit zs_probe(struct of_device *dev, const struct of_device_id *match)
+{
+ struct of_device *op = to_of_device(&dev->dev);
+ struct uart_sunzilog_port *up;
+ struct zilog_layout __iomem *rp;
+ int inst = zs_get_instance(dev->node);
+ int err;
- ret = uart_register_driver(&sunzilog_reg);
- if (ret == 0) {
- sunzilog_reg.tty_driver->name_base = sunzilog_reg.minor - 64;
- sunzilog_reg.cons = SUNZILOG_CONSOLE();
+ sunzilog_chip_regs[inst] = of_ioremap(&op->resource[0], 0,
+ sizeof(struct zilog_layout),
+ "zs");
+ if (!sunzilog_chip_regs[inst])
+ return -ENOMEM;
- sunserial_current_minor += uart_count;
+ rp = sunzilog_chip_regs[inst];
- for (i = 0; i < NUM_CHANNELS; i++) {
- struct uart_sunzilog_port *up = &sunzilog_port_table[i];
+ if (zilog_irq == -1) {
+ zilog_irq = op->irqs[0];
+ err = request_irq(zilog_irq, sunzilog_interrupt, SA_SHIRQ,
+ "zs", sunzilog_irq_chain);
+ if (err) {
+ of_iounmap(rp, sizeof(struct zilog_layout));
- if (ZS_IS_KEYB(up) || ZS_IS_MOUSE(up))
- continue;
+ return err;
+ }
+ }
- if (uart_add_one_port(&sunzilog_reg, &up->port)) {
- printk(KERN_ERR
- "SunZilog: failed to add port zs%d\n", i);
- }
+ up = &sunzilog_port_table[inst * 2];
+
+ /* Channel A */
+ up[0].port.mapbase = op->resource[0].start + 0x00;
+ up[0].port.membase = (void __iomem *) &rp->channelA;
+ up[0].port.iotype = UPIO_MEM;
+ up[0].port.irq = op->irqs[0];
+ up[0].port.uartclk = ZS_CLOCK;
+ up[0].port.fifosize = 1;
+ up[0].port.ops = &sunzilog_pops;
+ up[0].port.type = PORT_SUNZILOG;
+ up[0].port.flags = 0;
+ up[0].port.line = (inst * 2) + 0;
+ up[0].port.dev = &op->dev;
+ up[0].flags |= SUNZILOG_FLAG_IS_CHANNEL_A;
+ if (inst == 1)
+ up[0].flags |= SUNZILOG_FLAG_CONS_KEYB;
+ sunzilog_init_hw(&up[0]);
+
+ /* Channel B */
+ up[1].port.mapbase = op->resource[0].start + 0x04;
+ up[1].port.membase = (void __iomem *) &rp->channelB;
+ up[1].port.iotype = UPIO_MEM;
+ up[1].port.irq = op->irqs[0];
+ up[1].port.uartclk = ZS_CLOCK;
+ up[1].port.fifosize = 1;
+ up[1].port.ops = &sunzilog_pops;
+ up[1].port.type = PORT_SUNZILOG;
+ up[1].port.flags = 0;
+ up[1].port.line = (inst * 2) + 1;
+ up[1].port.dev = &op->dev;
+ up[1].flags |= 0;
+ if (inst == 1)
+ up[1].flags |= SUNZILOG_FLAG_CONS_MOUSE;
+ sunzilog_init_hw(&up[1]);
+
+ if (inst != 1) {
+ err = uart_add_one_port(&sunzilog_reg, &up[0].port);
+ if (err) {
+ of_iounmap(rp, sizeof(struct zilog_layout));
+ return err;
+ }
+ err = uart_add_one_port(&sunzilog_reg, &up[1].port);
+ if (err) {
+ uart_remove_one_port(&sunzilog_reg, &up[0].port);
+ of_iounmap(rp, sizeof(struct zilog_layout));
+ return err;
}
}
- return ret;
+ dev_set_drvdata(&dev->dev, &up[0]);
+
+ return 0;
}
-static void __init sunzilog_scan_count(struct zs_probe_scan *t, int node)
+static void __devexit zs_remove_one(struct uart_sunzilog_port *up)
{
- t->devices++;
+ if (ZS_IS_KEYB(up) || ZS_IS_MOUSE(up)) {
+#ifdef CONFIG_SERIO
+ serio_unregister_port(&up->serio);
+#endif
+ } else
+ uart_remove_one_port(&sunzilog_reg, &up->port);
}
-static int __init sunzilog_ports_count(void)
+static int __devexit zs_remove(struct of_device *dev)
{
- struct zs_probe_scan scan;
+ struct uart_sunzilog_port *up = dev_get_drvdata(&dev->dev);
+ struct zilog_layout __iomem *regs;
- /* Sun4 Zilog setup is hard coded, no probing to do. */
- if (sparc_cpu_model == sun4)
- return 2;
+ zs_remove_one(&up[0]);
+ zs_remove_one(&up[1]);
- scan.scanner = sunzilog_scan_count;
- scan.depth = 0;
- scan.devices = 0;
+ regs = sunzilog_chip_regs[up[0].port.line / 2];
+ of_iounmap(regs, sizeof(struct zilog_layout));
- sunzilog_scan(&scan, prom_getchild(prom_root_node));
+ dev_set_drvdata(&dev->dev, NULL);
- return scan.devices;
+ return 0;
}
+static struct of_device_id zs_match[] = {
+ {
+ .name = "zs",
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, zs_match);
+
+static struct of_platform_driver zs_driver = {
+ .name = "zs",
+ .match_table = zs_match,
+ .probe = zs_probe,
+ .remove = __devexit_p(zs_remove),
+};
+
static int __init sunzilog_init(void)
{
+ struct device_node *dp;
+ int err;
- NUM_SUNZILOG = sunzilog_ports_count();
- if (NUM_SUNZILOG == 0)
- return -ENODEV;
+ NUM_SUNZILOG = 0;
+ for_each_node_by_name(dp, "zs")
+ NUM_SUNZILOG++;
- sunzilog_alloc_tables();
+ if (NUM_SUNZILOG) {
+ int uart_count;
- sunzilog_ports_init();
+ err = sunzilog_alloc_tables();
+ if (err)
+ return err;
- return 0;
+ /* Subtract 1 for keyboard, 1 for mouse. */
+ uart_count = (NUM_SUNZILOG * 2) - 2;
+
+ sunzilog_reg.nr = uart_count;
+ sunzilog_reg.minor = sunserial_current_minor;
+ err = uart_register_driver(&sunzilog_reg);
+ if (err) {
+ sunzilog_free_tables();
+ return err;
+ }
+ sunzilog_reg.tty_driver->name_base = sunzilog_reg.minor - 64;
+ sunzilog_reg.cons = SUNZILOG_CONSOLE();
+
+ sunserial_current_minor += uart_count;
+ }
+
+ return of_register_driver(&zs_driver, &of_bus_type);
}
static void __exit sunzilog_exit(void)
{
- int i;
+ of_unregister_driver(&zs_driver);
- for (i = 0; i < NUM_CHANNELS; i++) {
- struct uart_sunzilog_port *up = &sunzilog_port_table[i];
-
- if (ZS_IS_KEYB(up) || ZS_IS_MOUSE(up)) {
-#ifdef CONFIG_SERIO
- if (up->serio) {
- serio_unregister_port(up->serio);
- up->serio = NULL;
- }
-#endif
- } else
- uart_remove_one_port(&sunzilog_reg, &up->port);
+ if (zilog_irq != -1) {
+ free_irq(zilog_irq, sunzilog_irq_chain);
+ zilog_irq = -1;
}
- uart_unregister_driver(&sunzilog_reg);
+ if (NUM_SUNZILOG) {
+ uart_unregister_driver(&sunzilog_reg);
+ sunzilog_free_tables();
+ }
}
module_init(sunzilog_init);
MODULE_AUTHOR("David S. Miller");
MODULE_DESCRIPTION("Sun Zilog serial port driver");
+MODULE_VERSION("2.0");
MODULE_LICENSE("GPL");
#include <linux/usbdevice_fs.h>
#include <linux/cdev.h>
#include <linux/notifier.h>
+#include <linux/security.h>
#include <asm/uaccess.h>
#include <asm/byteorder.h>
#include <linux/moduleparam.h>
void __user *userbuffer;
void __user *userurb;
struct urb *urb;
+ u32 secid;
};
static int usbfs_snoop = 0;
sinfo.si_code = SI_ASYNCIO;
sinfo.si_addr = as->userurb;
kill_proc_info_as_uid(as->signr, &sinfo, as->pid, as->uid,
- as->euid);
+ as->euid, as->secid);
}
snoop(&urb->dev->dev, "urb complete\n");
snoop_urb(urb, as->userurb);
ps->disc_euid = current->euid;
ps->disccontext = NULL;
ps->ifclaimed = 0;
+ security_task_getsecid(current, &ps->secid);
wmb();
list_add_tail(&ps->list, &dev->filelist);
file->private_data = ps;
as->pid = current->pid;
as->uid = current->uid;
as->euid = current->euid;
+ security_task_getsecid(current, &as->secid);
if (!(uurb->endpoint & USB_DIR_IN)) {
if (copy_from_user(as->urb->transfer_buffer, uurb->buffer, as->urb->transfer_buffer_length)) {
free_async(as);
sinfo.si_errno = EPIPE;
sinfo.si_code = SI_ASYNCIO;
sinfo.si_addr = ds->disccontext;
- kill_proc_info_as_uid(ds->discsignr, &sinfo, ds->disc_pid, ds->disc_uid, ds->disc_euid);
+ kill_proc_info_as_uid(ds->discsignr, &sinfo, ds->disc_pid, ds->disc_uid, ds->disc_euid, ds->secid);
}
}
}
uid_t disc_uid, disc_euid;
void __user *disccontext;
unsigned long ifclaimed;
+ u32 secid;
};
/* internal notify stuff */
/* bw2.c: BWTWO frame buffer driver
*
- * Copyright (C) 2003 David S. Miller (davem@redhat.com)
+ * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
* Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
* Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
* Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
#include <linux/mm.h>
#include <asm/io.h>
-#include <asm/sbus.h>
#include <asm/oplib.h>
+#include <asm/prom.h>
+#include <asm/of_device.h>
#include <asm/fbio.h>
-#ifdef CONFIG_SPARC32
-#include <asm/sun4paddr.h>
-#endif
-
#include "sbuslib.h"
/*
#define BWTWO_REGISTER_OFFSET 0x400000
struct bt_regs {
- volatile u32 addr;
- volatile u32 color_map;
- volatile u32 control;
- volatile u32 cursor;
+ u32 addr;
+ u32 color_map;
+ u32 control;
+ u32 cursor;
};
struct bw2_regs {
struct bt_regs cmap;
- volatile u8 control;
- volatile u8 status;
- volatile u8 cursor_start;
- volatile u8 cursor_end;
- volatile u8 h_blank_start;
- volatile u8 h_blank_end;
- volatile u8 h_sync_start;
- volatile u8 h_sync_end;
- volatile u8 comp_sync_end;
- volatile u8 v_blank_start_high;
- volatile u8 v_blank_start_low;
- volatile u8 v_blank_end;
- volatile u8 v_sync_start;
- volatile u8 v_sync_end;
- volatile u8 xfer_holdoff_start;
- volatile u8 xfer_holdoff_end;
+ u8 control;
+ u8 status;
+ u8 cursor_start;
+ u8 cursor_end;
+ u8 h_blank_start;
+ u8 h_blank_end;
+ u8 h_sync_start;
+ u8 h_sync_end;
+ u8 comp_sync_end;
+ u8 v_blank_start_high;
+ u8 v_blank_start_low;
+ u8 v_blank_end;
+ u8 v_sync_start;
+ u8 v_sync_end;
+ u8 xfer_holdoff_start;
+ u8 xfer_holdoff_end;
};
/* Status Register Constants */
#define BW2_FLAG_BLANKED 0x00000001
unsigned long physbase;
+ unsigned long which_io;
unsigned long fbsize;
-
- struct sbus_dev *sdev;
};
/**
return sbusfb_mmap_helper(bw2_mmap_map,
par->physbase, par->fbsize,
- (par->sdev ?
- par->sdev->reg_addrs[0].which_io :
- 0),
+ par->which_io,
vma);
}
struct all_info {
struct fb_info info;
struct bw2_par par;
- struct list_head list;
};
-static LIST_HEAD(bw2_list);
-static void bw2_init_one(struct sbus_dev *sdev)
+static int __devinit bw2_init_one(struct of_device *op)
{
+ struct device_node *dp = op->node;
struct all_info *all;
- struct resource *resp;
-#ifdef CONFIG_SUN4
- struct resource res;
-#endif
- int linebytes;
+ int linebytes, err;
- all = kmalloc(sizeof(*all), GFP_KERNEL);
- if (!all) {
- printk(KERN_ERR "bw2: Cannot allocate memory.\n");
- return;
- }
- memset(all, 0, sizeof(*all));
-
- INIT_LIST_HEAD(&all->list);
+ all = kzalloc(sizeof(*all), GFP_KERNEL);
+ if (!all)
+ return -ENOMEM;
spin_lock_init(&all->par.lock);
- all->par.sdev = sdev;
-
-#ifdef CONFIG_SUN4
- if (!sdev) {
- all->par.physbase = sun4_bwtwo_physaddr;
- res.start = sun4_bwtwo_physaddr;
- res.end = res.start + BWTWO_REGISTER_OFFSET + sizeof(struct bw2_regs) - 1;
- res.flags = IORESOURCE_IO;
- resp = &res;
- all->info.var.xres = all->info.var.xres_virtual = 1152;
- all->info.var.yres = all->info.var.yres_virtual = 900;
- all->info.var.bits_per_pixel = 1;
- linebytes = 1152 / 8;
- } else
-#else
- {
- BUG_ON(!sdev);
- all->par.physbase = sdev->reg_addrs[0].phys_addr;
- resp = &sdev->resource[0];
- sbusfb_fill_var(&all->info.var, (sdev ? sdev->prom_node : 0), 1);
- linebytes = prom_getintdefault(sdev->prom_node, "linebytes",
- all->info.var.xres);
- }
-#endif
+
+ all->par.physbase = op->resource[0].start;
+ all->par.which_io = op->resource[0].flags & IORESOURCE_BITS;
+
+ sbusfb_fill_var(&all->info.var, dp->node, 1);
+ linebytes = of_getintprop_default(dp, "linebytes",
+ all->info.var.xres);
+
all->info.var.red.length = all->info.var.green.length =
all->info.var.blue.length = all->info.var.bits_per_pixel;
all->info.var.red.offset = all->info.var.green.offset =
all->info.var.blue.offset = 0;
- all->par.regs = sbus_ioremap(resp, BWTWO_REGISTER_OFFSET,
- sizeof(struct bw2_regs), "bw2 regs");
+ all->par.regs = of_ioremap(&op->resource[0], BWTWO_REGISTER_OFFSET,
+ sizeof(struct bw2_regs), "bw2 regs");
- if (sdev && !prom_getbool(sdev->prom_node, "width"))
+ if (!of_find_property(dp, "width", NULL))
bw2_do_default_mode(&all->par, &all->info, &linebytes);
all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
all->info.flags = FBINFO_DEFAULT;
all->info.fbops = &bw2_ops;
-#if defined(CONFIG_SPARC32)
- if (sdev)
- all->info.screen_base = (char __iomem *)
- prom_getintdefault(sdev->prom_node, "address", 0);
-#endif
- if (!all->info.screen_base)
- all->info.screen_base =
- sbus_ioremap(resp, 0, all->par.fbsize, "bw2 ram");
+
+ all->info.screen_base =
+ sbus_ioremap(&op->resource[0], 0, all->par.fbsize, "bw2 ram");
all->info.par = &all->par;
bw2_blank(0, &all->info);
bw2_init_fix(&all->info, linebytes);
- if (register_framebuffer(&all->info) < 0) {
- printk(KERN_ERR "bw2: Could not register framebuffer.\n");
+ err= register_framebuffer(&all->info);
+ if (err < 0) {
+ of_iounmap(all->par.regs, sizeof(struct bw2_regs));
+ of_iounmap(all->info.screen_base, all->par.fbsize);
kfree(all);
- return;
+ return err;
}
- list_add(&all->list, &bw2_list);
+ dev_set_drvdata(&op->dev, all);
+
+ printk("%s: bwtwo at %lx:%lx\n",
+ dp->full_name,
+ all->par.which_io, all->par.physbase);
- printk("bw2: bwtwo at %lx:%lx\n",
- (long) (sdev ? sdev->reg_addrs[0].which_io : 0),
- (long) all->par.physbase);
+ return 0;
}
-int __init bw2_init(void)
+static int __devinit bw2_probe(struct of_device *dev, const struct of_device_id *match)
{
- struct sbus_bus *sbus;
- struct sbus_dev *sdev;
+ struct of_device *op = to_of_device(&dev->dev);
- if (fb_get_options("bw2fb", NULL))
- return -ENODEV;
+ return bw2_init_one(op);
+}
-#ifdef CONFIG_SUN4
- bw2_init_one(NULL);
-#endif
- for_all_sbusdev(sdev, sbus) {
- if (!strcmp(sdev->prom_name, "bwtwo"))
- bw2_init_one(sdev);
- }
+static int __devexit bw2_remove(struct of_device *dev)
+{
+ struct all_info *all = dev_get_drvdata(&dev->dev);
+
+ unregister_framebuffer(&all->info);
+
+ of_iounmap(all->par.regs, sizeof(struct bw2_regs));
+ of_iounmap(all->info.screen_base, all->par.fbsize);
+
+ kfree(all);
+
+ dev_set_drvdata(&dev->dev, NULL);
return 0;
}
-void __exit bw2_exit(void)
-{
- struct list_head *pos, *tmp;
+static struct of_device_id bw2_match[] = {
+ {
+ .name = "bwtwo",
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, bw2_match);
- list_for_each_safe(pos, tmp, &bw2_list) {
- struct all_info *all = list_entry(pos, typeof(*all), list);
+static struct of_platform_driver bw2_driver = {
+ .name = "bw2",
+ .match_table = bw2_match,
+ .probe = bw2_probe,
+ .remove = __devexit_p(bw2_remove),
+};
- unregister_framebuffer(&all->info);
- kfree(all);
- }
+static int __init bw2_init(void)
+{
+ if (fb_get_options("bw2fb", NULL))
+ return -ENODEV;
+
+ return of_register_driver(&bw2_driver, &of_bus_type);
}
-int __init
-bw2_setup(char *arg)
+static void __exit bw2_exit(void)
{
- /* No cmdline options yet... */
- return 0;
+ return of_unregister_driver(&bw2_driver);
}
-module_init(bw2_init);
-#ifdef MODULE
+module_init(bw2_init);
module_exit(bw2_exit);
-#endif
MODULE_DESCRIPTION("framebuffer driver for BWTWO chipsets");
-MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
+MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
+MODULE_VERSION("2.0");
MODULE_LICENSE("GPL");
/* cg14.c: CGFOURTEEN frame buffer driver
*
- * Copyright (C) 2003 David S. Miller (davem@redhat.com)
+ * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
* Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
* Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
*
#include <linux/mm.h>
#include <asm/io.h>
-#include <asm/sbus.h>
-#include <asm/oplib.h>
+#include <asm/prom.h>
+#include <asm/of_device.h>
#include <asm/fbio.h>
#include "sbuslib.h"
#define CG14_MCR_PIXMODE_32 3
struct cg14_regs{
- volatile u8 mcr; /* Master Control Reg */
- volatile u8 ppr; /* Packed Pixel Reg */
- volatile u8 tms[2]; /* Test Mode Status Regs */
- volatile u8 msr; /* Master Status Reg */
- volatile u8 fsr; /* Fault Status Reg */
- volatile u8 rev; /* Revision & Impl */
- volatile u8 ccr; /* Clock Control Reg */
- volatile u32 tmr; /* Test Mode Read Back */
- volatile u8 mod; /* Monitor Operation Data Reg */
- volatile u8 acr; /* Aux Control */
+ u8 mcr; /* Master Control Reg */
+ u8 ppr; /* Packed Pixel Reg */
+ u8 tms[2]; /* Test Mode Status Regs */
+ u8 msr; /* Master Status Reg */
+ u8 fsr; /* Fault Status Reg */
+ u8 rev; /* Revision & Impl */
+ u8 ccr; /* Clock Control Reg */
+ u32 tmr; /* Test Mode Read Back */
+ u8 mod; /* Monitor Operation Data Reg */
+ u8 acr; /* Aux Control */
u8 xxx0[6];
- volatile u16 hct; /* Hor Counter */
- volatile u16 vct; /* Vert Counter */
- volatile u16 hbs; /* Hor Blank Start */
- volatile u16 hbc; /* Hor Blank Clear */
- volatile u16 hss; /* Hor Sync Start */
- volatile u16 hsc; /* Hor Sync Clear */
- volatile u16 csc; /* Composite Sync Clear */
- volatile u16 vbs; /* Vert Blank Start */
- volatile u16 vbc; /* Vert Blank Clear */
- volatile u16 vss; /* Vert Sync Start */
- volatile u16 vsc; /* Vert Sync Clear */
- volatile u16 xcs;
- volatile u16 xcc;
- volatile u16 fsa; /* Fault Status Address */
- volatile u16 adr; /* Address Registers */
+ u16 hct; /* Hor Counter */
+ u16 vct; /* Vert Counter */
+ u16 hbs; /* Hor Blank Start */
+ u16 hbc; /* Hor Blank Clear */
+ u16 hss; /* Hor Sync Start */
+ u16 hsc; /* Hor Sync Clear */
+ u16 csc; /* Composite Sync Clear */
+ u16 vbs; /* Vert Blank Start */
+ u16 vbc; /* Vert Blank Clear */
+ u16 vss; /* Vert Sync Start */
+ u16 vsc; /* Vert Sync Clear */
+ u16 xcs;
+ u16 xcc;
+ u16 fsa; /* Fault Status Address */
+ u16 adr; /* Address Registers */
u8 xxx1[0xce];
- volatile u8 pcg[0x100]; /* Pixel Clock Generator */
- volatile u32 vbr; /* Frame Base Row */
- volatile u32 vmcr; /* VBC Master Control */
- volatile u32 vcr; /* VBC refresh */
- volatile u32 vca; /* VBC Config */
+ u8 pcg[0x100]; /* Pixel Clock Generator */
+ u32 vbr; /* Frame Base Row */
+ u32 vmcr; /* VBC Master Control */
+ u32 vcr; /* VBC refresh */
+ u32 vca; /* VBC Config */
};
#define CG14_CCR_ENABLE 0x04
#define CG14_CCR_SELECT 0x02 /* HW/Full screen */
struct cg14_cursor {
- volatile u32 cpl0[32]; /* Enable plane 0 */
- volatile u32 cpl1[32]; /* Color selection plane */
- volatile u8 ccr; /* Cursor Control Reg */
+ u32 cpl0[32]; /* Enable plane 0 */
+ u32 cpl1[32]; /* Color selection plane */
+ u8 ccr; /* Cursor Control Reg */
u8 xxx0[3];
- volatile u16 cursx; /* Cursor x,y position */
- volatile u16 cursy; /* Cursor x,y position */
- volatile u32 color0;
- volatile u32 color1;
+ u16 cursx; /* Cursor x,y position */
+ u16 cursy; /* Cursor x,y position */
+ u32 color0;
+ u32 color1;
u32 xxx1[0x1bc];
- volatile u32 cpl0i[32]; /* Enable plane 0 autoinc */
- volatile u32 cpl1i[32]; /* Color selection autoinc */
+ u32 cpl0i[32]; /* Enable plane 0 autoinc */
+ u32 cpl1i[32]; /* Color selection autoinc */
};
struct cg14_dac {
- volatile u8 addr; /* Address Register */
+ u8 addr; /* Address Register */
u8 xxx0[255];
- volatile u8 glut; /* Gamma table */
+ u8 glut; /* Gamma table */
u8 xxx1[255];
- volatile u8 select; /* Register Select */
+ u8 select; /* Register Select */
u8 xxx2[255];
- volatile u8 mode; /* Mode Register */
+ u8 mode; /* Mode Register */
};
struct cg14_xlut{
- volatile u8 x_xlut [256];
- volatile u8 x_xlutd [256];
+ u8 x_xlut [256];
+ u8 x_xlutd [256];
u8 xxx0[0x600];
- volatile u8 x_xlut_inc [256];
- volatile u8 x_xlutd_inc [256];
+ u8 x_xlut_inc [256];
+ u8 x_xlutd_inc [256];
};
/* Color look up table (clut) */
int mode;
int ramsize;
- struct sbus_dev *sdev;
};
static void __cg14_reset(struct cg14_par *par)
* Initialisation
*/
-static void cg14_init_fix(struct fb_info *info, int linebytes)
+static void cg14_init_fix(struct fb_info *info, int linebytes, struct device_node *dp)
{
- struct cg14_par *par = (struct cg14_par *)info->par;
- const char *name;
-
- name = "cgfourteen";
- if (par->sdev)
- name = par->sdev->prom_name;
+ const char *name = dp->name;
strlcpy(info->fix.id, name, sizeof(info->fix.id));
struct all_info {
struct fb_info info;
struct cg14_par par;
- struct list_head list;
};
-static LIST_HEAD(cg14_list);
-static void cg14_init_one(struct sbus_dev *sdev, int node, int parent_node)
+static void cg14_unmap_regs(struct all_info *all)
{
- struct all_info *all;
- unsigned long phys, rphys;
- u32 bases[6];
- int is_8mb, linebytes, i;
-
- if (!sdev) {
- if (prom_getproperty(node, "address",
- (char *) &bases[0], sizeof(bases)) <= 0
- || !bases[0]) {
- printk(KERN_ERR "cg14: Device is not mapped.\n");
- return;
- }
- if (__get_iospace(bases[0]) != __get_iospace(bases[1])) {
- printk(KERN_ERR "cg14: I/O spaces don't match.\n");
- return;
- }
- }
+ if (all->par.regs)
+ of_iounmap(all->par.regs, sizeof(struct cg14_regs));
+ if (all->par.clut)
+ of_iounmap(all->par.clut, sizeof(struct cg14_clut));
+ if (all->par.cursor)
+ of_iounmap(all->par.cursor, sizeof(struct cg14_cursor));
+ if (all->info.screen_base)
+ of_iounmap(all->info.screen_base, all->par.fbsize);
+}
- all = kmalloc(sizeof(*all), GFP_KERNEL);
- if (!all) {
- printk(KERN_ERR "cg14: Cannot allocate memory.\n");
- return;
- }
- memset(all, 0, sizeof(*all));
+static int __devinit cg14_init_one(struct of_device *op)
+{
+ struct device_node *dp = op->node;
+ struct all_info *all;
+ int is_8mb, linebytes, i, err;
- INIT_LIST_HEAD(&all->list);
+ all = kzalloc(sizeof(*all), GFP_KERNEL);
+ if (!all)
+ return -ENOMEM;
spin_lock_init(&all->par.lock);
- sbusfb_fill_var(&all->info.var, node, 8);
+ sbusfb_fill_var(&all->info.var, dp->node, 8);
all->info.var.red.length = 8;
all->info.var.green.length = 8;
all->info.var.blue.length = 8;
- linebytes = prom_getintdefault(node, "linebytes",
- all->info.var.xres);
+ linebytes = of_getintprop_default(dp, "linebytes",
+ all->info.var.xres);
all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
- all->par.sdev = sdev;
- if (sdev) {
- rphys = sdev->reg_addrs[0].phys_addr;
- all->par.physbase = phys = sdev->reg_addrs[1].phys_addr;
- all->par.iospace = sdev->reg_addrs[0].which_io;
-
- all->par.regs = sbus_ioremap(&sdev->resource[0], 0,
- sizeof(struct cg14_regs),
- "cg14 regs");
- all->par.clut = sbus_ioremap(&sdev->resource[0], CG14_CLUT1,
- sizeof(struct cg14_clut),
- "cg14 clut");
- all->par.cursor = sbus_ioremap(&sdev->resource[0], CG14_CURSORREGS,
- sizeof(struct cg14_cursor),
- "cg14 cursor");
- all->info.screen_base = sbus_ioremap(&sdev->resource[1], 0,
- all->par.fbsize, "cg14 ram");
+ if (!strcmp(dp->parent->name, "sbus") ||
+ !strcmp(dp->parent->name, "sbi")) {
+ all->par.physbase = op->resource[0].start;
+ all->par.iospace = op->resource[0].flags & IORESOURCE_BITS;
} else {
- rphys = __get_phys(bases[0]);
- all->par.physbase = phys = __get_phys(bases[1]);
- all->par.iospace = __get_iospace(bases[0]);
- all->par.regs = (struct cg14_regs __iomem *)(unsigned long)bases[0];
- all->par.clut = (struct cg14_clut __iomem *)((unsigned long)bases[0] +
- CG14_CLUT1);
- all->par.cursor =
- (struct cg14_cursor __iomem *)((unsigned long)bases[0] +
- CG14_CURSORREGS);
-
- all->info.screen_base = (char __iomem *)(unsigned long)bases[1];
+ all->par.physbase = op->resource[1].start;
+ all->par.iospace = op->resource[0].flags & IORESOURCE_BITS;
}
- prom_getproperty(node, "reg", (char *) &bases[0], sizeof(bases));
- is_8mb = (bases[5] == 0x800000);
+ all->par.regs = of_ioremap(&op->resource[0], 0,
+ sizeof(struct cg14_regs), "cg14 regs");
+ all->par.clut = of_ioremap(&op->resource[0], CG14_CLUT1,
+ sizeof(struct cg14_clut), "cg14 clut");
+ all->par.cursor = of_ioremap(&op->resource[0], CG14_CURSORREGS,
+ sizeof(struct cg14_cursor), "cg14 cursor");
- if (sizeof(all->par.mmap_map) != sizeof(__cg14_mmap_map)) {
- extern void __cg14_mmap_sized_wrongly(void);
+ all->info.screen_base = of_ioremap(&op->resource[1], 0,
+ all->par.fbsize, "cg14 ram");
- __cg14_mmap_sized_wrongly();
- }
+ if (!all->par.regs || !all->par.clut || !all->par.cursor ||
+ !all->info.screen_base)
+ cg14_unmap_regs(all);
+
+ is_8mb = (((op->resource[1].end - op->resource[1].start) + 1) ==
+ (8 * 1024 * 1024));
+
+ BUILD_BUG_ON(sizeof(all->par.mmap_map) != sizeof(__cg14_mmap_map));
- memcpy(&all->par.mmap_map, &__cg14_mmap_map, sizeof(all->par.mmap_map));
+ memcpy(&all->par.mmap_map, &__cg14_mmap_map,
+ sizeof(all->par.mmap_map));
+
for (i = 0; i < CG14_MMAP_ENTRIES; i++) {
struct sbus_mmap_map *map = &all->par.mmap_map[i];
if (!map->size)
break;
if (map->poff & 0x80000000)
- map->poff = (map->poff & 0x7fffffff) + rphys - phys;
+ map->poff = (map->poff & 0x7fffffff) +
+ (op->resource[0].start -
+ op->resource[1].start);
if (is_8mb &&
map->size >= 0x100000 &&
map->size <= 0x400000)
__cg14_reset(&all->par);
if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
- printk(KERN_ERR "cg14: Could not allocate color map.\n");
+ cg14_unmap_regs(all);
kfree(all);
- return;
+ return -ENOMEM;
}
fb_set_cmap(&all->info.cmap, &all->info);
- cg14_init_fix(&all->info, linebytes);
+ cg14_init_fix(&all->info, linebytes, dp);
- if (register_framebuffer(&all->info) < 0) {
- printk(KERN_ERR "cg14: Could not register framebuffer.\n");
+ err = register_framebuffer(&all->info);
+ if (err < 0) {
fb_dealloc_cmap(&all->info.cmap);
+ cg14_unmap_regs(all);
kfree(all);
- return;
+ return err;
}
- list_add(&all->list, &cg14_list);
+ dev_set_drvdata(&op->dev, all);
- printk("cg14: cgfourteen at %lx:%lx, %dMB\n",
- all->par.iospace, all->par.physbase, all->par.ramsize >> 20);
+ printk("%s: cgfourteen at %lx:%lx, %dMB\n",
+ dp->full_name,
+ all->par.iospace, all->par.physbase,
+ all->par.ramsize >> 20);
+ return 0;
}
-int __init cg14_init(void)
+static int __devinit cg14_probe(struct of_device *dev, const struct of_device_id *match)
{
- struct sbus_bus *sbus;
- struct sbus_dev *sdev;
+ struct of_device *op = to_of_device(&dev->dev);
- if (fb_get_options("cg14fb", NULL))
- return -ENODEV;
+ return cg14_init_one(op);
+}
-#ifdef CONFIG_SPARC32
- {
- int root, node;
-
- root = prom_getchild(prom_root_node);
- root = prom_searchsiblings(root, "obio");
- if (root) {
- node = prom_searchsiblings(prom_getchild(root),
- "cgfourteen");
- if (node)
- cg14_init_one(NULL, node, root);
- }
- }
-#endif
- for_all_sbusdev(sdev, sbus) {
- if (!strcmp(sdev->prom_name, "cgfourteen"))
- cg14_init_one(sdev, sdev->prom_node, sbus->prom_node);
- }
+static int __devexit cg14_remove(struct of_device *dev)
+{
+ struct all_info *all = dev_get_drvdata(&dev->dev);
+
+ unregister_framebuffer(&all->info);
+ fb_dealloc_cmap(&all->info.cmap);
+
+ cg14_unmap_regs(all);
+
+ kfree(all);
+
+ dev_set_drvdata(&dev->dev, NULL);
return 0;
}
-void __exit cg14_exit(void)
-{
- struct list_head *pos, *tmp;
+static struct of_device_id cg14_match[] = {
+ {
+ .name = "cgfourteen",
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, cg14_match);
- list_for_each_safe(pos, tmp, &cg14_list) {
- struct all_info *all = list_entry(pos, typeof(*all), list);
+static struct of_platform_driver cg14_driver = {
+ .name = "cg14",
+ .match_table = cg14_match,
+ .probe = cg14_probe,
+ .remove = __devexit_p(cg14_remove),
+};
- unregister_framebuffer(&all->info);
- fb_dealloc_cmap(&all->info.cmap);
- kfree(all);
- }
+int __init cg14_init(void)
+{
+ if (fb_get_options("cg14fb", NULL))
+ return -ENODEV;
+
+ return of_register_driver(&cg14_driver, &of_bus_type);
}
-int __init
-cg14_setup(char *arg)
+void __exit cg14_exit(void)
{
- /* No cmdline options yet... */
- return 0;
+ of_unregister_driver(&cg14_driver);
}
module_init(cg14_init);
-
-#ifdef MODULE
module_exit(cg14_exit);
-#endif
MODULE_DESCRIPTION("framebuffer driver for CGfourteen chipsets");
-MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
+MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
+MODULE_VERSION("2.0");
MODULE_LICENSE("GPL");
/* cg3.c: CGTHREE frame buffer driver
*
- * Copyright (C) 2003 David S. Miller (davem@redhat.com)
+ * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
* Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
* Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
* Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
#include <linux/mm.h>
#include <asm/io.h>
-#include <asm/sbus.h>
#include <asm/oplib.h>
+#include <asm/prom.h>
+#include <asm/of_device.h>
#include <asm/fbio.h>
#include "sbuslib.h"
};
struct bt_regs {
- volatile u32 addr;
- volatile u32 color_map;
- volatile u32 control;
- volatile u32 cursor;
+ u32 addr;
+ u32 color_map;
+ u32 control;
+ u32 cursor;
};
struct cg3_regs {
struct bt_regs cmap;
- volatile u8 control;
- volatile u8 status;
- volatile u8 cursor_start;
- volatile u8 cursor_end;
- volatile u8 h_blank_start;
- volatile u8 h_blank_end;
- volatile u8 h_sync_start;
- volatile u8 h_sync_end;
- volatile u8 comp_sync_end;
- volatile u8 v_blank_start_high;
- volatile u8 v_blank_start_low;
- volatile u8 v_blank_end;
- volatile u8 v_sync_start;
- volatile u8 v_sync_end;
- volatile u8 xfer_holdoff_start;
- volatile u8 xfer_holdoff_end;
+ u8 control;
+ u8 status;
+ u8 cursor_start;
+ u8 cursor_end;
+ u8 h_blank_start;
+ u8 h_blank_end;
+ u8 h_sync_start;
+ u8 h_sync_end;
+ u8 comp_sync_end;
+ u8 v_blank_start_high;
+ u8 v_blank_start_low;
+ u8 v_blank_end;
+ u8 v_sync_start;
+ u8 v_sync_end;
+ u8 xfer_holdoff_start;
+ u8 xfer_holdoff_end;
};
/* Offset of interesting structures in the OBIO space */
#define CG3_FLAG_RDI 0x00000002
unsigned long physbase;
+ unsigned long which_io;
unsigned long fbsize;
-
- struct sbus_dev *sdev;
};
/**
return sbusfb_mmap_helper(cg3_mmap_map,
par->physbase, par->fbsize,
- par->sdev->reg_addrs[0].which_io,
+ par->which_io,
vma);
}
*/
static void
-cg3_init_fix(struct fb_info *info, int linebytes)
+cg3_init_fix(struct fb_info *info, int linebytes, struct device_node *dp)
{
- struct cg3_par *par = (struct cg3_par *)info->par;
-
- strlcpy(info->fix.id, par->sdev->prom_name, sizeof(info->fix.id));
+ strlcpy(info->fix.id, dp->name, sizeof(info->fix.id));
info->fix.type = FB_TYPE_PACKED_PIXELS;
info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
}
static void cg3_rdi_maybe_fixup_var(struct fb_var_screeninfo *var,
- struct sbus_dev *sdev)
+ struct device_node *dp)
{
- char buffer[40];
+ char *params;
char *p;
int ww, hh;
- *buffer = 0;
- prom_getstring(sdev->prom_node, "params", buffer, sizeof(buffer));
- if (*buffer) {
- ww = simple_strtoul(buffer, &p, 10);
+ params = of_get_property(dp, "params", NULL);
+ if (params) {
+ ww = simple_strtoul(params, &p, 10);
if (ww && *p == 'x') {
hh = simple_strtoul(p + 1, &p, 10);
if (hh && *p == '-') {
sbus_writeb(p[1], regp);
}
for (p = cg3_dacvals; *p; p += 2) {
- volatile u8 __iomem *regp;
+ u8 __iomem *regp;
- regp = (volatile u8 __iomem *)&par->regs->cmap.addr;
+ regp = (u8 __iomem *)&par->regs->cmap.addr;
sbus_writeb(p[0], regp);
- regp = (volatile u8 __iomem *)&par->regs->cmap.control;
+ regp = (u8 __iomem *)&par->regs->cmap.control;
sbus_writeb(p[1], regp);
}
}
struct all_info {
struct fb_info info;
struct cg3_par par;
- struct list_head list;
};
-static LIST_HEAD(cg3_list);
-static void cg3_init_one(struct sbus_dev *sdev)
+static int __devinit cg3_init_one(struct of_device *op)
{
+ struct device_node *dp = op->node;
struct all_info *all;
- int linebytes;
-
- all = kmalloc(sizeof(*all), GFP_KERNEL);
- if (!all) {
- printk(KERN_ERR "cg3: Cannot allocate memory.\n");
- return;
- }
- memset(all, 0, sizeof(*all));
+ int linebytes, err;
- INIT_LIST_HEAD(&all->list);
+ all = kzalloc(sizeof(*all), GFP_KERNEL);
+ if (!all)
+ return -ENOMEM;
spin_lock_init(&all->par.lock);
- all->par.sdev = sdev;
- all->par.physbase = sdev->reg_addrs[0].phys_addr;
+ all->par.physbase = op->resource[0].start;
+ all->par.which_io = op->resource[0].flags & IORESOURCE_BITS;
- sbusfb_fill_var(&all->info.var, sdev->prom_node, 8);
+ sbusfb_fill_var(&all->info.var, dp->node, 8);
all->info.var.red.length = 8;
all->info.var.green.length = 8;
all->info.var.blue.length = 8;
- if (!strcmp(sdev->prom_name, "cgRDI"))
+ if (!strcmp(dp->name, "cgRDI"))
all->par.flags |= CG3_FLAG_RDI;
if (all->par.flags & CG3_FLAG_RDI)
- cg3_rdi_maybe_fixup_var(&all->info.var, sdev);
+ cg3_rdi_maybe_fixup_var(&all->info.var, dp);
- linebytes = prom_getintdefault(sdev->prom_node, "linebytes",
- all->info.var.xres);
+ linebytes = of_getintprop_default(dp, "linebytes",
+ all->info.var.xres);
all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
- all->par.regs = sbus_ioremap(&sdev->resource[0], CG3_REGS_OFFSET,
- sizeof(struct cg3_regs), "cg3 regs");
+ all->par.regs = of_ioremap(&op->resource[0], CG3_REGS_OFFSET,
+ sizeof(struct cg3_regs), "cg3 regs");
all->info.flags = FBINFO_DEFAULT;
all->info.fbops = &cg3_ops;
-#ifdef CONFIG_SPARC32
- all->info.screen_base = (char __iomem *)
- prom_getintdefault(sdev->prom_node, "address", 0);
-#endif
- if (!all->info.screen_base)
- all->info.screen_base =
- sbus_ioremap(&sdev->resource[0], CG3_RAM_OFFSET,
- all->par.fbsize, "cg3 ram");
+ all->info.screen_base =
+ of_ioremap(&op->resource[0], CG3_RAM_OFFSET,
+ all->par.fbsize, "cg3 ram");
all->info.par = &all->par;
cg3_blank(0, &all->info);
- if (!prom_getbool(sdev->prom_node, "width"))
+ if (!of_find_property(dp, "width", NULL))
cg3_do_default_mode(&all->par);
if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
- printk(KERN_ERR "cg3: Could not allocate color map.\n");
+ of_iounmap(all->par.regs, sizeof(struct cg3_regs));
+ of_iounmap(all->info.screen_base, all->par.fbsize);
kfree(all);
- return;
+ return -ENOMEM;
}
fb_set_cmap(&all->info.cmap, &all->info);
- cg3_init_fix(&all->info, linebytes);
+ cg3_init_fix(&all->info, linebytes, dp);
- if (register_framebuffer(&all->info) < 0) {
- printk(KERN_ERR "cg3: Could not register framebuffer.\n");
+ err = register_framebuffer(&all->info);
+ if (err < 0) {
fb_dealloc_cmap(&all->info.cmap);
+ of_iounmap(all->par.regs, sizeof(struct cg3_regs));
+ of_iounmap(all->info.screen_base, all->par.fbsize);
kfree(all);
- return;
+ return err;
}
- list_add(&all->list, &cg3_list);
+ dev_set_drvdata(&op->dev, all);
+
+ printk("%s: cg3 at %lx:%lx\n",
+ dp->full_name, all->par.which_io, all->par.physbase);
- printk("cg3: %s at %lx:%lx\n",
- sdev->prom_name,
- (long) sdev->reg_addrs[0].which_io,
- (long) sdev->reg_addrs[0].phys_addr);
+ return 0;
}
-int __init cg3_init(void)
+static int __devinit cg3_probe(struct of_device *dev, const struct of_device_id *match)
{
- struct sbus_bus *sbus;
- struct sbus_dev *sdev;
+ struct of_device *op = to_of_device(&dev->dev);
- if (fb_get_options("cg3fb", NULL))
- return -ENODEV;
+ return cg3_init_one(op);
+}
- for_all_sbusdev(sdev, sbus) {
- if (!strcmp(sdev->prom_name, "cgthree") ||
- !strcmp(sdev->prom_name, "cgRDI"))
- cg3_init_one(sdev);
- }
+static int __devexit cg3_remove(struct of_device *dev)
+{
+ struct all_info *all = dev_get_drvdata(&dev->dev);
+
+ unregister_framebuffer(&all->info);
+ fb_dealloc_cmap(&all->info.cmap);
+
+ of_iounmap(all->par.regs, sizeof(struct cg3_regs));
+ of_iounmap(all->info.screen_base, all->par.fbsize);
+
+ kfree(all);
+
+ dev_set_drvdata(&dev->dev, NULL);
return 0;
}
-void __exit cg3_exit(void)
-{
- struct list_head *pos, *tmp;
+static struct of_device_id cg3_match[] = {
+ {
+ .name = "cgthree",
+ },
+ {
+ .name = "cgRDI",
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, cg3_match);
- list_for_each_safe(pos, tmp, &cg3_list) {
- struct all_info *all = list_entry(pos, typeof(*all), list);
+static struct of_platform_driver cg3_driver = {
+ .name = "cg3",
+ .match_table = cg3_match,
+ .probe = cg3_probe,
+ .remove = __devexit_p(cg3_remove),
+};
- unregister_framebuffer(&all->info);
- fb_dealloc_cmap(&all->info.cmap);
- kfree(all);
- }
+static int __init cg3_init(void)
+{
+ if (fb_get_options("cg3fb", NULL))
+ return -ENODEV;
+
+ return of_register_driver(&cg3_driver, &of_bus_type);
}
-int __init
-cg3_setup(char *arg)
+static void __exit cg3_exit(void)
{
- /* No cmdline options yet... */
- return 0;
+ of_unregister_driver(&cg3_driver);
}
module_init(cg3_init);
-
-#ifdef MODULE
module_exit(cg3_exit);
-#endif
MODULE_DESCRIPTION("framebuffer driver for CGthree chipsets");
-MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
+MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
+MODULE_VERSION("2.0");
MODULE_LICENSE("GPL");
/* cg6.c: CGSIX (GX, GXplus, TGX) frame buffer driver
*
- * Copyright (C) 2003 David S. Miller (davem@redhat.com)
+ * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
* Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
* Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
* Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
#include <linux/mm.h>
#include <asm/io.h>
-#include <asm/sbus.h>
-#include <asm/oplib.h>
+#include <asm/prom.h>
+#include <asm/of_device.h>
#include <asm/fbio.h>
#include "sbuslib.h"
/* The contents are unknown */
struct cg6_tec {
- volatile int tec_matrix;
- volatile int tec_clip;
- volatile int tec_vdc;
+ int tec_matrix;
+ int tec_clip;
+ int tec_vdc;
};
struct cg6_thc {
- uint thc_pad0[512];
- volatile uint thc_hs; /* hsync timing */
- volatile uint thc_hsdvs;
- volatile uint thc_hd;
- volatile uint thc_vs; /* vsync timing */
- volatile uint thc_vd;
- volatile uint thc_refresh;
- volatile uint thc_misc;
- uint thc_pad1[56];
- volatile uint thc_cursxy; /* cursor x,y position (16 bits each) */
- volatile uint thc_cursmask[32]; /* cursor mask bits */
- volatile uint thc_cursbits[32]; /* what to show where mask enabled */
+ u32 thc_pad0[512];
+ u32 thc_hs; /* hsync timing */
+ u32 thc_hsdvs;
+ u32 thc_hd;
+ u32 thc_vs; /* vsync timing */
+ u32 thc_vd;
+ u32 thc_refresh;
+ u32 thc_misc;
+ u32 thc_pad1[56];
+ u32 thc_cursxy; /* cursor x,y position (16 bits each) */
+ u32 thc_cursmask[32]; /* cursor mask bits */
+ u32 thc_cursbits[32]; /* what to show where mask enabled */
};
struct cg6_fbc {
- u32 xxx0[1];
- volatile u32 mode;
- volatile u32 clip;
- u32 xxx1[1];
- volatile u32 s;
- volatile u32 draw;
- volatile u32 blit;
- volatile u32 font;
- u32 xxx2[24];
- volatile u32 x0, y0, z0, color0;
- volatile u32 x1, y1, z1, color1;
- volatile u32 x2, y2, z2, color2;
- volatile u32 x3, y3, z3, color3;
- volatile u32 offx, offy;
- u32 xxx3[2];
- volatile u32 incx, incy;
- u32 xxx4[2];
- volatile u32 clipminx, clipminy;
- u32 xxx5[2];
- volatile u32 clipmaxx, clipmaxy;
- u32 xxx6[2];
- volatile u32 fg;
- volatile u32 bg;
- volatile u32 alu;
- volatile u32 pm;
- volatile u32 pixelm;
- u32 xxx7[2];
- volatile u32 patalign;
- volatile u32 pattern[8];
- u32 xxx8[432];
- volatile u32 apointx, apointy, apointz;
- u32 xxx9[1];
- volatile u32 rpointx, rpointy, rpointz;
- u32 xxx10[5];
- volatile u32 pointr, pointg, pointb, pointa;
- volatile u32 alinex, aliney, alinez;
- u32 xxx11[1];
- volatile u32 rlinex, rliney, rlinez;
- u32 xxx12[5];
- volatile u32 liner, lineg, lineb, linea;
- volatile u32 atrix, atriy, atriz;
- u32 xxx13[1];
- volatile u32 rtrix, rtriy, rtriz;
- u32 xxx14[5];
- volatile u32 trir, trig, trib, tria;
- volatile u32 aquadx, aquady, aquadz;
- u32 xxx15[1];
- volatile u32 rquadx, rquady, rquadz;
- u32 xxx16[5];
- volatile u32 quadr, quadg, quadb, quada;
- volatile u32 arectx, arecty, arectz;
- u32 xxx17[1];
- volatile u32 rrectx, rrecty, rrectz;
- u32 xxx18[5];
- volatile u32 rectr, rectg, rectb, recta;
+ u32 xxx0[1];
+ u32 mode;
+ u32 clip;
+ u32 xxx1[1];
+ u32 s;
+ u32 draw;
+ u32 blit;
+ u32 font;
+ u32 xxx2[24];
+ u32 x0, y0, z0, color0;
+ u32 x1, y1, z1, color1;
+ u32 x2, y2, z2, color2;
+ u32 x3, y3, z3, color3;
+ u32 offx, offy;
+ u32 xxx3[2];
+ u32 incx, incy;
+ u32 xxx4[2];
+ u32 clipminx, clipminy;
+ u32 xxx5[2];
+ u32 clipmaxx, clipmaxy;
+ u32 xxx6[2];
+ u32 fg;
+ u32 bg;
+ u32 alu;
+ u32 pm;
+ u32 pixelm;
+ u32 xxx7[2];
+ u32 patalign;
+ u32 pattern[8];
+ u32 xxx8[432];
+ u32 apointx, apointy, apointz;
+ u32 xxx9[1];
+ u32 rpointx, rpointy, rpointz;
+ u32 xxx10[5];
+ u32 pointr, pointg, pointb, pointa;
+ u32 alinex, aliney, alinez;
+ u32 xxx11[1];
+ u32 rlinex, rliney, rlinez;
+ u32 xxx12[5];
+ u32 liner, lineg, lineb, linea;
+ u32 atrix, atriy, atriz;
+ u32 xxx13[1];
+ u32 rtrix, rtriy, rtriz;
+ u32 xxx14[5];
+ u32 trir, trig, trib, tria;
+ u32 aquadx, aquady, aquadz;
+ u32 xxx15[1];
+ u32 rquadx, rquady, rquadz;
+ u32 xxx16[5];
+ u32 quadr, quadg, quadb, quada;
+ u32 arectx, arecty, arectz;
+ u32 xxx17[1];
+ u32 rrectx, rrecty, rrectz;
+ u32 xxx18[5];
+ u32 rectr, rectg, rectb, recta;
};
struct bt_regs {
- volatile u32 addr;
- volatile u32 color_map;
- volatile u32 control;
- volatile u32 cursor;
+ u32 addr;
+ u32 color_map;
+ u32 control;
+ u32 cursor;
};
struct cg6_par {
struct cg6_fbc __iomem *fbc;
struct cg6_thc __iomem *thc;
struct cg6_tec __iomem *tec;
- volatile u32 __iomem *fhc;
+ u32 __iomem *fhc;
u32 flags;
#define CG6_FLAG_BLANKED 0x00000001
unsigned long physbase;
+ unsigned long which_io;
unsigned long fbsize;
-
- struct sbus_dev *sdev;
};
static int cg6_sync(struct fb_info *info)
return sbusfb_mmap_helper(cg6_mmap_map,
par->physbase, par->fbsize,
- par->sdev->reg_addrs[0].which_io,
- vma);
+ par->which_io, vma);
}
static int cg6_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
struct all_info {
struct fb_info info;
struct cg6_par par;
- struct list_head list;
};
-static LIST_HEAD(cg6_list);
-static void cg6_init_one(struct sbus_dev *sdev)
+static void cg6_unmap_regs(struct all_info *all)
{
- struct all_info *all;
- int linebytes;
+ if (all->par.fbc)
+ of_iounmap(all->par.fbc, 4096);
+ if (all->par.tec)
+ of_iounmap(all->par.tec, sizeof(struct cg6_tec));
+ if (all->par.thc)
+ of_iounmap(all->par.thc, sizeof(struct cg6_thc));
+ if (all->par.bt)
+ of_iounmap(all->par.bt, sizeof(struct bt_regs));
+ if (all->par.fhc)
+ of_iounmap(all->par.fhc, sizeof(u32));
+
+ if (all->info.screen_base)
+ of_iounmap(all->info.screen_base, all->par.fbsize);
+}
- all = kmalloc(sizeof(*all), GFP_KERNEL);
- if (!all) {
- printk(KERN_ERR "cg6: Cannot allocate memory.\n");
- return;
- }
- memset(all, 0, sizeof(*all));
+static int __devinit cg6_init_one(struct of_device *op)
+{
+ struct device_node *dp = op->node;
+ struct all_info *all;
+ int linebytes, err;
- INIT_LIST_HEAD(&all->list);
+ all = kzalloc(sizeof(*all), GFP_KERNEL);
+ if (!all)
+ return -ENOMEM;
spin_lock_init(&all->par.lock);
- all->par.sdev = sdev;
- all->par.physbase = sdev->reg_addrs[0].phys_addr;
+ all->par.physbase = op->resource[0].start;
+ all->par.which_io = op->resource[0].flags & IORESOURCE_BITS;
- sbusfb_fill_var(&all->info.var, sdev->prom_node, 8);
+ sbusfb_fill_var(&all->info.var, dp->node, 8);
all->info.var.red.length = 8;
all->info.var.green.length = 8;
all->info.var.blue.length = 8;
- linebytes = prom_getintdefault(sdev->prom_node, "linebytes",
- all->info.var.xres);
+ linebytes = of_getintprop_default(dp, "linebytes",
+ all->info.var.xres);
all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
- if (prom_getbool(sdev->prom_node, "dblbuf"))
+ if (of_find_property(dp, "dblbuf", NULL))
all->par.fbsize *= 4;
- all->par.fbc = sbus_ioremap(&sdev->resource[0], CG6_FBC_OFFSET,
- 4096, "cgsix fbc");
- all->par.tec = sbus_ioremap(&sdev->resource[0], CG6_TEC_OFFSET,
- sizeof(struct cg6_tec), "cgsix tec");
- all->par.thc = sbus_ioremap(&sdev->resource[0], CG6_THC_OFFSET,
- sizeof(struct cg6_thc), "cgsix thc");
- all->par.bt = sbus_ioremap(&sdev->resource[0], CG6_BROOKTREE_OFFSET,
- sizeof(struct bt_regs), "cgsix dac");
- all->par.fhc = sbus_ioremap(&sdev->resource[0], CG6_FHC_OFFSET,
- sizeof(u32), "cgsix fhc");
+ all->par.fbc = of_ioremap(&op->resource[0], CG6_FBC_OFFSET,
+ 4096, "cgsix fbc");
+ all->par.tec = of_ioremap(&op->resource[0], CG6_TEC_OFFSET,
+ sizeof(struct cg6_tec), "cgsix tec");
+ all->par.thc = of_ioremap(&op->resource[0], CG6_THC_OFFSET,
+ sizeof(struct cg6_thc), "cgsix thc");
+ all->par.bt = of_ioremap(&op->resource[0], CG6_BROOKTREE_OFFSET,
+ sizeof(struct bt_regs), "cgsix dac");
+ all->par.fhc = of_ioremap(&op->resource[0], CG6_FHC_OFFSET,
+ sizeof(u32), "cgsix fhc");
all->info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_IMAGEBLIT |
FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT;
all->info.fbops = &cg6_ops;
-#ifdef CONFIG_SPARC32
- all->info.screen_base = (char __iomem *)
- prom_getintdefault(sdev->prom_node, "address", 0);
-#endif
- if (!all->info.screen_base)
- all->info.screen_base =
- sbus_ioremap(&sdev->resource[0], CG6_RAM_OFFSET,
- all->par.fbsize, "cgsix ram");
+
+ all->info.screen_base = of_ioremap(&op->resource[0], CG6_RAM_OFFSET,
+ all->par.fbsize, "cgsix ram");
+ if (!all->par.fbc || !all->par.tec || !all->par.thc ||
+ !all->par.bt || !all->par.fhc || !all->info.screen_base) {
+ cg6_unmap_regs(all);
+ kfree(all);
+ return -ENOMEM;
+ }
+
all->info.par = &all->par;
all->info.var.accel_flags = FB_ACCELF_TEXT;
cg6_blank(0, &all->info);
if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
- printk(KERN_ERR "cg6: Could not allocate color map.\n");
+ cg6_unmap_regs(all);
kfree(all);
- return;
+ return -ENOMEM;
}
fb_set_cmap(&all->info.cmap, &all->info);
cg6_init_fix(&all->info, linebytes);
- if (register_framebuffer(&all->info) < 0) {
- printk(KERN_ERR "cg6: Could not register framebuffer.\n");
+ err = register_framebuffer(&all->info);
+ if (err < 0) {
+ cg6_unmap_regs(all);
fb_dealloc_cmap(&all->info.cmap);
kfree(all);
- return;
+ return err;
}
- list_add(&all->list, &cg6_list);
+ dev_set_drvdata(&op->dev, all);
- printk("cg6: CGsix [%s] at %lx:%lx\n",
+ printk("%s: CGsix [%s] at %lx:%lx\n",
+ dp->full_name,
all->info.fix.id,
- (long) sdev->reg_addrs[0].which_io,
- (long) sdev->reg_addrs[0].phys_addr);
+ all->par.which_io, all->par.physbase);
+
+ return 0;
}
-int __init cg6_init(void)
+static int __devinit cg6_probe(struct of_device *dev, const struct of_device_id *match)
{
- struct sbus_bus *sbus;
- struct sbus_dev *sdev;
+ struct of_device *op = to_of_device(&dev->dev);
- if (fb_get_options("cg6fb", NULL))
- return -ENODEV;
+ return cg6_init_one(op);
+}
- for_all_sbusdev(sdev, sbus) {
- if (!strcmp(sdev->prom_name, "cgsix") ||
- !strcmp(sdev->prom_name, "cgthree+"))
- cg6_init_one(sdev);
- }
+static int __devexit cg6_remove(struct of_device *dev)
+{
+ struct all_info *all = dev_get_drvdata(&dev->dev);
+
+ unregister_framebuffer(&all->info);
+ fb_dealloc_cmap(&all->info.cmap);
+
+ cg6_unmap_regs(all);
+
+ kfree(all);
+
+ dev_set_drvdata(&dev->dev, NULL);
return 0;
}
-void __exit cg6_exit(void)
-{
- struct list_head *pos, *tmp;
+static struct of_device_id cg6_match[] = {
+ {
+ .name = "cgsix",
+ },
+ {
+ .name = "cgthree+",
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, cg6_match);
- list_for_each_safe(pos, tmp, &cg6_list) {
- struct all_info *all = list_entry(pos, typeof(*all), list);
+static struct of_platform_driver cg6_driver = {
+ .name = "cg6",
+ .match_table = cg6_match,
+ .probe = cg6_probe,
+ .remove = __devexit_p(cg6_remove),
+};
- unregister_framebuffer(&all->info);
- fb_dealloc_cmap(&all->info.cmap);
- kfree(all);
- }
+static int __init cg6_init(void)
+{
+ if (fb_get_options("cg6fb", NULL))
+ return -ENODEV;
+
+ return of_register_driver(&cg6_driver, &of_bus_type);
}
-int __init
-cg6_setup(char *arg)
+static void __exit cg6_exit(void)
{
- /* No cmdline options yet... */
- return 0;
+ of_unregister_driver(&cg6_driver);
}
module_init(cg6_init);
-
-#ifdef MODULE
module_exit(cg6_exit);
-#endif
MODULE_DESCRIPTION("framebuffer driver for CGsix chipsets");
-MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
+MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
+MODULE_VERSION("2.0");
MODULE_LICENSE("GPL");
/* ffb.c: Creator/Elite3D frame buffer driver
*
- * Copyright (C) 2003 David S. Miller (davem@redhat.com)
+ * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
* Copyright (C) 1997,1998,1999 Jakub Jelinek (jj@ultra.linux.cz)
*
* Driver layout based loosely on tgafb.c, see that file for credits.
#include <asm/io.h>
#include <asm/upa.h>
-#include <asm/oplib.h>
+#include <asm/prom.h>
+#include <asm/of_device.h>
#include <asm/fbio.h>
#include "sbuslib.h"
struct ffb_fbc {
/* Next vertex registers */
- u32 xxx1[3];
- volatile u32 alpha;
- volatile u32 red;
- volatile u32 green;
- volatile u32 blue;
- volatile u32 depth;
- volatile u32 y;
- volatile u32 x;
- u32 xxx2[2];
- volatile u32 ryf;
- volatile u32 rxf;
- u32 xxx3[2];
+ u32 xxx1[3];
+ u32 alpha;
+ u32 red;
+ u32 green;
+ u32 blue;
+ u32 depth;
+ u32 y;
+ u32 x;
+ u32 xxx2[2];
+ u32 ryf;
+ u32 rxf;
+ u32 xxx3[2];
- volatile u32 dmyf;
- volatile u32 dmxf;
- u32 xxx4[2];
- volatile u32 ebyi;
- volatile u32 ebxi;
- u32 xxx5[2];
- volatile u32 by;
- volatile u32 bx;
- u32 dy;
- u32 dx;
- volatile u32 bh;
- volatile u32 bw;
- u32 xxx6[2];
+ u32 dmyf;
+ u32 dmxf;
+ u32 xxx4[2];
+ u32 ebyi;
+ u32 ebxi;
+ u32 xxx5[2];
+ u32 by;
+ u32 bx;
+ u32 dy;
+ u32 dx;
+ u32 bh;
+ u32 bw;
+ u32 xxx6[2];
- u32 xxx7[32];
+ u32 xxx7[32];
/* Setup unit vertex state register */
- volatile u32 suvtx;
- u32 xxx8[63];
+ u32 suvtx;
+ u32 xxx8[63];
/* Control registers */
- volatile u32 ppc;
- volatile u32 wid;
- volatile u32 fg;
- volatile u32 bg;
- volatile u32 consty;
- volatile u32 constz;
- volatile u32 xclip;
- volatile u32 dcss;
- volatile u32 vclipmin;
- volatile u32 vclipmax;
- volatile u32 vclipzmin;
- volatile u32 vclipzmax;
- volatile u32 dcsf;
- volatile u32 dcsb;
- volatile u32 dczf;
- volatile u32 dczb;
+ u32 ppc;
+ u32 wid;
+ u32 fg;
+ u32 bg;
+ u32 consty;
+ u32 constz;
+ u32 xclip;
+ u32 dcss;
+ u32 vclipmin;
+ u32 vclipmax;
+ u32 vclipzmin;
+ u32 vclipzmax;
+ u32 dcsf;
+ u32 dcsb;
+ u32 dczf;
+ u32 dczb;
- u32 xxx9;
- volatile u32 blendc;
- volatile u32 blendc1;
- volatile u32 blendc2;
- volatile u32 fbramitc;
- volatile u32 fbc;
- volatile u32 rop;
- volatile u32 cmp;
- volatile u32 matchab;
- volatile u32 matchc;
- volatile u32 magnab;
- volatile u32 magnc;
- volatile u32 fbcfg0;
- volatile u32 fbcfg1;
- volatile u32 fbcfg2;
- volatile u32 fbcfg3;
+ u32 xxx9;
+ u32 blendc;
+ u32 blendc1;
+ u32 blendc2;
+ u32 fbramitc;
+ u32 fbc;
+ u32 rop;
+ u32 cmp;
+ u32 matchab;
+ u32 matchc;
+ u32 magnab;
+ u32 magnc;
+ u32 fbcfg0;
+ u32 fbcfg1;
+ u32 fbcfg2;
+ u32 fbcfg3;
- u32 ppcfg;
- volatile u32 pick;
- volatile u32 fillmode;
- volatile u32 fbramwac;
- volatile u32 pmask;
- volatile u32 xpmask;
- volatile u32 ypmask;
- volatile u32 zpmask;
- volatile u32 clip0min;
- volatile u32 clip0max;
- volatile u32 clip1min;
- volatile u32 clip1max;
- volatile u32 clip2min;
- volatile u32 clip2max;
- volatile u32 clip3min;
- volatile u32 clip3max;
+ u32 ppcfg;
+ u32 pick;
+ u32 fillmode;
+ u32 fbramwac;
+ u32 pmask;
+ u32 xpmask;
+ u32 ypmask;
+ u32 zpmask;
+ u32 clip0min;
+ u32 clip0max;
+ u32 clip1min;
+ u32 clip1max;
+ u32 clip2min;
+ u32 clip2max;
+ u32 clip3min;
+ u32 clip3max;
/* New 3dRAM III support regs */
- volatile u32 rawblend2;
- volatile u32 rawpreblend;
- volatile u32 rawstencil;
- volatile u32 rawstencilctl;
- volatile u32 threedram1;
- volatile u32 threedram2;
- volatile u32 passin;
- volatile u32 rawclrdepth;
- volatile u32 rawpmask;
- volatile u32 rawcsrc;
- volatile u32 rawmatch;
- volatile u32 rawmagn;
- volatile u32 rawropblend;
- volatile u32 rawcmp;
- volatile u32 rawwac;
- volatile u32 fbramid;
+ u32 rawblend2;
+ u32 rawpreblend;
+ u32 rawstencil;
+ u32 rawstencilctl;
+ u32 threedram1;
+ u32 threedram2;
+ u32 passin;
+ u32 rawclrdepth;
+ u32 rawpmask;
+ u32 rawcsrc;
+ u32 rawmatch;
+ u32 rawmagn;
+ u32 rawropblend;
+ u32 rawcmp;
+ u32 rawwac;
+ u32 fbramid;
- volatile u32 drawop;
- u32 xxx10[2];
- volatile u32 fontlpat;
- u32 xxx11;
- volatile u32 fontxy;
- volatile u32 fontw;
- volatile u32 fontinc;
- volatile u32 font;
- u32 xxx12[3];
- volatile u32 blend2;
- volatile u32 preblend;
- volatile u32 stencil;
- volatile u32 stencilctl;
-
- u32 xxx13[4];
- volatile u32 dcss1;
- volatile u32 dcss2;
- volatile u32 dcss3;
- volatile u32 widpmask;
- volatile u32 dcs2;
- volatile u32 dcs3;
- volatile u32 dcs4;
- u32 xxx14;
- volatile u32 dcd2;
- volatile u32 dcd3;
- volatile u32 dcd4;
- u32 xxx15;
+ u32 drawop;
+ u32 xxx10[2];
+ u32 fontlpat;
+ u32 xxx11;
+ u32 fontxy;
+ u32 fontw;
+ u32 fontinc;
+ u32 font;
+ u32 xxx12[3];
+ u32 blend2;
+ u32 preblend;
+ u32 stencil;
+ u32 stencilctl;
+
+ u32 xxx13[4];
+ u32 dcss1;
+ u32 dcss2;
+ u32 dcss3;
+ u32 widpmask;
+ u32 dcs2;
+ u32 dcs3;
+ u32 dcs4;
+ u32 xxx14;
+ u32 dcd2;
+ u32 dcd3;
+ u32 dcd4;
+ u32 xxx15;
- volatile u32 pattern[32];
+ u32 pattern[32];
- u32 xxx16[256];
+ u32 xxx16[256];
- volatile u32 devid;
- u32 xxx17[63];
+ u32 devid;
+ u32 xxx17[63];
- volatile u32 ucsr;
- u32 xxx18[31];
+ u32 ucsr;
+ u32 xxx18[31];
- volatile u32 mer;
+ u32 mer;
};
struct ffb_dac {
- volatile u32 type;
- volatile u32 value;
- volatile u32 type2;
- volatile u32 value2;
+ u32 type;
+ u32 value;
+ u32 type2;
+ u32 value2;
};
struct ffb_par {
spinlock_t lock;
- struct ffb_fbc *fbc;
- struct ffb_dac *dac;
+ struct ffb_fbc __iomem *fbc;
+ struct ffb_dac __iomem *dac;
u32 flags;
#define FFB_FLAG_AFB 0x00000001
unsigned long physbase;
unsigned long fbsize;
- char name[64];
- int prom_node;
- int prom_parent_node;
int dac_rev;
int board_type;
};
static void FFBFifo(struct ffb_par *par, int n)
{
- struct ffb_fbc *fbc;
+ struct ffb_fbc __iomem *fbc;
int cache = par->fifo_cache;
if (cache - n < 0) {
static void FFBWait(struct ffb_par *par)
{
- struct ffb_fbc *fbc;
+ struct ffb_fbc __iomem *fbc;
int limit = 10000;
fbc = par->fbc;
static void ffb_switch_from_graph(struct ffb_par *par)
{
- struct ffb_fbc *fbc = par->fbc;
- struct ffb_dac *dac = par->dac;
+ struct ffb_fbc __iomem *fbc = par->fbc;
+ struct ffb_dac __iomem *dac = par->dac;
unsigned long flags;
spin_lock_irqsave(&par->lock, flags);
static void ffb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
{
struct ffb_par *par = (struct ffb_par *) info->par;
- struct ffb_fbc *fbc = par->fbc;
+ struct ffb_fbc __iomem *fbc = par->fbc;
unsigned long flags;
u32 fg;
ffb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
{
struct ffb_par *par = (struct ffb_par *) info->par;
- struct ffb_fbc *fbc = par->fbc;
+ struct ffb_fbc __iomem *fbc = par->fbc;
unsigned long flags;
if (area->dx != area->sx ||
static void ffb_imageblit(struct fb_info *info, const struct fb_image *image)
{
struct ffb_par *par = (struct ffb_par *) info->par;
- struct ffb_fbc *fbc = par->fbc;
+ struct ffb_fbc __iomem *fbc = par->fbc;
const u8 *data = image->data;
unsigned long flags;
u32 fg, bg, xy;
ffb_blank(int blank, struct fb_info *info)
{
struct ffb_par *par = (struct ffb_par *) info->par;
- struct ffb_dac *dac = par->dac;
+ struct ffb_dac __iomem *dac = par->dac;
unsigned long flags;
u32 tmp;
info->fix.accel = FB_ACCEL_SUN_CREATOR;
}
-static int ffb_apply_upa_parent_ranges(int parent,
- struct linux_prom64_registers *regs)
-{
- struct linux_prom64_ranges ranges[PROMREG_MAX];
- char name[128];
- int len, i;
-
- prom_getproperty(parent, "name", name, sizeof(name));
- if (strcmp(name, "upa") != 0)
- return 0;
-
- len = prom_getproperty(parent, "ranges", (void *) ranges, sizeof(ranges));
- if (len <= 0)
- return 1;
-
- len /= sizeof(struct linux_prom64_ranges);
- for (i = 0; i < len; i++) {
- struct linux_prom64_ranges *rng = &ranges[i];
- u64 phys_addr = regs->phys_addr;
-
- if (phys_addr >= rng->ot_child_base &&
- phys_addr < (rng->ot_child_base + rng->or_size)) {
- regs->phys_addr -= rng->ot_child_base;
- regs->phys_addr += rng->ot_parent_base;
- return 0;
- }
- }
-
- return 1;
-}
-
struct all_info {
struct fb_info info;
struct ffb_par par;
u32 pseudo_palette[256];
- struct list_head list;
};
-static LIST_HEAD(ffb_list);
-static void ffb_init_one(int node, int parent)
+static int ffb_init_one(struct of_device *op)
{
- struct linux_prom64_registers regs[2*PROMREG_MAX];
- struct ffb_fbc *fbc;
- struct ffb_dac *dac;
+ struct device_node *dp = op->node;
+ struct ffb_fbc __iomem *fbc;
+ struct ffb_dac __iomem *dac;
struct all_info *all;
+ int err;
- if (prom_getproperty(node, "reg", (void *) regs, sizeof(regs)) <= 0) {
- printk("ffb: Cannot get reg device node property.\n");
- return;
- }
+ all = kzalloc(sizeof(*all), GFP_KERNEL);
+ if (!all)
+ return -ENOMEM;
- if (ffb_apply_upa_parent_ranges(parent, ®s[0])) {
- printk("ffb: Cannot apply parent ranges to regs.\n");
- return;
+ spin_lock_init(&all->par.lock);
+ all->par.fbc = of_ioremap(&op->resource[2], 0,
+ sizeof(struct ffb_fbc), "ffb fbc");
+ if (!all->par.fbc) {
+ kfree(all);
+ return -ENOMEM;
}
- all = kmalloc(sizeof(*all), GFP_KERNEL);
- if (!all) {
- printk(KERN_ERR "ffb: Cannot allocate memory.\n");
- return;
+ all->par.dac = of_ioremap(&op->resource[1], 0,
+ sizeof(struct ffb_dac), "ffb dac");
+ if (!all->par.dac) {
+ of_iounmap(all->par.fbc, sizeof(struct ffb_fbc));
+ kfree(all);
+ return -ENOMEM;
}
- memset(all, 0, sizeof(*all));
-
- INIT_LIST_HEAD(&all->list);
- spin_lock_init(&all->par.lock);
- all->par.fbc = (struct ffb_fbc *)(regs[0].phys_addr + FFB_FBC_REGS_POFF);
- all->par.dac = (struct ffb_dac *)(regs[0].phys_addr + FFB_DAC_POFF);
all->par.rop_cache = FFB_ROP_NEW;
- all->par.physbase = regs[0].phys_addr;
- all->par.prom_node = node;
- all->par.prom_parent_node = parent;
+ all->par.physbase = op->resource[0].start;
/* Don't mention copyarea, so SCROLL_REDRAW is always
* used. It is the fastest on this chip.
all->info.par = &all->par;
all->info.pseudo_palette = all->pseudo_palette;
- sbusfb_fill_var(&all->info.var, all->par.prom_node, 32);
+ sbusfb_fill_var(&all->info.var, dp->node, 32);
all->par.fbsize = PAGE_ALIGN(all->info.var.xres *
all->info.var.yres *
4);
all->info.var.accel_flags = FB_ACCELF_TEXT;
- prom_getstring(node, "name", all->par.name, sizeof(all->par.name));
- if (!strcmp(all->par.name, "SUNW,afb"))
+ if (!strcmp(dp->name, "SUNW,afb"))
all->par.flags |= FFB_FLAG_AFB;
- all->par.board_type = prom_getintdefault(node, "board_type", 0);
+ all->par.board_type = of_getintprop_default(dp, "board_type", 0);
fbc = all->par.fbc;
- if((upa_readl(&fbc->ucsr) & FFB_UCSR_ALL_ERRORS) != 0)
+ if ((upa_readl(&fbc->ucsr) & FFB_UCSR_ALL_ERRORS) != 0)
upa_writel(FFB_UCSR_ALL_ERRORS, &fbc->ucsr);
ffb_switch_from_graph(&all->par);
if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
printk(KERN_ERR "ffb: Could not allocate color map.\n");
kfree(all);
- return;
+ return -ENOMEM;
}
ffb_init_fix(&all->info);
- if (register_framebuffer(&all->info) < 0) {
+ err = register_framebuffer(&all->info);
+ if (err < 0) {
printk(KERN_ERR "ffb: Could not register framebuffer.\n");
fb_dealloc_cmap(&all->info.cmap);
kfree(all);
- return;
+ return err;
}
- list_add(&all->list, &ffb_list);
+ dev_set_drvdata(&op->dev, all);
- printk("ffb: %s at %016lx type %d DAC %d\n",
+ printk("%s: %s at %016lx, type %d, DAC revision %d\n",
+ dp->full_name,
((all->par.flags & FFB_FLAG_AFB) ? "AFB" : "FFB"),
- regs[0].phys_addr, all->par.board_type, all->par.dac_rev);
+ all->par.physbase, all->par.board_type, all->par.dac_rev);
+
+ return 0;
}
-static void ffb_scan_siblings(int root)
+static int __devinit ffb_probe(struct of_device *dev, const struct of_device_id *match)
{
- int node, child;
-
- child = prom_getchild(root);
- for (node = prom_searchsiblings(child, "SUNW,ffb"); node;
- node = prom_searchsiblings(prom_getsibling(node), "SUNW,ffb"))
- ffb_init_one(node, root);
- for (node = prom_searchsiblings(child, "SUNW,afb"); node;
- node = prom_searchsiblings(prom_getsibling(node), "SUNW,afb"))
- ffb_init_one(node, root);
+ struct of_device *op = to_of_device(&dev->dev);
+
+ return ffb_init_one(op);
}
-int __init ffb_init(void)
+static int __devexit ffb_remove(struct of_device *dev)
{
- int root;
+ struct all_info *all = dev_get_drvdata(&dev->dev);
- if (fb_get_options("ffb", NULL))
- return -ENODEV;
+ unregister_framebuffer(&all->info);
+ fb_dealloc_cmap(&all->info.cmap);
- ffb_scan_siblings(prom_root_node);
+ of_iounmap(all->par.fbc, sizeof(struct ffb_fbc));
+ of_iounmap(all->par.dac, sizeof(struct ffb_dac));
- root = prom_getchild(prom_root_node);
- for (root = prom_searchsiblings(root, "upa"); root;
- root = prom_searchsiblings(prom_getsibling(root), "upa"))
- ffb_scan_siblings(root);
+ kfree(all);
+
+ dev_set_drvdata(&dev->dev, NULL);
return 0;
}
-void __exit ffb_exit(void)
-{
- struct list_head *pos, *tmp;
+static struct of_device_id ffb_match[] = {
+ {
+ .name = "SUNW,ffb",
+ },
+ {
+ .name = "SUNW,afb",
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, ffb_match);
+
+static struct of_platform_driver ffb_driver = {
+ .name = "ffb",
+ .match_table = ffb_match,
+ .probe = ffb_probe,
+ .remove = __devexit_p(ffb_remove),
+};
- list_for_each_safe(pos, tmp, &ffb_list) {
- struct all_info *all = list_entry(pos, typeof(*all), list);
+int __init ffb_init(void)
+{
+ if (fb_get_options("ffb", NULL))
+ return -ENODEV;
- unregister_framebuffer(&all->info);
- fb_dealloc_cmap(&all->info.cmap);
- kfree(all);
- }
+ return of_register_driver(&ffb_driver, &of_bus_type);
}
-int __init
-ffb_setup(char *arg)
+void __exit ffb_exit(void)
{
- /* No cmdline options yet... */
- return 0;
+ of_unregister_driver(&ffb_driver);
}
module_init(ffb_init);
-
-#ifdef MODULE
module_exit(ffb_exit);
-#endif
MODULE_DESCRIPTION("framebuffer driver for Creator/Elite3D chipsets");
-MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
+MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
+MODULE_VERSION("2.0");
MODULE_LICENSE("GPL");
size_remap = size_total;
imacfb_fix.smem_len = size_remap;
-#ifndef __i386__
- screen_info.imacpm_seg = 0;
-#endif
-
if (!request_mem_region(imacfb_fix.smem_start, size_total, "imacfb")) {
printk(KERN_WARNING
"imacfb: cannot reserve video memory at 0x%lx\n",
/* leo.c: LEO frame buffer driver
*
- * Copyright (C) 2003 David S. Miller (davem@redhat.com)
+ * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
* Copyright (C) 1996-1999 Jakub Jelinek (jj@ultra.linux.cz)
* Copyright (C) 1997 Michal Rehacek (Michal.Rehacek@st.mff.cuni.cz)
*
#include <linux/mm.h>
#include <asm/io.h>
-#include <asm/sbus.h>
-#include <asm/oplib.h>
+#include <asm/prom.h>
+#include <asm/of_device.h>
#include <asm/fbio.h>
#include "sbuslib.h"
struct leo_cursor {
u8 xxx0[16];
- volatile u32 cur_type;
- volatile u32 cur_misc;
- volatile u32 cur_cursxy;
- volatile u32 cur_data;
+ u32 cur_type;
+ u32 cur_misc;
+ u32 cur_cursxy;
+ u32 cur_data;
};
#define LEO_KRN_TYPE_CLUT0 0x00001000
#define LEO_KRN_CSR_UNK2 0x00000001
struct leo_lx_krn {
- volatile u32 krn_type;
- volatile u32 krn_csr;
- volatile u32 krn_value;
+ u32 krn_type;
+ u32 krn_csr;
+ u32 krn_value;
};
struct leo_lc_ss0_krn {
- volatile u32 misc;
+ u32 misc;
u8 xxx0[0x800-4];
- volatile u32 rev;
+ u32 rev;
};
struct leo_lc_ss0_usr {
- volatile u32 csr;
- volatile u32 addrspace;
- volatile u32 fontmsk;
- volatile u32 fontt;
- volatile u32 extent;
- volatile u32 src;
+ u32 csr;
+ u32 addrspace;
+ u32 fontmsk;
+ u32 fontt;
+ u32 extent;
+ u32 src;
u32 dst;
- volatile u32 copy;
- volatile u32 fill;
+ u32 copy;
+ u32 fill;
};
struct leo_lc_ss1_krn {
struct leo_ld {
u8 xxx0[0xe00];
- volatile u32 csr;
- volatile u32 wid;
- volatile u32 wmask;
- volatile u32 widclip;
- volatile u32 vclipmin;
- volatile u32 vclipmax;
- volatile u32 pickmin; /* SS1 only */
- volatile u32 pickmax; /* SS1 only */
- volatile u32 fg;
- volatile u32 bg;
- volatile u32 src; /* Copy/Scroll (SS0 only) */
- volatile u32 dst; /* Copy/Scroll/Fill (SS0 only) */
- volatile u32 extent; /* Copy/Scroll/Fill size (SS0 only) */
+ u32 csr;
+ u32 wid;
+ u32 wmask;
+ u32 widclip;
+ u32 vclipmin;
+ u32 vclipmax;
+ u32 pickmin; /* SS1 only */
+ u32 pickmax; /* SS1 only */
+ u32 fg;
+ u32 bg;
+ u32 src; /* Copy/Scroll (SS0 only) */
+ u32 dst; /* Copy/Scroll/Fill (SS0 only) */
+ u32 extent; /* Copy/Scroll/Fill size (SS0 only) */
u32 xxx1[3];
- volatile u32 setsem; /* SS1 only */
- volatile u32 clrsem; /* SS1 only */
- volatile u32 clrpick; /* SS1 only */
- volatile u32 clrdat; /* SS1 only */
- volatile u32 alpha; /* SS1 only */
+ u32 setsem; /* SS1 only */
+ u32 clrsem; /* SS1 only */
+ u32 clrpick; /* SS1 only */
+ u32 clrdat; /* SS1 only */
+ u32 alpha; /* SS1 only */
u8 xxx2[0x2c];
- volatile u32 winbg;
- volatile u32 planemask;
- volatile u32 rop;
- volatile u32 z;
- volatile u32 dczf; /* SS1 only */
- volatile u32 dczb; /* SS1 only */
- volatile u32 dcs; /* SS1 only */
- volatile u32 dczs; /* SS1 only */
- volatile u32 pickfb; /* SS1 only */
- volatile u32 pickbb; /* SS1 only */
- volatile u32 dcfc; /* SS1 only */
- volatile u32 forcecol; /* SS1 only */
- volatile u32 door[8]; /* SS1 only */
- volatile u32 pick[5]; /* SS1 only */
+ u32 winbg;
+ u32 planemask;
+ u32 rop;
+ u32 z;
+ u32 dczf; /* SS1 only */
+ u32 dczb; /* SS1 only */
+ u32 dcs; /* SS1 only */
+ u32 dczs; /* SS1 only */
+ u32 pickfb; /* SS1 only */
+ u32 pickbb; /* SS1 only */
+ u32 dcfc; /* SS1 only */
+ u32 forcecol; /* SS1 only */
+ u32 door[8]; /* SS1 only */
+ u32 pick[5]; /* SS1 only */
};
#define LEO_SS1_MISC_ENABLE 0x00000001
#define LEO_SS1_MISC_STEREO 0x00000002
struct leo_ld_ss1 {
- u8 xxx0[0xef4];
- volatile u32 ss1_misc;
+ u8 xxx0[0xef4];
+ u32 ss1_misc;
};
struct leo_ld_gbl {
#define LEO_FLAG_BLANKED 0x00000001
unsigned long physbase;
+ unsigned long which_io;
unsigned long fbsize;
-
- struct sbus_dev *sdev;
};
static void leo_wait(struct leo_lx_krn __iomem *lx_krn)
return sbusfb_mmap_helper(leo_mmap_map,
par->physbase, par->fbsize,
- par->sdev->reg_addrs[0].which_io,
- vma);
+ par->which_io, vma);
}
static int leo_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
*/
static void
-leo_init_fix(struct fb_info *info)
+leo_init_fix(struct fb_info *info, struct device_node *dp)
{
- struct leo_par *par = (struct leo_par *)info->par;
-
- strlcpy(info->fix.id, par->sdev->prom_name, sizeof(info->fix.id));
+ strlcpy(info->fix.id, dp->name, sizeof(info->fix.id));
info->fix.type = FB_TYPE_PACKED_PIXELS;
info->fix.visual = FB_VISUAL_TRUECOLOR;
struct all_info {
struct fb_info info;
struct leo_par par;
- struct list_head list;
};
-static LIST_HEAD(leo_list);
-static void leo_init_one(struct sbus_dev *sdev)
+static void leo_unmap_regs(struct all_info *all)
{
- struct all_info *all;
- int linebytes;
+ if (all->par.lc_ss0_usr)
+ of_iounmap(all->par.lc_ss0_usr, 0x1000);
+ if (all->par.ld_ss0)
+ of_iounmap(all->par.ld_ss0, 0x1000);
+ if (all->par.ld_ss1)
+ of_iounmap(all->par.ld_ss1, 0x1000);
+ if (all->par.lx_krn)
+ of_iounmap(all->par.lx_krn, 0x1000);
+ if (all->par.cursor)
+ of_iounmap(all->par.cursor, sizeof(struct leo_cursor));
+ if (all->info.screen_base)
+ of_iounmap(all->info.screen_base, 0x800000);
+}
- all = kmalloc(sizeof(*all), GFP_KERNEL);
- if (!all) {
- printk(KERN_ERR "leo: Cannot allocate memory.\n");
- return;
- }
- memset(all, 0, sizeof(*all));
+static int __devinit leo_init_one(struct of_device *op)
+{
+ struct device_node *dp = op->node;
+ struct all_info *all;
+ int linebytes, err;
- INIT_LIST_HEAD(&all->list);
+ all = kzalloc(sizeof(*all), GFP_KERNEL);
+ if (!all)
+ return -ENOMEM;
spin_lock_init(&all->par.lock);
- all->par.sdev = sdev;
- all->par.physbase = sdev->reg_addrs[0].phys_addr;
+ all->par.physbase = op->resource[0].start;
+ all->par.which_io = op->resource[0].flags & IORESOURCE_BITS;
- sbusfb_fill_var(&all->info.var, sdev->prom_node, 32);
+ sbusfb_fill_var(&all->info.var, dp->node, 32);
leo_fixup_var_rgb(&all->info.var);
- linebytes = prom_getintdefault(sdev->prom_node, "linebytes",
- all->info.var.xres);
+ linebytes = of_getintprop_default(dp, "linebytes",
+ all->info.var.xres);
all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
-#ifdef CONFIG_SPARC32
- all->info.screen_base = (char __iomem *)
- prom_getintdefault(sdev->prom_node, "address", 0);
-#endif
- if (!all->info.screen_base)
- all->info.screen_base =
- sbus_ioremap(&sdev->resource[0], LEO_OFF_SS0,
- 0x800000, "leo ram");
-
all->par.lc_ss0_usr =
- sbus_ioremap(&sdev->resource[0], LEO_OFF_LC_SS0_USR,
- 0x1000, "leolc ss0usr");
+ of_ioremap(&op->resource[0], LEO_OFF_LC_SS0_USR,
+ 0x1000, "leolc ss0usr");
all->par.ld_ss0 =
- sbus_ioremap(&sdev->resource[0], LEO_OFF_LD_SS0,
- 0x1000, "leold ss0");
+ of_ioremap(&op->resource[0], LEO_OFF_LD_SS0,
+ 0x1000, "leold ss0");
all->par.ld_ss1 =
- sbus_ioremap(&sdev->resource[0], LEO_OFF_LD_SS1,
- 0x1000, "leold ss1");
+ of_ioremap(&op->resource[0], LEO_OFF_LD_SS1,
+ 0x1000, "leold ss1");
all->par.lx_krn =
- sbus_ioremap(&sdev->resource[0], LEO_OFF_LX_KRN,
- 0x1000, "leolx krn");
+ of_ioremap(&op->resource[0], LEO_OFF_LX_KRN,
+ 0x1000, "leolx krn");
all->par.cursor =
- sbus_ioremap(&sdev->resource[0], LEO_OFF_LX_CURSOR,
- sizeof(struct leo_cursor), "leolx cursor");
+ of_ioremap(&op->resource[0], LEO_OFF_LX_CURSOR,
+ sizeof(struct leo_cursor), "leolx cursor");
+ all->info.screen_base =
+ of_ioremap(&op->resource[0], LEO_OFF_SS0,
+ 0x800000, "leo ram");
+ if (!all->par.lc_ss0_usr ||
+ !all->par.ld_ss0 ||
+ !all->par.ld_ss1 ||
+ !all->par.lx_krn ||
+ !all->par.cursor ||
+ !all->info.screen_base) {
+ leo_unmap_regs(all);
+ kfree(all);
+ return -ENOMEM;
+ }
all->info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
all->info.fbops = &leo_ops;
leo_blank(0, &all->info);
if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
- printk(KERN_ERR "leo: Could not allocate color map.\n");
+ leo_unmap_regs(all);
kfree(all);
- return;
+ return -ENOMEM;;
}
- leo_init_fix(&all->info);
+ leo_init_fix(&all->info, dp);
- if (register_framebuffer(&all->info) < 0) {
- printk(KERN_ERR "leo: Could not register framebuffer.\n");
+ err = register_framebuffer(&all->info);
+ if (err < 0) {
fb_dealloc_cmap(&all->info.cmap);
+ leo_unmap_regs(all);
kfree(all);
- return;
+ return err;
}
- list_add(&all->list, &leo_list);
+ dev_set_drvdata(&op->dev, all);
+
+ printk("%s: leo at %lx:%lx\n",
+ dp->full_name,
+ all->par.which_io, all->par.physbase);
- printk("leo: %s at %lx:%lx\n",
- sdev->prom_name,
- (long) sdev->reg_addrs[0].which_io,
- (long) sdev->reg_addrs[0].phys_addr);
+ return 0;
}
-int __init leo_init(void)
+static int __devinit leo_probe(struct of_device *dev, const struct of_device_id *match)
{
- struct sbus_bus *sbus;
- struct sbus_dev *sdev;
+ struct of_device *op = to_of_device(&dev->dev);
- if (fb_get_options("leofb", NULL))
- return -ENODEV;
+ return leo_init_one(op);
+}
- for_all_sbusdev(sdev, sbus) {
- if (!strcmp(sdev->prom_name, "leo"))
- leo_init_one(sdev);
- }
+static int __devexit leo_remove(struct of_device *dev)
+{
+ struct all_info *all = dev_get_drvdata(&dev->dev);
+
+ unregister_framebuffer(&all->info);
+ fb_dealloc_cmap(&all->info.cmap);
+
+ leo_unmap_regs(all);
+
+ kfree(all);
+
+ dev_set_drvdata(&dev->dev, NULL);
return 0;
}
-void __exit leo_exit(void)
-{
- struct list_head *pos, *tmp;
+static struct of_device_id leo_match[] = {
+ {
+ .name = "leo",
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, leo_match);
+
+static struct of_platform_driver leo_driver = {
+ .name = "leo",
+ .match_table = leo_match,
+ .probe = leo_probe,
+ .remove = __devexit_p(leo_remove),
+};
- list_for_each_safe(pos, tmp, &leo_list) {
- struct all_info *all = list_entry(pos, typeof(*all), list);
+static int __init leo_init(void)
+{
+ if (fb_get_options("leofb", NULL))
+ return -ENODEV;
- unregister_framebuffer(&all->info);
- fb_dealloc_cmap(&all->info.cmap);
- kfree(all);
- }
+ return of_register_driver(&leo_driver, &of_bus_type);
}
-int __init
-leo_setup(char *arg)
+static void __exit leo_exit(void)
{
- /* No cmdline options yet... */
- return 0;
+ of_unregister_driver(&leo_driver);
}
module_init(leo_init);
-#ifdef MODULE
module_exit(leo_exit);
-#endif
MODULE_DESCRIPTION("framebuffer driver for LEO chipsets");
-MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
+MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
+MODULE_VERSION("2.0");
MODULE_LICENSE("GPL");
/* p9100.c: P9100 frame buffer driver
*
- * Copyright (C) 2003 David S. Miller (davem@redhat.com)
+ * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
* Copyright 1999 Derrick J Brashear (shadow@dementia.org)
*
* Driver layout based loosely on tgafb.c, see that file for credits.
#include <linux/mm.h>
#include <asm/io.h>
-#include <asm/sbus.h>
-#include <asm/oplib.h>
+#include <asm/prom.h>
+#include <asm/of_device.h>
#include <asm/fbio.h>
#include "sbuslib.h"
struct p9100_regs {
/* Registers for the system control */
- volatile u32 sys_base;
- volatile u32 sys_config;
- volatile u32 sys_intr;
- volatile u32 sys_int_ena;
- volatile u32 sys_alt_rd;
- volatile u32 sys_alt_wr;
- volatile u32 sys_xxx[58];
+ u32 sys_base;
+ u32 sys_config;
+ u32 sys_intr;
+ u32 sys_int_ena;
+ u32 sys_alt_rd;
+ u32 sys_alt_wr;
+ u32 sys_xxx[58];
/* Registers for the video control */
- volatile u32 vid_base;
- volatile u32 vid_hcnt;
- volatile u32 vid_htotal;
- volatile u32 vid_hsync_rise;
- volatile u32 vid_hblank_rise;
- volatile u32 vid_hblank_fall;
- volatile u32 vid_hcnt_preload;
- volatile u32 vid_vcnt;
- volatile u32 vid_vlen;
- volatile u32 vid_vsync_rise;
- volatile u32 vid_vblank_rise;
- volatile u32 vid_vblank_fall;
- volatile u32 vid_vcnt_preload;
- volatile u32 vid_screenpaint_addr;
- volatile u32 vid_screenpaint_timectl1;
- volatile u32 vid_screenpaint_qsfcnt;
- volatile u32 vid_screenpaint_timectl2;
- volatile u32 vid_xxx[15];
+ u32 vid_base;
+ u32 vid_hcnt;
+ u32 vid_htotal;
+ u32 vid_hsync_rise;
+ u32 vid_hblank_rise;
+ u32 vid_hblank_fall;
+ u32 vid_hcnt_preload;
+ u32 vid_vcnt;
+ u32 vid_vlen;
+ u32 vid_vsync_rise;
+ u32 vid_vblank_rise;
+ u32 vid_vblank_fall;
+ u32 vid_vcnt_preload;
+ u32 vid_screenpaint_addr;
+ u32 vid_screenpaint_timectl1;
+ u32 vid_screenpaint_qsfcnt;
+ u32 vid_screenpaint_timectl2;
+ u32 vid_xxx[15];
/* Registers for the video control */
- volatile u32 vram_base;
- volatile u32 vram_memcfg;
- volatile u32 vram_refresh_pd;
- volatile u32 vram_refresh_cnt;
- volatile u32 vram_raslo_max;
- volatile u32 vram_raslo_cur;
- volatile u32 pwrup_cfg;
- volatile u32 vram_xxx[25];
+ u32 vram_base;
+ u32 vram_memcfg;
+ u32 vram_refresh_pd;
+ u32 vram_refresh_cnt;
+ u32 vram_raslo_max;
+ u32 vram_raslo_cur;
+ u32 pwrup_cfg;
+ u32 vram_xxx[25];
/* Registers for IBM RGB528 Palette */
- volatile u32 ramdac_cmap_wridx;
- volatile u32 ramdac_palette_data;
- volatile u32 ramdac_pixel_mask;
- volatile u32 ramdac_palette_rdaddr;
- volatile u32 ramdac_idx_lo;
- volatile u32 ramdac_idx_hi;
- volatile u32 ramdac_idx_data;
- volatile u32 ramdac_idx_ctl;
- volatile u32 ramdac_xxx[1784];
+ u32 ramdac_cmap_wridx;
+ u32 ramdac_palette_data;
+ u32 ramdac_pixel_mask;
+ u32 ramdac_palette_rdaddr;
+ u32 ramdac_idx_lo;
+ u32 ramdac_idx_hi;
+ u32 ramdac_idx_data;
+ u32 ramdac_idx_ctl;
+ u32 ramdac_xxx[1784];
};
struct p9100_cmd_parameng {
- volatile u32 parameng_status;
- volatile u32 parameng_bltcmd;
- volatile u32 parameng_quadcmd;
+ u32 parameng_status;
+ u32 parameng_bltcmd;
+ u32 parameng_quadcmd;
};
struct p9100_par {
#define P9100_FLAG_BLANKED 0x00000001
unsigned long physbase;
+ unsigned long which_io;
unsigned long fbsize;
-
- struct sbus_dev *sdev;
};
/**
return sbusfb_mmap_helper(p9100_mmap_map,
par->physbase, par->fbsize,
- par->sdev->reg_addrs[0].which_io,
- vma);
+ par->which_io, vma);
}
static int p9100_ioctl(struct fb_info *info, unsigned int cmd,
* Initialisation
*/
-static void
-p9100_init_fix(struct fb_info *info, int linebytes)
+static void p9100_init_fix(struct fb_info *info, int linebytes, struct device_node *dp)
{
- struct p9100_par *par = (struct p9100_par *)info->par;
-
- strlcpy(info->fix.id, par->sdev->prom_name, sizeof(info->fix.id));
+ strlcpy(info->fix.id, dp->name, sizeof(info->fix.id));
info->fix.type = FB_TYPE_PACKED_PIXELS;
info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
struct all_info {
struct fb_info info;
struct p9100_par par;
- struct list_head list;
};
-static LIST_HEAD(p9100_list);
-static void p9100_init_one(struct sbus_dev *sdev)
+static int __devinit p9100_init_one(struct of_device *op)
{
+ struct device_node *dp = op->node;
struct all_info *all;
- int linebytes;
-
- all = kmalloc(sizeof(*all), GFP_KERNEL);
- if (!all) {
- printk(KERN_ERR "p9100: Cannot allocate memory.\n");
- return;
- }
- memset(all, 0, sizeof(*all));
+ int linebytes, err;
- INIT_LIST_HEAD(&all->list);
+ all = kzalloc(sizeof(*all), GFP_KERNEL);
+ if (!all)
+ return -ENOMEM;
spin_lock_init(&all->par.lock);
- all->par.sdev = sdev;
/* This is the framebuffer and the only resource apps can mmap. */
- all->par.physbase = sdev->reg_addrs[2].phys_addr;
+ all->par.physbase = op->resource[2].start;
+ all->par.which_io = op->resource[2].flags & IORESOURCE_BITS;
- sbusfb_fill_var(&all->info.var, sdev->prom_node, 8);
+ sbusfb_fill_var(&all->info.var, dp->node, 8);
all->info.var.red.length = 8;
all->info.var.green.length = 8;
all->info.var.blue.length = 8;
- linebytes = prom_getintdefault(sdev->prom_node, "linebytes",
- all->info.var.xres);
+ linebytes = of_getintprop_default(dp, "linebytes",
+ all->info.var.xres);
all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
- all->par.regs = sbus_ioremap(&sdev->resource[0], 0,
- sizeof(struct p9100_regs), "p9100 regs");
+ all->par.regs = of_ioremap(&op->resource[0], 0,
+ sizeof(struct p9100_regs), "p9100 regs");
+ if (!all->par.regs) {
+ kfree(all);
+ return -ENOMEM;
+ }
all->info.flags = FBINFO_DEFAULT;
all->info.fbops = &p9100_ops;
-#ifdef CONFIG_SPARC32
- all->info.screen_base = (char __iomem *)
- prom_getintdefault(sdev->prom_node, "address", 0);
-#endif
- if (!all->info.screen_base)
- all->info.screen_base = sbus_ioremap(&sdev->resource[2], 0,
- all->par.fbsize, "p9100 ram");
+ all->info.screen_base = of_ioremap(&op->resource[2], 0,
+ all->par.fbsize, "p9100 ram");
+ if (!all->info.screen_base) {
+ of_iounmap(all->par.regs, sizeof(struct p9100_regs));
+ kfree(all);
+ return -ENOMEM;
+ }
all->info.par = &all->par;
p9100_blank(0, &all->info);
if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
- printk(KERN_ERR "p9100: Could not allocate color map.\n");
+ of_iounmap(all->par.regs, sizeof(struct p9100_regs));
+ of_iounmap(all->info.screen_base, all->par.fbsize);
kfree(all);
- return;
+ return -ENOMEM;
}
- p9100_init_fix(&all->info, linebytes);
+ p9100_init_fix(&all->info, linebytes, dp);
- if (register_framebuffer(&all->info) < 0) {
- printk(KERN_ERR "p9100: Could not register framebuffer.\n");
+ err = register_framebuffer(&all->info);
+ if (err < 0) {
fb_dealloc_cmap(&all->info.cmap);
+ of_iounmap(all->par.regs, sizeof(struct p9100_regs));
+ of_iounmap(all->info.screen_base, all->par.fbsize);
kfree(all);
- return;
+ return err;
}
fb_set_cmap(&all->info.cmap, &all->info);
- list_add(&all->list, &p9100_list);
+ dev_set_drvdata(&op->dev, all);
+
+ printk("%s: p9100 at %lx:%lx\n",
+ dp->full_name,
+ all->par.which_io, all->par.physbase);
- printk("p9100: %s at %lx:%lx\n",
- sdev->prom_name,
- (long) sdev->reg_addrs[0].which_io,
- (long) sdev->reg_addrs[0].phys_addr);
+ return 0;
}
-int __init p9100_init(void)
+static int __devinit p9100_probe(struct of_device *dev, const struct of_device_id *match)
{
- struct sbus_bus *sbus;
- struct sbus_dev *sdev;
+ struct of_device *op = to_of_device(&dev->dev);
- if (fb_get_options("p9100fb", NULL))
- return -ENODEV;
+ return p9100_init_one(op);
+}
- for_all_sbusdev(sdev, sbus) {
- if (!strcmp(sdev->prom_name, "p9100"))
- p9100_init_one(sdev);
- }
+static int __devexit p9100_remove(struct of_device *dev)
+{
+ struct all_info *all = dev_get_drvdata(&dev->dev);
+
+ unregister_framebuffer(&all->info);
+ fb_dealloc_cmap(&all->info.cmap);
+
+ of_iounmap(all->par.regs, sizeof(struct p9100_regs));
+ of_iounmap(all->info.screen_base, all->par.fbsize);
+
+ kfree(all);
+
+ dev_set_drvdata(&dev->dev, NULL);
return 0;
}
-void __exit p9100_exit(void)
-{
- struct list_head *pos, *tmp;
+static struct of_device_id p9100_match[] = {
+ {
+ .name = "p9100",
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, p9100_match);
- list_for_each_safe(pos, tmp, &p9100_list) {
- struct all_info *all = list_entry(pos, typeof(*all), list);
+static struct of_platform_driver p9100_driver = {
+ .name = "p9100",
+ .match_table = p9100_match,
+ .probe = p9100_probe,
+ .remove = __devexit_p(p9100_remove),
+};
- unregister_framebuffer(&all->info);
- fb_dealloc_cmap(&all->info.cmap);
- kfree(all);
- }
+static int __init p9100_init(void)
+{
+ if (fb_get_options("p9100fb", NULL))
+ return -ENODEV;
+
+ return of_register_driver(&p9100_driver, &of_bus_type);
}
-int __init
-p9100_setup(char *arg)
+static void __exit p9100_exit(void)
{
- /* No cmdline options yet... */
- return 0;
+ of_unregister_driver(&p9100_driver);
}
module_init(p9100_init);
-
-#ifdef MODULE
module_exit(p9100_exit);
-#endif
MODULE_DESCRIPTION("framebuffer driver for P9100 chipsets");
-MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
+MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
+MODULE_VERSION("2.0");
MODULE_LICENSE("GPL");
/* tcx.c: TCX frame buffer driver
*
- * Copyright (C) 2003 David S. Miller (davem@redhat.com)
+ * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
* Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
* Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
* Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
#include <linux/mm.h>
#include <asm/io.h>
-#include <asm/sbus.h>
-#include <asm/oplib.h>
+#include <asm/prom.h>
+#include <asm/of_device.h>
#include <asm/fbio.h>
#include "sbuslib.h"
/* The contents are unknown */
struct tcx_tec {
- volatile u32 tec_matrix;
- volatile u32 tec_clip;
- volatile u32 tec_vdc;
+ u32 tec_matrix;
+ u32 tec_clip;
+ u32 tec_vdc;
};
struct tcx_thc {
- volatile u32 thc_rev;
+ u32 thc_rev;
u32 thc_pad0[511];
- volatile u32 thc_hs; /* hsync timing */
- volatile u32 thc_hsdvs;
- volatile u32 thc_hd;
- volatile u32 thc_vs; /* vsync timing */
- volatile u32 thc_vd;
- volatile u32 thc_refresh;
- volatile u32 thc_misc;
+ u32 thc_hs; /* hsync timing */
+ u32 thc_hsdvs;
+ u32 thc_hd;
+ u32 thc_vs; /* vsync timing */
+ u32 thc_vd;
+ u32 thc_refresh;
+ u32 thc_misc;
u32 thc_pad1[56];
- volatile u32 thc_cursxy; /* cursor x,y position (16 bits each) */
- volatile u32 thc_cursmask[32]; /* cursor mask bits */
- volatile u32 thc_cursbits[32]; /* what to show where mask enabled */
+ u32 thc_cursxy; /* cursor x,y position (16 bits each) */
+ u32 thc_cursmask[32]; /* cursor mask bits */
+ u32 thc_cursbits[32]; /* what to show where mask enabled */
};
struct bt_regs {
- volatile u32 addr;
- volatile u32 color_map;
- volatile u32 control;
- volatile u32 cursor;
+ u32 addr;
+ u32 color_map;
+ u32 control;
+ u32 cursor;
};
#define TCX_MMAP_ENTRIES 14
struct bt_regs __iomem *bt;
struct tcx_thc __iomem *thc;
struct tcx_tec __iomem *tec;
- volatile u32 __iomem *cplane;
+ u32 __iomem *cplane;
u32 flags;
#define TCX_FLAG_BLANKED 0x00000001
unsigned long physbase;
+ unsigned long which_io;
unsigned long fbsize;
struct sbus_mmap_map mmap_map[TCX_MMAP_ENTRIES];
int lowdepth;
-
- struct sbus_dev *sdev;
};
/* Reset control plane so that WID is 8-bit plane. */
static void __tcx_set_control_plane (struct tcx_par *par)
{
- volatile u32 __iomem *p, *pend;
+ u32 __iomem *p, *pend;
if (par->lowdepth)
return;
return sbusfb_mmap_helper(par->mmap_map,
par->physbase, par->fbsize,
- par->sdev->reg_addrs[0].which_io,
- vma);
+ par->which_io, vma);
}
static int tcx_ioctl(struct fb_info *info, unsigned int cmd,
struct all_info {
struct fb_info info;
struct tcx_par par;
- struct list_head list;
};
-static LIST_HEAD(tcx_list);
-static void tcx_init_one(struct sbus_dev *sdev)
+static void tcx_unmap_regs(struct all_info *all)
{
- struct all_info *all;
- int linebytes, i;
+ if (all->par.tec)
+ of_iounmap(all->par.tec, sizeof(struct tcx_tec));
+ if (all->par.thc)
+ of_iounmap(all->par.thc, sizeof(struct tcx_thc));
+ if (all->par.bt)
+ of_iounmap(all->par.bt, sizeof(struct bt_regs));
+ if (all->par.cplane)
+ of_iounmap(all->par.cplane, all->par.fbsize * sizeof(u32));
+ if (all->info.screen_base)
+ of_iounmap(all->info.screen_base, all->par.fbsize);
+}
- all = kmalloc(sizeof(*all), GFP_KERNEL);
- if (!all) {
- printk(KERN_ERR "tcx: Cannot allocate memory.\n");
- return;
- }
- memset(all, 0, sizeof(*all));
+static int __devinit tcx_init_one(struct of_device *op)
+{
+ struct device_node *dp = op->node;
+ struct all_info *all;
+ int linebytes, i, err;
- INIT_LIST_HEAD(&all->list);
+ all = kzalloc(sizeof(*all), GFP_KERNEL);
+ if (!all)
+ return -ENOMEM;
spin_lock_init(&all->par.lock);
- all->par.sdev = sdev;
- all->par.lowdepth = prom_getbool(sdev->prom_node, "tcx-8-bit");
+ all->par.lowdepth =
+ (of_find_property(dp, "tcx-8-bit", NULL) != NULL);
- sbusfb_fill_var(&all->info.var, sdev->prom_node, 8);
+ sbusfb_fill_var(&all->info.var, dp->node, 8);
all->info.var.red.length = 8;
all->info.var.green.length = 8;
all->info.var.blue.length = 8;
- linebytes = prom_getintdefault(sdev->prom_node, "linebytes",
- all->info.var.xres);
+ linebytes = of_getintprop_default(dp, "linebytes",
+ all->info.var.xres);
all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
- all->par.tec = sbus_ioremap(&sdev->resource[7], 0,
- sizeof(struct tcx_tec), "tcx tec");
- all->par.thc = sbus_ioremap(&sdev->resource[9], 0,
- sizeof(struct tcx_thc), "tcx thc");
- all->par.bt = sbus_ioremap(&sdev->resource[8], 0,
- sizeof(struct bt_regs), "tcx dac");
+ all->par.tec = of_ioremap(&op->resource[7], 0,
+ sizeof(struct tcx_tec), "tcx tec");
+ all->par.thc = of_ioremap(&op->resource[9], 0,
+ sizeof(struct tcx_thc), "tcx thc");
+ all->par.bt = of_ioremap(&op->resource[8], 0,
+ sizeof(struct bt_regs), "tcx dac");
+ all->info.screen_base = of_ioremap(&op->resource[0], 0,
+ all->par.fbsize, "tcx ram");
+ if (!all->par.tec || !all->par.thc ||
+ !all->par.bt || !all->info.screen_base) {
+ tcx_unmap_regs(all);
+ kfree(all);
+ return -ENOMEM;
+ }
+
memcpy(&all->par.mmap_map, &__tcx_mmap_map, sizeof(all->par.mmap_map));
if (!all->par.lowdepth) {
- all->par.cplane = sbus_ioremap(&sdev->resource[4], 0,
- all->par.fbsize * sizeof(u32), "tcx cplane");
+ all->par.cplane = of_ioremap(&op->resource[4], 0,
+ all->par.fbsize * sizeof(u32),
+ "tcx cplane");
+ if (!all->par.cplane) {
+ tcx_unmap_regs(all);
+ kfree(all);
+ return -ENOMEM;
+ }
} else {
all->par.mmap_map[1].size = SBUS_MMAP_EMPTY;
all->par.mmap_map[4].size = SBUS_MMAP_EMPTY;
}
all->par.physbase = 0;
+ all->par.which_io = op->resource[0].flags & IORESOURCE_BITS;
+
for (i = 0; i < TCX_MMAP_ENTRIES; i++) {
int j;
j = i;
break;
};
- all->par.mmap_map[i].poff = sdev->reg_addrs[j].phys_addr;
+ all->par.mmap_map[i].poff = op->resource[j].start;
}
all->info.flags = FBINFO_DEFAULT;
all->info.fbops = &tcx_ops;
-#ifdef CONFIG_SPARC32
- all->info.screen_base = (char __iomem *)
- prom_getintdefault(sdev->prom_node, "address", 0);
-#endif
- if (!all->info.screen_base)
- all->info.screen_base = sbus_ioremap(&sdev->resource[0], 0,
- all->par.fbsize, "tcx ram");
all->info.par = &all->par;
/* Initialize brooktree DAC. */
tcx_blank(FB_BLANK_UNBLANK, &all->info);
if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
- printk(KERN_ERR "tcx: Could not allocate color map.\n");
+ tcx_unmap_regs(all);
kfree(all);
- return;
+ return -ENOMEM;
}
fb_set_cmap(&all->info.cmap, &all->info);
tcx_init_fix(&all->info, linebytes);
- if (register_framebuffer(&all->info) < 0) {
- printk(KERN_ERR "tcx: Could not register framebuffer.\n");
+ err = register_framebuffer(&all->info);
+ if (err < 0) {
fb_dealloc_cmap(&all->info.cmap);
+ tcx_unmap_regs(all);
kfree(all);
- return;
+ return err;
}
- list_add(&all->list, &tcx_list);
+ dev_set_drvdata(&op->dev, all);
- printk("tcx: %s at %lx:%lx, %s\n",
- sdev->prom_name,
- (long) sdev->reg_addrs[0].which_io,
- (long) sdev->reg_addrs[0].phys_addr,
+ printk("%s: TCX at %lx:%lx, %s\n",
+ dp->full_name,
+ all->par.which_io,
+ op->resource[0].start,
all->par.lowdepth ? "8-bit only" : "24-bit depth");
+
+ return 0;
}
-int __init tcx_init(void)
+static int __devinit tcx_probe(struct of_device *dev, const struct of_device_id *match)
{
- struct sbus_bus *sbus;
- struct sbus_dev *sdev;
+ struct of_device *op = to_of_device(&dev->dev);
- if (fb_get_options("tcxfb", NULL))
- return -ENODEV;
+ return tcx_init_one(op);
+}
- for_all_sbusdev(sdev, sbus) {
- if (!strcmp(sdev->prom_name, "SUNW,tcx"))
- tcx_init_one(sdev);
- }
+static int __devexit tcx_remove(struct of_device *dev)
+{
+ struct all_info *all = dev_get_drvdata(&dev->dev);
+
+ unregister_framebuffer(&all->info);
+ fb_dealloc_cmap(&all->info.cmap);
+
+ tcx_unmap_regs(all);
+
+ kfree(all);
+
+ dev_set_drvdata(&dev->dev, NULL);
return 0;
}
-void __exit tcx_exit(void)
-{
- struct list_head *pos, *tmp;
+static struct of_device_id tcx_match[] = {
+ {
+ .name = "SUNW,tcx",
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, tcx_match);
- list_for_each_safe(pos, tmp, &tcx_list) {
- struct all_info *all = list_entry(pos, typeof(*all), list);
+static struct of_platform_driver tcx_driver = {
+ .name = "tcx",
+ .match_table = tcx_match,
+ .probe = tcx_probe,
+ .remove = __devexit_p(tcx_remove),
+};
- unregister_framebuffer(&all->info);
- fb_dealloc_cmap(&all->info.cmap);
- kfree(all);
- }
+int __init tcx_init(void)
+{
+ if (fb_get_options("tcxfb", NULL))
+ return -ENODEV;
+
+ return of_register_driver(&tcx_driver, &of_bus_type);
}
-int __init
-tcx_setup(char *arg)
+void __exit tcx_exit(void)
{
- /* No cmdline options yet... */
- return 0;
+ of_unregister_driver(&tcx_driver);
}
module_init(tcx_init);
-
-#ifdef MODULE
module_exit(tcx_exit);
-#endif
MODULE_DESCRIPTION("framebuffer driver for TCX chipsets");
-MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
+MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
+MODULE_VERSION("2.0");
MODULE_LICENSE("GPL");
config OCFS2_FS
tristate "OCFS2 file system support (EXPERIMENTAL)"
- depends on NET && EXPERIMENTAL
+ depends on NET && SYSFS && EXPERIMENTAL
select CONFIGFS_FS
select JBD
select CRC32
- POSIX ACLs
- readpages / writepages (not user visible)
+config OCFS2_DEBUG_MASKLOG
+ bool "OCFS2 logging support"
+ depends on OCFS2_FS
+ default y
+ help
+ The ocfs2 filesystem has an extensive logging system. The system
+ allows selection of events to log via files in /sys/o2cb/logmask/.
+ This option will enlarge your kernel, but it allows debugging of
+ ocfs2 filesystem issues.
+
config MINIX_FS
tristate "Minix fs support"
help
write_lock_irq(&mapping->tree_lock);
if (page->mapping) { /* Race with truncate? */
if (mapping_cap_account_dirty(mapping))
- inc_page_state(nr_dirty);
+ __inc_zone_page_state(page, NR_FILE_DIRTY);
radix_tree_tag_set(&mapping->page_tree,
page_index(page),
PAGECACHE_TAG_DIRTY);
struct configfs_dirent * sd;
sd = d->d_fsdata;
- list_del_init(&sd->s_sibling);
+ list_del_init(&sd->s_sibling);
configfs_put(sd);
if (d->d_inode)
simple_rmdir(parent->d_inode,d);
ret = configfs_detach_prep(sd->s_dentry);
if (!ret)
- continue;
+ continue;
} else
ret = -ENOTEMPTY;
new_dentry = lookup_one_len(new_name, parent, strlen(new_name));
if (!IS_ERR(new_dentry)) {
- if (!new_dentry->d_inode) {
+ if (!new_dentry->d_inode) {
error = config_item_set_name(item, "%s", new_name);
if (!error) {
d_add(new_dentry, NULL);
}
static int create_link(struct config_item *parent_item,
- struct config_item *item,
+ struct config_item *item,
struct dentry *dentry)
{
struct configfs_dirent *target_sd = item->ci_dentry->d_fsdata;
.range_start = 0,
.range_end = LLONG_MAX,
};
- unsigned long nr_dirty = read_page_state(nr_dirty);
- unsigned long nr_unstable = read_page_state(nr_unstable);
+ unsigned long nr_dirty = global_page_state(NR_FILE_DIRTY);
+ unsigned long nr_unstable = global_page_state(NR_UNSTABLE_NFS);
wbc.nr_to_write = nr_dirty + nr_unstable +
(inodes_stat.nr_inodes - inodes_stat.nr_unused) +
nr_pruned++;
}
inodes_stat.nr_unused -= nr_pruned;
+ if (current_is_kswapd())
+ __count_vm_events(KSWAPD_INODESTEAL, reap);
+ else
+ __count_vm_events(PGINODESTEAL, reap);
spin_unlock(&inode_lock);
dispose_list(&freeable);
mutex_unlock(&iprune_mutex);
-
- if (current_is_kswapd())
- mod_page_state(kswapd_inodesteal, reap);
- else
- mod_page_state(pginodesteal, reap);
}
/*
return ret;
}
+static int get_task_ioprio(struct task_struct *p)
+{
+ int ret;
+
+ ret = security_task_getioprio(p);
+ if (ret)
+ goto out;
+ ret = p->ioprio;
+out:
+ return ret;
+}
+
asmlinkage long sys_ioprio_get(int which, int who)
{
struct task_struct *g, *p;
struct user_struct *user;
int ret = -ESRCH;
+ int tmpio;
read_lock_irq(&tasklist_lock);
switch (which) {
else
p = find_task_by_pid(who);
if (p)
- ret = p->ioprio;
+ ret = get_task_ioprio(p);
break;
case IOPRIO_WHO_PGRP:
if (!who)
who = process_group(current);
do_each_task_pid(who, PIDTYPE_PGID, p) {
+ tmpio = get_task_ioprio(p);
+ if (tmpio < 0)
+ continue;
if (ret == -ESRCH)
- ret = p->ioprio;
+ ret = tmpio;
else
- ret = ioprio_best(ret, p->ioprio);
+ ret = ioprio_best(ret, tmpio);
} while_each_task_pid(who, PIDTYPE_PGID, p);
break;
case IOPRIO_WHO_USER:
do_each_thread(g, p) {
if (p->uid != user->uid)
continue;
+ tmpio = get_task_ioprio(p);
+ if (tmpio < 0)
+ continue;
if (ret == -ESRCH)
- ret = p->ioprio;
+ ret = tmpio;
else
- ret = ioprio_best(ret, p->ioprio);
+ ret = ioprio_best(ret, tmpio);
} while_each_thread(g, p);
if (who)
*/
if (type)
*type = VM_FAULT_MAJOR;
- inc_page_state(pgmajfault);
+ count_vm_event(PGMAJFAULT);
return page;
}
req->wb_index, NFS_PAGE_TAG_DIRTY);
nfs_list_remove_request(req);
nfs_list_add_request(req, dst);
+ dec_zone_page_state(req->wb_page, NR_FILE_DIRTY);
res++;
}
}
nfs_list_add_request(req, &nfsi->dirty);
nfsi->ndirty++;
spin_unlock(&nfsi->req_lock);
- inc_page_state(nr_dirty);
+ inc_zone_page_state(req->wb_page, NR_FILE_DIRTY);
mark_inode_dirty(inode);
}
nfs_list_add_request(req, &nfsi->commit);
nfsi->ncommit++;
spin_unlock(&nfsi->req_lock);
- inc_page_state(nr_unstable);
+ inc_zone_page_state(req->wb_page, NR_UNSTABLE_NFS);
mark_inode_dirty(inode);
}
#endif
if (nfsi->ndirty != 0) {
res = nfs_scan_lock_dirty(nfsi, dst, idx_start, npages);
nfsi->ndirty -= res;
- sub_page_state(nr_dirty,res);
if ((nfsi->ndirty == 0) != list_empty(&nfsi->dirty))
printk(KERN_ERR "NFS: desynchronized value of nfs_i.ndirty.\n");
}
{
struct nfs_write_data *data = calldata;
struct nfs_page *req;
- int res = 0;
dprintk("NFS: %4d nfs_commit_done (status %d)\n",
task->tk_pid, task->tk_status);
while (!list_empty(&data->pages)) {
req = nfs_list_entry(data->pages.next);
nfs_list_remove_request(req);
+ dec_zone_page_state(req->wb_page, NR_UNSTABLE_NFS);
dprintk("NFS: commit (%s/%Ld %d@%Ld)",
req->wb_context->dentry->d_inode->i_sb->s_id,
nfs_mark_request_dirty(req);
next:
nfs_clear_page_writeback(req);
- res++;
}
- sub_page_state(nr_unstable,res);
}
static const struct rpc_call_ops nfs_commit_ops = {
if (*ep)
goto out;
dprintk("found fsidtype %d\n", fsidtype);
- if (fsidtype > 2)
+ if (key_len(fsidtype)==0) /* invalid type */
goto out;
if ((len=qword_get(&mesg, buf, PAGE_SIZE)) <= 0)
goto out;
return NULL;
}
-#define TEST_ACCESS(x) ((x > 0 || x < 4)?1:0)
-#define TEST_DENY(x) ((x >= 0 || x < 5)?1:0)
+static int access_valid(u32 x)
+{
+ return (x > 0 && x < 4);
+}
+
+static int deny_valid(u32 x)
+{
+ return (x >= 0 && x < 5);
+}
static void
set_access(unsigned int *access, unsigned long bmap) {
int status;
status = nfserr_inval;
- if (!TEST_ACCESS(open->op_share_access) || !TEST_DENY(open->op_share_deny))
+ if (!access_valid(open->op_share_access)
+ || !deny_valid(open->op_share_deny))
goto out;
/*
* Lookup file; if found, lookup stateid and check open request,
} else {
/* Stateid was not found, this is a new OPEN */
int flags = 0;
+ if (open->op_share_access & NFS4_SHARE_ACCESS_READ)
+ flags |= MAY_READ;
if (open->op_share_access & NFS4_SHARE_ACCESS_WRITE)
- flags = MAY_WRITE;
- else
- flags = MAY_READ;
+ flags |= MAY_WRITE;
status = nfs4_new_open(rqstp, &stp, dp, current_fh, flags);
if (status)
goto out;
if (!stateid->si_fileid) { /* delegation stateid */
if(!(dp = find_delegation_stateid(ino, stateid))) {
dprintk("NFSD: delegation stateid not found\n");
- if (nfs4_in_grace())
- status = nfserr_grace;
goto out;
}
stidp = &dp->dl_stateid;
} else { /* open or lock stateid */
if (!(stp = find_stateid(stateid, flags))) {
dprintk("NFSD: open or lock stateid not found\n");
- if (nfs4_in_grace())
- status = nfserr_grace;
goto out;
}
if ((flags & CHECK_FH) && nfs4_check_fh(current_fh, stp))
(int)current_fh->fh_dentry->d_name.len,
current_fh->fh_dentry->d_name.name);
- if ((status = fh_verify(rqstp, current_fh, S_IFREG, 0)))
- goto out;
+ status = fh_verify(rqstp, current_fh, S_IFREG, 0);
+ if (status)
+ return status;
nfs4_lock_state();
(int)current_fh->fh_dentry->d_name.len,
current_fh->fh_dentry->d_name.name);
- if (!TEST_ACCESS(od->od_share_access) || !TEST_DENY(od->od_share_deny))
+ if (!access_valid(od->od_share_access)
+ || !deny_valid(od->od_share_deny))
return nfserr_inval;
nfs4_lock_state();
goto out;
}
- /* Set user creds for this exportpoint */
- error = nfsd_setuser(rqstp, exp);
- if (error) {
- error = nfserrno(error);
- goto out;
- }
-
/*
* Look up the dentry using the NFS file handle.
*/
}
cache_get(&exp->h);
+ /* Set user creds for this exportpoint; necessary even in the "just
+ * checking" case because this may be a filehandle that was created by
+ * fh_compose, and that is about to be used in another nfsv4 compound
+ * operation */
+ error = nfserrno(nfsd_setuser(rqstp, exp));
+ if (error)
+ goto out;
+
error = nfsd_mode_check(rqstp, dentry->d_inode->i_mode, type);
if (error)
goto out;
fh_compose(struct svc_fh *fhp, struct svc_export *exp, struct dentry *dentry, struct svc_fh *ref_fh)
{
/* ref_fh is a reference file handle.
- * if it is non-null, then we should compose a filehandle which is
- * of the same version, where possible.
+ * if it is non-null and for the same filesystem, then we should compose
+ * a filehandle which is of the same version, where possible.
* Currently, that means that if ref_fh->fh_handle.fh_version == 0xca
* Then create a 32byte filehandle using nfs_fhbase_old
*
parent->d_name.name, dentry->d_name.name,
(inode ? inode->i_ino : 0));
- if (ref_fh) {
+ if (ref_fh && ref_fh->fh_export == exp) {
ref_fh_version = ref_fh->fh_handle.fh_version;
if (ref_fh_version == 0xca)
ref_fh_fsid_type = 0;
} else {
int size;
if (fhp->fh_handle.fh_fileid_type != 0)
- goto out_uptodate;
+ goto out;
datap = fhp->fh_handle.fh_auth+
fhp->fh_handle.fh_size/4 -1;
size = (fhp->fh_maxsize - fhp->fh_handle.fh_size)/4;
printk(KERN_ERR "fh_update: %s/%s still negative!\n",
dentry->d_parent->d_name.name, dentry->d_name.name);
goto out;
-out_uptodate:
- printk(KERN_ERR "fh_update: %s/%s already up-to-date!\n",
- dentry->d_parent->d_name.name, dentry->d_name.name);
- goto out;
}
/*
goto out_nfserr;
if (access & MAY_WRITE) {
- flags = O_WRONLY|O_LARGEFILE;
+ if (access & MAY_READ)
+ flags = O_RDWR|O_LARGEFILE;
+ else
+ flags = O_WRONLY|O_LARGEFILE;
DQUOT_INIT(inode);
}
if (ra && ra->p_set)
file->f_ra = ra->p_ra;
- if (file->f_op->sendfile) {
+ if (file->f_op->sendfile && rqstp->rq_sendfile_ok) {
svc_pushback_unused_pages(rqstp);
err = file->f_op->sendfile(file, &offset, *count,
nfsd_read_actor, rqstp);
err = nfserrno(err);
}
- fh_unlock(ffhp);
dput(dnew);
+out_unlock:
+ fh_unlock(ffhp);
out:
return err;
out_nfserr:
err = nfserrno(err);
- goto out;
+ goto out_unlock;
}
/*
tdir = tdentry->d_inode;
err = (rqstp->rq_vers == 2) ? nfserr_acces : nfserr_xdev;
- if (fdir->i_sb != tdir->i_sb)
+ if (ffhp->fh_export != tfhp->fh_export)
goto out;
err = nfserr_perm;
u64 vbo_max; /* file offset, max_blocks from iblock */
u64 p_blkno;
int contig_blocks;
- unsigned char blocksize_bits;
+ unsigned char blocksize_bits = inode->i_sb->s_blocksize_bits;
unsigned long max_blocks = bh_result->b_size >> inode->i_blkbits;
- if (!inode || !bh_result) {
- mlog(ML_ERROR, "inode or bh_result is null\n");
- return -EIO;
- }
-
- blocksize_bits = inode->i_sb->s_blocksize_bits;
-
/* This function won't even be called if the request isn't all
* nicely aligned and of the right size, so there's no need
* for us to check any of that. */
hb_block->hb_seq = cpu_to_le64(cputime);
hb_block->hb_node = node_num;
hb_block->hb_generation = cpu_to_le64(generation);
+ hb_block->hb_dead_ms = cpu_to_le32(o2hb_dead_threshold * O2HB_REGION_TIMEOUT_MS);
/* This step must always happen last! */
hb_block->hb_cksum = cpu_to_le32(o2hb_compute_block_crc_le(reg,
struct o2nm_node *node;
struct o2hb_disk_heartbeat_block *hb_block = reg->hr_tmp_block;
u64 cputime;
+ unsigned int dead_ms = o2hb_dead_threshold * O2HB_REGION_TIMEOUT_MS;
+ unsigned int slot_dead_ms;
memcpy(hb_block, slot->ds_raw_block, reg->hr_block_bytes);
&o2hb_live_slots[slot->ds_node_num]);
slot->ds_equal_samples = 0;
+
+ /* We want to be sure that all nodes agree on the
+ * number of milliseconds before a node will be
+ * considered dead. The self-fencing timeout is
+ * computed from this value, and a discrepancy might
+ * result in heartbeat calling a node dead when it
+ * hasn't self-fenced yet. */
+ slot_dead_ms = le32_to_cpu(hb_block->hb_dead_ms);
+ if (slot_dead_ms && slot_dead_ms != dead_ms) {
+ /* TODO: Perhaps we can fail the region here. */
+ mlog(ML_ERROR, "Node %d on device %s has a dead count "
+ "of %u ms, but our count is %u ms.\n"
+ "Please double check your configuration values "
+ "for 'O2CB_HEARTBEAT_THRESHOLD'\n",
+ slot->ds_node_num, reg->hr_dev_name, slot_dead_ms,
+ dead_ms);
+ }
goto out;
}
#define MLOG_MASK_PREFIX 0
#endif
+/*
+ * When logging is disabled, force the bit test to 0 for anything other
+ * than errors and notices, allowing gcc to remove the code completely.
+ * When enabled, allow all masks.
+ */
+#if defined(CONFIG_OCFS2_DEBUG_MASKLOG)
+#define ML_ALLOWED_BITS ~0
+#else
+#define ML_ALLOWED_BITS (ML_ERROR|ML_NOTICE)
+#endif
+
#define MLOG_MAX_BITS 64
struct mlog_bits {
#define mlog(mask, fmt, args...) do { \
u64 __m = MLOG_MASK_PREFIX | (mask); \
- if (__mlog_test_u64(__m, mlog_and_bits) && \
+ if ((__m & ML_ALLOWED_BITS) && \
+ __mlog_test_u64(__m, mlog_and_bits) && \
!__mlog_test_u64(__m, mlog_not_bits)) { \
if (__m & ML_ERROR) \
__mlog_printk(KERN_ERR, "ERROR: "fmt , ##args); \
mlog(ML_ERROR, "status = %lld\n", (long long)_st); \
} while (0)
+#if defined(CONFIG_OCFS2_DEBUG_MASKLOG)
#define mlog_entry(fmt, args...) do { \
mlog(ML_ENTRY, "ENTRY:" fmt , ##args); \
} while (0)
#define mlog_exit_void() do { \
mlog(ML_EXIT, "EXIT\n"); \
} while (0)
+#else
+#define mlog_entry(...) do { } while (0)
+#define mlog_entry_void(...) do { } while (0)
+#define mlog_exit(...) do { } while (0)
+#define mlog_exit_ptr(...) do { } while (0)
+#define mlog_exit_void(...) do { } while (0)
+#endif /* defined(CONFIG_OCFS2_DEBUG_MASKLOG) */
#define mlog_bug_on_msg(cond, fmt, args...) do { \
if (cond) { \
__u8 hb_pad1[3];
__le32 hb_cksum;
__le64 hb_generation;
+ __le32 hb_dead_ms;
};
#endif /* _OCFS2_HEARTBEAT_H */
}
if (was_valid && !valid) {
- mlog(ML_NOTICE, "no longer connected to " SC_NODEF_FMT "\n",
- SC_NODEF_ARGS(old_sc));
+ printk(KERN_INFO "o2net: no longer connected to "
+ SC_NODEF_FMT "\n", SC_NODEF_ARGS(old_sc));
o2net_complete_nodes_nsw(nn);
}
* the only way to start connecting again is to down
* heartbeat and bring it back up. */
cancel_delayed_work(&nn->nn_connect_expired);
- mlog(ML_NOTICE, "%s " SC_NODEF_FMT "\n",
- o2nm_this_node() > sc->sc_node->nd_num ?
- "connected to" : "accepted connection from",
- SC_NODEF_ARGS(sc));
+ printk(KERN_INFO "o2net: %s " SC_NODEF_FMT "\n",
+ o2nm_this_node() > sc->sc_node->nd_num ?
+ "connected to" : "accepted connection from",
+ SC_NODEF_ARGS(sc));
}
/* trigger the connecting worker func as long as we're not valid,
do_gettimeofday(&now);
- mlog(ML_NOTICE, "connection to " SC_NODEF_FMT " has been idle for 10 "
+ printk(KERN_INFO "o2net: connection to " SC_NODEF_FMT " has been idle for 10 "
"seconds, shutting it down.\n", SC_NODEF_ARGS(sc));
mlog(ML_NOTICE, "here are some times that might help debug the "
"situation: (tmr %ld.%ld now %ld.%ld dr %ld.%ld adv "
struct ocfs2_dir_entry **dirent)
{
int status = -ENOENT;
- struct ocfs2_super *osb = OCFS2_SB(inode->i_sb);
- mlog_entry("(osb=%p, parent=%llu, name='%.*s', blkno=%p, inode=%p)\n",
- osb, (unsigned long long)OCFS2_I(inode)->ip_blkno,
- namelen, name, blkno, inode);
+ mlog_entry("(name=%.*s, blkno=%p, inode=%p, dirent_bh=%p, dirent=%p)\n",
+ namelen, name, blkno, inode, dirent_bh, dirent);
*dirent_bh = ocfs2_find_entry(name, namelen, inode, dirent);
if (!*dirent_bh || !*dirent) {
int dlm_finalize_reco_handler(struct o2net_msg *msg, u32 len, void *data);
int dlm_do_master_requery(struct dlm_ctxt *dlm, struct dlm_lock_resource *res,
u8 nodenum, u8 *real_master);
-int dlm_lockres_master_requery(struct dlm_ctxt *dlm,
- struct dlm_lock_resource *res, u8 *real_master);
int dlm_dispatch_assert_master(struct dlm_ctxt *dlm,
assert_spin_locked(&dlm->spinlock);
- mlog(ML_NOTICE, "Nodes in my domain (\"%s\"):\n", dlm->name);
+ printk(KERN_INFO "ocfs2_dlm: Nodes in domain (\"%s\"): ", dlm->name);
while ((node = find_next_bit(dlm->domain_map, O2NM_MAX_NODES,
node + 1)) < O2NM_MAX_NODES) {
- mlog(ML_NOTICE, " node %d\n", node);
+ printk("%d ", node);
}
+ printk("\n");
}
static int dlm_exit_domain_handler(struct o2net_msg *msg, u32 len, void *data)
node = exit_msg->node_idx;
- mlog(0, "Node %u leaves domain %s\n", node, dlm->name);
+ printk(KERN_INFO "ocfs2_dlm: Node %u leaves domain %s\n", node, dlm->name);
spin_lock(&dlm->spinlock);
clear_bit(node, dlm->domain_map);
set_bit(assert->node_idx, dlm->domain_map);
__dlm_set_joining_node(dlm, DLM_LOCK_RES_OWNER_UNKNOWN);
+ printk(KERN_INFO "ocfs2_dlm: Node %u joins domain %s\n",
+ assert->node_idx, dlm->name);
__dlm_print_nodes(dlm);
/* notify anything attached to the heartbeat events */
static void dlm_request_all_locks_worker(struct dlm_work_item *item,
void *data);
static void dlm_mig_lockres_worker(struct dlm_work_item *item, void *data);
+static int dlm_lockres_master_requery(struct dlm_ctxt *dlm,
+ struct dlm_lock_resource *res,
+ u8 *real_master);
static u64 dlm_get_next_mig_cookie(void);
-int dlm_lockres_master_requery(struct dlm_ctxt *dlm,
- struct dlm_lock_resource *res, u8 *real_master)
+static int dlm_lockres_master_requery(struct dlm_ctxt *dlm,
+ struct dlm_lock_resource *res,
+ u8 *real_master)
{
struct dlm_node_iter iter;
int nodenum;
}
/* launch vote thread */
- osb->vote_task = kthread_run(ocfs2_vote_thread, osb, "ocfs2vote-%d",
- osb->osb_id);
+ osb->vote_task = kthread_run(ocfs2_vote_thread, osb, "ocfs2vote");
if (IS_ERR(osb->vote_task)) {
status = PTR_ERR(osb->vote_task);
osb->vote_task = NULL;
ret = ocfs2_extent_map_insert(inode, rec,
le16_to_cpu(el->l_tree_depth));
- if (ret) {
+ if (ret && (ret != -EEXIST)) {
mlog_errno(ret);
goto out_free;
}
/*
* Simple rule: on any return code other than -EAGAIN, anything left
* in the insert_context will be freed.
+ *
+ * Simple rule #2: A return code of -EEXIST from this function or
+ * its calls to ocfs2_extent_map_insert_entry() signifies that another
+ * thread beat us to the insert. It is not an actual error, but it
+ * tells the caller we have no more work to do.
*/
static int ocfs2_extent_map_try_insert(struct inode *inode,
struct ocfs2_extent_rec *rec,
goto out_unlock;
}
+ /* Since insert_entry failed, the map MUST have old_ent */
old_ent = ocfs2_extent_map_lookup(em, le32_to_cpu(rec->e_cpos),
- le32_to_cpu(rec->e_clusters), NULL,
- NULL);
+ le32_to_cpu(rec->e_clusters),
+ NULL, NULL);
BUG_ON(!old_ent);
- ret = -EEXIST;
- if (old_ent->e_tree_depth < tree_depth)
+ if (old_ent->e_tree_depth < tree_depth) {
+ /* Another thread beat us to the lower tree_depth */
+ ret = -EEXIST;
goto out_unlock;
+ }
if (old_ent->e_tree_depth == tree_depth) {
+ /*
+ * Another thread beat us to this tree_depth.
+ * Let's make sure we agree with that thread (the
+ * extent_rec should be identical).
+ */
if (!memcmp(rec, &old_ent->e_rec,
sizeof(struct ocfs2_extent_rec)))
ret = 0;
+ else
+ /* FIXME: Should this be ESRCH/EBADR??? */
+ ret = -EEXIST;
- /* FIXME: Should this be ESRCH/EBADR??? */
goto out_unlock;
}
tree_depth, &ctxt);
} while (ret == -EAGAIN);
- if (ret < 0)
+ if ((ret < 0) && (ret != -EEXIST))
mlog_errno(ret);
if (ctxt.left_ent)
}
/* Launch the commit thread */
- osb->commit_task = kthread_run(ocfs2_commit_thread, osb, "ocfs2cmt-%d",
- osb->osb_id);
+ osb->commit_task = kthread_run(ocfs2_commit_thread, osb, "ocfs2cmt");
if (IS_ERR(osb->commit_task)) {
status = PTR_ERR(osb->commit_task);
osb->commit_task = NULL;
goto out;
osb->recovery_thread_task = kthread_run(__ocfs2_recovery_thread, osb,
- "ocfs2rec-%d", osb->osb_id);
+ "ocfs2rec");
if (IS_ERR(osb->recovery_thread_task)) {
mlog_errno((int)PTR_ERR(osb->recovery_thread_task));
osb->recovery_thread_task = NULL;
unsigned long address,
int *type)
{
- struct inode *inode = area->vm_file->f_dentry->d_inode;
struct page *page = NOPAGE_SIGBUS;
sigset_t blocked, oldset;
int ret;
- mlog_entry("(inode %lu, address %lu)\n", inode->i_ino, address);
+ mlog_entry("(area=%p, address=%lu, type=%p)\n", area, address,
+ type);
/* The best way to deal with signals in this path is
* to block them upfront, rather than allowing the
struct ocfs2_journal_handle;
struct ocfs2_super
{
- u32 osb_id; /* id used by the proc interface */
struct task_struct *commit_task;
struct super_block *sb;
struct inode *root_inode;
unsigned long s_mount_opt;
u16 max_slots;
- u16 num_nodes;
s16 node_num;
s16 slot_num;
int s_sectsize_bits;
int s_clustersize;
int s_clustersize_bits;
- struct proc_dir_entry *proc_sub_dir; /* points to /proc/fs/ocfs2/<maj_min> */
atomic_t vol_state;
struct mutex recovery_lock;
};
#define OCFS2_SB(sb) ((struct ocfs2_super *)(sb)->s_fs_info)
-#define OCFS2_MAX_OSB_ID 65536
static inline int ocfs2_should_order_data(struct inode *inode)
{
osb->slot_num = slot;
spin_unlock(&si->si_lock);
- mlog(ML_NOTICE, "taking node slot %d\n", osb->slot_num);
+ mlog(0, "taking node slot %d\n", osb->slot_num);
status = ocfs2_update_disk_slots(osb, si);
if (status < 0)
#include "buffer_head_io.h"
-/*
- * Globals
- */
-static spinlock_t ocfs2_globals_lock = SPIN_LOCK_UNLOCKED;
-
-static u32 osb_id; /* Keeps track of next available OSB Id */
-
static kmem_cache_t *ocfs2_inode_cachep = NULL;
kmem_cache_t *ocfs2_lock_cache = NULL;
ocfs2_complete_mount_recovery(osb);
- printk("ocfs2: Mounting device (%u,%u) on (node %d, slot %d) with %s "
- "data mode.\n",
- MAJOR(sb->s_dev), MINOR(sb->s_dev), osb->node_num,
- osb->slot_num,
+ printk(KERN_INFO "ocfs2: Mounting device (%s) on (node %d, slot %d) "
+ "with %s data mode.\n",
+ osb->dev_str, osb->node_num, osb->slot_num,
osb->s_mount_opt & OCFS2_MOUNT_DATA_WRITEBACK ? "writeback" :
"ordered");
goto leave;
}
- spin_lock(&ocfs2_globals_lock);
- osb_id = 0;
- spin_unlock(&ocfs2_globals_lock);
-
ocfs2_debugfs_root = debugfs_create_dir("ocfs2", NULL);
if (!ocfs2_debugfs_root) {
status = -EFAULT;
goto bail;
}
- mlog(ML_NOTICE, "I am node %d\n", osb->node_num);
+ mlog(0, "I am node %d\n", osb->node_num);
status = 0;
bail:
atomic_set(&osb->vol_state, VOLUME_DISMOUNTED);
- printk("ocfs2: Unmounting device (%u,%u) on (node %d)\n",
- MAJOR(osb->sb->s_dev), MINOR(osb->sb->s_dev), osb->node_num);
+ printk(KERN_INFO "ocfs2: Unmounting device (%s) on (node %d)\n",
+ osb->dev_str, osb->node_num);
ocfs2_delete_osb(osb);
kfree(osb);
if (osb->uuid_str == NULL)
return -ENOMEM;
- memcpy(osb->uuid, uuid, OCFS2_VOL_UUID_LEN);
-
for (i = 0, ptr = osb->uuid_str; i < OCFS2_VOL_UUID_LEN; i++) {
/* print with null */
ret = snprintf(ptr, 3, "%02X", uuid[i]);
goto bail;
}
- osb->uuid = kmalloc(OCFS2_VOL_UUID_LEN, GFP_KERNEL);
- if (!osb->uuid) {
- mlog(ML_ERROR, "unable to alloc uuid\n");
- status = -ENOMEM;
- goto bail;
- }
-
di = (struct ocfs2_dinode *)bh->b_data;
osb->max_slots = le16_to_cpu(di->id2.i_super.s_max_slots);
status = -EINVAL;
goto bail;
}
- mlog(ML_NOTICE, "max_slots for this device: %u\n", osb->max_slots);
+ mlog(0, "max_slots for this device: %u\n", osb->max_slots);
init_waitqueue_head(&osb->osb_wipe_event);
osb->osb_orphan_wipes = kcalloc(osb->max_slots,
goto bail;
}
- memcpy(&uuid_net_key, &osb->uuid[i], sizeof(osb->net_key));
+ memcpy(&uuid_net_key, di->id2.i_super.s_uuid, sizeof(uuid_net_key));
osb->net_key = le32_to_cpu(uuid_net_key);
strncpy(osb->vol_label, di->id2.i_super.s_label, 63);
goto bail;
}
- /* Link this osb onto the global linked list of all osb structures. */
- /* The Global Link List is mainted for the whole driver . */
- spin_lock(&ocfs2_globals_lock);
- osb->osb_id = osb_id;
- if (osb_id < OCFS2_MAX_OSB_ID)
- osb_id++;
- else {
- mlog(ML_ERROR, "Too many volumes mounted\n");
- status = -ENOMEM;
- }
- spin_unlock(&ocfs2_globals_lock);
-
bail:
mlog_exit(status);
return status;
}
status = vfs_follow_link(nd, link);
- if (status)
+ if (status && status != -ENOENT)
mlog_errno(status);
bail:
if (page) {
{
struct sysinfo i;
int len;
- struct page_state ps;
unsigned long inactive;
unsigned long active;
unsigned long free;
struct vmalloc_info vmi;
long cached;
- get_page_state(&ps);
get_zone_counts(&active, &inactive, &free);
/*
allowed = ((totalram_pages - hugetlb_total_pages())
* sysctl_overcommit_ratio / 100) + total_swap_pages;
- cached = get_page_cache_size() - total_swapcache_pages - i.bufferram;
+ cached = global_page_state(NR_FILE_PAGES) -
+ total_swapcache_pages - i.bufferram;
if (cached < 0)
cached = 0;
"SwapFree: %8lu kB\n"
"Dirty: %8lu kB\n"
"Writeback: %8lu kB\n"
+ "AnonPages: %8lu kB\n"
"Mapped: %8lu kB\n"
"Slab: %8lu kB\n"
+ "PageTables: %8lu kB\n"
+ "NFS Unstable: %8lu kB\n"
+ "Bounce: %8lu kB\n"
"CommitLimit: %8lu kB\n"
"Committed_AS: %8lu kB\n"
- "PageTables: %8lu kB\n"
"VmallocTotal: %8lu kB\n"
"VmallocUsed: %8lu kB\n"
"VmallocChunk: %8lu kB\n",
K(i.freeram-i.freehigh),
K(i.totalswap),
K(i.freeswap),
- K(ps.nr_dirty),
- K(ps.nr_writeback),
- K(ps.nr_mapped),
- K(ps.nr_slab),
+ K(global_page_state(NR_FILE_DIRTY)),
+ K(global_page_state(NR_WRITEBACK)),
+ K(global_page_state(NR_ANON_PAGES)),
+ K(global_page_state(NR_FILE_MAPPED)),
+ K(global_page_state(NR_SLAB)),
+ K(global_page_state(NR_PAGETABLE)),
+ K(global_page_state(NR_UNSTABLE_NFS)),
+ K(global_page_state(NR_BOUNCE)),
K(allowed),
K(committed),
- K(ps.nr_page_table_pages),
(unsigned long)VMALLOC_TOTAL >> 10,
vmi.used >> 10,
vmi.largest_chunk >> 10
#define SCM_TIMESTAMP SO_TIMESTAMP
#define SO_PEERSEC 30
+#define SO_PASSSEC 34
/* Security levels - as per NRL IPv6 - don't actually do anything */
#define SO_SECURITY_AUTHENTICATION 19
#define SO_ACCEPTCONN 30
#define SO_PEERSEC 31
+#define SO_PASSSEC 34
#endif /* _ASM_SOCKET_H */
#define SO_ACCEPTCONN 30
#define SO_PEERSEC 31
+#define SO_PASSSEC 34
#endif /* _ASM_SOCKET_H */
#define SO_ACCEPTCONN 30
#define SO_PEERSEC 31
+#define SO_PASSSEC 34
#endif /* _ASM_SOCKET_H */
#define SO_ACCEPTCONN 30
#define SO_PEERSEC 31
+#define SO_PASSSEC 34
#endif /* _ASM_SOCKET_H */
#define SO_ACCEPTCONN 30
#define SO_PEERSEC 31
+#define SO_PASSSEC 34
#endif /* _ASM_SOCKET_H */
#define SO_ACCEPTCONN 30
#define SO_PEERSEC 31
+#define SO_PASSSEC 34
#endif /* _ASM_SOCKET_H */
#define SO_ACCEPTCONN 30
#define SO_PEERSEC 31
+#define SO_PASSSEC 34
#endif /* _ASM_IA64_SOCKET_H */
#define SO_ACCEPTCONN 30
#define SO_PEERSEC 31
+#define SO_PASSSEC 34
#endif /* _ASM_M32R_SOCKET_H */
#define SO_ACCEPTCONN 30
#define SO_PEERSEC 31
+#define SO_PASSSEC 34
#endif /* _ASM_SOCKET_H */
#define SO_PEERSEC 30
#define SO_SNDBUFFORCE 31
#define SO_RCVBUFFORCE 33
+#define SO_PASSSEC 34
#ifdef __KERNEL__
#define SO_ACCEPTCONN 0x401c
#define SO_PEERSEC 0x401d
+#define SO_PASSSEC 0x401e
#endif /* _ASM_SOCKET_H */
#define SO_ACCEPTCONN 30
#define SO_PEERSEC 31
+#define SO_PASSSEC 34
#endif /* _ASM_POWERPC_SOCKET_H */
__pte; \
})
-#define SetPageUptodate(_page) \
- do { \
- struct page *__page = (_page); \
- if (!test_and_set_bit(PG_uptodate, &__page->flags)) \
- page_test_and_clear_dirty(_page); \
- } while (0)
-
#ifdef __s390x__
#define pfn_pmd(pfn, pgprot) \
#define SO_ACCEPTCONN 30
#define SO_PEERSEC 31
+#define SO_PASSSEC 34
#endif /* _ASM_SOCKET_H */
#define SO_ACCEPTCONN 30
#define SO_PEERSEC 31
+#define SO_PASSSEC 34
#endif /* __ASM_SH_SOCKET_H */
#include <linux/device.h>
#include <linux/mod_devicetable.h>
+#include <asm/openprom.h>
#include <asm/prom.h>
extern struct bus_type ebus_bus_type;
extern struct bus_type sbus_bus_type;
+extern struct bus_type of_bus_type;
/*
* The of_device is a kind of "base class" that is a superset of
*/
struct of_device
{
- struct device_node *node; /* OF device node */
- struct device dev; /* Generic device interface */
+ struct device_node *node;
+ struct device dev;
+ struct resource resource[PROMREG_MAX];
+ unsigned int irqs[PROMINTR_MAX];
+ int num_irqs;
+
+ void *sysdata;
+
+ int slot;
+ int portid;
+ int clock_freq;
};
#define to_of_device(d) container_of(d, struct of_device, dev)
+extern void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name);
+extern void of_iounmap(void __iomem *base, unsigned long size);
+
+extern struct of_device *of_find_device_by_node(struct device_node *);
+
extern const struct of_device_id *of_match_device(
const struct of_device_id *matches, const struct of_device *dev);
typedef u32 phandle;
typedef u32 ihandle;
-struct interrupt_info {
- int line;
- int sense; /* +ve/-ve logic, edge or level, etc. */
-};
-
struct property {
char *name;
int length;
char *name;
char *type;
phandle node;
- phandle linux_phandle;
- int n_intrs;
- struct interrupt_info *intrs;
char *path_component_name;
char *full_name;
#define OF_IS_DYNAMIC(x) test_bit(OF_DYNAMIC, &x->_flags)
#define OF_MARK_DYNAMIC(x) set_bit(OF_DYNAMIC, &x->_flags)
+#define OF_BAD_ADDR ((u64)-1)
+
static inline void set_node_proc_entry(struct device_node *dn, struct proc_dir_entry *de)
{
dn->pde = de;
extern int of_getintprop_default(struct device_node *np,
const char *name,
int def);
+extern int of_n_addr_cells(struct device_node *np);
+extern int of_n_size_cells(struct device_node *np);
extern void prom_build_devicetree(void);
#define SCM_TIMESTAMP SO_TIMESTAMP
#define SO_PEERSEC 0x001e
+#define SO_PASSSEC 0x001f
/* Security levels - as per NRL IPv6 - don't actually do anything */
#define SO_SECURITY_AUTHENTICATION 0x5001
#include <linux/device.h>
#include <linux/mod_devicetable.h>
+#include <asm/openprom.h>
#include <asm/prom.h>
extern struct bus_type isa_bus_type;
extern struct bus_type ebus_bus_type;
extern struct bus_type sbus_bus_type;
+extern struct bus_type of_bus_type;
/*
* The of_device is a kind of "base class" that is a superset of
*/
struct of_device
{
- struct device_node *node; /* OF device node */
- struct device dev; /* Generic device interface */
+ struct device_node *node;
+ struct device dev;
+ struct resource resource[PROMREG_MAX];
+ unsigned int irqs[PROMINTR_MAX];
+ int num_irqs;
+
+ void *sysdata;
+
+ int slot;
+ int portid;
+ int clock_freq;
};
#define to_of_device(d) container_of(d, struct of_device, dev)
+extern void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name);
+extern void of_iounmap(void __iomem *base, unsigned long size);
+
+extern struct of_device *of_find_device_by_node(struct device_node *);
+
extern const struct of_device_id *of_match_device(
const struct of_device_id *matches, const struct of_device *dev);
#include <asm/page.h>
#include <asm/oplib.h>
#include <asm/prom.h>
+#include <asm/of_device.h>
#include <asm/iommu.h>
/* The abstraction used here is that there are PCI controllers,
/* Operations which are controller specific. */
void (*scan_bus)(struct pci_controller_info *);
- unsigned int (*irq_build)(struct pci_pbm_info *, struct pci_dev *, unsigned int);
void (*base_address_update)(struct pci_dev *, int);
void (*resource_adjust)(struct pci_dev *, struct resource *, struct resource *);
struct pci_ops *pci_ops;
unsigned int pci_first_busno;
unsigned int pci_last_busno;
-
- void *starfire_cookie;
};
/* PCI devices which are not bridges have this placed in their pci_dev
struct pcidev_cookie {
struct pci_pbm_info *pbm;
struct device_node *prom_node;
+ struct of_device *op;
struct linux_prom_pci_registers prom_regs[PROMREG_MAX];
int num_prom_regs;
struct linux_prom_pci_registers prom_assignments[PROMREG_MAX];
typedef u32 phandle;
typedef u32 ihandle;
-struct interrupt_info {
- int line;
- int sense; /* +ve/-ve logic, edge or level, etc. */
-};
-
struct property {
char *name;
int length;
unsigned int unique_id;
};
+struct of_irq_controller;
struct device_node {
char *name;
char *type;
phandle node;
- phandle linux_phandle;
- int n_intrs;
- struct interrupt_info *intrs;
char *path_component_name;
char *full_name;
unsigned long _flags;
void *data;
unsigned int unique_id;
+
+ struct of_irq_controller *irq_trans;
+};
+
+struct of_irq_controller {
+ unsigned int (*irq_build)(struct device_node *, unsigned int, void *);
+ void *data;
};
/* flag descriptions */
#define OF_IS_DYNAMIC(x) test_bit(OF_DYNAMIC, &x->_flags)
#define OF_MARK_DYNAMIC(x) set_bit(OF_DYNAMIC, &x->_flags)
+#define OF_BAD_ADDR ((u64)-1)
+
static inline void set_node_proc_entry(struct device_node *dn, struct proc_dir_entry *de)
{
dn->pde = de;
extern int of_getintprop_default(struct device_node *np,
const char *name,
int def);
+extern int of_n_addr_cells(struct device_node *np);
+extern int of_n_size_cells(struct device_node *np);
extern void prom_build_devicetree(void);
int num_sbus_ranges;
int portid;
- void *starfire_cookie;
};
#define to_sbus(d) container_of(d, struct sbus_bus, ofdev.dev)
#define SCM_TIMESTAMP SO_TIMESTAMP
#define SO_PEERSEC 0x001e
+#define SO_PASSSEC 0x001f
/* Security levels - as per NRL IPv6 - don't actually do anything */
#define SO_SECURITY_AUTHENTICATION 0x5001
extern void check_if_starfire(void);
extern void starfire_cpu_setup(void);
extern int starfire_hard_smp_processor_id(void);
-extern void *starfire_hookup(int);
+extern void starfire_hookup(int);
extern unsigned int starfire_translate(unsigned long imap, unsigned int upaid);
#endif
{
*(volatile unsigned int __force *) addr = b;
}
+static inline void writeq(unsigned int b, volatile void __iomem *addr)
+{
+ *(volatile unsigned long long __force *) addr = b;
+}
#define __raw_writeb writeb
#define __raw_writew writew
#define __raw_writel writel
+#define __raw_writeq writeq
#endif
#define SO_ACCEPTCONN 30
#define SO_PEERSEC 31
+#define SO_PASSSEC 34
#endif /* __V850_SOCKET_H__ */
#define SO_ACCEPTCONN 30
#define SO_PEERSEC 31
+#define SO_PASSSEC 34
#endif /* _ASM_SOCKET_H */
#define SO_ACCEPTCONN 30
#define SO_PEERSEC 31
+#define SO_PASSSEC 34
#endif /* _XTENSA_SOCKET_H */
#define LINUX_ATMDEV_H
+#include <linux/device.h>
#include <linux/atmapi.h>
#include <linux/atm.h>
#include <linux/atmioc.h>
struct proc_dir_entry *proc_entry; /* proc entry */
char *proc_name; /* proc entry name */
#endif
+ struct class_device class_dev; /* sysfs class device */
struct list_head dev_list; /* linkage */
};
BUG_ON(!test_bit(ATM_DF_REMOVED, &dev->flags));
if (dev->ops->dev_close)
dev->ops->dev_close(dev);
- kfree(dev);
+ class_device_put(&dev->class_dev);
}
}
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/processor.h>
-#include <asm/atomic.h>
#define nth_page(page,n) pfn_to_page(page_to_pfn((page)) + (n))
set_page_section(page, pfn_to_section_nr(pfn));
}
+/*
+ * Some inline functions in vmstat.h depend on page_zone()
+ */
+#include <linux/vmstat.h>
+
#ifndef CONFIG_DISCONTIGMEM
/* The array of struct pages - for discontigmem use pgdat->lmem_map */
extern struct page *mem_map;
#define ZONE_PADDING(name)
#endif
+enum zone_stat_item {
+ NR_ANON_PAGES, /* Mapped anonymous pages */
+ NR_FILE_MAPPED, /* pagecache pages mapped into pagetables.
+ only modified from process context */
+ NR_FILE_PAGES,
+ NR_SLAB, /* Pages used by slab allocator */
+ NR_PAGETABLE, /* used for pagetables */
+ NR_FILE_DIRTY,
+ NR_WRITEBACK,
+ NR_UNSTABLE_NFS, /* NFS unstable pages */
+ NR_BOUNCE,
+#ifdef CONFIG_NUMA
+ NUMA_HIT, /* allocated in intended node */
+ NUMA_MISS, /* allocated in non intended node */
+ NUMA_FOREIGN, /* was intended here, hit elsewhere */
+ NUMA_INTERLEAVE_HIT, /* interleaver preferred this zone */
+ NUMA_LOCAL, /* allocation from local node */
+ NUMA_OTHER, /* allocation from other node */
+#endif
+ NR_VM_ZONE_STAT_ITEMS };
+
struct per_cpu_pages {
int count; /* number of pages in the list */
int high; /* high watermark, emptying needed */
struct per_cpu_pageset {
struct per_cpu_pages pcp[2]; /* 0: hot. 1: cold */
-#ifdef CONFIG_NUMA
- unsigned long numa_hit; /* allocated in intended node */
- unsigned long numa_miss; /* allocated in non intended node */
- unsigned long numa_foreign; /* was intended here, hit elsewhere */
- unsigned long interleave_hit; /* interleaver prefered this zone */
- unsigned long local_node; /* allocation from local node */
- unsigned long other_node; /* allocation from other node */
+#ifdef CONFIG_SMP
+ s8 vm_stat_diff[NR_VM_ZONE_STAT_ITEMS];
#endif
} ____cacheline_aligned_in_smp;
/* A count of how many reclaimers are scanning this zone */
atomic_t reclaim_in_progress;
- /*
- * timestamp (in jiffies) of the last zone reclaim that did not
- * result in freeing of pages. This is used to avoid repeated scans
- * if all memory in the zone is in use.
- */
- unsigned long last_unsuccessful_zone_reclaim;
+ /* Zone statistics */
+ atomic_long_t vm_stat[NR_VM_ZONE_STAT_ITEMS];
/*
* prev_priority holds the scanning priority for this zone. It is
#define SOCK_ASYNC_WAITDATA 1
#define SOCK_NOSPACE 2
#define SOCK_PASSCRED 3
+#define SOCK_PASSSEC 4
#ifndef ARCH_HAS_SOCKET_TYPES
/**
#define NETIF_F_GSO_SHIFT 16
#define NETIF_F_TSO (SKB_GSO_TCPV4 << NETIF_F_GSO_SHIFT)
#define NETIF_F_UFO (SKB_GSO_UDPV4 << NETIF_F_GSO_SHIFT)
+#define NETIF_F_GSO_ROBUST (SKB_GSO_DODGY << NETIF_F_GSO_SHIFT)
+#define NETIF_F_TSO_ECN (SKB_GSO_TCPV4_ECN << NETIF_F_GSO_SHIFT)
#define NETIF_F_GEN_CSUM (NETIF_F_NO_CSUM | NETIF_F_HW_CSUM)
#define NETIF_F_ALL_CSUM (NETIF_F_IP_CSUM | NETIF_F_GEN_CSUM)
struct net_device *,
struct packet_type *,
struct net_device *);
- struct sk_buff *(*gso_segment)(struct sk_buff *skb, int sg);
+ struct sk_buff *(*gso_segment)(struct sk_buff *skb,
+ int features);
void *af_packet_priv;
struct list_head list;
};
extern int weight_p;
extern int netdev_set_master(struct net_device *dev, struct net_device *master);
extern int skb_checksum_help(struct sk_buff *skb, int inward);
-extern struct sk_buff *skb_gso_segment(struct sk_buff *skb, int sg);
+extern struct sk_buff *skb_gso_segment(struct sk_buff *skb, int features);
#ifdef CONFIG_BUG
extern void netdev_rx_csum_fault(struct net_device *dev);
#else
extern void linkwatch_run_queue(void);
+static inline int skb_gso_ok(struct sk_buff *skb, int features)
+{
+ int feature = skb_shinfo(skb)->gso_size ?
+ skb_shinfo(skb)->gso_type << NETIF_F_GSO_SHIFT : 0;
+ return (features & feature) == feature;
+}
+
static inline int netif_needs_gso(struct net_device *dev, struct sk_buff *skb)
{
- int feature = skb_shinfo(skb)->gso_type << NETIF_F_GSO_SHIFT;
- return skb_shinfo(skb)->gso_size &&
- (dev->features & feature) != feature;
+ return !skb_gso_ok(skb, dev->features);
}
#endif /* __KERNEL__ */
#ifndef PAGE_FLAGS_H
#define PAGE_FLAGS_H
-#include <linux/percpu.h>
-#include <linux/cache.h>
#include <linux/types.h>
-#include <asm/pgtable.h>
-
/*
* Various page->flags bits:
*
#define PG_uncached 31 /* Page has been mapped as uncached */
#endif
-/*
- * Global page accounting. One instance per CPU. Only unsigned longs are
- * allowed.
- *
- * - Fields can be modified with xxx_page_state and xxx_page_state_zone at
- * any time safely (which protects the instance from modification by
- * interrupt.
- * - The __xxx_page_state variants can be used safely when interrupts are
- * disabled.
- * - The __xxx_page_state variants can be used if the field is only
- * modified from process context and protected from preemption, or only
- * modified from interrupt context. In this case, the field should be
- * commented here.
- */
-struct page_state {
- unsigned long nr_dirty; /* Dirty writeable pages */
- unsigned long nr_writeback; /* Pages under writeback */
- unsigned long nr_unstable; /* NFS unstable pages */
- unsigned long nr_page_table_pages;/* Pages used for pagetables */
- unsigned long nr_mapped; /* mapped into pagetables.
- * only modified from process context */
- unsigned long nr_slab; /* In slab */
-#define GET_PAGE_STATE_LAST nr_slab
-
- /*
- * The below are zeroed by get_page_state(). Use get_full_page_state()
- * to add up all these.
- */
- unsigned long pgpgin; /* Disk reads */
- unsigned long pgpgout; /* Disk writes */
- unsigned long pswpin; /* swap reads */
- unsigned long pswpout; /* swap writes */
-
- unsigned long pgalloc_high; /* page allocations */
- unsigned long pgalloc_normal;
- unsigned long pgalloc_dma32;
- unsigned long pgalloc_dma;
-
- unsigned long pgfree; /* page freeings */
- unsigned long pgactivate; /* pages moved inactive->active */
- unsigned long pgdeactivate; /* pages moved active->inactive */
-
- unsigned long pgfault; /* faults (major+minor) */
- unsigned long pgmajfault; /* faults (major only) */
-
- unsigned long pgrefill_high; /* inspected in refill_inactive_zone */
- unsigned long pgrefill_normal;
- unsigned long pgrefill_dma32;
- unsigned long pgrefill_dma;
-
- unsigned long pgsteal_high; /* total highmem pages reclaimed */
- unsigned long pgsteal_normal;
- unsigned long pgsteal_dma32;
- unsigned long pgsteal_dma;
-
- unsigned long pgscan_kswapd_high;/* total highmem pages scanned */
- unsigned long pgscan_kswapd_normal;
- unsigned long pgscan_kswapd_dma32;
- unsigned long pgscan_kswapd_dma;
-
- unsigned long pgscan_direct_high;/* total highmem pages scanned */
- unsigned long pgscan_direct_normal;
- unsigned long pgscan_direct_dma32;
- unsigned long pgscan_direct_dma;
-
- unsigned long pginodesteal; /* pages reclaimed via inode freeing */
- unsigned long slabs_scanned; /* slab objects scanned */
- unsigned long kswapd_steal; /* pages reclaimed by kswapd */
- unsigned long kswapd_inodesteal;/* reclaimed via kswapd inode freeing */
- unsigned long pageoutrun; /* kswapd's calls to page reclaim */
- unsigned long allocstall; /* direct reclaim calls */
-
- unsigned long pgrotated; /* pages rotated to tail of the LRU */
- unsigned long nr_bounce; /* pages for bounce buffers */
-};
-
-extern void get_page_state(struct page_state *ret);
-extern void get_page_state_node(struct page_state *ret, int node);
-extern void get_full_page_state(struct page_state *ret);
-extern unsigned long read_page_state_offset(unsigned long offset);
-extern void mod_page_state_offset(unsigned long offset, unsigned long delta);
-extern void __mod_page_state_offset(unsigned long offset, unsigned long delta);
-
-#define read_page_state(member) \
- read_page_state_offset(offsetof(struct page_state, member))
-
-#define mod_page_state(member, delta) \
- mod_page_state_offset(offsetof(struct page_state, member), (delta))
-
-#define __mod_page_state(member, delta) \
- __mod_page_state_offset(offsetof(struct page_state, member), (delta))
-
-#define inc_page_state(member) mod_page_state(member, 1UL)
-#define dec_page_state(member) mod_page_state(member, 0UL - 1)
-#define add_page_state(member,delta) mod_page_state(member, (delta))
-#define sub_page_state(member,delta) mod_page_state(member, 0UL - (delta))
-
-#define __inc_page_state(member) __mod_page_state(member, 1UL)
-#define __dec_page_state(member) __mod_page_state(member, 0UL - 1)
-#define __add_page_state(member,delta) __mod_page_state(member, (delta))
-#define __sub_page_state(member,delta) __mod_page_state(member, 0UL - (delta))
-
-#define page_state(member) (*__page_state(offsetof(struct page_state, member)))
-
-#define state_zone_offset(zone, member) \
-({ \
- unsigned offset; \
- if (is_highmem(zone)) \
- offset = offsetof(struct page_state, member##_high); \
- else if (is_normal(zone)) \
- offset = offsetof(struct page_state, member##_normal); \
- else if (is_dma32(zone)) \
- offset = offsetof(struct page_state, member##_dma32); \
- else \
- offset = offsetof(struct page_state, member##_dma); \
- offset; \
-})
-
-#define __mod_page_state_zone(zone, member, delta) \
- do { \
- __mod_page_state_offset(state_zone_offset(zone, member), (delta)); \
- } while (0)
-
-#define mod_page_state_zone(zone, member, delta) \
- do { \
- mod_page_state_offset(state_zone_offset(zone, member), (delta)); \
- } while (0)
-
/*
* Manipulation of page state flags
*/
#define TestClearPageReferenced(page) test_and_clear_bit(PG_referenced, &(page)->flags)
#define PageUptodate(page) test_bit(PG_uptodate, &(page)->flags)
-#ifndef SetPageUptodate
+#ifdef CONFIG_S390
+#define SetPageUptodate(_page) \
+ do { \
+ struct page *__page = (_page); \
+ if (!test_and_set_bit(PG_uptodate, &__page->flags)) \
+ page_test_and_clear_dirty(_page); \
+ } while (0)
+#else
#define SetPageUptodate(page) set_bit(PG_uptodate, &(page)->flags)
#endif
#define ClearPageUptodate(page) clear_bit(PG_uptodate, &(page)->flags)
do { \
if (!test_and_set_bit(PG_writeback, \
&(page)->flags)) \
- inc_page_state(nr_writeback); \
+ inc_zone_page_state(page, NR_WRITEBACK); \
} while (0)
#define TestSetPageWriteback(page) \
({ \
ret = test_and_set_bit(PG_writeback, \
&(page)->flags); \
if (!ret) \
- inc_page_state(nr_writeback); \
+ inc_zone_page_state(page, NR_WRITEBACK); \
ret; \
})
#define ClearPageWriteback(page) \
do { \
if (test_and_clear_bit(PG_writeback, \
&(page)->flags)) \
- dec_page_state(nr_writeback); \
+ dec_zone_page_state(page, NR_WRITEBACK); \
} while (0)
#define TestClearPageWriteback(page) \
({ \
ret = test_and_clear_bit(PG_writeback, \
&(page)->flags); \
if (ret) \
- dec_page_state(nr_writeback); \
+ dec_zone_page_state(page, NR_WRITEBACK); \
ret; \
})
extern void remove_from_page_cache(struct page *page);
extern void __remove_from_page_cache(struct page *page);
-extern atomic_t nr_pagecache;
-
-#ifdef CONFIG_SMP
-
-#define PAGECACHE_ACCT_THRESHOLD max(16, NR_CPUS * 2)
-DECLARE_PER_CPU(long, nr_pagecache_local);
-
-/*
- * pagecache_acct implements approximate accounting for pagecache.
- * vm_enough_memory() do not need high accuracy. Writers will keep
- * an offset in their per-cpu arena and will spill that into the
- * global count whenever the absolute value of the local count
- * exceeds the counter's threshold.
- *
- * MUST be protected from preemption.
- * current protection is mapping->page_lock.
- */
-static inline void pagecache_acct(int count)
-{
- long *local;
-
- local = &__get_cpu_var(nr_pagecache_local);
- *local += count;
- if (*local > PAGECACHE_ACCT_THRESHOLD || *local < -PAGECACHE_ACCT_THRESHOLD) {
- atomic_add(*local, &nr_pagecache);
- *local = 0;
- }
-}
-
-#else
-
-static inline void pagecache_acct(int count)
-{
- atomic_add(count, &nr_pagecache);
-}
-#endif
-
-static inline unsigned long get_page_cache_size(void)
-{
- int ret = atomic_read(&nr_pagecache);
- if (unlikely(ret < 0))
- ret = 0;
- return ret;
-}
-
/*
* Return byte-offset into filesystem object for page.
*/
*
* It is illegal to block while in an RCU read-side critical section.
*/
-#define rcu_read_lock() preempt_disable()
+#define rcu_read_lock() \
+ do { \
+ preempt_disable(); \
+ __acquire(RCU); \
+ } while(0)
/**
* rcu_read_unlock - marks the end of an RCU read-side critical section.
*
* See rcu_read_lock() for more information.
*/
-#define rcu_read_unlock() preempt_enable()
+#define rcu_read_unlock() \
+ do { \
+ __release(RCU); \
+ preempt_enable(); \
+ } while(0)
/*
* So where is rcu_write_lock()? It does not exist, as there is no
* can use just rcu_read_lock().
*
*/
-#define rcu_read_lock_bh() local_bh_disable()
+#define rcu_read_lock_bh() \
+ do { \
+ local_bh_disable(); \
+ __acquire(RCU_BH); \
+ } while(0)
/*
* rcu_read_unlock_bh - marks the end of a softirq-only RCU critical section
*
* See rcu_read_lock_bh() for more information.
*/
-#define rcu_read_unlock_bh() local_bh_enable()
+#define rcu_read_unlock_bh() \
+ do { \
+ __release(RCU_BH); \
+ local_bh_enable(); \
+ } while(0)
/**
* rcu_dereference - fetch an RCU-protected pointer in an
* alarm API.
*/
struct rtc_wkalrm {
- unsigned char enabled; /* 0 = alarm disable, 1 = alarm disabled */
- unsigned char pending; /* 0 = alarm pending, 1 = alarm not pending */
+ unsigned char enabled; /* 0 = alarm disabled, 1 = alarm enabled */
+ unsigned char pending; /* 0 = alarm not pending, 1 = alarm pending */
struct rtc_time time; /* time the alarm is set to */
};
extern int __kill_pg_info(int sig, struct siginfo *info, pid_t pgrp);
extern int kill_pg_info(int, struct siginfo *, pid_t);
extern int kill_proc_info(int, struct siginfo *, pid_t);
-extern int kill_proc_info_as_uid(int, struct siginfo *, pid_t, uid_t, uid_t);
+extern int kill_proc_info_as_uid(int, struct siginfo *, pid_t, uid_t, uid_t, u32);
extern void do_notify_parent(struct task_struct *, int);
extern void force_sig(int, struct task_struct *);
extern void force_sig_specific(int, struct task_struct *);
struct xfrm_user_sec_ctx;
extern int cap_netlink_send(struct sock *sk, struct sk_buff *skb);
-extern int cap_netlink_recv(struct sk_buff *skb);
+extern int cap_netlink_recv(struct sk_buff *skb, int cap);
/*
* Values used in the task_security_ops calls
* @p.
* @p contains the task_struct for the process.
* Return 0 if permission is granted.
+ * @task_getsecid:
+ * Retrieve the security identifier of the process @p.
+ * @p contains the task_struct for the process and place is into @secid.
* @task_setgroups:
* Check permission before setting the supplementary group set of the
* current process.
* @p contains the task_struct of process.
* @ioprio contains the new ioprio value
* Return 0 if permission is granted.
+ * @task_getioprio
+ * Check permission before getting the ioprio value of @p.
+ * @p contains the task_struct of process.
+ * Return 0 if permission is granted.
* @task_setrlimit:
* Check permission before setting the resource limits of the current
* process for @resource to @new_rlim. The old resource limit values can
* @p contains the task_struct for process.
* @info contains the signal information.
* @sig contains the signal value.
+ * @secid contains the sid of the process where the signal originated
* Return 0 if permission is granted.
* @task_wait:
* Check permission before allowing a process to reap a child process @p
* Check permission before processing the received netlink message in
* @skb.
* @skb contains the sk_buff structure for the netlink message.
+ * @cap indicates the capability required
* Return 0 if permission is granted.
*
* Security hooks for Unix domain networking.
int (*task_setpgid) (struct task_struct * p, pid_t pgid);
int (*task_getpgid) (struct task_struct * p);
int (*task_getsid) (struct task_struct * p);
+ void (*task_getsecid) (struct task_struct * p, u32 * secid);
int (*task_setgroups) (struct group_info *group_info);
int (*task_setnice) (struct task_struct * p, int nice);
int (*task_setioprio) (struct task_struct * p, int ioprio);
+ int (*task_getioprio) (struct task_struct * p);
int (*task_setrlimit) (unsigned int resource, struct rlimit * new_rlim);
int (*task_setscheduler) (struct task_struct * p, int policy,
struct sched_param * lp);
int (*task_getscheduler) (struct task_struct * p);
int (*task_movememory) (struct task_struct * p);
int (*task_kill) (struct task_struct * p,
- struct siginfo * info, int sig);
+ struct siginfo * info, int sig, u32 secid);
int (*task_wait) (struct task_struct * p);
int (*task_prctl) (int option, unsigned long arg2,
unsigned long arg3, unsigned long arg4,
struct sembuf * sops, unsigned nsops, int alter);
int (*netlink_send) (struct sock * sk, struct sk_buff * skb);
- int (*netlink_recv) (struct sk_buff * skb);
+ int (*netlink_recv) (struct sk_buff * skb, int cap);
/* allow module stacking */
int (*register_security) (const char *name,
return security_ops->task_getsid (p);
}
+static inline void security_task_getsecid (struct task_struct *p, u32 *secid)
+{
+ security_ops->task_getsecid (p, secid);
+}
+
static inline int security_task_setgroups (struct group_info *group_info)
{
return security_ops->task_setgroups (group_info);
return security_ops->task_setioprio (p, ioprio);
}
+static inline int security_task_getioprio (struct task_struct *p)
+{
+ return security_ops->task_getioprio (p);
+}
+
static inline int security_task_setrlimit (unsigned int resource,
struct rlimit *new_rlim)
{
}
static inline int security_task_kill (struct task_struct *p,
- struct siginfo *info, int sig)
+ struct siginfo *info, int sig,
+ u32 secid)
{
- return security_ops->task_kill (p, info, sig);
+ return security_ops->task_kill (p, info, sig, secid);
}
static inline int security_task_wait (struct task_struct *p)
return security_ops->netlink_send(sk, skb);
}
-static inline int security_netlink_recv(struct sk_buff * skb)
+static inline int security_netlink_recv(struct sk_buff * skb, int cap)
{
- return security_ops->netlink_recv(skb);
+ return security_ops->netlink_recv(skb, cap);
}
/* prototypes */
return 0;
}
+static inline void security_task_getsecid (struct task_struct *p, u32 *secid)
+{ }
+
static inline int security_task_setgroups (struct group_info *group_info)
{
return 0;
return 0;
}
+static inline int security_task_getioprio (struct task_struct *p)
+{
+ return 0;
+}
+
static inline int security_task_setrlimit (unsigned int resource,
struct rlimit *new_rlim)
{
}
static inline int security_task_kill (struct task_struct *p,
- struct siginfo *info, int sig)
+ struct siginfo *info, int sig,
+ u32 secid)
{
return 0;
}
return cap_netlink_send (sk, skb);
}
-static inline int security_netlink_recv (struct sk_buff *skb)
+static inline int security_netlink_recv (struct sk_buff *skb, int cap)
{
- return cap_netlink_recv (skb);
+ return cap_netlink_recv (skb, cap);
}
static inline struct dentry *securityfs_create_dir(const char *name,
enum {
SKB_GSO_TCPV4 = 1 << 0,
SKB_GSO_UDPV4 = 1 << 1,
+
+ /* This indicates the skb is from an untrusted source. */
+ SKB_GSO_DODGY = 1 << 2,
+
+ /* This indicates the tcp segment has CWR set. */
+ SKB_GSO_TCPV4_ECN = 1 << 3,
};
/**
extern void skb_split(struct sk_buff *skb,
struct sk_buff *skb1, const u32 len);
-extern void skb_release_data(struct sk_buff *skb);
-extern struct sk_buff *skb_segment(struct sk_buff *skb, int sg);
+extern struct sk_buff *skb_segment(struct sk_buff *skb, int features);
static inline void *skb_header_pointer(const struct sk_buff *skb, int offset,
int len, void *buffer)
#define put_cpu() preempt_enable()
#define put_cpu_no_resched() preempt_enable_no_resched()
+void smp_setup_processor_id(void);
+
#endif /* __LINUX_SMP_H */
* determine what device number
* to report (real or virtual)
*/
-
+ int rq_sendfile_ok; /* turned off in gss privacy
+ * to prevent encrypting page
+ * cache pages */
wait_queue_head_t rq_wait; /* synchronization */
};
#ifdef CONFIG_NUMA
extern int zone_reclaim_mode;
-extern int zone_reclaim_interval;
extern int zone_reclaim(struct zone *, gfp_t, unsigned int);
#else
#define zone_reclaim_mode 0
--- /dev/null
+#ifndef _LINUX_VMSTAT_H
+#define _LINUX_VMSTAT_H
+
+#include <linux/types.h>
+#include <linux/percpu.h>
+#include <linux/config.h>
+#include <linux/mmzone.h>
+#include <asm/atomic.h>
+
+#ifdef CONFIG_VM_EVENT_COUNTERS
+/*
+ * Light weight per cpu counter implementation.
+ *
+ * Counters should only be incremented and no critical kernel component
+ * should rely on the counter values.
+ *
+ * Counters are handled completely inline. On many platforms the code
+ * generated will simply be the increment of a global address.
+ */
+
+#define FOR_ALL_ZONES(x) x##_DMA, x##_DMA32, x##_NORMAL, x##_HIGH
+
+enum vm_event_item { PGPGIN, PGPGOUT, PSWPIN, PSWPOUT,
+ FOR_ALL_ZONES(PGALLOC),
+ PGFREE, PGACTIVATE, PGDEACTIVATE,
+ PGFAULT, PGMAJFAULT,
+ FOR_ALL_ZONES(PGREFILL),
+ FOR_ALL_ZONES(PGSTEAL),
+ FOR_ALL_ZONES(PGSCAN_KSWAPD),
+ FOR_ALL_ZONES(PGSCAN_DIRECT),
+ PGINODESTEAL, SLABS_SCANNED, KSWAPD_STEAL, KSWAPD_INODESTEAL,
+ PAGEOUTRUN, ALLOCSTALL, PGROTATED,
+ NR_VM_EVENT_ITEMS
+};
+
+struct vm_event_state {
+ unsigned long event[NR_VM_EVENT_ITEMS];
+};
+
+DECLARE_PER_CPU(struct vm_event_state, vm_event_states);
+
+static inline void __count_vm_event(enum vm_event_item item)
+{
+ __get_cpu_var(vm_event_states.event[item])++;
+}
+
+static inline void count_vm_event(enum vm_event_item item)
+{
+ get_cpu_var(vm_event_states.event[item])++;
+ put_cpu();
+}
+
+static inline void __count_vm_events(enum vm_event_item item, long delta)
+{
+ __get_cpu_var(vm_event_states.event[item]) += delta;
+}
+
+static inline void count_vm_events(enum vm_event_item item, long delta)
+{
+ get_cpu_var(vm_event_states.event[item])++;
+ put_cpu();
+}
+
+extern void all_vm_events(unsigned long *);
+extern void vm_events_fold_cpu(int cpu);
+
+#else
+
+/* Disable counters */
+#define get_cpu_vm_events(e) 0L
+#define count_vm_event(e) do { } while (0)
+#define count_vm_events(e,d) do { } while (0)
+#define __count_vm_event(e) do { } while (0)
+#define __count_vm_events(e,d) do { } while (0)
+#define vm_events_fold_cpu(x) do { } while (0)
+
+#endif /* CONFIG_VM_EVENT_COUNTERS */
+
+#define __count_zone_vm_events(item, zone, delta) \
+ __count_vm_events(item##_DMA + zone_idx(zone), delta)
+
+/*
+ * Zone based page accounting with per cpu differentials.
+ */
+extern atomic_long_t vm_stat[NR_VM_ZONE_STAT_ITEMS];
+
+static inline void zone_page_state_add(long x, struct zone *zone,
+ enum zone_stat_item item)
+{
+ atomic_long_add(x, &zone->vm_stat[item]);
+ atomic_long_add(x, &vm_stat[item]);
+}
+
+static inline unsigned long global_page_state(enum zone_stat_item item)
+{
+ long x = atomic_long_read(&vm_stat[item]);
+#ifdef CONFIG_SMP
+ if (x < 0)
+ x = 0;
+#endif
+ return x;
+}
+
+static inline unsigned long zone_page_state(struct zone *zone,
+ enum zone_stat_item item)
+{
+ long x = atomic_long_read(&zone->vm_stat[item]);
+#ifdef CONFIG_SMP
+ if (x < 0)
+ x = 0;
+#endif
+ return x;
+}
+
+#ifdef CONFIG_NUMA
+/*
+ * Determine the per node value of a stat item. This function
+ * is called frequently in a NUMA machine, so try to be as
+ * frugal as possible.
+ */
+static inline unsigned long node_page_state(int node,
+ enum zone_stat_item item)
+{
+ struct zone *zones = NODE_DATA(node)->node_zones;
+
+ return
+#ifndef CONFIG_DMA_IS_NORMAL
+#if !defined(CONFIG_DMA_IS_DMA32) && BITS_PER_LONG >= 64
+ zone_page_state(&zones[ZONE_DMA32], item) +
+#endif
+ zone_page_state(&zones[ZONE_NORMAL], item) +
+#endif
+#ifdef CONFIG_HIGHMEM
+ zone_page_state(&zones[ZONE_HIGHMEM], item) +
+#endif
+ zone_page_state(&zones[ZONE_DMA], item);
+}
+
+extern void zone_statistics(struct zonelist *, struct zone *);
+
+#else
+
+#define node_page_state(node, item) global_page_state(item)
+#define zone_statistics(_zl,_z) do { } while (0)
+
+#endif /* CONFIG_NUMA */
+
+#define __add_zone_page_state(__z, __i, __d) \
+ __mod_zone_page_state(__z, __i, __d)
+#define __sub_zone_page_state(__z, __i, __d) \
+ __mod_zone_page_state(__z, __i,-(__d))
+
+#define add_zone_page_state(__z, __i, __d) mod_zone_page_state(__z, __i, __d)
+#define sub_zone_page_state(__z, __i, __d) mod_zone_page_state(__z, __i, -(__d))
+
+static inline void zap_zone_vm_stats(struct zone *zone)
+{
+ memset(zone->vm_stat, 0, sizeof(zone->vm_stat));
+}
+
+extern void inc_zone_state(struct zone *, enum zone_stat_item);
+
+#ifdef CONFIG_SMP
+void __mod_zone_page_state(struct zone *, enum zone_stat_item item, int);
+void __inc_zone_page_state(struct page *, enum zone_stat_item);
+void __dec_zone_page_state(struct page *, enum zone_stat_item);
+
+void mod_zone_page_state(struct zone *, enum zone_stat_item, int);
+void inc_zone_page_state(struct page *, enum zone_stat_item);
+void dec_zone_page_state(struct page *, enum zone_stat_item);
+
+extern void inc_zone_state(struct zone *, enum zone_stat_item);
+
+void refresh_cpu_vm_stats(int);
+void refresh_vm_stats(void);
+
+#else /* CONFIG_SMP */
+
+/*
+ * We do not maintain differentials in a single processor configuration.
+ * The functions directly modify the zone and global counters.
+ */
+static inline void __mod_zone_page_state(struct zone *zone,
+ enum zone_stat_item item, int delta)
+{
+ zone_page_state_add(delta, zone, item);
+}
+
+static inline void __inc_zone_page_state(struct page *page,
+ enum zone_stat_item item)
+{
+ atomic_long_inc(&page_zone(page)->vm_stat[item]);
+ atomic_long_inc(&vm_stat[item]);
+}
+
+static inline void __dec_zone_page_state(struct page *page,
+ enum zone_stat_item item)
+{
+ atomic_long_dec(&page_zone(page)->vm_stat[item]);
+ atomic_long_dec(&vm_stat[item]);
+}
+
+/*
+ * We only use atomic operations to update counters. So there is no need to
+ * disable interrupts.
+ */
+#define inc_zone_page_state __inc_zone_page_state
+#define dec_zone_page_state __dec_zone_page_state
+#define mod_zone_page_state __mod_zone_page_state
+
+static inline void refresh_cpu_vm_stats(int cpu) { }
+static inline void refresh_vm_stats(void) { }
+#endif
+
+#endif /* _LINUX_VMSTAT_H */
struct unix_skb_parms {
struct ucred creds; /* Skb credentials */
struct scm_fp_list *fp; /* Passed files */
+#ifdef CONFIG_SECURITY_NETWORK
+ char *secdata; /* Security context */
+ u32 seclen; /* Security length */
+#endif
};
#define UNIXCB(skb) (*(struct unix_skb_parms*)&((skb)->cb))
#define UNIXCREDS(skb) (&UNIXCB((skb)).creds)
+#define UNIXSECDATA(skb) (&UNIXCB((skb)).secdata)
+#define UNIXSECLEN(skb) (&UNIXCB((skb)).seclen)
#define unix_state_rlock(s) spin_lock(&unix_sk(s)->lock)
#define unix_state_runlock(s) spin_unlock(&unix_sk(s)->lock)
#define PSCHED_TADD2(tv, delta, tv_res) \
({ \
- int __delta = (tv).tv_usec + (delta); \
- (tv_res).tv_sec = (tv).tv_sec; \
- if (__delta > USEC_PER_SEC) { (tv_res).tv_sec++; __delta -= USEC_PER_SEC; } \
+ int __delta = (delta); \
+ (tv_res) = (tv); \
+ while(__delta >= USEC_PER_SEC){ \
+ (tv_res).tv_sec++; \
+ __delta -= USEC_PER_SEC; \
+ } \
(tv_res).tv_usec = __delta; \
})
#define PSCHED_TADD(tv, delta) \
({ \
- (tv).tv_usec += (delta); \
- if ((tv).tv_usec > USEC_PER_SEC) { (tv).tv_sec++; \
- (tv).tv_usec -= USEC_PER_SEC; } \
+ int __delta = (delta); \
+ while(__delta >= USEC_PER_SEC){ \
+ (tv).tv_sec++; \
+ __delta -= USEC_PER_SEC; \
+ } \
+ (tv).tv_usec = __delta; \
})
/* Set/check that time is in the "past perfect";
struct net_protocol {
int (*handler)(struct sk_buff *skb);
void (*err_handler)(struct sk_buff *skb, u32 info);
- struct sk_buff *(*gso_segment)(struct sk_buff *skb, int sg);
+ struct sk_buff *(*gso_segment)(struct sk_buff *skb,
+ int features);
int no_policy;
};
{
struct ucred creds; /* Skb credentials */
struct scm_fp_list *fp; /* Passed files */
+#ifdef CONFIG_SECURITY_NETWORK
+ char *secdata; /* Security context */
+ u32 seclen; /* Security length */
+#endif
unsigned long seq; /* Connection seqno */
};
return __scm_send(sock, msg, scm);
}
+#ifdef CONFIG_SECURITY_NETWORK
+static inline void scm_passec(struct socket *sock, struct msghdr *msg, struct scm_cookie *scm)
+{
+ if (test_bit(SOCK_PASSSEC, &sock->flags) && scm->secdata != NULL)
+ put_cmsg(msg, SOL_SOCKET, SCM_SECURITY, scm->seclen, scm->secdata);
+}
+#else
+static inline void scm_passec(struct socket *sock, struct msghdr *msg, struct scm_cookie *scm)
+{ }
+#endif /* CONFIG_SECURITY_NETWORK */
+
static __inline__ void scm_recv(struct socket *sock, struct msghdr *msg,
struct scm_cookie *scm, int flags)
{
if (test_bit(SOCK_PASSCRED, &sock->flags))
put_cmsg(msg, SOL_SOCKET, SCM_CREDENTIALS, sizeof(scm->creds), &scm->creds);
+ scm_passec(sock, msg, scm);
+
if (!scm->fp)
return;
SOCK_USE_WRITE_QUEUE, /* whether to call sk->sk_write_space in sock_wfree */
SOCK_DBG, /* %SO_DEBUG setting */
SOCK_RCVTSTAMP, /* %SO_TIMESTAMP setting */
- SOCK_NO_LARGESEND, /* whether to sent large segments or not */
SOCK_LOCALROUTE, /* route locally only, %SO_DONTROUTE setting */
SOCK_QUEUE_SHRUNK, /* write queue has been shrunk recently */
};
if (sk->sk_route_caps & NETIF_F_GSO)
sk->sk_route_caps |= NETIF_F_TSO;
if (sk->sk_route_caps & NETIF_F_TSO) {
- if (sock_flag(sk, SOCK_NO_LARGESEND) || dst->header_len)
+ if (dst->header_len)
sk->sk_route_caps &= ~NETIF_F_TSO;
else
sk->sk_route_caps |= NETIF_F_SG | NETIF_F_HW_CSUM;
extern int tcp_v4_destroy_sock(struct sock *sk);
-extern struct sk_buff *tcp_tso_segment(struct sk_buff *skb, int sg);
+extern struct sk_buff *tcp_tso_segment(struct sk_buff *skb, int features);
#ifdef CONFIG_PROC_FS
extern int tcp4_proc_init(void);
struct sk_buff *skb)
{
tp->ecn_flags = 0;
- if (sysctl_tcp_ecn && !(sk->sk_route_caps & NETIF_F_TSO)) {
+ if (sysctl_tcp_ecn) {
TCP_SKB_CB(skb)->flags |= TCPCB_FLAG_ECE|TCPCB_FLAG_CWR;
tp->ecn_flags = TCP_ECN_OK;
- sock_set_flag(sk, SOCK_NO_LARGESEND);
}
}
if (tp->ecn_flags&TCP_ECN_QUEUE_CWR) {
tp->ecn_flags &= ~TCP_ECN_QUEUE_CWR;
skb->h.th->cwr = 1;
+ if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV4)
+ skb_shinfo(skb)->gso_type |=
+ SKB_GSO_TCPV4_ECN;
}
} else {
/* ACK or retransmitted segment: clear ECT|CE */
config INIT_ENV_ARG_LIMIT
int
- default 32 if !USERMODE
- default 128 if USERMODE
+ default 32 if !UML
+ default 128 if UML
help
Maximum of each of the number of arguments and environment
variables passed to init from the kernel command line.
SLOB is more space efficient but does not scale well and is
more susceptible to fragmentation.
+config VM_EVENT_COUNTERS
+ default y
+ bool "Enable VM event counters for /proc/vmstat" if EMBEDDED
+ help
+ VM event counters are only needed to for event counts to be
+ shown. They have no function for the kernel itself. This
+ option allows the disabling of the VM event counters.
+ /proc/vmstat will only show page counts.
+
endmenu # General setup
config TINY_SHMEM
cpu_set(cpu, cpu_possible_map);
}
+void __init __attribute__((weak)) smp_setup_processor_id(void)
+{
+}
+
asmlinkage void __init start_kernel(void)
{
char * command_line;
extern struct kernel_param __start___param[], __stop___param[];
+
+ smp_setup_processor_id();
+
/*
* Interrupts are still disabled. Do necessary setups, then
* enable them
* Check for appropriate CAP_AUDIT_ capabilities on incoming audit
* control messages.
*/
-static int audit_netlink_ok(kernel_cap_t eff_cap, u16 msg_type)
+static int audit_netlink_ok(struct sk_buff *skb, u16 msg_type)
{
int err = 0;
case AUDIT_DEL:
case AUDIT_DEL_RULE:
case AUDIT_SIGNAL_INFO:
- if (!cap_raised(eff_cap, CAP_AUDIT_CONTROL))
+ if (security_netlink_recv(skb, CAP_AUDIT_CONTROL))
err = -EPERM;
break;
case AUDIT_USER:
case AUDIT_FIRST_USER_MSG...AUDIT_LAST_USER_MSG:
case AUDIT_FIRST_USER_MSG2...AUDIT_LAST_USER_MSG2:
- if (!cap_raised(eff_cap, CAP_AUDIT_WRITE))
+ if (security_netlink_recv(skb, CAP_AUDIT_WRITE))
err = -EPERM;
break;
default: /* bad msg */
char *ctx;
u32 len;
- err = audit_netlink_ok(NETLINK_CB(skb).eff_cap, msg_type);
+ err = audit_netlink_ok(skb, msg_type);
if (err)
return err;
return 0;
}
-static inline void __cond_resched(void)
+static inline int __resched_legal(void)
+{
+ if (unlikely(preempt_count()))
+ return 0;
+ if (unlikely(system_state != SYSTEM_RUNNING))
+ return 0;
+ return 1;
+}
+
+static void __cond_resched(void)
{
#ifdef CONFIG_DEBUG_SPINLOCK_SLEEP
__might_sleep(__FILE__, __LINE__);
* PREEMPT_ACTIVE, which could trigger a second
* cond_resched() call.
*/
- if (unlikely(preempt_count()))
- return;
- if (unlikely(system_state != SYSTEM_RUNNING))
- return;
do {
add_preempt_count(PREEMPT_ACTIVE);
schedule();
int __sched cond_resched(void)
{
- if (need_resched()) {
+ if (need_resched() && __resched_legal()) {
__cond_resched();
return 1;
}
return 0;
}
-
EXPORT_SYMBOL(cond_resched);
/*
ret = 1;
spin_lock(lock);
}
- if (need_resched()) {
+ if (need_resched() && __resched_legal()) {
_raw_spin_unlock(lock);
preempt_enable_no_resched();
__cond_resched();
}
return ret;
}
-
EXPORT_SYMBOL(cond_resched_lock);
int __sched cond_resched_softirq(void)
{
BUG_ON(!in_softirq());
- if (need_resched()) {
+ if (need_resched() && __resched_legal()) {
__local_bh_enable();
__cond_resched();
local_bh_disable();
}
return 0;
}
-
EXPORT_SYMBOL(cond_resched_softirq);
-
/**
* yield - yield the current processor to other threads.
*
&& !capable(CAP_KILL))
return error;
- error = security_task_kill(t, info, sig);
+ error = security_task_kill(t, info, sig, 0);
if (!error)
audit_signal_info(sig, t); /* Let audit system see the signal */
return error;
/* like kill_proc_info(), but doesn't use uid/euid of "current" */
int kill_proc_info_as_uid(int sig, struct siginfo *info, pid_t pid,
- uid_t uid, uid_t euid)
+ uid_t uid, uid_t euid, u32 secid)
{
int ret = -EINVAL;
struct task_struct *p;
ret = -EPERM;
goto out_unlock;
}
+ ret = security_task_kill(p, info, sig, secid);
+ if (ret)
+ goto out_unlock;
if (sig && p->sighand) {
unsigned long flags;
spin_lock_irqsave(&p->sighand->siglock, flags);
.strategy = &sysctl_intvec,
.extra1 = &zero,
},
- {
- .ctl_name = VM_ZONE_RECLAIM_INTERVAL,
- .procname = "zone_reclaim_interval",
- .data = &zone_reclaim_interval,
- .maxlen = sizeof(zone_reclaim_interval),
- .mode = 0644,
- .proc_handler = &proc_dointvec_jiffies,
- .strategy = &sysctl_jiffies,
- },
#endif
#ifdef CONFIG_X86_32
{
obj-y := bootmem.o filemap.o mempool.o oom_kill.o fadvise.o \
page_alloc.o page-writeback.o pdflush.o \
readahead.o swap.o truncate.o vmscan.o \
- prio_tree.o util.o mmzone.o $(mmu-y)
+ prio_tree.o util.o mmzone.o vmstat.o $(mmu-y)
obj-$(CONFIG_SWAP) += page_io.o swap_state.o swapfile.o thrash.o
obj-$(CONFIG_HUGETLBFS) += hugetlb.o
radix_tree_delete(&mapping->page_tree, page->index);
page->mapping = NULL;
mapping->nrpages--;
- pagecache_acct(-1);
+ __dec_zone_page_state(page, NR_FILE_PAGES);
}
void remove_from_page_cache(struct page *page)
page->mapping = mapping;
page->index = offset;
mapping->nrpages++;
- pagecache_acct(1);
+ __inc_zone_page_state(page, NR_FILE_PAGES);
}
write_unlock_irq(&mapping->tree_lock);
radix_tree_preload_end();
*/
if (!did_readaround) {
majmin = VM_FAULT_MAJOR;
- inc_page_state(pgmajfault);
+ count_vm_event(PGMAJFAULT);
}
did_readaround = 1;
ra_pages = max_sane_readahead(file->f_ra.ra_pages);
page_not_uptodate:
if (!did_readaround) {
majmin = VM_FAULT_MAJOR;
- inc_page_state(pgmajfault);
+ count_vm_event(PGMAJFAULT);
}
lock_page(page);
if (bvec->bv_page == org_vec->bv_page)
continue;
- mempool_free(bvec->bv_page, pool);
- dec_page_state(nr_bounce);
+ dec_zone_page_state(bvec->bv_page, NR_BOUNCE);
+ mempool_free(bvec->bv_page, pool);
}
bio_endio(bio_orig, bio_orig->bi_size, err);
to->bv_page = mempool_alloc(pool, q->bounce_gfp);
to->bv_len = from->bv_len;
to->bv_offset = from->bv_offset;
- inc_page_state(nr_bounce);
+ inc_zone_page_state(to->bv_page, NR_BOUNCE);
if (rw == WRITE) {
char *vto, *vfrom;
pmd_clear(pmd);
pte_lock_deinit(page);
pte_free_tlb(tlb, page);
- dec_page_state(nr_page_table_pages);
+ dec_zone_page_state(page, NR_PAGETABLE);
tlb->mm->nr_ptes--;
}
pte_free(new);
} else {
mm->nr_ptes++;
- inc_page_state(nr_page_table_pages);
+ inc_zone_page_state(new, NR_PAGETABLE);
pmd_populate(mm, pmd, new);
}
spin_unlock(&mm->page_table_lock);
/* Had to read the page from swap area: Major fault */
ret = VM_FAULT_MAJOR;
- inc_page_state(pgmajfault);
+ count_vm_event(PGMAJFAULT);
grab_swap_token();
}
__set_current_state(TASK_RUNNING);
- inc_page_state(pgfault);
+ count_vm_event(PGFAULT);
if (unlikely(is_vm_hugetlb_page(vma)))
return hugetlb_fault(mm, vma, address, write_access);
zl = NODE_DATA(nid)->node_zonelists + gfp_zone(gfp);
page = __alloc_pages(gfp, order, zl);
- if (page && page_zone(page) == zl->zones[0]) {
- zone_pcp(zl->zones[0],get_cpu())->interleave_hit++;
- put_cpu();
- }
+ if (page && page_zone(page) == zl->zones[0])
+ inc_zone_page_state(page, NUMA_INTERLEAVE_HIT);
return page;
}
if (sysctl_overcommit_memory == OVERCOMMIT_GUESS) {
unsigned long n;
- free = get_page_cache_size();
+ free = global_page_state(NR_FILE_PAGES);
free += nr_swap_pages;
/*
if (sysctl_overcommit_memory == OVERCOMMIT_GUESS) {
unsigned long n;
- free = get_page_cache_size();
+ free = global_page_state(NR_FILE_PAGES);
free += nr_swap_pages;
/*
static void background_writeout(unsigned long _min_pages);
-struct writeback_state
-{
- unsigned long nr_dirty;
- unsigned long nr_unstable;
- unsigned long nr_mapped;
- unsigned long nr_writeback;
-};
-
-static void get_writeback_state(struct writeback_state *wbs)
-{
- wbs->nr_dirty = read_page_state(nr_dirty);
- wbs->nr_unstable = read_page_state(nr_unstable);
- wbs->nr_mapped = read_page_state(nr_mapped);
- wbs->nr_writeback = read_page_state(nr_writeback);
-}
-
/*
* Work out the current dirty-memory clamping and background writeout
* thresholds.
* clamping level.
*/
static void
-get_dirty_limits(struct writeback_state *wbs, long *pbackground, long *pdirty,
- struct address_space *mapping)
+get_dirty_limits(long *pbackground, long *pdirty,
+ struct address_space *mapping)
{
int background_ratio; /* Percentages */
int dirty_ratio;
unsigned long available_memory = total_pages;
struct task_struct *tsk;
- get_writeback_state(wbs);
-
#ifdef CONFIG_HIGHMEM
/*
* If this mapping can only allocate from low memory,
#endif
- unmapped_ratio = 100 - (wbs->nr_mapped * 100) / total_pages;
+ unmapped_ratio = 100 - ((global_page_state(NR_FILE_MAPPED) +
+ global_page_state(NR_ANON_PAGES)) * 100) /
+ total_pages;
dirty_ratio = vm_dirty_ratio;
if (dirty_ratio > unmapped_ratio / 2)
*/
static void balance_dirty_pages(struct address_space *mapping)
{
- struct writeback_state wbs;
long nr_reclaimable;
long background_thresh;
long dirty_thresh;
.range_cyclic = 1,
};
- get_dirty_limits(&wbs, &background_thresh,
- &dirty_thresh, mapping);
- nr_reclaimable = wbs.nr_dirty + wbs.nr_unstable;
- if (nr_reclaimable + wbs.nr_writeback <= dirty_thresh)
- break;
+ get_dirty_limits(&background_thresh, &dirty_thresh, mapping);
+ nr_reclaimable = global_page_state(NR_FILE_DIRTY) +
+ global_page_state(NR_UNSTABLE_NFS);
+ if (nr_reclaimable + global_page_state(NR_WRITEBACK) <=
+ dirty_thresh)
+ break;
if (!dirty_exceeded)
dirty_exceeded = 1;
*/
if (nr_reclaimable) {
writeback_inodes(&wbc);
- get_dirty_limits(&wbs, &background_thresh,
- &dirty_thresh, mapping);
- nr_reclaimable = wbs.nr_dirty + wbs.nr_unstable;
- if (nr_reclaimable + wbs.nr_writeback <= dirty_thresh)
- break;
+ get_dirty_limits(&background_thresh,
+ &dirty_thresh, mapping);
+ nr_reclaimable = global_page_state(NR_FILE_DIRTY) +
+ global_page_state(NR_UNSTABLE_NFS);
+ if (nr_reclaimable +
+ global_page_state(NR_WRITEBACK)
+ <= dirty_thresh)
+ break;
pages_written += write_chunk - wbc.nr_to_write;
if (pages_written >= write_chunk)
break; /* We've done our duty */
blk_congestion_wait(WRITE, HZ/10);
}
- if (nr_reclaimable + wbs.nr_writeback <= dirty_thresh && dirty_exceeded)
- dirty_exceeded = 0;
+ if (nr_reclaimable + global_page_state(NR_WRITEBACK)
+ <= dirty_thresh && dirty_exceeded)
+ dirty_exceeded = 0;
if (writeback_in_progress(bdi))
return; /* pdflush is already working this queue */
void throttle_vm_writeout(void)
{
- struct writeback_state wbs;
long background_thresh;
long dirty_thresh;
for ( ; ; ) {
- get_dirty_limits(&wbs, &background_thresh, &dirty_thresh, NULL);
+ get_dirty_limits(&background_thresh, &dirty_thresh, NULL);
/*
* Boost the allowable dirty threshold a bit for page
*/
dirty_thresh += dirty_thresh / 10; /* wheeee... */
- if (wbs.nr_unstable + wbs.nr_writeback <= dirty_thresh)
- break;
+ if (global_page_state(NR_UNSTABLE_NFS) +
+ global_page_state(NR_WRITEBACK) <= dirty_thresh)
+ break;
blk_congestion_wait(WRITE, HZ/10);
}
}
};
for ( ; ; ) {
- struct writeback_state wbs;
long background_thresh;
long dirty_thresh;
- get_dirty_limits(&wbs, &background_thresh, &dirty_thresh, NULL);
- if (wbs.nr_dirty + wbs.nr_unstable < background_thresh
+ get_dirty_limits(&background_thresh, &dirty_thresh, NULL);
+ if (global_page_state(NR_FILE_DIRTY) +
+ global_page_state(NR_UNSTABLE_NFS) < background_thresh
&& min_pages <= 0)
break;
wbc.encountered_congestion = 0;
*/
int wakeup_pdflush(long nr_pages)
{
- if (nr_pages == 0) {
- struct writeback_state wbs;
-
- get_writeback_state(&wbs);
- nr_pages = wbs.nr_dirty + wbs.nr_unstable;
- }
+ if (nr_pages == 0)
+ nr_pages = global_page_state(NR_FILE_DIRTY) +
+ global_page_state(NR_UNSTABLE_NFS);
return pdflush_operation(background_writeout, nr_pages);
}
unsigned long start_jif;
unsigned long next_jif;
long nr_to_write;
- struct writeback_state wbs;
struct writeback_control wbc = {
.bdi = NULL,
.sync_mode = WB_SYNC_NONE,
sync_supers();
- get_writeback_state(&wbs);
oldest_jif = jiffies - dirty_expire_interval;
start_jif = jiffies;
next_jif = start_jif + dirty_writeback_interval;
- nr_to_write = wbs.nr_dirty + wbs.nr_unstable +
+ nr_to_write = global_page_state(NR_FILE_DIRTY) +
+ global_page_state(NR_UNSTABLE_NFS) +
(inodes_stat.nr_inodes - inodes_stat.nr_unused);
while (nr_to_write > 0) {
wbc.encountered_congestion = 0;
if (mapping2) { /* Race with truncate? */
BUG_ON(mapping2 != mapping);
if (mapping_cap_account_dirty(mapping))
- inc_page_state(nr_dirty);
+ __inc_zone_page_state(page,
+ NR_FILE_DIRTY);
radix_tree_tag_set(&mapping->page_tree,
page_index(page), PAGECACHE_TAG_DIRTY);
}
radix_tree_tag_clear(&mapping->page_tree,
page_index(page),
PAGECACHE_TAG_DIRTY);
- write_unlock_irqrestore(&mapping->tree_lock, flags);
if (mapping_cap_account_dirty(mapping))
- dec_page_state(nr_dirty);
+ __dec_zone_page_state(page, NR_FILE_DIRTY);
+ write_unlock_irqrestore(&mapping->tree_lock, flags);
return 1;
}
write_unlock_irqrestore(&mapping->tree_lock, flags);
if (mapping) {
if (TestClearPageDirty(page)) {
if (mapping_cap_account_dirty(mapping))
- dec_page_state(nr_dirty);
+ dec_zone_page_state(page, NR_FILE_DIRTY);
return 1;
}
return 0;
kernel_map_pages(page, 1 << order, 0);
local_irq_save(flags);
- __mod_page_state(pgfree, 1 << order);
+ __count_vm_events(PGFREE, 1 << order);
free_one_page(page_zone(page), page, order);
local_irq_restore(flags);
}
}
#endif /* CONFIG_PM */
-static void zone_statistics(struct zonelist *zonelist, struct zone *z, int cpu)
-{
-#ifdef CONFIG_NUMA
- pg_data_t *pg = z->zone_pgdat;
- pg_data_t *orig = zonelist->zones[0]->zone_pgdat;
- struct per_cpu_pageset *p;
-
- p = zone_pcp(z, cpu);
- if (pg == orig) {
- p->numa_hit++;
- } else {
- p->numa_miss++;
- zone_pcp(zonelist->zones[0], cpu)->numa_foreign++;
- }
- if (pg == NODE_DATA(numa_node_id()))
- p->local_node++;
- else
- p->other_node++;
-#endif
-}
-
/*
* Free a 0-order page
*/
pcp = &zone_pcp(zone, get_cpu())->pcp[cold];
local_irq_save(flags);
- __inc_page_state(pgfree);
+ __count_vm_event(PGFREE);
list_add(&page->lru, &pcp->list);
pcp->count++;
if (pcp->count >= pcp->high) {
goto failed;
}
- __mod_page_state_zone(zone, pgalloc, 1 << order);
- zone_statistics(zonelist, zone, cpu);
+ __count_zone_vm_events(PGALLOC, zone, 1 << order);
+ zone_statistics(zonelist, zone);
local_irq_restore(flags);
put_cpu();
#define show_node(zone) do { } while (0)
#endif
-/*
- * Accumulate the page_state information across all CPUs.
- * The result is unavoidably approximate - it can change
- * during and after execution of this function.
- */
-static DEFINE_PER_CPU(struct page_state, page_states) = {0};
-
-atomic_t nr_pagecache = ATOMIC_INIT(0);
-EXPORT_SYMBOL(nr_pagecache);
-#ifdef CONFIG_SMP
-DEFINE_PER_CPU(long, nr_pagecache_local) = 0;
-#endif
-
-static void __get_page_state(struct page_state *ret, int nr, cpumask_t *cpumask)
-{
- unsigned cpu;
-
- memset(ret, 0, nr * sizeof(unsigned long));
- cpus_and(*cpumask, *cpumask, cpu_online_map);
-
- for_each_cpu_mask(cpu, *cpumask) {
- unsigned long *in;
- unsigned long *out;
- unsigned off;
- unsigned next_cpu;
-
- in = (unsigned long *)&per_cpu(page_states, cpu);
-
- next_cpu = next_cpu(cpu, *cpumask);
- if (likely(next_cpu < NR_CPUS))
- prefetch(&per_cpu(page_states, next_cpu));
-
- out = (unsigned long *)ret;
- for (off = 0; off < nr; off++)
- *out++ += *in++;
- }
-}
-
-void get_page_state_node(struct page_state *ret, int node)
-{
- int nr;
- cpumask_t mask = node_to_cpumask(node);
-
- nr = offsetof(struct page_state, GET_PAGE_STATE_LAST);
- nr /= sizeof(unsigned long);
-
- __get_page_state(ret, nr+1, &mask);
-}
-
-void get_page_state(struct page_state *ret)
-{
- int nr;
- cpumask_t mask = CPU_MASK_ALL;
-
- nr = offsetof(struct page_state, GET_PAGE_STATE_LAST);
- nr /= sizeof(unsigned long);
-
- __get_page_state(ret, nr + 1, &mask);
-}
-
-void get_full_page_state(struct page_state *ret)
-{
- cpumask_t mask = CPU_MASK_ALL;
-
- __get_page_state(ret, sizeof(*ret) / sizeof(unsigned long), &mask);
-}
-
-unsigned long read_page_state_offset(unsigned long offset)
-{
- unsigned long ret = 0;
- int cpu;
-
- for_each_online_cpu(cpu) {
- unsigned long in;
-
- in = (unsigned long)&per_cpu(page_states, cpu) + offset;
- ret += *((unsigned long *)in);
- }
- return ret;
-}
-
-void __mod_page_state_offset(unsigned long offset, unsigned long delta)
-{
- void *ptr;
-
- ptr = &__get_cpu_var(page_states);
- *(unsigned long *)(ptr + offset) += delta;
-}
-EXPORT_SYMBOL(__mod_page_state_offset);
-
-void mod_page_state_offset(unsigned long offset, unsigned long delta)
-{
- unsigned long flags;
- void *ptr;
-
- local_irq_save(flags);
- ptr = &__get_cpu_var(page_states);
- *(unsigned long *)(ptr + offset) += delta;
- local_irq_restore(flags);
-}
-EXPORT_SYMBOL(mod_page_state_offset);
-
-void __get_zone_counts(unsigned long *active, unsigned long *inactive,
- unsigned long *free, struct pglist_data *pgdat)
-{
- struct zone *zones = pgdat->node_zones;
- int i;
-
- *active = 0;
- *inactive = 0;
- *free = 0;
- for (i = 0; i < MAX_NR_ZONES; i++) {
- *active += zones[i].nr_active;
- *inactive += zones[i].nr_inactive;
- *free += zones[i].free_pages;
- }
-}
-
-void get_zone_counts(unsigned long *active,
- unsigned long *inactive, unsigned long *free)
-{
- struct pglist_data *pgdat;
-
- *active = 0;
- *inactive = 0;
- *free = 0;
- for_each_online_pgdat(pgdat) {
- unsigned long l, m, n;
- __get_zone_counts(&l, &m, &n, pgdat);
- *active += l;
- *inactive += m;
- *free += n;
- }
-}
-
void si_meminfo(struct sysinfo *val)
{
val->totalram = totalram_pages;
*/
void show_free_areas(void)
{
- struct page_state ps;
int cpu, temperature;
unsigned long active;
unsigned long inactive;
}
}
- get_page_state(&ps);
get_zone_counts(&active, &inactive, &free);
printk("Free pages: %11ukB (%ukB HighMem)\n",
"unstable:%lu free:%u slab:%lu mapped:%lu pagetables:%lu\n",
active,
inactive,
- ps.nr_dirty,
- ps.nr_writeback,
- ps.nr_unstable,
+ global_page_state(NR_FILE_DIRTY),
+ global_page_state(NR_WRITEBACK),
+ global_page_state(NR_UNSTABLE_NFS),
nr_free_pages(),
- ps.nr_slab,
- ps.nr_mapped,
- ps.nr_page_table_pages);
+ global_page_state(NR_SLAB),
+ global_page_state(NR_FILE_MAPPED),
+ global_page_state(NR_PAGETABLE));
for_each_zone(zone) {
int i;
zone->nr_scan_inactive = 0;
zone->nr_active = 0;
zone->nr_inactive = 0;
+ zap_zone_vm_stats(zone);
atomic_set(&zone->reclaim_in_progress, 0);
if (!size)
continue;
__pa(PAGE_OFFSET) >> PAGE_SHIFT, NULL);
}
-#ifdef CONFIG_PROC_FS
-
-#include <linux/seq_file.h>
-
-static void *frag_start(struct seq_file *m, loff_t *pos)
-{
- pg_data_t *pgdat;
- loff_t node = *pos;
- for (pgdat = first_online_pgdat();
- pgdat && node;
- pgdat = next_online_pgdat(pgdat))
- --node;
-
- return pgdat;
-}
-
-static void *frag_next(struct seq_file *m, void *arg, loff_t *pos)
-{
- pg_data_t *pgdat = (pg_data_t *)arg;
-
- (*pos)++;
- return next_online_pgdat(pgdat);
-}
-
-static void frag_stop(struct seq_file *m, void *arg)
-{
-}
-
-/*
- * This walks the free areas for each zone.
- */
-static int frag_show(struct seq_file *m, void *arg)
-{
- pg_data_t *pgdat = (pg_data_t *)arg;
- struct zone *zone;
- struct zone *node_zones = pgdat->node_zones;
- unsigned long flags;
- int order;
-
- for (zone = node_zones; zone - node_zones < MAX_NR_ZONES; ++zone) {
- if (!populated_zone(zone))
- continue;
-
- spin_lock_irqsave(&zone->lock, flags);
- seq_printf(m, "Node %d, zone %8s ", pgdat->node_id, zone->name);
- for (order = 0; order < MAX_ORDER; ++order)
- seq_printf(m, "%6lu ", zone->free_area[order].nr_free);
- spin_unlock_irqrestore(&zone->lock, flags);
- seq_putc(m, '\n');
- }
- return 0;
-}
-
-struct seq_operations fragmentation_op = {
- .start = frag_start,
- .next = frag_next,
- .stop = frag_stop,
- .show = frag_show,
-};
-
-/*
- * Output information about zones in @pgdat.
- */
-static int zoneinfo_show(struct seq_file *m, void *arg)
-{
- pg_data_t *pgdat = arg;
- struct zone *zone;
- struct zone *node_zones = pgdat->node_zones;
- unsigned long flags;
-
- for (zone = node_zones; zone - node_zones < MAX_NR_ZONES; zone++) {
- int i;
-
- if (!populated_zone(zone))
- continue;
-
- spin_lock_irqsave(&zone->lock, flags);
- seq_printf(m, "Node %d, zone %8s", pgdat->node_id, zone->name);
- seq_printf(m,
- "\n pages free %lu"
- "\n min %lu"
- "\n low %lu"
- "\n high %lu"
- "\n active %lu"
- "\n inactive %lu"
- "\n scanned %lu (a: %lu i: %lu)"
- "\n spanned %lu"
- "\n present %lu",
- zone->free_pages,
- zone->pages_min,
- zone->pages_low,
- zone->pages_high,
- zone->nr_active,
- zone->nr_inactive,
- zone->pages_scanned,
- zone->nr_scan_active, zone->nr_scan_inactive,
- zone->spanned_pages,
- zone->present_pages);
- seq_printf(m,
- "\n protection: (%lu",
- zone->lowmem_reserve[0]);
- for (i = 1; i < ARRAY_SIZE(zone->lowmem_reserve); i++)
- seq_printf(m, ", %lu", zone->lowmem_reserve[i]);
- seq_printf(m,
- ")"
- "\n pagesets");
- for_each_online_cpu(i) {
- struct per_cpu_pageset *pageset;
- int j;
-
- pageset = zone_pcp(zone, i);
- for (j = 0; j < ARRAY_SIZE(pageset->pcp); j++) {
- if (pageset->pcp[j].count)
- break;
- }
- if (j == ARRAY_SIZE(pageset->pcp))
- continue;
- for (j = 0; j < ARRAY_SIZE(pageset->pcp); j++) {
- seq_printf(m,
- "\n cpu: %i pcp: %i"
- "\n count: %i"
- "\n high: %i"
- "\n batch: %i",
- i, j,
- pageset->pcp[j].count,
- pageset->pcp[j].high,
- pageset->pcp[j].batch);
- }
-#ifdef CONFIG_NUMA
- seq_printf(m,
- "\n numa_hit: %lu"
- "\n numa_miss: %lu"
- "\n numa_foreign: %lu"
- "\n interleave_hit: %lu"
- "\n local_node: %lu"
- "\n other_node: %lu",
- pageset->numa_hit,
- pageset->numa_miss,
- pageset->numa_foreign,
- pageset->interleave_hit,
- pageset->local_node,
- pageset->other_node);
-#endif
- }
- seq_printf(m,
- "\n all_unreclaimable: %u"
- "\n prev_priority: %i"
- "\n temp_priority: %i"
- "\n start_pfn: %lu",
- zone->all_unreclaimable,
- zone->prev_priority,
- zone->temp_priority,
- zone->zone_start_pfn);
- spin_unlock_irqrestore(&zone->lock, flags);
- seq_putc(m, '\n');
- }
- return 0;
-}
-
-struct seq_operations zoneinfo_op = {
- .start = frag_start, /* iterate over all zones. The same as in
- * fragmentation. */
- .next = frag_next,
- .stop = frag_stop,
- .show = zoneinfo_show,
-};
-
-static char *vmstat_text[] = {
- "nr_dirty",
- "nr_writeback",
- "nr_unstable",
- "nr_page_table_pages",
- "nr_mapped",
- "nr_slab",
-
- "pgpgin",
- "pgpgout",
- "pswpin",
- "pswpout",
-
- "pgalloc_high",
- "pgalloc_normal",
- "pgalloc_dma32",
- "pgalloc_dma",
-
- "pgfree",
- "pgactivate",
- "pgdeactivate",
-
- "pgfault",
- "pgmajfault",
-
- "pgrefill_high",
- "pgrefill_normal",
- "pgrefill_dma32",
- "pgrefill_dma",
-
- "pgsteal_high",
- "pgsteal_normal",
- "pgsteal_dma32",
- "pgsteal_dma",
-
- "pgscan_kswapd_high",
- "pgscan_kswapd_normal",
- "pgscan_kswapd_dma32",
- "pgscan_kswapd_dma",
-
- "pgscan_direct_high",
- "pgscan_direct_normal",
- "pgscan_direct_dma32",
- "pgscan_direct_dma",
-
- "pginodesteal",
- "slabs_scanned",
- "kswapd_steal",
- "kswapd_inodesteal",
- "pageoutrun",
- "allocstall",
-
- "pgrotated",
- "nr_bounce",
-};
-
-static void *vmstat_start(struct seq_file *m, loff_t *pos)
-{
- struct page_state *ps;
-
- if (*pos >= ARRAY_SIZE(vmstat_text))
- return NULL;
-
- ps = kmalloc(sizeof(*ps), GFP_KERNEL);
- m->private = ps;
- if (!ps)
- return ERR_PTR(-ENOMEM);
- get_full_page_state(ps);
- ps->pgpgin /= 2; /* sectors -> kbytes */
- ps->pgpgout /= 2;
- return (unsigned long *)ps + *pos;
-}
-
-static void *vmstat_next(struct seq_file *m, void *arg, loff_t *pos)
-{
- (*pos)++;
- if (*pos >= ARRAY_SIZE(vmstat_text))
- return NULL;
- return (unsigned long *)m->private + *pos;
-}
-
-static int vmstat_show(struct seq_file *m, void *arg)
-{
- unsigned long *l = arg;
- unsigned long off = l - (unsigned long *)m->private;
-
- seq_printf(m, "%s %lu\n", vmstat_text[off], *l);
- return 0;
-}
-
-static void vmstat_stop(struct seq_file *m, void *arg)
-{
- kfree(m->private);
- m->private = NULL;
-}
-
-struct seq_operations vmstat_op = {
- .start = vmstat_start,
- .next = vmstat_next,
- .stop = vmstat_stop,
- .show = vmstat_show,
-};
-
-#endif /* CONFIG_PROC_FS */
-
#ifdef CONFIG_HOTPLUG_CPU
static int page_alloc_cpu_notify(struct notifier_block *self,
unsigned long action, void *hcpu)
{
int cpu = (unsigned long)hcpu;
- long *count;
- unsigned long *src, *dest;
if (action == CPU_DEAD) {
- int i;
-
- /* Drain local pagecache count. */
- count = &per_cpu(nr_pagecache_local, cpu);
- atomic_add(*count, &nr_pagecache);
- *count = 0;
local_irq_disable();
__drain_pages(cpu);
-
- /* Add dead cpu's page_states to our own. */
- dest = (unsigned long *)&__get_cpu_var(page_states);
- src = (unsigned long *)&per_cpu(page_states, cpu);
-
- for (i = 0; i < sizeof(struct page_state)/sizeof(unsigned long);
- i++) {
- dest[i] += src[i];
- src[i] = 0;
- }
-
+ vm_events_fold_cpu(cpu);
local_irq_enable();
+ refresh_cpu_vm_stats(cpu);
}
return NOTIFY_OK;
}
}
if (wbc->sync_mode == WB_SYNC_ALL)
rw |= (1 << BIO_RW_SYNC);
- inc_page_state(pswpout);
+ count_vm_event(PSWPOUT);
set_page_writeback(page);
unlock_page(page);
submit_bio(rw, bio);
ret = -ENOMEM;
goto out;
}
- inc_page_state(pswpin);
+ count_vm_event(PSWPIN);
submit_bio(READ, bio);
out:
return ret;
* nr_mapped state can be updated without turning off
* interrupts because it is not modified via interrupt.
*/
- __inc_page_state(nr_mapped);
+ __inc_zone_page_state(page, NR_ANON_PAGES);
}
/**
void page_add_file_rmap(struct page *page)
{
if (atomic_inc_and_test(&page->_mapcount))
- __inc_page_state(nr_mapped);
+ __inc_zone_page_state(page, NR_FILE_MAPPED);
}
/**
*/
if (page_test_and_clear_dirty(page))
set_page_dirty(page);
- __dec_page_state(nr_mapped);
+ __dec_zone_page_state(page,
+ PageAnon(page) ? NR_ANON_PAGES : NR_FILE_MAPPED);
}
}
swappage = lookup_swap_cache(swap);
if (!swappage) {
shmem_swp_unmap(entry);
- spin_unlock(&info->lock);
/* here we actually do the io */
if (type && *type == VM_FAULT_MINOR) {
- inc_page_state(pgmajfault);
+ __count_vm_event(PGMAJFAULT);
*type = VM_FAULT_MAJOR;
}
+ spin_unlock(&info->lock);
swappage = shmem_swapin(info, swap, idx);
if (!swappage) {
spin_lock(&info->lock);
#define SIZE_AC 1
#define SIZE_L3 (1 + MAX_NUMNODES)
+static int drain_freelist(struct kmem_cache *cache,
+ struct kmem_list3 *l3, int tofree);
+static void free_block(struct kmem_cache *cachep, void **objpp, int len,
+ int node);
+static void enable_cpucache(struct kmem_cache *cachep);
+static void cache_reap(void *unused);
+
/*
* This function must be completely optimized away if a constant is passed to
* it. Mostly the same as what is in linux/slab.h except it returns an index.
#define STATS_DEC_ACTIVE(x) ((x)->num_active--)
#define STATS_INC_ALLOCED(x) ((x)->num_allocations++)
#define STATS_INC_GROWN(x) ((x)->grown++)
-#define STATS_INC_REAPED(x) ((x)->reaped++)
+#define STATS_ADD_REAPED(x,y) ((x)->reaped += (y))
#define STATS_SET_HIGH(x) \
do { \
if ((x)->num_active > (x)->high_mark) \
#define STATS_DEC_ACTIVE(x) do { } while (0)
#define STATS_INC_ALLOCED(x) do { } while (0)
#define STATS_INC_GROWN(x) do { } while (0)
-#define STATS_INC_REAPED(x) do { } while (0)
+#define STATS_ADD_REAPED(x,y) do { } while (0)
#define STATS_SET_HIGH(x) do { } while (0)
#define STATS_INC_ERR(x) do { } while (0)
#define STATS_INC_NODEALLOCS(x) do { } while (0)
static DEFINE_PER_CPU(struct work_struct, reap_work);
-static void free_block(struct kmem_cache *cachep, void **objpp, int len,
- int node);
-static void enable_cpucache(struct kmem_cache *cachep);
-static void cache_reap(void *unused);
-static int __node_shrink(struct kmem_cache *cachep, int node);
-
static inline struct array_cache *cpu_cache_get(struct kmem_cache *cachep)
{
return cachep->array[smp_processor_id()];
l3 = cachep->nodelists[node];
if (!l3)
continue;
- spin_lock_irq(&l3->list_lock);
- /* free slabs belonging to this node */
- __node_shrink(cachep, node);
- spin_unlock_irq(&l3->list_lock);
+ drain_freelist(cachep, l3, l3->free_objects);
}
mutex_unlock(&cache_chain_mutex);
break;
nr_pages = (1 << cachep->gfporder);
if (cachep->flags & SLAB_RECLAIM_ACCOUNT)
atomic_add(nr_pages, &slab_reclaim_pages);
- add_page_state(nr_slab, nr_pages);
+ add_zone_page_state(page_zone(page), NR_SLAB, nr_pages);
for (i = 0; i < nr_pages; i++)
__SetPageSlab(page + i);
return page_address(page);
struct page *page = virt_to_page(addr);
const unsigned long nr_freed = i;
+ sub_zone_page_state(page_zone(page), NR_SLAB, nr_freed);
while (i--) {
BUG_ON(!PageSlab(page));
__ClearPageSlab(page);
page++;
}
- sub_page_state(nr_slab, nr_freed);
if (current->reclaim_state)
current->reclaim_state->reclaimed_slab += nr_freed;
free_pages((unsigned long)addr, cachep->gfporder);
}
}
-static int __node_shrink(struct kmem_cache *cachep, int node)
+/*
+ * Remove slabs from the list of free slabs.
+ * Specify the number of slabs to drain in tofree.
+ *
+ * Returns the actual number of slabs released.
+ */
+static int drain_freelist(struct kmem_cache *cache,
+ struct kmem_list3 *l3, int tofree)
{
+ struct list_head *p;
+ int nr_freed;
struct slab *slabp;
- struct kmem_list3 *l3 = cachep->nodelists[node];
- int ret;
- for (;;) {
- struct list_head *p;
+ nr_freed = 0;
+ while (nr_freed < tofree && !list_empty(&l3->slabs_free)) {
+ spin_lock_irq(&l3->list_lock);
p = l3->slabs_free.prev;
- if (p == &l3->slabs_free)
- break;
+ if (p == &l3->slabs_free) {
+ spin_unlock_irq(&l3->list_lock);
+ goto out;
+ }
- slabp = list_entry(l3->slabs_free.prev, struct slab, list);
+ slabp = list_entry(p, struct slab, list);
#if DEBUG
BUG_ON(slabp->inuse);
#endif
list_del(&slabp->list);
-
- l3->free_objects -= cachep->num;
+ /*
+ * Safe to drop the lock. The slab is no longer linked
+ * to the cache.
+ */
+ l3->free_objects -= cache->num;
spin_unlock_irq(&l3->list_lock);
- slab_destroy(cachep, slabp);
- spin_lock_irq(&l3->list_lock);
+ slab_destroy(cache, slabp);
+ nr_freed++;
}
- ret = !list_empty(&l3->slabs_full) || !list_empty(&l3->slabs_partial);
- return ret;
+out:
+ return nr_freed;
}
static int __cache_shrink(struct kmem_cache *cachep)
check_irq_on();
for_each_online_node(i) {
l3 = cachep->nodelists[i];
- if (l3) {
- spin_lock_irq(&l3->list_lock);
- ret += __node_shrink(cachep, i);
- spin_unlock_irq(&l3->list_lock);
- }
+ if (!l3)
+ continue;
+
+ drain_freelist(cachep, l3, l3->free_objects);
+
+ ret += !list_empty(&l3->slabs_full) ||
+ !list_empty(&l3->slabs_partial);
}
return (ret ? 1 : 0);
}
}
list_for_each_entry(searchp, &cache_chain, next) {
- struct list_head *p;
- int tofree;
- struct slab *slabp;
-
check_irq_on();
/*
drain_array(searchp, l3, l3->shared, 0, node);
- if (l3->free_touched) {
+ if (l3->free_touched)
l3->free_touched = 0;
- goto next;
- }
-
- tofree = (l3->free_limit + 5 * searchp->num - 1) /
- (5 * searchp->num);
- do {
- /*
- * Do not lock if there are no free blocks.
- */
- if (list_empty(&l3->slabs_free))
- break;
-
- spin_lock_irq(&l3->list_lock);
- p = l3->slabs_free.next;
- if (p == &(l3->slabs_free)) {
- spin_unlock_irq(&l3->list_lock);
- break;
- }
+ else {
+ int freed;
- slabp = list_entry(p, struct slab, list);
- BUG_ON(slabp->inuse);
- list_del(&slabp->list);
- STATS_INC_REAPED(searchp);
-
- /*
- * Safe to drop the lock. The slab is no longer linked
- * to the cache. searchp cannot disappear, we hold
- * cache_chain_lock
- */
- l3->free_objects -= searchp->num;
- spin_unlock_irq(&l3->list_lock);
- slab_destroy(searchp, slabp);
- } while (--tofree > 0);
+ freed = drain_freelist(searchp, l3, (l3->free_limit +
+ 5 * searchp->num - 1) / (5 * searchp->num));
+ STATS_ADD_REAPED(searchp, freed);
+ }
next:
cond_resched();
}
check_irq_on();
mutex_unlock(&cache_chain_mutex);
next_reap_node();
+ refresh_cpu_vm_stats(smp_processor_id());
/* Set up the next iteration */
schedule_delayed_work(&__get_cpu_var(reap_work), REAPTIMEOUT_CPUC);
}
spin_lock_irqsave(&zone->lru_lock, flags);
if (PageLRU(page) && !PageActive(page)) {
list_move_tail(&page->lru, &zone->inactive_list);
- inc_page_state(pgrotated);
+ __count_vm_event(PGROTATED);
}
if (!test_clear_page_writeback(page))
BUG();
del_page_from_inactive_list(zone, page);
SetPageActive(page);
add_page_to_active_list(zone, page);
- inc_page_state(pgactivate);
+ __count_vm_event(PGACTIVATE);
}
spin_unlock_irq(&zone->lru_lock);
}
SetPageSwapCache(page);
set_page_private(page, entry.val);
total_swapcache_pages++;
- pagecache_acct(1);
+ __inc_zone_page_state(page, NR_FILE_PAGES);
}
write_unlock_irq(&swapper_space.tree_lock);
radix_tree_preload_end();
set_page_private(page, 0);
ClearPageSwapCache(page);
total_swapcache_pages--;
- pagecache_acct(-1);
+ __dec_zone_page_state(page, NR_FILE_PAGES);
INC_CACHE_INFO(del_total);
}
/* Incremented by the number of inactive pages that were scanned */
unsigned long nr_scanned;
- unsigned long nr_mapped; /* From page_state */
-
/* This context's GFP mask */
gfp_t gfp_mask;
break;
if (shrink_ret < nr_before)
ret += nr_before - shrink_ret;
- mod_page_state(slabs_scanned, this_scan);
+ count_vm_events(SLABS_SCANNED, this_scan);
total_scan -= this_scan;
cond_resched();
list_splice(&ret_pages, page_list);
if (pagevec_count(&freed_pvec))
__pagevec_release_nonlru(&freed_pvec);
- mod_page_state(pgactivate, pgactivate);
+ count_vm_events(PGACTIVATE, pgactivate);
return nr_reclaimed;
}
nr_reclaimed += nr_freed;
local_irq_disable();
if (current_is_kswapd()) {
- __mod_page_state_zone(zone, pgscan_kswapd, nr_scan);
- __mod_page_state(kswapd_steal, nr_freed);
+ __count_zone_vm_events(PGSCAN_KSWAPD, zone, nr_scan);
+ __count_vm_events(KSWAPD_STEAL, nr_freed);
} else
- __mod_page_state_zone(zone, pgscan_direct, nr_scan);
- __mod_page_state_zone(zone, pgsteal, nr_freed);
+ __count_zone_vm_events(PGSCAN_DIRECT, zone, nr_scan);
+ __count_vm_events(PGACTIVATE, nr_freed);
if (nr_taken == 0)
goto done;
* how much memory
* is mapped.
*/
- mapped_ratio = (sc->nr_mapped * 100) / vm_total_pages;
+ mapped_ratio = ((global_page_state(NR_FILE_MAPPED) +
+ global_page_state(NR_ANON_PAGES)) * 100) /
+ vm_total_pages;
/*
* Now decide how much we really want to unmap some pages. The
}
}
zone->nr_active += pgmoved;
- spin_unlock(&zone->lru_lock);
- __mod_page_state_zone(zone, pgrefill, pgscanned);
- __mod_page_state(pgdeactivate, pgdeactivate);
- local_irq_enable();
+ __count_zone_vm_events(PGREFILL, zone, pgscanned);
+ __count_vm_events(PGDEACTIVATE, pgdeactivate);
+ spin_unlock_irq(&zone->lru_lock);
pagevec_release(&pvec);
}
.swappiness = vm_swappiness,
};
- inc_page_state(allocstall);
+ count_vm_event(ALLOCSTALL);
for (i = 0; zones[i] != NULL; i++) {
struct zone *zone = zones[i];
}
for (priority = DEF_PRIORITY; priority >= 0; priority--) {
- sc.nr_mapped = read_page_state(nr_mapped);
sc.nr_scanned = 0;
if (!priority)
disable_swap_token();
total_scanned = 0;
nr_reclaimed = 0;
sc.may_writepage = !laptop_mode;
- sc.nr_mapped = read_page_state(nr_mapped);
-
- inc_page_state(pageoutrun);
+ count_vm_event(PAGEOUTRUN);
for (i = 0; i < pgdat->nr_zones; i++) {
struct zone *zone = pgdat->node_zones + i;
for_each_zone(zone)
lru_pages += zone->nr_active + zone->nr_inactive;
- nr_slab = read_page_state(nr_slab);
+ nr_slab = global_page_state(NR_SLAB);
/* If slab caches are huge, it's better to hit them first */
while (nr_slab >= lru_pages) {
reclaim_state.reclaimed_slab = 0;
for (prio = DEF_PRIORITY; prio >= 0; prio--) {
unsigned long nr_to_scan = nr_pages - ret;
- sc.nr_mapped = read_page_state(nr_mapped);
sc.nr_scanned = 0;
-
ret += shrink_all_zones(nr_to_scan, prio, pass, &sc);
if (ret >= nr_pages)
goto out;
#define RECLAIM_SWAP (1<<2) /* Swap pages out during reclaim */
#define RECLAIM_SLAB (1<<3) /* Do a global slab shrink if the zone is out of memory */
-/*
- * Mininum time between zone reclaim scans
- */
-int zone_reclaim_interval __read_mostly = 30*HZ;
-
/*
* Priority for ZONE_RECLAIM. This determines the fraction of pages
* of a node considered for each zone_reclaim. 4 scans 1/16th of
struct scan_control sc = {
.may_writepage = !!(zone_reclaim_mode & RECLAIM_WRITE),
.may_swap = !!(zone_reclaim_mode & RECLAIM_SWAP),
- .nr_mapped = read_page_state(nr_mapped),
.swap_cluster_max = max_t(unsigned long, nr_pages,
SWAP_CLUSTER_MAX),
.gfp_mask = gfp_mask,
p->reclaim_state = NULL;
current->flags &= ~(PF_MEMALLOC | PF_SWAPWRITE);
-
- if (nr_reclaimed == 0) {
- /*
- * We were unable to reclaim enough pages to stay on node. We
- * now allow off node accesses for a certain time period before
- * trying again to reclaim pages from the local zone.
- */
- zone->last_unsuccessful_zone_reclaim = jiffies;
- }
-
return nr_reclaimed >= nr_pages;
}
int node_id;
/*
- * Do not reclaim if there was a recent unsuccessful attempt at zone
- * reclaim. In that case we let allocations go off node for the
- * zone_reclaim_interval. Otherwise we would scan for each off-node
- * page allocation.
+ * Do not reclaim if there are not enough reclaimable pages in this
+ * zone that would satify this allocations.
+ *
+ * All unmapped pagecache pages are reclaimable.
+ *
+ * Both counters may be temporarily off a bit so we use
+ * SWAP_CLUSTER_MAX as the boundary. It may also be good to
+ * leave a few frequently used unmapped pagecache pages around.
*/
- if (time_before(jiffies,
- zone->last_unsuccessful_zone_reclaim + zone_reclaim_interval))
+ if (zone_page_state(zone, NR_FILE_PAGES) -
+ zone_page_state(zone, NR_FILE_MAPPED) < SWAP_CLUSTER_MAX)
return 0;
/*
--- /dev/null
+/*
+ * linux/mm/vmstat.c
+ *
+ * Manages VM statistics
+ * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
+ *
+ * zoned VM statistics
+ * Copyright (C) 2006 Silicon Graphics, Inc.,
+ * Christoph Lameter <christoph@lameter.com>
+ */
+
+#include <linux/config.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+
+void __get_zone_counts(unsigned long *active, unsigned long *inactive,
+ unsigned long *free, struct pglist_data *pgdat)
+{
+ struct zone *zones = pgdat->node_zones;
+ int i;
+
+ *active = 0;
+ *inactive = 0;
+ *free = 0;
+ for (i = 0; i < MAX_NR_ZONES; i++) {
+ *active += zones[i].nr_active;
+ *inactive += zones[i].nr_inactive;
+ *free += zones[i].free_pages;
+ }
+}
+
+void get_zone_counts(unsigned long *active,
+ unsigned long *inactive, unsigned long *free)
+{
+ struct pglist_data *pgdat;
+
+ *active = 0;
+ *inactive = 0;
+ *free = 0;
+ for_each_online_pgdat(pgdat) {
+ unsigned long l, m, n;
+ __get_zone_counts(&l, &m, &n, pgdat);
+ *active += l;
+ *inactive += m;
+ *free += n;
+ }
+}
+
+#ifdef CONFIG_VM_EVENT_COUNTERS
+DEFINE_PER_CPU(struct vm_event_state, vm_event_states) = {{0}};
+EXPORT_PER_CPU_SYMBOL(vm_event_states);
+
+static void sum_vm_events(unsigned long *ret, cpumask_t *cpumask)
+{
+ int cpu = 0;
+ int i;
+
+ memset(ret, 0, NR_VM_EVENT_ITEMS * sizeof(unsigned long));
+
+ cpu = first_cpu(*cpumask);
+ while (cpu < NR_CPUS) {
+ struct vm_event_state *this = &per_cpu(vm_event_states, cpu);
+
+ cpu = next_cpu(cpu, *cpumask);
+
+ if (cpu < NR_CPUS)
+ prefetch(&per_cpu(vm_event_states, cpu));
+
+
+ for (i = 0; i < NR_VM_EVENT_ITEMS; i++)
+ ret[i] += this->event[i];
+ }
+}
+
+/*
+ * Accumulate the vm event counters across all CPUs.
+ * The result is unavoidably approximate - it can change
+ * during and after execution of this function.
+*/
+void all_vm_events(unsigned long *ret)
+{
+ sum_vm_events(ret, &cpu_online_map);
+}
+
+#ifdef CONFIG_HOTPLUG
+/*
+ * Fold the foreign cpu events into our own.
+ *
+ * This is adding to the events on one processor
+ * but keeps the global counts constant.
+ */
+void vm_events_fold_cpu(int cpu)
+{
+ struct vm_event_state *fold_state = &per_cpu(vm_event_states, cpu);
+ int i;
+
+ for (i = 0; i < NR_VM_EVENT_ITEMS; i++) {
+ count_vm_events(i, fold_state->event[i]);
+ fold_state->event[i] = 0;
+ }
+}
+#endif /* CONFIG_HOTPLUG */
+
+#endif /* CONFIG_VM_EVENT_COUNTERS */
+
+/*
+ * Manage combined zone based / global counters
+ *
+ * vm_stat contains the global counters
+ */
+atomic_long_t vm_stat[NR_VM_ZONE_STAT_ITEMS];
+EXPORT_SYMBOL(vm_stat);
+
+#ifdef CONFIG_SMP
+
+#define STAT_THRESHOLD 32
+
+/*
+ * Determine pointer to currently valid differential byte given a zone and
+ * the item number.
+ *
+ * Preemption must be off
+ */
+static inline s8 *diff_pointer(struct zone *zone, enum zone_stat_item item)
+{
+ return &zone_pcp(zone, smp_processor_id())->vm_stat_diff[item];
+}
+
+/*
+ * For use when we know that interrupts are disabled.
+ */
+void __mod_zone_page_state(struct zone *zone, enum zone_stat_item item,
+ int delta)
+{
+ s8 *p;
+ long x;
+
+ p = diff_pointer(zone, item);
+ x = delta + *p;
+
+ if (unlikely(x > STAT_THRESHOLD || x < -STAT_THRESHOLD)) {
+ zone_page_state_add(x, zone, item);
+ x = 0;
+ }
+
+ *p = x;
+}
+EXPORT_SYMBOL(__mod_zone_page_state);
+
+/*
+ * For an unknown interrupt state
+ */
+void mod_zone_page_state(struct zone *zone, enum zone_stat_item item,
+ int delta)
+{
+ unsigned long flags;
+
+ local_irq_save(flags);
+ __mod_zone_page_state(zone, item, delta);
+ local_irq_restore(flags);
+}
+EXPORT_SYMBOL(mod_zone_page_state);
+
+/*
+ * Optimized increment and decrement functions.
+ *
+ * These are only for a single page and therefore can take a struct page *
+ * argument instead of struct zone *. This allows the inclusion of the code
+ * generated for page_zone(page) into the optimized functions.
+ *
+ * No overflow check is necessary and therefore the differential can be
+ * incremented or decremented in place which may allow the compilers to
+ * generate better code.
+ *
+ * The increment or decrement is known and therefore one boundary check can
+ * be omitted.
+ *
+ * Some processors have inc/dec instructions that are atomic vs an interrupt.
+ * However, the code must first determine the differential location in a zone
+ * based on the processor number and then inc/dec the counter. There is no
+ * guarantee without disabling preemption that the processor will not change
+ * in between and therefore the atomicity vs. interrupt cannot be exploited
+ * in a useful way here.
+ */
+static void __inc_zone_state(struct zone *zone, enum zone_stat_item item)
+{
+ s8 *p = diff_pointer(zone, item);
+
+ (*p)++;
+
+ if (unlikely(*p > STAT_THRESHOLD)) {
+ zone_page_state_add(*p, zone, item);
+ *p = 0;
+ }
+}
+
+void __inc_zone_page_state(struct page *page, enum zone_stat_item item)
+{
+ __inc_zone_state(page_zone(page), item);
+}
+EXPORT_SYMBOL(__inc_zone_page_state);
+
+void __dec_zone_page_state(struct page *page, enum zone_stat_item item)
+{
+ struct zone *zone = page_zone(page);
+ s8 *p = diff_pointer(zone, item);
+
+ (*p)--;
+
+ if (unlikely(*p < -STAT_THRESHOLD)) {
+ zone_page_state_add(*p, zone, item);
+ *p = 0;
+ }
+}
+EXPORT_SYMBOL(__dec_zone_page_state);
+
+void inc_zone_state(struct zone *zone, enum zone_stat_item item)
+{
+ unsigned long flags;
+
+ local_irq_save(flags);
+ __inc_zone_state(zone, item);
+ local_irq_restore(flags);
+}
+
+void inc_zone_page_state(struct page *page, enum zone_stat_item item)
+{
+ unsigned long flags;
+ struct zone *zone;
+
+ zone = page_zone(page);
+ local_irq_save(flags);
+ __inc_zone_state(zone, item);
+ local_irq_restore(flags);
+}
+EXPORT_SYMBOL(inc_zone_page_state);
+
+void dec_zone_page_state(struct page *page, enum zone_stat_item item)
+{
+ unsigned long flags;
+ struct zone *zone;
+ s8 *p;
+
+ zone = page_zone(page);
+ local_irq_save(flags);
+ p = diff_pointer(zone, item);
+
+ (*p)--;
+
+ if (unlikely(*p < -STAT_THRESHOLD)) {
+ zone_page_state_add(*p, zone, item);
+ *p = 0;
+ }
+ local_irq_restore(flags);
+}
+EXPORT_SYMBOL(dec_zone_page_state);
+
+/*
+ * Update the zone counters for one cpu.
+ */
+void refresh_cpu_vm_stats(int cpu)
+{
+ struct zone *zone;
+ int i;
+ unsigned long flags;
+
+ for_each_zone(zone) {
+ struct per_cpu_pageset *pcp;
+
+ pcp = zone_pcp(zone, cpu);
+
+ for (i = 0; i < NR_VM_ZONE_STAT_ITEMS; i++)
+ if (pcp->vm_stat_diff[i]) {
+ local_irq_save(flags);
+ zone_page_state_add(pcp->vm_stat_diff[i],
+ zone, i);
+ pcp->vm_stat_diff[i] = 0;
+ local_irq_restore(flags);
+ }
+ }
+}
+
+static void __refresh_cpu_vm_stats(void *dummy)
+{
+ refresh_cpu_vm_stats(smp_processor_id());
+}
+
+/*
+ * Consolidate all counters.
+ *
+ * Note that the result is less inaccurate but still inaccurate
+ * if concurrent processes are allowed to run.
+ */
+void refresh_vm_stats(void)
+{
+ on_each_cpu(__refresh_cpu_vm_stats, NULL, 0, 1);
+}
+EXPORT_SYMBOL(refresh_vm_stats);
+
+#endif
+
+#ifdef CONFIG_NUMA
+/*
+ * zonelist = the list of zones passed to the allocator
+ * z = the zone from which the allocation occurred.
+ *
+ * Must be called with interrupts disabled.
+ */
+void zone_statistics(struct zonelist *zonelist, struct zone *z)
+{
+ if (z->zone_pgdat == zonelist->zones[0]->zone_pgdat) {
+ __inc_zone_state(z, NUMA_HIT);
+ } else {
+ __inc_zone_state(z, NUMA_MISS);
+ __inc_zone_state(zonelist->zones[0], NUMA_FOREIGN);
+ }
+ if (z->zone_pgdat == NODE_DATA(numa_node_id()))
+ __inc_zone_state(z, NUMA_LOCAL);
+ else
+ __inc_zone_state(z, NUMA_OTHER);
+}
+#endif
+
+#ifdef CONFIG_PROC_FS
+
+#include <linux/seq_file.h>
+
+static void *frag_start(struct seq_file *m, loff_t *pos)
+{
+ pg_data_t *pgdat;
+ loff_t node = *pos;
+ for (pgdat = first_online_pgdat();
+ pgdat && node;
+ pgdat = next_online_pgdat(pgdat))
+ --node;
+
+ return pgdat;
+}
+
+static void *frag_next(struct seq_file *m, void *arg, loff_t *pos)
+{
+ pg_data_t *pgdat = (pg_data_t *)arg;
+
+ (*pos)++;
+ return next_online_pgdat(pgdat);
+}
+
+static void frag_stop(struct seq_file *m, void *arg)
+{
+}
+
+/*
+ * This walks the free areas for each zone.
+ */
+static int frag_show(struct seq_file *m, void *arg)
+{
+ pg_data_t *pgdat = (pg_data_t *)arg;
+ struct zone *zone;
+ struct zone *node_zones = pgdat->node_zones;
+ unsigned long flags;
+ int order;
+
+ for (zone = node_zones; zone - node_zones < MAX_NR_ZONES; ++zone) {
+ if (!populated_zone(zone))
+ continue;
+
+ spin_lock_irqsave(&zone->lock, flags);
+ seq_printf(m, "Node %d, zone %8s ", pgdat->node_id, zone->name);
+ for (order = 0; order < MAX_ORDER; ++order)
+ seq_printf(m, "%6lu ", zone->free_area[order].nr_free);
+ spin_unlock_irqrestore(&zone->lock, flags);
+ seq_putc(m, '\n');
+ }
+ return 0;
+}
+
+struct seq_operations fragmentation_op = {
+ .start = frag_start,
+ .next = frag_next,
+ .stop = frag_stop,
+ .show = frag_show,
+};
+
+static char *vmstat_text[] = {
+ /* Zoned VM counters */
+ "nr_anon_pages",
+ "nr_mapped",
+ "nr_file_pages",
+ "nr_slab",
+ "nr_page_table_pages",
+ "nr_dirty",
+ "nr_writeback",
+ "nr_unstable",
+ "nr_bounce",
+
+#ifdef CONFIG_NUMA
+ "numa_hit",
+ "numa_miss",
+ "numa_foreign",
+ "numa_interleave",
+ "numa_local",
+ "numa_other",
+#endif
+
+#ifdef CONFIG_VM_EVENT_COUNTERS
+ "pgpgin",
+ "pgpgout",
+ "pswpin",
+ "pswpout",
+
+ "pgalloc_dma",
+ "pgalloc_dma32",
+ "pgalloc_normal",
+ "pgalloc_high",
+
+ "pgfree",
+ "pgactivate",
+ "pgdeactivate",
+
+ "pgfault",
+ "pgmajfault",
+
+ "pgrefill_dma",
+ "pgrefill_dma32",
+ "pgrefill_normal",
+ "pgrefill_high",
+
+ "pgsteal_dma",
+ "pgsteal_dma32",
+ "pgsteal_normal",
+ "pgsteal_high",
+
+ "pgscan_kswapd_dma",
+ "pgscan_kswapd_dma32",
+ "pgscan_kswapd_normal",
+ "pgscan_kswapd_high",
+
+ "pgscan_direct_dma",
+ "pgscan_direct_dma32",
+ "pgscan_direct_normal",
+ "pgscan_direct_high",
+
+ "pginodesteal",
+ "slabs_scanned",
+ "kswapd_steal",
+ "kswapd_inodesteal",
+ "pageoutrun",
+ "allocstall",
+
+ "pgrotated",
+#endif
+};
+
+/*
+ * Output information about zones in @pgdat.
+ */
+static int zoneinfo_show(struct seq_file *m, void *arg)
+{
+ pg_data_t *pgdat = arg;
+ struct zone *zone;
+ struct zone *node_zones = pgdat->node_zones;
+ unsigned long flags;
+
+ for (zone = node_zones; zone - node_zones < MAX_NR_ZONES; zone++) {
+ int i;
+
+ if (!populated_zone(zone))
+ continue;
+
+ spin_lock_irqsave(&zone->lock, flags);
+ seq_printf(m, "Node %d, zone %8s", pgdat->node_id, zone->name);
+ seq_printf(m,
+ "\n pages free %lu"
+ "\n min %lu"
+ "\n low %lu"
+ "\n high %lu"
+ "\n active %lu"
+ "\n inactive %lu"
+ "\n scanned %lu (a: %lu i: %lu)"
+ "\n spanned %lu"
+ "\n present %lu",
+ zone->free_pages,
+ zone->pages_min,
+ zone->pages_low,
+ zone->pages_high,
+ zone->nr_active,
+ zone->nr_inactive,
+ zone->pages_scanned,
+ zone->nr_scan_active, zone->nr_scan_inactive,
+ zone->spanned_pages,
+ zone->present_pages);
+
+ for (i = 0; i < NR_VM_ZONE_STAT_ITEMS; i++)
+ seq_printf(m, "\n %-12s %lu", vmstat_text[i],
+ zone_page_state(zone, i));
+
+ seq_printf(m,
+ "\n protection: (%lu",
+ zone->lowmem_reserve[0]);
+ for (i = 1; i < ARRAY_SIZE(zone->lowmem_reserve); i++)
+ seq_printf(m, ", %lu", zone->lowmem_reserve[i]);
+ seq_printf(m,
+ ")"
+ "\n pagesets");
+ for_each_online_cpu(i) {
+ struct per_cpu_pageset *pageset;
+ int j;
+
+ pageset = zone_pcp(zone, i);
+ for (j = 0; j < ARRAY_SIZE(pageset->pcp); j++) {
+ if (pageset->pcp[j].count)
+ break;
+ }
+ if (j == ARRAY_SIZE(pageset->pcp))
+ continue;
+ for (j = 0; j < ARRAY_SIZE(pageset->pcp); j++) {
+ seq_printf(m,
+ "\n cpu: %i pcp: %i"
+ "\n count: %i"
+ "\n high: %i"
+ "\n batch: %i",
+ i, j,
+ pageset->pcp[j].count,
+ pageset->pcp[j].high,
+ pageset->pcp[j].batch);
+ }
+ }
+ seq_printf(m,
+ "\n all_unreclaimable: %u"
+ "\n prev_priority: %i"
+ "\n temp_priority: %i"
+ "\n start_pfn: %lu",
+ zone->all_unreclaimable,
+ zone->prev_priority,
+ zone->temp_priority,
+ zone->zone_start_pfn);
+ spin_unlock_irqrestore(&zone->lock, flags);
+ seq_putc(m, '\n');
+ }
+ return 0;
+}
+
+struct seq_operations zoneinfo_op = {
+ .start = frag_start, /* iterate over all zones. The same as in
+ * fragmentation. */
+ .next = frag_next,
+ .stop = frag_stop,
+ .show = zoneinfo_show,
+};
+
+static void *vmstat_start(struct seq_file *m, loff_t *pos)
+{
+ unsigned long *v;
+#ifdef CONFIG_VM_EVENT_COUNTERS
+ unsigned long *e;
+#endif
+ int i;
+
+ if (*pos >= ARRAY_SIZE(vmstat_text))
+ return NULL;
+
+#ifdef CONFIG_VM_EVENT_COUNTERS
+ v = kmalloc(NR_VM_ZONE_STAT_ITEMS * sizeof(unsigned long)
+ + sizeof(struct vm_event_state), GFP_KERNEL);
+#else
+ v = kmalloc(NR_VM_ZONE_STAT_ITEMS * sizeof(unsigned long),
+ GFP_KERNEL);
+#endif
+ m->private = v;
+ if (!v)
+ return ERR_PTR(-ENOMEM);
+ for (i = 0; i < NR_VM_ZONE_STAT_ITEMS; i++)
+ v[i] = global_page_state(i);
+#ifdef CONFIG_VM_EVENT_COUNTERS
+ e = v + NR_VM_ZONE_STAT_ITEMS;
+ all_vm_events(e);
+ e[PGPGIN] /= 2; /* sectors -> kbytes */
+ e[PGPGOUT] /= 2;
+#endif
+ return v + *pos;
+}
+
+static void *vmstat_next(struct seq_file *m, void *arg, loff_t *pos)
+{
+ (*pos)++;
+ if (*pos >= ARRAY_SIZE(vmstat_text))
+ return NULL;
+ return (unsigned long *)m->private + *pos;
+}
+
+static int vmstat_show(struct seq_file *m, void *arg)
+{
+ unsigned long *l = arg;
+ unsigned long off = l - (unsigned long *)m->private;
+
+ seq_printf(m, "%s %lu\n", vmstat_text[off], *l);
+ return 0;
+}
+
+static void vmstat_stop(struct seq_file *m, void *arg)
+{
+ kfree(m->private);
+ m->private = NULL;
+}
+
+struct seq_operations vmstat_op = {
+ .start = vmstat_start,
+ .next = vmstat_next,
+ .stop = vmstat_stop,
+ .show = vmstat_show,
+};
+
+#endif /* CONFIG_PROC_FS */
+
# Makefile for the ATM Protocol Families.
#
-atm-y := addr.o pvc.o signaling.o svc.o ioctl.o common.o atm_misc.o raw.o resources.o
+atm-y := addr.o pvc.o signaling.o svc.o ioctl.o common.o atm_misc.o raw.o resources.o atm_sysfs.o
mpoa-objs := mpc.o mpoa_caches.o mpoa_proc.o
obj-$(CONFIG_ATM) += atm.o
--- /dev/null
+/* ATM driver model support. */
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/kobject.h>
+#include <linux/atmdev.h>
+#include "common.h"
+#include "resources.h"
+
+#define to_atm_dev(cldev) container_of(cldev, struct atm_dev, class_dev)
+
+static ssize_t show_type(struct class_device *cdev, char *buf)
+{
+ struct atm_dev *adev = to_atm_dev(cdev);
+ return sprintf(buf, "%s\n", adev->type);
+}
+
+static ssize_t show_address(struct class_device *cdev, char *buf)
+{
+ char *pos = buf;
+ struct atm_dev *adev = to_atm_dev(cdev);
+ int i;
+
+ for (i = 0; i < (ESI_LEN - 1); i++)
+ pos += sprintf(pos, "%02x:", adev->esi[i]);
+ pos += sprintf(pos, "%02x\n", adev->esi[i]);
+
+ return pos - buf;
+}
+
+static ssize_t show_atmaddress(struct class_device *cdev, char *buf)
+{
+ unsigned long flags;
+ char *pos = buf;
+ struct atm_dev *adev = to_atm_dev(cdev);
+ struct atm_dev_addr *aaddr;
+ int bin[] = { 1, 2, 10, 6, 1 }, *fmt = bin;
+ int i, j;
+
+ spin_lock_irqsave(&adev->lock, flags);
+ list_for_each_entry(aaddr, &adev->local, entry) {
+ for(i = 0, j = 0; i < ATM_ESA_LEN; ++i, ++j) {
+ if (j == *fmt) {
+ pos += sprintf(pos, ".");
+ ++fmt;
+ j = 0;
+ }
+ pos += sprintf(pos, "%02x", aaddr->addr.sas_addr.prv[i]);
+ }
+ pos += sprintf(pos, "\n");
+ }
+ spin_unlock_irqrestore(&adev->lock, flags);
+
+ return pos - buf;
+}
+
+static ssize_t show_carrier(struct class_device *cdev, char *buf)
+{
+ char *pos = buf;
+ struct atm_dev *adev = to_atm_dev(cdev);
+
+ pos += sprintf(pos, "%d\n",
+ adev->signal == ATM_PHY_SIG_LOST ? 0 : 1);
+
+ return pos - buf;
+}
+
+static ssize_t show_link_rate(struct class_device *cdev, char *buf)
+{
+ char *pos = buf;
+ struct atm_dev *adev = to_atm_dev(cdev);
+ int link_rate;
+
+ /* show the link rate, not the data rate */
+ switch (adev->link_rate) {
+ case ATM_OC3_PCR:
+ link_rate = 155520000;
+ break;
+ case ATM_OC12_PCR:
+ link_rate = 622080000;
+ break;
+ case ATM_25_PCR:
+ link_rate = 25600000;
+ break;
+ default:
+ link_rate = adev->link_rate * 8 * 53;
+ }
+ pos += sprintf(pos, "%d\n", link_rate);
+
+ return pos - buf;
+}
+
+static CLASS_DEVICE_ATTR(address, S_IRUGO, show_address, NULL);
+static CLASS_DEVICE_ATTR(atmaddress, S_IRUGO, show_atmaddress, NULL);
+static CLASS_DEVICE_ATTR(carrier, S_IRUGO, show_carrier, NULL);
+static CLASS_DEVICE_ATTR(type, S_IRUGO, show_type, NULL);
+static CLASS_DEVICE_ATTR(link_rate, S_IRUGO, show_link_rate, NULL);
+
+static struct class_device_attribute *atm_attrs[] = {
+ &class_device_attr_atmaddress,
+ &class_device_attr_address,
+ &class_device_attr_carrier,
+ &class_device_attr_type,
+ &class_device_attr_link_rate,
+ NULL
+};
+
+static int atm_uevent(struct class_device *cdev, char **envp, int num_envp, char *buf, int size)
+{
+ struct atm_dev *adev;
+ int i = 0, len = 0;
+
+ if (!cdev)
+ return -ENODEV;
+
+ adev = to_atm_dev(cdev);
+ if (!adev)
+ return -ENODEV;
+
+ if (add_uevent_var(envp, num_envp, &i, buf, size, &len,
+ "NAME=%s%d", adev->type, adev->number))
+ return -ENOMEM;
+
+ envp[i] = NULL;
+ return 0;
+}
+
+static void atm_release(struct class_device *cdev)
+{
+ struct atm_dev *adev = to_atm_dev(cdev);
+
+ kfree(adev);
+}
+
+static struct class atm_class = {
+ .name = "atm",
+ .release = atm_release,
+ .uevent = atm_uevent,
+};
+
+int atm_register_sysfs(struct atm_dev *adev)
+{
+ struct class_device *cdev = &adev->class_dev;
+ int i, err;
+
+ cdev->class = &atm_class;
+ class_set_devdata(cdev, adev);
+
+ snprintf(cdev->class_id, BUS_ID_SIZE, "%s%d", adev->type, adev->number);
+ err = class_device_register(cdev);
+ if (err < 0)
+ return err;
+
+ for (i = 0; atm_attrs[i]; i++)
+ class_device_create_file(cdev, atm_attrs[i]);
+
+ return 0;
+}
+
+void atm_unregister_sysfs(struct atm_dev *adev)
+{
+ struct class_device *cdev = &adev->class_dev;
+
+ class_device_del(cdev);
+}
+
+int __init atm_sysfs_init(void)
+{
+ return class_register(&atm_class);
+}
+
+void __exit atm_sysfs_exit(void)
+{
+ class_unregister(&atm_class);
+}
printk(KERN_ERR "atm_proc_init() failed with %d\n",error);
goto out_atmsvc_exit;
}
+ if ((error = atm_sysfs_init()) < 0) {
+ printk(KERN_ERR "atm_sysfs_init() failed with %d\n",error);
+ goto out_atmproc_exit;
+ }
out:
return error;
+out_atmproc_exit:
+ atm_proc_exit();
out_atmsvc_exit:
atmsvc_exit();
out_atmpvc_exit:
static void __exit atm_exit(void)
{
atm_proc_exit();
+ atm_sysfs_exit();
atmsvc_exit();
atmpvc_exit();
proto_unregister(&vcc_proto);
void atmpvc_exit(void);
int atmsvc_init(void);
void atmsvc_exit(void);
+int atm_sysfs_init(void);
+void atm_sysfs_exit(void);
#ifdef CONFIG_PROC_FS
int atm_proc_init(void);
printk(KERN_ERR "atm_dev_register: "
"atm_proc_dev_register failed for dev %s\n",
type);
- mutex_unlock(&atm_dev_mutex);
- kfree(dev);
- return NULL;
+ goto out_fail;
+ }
+
+ if (atm_register_sysfs(dev) < 0) {
+ printk(KERN_ERR "atm_dev_register: "
+ "atm_register_sysfs failed for dev %s\n",
+ type);
+ atm_proc_dev_deregister(dev);
+ goto out_fail;
}
+
list_add_tail(&dev->dev_list, &atm_devs);
- mutex_unlock(&atm_dev_mutex);
+out:
+ mutex_unlock(&atm_dev_mutex);
return dev;
+
+out_fail:
+ kfree(dev);
+ dev = NULL;
+ goto out;
}
mutex_unlock(&atm_dev_mutex);
atm_dev_release_vccs(dev);
+ atm_unregister_sysfs(dev);
atm_proc_dev_deregister(dev);
atm_dev_put(dev);
#endif /* CONFIG_PROC_FS */
+int atm_register_sysfs(struct atm_dev *adev);
+void atm_unregister_sysfs(struct atm_dev *adev);
#endif
dev->set_mac_address = br_set_mac_address;
dev->priv_flags = IFF_EBRIDGE;
- dev->features = NETIF_F_SG | NETIF_F_FRAGLIST
- | NETIF_F_HIGHDMA | NETIF_F_TSO | NETIF_F_NO_CSUM;
+ dev->features = NETIF_F_SG | NETIF_F_FRAGLIST | NETIF_F_HIGHDMA |
+ NETIF_F_TSO | NETIF_F_NO_CSUM | NETIF_F_GSO_ROBUST;
}
features &= feature;
}
- br->dev->features = features | checksum | NETIF_F_LLTX;
+ br->dev->features = features | checksum | NETIF_F_LLTX |
+ NETIF_F_GSO_ROBUST;
}
/* called with RTNL */
/**
* skb_gso_segment - Perform segmentation on skb.
* @skb: buffer to segment
- * @sg: whether scatter-gather is supported on the target.
+ * @features: features for the output path (see dev->features)
*
* This function segments the given skb and returns a list of segments.
+ *
+ * It may return NULL if the skb requires no segmentation. This is
+ * only possible when GSO is used for verifying header integrity.
*/
-struct sk_buff *skb_gso_segment(struct sk_buff *skb, int sg)
+struct sk_buff *skb_gso_segment(struct sk_buff *skb, int features)
{
struct sk_buff *segs = ERR_PTR(-EPROTONOSUPPORT);
struct packet_type *ptype;
rcu_read_lock();
list_for_each_entry_rcu(ptype, &ptype_base[ntohs(type) & 15], list) {
if (ptype->type == type && !ptype->dev && ptype->gso_segment) {
- segs = ptype->gso_segment(skb, sg);
+ segs = ptype->gso_segment(skb, features);
break;
}
}
rcu_read_unlock();
+ __skb_push(skb, skb->data - skb->mac.raw);
+
return segs;
}
EXPORT_SYMBOL(netdev_rx_csum_fault);
#endif
-#ifdef CONFIG_HIGHMEM
/* Actually, we should eliminate this check as soon as we know, that:
* 1. IOMMU is present and allows to map all the memory.
* 2. No high memory really exists on this machine.
static inline int illegal_highdma(struct net_device *dev, struct sk_buff *skb)
{
+#ifdef CONFIG_HIGHMEM
int i;
if (dev->features & NETIF_F_HIGHDMA)
if (PageHighMem(skb_shinfo(skb)->frags[i].page))
return 1;
+#endif
return 0;
}
-#else
-#define illegal_highdma(dev, skb) (0)
-#endif
struct dev_gso_cb {
void (*destructor)(struct sk_buff *skb);
{
struct net_device *dev = skb->dev;
struct sk_buff *segs;
+ int features = dev->features & ~(illegal_highdma(dev, skb) ?
+ NETIF_F_SG : 0);
+
+ segs = skb_gso_segment(skb, features);
+
+ /* Verifying header integrity only. */
+ if (!segs)
+ return 0;
- segs = skb_gso_segment(skb, dev->features & NETIF_F_SG &&
- !illegal_highdma(dev, skb));
if (unlikely(IS_ERR(segs)))
return PTR_ERR(segs);
if (netdev_nit)
dev_queue_xmit_nit(skb, dev);
- if (!netif_needs_gso(dev, skb))
- return dev->hard_start_xmit(skb, dev);
+ if (netif_needs_gso(dev, skb)) {
+ if (unlikely(dev_gso_segment(skb)))
+ goto out_kfree_skb;
+ if (skb->next)
+ goto gso;
+ }
- if (unlikely(dev_gso_segment(skb)))
- goto out_kfree_skb;
+ return dev->hard_start_xmit(skb, dev);
}
+gso:
do {
struct sk_buff *nskb = skb->next;
int rc;
sz_idx = type>>2;
kind = type&3;
- if (kind != 2 && security_netlink_recv(skb)) {
+ if (kind != 2 && security_netlink_recv(skb, CAP_NET_ADMIN)) {
*errp = -EPERM;
return -1;
}
skb_get(list);
}
-void skb_release_data(struct sk_buff *skb)
+static void skb_release_data(struct sk_buff *skb)
{
if (!skb->cloned ||
!atomic_sub_return(skb->nohdr ? (1 << SKB_DATAREF_SHIFT) + 1 : 1,
/**
* skb_segment - Perform protocol segmentation on skb.
* @skb: buffer to segment
- * @sg: whether scatter-gather can be used for generated segments
+ * @features: features for the output path (see dev->features)
*
* This function performs segmentation on the given skb. It returns
* the segment at the given position. It returns NULL if there are
* no more segments to generate, or when an error is encountered.
*/
-struct sk_buff *skb_segment(struct sk_buff *skb, int sg)
+struct sk_buff *skb_segment(struct sk_buff *skb, int features)
{
struct sk_buff *segs = NULL;
struct sk_buff *tail = NULL;
unsigned int offset = doffset;
unsigned int headroom;
unsigned int len;
+ int sg = features & NETIF_F_SG;
int nfrags = skb_shinfo(skb)->nr_frags;
int err = -ENOMEM;
int i = 0;
ret = -ENONET;
break;
+ case SO_PASSSEC:
+ if (valbool)
+ set_bit(SOCK_PASSSEC, &sock->flags);
+ else
+ clear_bit(SOCK_PASSSEC, &sock->flags);
+ break;
+
/* We implement the SO_SNDLOWAT etc to
not be settable (1003.1g 5.3) */
default:
v.val = sk->sk_state == TCP_LISTEN;
break;
+ case SO_PASSSEC:
+ v.val = test_bit(SOCK_PASSSEC, &sock->flags) ? 1 : 0;
+ break;
+
case SO_PEERSEC:
return security_socket_getpeersec_stream(sock, optval, optlen, len);
if (nlh->nlmsg_len < sizeof(*nlh) || skb->len < nlh->nlmsg_len)
return;
- if (!cap_raised(NETLINK_CB(skb).eff_cap, CAP_NET_ADMIN))
+ if (security_netlink_recv(skb, CAP_NET_ADMIN))
RCV_SKB_FAIL(-EPERM);
/* Eventually we might send routing messages too */
EXPORT_SYMBOL(inet_sk_rebuild_header);
-static struct sk_buff *inet_gso_segment(struct sk_buff *skb, int sg)
+static struct sk_buff *inet_gso_segment(struct sk_buff *skb, int features)
{
struct sk_buff *segs = ERR_PTR(-EINVAL);
struct iphdr *iph;
rcu_read_lock();
ops = rcu_dereference(inet_protos[proto]);
if (ops && ops->gso_segment)
- segs = ops->gso_segment(skb, sg);
+ segs = ops->gso_segment(skb, features);
rcu_read_unlock();
- if (IS_ERR(segs))
+ if (!segs || unlikely(IS_ERR(segs)))
goto out;
skb = segs;
help
This option adds a new iptables `hashlimit' match.
- As opposed to `limit', this match dynamically crates a hash table
+ As opposed to `limit', this match dynamically creates a hash table
of limit buckets, based on your selection of source/destination
ip addresses and/or ports.
return ret;
}
- if (xt_register_table(table, &bootstrap, newinfo) != 0) {
+ ret = xt_register_table(table, &bootstrap, newinfo);
+ if (ret != 0) {
xt_free_table_info(newinfo);
return ret;
}
if (entry->info->indev)
if (entry->info->indev->ifindex == ifindex)
return 1;
-
if (entry->info->outdev)
if (entry->info->outdev->ifindex == ifindex)
return 1;
-
+#ifdef CONFIG_BRIDGE_NETFILTER
+ if (entry->skb->nf_bridge) {
+ if (entry->skb->nf_bridge->physindev &&
+ entry->skb->nf_bridge->physindev->ifindex == ifindex)
+ return 1;
+ if (entry->skb->nf_bridge->physoutdev &&
+ entry->skb->nf_bridge->physoutdev->ifindex == ifindex)
+ return 1;
+ }
+#endif
return 0;
}
if (type <= IPQM_BASE)
return;
- if (security_netlink_recv(skb))
+ if (security_netlink_recv(skb, CAP_NET_ADMIN))
RCV_SKB_FAIL(-EPERM);
write_lock_bh(&queue_lock);
return ret;
}
- if (xt_register_table(table, &bootstrap, newinfo) != 0) {
+ ret = xt_register_table(table, &bootstrap, newinfo);
+ if (ret != 0) {
xt_free_table_info(newinfo);
return ret;
}
EXPORT_SYMBOL(compat_tcp_getsockopt);
#endif
-struct sk_buff *tcp_tso_segment(struct sk_buff *skb, int sg)
+struct sk_buff *tcp_tso_segment(struct sk_buff *skb, int features)
{
struct sk_buff *segs = ERR_PTR(-EINVAL);
struct tcphdr *th;
if (!pskb_may_pull(skb, thlen))
goto out;
+ segs = NULL;
+ if (skb_gso_ok(skb, features | NETIF_F_GSO_ROBUST))
+ goto out;
+
oldlen = (u16)~skb->len;
__skb_pull(skb, thlen);
- segs = skb_segment(skb, sg);
+ segs = skb_segment(skb, features);
if (IS_ERR(segs))
goto out;
const struct tcp_sock *tp = tcp_sk(sk);
struct tcp_info *info = _info;
- r->idiag_rqueue = tp->rcv_nxt - tp->copied_seq;
+ if (sk->sk_state == TCP_LISTEN)
+ r->idiag_rqueue = sk->sk_ack_backlog;
+ else
+ r->idiag_rqueue = tp->rcv_nxt - tp->copied_seq;
r->idiag_wqueue = tp->write_seq - tp->snd_una;
if (info != NULL)
tcp_get_info(sk, info);
*/
TCP_ECN_rcv_synack(tp, th);
- if (tp->ecn_flags&TCP_ECN_OK)
- sock_set_flag(sk, SOCK_NO_LARGESEND);
tp->snd_wl1 = TCP_SKB_CB(skb)->seq;
tcp_ack(sk, skb, FLAG_SLOWPATH);
tp->max_window = tp->snd_wnd;
TCP_ECN_rcv_syn(tp, th);
- if (tp->ecn_flags&TCP_ECN_OK)
- sock_set_flag(sk, SOCK_NO_LARGESEND);
tcp_mtup_init(sk);
tcp_sync_mss(sk, icsk->icsk_pmtu_cookie);
sprintf(tmpbuf, "%4d: %08X:%04X %08X:%04X %02X %08X:%08X %02X:%08lX "
"%08X %5d %8d %lu %d %p %u %u %u %u %d",
i, src, srcp, dest, destp, sp->sk_state,
- tp->write_seq - tp->snd_una, tp->rcv_nxt - tp->copied_seq,
+ tp->write_seq - tp->snd_una,
+ (sp->sk_state == TCP_LISTEN) ? sp->sk_ack_backlog : (tp->rcv_nxt - tp->copied_seq),
timer_active,
jiffies_to_clock_t(timer_expires - jiffies),
icsk->icsk_retransmits,
newicsk->icsk_ack.last_seg_size = skb->len - newtp->tcp_header_len;
newtp->rx_opt.mss_clamp = req->mss;
TCP_ECN_openreq_child(newtp, req);
- if (newtp->ecn_flags&TCP_ECN_OK)
- sock_set_flag(newsk, SOCK_NO_LARGESEND);
TCP_INC_STATS_BH(TCP_MIB_PASSIVEOPENS);
}
memset(th, 0, sizeof(struct tcphdr));
th->syn = 1;
th->ack = 1;
- if (dst->dev->features&NETIF_F_TSO)
- ireq->ecn_ok = 0;
TCP_ECN_make_synack(req, th);
th->source = inet_sk(sk)->sport;
th->dest = ireq->rmt_port;
if (type <= IPQM_BASE)
return;
- if (security_netlink_recv(skb))
+ if (security_netlink_recv(skb, CAP_NET_ADMIN))
RCV_SKB_FAIL(-EPERM);
write_lock_bh(&queue_lock);
return ret;
}
- if (xt_register_table(table, &bootstrap, newinfo) != 0) {
+ ret = xt_register_table(table, &bootstrap, newinfo);
+ if (ret != 0) {
xt_free_table_info(newinfo);
return ret;
}
dest->s6_addr32[0], dest->s6_addr32[1],
dest->s6_addr32[2], dest->s6_addr32[3], destp,
sp->sk_state,
- tp->write_seq-tp->snd_una, tp->rcv_nxt-tp->copied_seq,
+ tp->write_seq-tp->snd_una,
+ (sp->sk_state == TCP_LISTEN) ? sp->sk_ack_backlog : (tp->rcv_nxt - tp->copied_seq),
timer_active,
jiffies_to_clock_t(timer_expires - jiffies),
icsk->icsk_retransmits,
rcu_read_lock();
self = irlan_get_any();
if (self) {
- IRDA_ASSERT(self->magic == IRLAN_MAGIC, return;);
+ IRDA_ASSERT(self->magic == IRLAN_MAGIC, goto out;);
IRDA_DEBUG(1, "%s(), Found instance (%08x)!\n", __FUNCTION__ ,
daddr);
irlan_client_wakeup(self, saddr, daddr);
}
+IRDA_ASSERT_LABEL(out:)
rcu_read_unlock();
}
tristate '"statistic" match support'
depends on NETFILTER_XTABLES
help
- statistic module
+ This option adds a `statistic' match, which allows you to match
+ on packets periodically or randomly with a given percentage.
+
+ To compile it as a module, choose M here. If unsure, say N.
config NETFILTER_XT_MATCH_STRING
tristate '"string" match support'
#include <linux/errno.h>
#include <linux/netlink.h>
#include <linux/spinlock.h>
+#include <linux/interrupt.h>
#include <linux/notifier.h>
#include <linux/netfilter.h>
#include <linux/sctp.h>
#include <linux/string.h>
#include <linux/seq_file.h>
+#include <linux/spinlock.h>
+#include <linux/interrupt.h>
#include <net/netfilter/nf_conntrack.h>
#include <net/netfilter/nf_conntrack_protocol.h>
NFNL_SUBSYS_ID(nlh->nlmsg_type),
NFNL_MSG_TYPE(nlh->nlmsg_type));
- if (!cap_raised(NETLINK_CB(skb).eff_cap, CAP_NET_ADMIN)) {
+ if (security_netlink_recv(skb, CAP_NET_ADMIN)) {
DEBUGP("missing CAP_NET_ADMIN\n");
*errp = -EPERM;
return -1;
if (entinf->indev)
if (entinf->indev->ifindex == ifindex)
return 1;
-
if (entinf->outdev)
if (entinf->outdev->ifindex == ifindex)
return 1;
-
+#ifdef CONFIG_BRIDGE_NETFILTER
+ if (entry->skb->nf_bridge) {
+ if (entry->skb->nf_bridge->physindev &&
+ entry->skb->nf_bridge->physindev->ifindex == ifindex)
+ return 1;
+ if (entry->skb->nf_bridge->physoutdev &&
+ entry->skb->nf_bridge->physoutdev->ifindex == ifindex)
+ return 1;
+ }
+#endif
return 0;
}
&& SCCHECK(((ntohs(sh->dest) >= info->dpts[0])
&& (ntohs(sh->dest) <= info->dpts[1])),
XT_SCTP_DEST_PORTS, info->flags, info->invflags)
- && SCCHECK(match_packet(skb, protoff,
+ && SCCHECK(match_packet(skb, protoff + sizeof (sctp_sctphdr_t),
info->chunkmap, info->chunk_match_type,
info->flag_info, info->flag_count,
hotdrop),
return ret;
out_unreg_udp:
- xt_unregister_match(&tcp_matchstruct);
+ xt_unregister_match(&udp_matchstruct);
out_unreg_tcp6:
xt_unregister_match(&tcp6_matchstruct);
out_unreg_tcp:
goto errout;
}
- if ((ops->flags & GENL_ADMIN_PERM) && security_netlink_recv(skb)) {
+ if ((ops->flags & GENL_ADMIN_PERM) && security_netlink_recv(skb, CAP_NET_ADMIN)) {
err = -EPERM;
goto errout;
}
void
gss_mech_put(struct gss_api_mech * gm)
{
- module_put(gm->gm_owner);
+ if (gm)
+ module_put(gm->gm_owner);
}
EXPORT_SYMBOL(gss_mech_put);
(*context_handle)->mech_type->gm_ops
->gss_delete_sec_context((*context_handle)
->internal_ctx_id);
- if ((*context_handle)->mech_type)
- gss_mech_put((*context_handle)->mech_type);
+ gss_mech_put((*context_handle)->mech_type);
kfree(*context_handle);
*context_handle=NULL;
return GSS_S_COMPLETE;
struct rsc rsci, *rscp = NULL;
time_t expiry;
int status = -EINVAL;
+ struct gss_api_mech *gm = NULL;
memset(&rsci, 0, sizeof(rsci));
/* context handle */
set_bit(CACHE_NEGATIVE, &rsci.h.flags);
else {
int N, i;
- struct gss_api_mech *gm;
/* gid */
if (get_int(&mesg, &rsci.cred.cr_gid))
status = -EINVAL;
/* mech-specific data: */
len = qword_get(&mesg, buf, mlen);
- if (len < 0) {
- gss_mech_put(gm);
+ if (len < 0)
goto out;
- }
status = gss_import_sec_context(buf, len, gm, &rsci.mechctx);
- if (status) {
- gss_mech_put(gm);
+ if (status)
goto out;
- }
- gss_mech_put(gm);
}
rsci.h.expiry_time = expiry;
rscp = rsc_update(&rsci, rscp);
status = 0;
out:
+ gss_mech_put(gm);
rsc_free(&rsci);
if (rscp)
cache_put(&rscp->h, &rsc_cache);
return stat;
}
+static inline int
+total_buf_len(struct xdr_buf *buf)
+{
+ return buf->head[0].iov_len + buf->page_len + buf->tail[0].iov_len;
+}
+
+static void
+fix_priv_head(struct xdr_buf *buf, int pad)
+{
+ if (buf->page_len == 0) {
+ /* We need to adjust head and buf->len in tandem in this
+ * case to make svc_defer() work--it finds the original
+ * buffer start using buf->len - buf->head[0].iov_len. */
+ buf->head[0].iov_len -= pad;
+ }
+}
+
+static int
+unwrap_priv_data(struct svc_rqst *rqstp, struct xdr_buf *buf, u32 seq, struct gss_ctx *ctx)
+{
+ u32 priv_len, maj_stat;
+ int pad, saved_len, remaining_len, offset;
+
+ rqstp->rq_sendfile_ok = 0;
+
+ priv_len = ntohl(svc_getu32(&buf->head[0]));
+ if (rqstp->rq_deferred) {
+ /* Already decrypted last time through! The sequence number
+ * check at out_seq is unnecessary but harmless: */
+ goto out_seq;
+ }
+ /* buf->len is the number of bytes from the original start of the
+ * request to the end, where head[0].iov_len is just the bytes
+ * not yet read from the head, so these two values are different: */
+ remaining_len = total_buf_len(buf);
+ if (priv_len > remaining_len)
+ return -EINVAL;
+ pad = remaining_len - priv_len;
+ buf->len -= pad;
+ fix_priv_head(buf, pad);
+
+ /* Maybe it would be better to give gss_unwrap a length parameter: */
+ saved_len = buf->len;
+ buf->len = priv_len;
+ maj_stat = gss_unwrap(ctx, 0, buf);
+ pad = priv_len - buf->len;
+ buf->len = saved_len;
+ buf->len -= pad;
+ /* The upper layers assume the buffer is aligned on 4-byte boundaries.
+ * In the krb5p case, at least, the data ends up offset, so we need to
+ * move it around. */
+ /* XXX: This is very inefficient. It would be better to either do
+ * this while we encrypt, or maybe in the receive code, if we can peak
+ * ahead and work out the service and mechanism there. */
+ offset = buf->head[0].iov_len % 4;
+ if (offset) {
+ buf->buflen = RPCSVC_MAXPAYLOAD;
+ xdr_shift_buf(buf, offset);
+ fix_priv_head(buf, pad);
+ }
+ if (maj_stat != GSS_S_COMPLETE)
+ return -EINVAL;
+out_seq:
+ if (ntohl(svc_getu32(&buf->head[0])) != seq)
+ return -EINVAL;
+ return 0;
+}
+
struct gss_svc_data {
/* decoded gss client cred: */
struct rpc_gss_wire_cred clcred;
svc_putu32(resv, 0);
break;
case RPC_GSS_SVC_PRIVACY:
- /* currently unsupported */
+ if (unwrap_priv_data(rqstp, &rqstp->rq_arg,
+ gc->gc_seq, rsci->mechctx))
+ goto auth_err;
+ /* placeholders for length and seq. number: */
+ svcdata->body_start = resv->iov_base + resv->iov_len;
+ svc_putu32(resv, 0);
+ svc_putu32(resv, 0);
+ break;
default:
goto auth_err;
}
return ret;
}
-static int
-svcauth_gss_release(struct svc_rqst *rqstp)
+static inline int
+svcauth_gss_wrap_resp_integ(struct svc_rqst *rqstp)
{
struct gss_svc_data *gsd = (struct gss_svc_data *)rqstp->rq_auth_data;
struct rpc_gss_wire_cred *gc = &gsd->clcred;
int integ_offset, integ_len;
int stat = -EINVAL;
+ p = gsd->body_start;
+ gsd->body_start = NULL;
+ /* move accept_stat to right place: */
+ memcpy(p, p + 2, 4);
+ /* Don't wrap in failure case: */
+ /* Counting on not getting here if call was not even accepted! */
+ if (*p != rpc_success) {
+ resbuf->head[0].iov_len -= 2 * 4;
+ goto out;
+ }
+ p++;
+ integ_offset = (u8 *)(p + 1) - (u8 *)resbuf->head[0].iov_base;
+ integ_len = resbuf->len - integ_offset;
+ BUG_ON(integ_len % 4);
+ *p++ = htonl(integ_len);
+ *p++ = htonl(gc->gc_seq);
+ if (xdr_buf_subsegment(resbuf, &integ_buf, integ_offset,
+ integ_len))
+ BUG();
+ if (resbuf->page_len == 0
+ && resbuf->head[0].iov_len + RPC_MAX_AUTH_SIZE
+ < PAGE_SIZE) {
+ BUG_ON(resbuf->tail[0].iov_len);
+ /* Use head for everything */
+ resv = &resbuf->head[0];
+ } else if (resbuf->tail[0].iov_base == NULL) {
+ if (resbuf->head[0].iov_len + RPC_MAX_AUTH_SIZE > PAGE_SIZE)
+ goto out_err;
+ resbuf->tail[0].iov_base = resbuf->head[0].iov_base
+ + resbuf->head[0].iov_len;
+ resbuf->tail[0].iov_len = 0;
+ rqstp->rq_restailpage = 0;
+ resv = &resbuf->tail[0];
+ } else {
+ resv = &resbuf->tail[0];
+ }
+ mic.data = (u8 *)resv->iov_base + resv->iov_len + 4;
+ if (gss_get_mic(gsd->rsci->mechctx, &integ_buf, &mic))
+ goto out_err;
+ svc_putu32(resv, htonl(mic.len));
+ memset(mic.data + mic.len, 0,
+ round_up_to_quad(mic.len) - mic.len);
+ resv->iov_len += XDR_QUADLEN(mic.len) << 2;
+ /* not strictly required: */
+ resbuf->len += XDR_QUADLEN(mic.len) << 2;
+ BUG_ON(resv->iov_len > PAGE_SIZE);
+out:
+ stat = 0;
+out_err:
+ return stat;
+}
+
+static inline int
+svcauth_gss_wrap_resp_priv(struct svc_rqst *rqstp)
+{
+ struct gss_svc_data *gsd = (struct gss_svc_data *)rqstp->rq_auth_data;
+ struct rpc_gss_wire_cred *gc = &gsd->clcred;
+ struct xdr_buf *resbuf = &rqstp->rq_res;
+ struct page **inpages = NULL;
+ u32 *p;
+ int offset, *len;
+ int pad;
+
+ p = gsd->body_start;
+ gsd->body_start = NULL;
+ /* move accept_stat to right place: */
+ memcpy(p, p + 2, 4);
+ /* Don't wrap in failure case: */
+ /* Counting on not getting here if call was not even accepted! */
+ if (*p != rpc_success) {
+ resbuf->head[0].iov_len -= 2 * 4;
+ return 0;
+ }
+ p++;
+ len = p++;
+ offset = (u8 *)p - (u8 *)resbuf->head[0].iov_base;
+ *p++ = htonl(gc->gc_seq);
+ inpages = resbuf->pages;
+ /* XXX: Would be better to write some xdr helper functions for
+ * nfs{2,3,4}xdr.c that place the data right, instead of copying: */
+ if (resbuf->tail[0].iov_base && rqstp->rq_restailpage == 0) {
+ BUG_ON(resbuf->tail[0].iov_base >= resbuf->head[0].iov_base
+ + PAGE_SIZE);
+ BUG_ON(resbuf->tail[0].iov_base < resbuf->head[0].iov_base);
+ if (resbuf->tail[0].iov_len + resbuf->head[0].iov_len
+ + 2 * RPC_MAX_AUTH_SIZE > PAGE_SIZE)
+ return -ENOMEM;
+ memmove(resbuf->tail[0].iov_base + RPC_MAX_AUTH_SIZE,
+ resbuf->tail[0].iov_base,
+ resbuf->tail[0].iov_len);
+ resbuf->tail[0].iov_base += RPC_MAX_AUTH_SIZE;
+ }
+ if (resbuf->tail[0].iov_base == NULL) {
+ if (resbuf->head[0].iov_len + 2*RPC_MAX_AUTH_SIZE > PAGE_SIZE)
+ return -ENOMEM;
+ resbuf->tail[0].iov_base = resbuf->head[0].iov_base
+ + resbuf->head[0].iov_len + RPC_MAX_AUTH_SIZE;
+ resbuf->tail[0].iov_len = 0;
+ rqstp->rq_restailpage = 0;
+ }
+ if (gss_wrap(gsd->rsci->mechctx, offset, resbuf, inpages))
+ return -ENOMEM;
+ *len = htonl(resbuf->len - offset);
+ pad = 3 - ((resbuf->len - offset - 1)&3);
+ p = (u32 *)(resbuf->tail[0].iov_base + resbuf->tail[0].iov_len);
+ memset(p, 0, pad);
+ resbuf->tail[0].iov_len += pad;
+ resbuf->len += pad;
+ return 0;
+}
+
+static int
+svcauth_gss_release(struct svc_rqst *rqstp)
+{
+ struct gss_svc_data *gsd = (struct gss_svc_data *)rqstp->rq_auth_data;
+ struct rpc_gss_wire_cred *gc = &gsd->clcred;
+ struct xdr_buf *resbuf = &rqstp->rq_res;
+ int stat = -EINVAL;
+
if (gc->gc_proc != RPC_GSS_PROC_DATA)
goto out;
/* Release can be called twice, but we only wrap once. */
if (gsd->body_start == NULL)
goto out;
/* normally not set till svc_send, but we need it here: */
- resbuf->len = resbuf->head[0].iov_len
- + resbuf->page_len + resbuf->tail[0].iov_len;
+ /* XXX: what for? Do we mess it up the moment we call svc_putu32
+ * or whatever? */
+ resbuf->len = total_buf_len(resbuf);
switch (gc->gc_svc) {
case RPC_GSS_SVC_NONE:
break;
case RPC_GSS_SVC_INTEGRITY:
- p = gsd->body_start;
- gsd->body_start = NULL;
- /* move accept_stat to right place: */
- memcpy(p, p + 2, 4);
- /* don't wrap in failure case: */
- /* Note: counting on not getting here if call was not even
- * accepted! */
- if (*p != rpc_success) {
- resbuf->head[0].iov_len -= 2 * 4;
- goto out;
- }
- p++;
- integ_offset = (u8 *)(p + 1) - (u8 *)resbuf->head[0].iov_base;
- integ_len = resbuf->len - integ_offset;
- BUG_ON(integ_len % 4);
- *p++ = htonl(integ_len);
- *p++ = htonl(gc->gc_seq);
- if (xdr_buf_subsegment(resbuf, &integ_buf, integ_offset,
- integ_len))
- BUG();
- if (resbuf->page_len == 0
- && resbuf->head[0].iov_len + RPC_MAX_AUTH_SIZE
- < PAGE_SIZE) {
- BUG_ON(resbuf->tail[0].iov_len);
- /* Use head for everything */
- resv = &resbuf->head[0];
- } else if (resbuf->tail[0].iov_base == NULL) {
- if (resbuf->head[0].iov_len + RPC_MAX_AUTH_SIZE
- > PAGE_SIZE)
- goto out_err;
- resbuf->tail[0].iov_base =
- resbuf->head[0].iov_base
- + resbuf->head[0].iov_len;
- resbuf->tail[0].iov_len = 0;
- rqstp->rq_restailpage = 0;
- resv = &resbuf->tail[0];
- } else {
- resv = &resbuf->tail[0];
- }
- mic.data = (u8 *)resv->iov_base + resv->iov_len + 4;
- if (gss_get_mic(gsd->rsci->mechctx, &integ_buf, &mic))
+ stat = svcauth_gss_wrap_resp_integ(rqstp);
+ if (stat)
goto out_err;
- svc_putu32(resv, htonl(mic.len));
- memset(mic.data + mic.len, 0,
- round_up_to_quad(mic.len) - mic.len);
- resv->iov_len += XDR_QUADLEN(mic.len) << 2;
- /* not strictly required: */
- resbuf->len += XDR_QUADLEN(mic.len) << 2;
- BUG_ON(resv->iov_len > PAGE_SIZE);
break;
case RPC_GSS_SVC_PRIVACY:
+ stat = svcauth_gss_wrap_resp_priv(rqstp);
+ if (stat)
+ goto out_err;
+ break;
default:
goto out_err;
}
rqstp->rq_res.page_base = 0;
rqstp->rq_res.page_len = 0;
rqstp->rq_res.buflen = PAGE_SIZE;
+ rqstp->rq_res.tail[0].iov_base = NULL;
rqstp->rq_res.tail[0].iov_len = 0;
+ /* Will be turned off only in gss privacy case: */
+ rqstp->rq_sendfile_ok = 1;
/* tcp needs a space for the record length... */
if (rqstp->rq_prot == IPPROTO_TCP)
svc_putu32(resv, 0);
int res;
tipc_log_reinit(CONFIG_TIPC_LOG);
- info("Activated (compiled " __DATE__ " " __TIME__ ")\n");
+ info("Activated (version " TIPC_MOD_VER
+ " compiled " __DATE__ " " __TIME__ ")\n");
tipc_own_addr = 0;
tipc_remote_management = 1;
* net/tipc/link.c: TIPC link code
*
* Copyright (c) 1996-2006, Ericsson AB
- * Copyright (c) 2004-2005, Wind River Systems
+ * Copyright (c) 2004-2006, Wind River Systems
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
struct tipc_msg *bundler_msg = buf_msg(bundler);
struct tipc_msg *msg = buf_msg(buf);
u32 size = msg_size(msg);
- u32 to_pos = align(msg_size(bundler_msg));
- u32 rest = link_max_pkt(l_ptr) - to_pos;
+ u32 bundle_size = msg_size(bundler_msg);
+ u32 to_pos = align(bundle_size);
+ u32 pad = to_pos - bundle_size;
if (msg_user(bundler_msg) != MSG_BUNDLER)
return 0;
if (msg_type(bundler_msg) != OPEN_MSG)
return 0;
- if (rest < align(size))
+ if (skb_tailroom(bundler) < (pad + size))
return 0;
- skb_put(bundler, (to_pos - msg_size(bundler_msg)) + size);
+ skb_put(bundler, pad + size);
memcpy(bundler->data + to_pos, buf->data, size);
msg_set_size(bundler_msg, to_pos + size);
msg_set_msgcnt(bundler_msg, msg_msgcnt(bundler_msg) + 1);
* net/tipc/node.c: TIPC node management routines
*
* Copyright (c) 2000-2006, Ericsson AB
- * Copyright (c) 2005, Wind River Systems
+ * Copyright (c) 2005-2006, Wind River Systems
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
struct sk_buff *buf;
struct node *n_ptr;
struct tipc_node_info node_info;
+ u32 payload_size;
if (!TLV_CHECK(req_tlv_area, req_tlv_space, TIPC_TLV_NET_ADDR))
return tipc_cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
/* For now, get space for all other nodes
(will need to modify this when slave nodes are supported */
- buf = tipc_cfg_reply_alloc(TLV_SPACE(sizeof(node_info)) *
- (tipc_max_nodes - 1));
+ payload_size = TLV_SPACE(sizeof(node_info)) * (tipc_max_nodes - 1);
+ if (payload_size > 32768u)
+ return tipc_cfg_reply_error_string(TIPC_CFG_NOT_SUPPORTED
+ " (too many nodes)");
+ buf = tipc_cfg_reply_alloc(payload_size);
if (!buf)
return NULL;
struct sk_buff *buf;
struct node *n_ptr;
struct tipc_link_info link_info;
+ u32 payload_size;
if (!TLV_CHECK(req_tlv_area, req_tlv_space, TIPC_TLV_NET_ADDR))
return tipc_cfg_reply_error_string(TIPC_CFG_TLV_ERROR);
if (!tipc_nodes)
return tipc_cfg_reply_none();
-
- /* For now, get space for 2 links to all other nodes + bcast link
- (will need to modify this when slave nodes are supported */
-
- buf = tipc_cfg_reply_alloc(TLV_SPACE(sizeof(link_info)) *
- (2 * (tipc_max_nodes - 1) + 1));
+
+ /* Get space for all unicast links + multicast link */
+
+ payload_size = TLV_SPACE(sizeof(link_info)) *
+ (tipc_net.zones[tipc_zone(tipc_own_addr)]->links + 1);
+ if (payload_size > 32768u)
+ return tipc_cfg_reply_error_string(TIPC_CFG_NOT_SUPPORTED
+ " (too many links)");
+ buf = tipc_cfg_reply_alloc(payload_size);
if (!buf)
return NULL;
* net/tipc/zone.h: Include file for TIPC zone management routines
*
* Copyright (c) 2000-2006, Ericsson AB
- * Copyright (c) 2005, Wind River Systems
+ * Copyright (c) 2005-2006, Wind River Systems
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* struct _zone - TIPC zone structure
* @addr: network address of zone
* @clusters: array of pointers to all clusters within zone
- * @links: (used for inter-zone communication)
+ * @links: number of (unicast) links to zone
*/
struct _zone {
#define UNIX_ABSTRACT(sk) (unix_sk(sk)->addr->hash != UNIX_HASH_SIZE)
+#ifdef CONFIG_SECURITY_NETWORK
+static void unix_get_peersec_dgram(struct sk_buff *skb)
+{
+ int err;
+
+ err = security_socket_getpeersec_dgram(skb, UNIXSECDATA(skb),
+ UNIXSECLEN(skb));
+ if (err)
+ *(UNIXSECDATA(skb)) = NULL;
+}
+
+static inline void unix_set_secdata(struct scm_cookie *scm, struct sk_buff *skb)
+{
+ scm->secdata = *UNIXSECDATA(skb);
+ scm->seclen = *UNIXSECLEN(skb);
+}
+#else
+static void unix_get_peersec_dgram(struct sk_buff *skb)
+{ }
+
+static inline void unix_set_secdata(struct scm_cookie *scm, struct sk_buff *skb)
+{ }
+#endif /* CONFIG_SECURITY_NETWORK */
+
/*
* SMP locking strategy:
* hash table is protected with spinlock unix_table_lock
if (siocb->scm->fp)
unix_attach_fds(siocb->scm, skb);
+ unix_get_peersec_dgram(skb);
+
skb->h.raw = skb->data;
err = memcpy_fromiovec(skb_put(skb,len), msg->msg_iov, len);
if (err)
memset(&tmp_scm, 0, sizeof(tmp_scm));
}
siocb->scm->creds = *UNIXCREDS(skb);
+ unix_set_secdata(siocb->scm, skb);
if (!(flags & MSG_PEEK))
{
return res;
}
-EXPORT_SYMBOL(xfrm_state_mtu);
-
int xfrm_init_state(struct xfrm_state *x)
{
struct xfrm_state_afinfo *afinfo;
link = &xfrm_dispatch[type];
/* All operations require privileges, even GET */
- if (security_netlink_recv(skb)) {
+ if (security_netlink_recv(skb, CAP_NET_ADMIN)) {
*errp = -EPERM;
return -1;
}
EXPORT_SYMBOL(cap_netlink_send);
-int cap_netlink_recv(struct sk_buff *skb)
+int cap_netlink_recv(struct sk_buff *skb, int cap)
{
- if (!cap_raised(NETLINK_CB(skb).eff_cap, CAP_NET_ADMIN))
+ if (!cap_raised(NETLINK_CB(skb).eff_cap, cap))
return -EPERM;
return 0;
}
return 0;
}
+static void dummy_task_getsecid (struct task_struct *p, u32 *secid)
+{ }
+
static int dummy_task_setgroups (struct group_info *group_info)
{
return 0;
return 0;
}
+static int dummy_task_getioprio (struct task_struct *p)
+{
+ return 0;
+}
+
static int dummy_task_setrlimit (unsigned int resource, struct rlimit *new_rlim)
{
return 0;
}
static int dummy_task_kill (struct task_struct *p, struct siginfo *info,
- int sig)
+ int sig, u32 secid)
{
return 0;
}
return 0;
}
-static int dummy_netlink_recv (struct sk_buff *skb)
+static int dummy_netlink_recv (struct sk_buff *skb, int cap)
{
- if (!cap_raised (NETLINK_CB (skb).eff_cap, CAP_NET_ADMIN))
+ if (!cap_raised (NETLINK_CB (skb).eff_cap, cap))
return -EPERM;
return 0;
}
set_to_dummy_if_null(ops, task_setpgid);
set_to_dummy_if_null(ops, task_getpgid);
set_to_dummy_if_null(ops, task_getsid);
+ set_to_dummy_if_null(ops, task_getsecid);
set_to_dummy_if_null(ops, task_setgroups);
set_to_dummy_if_null(ops, task_setnice);
set_to_dummy_if_null(ops, task_setioprio);
+ set_to_dummy_if_null(ops, task_getioprio);
set_to_dummy_if_null(ops, task_setrlimit);
set_to_dummy_if_null(ops, task_setscheduler);
set_to_dummy_if_null(ops, task_getscheduler);
#include <linux/sysctl.h>
#include <linux/audit.h>
#include <linux/string.h>
+#include <linux/selinux.h>
#include "avc.h"
#include "objsec.h"
return task_has_perm(current, p, PROCESS__GETSESSION);
}
+static void selinux_task_getsecid(struct task_struct *p, u32 *secid)
+{
+ selinux_get_task_sid(p, secid);
+}
+
static int selinux_task_setgroups(struct group_info *group_info)
{
/* See the comment for setuid above. */
return task_has_perm(current, p, PROCESS__SETSCHED);
}
+static int selinux_task_getioprio(struct task_struct *p)
+{
+ return task_has_perm(current, p, PROCESS__GETSCHED);
+}
+
static int selinux_task_setrlimit(unsigned int resource, struct rlimit *new_rlim)
{
struct rlimit *old_rlim = current->signal->rlim + resource;
return task_has_perm(current, p, PROCESS__SETSCHED);
}
-static int selinux_task_kill(struct task_struct *p, struct siginfo *info, int sig)
+static int selinux_task_kill(struct task_struct *p, struct siginfo *info,
+ int sig, u32 secid)
{
u32 perm;
int rc;
+ struct task_security_struct *tsec;
- rc = secondary_ops->task_kill(p, info, sig);
+ rc = secondary_ops->task_kill(p, info, sig, secid);
if (rc)
return rc;
perm = PROCESS__SIGNULL; /* null signal; existence test */
else
perm = signal_to_av(sig);
-
- return task_has_perm(current, p, perm);
+ tsec = p->security;
+ if (secid)
+ rc = avc_has_perm(secid, tsec->sid, SECCLASS_PROCESS, perm, NULL);
+ else
+ rc = task_has_perm(current, p, perm);
+ return rc;
}
static int selinux_task_prctl(int option,
static int selinux_socket_getpeersec_dgram(struct sk_buff *skb, char **secdata, u32 *seclen)
{
int err = 0;
- u32 peer_sid = selinux_socket_getpeer_dgram(skb);
+ u32 peer_sid;
+
+ if (skb->sk->sk_family == PF_UNIX)
+ selinux_get_inode_sid(SOCK_INODE(skb->sk->sk_socket),
+ &peer_sid);
+ else
+ peer_sid = selinux_socket_getpeer_dgram(skb);
if (peer_sid == SECSID_NULL)
return -EINVAL;
return 0;
}
-
-
static int selinux_sk_alloc_security(struct sock *sk, int family, gfp_t priority)
{
return sk_alloc_security(sk, family, priority);
static int selinux_netlink_send(struct sock *sk, struct sk_buff *skb)
{
- struct task_security_struct *tsec;
- struct av_decision avd;
int err;
err = secondary_ops->netlink_send(sk, skb);
if (err)
return err;
- tsec = current->security;
-
- avd.allowed = 0;
- avc_has_perm_noaudit(tsec->sid, tsec->sid,
- SECCLASS_CAPABILITY, ~0, &avd);
- cap_mask(NETLINK_CB(skb).eff_cap, avd.allowed);
-
if (policydb_loaded_version >= POLICYDB_VERSION_NLCLASS)
err = selinux_nlmsg_perm(sk, skb);
return err;
}
-static int selinux_netlink_recv(struct sk_buff *skb)
+static int selinux_netlink_recv(struct sk_buff *skb, int capability)
{
- if (!cap_raised(NETLINK_CB(skb).eff_cap, CAP_NET_ADMIN))
- return -EPERM;
- return 0;
+ int err;
+ struct avc_audit_data ad;
+
+ err = secondary_ops->netlink_recv(skb, capability);
+ if (err)
+ return err;
+
+ AVC_AUDIT_DATA_INIT(&ad, CAP);
+ ad.u.cap = capability;
+
+ return avc_has_perm(NETLINK_CB(skb).sid, NETLINK_CB(skb).sid,
+ SECCLASS_CAPABILITY, CAP_TO_MASK(capability), &ad);
}
static int ipc_alloc_security(struct task_struct *task,
.task_setpgid = selinux_task_setpgid,
.task_getpgid = selinux_task_getpgid,
.task_getsid = selinux_task_getsid,
+ .task_getsecid = selinux_task_getsecid,
.task_setgroups = selinux_task_setgroups,
.task_setnice = selinux_task_setnice,
.task_setioprio = selinux_task_setioprio,
+ .task_getioprio = selinux_task_getioprio,
.task_setrlimit = selinux_task_setrlimit,
.task_setscheduler = selinux_task_setscheduler,
.task_getscheduler = selinux_task_getscheduler,
projects / linux-2.6-omap-h63xx.git / commitdiff