.machine_check          = machine_check_e500,
                .platform               = "ppc8548",
        },
+       {       /* e500mc */
+               .pvr_mask               = 0xffff0000,
+               .pvr_value              = 0x80230000,
+               .cpu_name               = "e500mc",
+               /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
+               .cpu_features           = CPU_FTRS_E500MC,
+               .cpu_user_features      = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
+               .icache_bsize           = 64,
+               .dcache_bsize           = 64,
+               .num_pmcs               = 4,
+               .oprofile_cpu_type      = "ppc/e500", /* xxx - galak, e500mc? */
+               .oprofile_type          = PPC_OPROFILE_FSL_EMB,
+               .machine_check          = machine_check_e500,
+               .platform               = "ppce500mc",
+       },
        {       /* default match */
                .pvr_mask               = 0x00000000,
                .pvr_value              = 0x00000000,
 
 #define MCHECK_STACK_BASE      mcheckirq_ctx
 #define CRIT_STACK_BASE                critirq_ctx
 
-/* only on e200 for now */
+/* only on e500mc/e200 */
 #define DEBUG_STACK_BASE       dbgirq_ctx
+#ifdef CONFIG_PPC_E500MC
+#define DEBUG_SPRG             SPRN_SPRG9
+#else
 #define DEBUG_SPRG             SPRN_SPRG6W
+#endif
 
 #define EXC_LVL_FRAME_OVERHEAD (THREAD_SIZE - INT_FRAME_SIZE - EXC_LVL_SIZE)
 
 
        SET_IVOR(13, DataTLBError);
        SET_IVOR(14, InstructionTLBError);
        SET_IVOR(15, DebugDebug);
-#if defined(CONFIG_E500)
+#if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC)
        SET_IVOR(15, DebugCrit);
 #endif
        SET_IVOR(32, SPEUnavailable);
 #ifndef CONFIG_E200
        SET_IVOR(35, PerformanceMonitor);
 #endif
+#ifdef CONFIG_PPC_E500MC
+       SET_IVOR(36, Doorbell);
+#endif
 
        /* Establish the interrupt vector base */
        lis     r4,interrupt_base@h     /* IVPR only uses the high 16-bits */
        /* Performance Monitor */
        EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD)
 
+#ifdef CONFIG_PPC_E500MC
+       EXCEPTION(0x2070, Doorbell, unknown_exception, EXC_XFER_EE)
+#endif
 
        /* Debug Interrupt */
        DEBUG_DEBUG_EXCEPTION
-#if defined(CONFIG_E500)
+#if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC)
        DEBUG_CRIT_EXCEPTION
 #endif
 
 
        select FSL_EMB_PERFMON
        bool
 
+config PPC_E500MC
+       bool "e500mc Support"
+       select PPC_FPU
+       depends on E500
+
 config PPC_FPU
        bool
        default y if PPC64
 
 config SPE
        bool "SPE Support"
-       depends on E200 || E500
+       depends on E200 || (E500 && !PPC_E500MC)
        default y
        ---help---
          This option enables kernel support for the Signal Processing
 
 #if defined(CONFIG_8xx) || defined(CONFIG_403GCX)
 #define L1_CACHE_SHIFT         4
 #define MAX_COPY_PREFETCH      1
+#elif defined(CONFIG_PPC_E500MC)
+#define L1_CACHE_SHIFT         6
+#define MAX_COPY_PREFETCH      4
 #elif defined(CONFIG_PPC32)
 #define L1_CACHE_SHIFT         5
 #define MAX_COPY_PREFETCH      4
 
            CPU_FTR_NODSISRALIGN)
 #define CPU_FTRS_E500_2        (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \
            CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN)
+#define CPU_FTRS_E500MC        (CPU_FTR_USE_TB | CPU_FTR_BIG_PHYS | \
+           CPU_FTR_NODSISRALIGN)
 #define CPU_FTRS_GENERIC_32    (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)
 
 /* 64-bit CPUs */
            CPU_FTRS_E200 |
 #endif
 #ifdef CONFIG_E500
-           CPU_FTRS_E500 | CPU_FTRS_E500_2 |
+           CPU_FTRS_E500 | CPU_FTRS_E500_2 | CPU_FTRS_E500MC |
 #endif
            0,
 };
            CPU_FTRS_E200 &
 #endif
 #ifdef CONFIG_E500
-           CPU_FTRS_E500 & CPU_FTRS_E500_2 &
+           CPU_FTRS_E500 & CPU_FTRS_E500_2 & CPU_FTRS_E500MC &
 #endif
            CPU_FTRS_POSSIBLE,
 };
 
 
 #include <linux/stringify.h>
 
-#ifdef __powerpc64__
+#if defined(__powerpc64__) || defined(CONFIG_PPC_E500MC)
 #define __SUBARCH_HAS_LWSYNC
 #endif