u32                     temp;
        u32                     power_okay;
        int                     i;
+       u8                      resume_needed = 0;
 
        if (time_before (jiffies, ehci->next_statechange))
                msleep(5);
 
        /* Some controller/firmware combinations need a delay during which
         * they set up the port statuses.  See Bugzilla #8190. */
-       mdelay(8);
+       spin_unlock_irq(&ehci->lock);
+       msleep(8);
+       spin_lock_irq(&ehci->lock);
 
        /* manually resume the ports we suspended during bus_suspend() */
        i = HCS_N_PORTS (ehci->hcs_params);
                temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
                temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
                if (test_bit(i, &ehci->bus_suspended) &&
-                               (temp & PORT_SUSPEND))
+                               (temp & PORT_SUSPEND)) {
                        temp |= PORT_RESUME;
+                       resume_needed = 1;
+               }
                ehci_writel(ehci, temp, &ehci->regs->port_status [i]);
        }
+
+       /* msleep for 20ms only if code is trying to resume port */
+       if (resume_needed) {
+               spin_unlock_irq(&ehci->lock);
+               msleep(20);
+               spin_lock_irq(&ehci->lock);
+       }
+
        i = HCS_N_PORTS (ehci->hcs_params);
-       mdelay (20);
        while (i--) {
                temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
                if (test_bit(i, &ehci->bus_suspended) &&