Required properties:
- reg : Offset and length of the register set for the device
- - device_type : Should be "mdio"
- compatible : Should define the compatible device type for the
- mdio. Currently, this is most likely to be "gianfar"
+ mdio. Currently, this is most likely to be "fsl,gianfar-mdio"
Example:
mdio@24520 {
reg = <24520 20>;
- device_type = "mdio";
- compatible = "gianfar";
+ compatible = "fsl,gianfar-mdio";
ethernet-phy@0 {
......
- interrupt-parent : the phandle for the interrupt controller that
services interrupts for this device.
- pio-handle : The phandle for the Parallel I/O port configuration.
+ - rx-clock-name: the UCC receive clock source
+ "none": clock source is disabled
+ "brg1" through "brg16": clock source is BRG1-BRG16, respectively
+ "clk1" through "clk24": clock source is CLK1-CLK24, respectively
+ - tx-clock-name: the UCC transmit clock source
+ "none": clock source is disabled
+ "brg1" through "brg16": clock source is BRG1-BRG16, respectively
+ "clk1" through "clk24": clock source is CLK1-CLK24, respectively
+ The following two properties are deprecated. rx-clock has been replaced
+ with rx-clock-name, and tx-clock has been replaced with tx-clock-name.
+ Drivers that currently use the deprecated properties should continue to
+ do so, in order to support older device trees, but they should be updated
+ to check for the new properties first.
- rx-clock : represents the UCC receive clock source.
0x00 : clock source is disabled;
0x1~0x10 : clock source is BRG1~BRG16 respectively;
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
i2c@80003000 {
#address-cells = <1>;
#size-cells = <0>;
- device_type = "i2c";
+ cell-index = <0>;
compatible = "fsl-i2c";
reg = <80003000 1000>;
interrupts = <5 2>;
};
};
- serial@80004500 {
+ serial0: serial@80004500 {
+ cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <80004500 8>;
interrupt-parent = <&mpic>;
};
- serial@80004600 {
+ serial1: serial@80004600 {
+ cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <80004600 8>;
reg = <80040000 40000>;
};
- pci@fec00000 {
+ pci0: pci@fec00000 {
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
i2c@80003000 {
#address-cells = <1>;
#size-cells = <0>;
- device_type = "i2c";
+ cell-index = <0>;
compatible = "fsl-i2c";
reg = <80003000 1000>;
interrupts = <5 2>;
};
};
- serial@80004500 {
+ serial0: serial@80004500 {
+ cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <80004500 8>;
interrupt-parent = <&mpic>;
};
- serial@80004600 {
+ serial1: serial@80004600 {
+ cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <80004600 8>;
reg = <80040000 40000>;
};
- pci@fec00000 {
+ pci0: pci@fec00000 {
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
};
i2c@3d00 {
- device_type = "i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
compatible = "mpc5200-i2c","fsl-i2c";
cell-index = <0>;
reg = <3d00 40>;
};
i2c@3d40 {
- device_type = "i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
compatible = "mpc5200-i2c","fsl-i2c";
cell-index = <1>;
reg = <3d40 40>;
};
i2c@3d00 {
- device_type = "i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c";
cell-index = <0>;
reg = <3d00 40>;
};
i2c@3d40 {
- device_type = "i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c";
cell-index = <1>;
reg = <3d40 40>;
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
};
i2c@3000 {
- device_type = "i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
};
i2c@3100 {
- device_type = "i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <f 8>;
};
mdio@24520 {
- device_type = "mdio";
- compatible = "gianfar";
- reg = <24520 20>;
#address-cells = <1>;
#size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <24520 20>;
phy1: ethernet-phy@1 {
interrupt-parent = < &ipic >;
interrupts = <13 8>;
};
};
- ethernet@24000 {
+ enet0: ethernet@24000 {
+ cell-index = <0>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
phy-handle = < &phy1 >;
};
- ethernet@25000 {
+ enet1: ethernet@25000 {
+ cell-index = <1>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
phy-handle = < &phy4 >;
};
- serial@4500 {
+ serial0: serial@4500 {
+ cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>;
interrupt-parent = < &ipic >;
};
- serial@4600 {
+ serial1: serial@4600 {
+ cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>;
};
};
- pci@e0008500 {
+ pci0: pci@e0008500 {
+ cell-index = <1>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
- device_type = "i2c";
+ cell-index = <0>;
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
};
};
- serial@4500 {
+ serial0: serial@4500 {
+ cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>;
interrupt-parent = < &ipic >;
};
- serial@4600 {
+ serial1: serial@4600 {
+ cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>;
mode = "slave";
};
- ucc@2200 {
+ enet0: ucc@2200 {
device_type = "network";
compatible = "ucc_geth";
model = "UCC";
+ cell-index = <3>;
device-id = <3>;
reg = <2200 200>;
interrupts = <22>;
interrupt-parent = < &qeic >;
- /*
- * mac-address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- mac-address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
- rx-clock = <19>;
- tx-clock = <1a>;
+ rx-clock-name = "clk9";
+ tx-clock-name = "clk10";
phy-handle = < &phy3 >;
pio-handle = < &pio3 >;
};
- ucc@3200 {
+ enet1: ucc@3200 {
device_type = "network";
compatible = "ucc_geth";
model = "UCC";
+ cell-index = <4>;
device-id = <4>;
reg = <3200 200>;
interrupts = <23>;
interrupt-parent = < &qeic >;
- /*
- * mac-address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- mac-address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
- rx-clock = <17>;
- tx-clock = <18>;
+ rx-clock-name = "clk7";
+ tx-clock-name = "clk8";
phy-handle = < &phy4 >;
pio-handle = < &pio4 >;
};
};
};
- pci@e0008500 {
+ pci0: pci@e0008500 {
+ cell-index = <1>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x11 AD17 */
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
};
i2c@3000 {
- device_type = "i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
dfsrr;
};
- serial@4500 {
+ serial0: serial@4500 {
+ cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>;
interrupt-parent = <&pic>;
};
- serial@4600 {
+ serial1: serial@4600 {
+ cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>;
mode = "cpu";
};
- ucc@3000 {
+ enet0: ucc@3000 {
device_type = "network";
compatible = "ucc_geth";
model = "UCC";
+ cell-index = <2>;
device-id = <2>;
reg = <3000 200>;
interrupts = <21>;
interrupt-parent = <&qeic>;
- /*
- * mac-address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- mac-address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
- rx-clock = <20>;
- tx-clock = <13>;
+ rx-clock-name = "clk16";
+ tx-clock-name = "clk3";
phy-handle = <&phy00>;
pio-handle = <&ucc2pio>;
};
- ucc@2200 {
+ enet1: ucc@2200 {
device_type = "network";
compatible = "ucc_geth";
model = "UCC";
+ cell-index = <3>;
device-id = <3>;
reg = <2200 200>;
interrupts = <22>;
interrupt-parent = <&qeic>;
- /*
- * mac-address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- mac-address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
- rx-clock = <19>;
- tx-clock = <1a>;
+ rx-clock-name = "clk9";
+ tx-clock-name = "clk10";
phy-handle = <&phy04>;
pio-handle = <&ucc3pio>;
};
};
};
- pci@e0008500 {
+ pci0: pci@e0008500 {
+ cell-index = <1>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x10 AD16 (USB) */
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
};
i2c@3000 {
- device_type = "i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
};
i2c@3100 {
- device_type = "i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <f 8>;
};
mdio@24520 {
- device_type = "mdio";
- compatible = "gianfar";
- reg = <24520 20>;
#address-cells = <1>;
#size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <24520 20>;
/* Vitesse 8201 */
phy1c: ethernet-phy@1c {
};
};
- ethernet@24000 {
+ enet0: ethernet@24000 {
+ cell-index = <0>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <24000 1000>;
- /*
- * address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <20 8 21 8 22 8>;
interrupt-parent = < &ipic >;
linux,network-index = <0>;
};
- ethernet@25000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet1: ethernet@25000 {
+ cell-index = <1>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <25000 1000>;
- /*
- * address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <23 8 24 8 25 8>;
interrupt-parent = < &ipic >;
linux,network-index = <1>;
};
- serial@4500 {
+ serial0: serial@4500 {
+ cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>;
interrupt-parent = < &ipic >;
};
- serial@4600 {
+ serial1: serial@4600 {
+ cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>;
};
};
- pci@e0008500 {
+ pci0: pci@e0008500 {
+ cell-index = <1>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x10 - SATA */
device_type = "pci";
};
- pci@e0008600 {
+ pci1: pci@e0008600 {
+ cell-index = <2>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0E - MiniPCI Slot */
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ ethernet0 = &enet0;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
};
i2c@3000 {
- device_type = "i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
};
i2c@3100 {
- device_type = "i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <f 8>;
};
mdio@24520 {
- device_type = "mdio";
- compatible = "gianfar";
- reg = <24520 20>;
#address-cells = <1>;
#size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <24520 20>;
/* Vitesse 8201 */
phy1c: ethernet-phy@1c {
};
};
- ethernet@24000 {
+ enet0: ethernet@24000 {
+ cell-index = <0>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
linux,network-index = <0>;
};
- serial@4500 {
+ serial0: serial@4500 {
+ cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>;
interrupt-parent = < &ipic >;
};
- serial@4600 {
+ serial1: serial@4600 {
+ cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>;
};
};
- pci@e0008600 {
+ pci0: pci@e0008600 {
+ cell-index = <2>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0F - PCI Slot */
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
- device_type = "i2c";
+ cell-index = <0>;
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
i2c@3100 {
#address-cells = <1>;
#size-cells = <0>;
- device_type = "i2c";
+ cell-index = <1>;
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <f 8>;
};
mdio@24520 {
- device_type = "mdio";
- compatible = "gianfar";
- reg = <24520 20>;
#address-cells = <1>;
#size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <24520 20>;
+
phy0: ethernet-phy@0 {
interrupt-parent = < &ipic >;
interrupts = <11 8>;
};
};
- ethernet@24000 {
+ enet0: ethernet@24000 {
+ cell-index = <0>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <24000 1000>;
- /*
- * address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <20 8 21 8 22 8>;
interrupt-parent = < &ipic >;
linux,network-index = <0>;
};
- ethernet@25000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet1: ethernet@25000 {
+ cell-index = <1>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <25000 1000>;
- /*
- * address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <23 8 24 8 25 8>;
interrupt-parent = < &ipic >;
linux,network-index = <1>;
};
- serial@4500 {
+ serial0: serial@4500 {
+ cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>;
interrupt-parent = < &ipic >;
};
- serial@4600 {
+ serial1: serial@4600 {
+ cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>;
};
};
- pci@e0008500 {
+ pci0: pci@e0008500 {
+ cell-index = <1>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
device_type = "pci";
};
- pci@e0008600 {
+ pci1: pci@e0008600 {
+ cell-index = <2>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
- device_type = "i2c";
+ cell-index = <0>;
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
i2c@3100 {
#address-cells = <1>;
#size-cells = <0>;
- device_type = "i2c";
+ cell-index = <1>;
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <f 8>;
dfsrr;
};
- serial@4500 {
+ serial0: serial@4500 {
+ cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>;
interrupt-parent = < &ipic >;
};
- serial@4600 {
+ serial1: serial@4600 {
+ cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>;
mode = "slave";
};
- ucc@2000 {
+ enet0: ucc@2000 {
device_type = "network";
compatible = "ucc_geth";
model = "UCC";
+ cell-index = <1>;
device-id = <1>;
reg = <2000 200>;
interrupts = <20>;
interrupt-parent = < &qeic >;
- /*
- * mac-address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- mac-address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
- rx-clock = <0>;
- tx-clock = <19>;
+ rx-clock-name = "none";
+ tx-clock-name = "clk9";
phy-handle = < &phy0 >;
phy-connection-type = "rgmii-id";
pio-handle = < &pio1 >;
};
- ucc@3000 {
+ enet1: ucc@3000 {
device_type = "network";
compatible = "ucc_geth";
model = "UCC";
+ cell-index = <2>;
device-id = <2>;
reg = <3000 200>;
interrupts = <21>;
interrupt-parent = < &qeic >;
- /*
- * mac-address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- mac-address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
- rx-clock = <0>;
- tx-clock = <14>;
+ rx-clock-name = "none";
+ tx-clock-name = "clk4";
phy-handle = < &phy1 >;
phy-connection-type = "rgmii-id";
pio-handle = < &pio2 >;
};
};
- pci@e0008500 {
+ pci0: pci@e0008500 {
+ cell-index = <1>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
};
i2c@3000 {
- device_type = "i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <2b 2>;
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
- device_type = "mdio";
- compatible = "gianfar";
+ compatible = "fsl,gianfar-mdio";
reg = <24520 20>;
+
phy0: ethernet-phy@0 {
interrupt-parent = <&mpic>;
interrupts = <5 1>;
};
};
- ethernet@24000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet0: ethernet@24000 {
+ cell-index = <0>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <24000 1000>;
- /*
- * address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <1d 2 1e 2 22 2>;
interrupt-parent = <&mpic>;
phy-handle = <&phy0>;
};
- ethernet@25000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet1: ethernet@25000 {
+ cell-index = <1>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <25000 1000>;
- /*
- * address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <23 2 24 2 28 2>;
interrupt-parent = <&mpic>;
phy-handle = <&phy1>;
};
- ethernet@26000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet2: ethernet@26000 {
+ cell-index = <2>;
device_type = "network";
model = "FEC";
compatible = "gianfar";
reg = <26000 1000>;
- /*
- * address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <29 2>;
interrupt-parent = <&mpic>;
phy-handle = <&phy3>;
};
- serial@4500 {
+ serial0: serial@4500 {
+ cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>; // reg base, size
interrupt-parent = <&mpic>;
};
- serial@4600 {
+ serial1: serial@4600 {
+ cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>; // reg base, size
};
};
- pci@e0008000 {
+ pci0: pci@e0008000 {
+ cell-index = <0>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
};
i2c@3000 {
- device_type = "i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <2b 2>;
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
- device_type = "mdio";
- compatible = "gianfar";
+ compatible = "fsl,gianfar-mdio";
reg = <24520 20>;
+
phy0: ethernet-phy@0 {
interrupt-parent = <&mpic>;
interrupts = <5 1>;
};
};
- ethernet@24000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet0: ethernet@24000 {
+ cell-index = <0>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
phy-handle = <&phy0>;
};
- ethernet@25000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet1: ethernet@25000 {
+ cell-index = <1>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
phy-handle = <&phy1>;
};
- serial@4500 {
+ serial0: serial@4500 {
+ cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>; // reg base, size
interrupt-parent = <&mpic>;
};
- serial@4600 {
+ serial1: serial@4600 {
+ cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>; // reg base, size
};
};
- pci1: pci@e0008000 {
+ pci0: pci@e0008000 {
+ cell-index = <0>;
interrupt-map-mask = <1f800 0 0 7>;
interrupt-map = <
#interrupt-cells = <2>;
compatible = "chrp,iic";
interrupts = <1>;
- interrupt-parent = <&pci1>;
+ interrupt-parent = <&pci0>;
};
};
- pci@e0009000 {
+ pci1: pci@e0009000 {
+ cell-index = <1>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ pci2 = &pci2;
+ pci3 = &pci3;
+ };
+
cpus {
#cpus = <1>;
#address-cells = <1>;
};
i2c@3000 {
- device_type = "i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <2b 2>;
dfsrr;
};
+ i2c@3100 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
+ compatible = "fsl-i2c";
+ reg = <3100 100>;
+ interrupts = <2b 2>;
+ interrupt-parent = <&mpic>;
+ dfsrr;
+ };
+
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
- device_type = "mdio";
- compatible = "gianfar";
+ compatible = "fsl,gianfar-mdio";
reg = <24520 20>;
+
phy0: ethernet-phy@0 {
interrupt-parent = <&mpic>;
interrupts = <a 1>;
};
};
- ethernet@24000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet0: ethernet@24000 {
+ cell-index = <0>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
phy-connection-type = "rgmii-id";
};
- ethernet@26000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet1: ethernet@26000 {
+ cell-index = <1>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
phy-connection-type = "rgmii-id";
};
- serial@4500 {
+ serial0: serial@4500 {
+ cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>;
interrupt-parent = <&mpic>;
};
- serial@4600 {
+ serial1: serial@4600 {
+ cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>;
};
};
- pci@e0008000 {
+ pci0: pci@e0008000 {
+ cell-index = <0>;
compatible = "fsl,mpc8540-pci";
device_type = "pci";
interrupt-map-mask = <f800 0 0 7>;
reg = <e0008000 1000>;
};
- pcie@e0009000 {
+ pci1: pcie@e0009000 {
+ cell-index = <1>;
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
};
};
- pcie@e000a000 {
+ pci2: pcie@e000a000 {
+ cell-index = <2>;
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
};
};
- pcie@e000b000 {
+ pci3: pcie@e000b000 {
+ cell-index = <3>;
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
};
};
};
-
};
};
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+/*
+ ethernet2 = &enet2;
+ ethernet3 = &enet3;
+*/
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ pci2 = &pci2;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
};
i2c@3000 {
- device_type = "i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <2b 2>;
dfsrr;
};
+ i2c@3100 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
+ compatible = "fsl-i2c";
+ reg = <3100 100>;
+ interrupts = <2b 2>;
+ interrupt-parent = <&mpic>;
+ dfsrr;
+ };
+
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
- device_type = "mdio";
- compatible = "gianfar";
+ compatible = "fsl,gianfar-mdio";
reg = <24520 20>;
+
phy0: ethernet-phy@0 {
interrupt-parent = <&mpic>;
interrupts = <5 1>;
};
};
- ethernet@24000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet0: ethernet@24000 {
+ cell-index = <0>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
phy-handle = <&phy0>;
};
- ethernet@25000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet1: ethernet@25000 {
+ cell-index = <1>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
};
/* eTSEC 3/4 are currently broken
- ethernet@26000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet2: ethernet@26000 {
+ cell-index = <2>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
phy-handle = <&phy2>;
};
- ethernet@27000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet3: ethernet@27000 {
+ cell-index = <3>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
};
*/
- serial@4500 {
+ serial0: serial@4500 {
+ cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>; // reg base, size
interrupt-parent = <&mpic>;
};
- serial@4600 {
+ serial1: serial@4600 {
+ cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>; // reg base, size
};
};
- pci@e0008000 {
+ pci0: pci@e0008000 {
+ cell-index = <0>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x4 (PCIX Slot 2) */
};
};
- pci@e0009000 {
+ pci1: pci@e0009000 {
+ cell-index = <1>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
device_type = "pci";
};
- pcie@e000a000 {
+ pci2: pcie@e000a000 {
+ cell-index = <2>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
};
i2c@3000 {
- device_type = "i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <2b 2>;
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
- device_type = "mdio";
- compatible = "gianfar";
+ compatible = "fsl,gianfar-mdio";
reg = <24520 20>;
+
phy0: ethernet-phy@0 {
interrupt-parent = <&mpic>;
interrupts = <5 1>;
};
};
- ethernet@24000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet0: ethernet@24000 {
+ cell-index = <0>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
phy-handle = <&phy0>;
};
- ethernet@25000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet1: ethernet@25000 {
+ cell-index = <1>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
phy-handle = <&phy1>;
};
- serial@4500 {
+ serial0: serial@4500 {
+ cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>; // reg base, size
interrupt-parent = <&mpic>;
};
- serial@4600 {
+ serial1: serial@4600 {
+ cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>; // reg base, size
};
};
- pci1: pci@e0008000 {
+ pci0: pci@e0008000 {
+ cell-index = <0>;
interrupt-map-mask = <1f800 0 0 7>;
interrupt-map = <
#interrupt-cells = <2>;
compatible = "chrp,iic";
interrupts = <1>;
- interrupt-parent = <&pci1>;
+ interrupt-parent = <&pci0>;
};
};
- pci@e0009000 {
+ pci1: pci@e0009000 {
+ cell-index = <1>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ ethernet3 = &enet3;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
};
mdio@24520 {
- device_type = "mdio";
- compatible = "gianfar";
- reg = <24520 20>;
#address-cells = <1>;
#size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <24520 20>;
+
phy0: ethernet-phy@0 {
interrupt-parent = <&mpic>;
interrupts = <5 1>;
};
};
- ethernet@24000 {
+ enet0: ethernet@24000 {
+ cell-index = <0>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <24000 1000>;
- /*
- * address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <1d 2 1e 2 22 2>;
interrupt-parent = <&mpic>;
phy-handle = <&phy0>;
};
- ethernet@25000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet1: ethernet@25000 {
+ cell-index = <1>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <25000 1000>;
- /*
- * address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <23 2 24 2 28 2>;
interrupt-parent = <&mpic>;
compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
};
- serial@91a00 {
+ serial0: serial@91a00 {
device_type = "serial";
compatible = "fsl,mpc8560-scc-uart",
"fsl,cpm2-scc-uart";
interrupt-parent = <&cpmpic>;
};
- serial@91a20 {
+ serial1: serial@91a20 {
device_type = "serial";
compatible = "fsl,mpc8560-scc-uart",
"fsl,cpm2-scc-uart";
interrupt-parent = <&cpmpic>;
};
- ethernet@91320 {
+ enet2: ethernet@91320 {
device_type = "network";
compatible = "fsl,mpc8560-fcc-enet",
"fsl,cpm2-fcc-enet";
reg = <91320 20 88500 100 913b0 1>;
- /*
- * mac-address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- mac-address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
fsl,cpm-command = <16200300>;
interrupts = <21 8>;
phy-handle = <&phy2>;
};
- ethernet@91340 {
+ enet3: ethernet@91340 {
device_type = "network";
compatible = "fsl,mpc8560-fcc-enet",
"fsl,cpm2-fcc-enet";
reg = <91340 20 88600 100 913d0 1>;
- /*
- * mac-address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- mac-address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
fsl,cpm-command = <1a400300>;
interrupts = <22 8>;
};
};
- pci@e0008000 {
+ pci0: pci@e0008000 {
+ cell-index = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ ethernet3 = &enet3;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
- device_type = "i2c";
+ cell-index = <0>;
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <2b 2>;
i2c@3100 {
#address-cells = <1>;
#size-cells = <0>;
- device_type = "i2c";
+ cell-index = <1>;
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <2b 2>;
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
- device_type = "mdio";
- compatible = "gianfar";
+ compatible = "fsl,gianfar-mdio";
reg = <24520 20>;
+
phy0: ethernet-phy@7 {
interrupt-parent = <&mpic>;
interrupts = <1 1>;
};
};
- ethernet@24000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet0: ethernet@24000 {
+ cell-index = <0>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <24000 1000>;
- /*
- * mac-address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- mac-address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <1d 2 1e 2 22 2>;
interrupt-parent = <&mpic>;
phy-handle = <&phy2>;
};
- ethernet@25000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet1: ethernet@25000 {
+ cell-index = <1>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <25000 1000>;
- /*
- * mac-address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- mac-address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <23 2 24 2 28 2>;
interrupt-parent = <&mpic>;
phy-handle = <&phy3>;
};
- serial@4500 {
+ serial0: serial@4500 {
+ cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>;
fsl,has-rstcr;
};
- serial@4600 {
+ serial1: serial@4600 {
+ cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>;
mode = "cpu";
};
- ucc@2000 {
+ enet2: ucc@2000 {
device_type = "network";
compatible = "ucc_geth";
model = "UCC";
+ cell-index = <1>;
device-id = <1>;
reg = <2000 200>;
interrupts = <20>;
interrupt-parent = <&qeic>;
- /*
- * mac-address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- mac-address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
- rx-clock = <0>;
- tx-clock = <20>;
+ rx-clock-name = "none";
+ tx-clock-name = "clk16";
pio-handle = <&pio1>;
phy-handle = <&phy0>;
phy-connection-type = "rgmii-id";
};
- ucc@3000 {
+ enet3: ucc@3000 {
device_type = "network";
compatible = "ucc_geth";
model = "UCC";
+ cell-index = <2>;
device-id = <2>;
reg = <3000 200>;
interrupts = <21>;
interrupt-parent = <&qeic>;
- /*
- * mac-address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- mac-address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
- rx-clock = <0>;
- tx-clock = <20>;
+ rx-clock-name = "none";
+ tx-clock-name = "clk16";
pio-handle = <&pio2>;
phy-handle = <&phy1>;
phy-connection-type = "rgmii-id";
#address-cells = <1>;
#size-cells = <0>;
reg = <2120 18>;
- device_type = "mdio";
compatible = "ucc_geth_phy";
/* These are the same PHYs as on
};
- pci@e0008000 {
+ pci0: pci@e0008000 {
+ cell-index = <0>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x12 AD18 */
};
/* PCI Express */
- pcie@e000a000 {
+ pci1: pcie@e000a000 {
+ cell-index = <2>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ ethernet3 = &enet3;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ pci2 = &pci2;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
};
i2c@3000 {
- device_type = "i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <2b 2>;
};
i2c@3100 {
- device_type = "i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <2b 2>;
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
- device_type = "mdio";
- compatible = "gianfar";
+ compatible = "fsl,gianfar-mdio";
reg = <24520 20>;
+
phy0: ethernet-phy@0 {
interrupt-parent = <&mpic>;
interrupts = <a 1>;
};
};
- ethernet@24000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet0: ethernet@24000 {
+ cell-index = <0>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
phy-connection-type = "rgmii-id";
};
- ethernet@25000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet1: ethernet@25000 {
+ cell-index = <1>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
phy-connection-type = "rgmii-id";
};
- ethernet@26000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet2: ethernet@26000 {
+ cell-index = <2>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
phy-connection-type = "rgmii-id";
};
- ethernet@27000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet3: ethernet@27000 {
+ cell-index = <3>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
phy-connection-type = "rgmii-id";
};
- serial@4500 {
+ serial0: serial@4500 {
+ cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>;
interrupt-parent = <&mpic>;
};
- serial@4600 {
+ serial1: serial@4600 {
+ cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>;
};
};
- pcie@ffe08000 {
+ pci0: pcie@ffe08000 {
+ cell-index = <0>;
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
};
- pcie@ffe09000 {
+ pci1: pcie@ffe09000 {
+ cell-index = <1>;
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
};
};
- pcie@ffe0a000 {
+ pci2: pcie@ffe0a000 {
+ cell-index = <2>;
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
bus-frequency = <0>;
i2c@3000 {
- device_type = "i2c";
- compatible = "fsl-i2c";
#address-cells = <1>;
#size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <2b 2>;
interrupt-parent = <&mpic>;
};
i2c@3100 {
- device_type = "i2c";
- compatible = "fsl-i2c";
#address-cells = <1>;
#size-cells = <0>;
+ cell-index = <1>;
+ compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <2b 2>;
interrupt-parent = <&mpic>;
dfsrr;
};
- serial@4500 {
+ serial0: serial@4500 {
+ cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>;
interrupt-parent = <&mpic>;
};
- serial@4600 {
+ serial1: serial@4600 {
+ cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>;
interrupt-parent = <&mpic>;
};
-
mpic: interrupt-controller@40000 {
clock-frequency = <0>;
interrupt-controller;
};
};
- pci@e0008000 {
+ pci0: pci@e0008000 {
+ cell-index = <0>;
compatible = "fsl,mpc8610-pci";
device_type = "pci";
#interrupt-cells = <1>;
>;
};
- pcie@e000a000 {
+ pci1: pcie@e000a000 {
+ cell-index = <1>;
compatible = "fsl,mpc8641-pcie";
device_type = "pci";
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ ethernet3 = &enet3;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
bus-frequency = <0>;
i2c@3000 {
- device_type = "i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <2b 2>;
};
i2c@3100 {
- device_type = "i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <2b 2>;
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
- device_type = "mdio";
- compatible = "gianfar";
+ compatible = "fsl,gianfar-mdio";
reg = <24520 20>;
+
phy0: ethernet-phy@0 {
interrupt-parent = <&mpic>;
interrupts = <a 1>;
};
};
- ethernet@24000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet0: ethernet@24000 {
+ cell-index = <0>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <24000 1000>;
- /*
- * mac-address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- mac-address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <1d 2 1e 2 22 2>;
interrupt-parent = <&mpic>;
phy-connection-type = "rgmii-id";
};
- ethernet@25000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet1: ethernet@25000 {
+ cell-index = <1>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <25000 1000>;
- /*
- * mac-address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- mac-address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <23 2 24 2 28 2>;
interrupt-parent = <&mpic>;
phy-connection-type = "rgmii-id";
};
- ethernet@26000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet2: ethernet@26000 {
+ cell-index = <2>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <26000 1000>;
- /*
- * mac-address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- mac-address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <1F 2 20 2 21 2>;
interrupt-parent = <&mpic>;
phy-connection-type = "rgmii-id";
};
- ethernet@27000 {
- #address-cells = <1>;
- #size-cells = <0>;
+ enet3: ethernet@27000 {
+ cell-index = <3>;
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <27000 1000>;
- /*
- * mac-address is deprecated and will be removed
- * in 2.6.25. Only recent versions of
- * U-Boot support local-mac-address, however.
- */
- mac-address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <25 2 26 2 27 2>;
interrupt-parent = <&mpic>;
phy-handle = <&phy3>;
phy-connection-type = "rgmii-id";
};
- serial@4500 {
+
+ serial0: serial@4500 {
+ cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>;
interrupt-parent = <&mpic>;
};
- serial@4600 {
+ serial1: serial@4600 {
+ cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>;
};
};
- pcie@f8008000 {
+ pci0: pcie@f8008000 {
+ cell-index = <0>;
compatible = "fsl,mpc8641-pcie";
device_type = "pci";
#interrupt-cells = <1>;
};
- pcie@f8009000 {
+ pci1: pcie@f8009000 {
+ cell-index = <1>;
compatible = "fsl,mpc8641-pcie";
device_type = "pci";
#interrupt-cells = <1>;
/ {
model = "MPC866ADS";
- compatible = "mpc8xx";
+ compatible = "fsl,mpc866ads";
#address-cells = <1>;
#size-cells = <1>;
PowerPC,866@0 {
device_type = "cpu";
reg = <0>;
- d-cache-line-size = <20>; // 32 bytes
- i-cache-line-size = <20>; // 32 bytes
+ d-cache-line-size = <10>; // 16 bytes
+ i-cache-line-size = <10>; // 16 bytes
d-cache-size = <2000>; // L1, 8K
i-cache-size = <4000>; // L1, 16K
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
interrupts = <f 2>; // decrementer interrupt
- interrupt-parent = <&Mpc8xx_pic>;
+ interrupt-parent = <&PIC>;
};
};
reg = <00000000 800000>;
};
- soc866@ff000000 {
+ localbus@ff000100 {
+ compatible = "fsl,mpc866-localbus", "fsl,pq1-localbus";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ reg = <ff000100 40>;
+
+ ranges = <
+ 1 0 ff080000 00008000
+ 5 0 ff0a0000 00008000
+ >;
+
+ board-control@1,0 {
+ reg = <1 0 20 5 300 4>;
+ compatible = "fsl,mpc866ads-bcsr";
+ };
+ };
+
+ soc@ff000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
ranges = <0 ff000000 00100000>;
reg = <ff000000 00000200>;
bus-frequency = <0>;
- mdio@e80 {
- device_type = "mdio";
- compatible = "fs_enet";
- reg = <e80 8>;
+
+ mdio@e00 {
+ compatible = "fsl,mpc866-fec-mdio", "fsl,pq1-fec-mdio";
+ reg = <e00 188>;
#address-cells = <1>;
#size-cells = <0>;
- phy: ethernet-phy@f {
+ PHY: ethernet-phy@f {
reg = <f>;
device_type = "ethernet-phy";
};
};
- fec@e00 {
+ ethernet@e00 {
device_type = "network";
- compatible = "fs_enet";
- model = "FEC";
- device-id = <1>;
+ compatible = "fsl,mpc866-fec-enet",
+ "fsl,pq1-fec-enet";
reg = <e00 188>;
- mac-address = [ 00 00 0C 00 01 FD ];
+ local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <3 1>;
- interrupt-parent = <&Mpc8xx_pic>;
- phy-handle = <&Phy>;
+ interrupt-parent = <&PIC>;
+ phy-handle = <&PHY>;
+ linux,network-index = <0>;
};
- mpc8xx_pic: pic@ff000000 {
+ PIC: pic@0 {
interrupt-controller;
- #address-cells = <0>;
#interrupt-cells = <2>;
reg = <0 24>;
- device_type = "mpc8xx-pic";
- compatible = "CPM";
+ compatible = "fsl,mpc866-pic", "fsl,pq1-pic";
};
- cpm@ff000000 {
+ cpm@9c0 {
#address-cells = <1>;
#size-cells = <1>;
- device_type = "cpm";
- model = "CPM";
- ranges = <0 0 4000>;
- reg = <860 f0>;
- command-proc = <9c0>;
+ compatible = "fsl,mpc866-cpm", "fsl,cpm1";
+ ranges;
+ reg = <9c0 40>;
brg-frequency = <0>;
interrupts = <0 2>; // cpm error interrupt
- interrupt-parent = <&Cpm_pic>;
+ interrupt-parent = <&CPM_PIC>;
- cpm_pic: pic@930 {
+ muram@2000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 2000 2000>;
+
+ data@0 {
+ compatible = "fsl,cpm-muram-data";
+ reg = <0 1c00>;
+ };
+ };
+
+ brg@9f0 {
+ compatible = "fsl,mpc866-brg",
+ "fsl,cpm1-brg",
+ "fsl,cpm-brg";
+ reg = <9f0 10>;
+ clock-frequency = <0>;
+ };
+
+ CPM_PIC: pic@930 {
interrupt-controller;
#address-cells = <0>;
- #interrupt-cells = <2>;
+ #interrupt-cells = <1>;
interrupts = <5 2 0 2>;
- interrupt-parent = <&Mpc8xx_pic>;
+ interrupt-parent = <&PIC>;
reg = <930 20>;
- device_type = "cpm-pic";
- compatible = "CPM";
+ compatible = "fsl,mpc866-cpm-pic",
+ "fsl,cpm1-pic";
};
- smc@a80 {
+
+ serial@a80 {
device_type = "serial";
- compatible = "cpm_uart";
- model = "SMC";
- device-id = <1>;
+ compatible = "fsl,mpc866-smc-uart",
+ "fsl,cpm1-smc-uart";
reg = <a80 10 3e80 40>;
- clock-setup = <00ffffff 0>;
- rx-clock = <1>;
- tx-clock = <1>;
- current-speed = <0>;
- interrupts = <4 3>;
- interrupt-parent = <&Cpm_pic>;
+ interrupts = <4>;
+ interrupt-parent = <&CPM_PIC>;
+ fsl,cpm-brg = <1>;
+ fsl,cpm-command = <0090>;
};
- smc@a90 {
+ serial@a90 {
device_type = "serial";
- compatible = "cpm_uart";
- model = "SMC";
- device-id = <2>;
- reg = <a90 20 3f80 40>;
- clock-setup = <ff00ffff 90000>;
- rx-clock = <2>;
- tx-clock = <2>;
- current-speed = <0>;
- interrupts = <3 3>;
- interrupt-parent = <&Cpm_pic>;
+ compatible = "fsl,mpc866-smc-uart",
+ "fsl,cpm1-smc-uart";
+ reg = <a90 10 3f80 40>;
+ interrupts = <3>;
+ interrupt-parent = <&CPM_PIC>;
+ fsl,cpm-brg = <2>;
+ fsl,cpm-command = <00d0>;
};
- scc@a00 {
+ ethernet@a00 {
device_type = "network";
- compatible = "fs_enet";
- model = "SCC";
- device-id = <1>;
- reg = <a00 18 3c00 80>;
- mac-address = [ 00 00 0C 00 03 FD ];
- interrupts = <1e 3>;
- interrupt-parent = <&Cpm_pic>;
+ compatible = "fsl,mpc866-scc-enet",
+ "fsl,cpm1-scc-enet";
+ reg = <a00 18 3c00 100>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <1e>;
+ interrupt-parent = <&CPM_PIC>;
+ fsl,cpm-command = <0000>;
+ linux,network-index = <1>;
};
};
};
+
+ chosen {
+ linux,stdout-path = "/soc/cpm/serial@a80";
+ };
};
--- /dev/null
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.23
+# Wed Oct 10 16:31:39 2007
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+CONFIG_6xx=y
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_83xx=y
+CONFIG_PPC_FPU=y
+CONFIG_PPC_STD_MMU=y
+CONFIG_PPC_STD_MMU_32=y
+# CONFIG_PPC_MM_SLICES is not set
+# CONFIG_SMP is not set
+CONFIG_PPC32=y
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_IRQ_PER_CPU=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+CONFIG_PPC_UDBG_16550=y
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFAULT_UIMAGE=y
+# CONFIG_PPC_DCR_NATIVE is not set
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_SYSFS_DEPRECATED=y
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+# CONFIG_EPOLL is not set
+CONFIG_SIGNALFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_KMOD is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+
+#
+# Platform support
+#
+# CONFIG_PPC_MULTIPLATFORM is not set
+# CONFIG_EMBEDDED6xx is not set
+# CONFIG_PPC_82xx is not set
+CONFIG_PPC_83xx=y
+# CONFIG_PPC_86xx is not set
+# CONFIG_PPC_MPC52xx is not set
+# CONFIG_PPC_MPC5200 is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PQ2ADS is not set
+# CONFIG_MPC8313_RDB is not set
+# CONFIG_MPC832x_MDS is not set
+# CONFIG_MPC832x_RDB is not set
+# CONFIG_MPC834x_MDS is not set
+# CONFIG_MPC834x_ITX is not set
+# CONFIG_MPC836x_MDS is not set
+CONFIG_MPC837x_MDS=y
+CONFIG_PPC_MPC837x=y
+# CONFIG_MPIC is not set
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPM2 is not set
+# CONFIG_FSL_ULI1575 is not set
+CONFIG_FSL_SERDES=y
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_PROC_DEVICETREE=y
+# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_PM is not set
+CONFIG_SUSPEND_UP_POSSIBLE=y
+CONFIG_HIBERNATION_UP_POSSIBLE=y
+CONFIG_SECCOMP=y
+CONFIG_WANT_DEVICE_TREE=y
+CONFIG_DEVICE_TREE=""
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_GENERIC_ISA_DMA=y
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_FSL_SOC=y
+# CONFIG_PCI is not set
+# CONFIG_PCI_DOMAINS is not set
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0x80000000
+CONFIG_BOOT_LOAD=0x00800000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=m
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+# CONFIG_MTD is not set
+CONFIG_OF_DEVICE=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=32768
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_DEBUG is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_SATA_FSL=y
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_MD is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+CONFIG_MARVELL_PHY=y
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_FIXED_PHY is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+CONFIG_NETDEV_1000=y
+CONFIG_GIANFAR=y
+# CONFIG_GFAR_NAPI is not set
+CONFIG_NETDEV_10000=y
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_OF_PLATFORM is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_83xx_WDT=y
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+CONFIG_GEN_RTC=y
+# CONFIG_GEN_RTC_X is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+CONFIG_I2C_MPC=y
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_M41T00 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_ABITUGURU is not set
+# CONFIG_SENSORS_ABITUGURU3 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ASB100 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_FSCHER is not set
+# CONFIG_SENSORS_FSCPOS is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+CONFIG_DAB=y
+
+#
+# Graphics support
+#
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=m
+# CONFIG_FB is not set
+# CONFIG_FB_IBM_GXT4500 is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+CONFIG_USB_ARCH_HAS_EHCI=y
+# CONFIG_USB is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+# CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_EDAC is not set
+# CONFIG_RTC_CLASS is not set
+
+#
+# DMA Engine support
+#
+# CONFIG_DMA_ENGINE is not set
+
+#
+# DMA Clients
+#
+
+#
+# DMA Devices
+#
+
+#
+# Userspace I/O
+#
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_BIND34 is not set
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Distributed Lock Manager
+#
+# CONFIG_DLM is not set
+# CONFIG_UCC_SLOW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+
+#
+# Instrumentation Support
+#
+# CONFIG_PROFILING is not set
+# CONFIG_KPROBES is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_MUST_CHECK=y
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_ECB=m
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_TEST is not set
+CONFIG_CRYPTO_HW=y
.cpu_setup = __setup_cpu_603,
.platform = "ppc603",
},
- { /* e300c3 on 83xx */
+ { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
.pvr_mask = 0x7fff0000,
.pvr_value = 0x00850000,
.cpu_name = "e300c3",
.cpu_setup = __setup_cpu_603,
.platform = "ppc603",
},
+ { /* e300c4 (e300c1, plus one IU) */
+ .pvr_mask = 0x7fff0000,
+ .pvr_value = 0x00860000,
+ .cpu_name = "e300c4",
+ .cpu_features = CPU_FTRS_E300,
+ .cpu_user_features = COMMON_USER,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ .cpu_setup = __setup_cpu_603,
+ .platform = "ppc603",
+ },
{ /* default match, we assume split I/D cache & TB (non-601)... */
.pvr_mask = 0x00000000,
.pvr_value = 0x00000000,
#define INST_POPCNTB 0x7c0000f4
#define INST_POPCNTB_MASK 0xfc0007fe
+#define INST_ISEL 0x7c00001e
+#define INST_ISEL_MASK 0xfc00003e
+
static int emulate_string_inst(struct pt_regs *regs, u32 instword)
{
u8 rT = (instword >> 21) & 0x1f;
return 0;
}
+static int emulate_isel(struct pt_regs *regs, u32 instword)
+{
+ u8 rT = (instword >> 21) & 0x1f;
+ u8 rA = (instword >> 16) & 0x1f;
+ u8 rB = (instword >> 11) & 0x1f;
+ u8 BC = (instword >> 6) & 0x1f;
+ u8 bit;
+ unsigned long tmp;
+
+ tmp = (rA == 0) ? 0 : regs->gpr[rA];
+ bit = (regs->ccr >> (31 - BC)) & 0x1;
+
+ regs->gpr[rT] = bit ? tmp : regs->gpr[rB];
+
+ return 0;
+}
+
static int emulate_instruction(struct pt_regs *regs)
{
u32 instword;
return emulate_popcntb_inst(regs, instword);
}
+ /* Emulate isel (Integer Select) instruction */
+ if ((instword & INST_ISEL_MASK) == INST_ISEL) {
+ return emulate_isel(regs, instword);
+ }
+
return -EINVAL;
}
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/fsl_devices.h>
+#include <linux/of_platform.h>
#include <asm/io.h>
#include <asm/cpm2.h>
#include <asm/udbg.h>
#include <asm/machdep.h>
-#include <asm/of_platform.h>
#include <asm/time.h>
#include <sysdev/fsl_soc.h>
help
This option enables support for the MPC836x MDS Processor Board.
+config MPC837x_MDS
+ bool "Freescale MPC837x MDS"
+ select DEFAULT_UIMAGE
+ help
+ This option enables support for the MPC837x MDS Processor Board.
endchoice
config PPC_MPC831x
select PPC_UDBG_16550
select PPC_INDIRECT_PCI
default y if MPC836x_MDS
+
+config PPC_MPC837x
+ bool
+ select PPC_UDBG_16550
+ select PPC_INDIRECT_PCI
+ default y if MPC837x_MDS
obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o
obj-$(CONFIG_MPC836x_MDS) += mpc836x_mds.o
obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o
+obj-$(CONFIG_MPC837x_MDS) += mpc837x_mds.o
*/
static int __init mpc8313_rdb_probe(void)
{
- unsigned long root = of_get_flat_dt_root();
+ unsigned long root = of_get_flat_dt_root();
- return of_flat_dt_is_compatible(root, "MPC8313ERDB");
+ return of_flat_dt_is_compatible(root, "MPC8313ERDB");
}
define_machine(mpc8313_rdb) {
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <linux/initrd.h>
+#include <linux/of_platform.h>
+#include <linux/of_device.h>
-#include <asm/of_device.h>
-#include <asm/of_platform.h>
#include <asm/system.h>
#include <asm/atomic.h>
#include <asm/time.h>
#include <linux/spi/spi.h>
#include <linux/spi/mmc_spi.h>
#include <linux/mmc/host.h>
+#include <linux/of_platform.h>
-#include <asm/of_platform.h>
#include <asm/time.h>
#include <asm/ipic.h>
#include <asm/udbg.h>
#include <linux/delay.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
+#include <linux/of_platform.h>
#include <asm/system.h>
#include <asm/atomic.h>
ipic_set_default_priority();
}
+static struct of_device_id mpc834x_ids[] = {
+ { .type = "soc", },
+ { .compatible = "soc", },
+ {},
+};
+
+static int __init mpc834x_declare_of_platform_devices(void)
+{
+ if (!machine_is(mpc834x_mds))
+ return 0;
+
+ of_platform_bus_probe(NULL, mpc834x_ids, NULL);
+ return 0;
+}
+device_initcall(mpc834x_declare_of_platform_devices);
+
/*
* Called very early, MMU is off, device-tree isn't unflattened
*/
static int __init mpc834x_mds_probe(void)
{
- unsigned long root = of_get_flat_dt_root();
+ unsigned long root = of_get_flat_dt_root();
- return of_flat_dt_is_compatible(root, "MPC834xMDS");
+ return of_flat_dt_is_compatible(root, "MPC834xMDS");
}
define_machine(mpc834x_mds) {
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <linux/initrd.h>
+#include <linux/of_platform.h>
+#include <linux/of_device.h>
-#include <asm/of_device.h>
-#include <asm/of_platform.h>
#include <asm/system.h>
#include <asm/atomic.h>
#include <asm/time.h>
--- /dev/null
+/*
+ * arch/powerpc/platforms/83xx/mpc837x_mds.c
+ *
+ * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * MPC837x MDS board specific routines
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/pci.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+
+#include <asm/time.h>
+#include <asm/ipic.h>
+#include <asm/udbg.h>
+#include <asm/prom.h>
+
+#include "mpc83xx.h"
+
+#ifndef CONFIG_PCI
+unsigned long isa_io_base = 0;
+unsigned long isa_mem_base = 0;
+#endif
+
+/* ************************************************************************
+ *
+ * Setup the architecture
+ *
+ */
+static void __init mpc837x_mds_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+ struct device_node *np;
+#endif
+
+ if (ppc_md.progress)
+ ppc_md.progress("mpc837x_mds_setup_arch()", 0);
+
+#ifdef CONFIG_PCI
+ for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
+ mpc83xx_add_bridge(np);
+#endif
+}
+
+static struct of_device_id mpc837x_ids[] = {
+ { .type = "soc", },
+ { .compatible = "soc", },
+ {},
+};
+
+static int __init mpc837x_declare_of_platform_devices(void)
+{
+ if (!machine_is(mpc837x_mds))
+ return 0;
+
+ /* Publish of_device */
+ of_platform_bus_probe(NULL, mpc837x_ids, NULL);
+
+ return 0;
+}
+device_initcall(mpc837x_declare_of_platform_devices);
+
+static void __init mpc837x_mds_init_IRQ(void)
+{
+ struct device_node *np;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,ipic");
+ if (!np)
+ return;
+
+ ipic_init(np, 0);
+
+ /* Initialize the default interrupt mapping priorities,
+ * in case the boot rom changed something on us.
+ */
+ ipic_set_default_priority();
+}
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init mpc837x_mds_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ return of_flat_dt_is_compatible(root, "fsl,mpc837xmds");
+}
+
+define_machine(mpc837x_mds) {
+ .name = "MPC837x MDS",
+ .probe = mpc837x_mds_probe,
+ .setup_arch = mpc837x_mds_setup_arch,
+ .init_IRQ = mpc837x_mds_init_IRQ,
+ .get_irq = ipic_get_irq,
+ .restart = mpc83xx_restart,
+ .time_init = mpc83xx_time_init,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
#include <linux/initrd.h>
#include <linux/module.h>
#include <linux/fsl_devices.h>
+#include <linux/of_platform.h>
+#include <linux/of_device.h>
-#include <asm/of_device.h>
-#include <asm/of_platform.h>
#include <asm/system.h>
#include <asm/atomic.h>
#include <asm/time.h>
config MPC86XADS
bool "MPC86XADS"
select CPM1
+ select PPC_CPM_NEW_BINDING
help
MPC86x Application Development System by Freescale Semiconductor.
The MPC86xADS is meant to serve as a platform for s/w and h/w
#ifndef __ASM_MPC86XADS_H__
#define __ASM_MPC86XADS_H__
-#include <sysdev/fsl_soc.h>
-
-/* U-Boot maps BCSR to 0xff080000 */
-#define BCSR_ADDR ((uint)0xff080000)
-#define BCSR_SIZE ((uint)32)
-#define BCSR0 ((uint)(BCSR_ADDR + 0x00))
-#define BCSR1 ((uint)(BCSR_ADDR + 0x04))
-#define BCSR2 ((uint)(BCSR_ADDR + 0x08))
-#define BCSR3 ((uint)(BCSR_ADDR + 0x0c))
-#define BCSR4 ((uint)(BCSR_ADDR + 0x10))
-
-#define CFG_PHYDEV_ADDR ((uint)0xff0a0000)
-#define BCSR5 ((uint)(CFG_PHYDEV_ADDR + 0x300))
-
-#define MPC8xx_CPM_OFFSET (0x9c0)
-#define CPM_MAP_ADDR (get_immrbase() + MPC8xx_CPM_OFFSET)
-#define CPM_IRQ_OFFSET 16 // for compability with cpm_uart driver
-
-#define PCMCIA_MEM_ADDR ((uint)0xff020000)
-#define PCMCIA_MEM_SIZE ((uint)(64 * 1024))
-
/* Bits of interest in the BCSRs.
*/
#define BCSR1_ETHEN ((uint)0x20000000)
#define BCSR5_MII1_EN 0x02
#define BCSR5_MII1_RST 0x01
-/* Interrupt level assignments */
-#define PHY_INTERRUPT SIU_IRQ7 /* PHY link change interrupt */
-#define SIU_INT_FEC1 SIU_LEVEL1 /* FEC1 interrupt */
-#define FEC_INTERRUPT SIU_INT_FEC1 /* FEC interrupt */
-
-/* We don't use the 8259 */
-#define NR_8259_INTS 0
-
-/* CPM Ethernet through SCC1 */
-#define PA_ENET_RXD ((ushort)0x0001)
-#define PA_ENET_TXD ((ushort)0x0002)
-#define PA_ENET_TCLK ((ushort)0x0100)
-#define PA_ENET_RCLK ((ushort)0x0200)
-#define PB_ENET_TENA ((uint)0x00001000)
-#define PC_ENET_CLSN ((ushort)0x0010)
-#define PC_ENET_RENA ((ushort)0x0020)
-
-/* Control bits in the SICR to route TCLK (CLK1) and RCLK (CLK2) to
- * SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero.
- */
-#define SICR_ENET_MASK ((uint)0x000000ff)
-#define SICR_ENET_CLKRT ((uint)0x0000002c)
-
#endif /* __ASM_MPC86XADS_H__ */
#endif /* __KERNEL__ */
*
* Copyright 2005 MontaVista Software Inc.
*
+ * Heavily modified by Scott Wood <scottwood@freescale.com>
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ *
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/ioport.h>
-#include <linux/device.h>
-#include <linux/delay.h>
-#include <linux/root_dev.h>
-
-#include <linux/fs_enet_pd.h>
-#include <linux/fs_uart_pd.h>
-#include <linux/mii.h>
+#include <linux/of_platform.h>
-#include <asm/delay.h>
#include <asm/io.h>
#include <asm/machdep.h>
-#include <asm/page.h>
-#include <asm/processor.h>
#include <asm/system.h>
#include <asm/time.h>
#include <asm/mpc8xx.h>
#include <asm/8xx_immap.h>
#include <asm/commproc.h>
#include <asm/fs_pd.h>
-#include <asm/prom.h>
+#include <asm/udbg.h>
#include <sysdev/commproc.h>
-static void init_smc1_uart_ioports(struct fs_uart_platform_info* fpi);
-static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi);
-static void init_scc1_ioports(struct fs_platform_info* ptr);
-
-void __init mpc86xads_board_setup(void)
-{
- cpm8xx_t *cp;
- unsigned int *bcsr_io;
- u8 tmpval8;
-
- bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
- cp = (cpm8xx_t *)immr_map(im_cpm);
-
- if (bcsr_io == NULL) {
- printk(KERN_CRIT "Could not remap BCSR\n");
- return;
- }
-#ifdef CONFIG_SERIAL_CPM_SMC1
- clrbits32(bcsr_io, BCSR1_RS232EN_1);
- clrbits32(&cp->cp_simode, 0xe0000000 >> 17); /* brg1 */
- tmpval8 = in_8(&(cp->cp_smc[0].smc_smcm)) | (SMCM_RX | SMCM_TX);
- out_8(&(cp->cp_smc[0].smc_smcm), tmpval8);
- clrbits16(&cp->cp_smc[0].smc_smcmr, SMCMR_REN | SMCMR_TEN);
-#else
- setbits32(bcsr_io,BCSR1_RS232EN_1);
- out_be16(&cp->cp_smc[0].smc_smcmr, 0);
- out_8(&cp->cp_smc[0].smc_smce, 0);
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SMC2
- clrbits32(bcsr_io,BCSR1_RS232EN_2);
- clrbits32(&cp->cp_simode, 0xe0000000 >> 1);
- setbits32(&cp->cp_simode, 0x20000000 >> 1); /* brg2 */
- tmpval8 = in_8(&(cp->cp_smc[1].smc_smcm)) | (SMCM_RX | SMCM_TX);
- out_8(&(cp->cp_smc[1].smc_smcm), tmpval8);
- clrbits16(&cp->cp_smc[1].smc_smcmr, SMCMR_REN | SMCMR_TEN);
+#include "mpc86xads.h"
- init_smc2_uart_ioports(0);
-#else
- setbits32(bcsr_io,BCSR1_RS232EN_2);
- out_be16(&cp->cp_smc[1].smc_smcmr, 0);
- out_8(&cp->cp_smc[1].smc_smce, 0);
-#endif
- immr_unmap(cp);
- iounmap(bcsr_io);
-}
+struct cpm_pin {
+ int port, pin, flags;
+};
+static struct cpm_pin mpc866ads_pins[] = {
+ /* SMC1 */
+ {CPM_PORTB, 24, CPM_PIN_INPUT}, /* RX */
+ {CPM_PORTB, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
+
+ /* SMC2 */
+ {CPM_PORTB, 21, CPM_PIN_INPUT}, /* RX */
+ {CPM_PORTB, 20, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
+
+ /* SCC1 */
+ {CPM_PORTA, 6, CPM_PIN_INPUT}, /* CLK1 */
+ {CPM_PORTA, 7, CPM_PIN_INPUT}, /* CLK2 */
+ {CPM_PORTA, 14, CPM_PIN_INPUT}, /* TX */
+ {CPM_PORTA, 15, CPM_PIN_INPUT}, /* RX */
+ {CPM_PORTB, 19, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TENA */
+ {CPM_PORTC, 10, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* RENA */
+ {CPM_PORTC, 11, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CLSN */
+
+ /* MII */
+ {CPM_PORTD, 3, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 4, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 5, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 6, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 7, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 8, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 9, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 10, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 11, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 12, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 13, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 14, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 15, CPM_PIN_OUTPUT},
+};
-static void init_fec1_ioports(struct fs_platform_info* ptr)
+static void __init init_ioports(void)
{
- iop8xx_t *io_port = (iop8xx_t *)immr_map(im_ioport);
+ int i;
- /* configure FEC1 pins */
+ for (i = 0; i < ARRAY_SIZE(mpc866ads_pins); i++) {
+ struct cpm_pin *pin = &mpc866ads_pins[i];
+ cpm1_set_pin(pin->port, pin->pin, pin->flags);
+ }
- setbits16(&io_port->iop_pdpar, 0x1fff);
- setbits16(&io_port->iop_pddir, 0x1fff);
+ cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
+ cpm1_clk_setup(CPM_CLK_SMC2, CPM_BRG2, CPM_CLK_RTX);
+ cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK1, CPM_CLK_TX);
+ cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_RX);
- immr_unmap(io_port);
+ /* Set FEC1 and FEC2 to MII mode */
+ clrbits32(&mpc8xx_immr->im_cpm.cp_cptr, 0x00000180);
}
-void init_fec_ioports(struct fs_platform_info *fpi)
+static void __init mpc86xads_setup_arch(void)
{
- int fec_no = fs_get_fec_index(fpi->fs_no);
+ struct device_node *np;
+ u32 __iomem *bcsr_io;
+
+ cpm_reset();
+ init_ioports();
- switch (fec_no) {
- case 0:
- init_fec1_ioports(fpi);
- break;
- default:
- printk(KERN_ERR "init_fec_ioports: invalid FEC number\n");
+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc866ads-bcsr");
+ if (!np) {
+ printk(KERN_CRIT "Could not find fsl,mpc866ads-bcsr node\n");
return;
}
-}
-static void init_scc1_ioports(struct fs_platform_info* fpi)
-{
- unsigned *bcsr_io;
- iop8xx_t *io_port;
- cpm8xx_t *cp;
-
- bcsr_io = ioremap(BCSR_ADDR, BCSR_SIZE);
- io_port = (iop8xx_t *)immr_map(im_ioport);
- cp = (cpm8xx_t *)immr_map(im_cpm);
+ bcsr_io = of_iomap(np, 0);
+ of_node_put(np);
if (bcsr_io == NULL) {
printk(KERN_CRIT "Could not remap BCSR\n");
return;
}
- /* Configure port A pins for Txd and Rxd.
- */
- setbits16(&io_port->iop_papar, PA_ENET_RXD | PA_ENET_TXD);
- clrbits16(&io_port->iop_padir, PA_ENET_RXD | PA_ENET_TXD);
- clrbits16(&io_port->iop_paodr, PA_ENET_TXD);
-
- /* Configure port C pins to enable CLSN and RENA.
- */
- clrbits16(&io_port->iop_pcpar, PC_ENET_CLSN | PC_ENET_RENA);
- clrbits16(&io_port->iop_pcdir, PC_ENET_CLSN | PC_ENET_RENA);
- setbits16(&io_port->iop_pcso, PC_ENET_CLSN | PC_ENET_RENA);
-
- /* Configure port A for TCLK and RCLK.
- */
- setbits16(&io_port->iop_papar, PA_ENET_TCLK | PA_ENET_RCLK);
- clrbits16(&io_port->iop_padir, PA_ENET_TCLK | PA_ENET_RCLK);
- clrbits32(&cp->cp_pbpar, PB_ENET_TENA);
- clrbits32(&cp->cp_pbdir, PB_ENET_TENA);
-
- /* Configure Serial Interface clock routing.
- * First, clear all SCC bits to zero, then set the ones we want.
- */
- clrbits32(&cp->cp_sicr, SICR_ENET_MASK);
- setbits32(&cp->cp_sicr, SICR_ENET_CLKRT);
-
- /* In the original SCC enet driver the following code is placed at
- the end of the initialization */
- setbits32(&cp->cp_pbpar, PB_ENET_TENA);
- setbits32(&cp->cp_pbdir, PB_ENET_TENA);
-
- clrbits32(bcsr_io+1, BCSR1_ETHEN);
+ clrbits32(bcsr_io, BCSR1_RS232EN_1 | BCSR1_RS232EN_2 | BCSR1_ETHEN);
iounmap(bcsr_io);
- immr_unmap(cp);
- immr_unmap(io_port);
-}
-
-void init_scc_ioports(struct fs_platform_info *fpi)
-{
- int scc_no = fs_get_scc_index(fpi->fs_no);
-
- switch (scc_no) {
- case 0:
- init_scc1_ioports(fpi);
- break;
- default:
- printk(KERN_ERR "init_scc_ioports: invalid SCC number\n");
- return;
- }
}
-
-
-static void init_smc1_uart_ioports(struct fs_uart_platform_info* ptr)
+static int __init mpc86xads_probe(void)
{
- unsigned *bcsr_io;
- cpm8xx_t *cp = (cpm8xx_t *)immr_map(im_cpm);
-
- setbits32(&cp->cp_pbpar, 0x000000c0);
- clrbits32(&cp->cp_pbdir, 0x000000c0);
- clrbits16(&cp->cp_pbodr, 0x00c0);
- immr_unmap(cp);
-
- bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
-
- if (bcsr_io == NULL) {
- printk(KERN_CRIT "Could not remap BCSR1\n");
- return;
- }
- clrbits32(bcsr_io,BCSR1_RS232EN_1);
- iounmap(bcsr_io);
+ unsigned long root = of_get_flat_dt_root();
+ return of_flat_dt_is_compatible(root, "fsl,mpc866ads");
}
-static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi)
-{
- unsigned *bcsr_io;
- cpm8xx_t *cp = (cpm8xx_t *)immr_map(im_cpm);
-
- setbits32(&cp->cp_pbpar, 0x00000c00);
- clrbits32(&cp->cp_pbdir, 0x00000c00);
- clrbits16(&cp->cp_pbodr, 0x0c00);
- immr_unmap(cp);
-
- bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
-
- if (bcsr_io == NULL) {
- printk(KERN_CRIT "Could not remap BCSR1\n");
- return;
- }
- clrbits32(bcsr_io,BCSR1_RS232EN_2);
- iounmap(bcsr_io);
-}
+static struct of_device_id __initdata of_bus_ids[] = {
+ { .name = "soc", },
+ { .name = "cpm", },
+ { .name = "localbus", },
+ {},
+};
-void init_smc_ioports(struct fs_uart_platform_info *data)
+static int __init declare_of_platform_devices(void)
{
- int smc_no = fs_uart_id_fsid2smc(data->fs_no);
+ if (machine_is(mpc86x_ads))
+ of_platform_bus_probe(NULL, of_bus_ids, NULL);
- switch (smc_no) {
- case 0:
- init_smc1_uart_ioports(data);
- data->brg = data->clk_rx;
- break;
- case 1:
- init_smc2_uart_ioports(data);
- data->brg = data->clk_rx;
- break;
- default:
- printk(KERN_ERR "init_scc_ioports: invalid SCC number\n");
- return;
- }
-}
-
-int platform_device_skip(const char *model, int id)
-{
return 0;
}
-
-static void __init mpc86xads_setup_arch(void)
-{
- cpm_reset();
-
- mpc86xads_board_setup();
-
- ROOT_DEV = Root_NFS;
-}
-
-static int __init mpc86xads_probe(void)
-{
- char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
- "model", NULL);
- if (model == NULL)
- return 0;
- if (strcmp(model, "MPC866ADS"))
- return 0;
-
- return 1;
-}
+device_initcall(declare_of_platform_devices);
define_machine(mpc86x_ads) {
.name = "MPC86x ADS",
.calibrate_decr = mpc8xx_calibrate_decr,
.set_rtc_time = mpc8xx_set_rtc_time,
.get_rtc_time = mpc8xx_get_rtc_time,
+ .progress = udbg_progress,
};
#endif
}
+static DEFINE_SPINLOCK(cmd_lock);
+
+#define MAX_CR_CMD_LOOPS 10000
+
+int cpm_command(u32 command, u8 opcode)
+{
+ int i, ret;
+ unsigned long flags;
+
+ if (command & 0xffffff0f)
+ return -EINVAL;
+
+ spin_lock_irqsave(&cmd_lock, flags);
+
+ ret = 0;
+ out_be16(&cpmp->cp_cpcr, command | CPM_CR_FLG | (opcode << 8));
+ for (i = 0; i < MAX_CR_CMD_LOOPS; i++)
+ if ((in_be16(&cpmp->cp_cpcr) & CPM_CR_FLG) == 0)
+ goto out;
+
+ printk(KERN_ERR "%s(): Not able to issue CPM command\n", __FUNCTION__);
+ ret = -EIO;
+out:
+ spin_unlock_irqrestore(&cmd_lock, flags);
+ return ret;
+}
+EXPORT_SYMBOL(cpm_command);
+
/* We used to do this earlier, but have to postpone as long as possible
* to ensure the kernel VM is now running.
*/
#endif /* !CONFIG_PPC_CPM_NEW_BINDING */
struct cpm_ioport16 {
- __be16 dir, par, sor, dat, intr;
+ __be16 dir, par, odr_sor, dat, intr;
__be16 res[3];
};
else
clrbits32(&iop->par, pin);
+ if (port == CPM_PORTB) {
+ if (flags & CPM_PIN_OPENDRAIN)
+ setbits16(&mpc8xx_immr->im_cpm.cp_pbodr, pin);
+ else
+ clrbits16(&mpc8xx_immr->im_cpm.cp_pbodr, pin);
+ }
+
if (port == CPM_PORTE) {
if (flags & CPM_PIN_SECONDARY)
setbits32(&iop->sor, pin);
else
clrbits16(&iop->par, pin);
+ if (port == CPM_PORTA) {
+ if (flags & CPM_PIN_OPENDRAIN)
+ setbits16(&iop->odr_sor, pin);
+ else
+ clrbits16(&iop->odr_sor, pin);
+ }
if (port == CPM_PORTC) {
if (flags & CPM_PIN_SECONDARY)
- setbits16(&iop->sor, pin);
+ setbits16(&iop->odr_sor, pin);
else
- clrbits16(&iop->sor, pin);
+ clrbits16(&iop->odr_sor, pin);
}
}
cpmp = &cpm2_immr->im_cpm;
}
+static DEFINE_SPINLOCK(cmd_lock);
+
+#define MAX_CR_CMD_LOOPS 10000
+
+int cpm_command(u32 command, u8 opcode)
+{
+ int i, ret;
+ unsigned long flags;
+
+ spin_lock_irqsave(&cmd_lock, flags);
+
+ ret = 0;
+ out_be32(&cpmp->cp_cpcr, command | opcode | CPM_CR_FLG);
+ for (i = 0; i < MAX_CR_CMD_LOOPS; i++)
+ if ((in_be32(&cpmp->cp_cpcr) & CPM_CR_FLG) == 0)
+ goto out;
+
+ printk(KERN_ERR "%s(): Not able to issue CPM command\n", __FUNCTION__);
+ ret = -EIO;
+out:
+ spin_unlock_irqrestore(&cmd_lock, flags);
+ return ret;
+}
+EXPORT_SYMBOL(cpm_command);
+
/* Set a baud rate generator. This needs lots of work. There are
* eight BRGs, which can be connected to the CPM channels or output
* as clocks. The BRGs are in two different block of internal
static int __init gfar_mdio_of_init(void)
{
- struct device_node *np;
- unsigned int i;
+ struct device_node *np = NULL;
struct platform_device *mdio_dev;
struct resource res;
int ret;
- for (np = NULL, i = 0;
- (np = of_find_compatible_node(np, "mdio", "gianfar")) != NULL;
- i++) {
+ np = of_find_compatible_node(np, NULL, "fsl,gianfar-mdio");
+
+ /* try the deprecated version */
+ if (!np)
+ np = of_find_compatible_node(np, "mdio", "gianfar");
+
+ if (np) {
int k;
struct device_node *child = NULL;
struct gianfar_mdio_data mdio_data;
goto unreg;
}
+ of_node_put(np);
return 0;
unreg:
platform_device_unregister(mdio_dev);
err:
+ of_node_put(np);
return ret;
}
static int __init fsl_i2c_of_init(void)
{
struct device_node *np;
- unsigned int i;
+ unsigned int i = 0;
struct platform_device *i2c_dev;
int ret;
- for (np = NULL, i = 0;
- (np = of_find_compatible_node(np, "i2c", "fsl-i2c")) != NULL;
- i++) {
+ for_each_compatible_node(np, NULL, "fsl-i2c") {
struct resource r[2];
struct fsl_i2c_platform_data i2c_data;
const unsigned char *flags = NULL;
if (ret)
goto unreg;
- of_register_i2c_devices(np, i);
+ of_register_i2c_devices(np, i++);
}
return 0;
#include "ipic.h"
static struct ipic * primary_ipic;
+static struct irq_chip ipic_level_irq_chip, ipic_edge_irq_chip;
static DEFINE_SPINLOCK(ipic_lock);
static struct ipic_info ipic_info[] = {
+ [1] = {
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_C,
+ .force = IPIC_SIFCR_H,
+ .bit = 16,
+ .prio_mask = 0,
+ },
+ [2] = {
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_C,
+ .force = IPIC_SIFCR_H,
+ .bit = 17,
+ .prio_mask = 1,
+ },
+ [4] = {
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_C,
+ .force = IPIC_SIFCR_H,
+ .bit = 19,
+ .prio_mask = 3,
+ },
[9] = {
- .pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_D,
.force = IPIC_SIFCR_H,
.prio_mask = 0,
},
[10] = {
- .pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_D,
.force = IPIC_SIFCR_H,
.prio_mask = 1,
},
[11] = {
- .pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_D,
.force = IPIC_SIFCR_H,
.bit = 26,
.prio_mask = 2,
},
+ [12] = {
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_D,
+ .force = IPIC_SIFCR_H,
+ .bit = 27,
+ .prio_mask = 3,
+ },
+ [13] = {
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_D,
+ .force = IPIC_SIFCR_H,
+ .bit = 28,
+ .prio_mask = 4,
+ },
[14] = {
- .pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_D,
.force = IPIC_SIFCR_H,
.prio_mask = 5,
},
[15] = {
- .pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_D,
.force = IPIC_SIFCR_H,
.prio_mask = 6,
},
[16] = {
- .pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_D,
.force = IPIC_SIFCR_H,
.prio_mask = 7,
},
[17] = {
- .pend = IPIC_SEPNR,
+ .ack = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_A,
.force = IPIC_SEFCR,
.prio_mask = 5,
},
[18] = {
- .pend = IPIC_SEPNR,
+ .ack = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_A,
.force = IPIC_SEFCR,
.prio_mask = 6,
},
[19] = {
- .pend = IPIC_SEPNR,
+ .ack = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_A,
.force = IPIC_SEFCR,
.prio_mask = 7,
},
[20] = {
- .pend = IPIC_SEPNR,
+ .ack = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_B,
.force = IPIC_SEFCR,
.prio_mask = 4,
},
[21] = {
- .pend = IPIC_SEPNR,
+ .ack = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_B,
.force = IPIC_SEFCR,
.prio_mask = 5,
},
[22] = {
- .pend = IPIC_SEPNR,
+ .ack = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_B,
.force = IPIC_SEFCR,
.prio_mask = 6,
},
[23] = {
- .pend = IPIC_SEPNR,
+ .ack = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_B,
.force = IPIC_SEFCR,
.prio_mask = 7,
},
[32] = {
- .pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
.force = IPIC_SIFCR_H,
.prio_mask = 0,
},
[33] = {
- .pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
.force = IPIC_SIFCR_H,
.prio_mask = 1,
},
[34] = {
- .pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
.force = IPIC_SIFCR_H,
.prio_mask = 2,
},
[35] = {
- .pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
.force = IPIC_SIFCR_H,
.prio_mask = 3,
},
[36] = {
- .pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
.force = IPIC_SIFCR_H,
.prio_mask = 4,
},
[37] = {
- .pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
.force = IPIC_SIFCR_H,
.prio_mask = 5,
},
[38] = {
- .pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
.force = IPIC_SIFCR_H,
.prio_mask = 6,
},
[39] = {
- .pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
.force = IPIC_SIFCR_H,
.bit = 7,
.prio_mask = 7,
},
+ [42] = {
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_B,
+ .force = IPIC_SIFCR_H,
+ .bit = 10,
+ .prio_mask = 2,
+ },
+ [44] = {
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_B,
+ .force = IPIC_SIFCR_H,
+ .bit = 12,
+ .prio_mask = 4,
+ },
+ [45] = {
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_B,
+ .force = IPIC_SIFCR_H,
+ .bit = 13,
+ .prio_mask = 5,
+ },
+ [46] = {
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_B,
+ .force = IPIC_SIFCR_H,
+ .bit = 14,
+ .prio_mask = 6,
+ },
+ [47] = {
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_B,
+ .force = IPIC_SIFCR_H,
+ .bit = 15,
+ .prio_mask = 7,
+ },
[48] = {
- .pend = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_A,
.force = IPIC_SEFCR,
.prio_mask = 4,
},
[64] = {
- .pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_A,
.force = IPIC_SIFCR_L,
.prio_mask = 0,
},
[65] = {
- .pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_A,
.force = IPIC_SIFCR_L,
.prio_mask = 1,
},
[66] = {
- .pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_A,
.force = IPIC_SIFCR_L,
.prio_mask = 2,
},
[67] = {
- .pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_A,
.force = IPIC_SIFCR_L,
.prio_mask = 3,
},
[68] = {
- .pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_B,
.force = IPIC_SIFCR_L,
.prio_mask = 0,
},
[69] = {
- .pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_B,
.force = IPIC_SIFCR_L,
.prio_mask = 1,
},
[70] = {
- .pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_B,
.force = IPIC_SIFCR_L,
.prio_mask = 2,
},
[71] = {
- .pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_B,
.force = IPIC_SIFCR_L,
.prio_mask = 3,
},
[72] = {
- .pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 8,
},
[73] = {
- .pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 9,
},
[74] = {
- .pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 10,
},
[75] = {
- .pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 11,
},
[76] = {
- .pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 12,
},
[77] = {
- .pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 13,
},
[78] = {
- .pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 14,
},
[79] = {
- .pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 15,
},
[80] = {
- .pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 16,
},
+ [81] = {
+ .mask = IPIC_SIMSR_L,
+ .prio = 0,
+ .force = IPIC_SIFCR_L,
+ .bit = 17,
+ },
+ [82] = {
+ .mask = IPIC_SIMSR_L,
+ .prio = 0,
+ .force = IPIC_SIFCR_L,
+ .bit = 18,
+ },
[84] = {
- .pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 20,
},
[85] = {
- .pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 21,
},
+ [86] = {
+ .mask = IPIC_SIMSR_L,
+ .prio = 0,
+ .force = IPIC_SIFCR_L,
+ .bit = 22,
+ },
+ [87] = {
+ .mask = IPIC_SIMSR_L,
+ .prio = 0,
+ .force = IPIC_SIFCR_L,
+ .bit = 23,
+ },
+ [88] = {
+ .mask = IPIC_SIMSR_L,
+ .prio = 0,
+ .force = IPIC_SIFCR_L,
+ .bit = 24,
+ },
+ [89] = {
+ .mask = IPIC_SIMSR_L,
+ .prio = 0,
+ .force = IPIC_SIFCR_L,
+ .bit = 25,
+ },
[90] = {
- .pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 26,
},
[91] = {
- .pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
temp &= ~(1 << (31 - ipic_info[src].bit));
ipic_write(ipic->regs, ipic_info[src].mask, temp);
+ /* mb() can't guarantee that masking is finished. But it does finish
+ * for nearly all cases. */
+ mb();
+
spin_unlock_irqrestore(&ipic_lock, flags);
}
spin_lock_irqsave(&ipic_lock, flags);
- temp = ipic_read(ipic->regs, ipic_info[src].pend);
+ temp = ipic_read(ipic->regs, ipic_info[src].ack);
temp |= (1 << (31 - ipic_info[src].bit));
- ipic_write(ipic->regs, ipic_info[src].pend, temp);
+ ipic_write(ipic->regs, ipic_info[src].ack, temp);
+
+ /* mb() can't guarantee that ack is finished. But it does finish
+ * for nearly all cases. */
+ mb();
spin_unlock_irqrestore(&ipic_lock, flags);
}
temp &= ~(1 << (31 - ipic_info[src].bit));
ipic_write(ipic->regs, ipic_info[src].mask, temp);
- temp = ipic_read(ipic->regs, ipic_info[src].pend);
+ temp = ipic_read(ipic->regs, ipic_info[src].ack);
temp |= (1 << (31 - ipic_info[src].bit));
- ipic_write(ipic->regs, ipic_info[src].pend, temp);
+ ipic_write(ipic->regs, ipic_info[src].ack, temp);
+
+ /* mb() can't guarantee that ack is finished. But it does finish
+ * for nearly all cases. */
+ mb();
spin_unlock_irqrestore(&ipic_lock, flags);
}
flow_type);
return -EINVAL;
}
+ /* ipic supports only edge mode on external interrupts */
+ if ((flow_type & IRQ_TYPE_EDGE_FALLING) && !ipic_info[src].ack) {
+ printk(KERN_ERR "ipic: edge sense not supported on internal "
+ "interrupts\n");
+ return -EINVAL;
+ }
desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
if (flow_type & IRQ_TYPE_LEVEL_LOW) {
desc->status |= IRQ_LEVEL;
desc->handle_irq = handle_level_irq;
+ desc->chip = &ipic_level_irq_chip;
} else {
desc->handle_irq = handle_edge_irq;
+ desc->chip = &ipic_edge_irq_chip;
}
/* only EXT IRQ senses are programmable on ipic
return 0;
}
-static struct irq_chip ipic_irq_chip = {
+/* level interrupts and edge interrupts have different ack operations */
+static struct irq_chip ipic_level_irq_chip = {
+ .typename = " IPIC ",
+ .unmask = ipic_unmask_irq,
+ .mask = ipic_mask_irq,
+ .mask_ack = ipic_mask_irq,
+ .set_type = ipic_set_irq_type,
+};
+
+static struct irq_chip ipic_edge_irq_chip = {
.typename = " IPIC ",
.unmask = ipic_unmask_irq,
.mask = ipic_mask_irq,
irq_hw_number_t hw)
{
struct ipic *ipic = h->host_data;
- struct irq_chip *chip;
-
- /* Default chip */
- chip = &ipic->hc_irq;
set_irq_chip_data(virq, ipic);
- set_irq_chip_and_handler(virq, chip, handle_level_irq);
+ set_irq_chip_and_handler(virq, &ipic_level_irq_chip, handle_level_irq);
/* Set default irq type */
set_irq_type(virq, IRQ_TYPE_NONE);
ipic->regs = ioremap(res.start, res.end - res.start + 1);
ipic->irqhost->host_data = ipic;
- ipic->hc_irq = ipic_irq_chip;
/* init hw */
ipic_write(ipic->regs, IPIC_SICNR, 0x0);
* configure SICFR accordingly */
if (flags & IPIC_SPREADMODE_GRP_A)
temp |= SICFR_IPSA;
+ if (flags & IPIC_SPREADMODE_GRP_B)
+ temp |= SICFR_IPSB;
+ if (flags & IPIC_SPREADMODE_GRP_C)
+ temp |= SICFR_IPSC;
if (flags & IPIC_SPREADMODE_GRP_D)
temp |= SICFR_IPSD;
if (flags & IPIC_SPREADMODE_MIX_A)
if (flags & IPIC_SPREADMODE_MIX_B)
temp |= SICFR_MPSB;
- ipic_write(ipic->regs, IPIC_SICNR, temp);
+ ipic_write(ipic->regs, IPIC_SICFR, temp);
/* handle MCP route */
temp = 0;
void ipic_set_default_priority(void)
{
- ipic_write(primary_ipic->regs, IPIC_SIPRR_A, IPIC_SIPRR_A_DEFAULT);
- ipic_write(primary_ipic->regs, IPIC_SIPRR_D, IPIC_SIPRR_D_DEFAULT);
- ipic_write(primary_ipic->regs, IPIC_SMPRR_A, IPIC_SMPRR_A_DEFAULT);
- ipic_write(primary_ipic->regs, IPIC_SMPRR_B, IPIC_SMPRR_B_DEFAULT);
+ ipic_write(primary_ipic->regs, IPIC_SIPRR_A, IPIC_PRIORITY_DEFAULT);
+ ipic_write(primary_ipic->regs, IPIC_SIPRR_B, IPIC_PRIORITY_DEFAULT);
+ ipic_write(primary_ipic->regs, IPIC_SIPRR_C, IPIC_PRIORITY_DEFAULT);
+ ipic_write(primary_ipic->regs, IPIC_SIPRR_D, IPIC_PRIORITY_DEFAULT);
+ ipic_write(primary_ipic->regs, IPIC_SMPRR_A, IPIC_PRIORITY_DEFAULT);
+ ipic_write(primary_ipic->regs, IPIC_SMPRR_B, IPIC_PRIORITY_DEFAULT);
}
void ipic_enable_mcp(enum ipic_mcp_irq mcp_irq)
#define IPIC_IRQ_EXT7 23
/* Default Priority Registers */
-#define IPIC_SIPRR_A_DEFAULT 0x05309770
-#define IPIC_SIPRR_D_DEFAULT 0x05309770
-#define IPIC_SMPRR_A_DEFAULT 0x05309770
-#define IPIC_SMPRR_B_DEFAULT 0x05309770
+#define IPIC_PRIORITY_DEFAULT 0x05309770
/* System Global Interrupt Configuration Register */
#define SICFR_IPSA 0x00010000
+#define SICFR_IPSB 0x00020000
+#define SICFR_IPSC 0x00040000
#define SICFR_IPSD 0x00080000
#define SICFR_MPSA 0x00200000
#define SICFR_MPSB 0x00400000
/* The remapper for this IPIC */
struct irq_host *irqhost;
-
- /* The "linux" controller struct */
- struct irq_chip hc_irq;
};
struct ipic_info {
- u8 pend; /* pending register offset from base */
+ u8 ack; /* pending register offset from base if the irq
+ supports ack operation */
u8 mask; /* mask register offset from base */
u8 prio; /* priority register offset from base */
u8 force; /* force register offset from base */
/* Program the BRG to the given sampling rate and multiplier
*
- * @brg: the BRG, 1-16
+ * @brg: the BRG, QE_BRG1 - QE_BRG16
* @rate: the desired sampling rate
* @multiplier: corresponds to the value programmed in GUMR_L[RDCR] or
* GUMR_L[TDCR]. E.g., if this BRG is the RX clock, and GUMR_L[RDCR]=01,
* then 'multiplier' should be 8.
- *
- * Also note that the value programmed into the BRGC register must be even.
*/
-void qe_setbrg(unsigned int brg, unsigned int rate, unsigned int multiplier)
+int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier)
{
u32 divisor, tempval;
u32 div16 = 0;
+ if ((brg < QE_BRG1) || (brg > QE_BRG16))
+ return -EINVAL;
+
divisor = get_brg_clk() / (rate * multiplier);
if (divisor > QE_BRGC_DIVISOR_MAX + 1) {
tempval = ((divisor - 1) << QE_BRGC_DIVISOR_SHIFT) |
QE_BRGC_ENABLE | div16;
- out_be32(&qe_immr->brg.brgc[brg - 1], tempval);
+ out_be32(&qe_immr->brg.brgc[brg - QE_BRG1], tempval);
+
+ return 0;
+}
+EXPORT_SYMBOL(qe_setbrg);
+
+/* Convert a string to a QE clock source enum
+ *
+ * This function takes a string, typically from a property in the device
+ * tree, and returns the corresponding "enum qe_clock" value.
+*/
+enum qe_clock qe_clock_source(const char *source)
+{
+ unsigned int i;
+
+ if (strcasecmp(source, "none") == 0)
+ return QE_CLK_NONE;
+
+ if (strncasecmp(source, "brg", 3) == 0) {
+ i = simple_strtoul(source + 3, NULL, 10);
+ if ((i >= 1) && (i <= 16))
+ return (QE_BRG1 - 1) + i;
+ else
+ return QE_CLK_DUMMY;
+ }
+
+ if (strncasecmp(source, "clk", 3) == 0) {
+ i = simple_strtoul(source + 3, NULL, 10);
+ if ((i >= 1) && (i <= 24))
+ return (QE_CLK1 - 1) + i;
+ else
+ return QE_CLK_DUMMY;
+ }
+
+ return QE_CLK_DUMMY;
}
+EXPORT_SYMBOL(qe_clock_source);
/* Initialize SNUMs (thread serial numbers) according to
* QE Module Control chapter, SNUM table
#include <linux/spinlock.h>
#include <linux/completion.h>
#include <linux/device.h>
+#include <linux/kthread.h>
#include <asm/uaccess.h>
#include <asm/semaphore.h>
BLOCKING_NOTIFIER_HEAD(adb_client_list);
static int adb_got_sleep;
static int adb_inited;
-static pid_t adb_probe_task_pid;
static DECLARE_MUTEX(adb_probe_mutex);
-static struct completion adb_probe_task_comp;
static int sleepy_trackpad;
static int autopoll_devs;
int __adb_probe_sync;
-#ifdef CONFIG_PM_SLEEP
-static void adb_notify_sleep(struct pmu_sleep_notifier *self, int when);
-static struct pmu_sleep_notifier adb_sleep_notifier = {
- adb_notify_sleep,
- SLEEP_LEVEL_ADB,
-};
-#endif
-
static int adb_scan_bus(void);
static int do_adb_reset_bus(void);
static void adbdev_init(void);
}
#endif
-
-static __inline__ void adb_wait_ms(unsigned int ms)
-{
- if (current->pid && adb_probe_task_pid &&
- adb_probe_task_pid == current->pid)
- msleep(ms);
- else
- mdelay(ms);
-}
-
static int adb_scan_bus(void)
{
int i, highFree=0, noMovement;
static int
adb_probe_task(void *x)
{
- strcpy(current->comm, "kadbprobe");
-
printk(KERN_INFO "adb: starting probe task...\n");
do_adb_reset_bus();
printk(KERN_INFO "adb: finished probe task...\n");
- adb_probe_task_pid = 0;
up(&adb_probe_mutex);
return 0;
static void
__adb_probe_task(struct work_struct *bullshit)
{
- adb_probe_task_pid = kernel_thread(adb_probe_task, NULL, SIGCHLD | CLONE_KERNEL);
+ kthread_run(adb_probe_task, NULL, "kadbprobe");
}
static DECLARE_WORK(adb_reset_work, __adb_probe_task);
return 0;
}
+#ifdef CONFIG_PM
+/*
+ * notify clients before sleep
+ */
+static int adb_suspend(struct platform_device *dev, pm_message_t state)
+{
+ adb_got_sleep = 1;
+ /* We need to get a lock on the probe thread */
+ down(&adb_probe_mutex);
+ /* Stop autopoll */
+ if (adb_controller->autopoll)
+ adb_controller->autopoll(0);
+ blocking_notifier_call_chain(&adb_client_list, ADB_MSG_POWERDOWN, NULL);
+
+ return 0;
+}
+
+/*
+ * reset bus after sleep
+ */
+static int adb_resume(struct platform_device *dev)
+{
+ adb_got_sleep = 0;
+ up(&adb_probe_mutex);
+ adb_reset_bus();
+
+ return 0;
+}
+#endif /* CONFIG_PM */
+
int __init adb_init(void)
{
struct adb_driver *driver;
printk(KERN_WARNING "Warning: no ADB interface detected\n");
adb_controller = NULL;
} else {
-#ifdef CONFIG_PM_SLEEP
- pmu_register_sleep_notifier(&adb_sleep_notifier);
-#endif /* CONFIG_PM */
#ifdef CONFIG_PPC
if (machine_is_compatible("AAPL,PowerBook1998") ||
machine_is_compatible("PowerBook1,1"))
sleepy_trackpad = 1;
#endif /* CONFIG_PPC */
- init_completion(&adb_probe_task_comp);
+
adbdev_init();
adb_reset_bus();
}
__initcall(adb_init);
-#ifdef CONFIG_PM
-/*
- * notify clients before sleep and reset bus afterwards
- */
-void
-adb_notify_sleep(struct pmu_sleep_notifier *self, int when)
-{
- switch (when) {
- case PBOOK_SLEEP_REQUEST:
- adb_got_sleep = 1;
- /* We need to get a lock on the probe thread */
- down(&adb_probe_mutex);
- /* Stop autopoll */
- if (adb_controller->autopoll)
- adb_controller->autopoll(0);
- blocking_notifier_call_chain(&adb_client_list,
- ADB_MSG_POWERDOWN, NULL);
- break;
- case PBOOK_WAKE:
- adb_got_sleep = 0;
- up(&adb_probe_mutex);
- adb_reset_bus();
- break;
- }
-}
-#endif /* CONFIG_PM */
-
static int
do_adb_reset_bus(void)
{
if (sleepy_trackpad) {
/* Let the trackpad settle down */
- adb_wait_ms(500);
+ msleep(500);
}
down(&adb_handler_sem);
if (sleepy_trackpad) {
/* Let the trackpad settle down */
- adb_wait_ms(1500);
+ msleep(1500);
}
if (!ret) {
adb_controller->poll();
}
-static void
-adb_probe_wakeup(struct adb_request *req)
+static void adb_sync_req_done(struct adb_request *req)
{
- complete(&adb_probe_task_comp);
-}
+ struct completion *comp = req->arg;
-/* Static request used during probe */
-static struct adb_request adb_sreq;
-static unsigned long adb_sreq_lock; // Use semaphore ! */
+ complete(comp);
+}
int
adb_request(struct adb_request *req, void (*done)(struct adb_request *),
int flags, int nbytes, ...)
{
va_list list;
- int i, use_sreq;
+ int i;
int rc;
+ struct completion comp;
if ((adb_controller == NULL) || (adb_controller->send_request == NULL))
return -ENXIO;
if (nbytes < 1)
return -EINVAL;
- if (req == NULL && (flags & ADBREQ_NOSEND))
- return -EINVAL;
-
- if (req == NULL) {
- if (test_and_set_bit(0,&adb_sreq_lock)) {
- printk("adb.c: Warning: contention on static request !\n");
- return -EPERM;
- }
- req = &adb_sreq;
- flags |= ADBREQ_SYNC;
- use_sreq = 1;
- } else
- use_sreq = 0;
+
req->nbytes = nbytes+1;
req->done = done;
req->reply_expected = flags & ADBREQ_REPLY;
if (flags & ADBREQ_NOSEND)
return 0;
- /* Synchronous requests send from the probe thread cause it to
- * block. Beware that the "done" callback will be overriden !
- */
- if ((flags & ADBREQ_SYNC) &&
- (current->pid && adb_probe_task_pid &&
- adb_probe_task_pid == current->pid)) {
- req->done = adb_probe_wakeup;
- rc = adb_controller->send_request(req, 0);
- if (rc || req->complete)
- goto bail;
- wait_for_completion(&adb_probe_task_comp);
- rc = 0;
- goto bail;
+ /* Synchronous requests block using an on-stack completion */
+ if (flags & ADBREQ_SYNC) {
+ WARN_ON(done);
+ req->done = adb_sync_req_done;
+ req->arg = ∁
+ init_completion(&comp);
}
- rc = adb_controller->send_request(req, flags & ADBREQ_SYNC);
-bail:
- if (use_sreq)
- clear_bit(0, &adb_sreq_lock);
+ rc = adb_controller->send_request(req, 0);
+
+ if ((flags & ADBREQ_SYNC) && !rc && !req->complete)
+ wait_for_completion(&comp);
return rc;
}
.release = adb_release,
};
-static void
+static struct platform_driver adb_pfdrv = {
+ .driver = {
+ .name = "adb",
+ },
+#ifdef CONFIG_PM
+ .suspend = adb_suspend,
+ .resume = adb_resume,
+#endif
+};
+
+static struct platform_device adb_pfdev = {
+ .name = "adb",
+};
+
+static int __init
+adb_dummy_probe(struct platform_device *dev)
+{
+ if (dev == &adb_pfdev)
+ return 0;
+ return -ENODEV;
+}
+
+static void __init
adbdev_init(void)
{
if (register_chrdev(ADB_MAJOR, "adb", &adb_fops)) {
if (IS_ERR(adb_dev_class))
return;
class_device_create(adb_dev_class, NULL, MKDEV(ADB_MAJOR, 0), NULL, "adb");
+
+ platform_device_register(&adb_pfdev);
+ platform_driver_probe(&adb_pfdrv, adb_dummy_probe);
}
#include <linux/stddef.h>
#include <linux/init.h>
#include <linux/ide.h>
+#include <linux/kthread.h>
#include <asm/prom.h>
#include <asm/pgtable.h>
#include <asm/io.h>
#define MB_DEBUG
-#define MB_IGNORE_SIGNALS
#ifdef MB_DEBUG
#define MBDBG(fmt, arg...) printk(KERN_INFO fmt , ## arg)
{
int i;
- strcpy(current->comm, "media-bay");
-#ifdef MB_IGNORE_SIGNALS
- sigfillset(¤t->blocked);
-#endif
-
- for (;;) {
+ while (!kthread_should_stop()) {
for (i = 0; i < media_bay_count; ++i) {
down(&media_bays[i].lock);
if (!media_bays[i].sleeping)
}
msleep_interruptible(MB_POLL_DELAY);
- if (signal_pending(current))
- return 0;
}
+ return 0;
}
static int __devinit media_bay_attach(struct macio_dev *mdev, const struct of_device_id *match)
/* Startup kernel thread */
if (i == 0)
- kernel_thread(media_bay_task, NULL, CLONE_KERNEL);
+ kthread_run(media_bay_task, NULL, "media-bay");
return 0;
#include <linux/reboot.h>
#include <linux/kmod.h>
#include <linux/i2c.h>
+#include <linux/kthread.h>
#include <asm/prom.h>
#include <asm/machdep.h>
#include <asm/io.h>
static int state;
static int cpu_count;
static int cpu_pid_type;
-static pid_t ctrl_task;
+static struct task_struct *ctrl_task;
static struct completion ctrl_complete;
static int critical_state;
static int rackmac;
*/
static int main_control_loop(void *x)
{
- daemonize("kfand");
-
DBG("main_control_loop started\n");
down(&driver_lock);
{
init_completion(&ctrl_complete);
- ctrl_task = kernel_thread(main_control_loop, NULL, SIGCHLD | CLONE_KERNEL);
+ ctrl_task = kthread_run(main_control_loop, NULL, "kfand");
}
/*
*/
static void stop_control_loops(void)
{
- if (ctrl_task != 0)
+ if (ctrl_task)
wait_for_completion(&ctrl_complete);
}
#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/init.h>
+#include <linux/kthread.h>
#include <asm/prom.h>
#include <asm/machdep.h>
static struct {
volatile int running;
- struct completion completion;
- pid_t poll_task;
+ struct task_struct *poll_task;
struct semaphore lock;
struct of_device *of_dev;
write_reg( x.fan, 0x00, x.r0, 1 );
}
-static int
-control_loop( void *dummy )
+static int control_loop(void *dummy)
{
- daemonize("g4fand");
-
- down( &x.lock );
+ down(&x.lock);
setup_hardware();
+ up(&x.lock);
- while( x.running ) {
- up( &x.lock );
-
+ for (;;) {
msleep_interruptible(8000);
-
- down( &x.lock );
+ if (kthread_should_stop())
+ break;
+
+ down(&x.lock);
poll_temp();
+ up(&x.lock);
}
+ down(&x.lock);
restore_regs();
- up( &x.lock );
+ up(&x.lock);
- complete_and_exit( &x.completion, 0 );
+ return 0;
}
ret = i2c_probe( adapter, &addr_data, &do_probe );
if( x.thermostat && x.fan ) {
x.running = 1;
- init_completion( &x.completion );
- x.poll_task = kernel_thread( control_loop, NULL, SIGCHLD | CLONE_KERNEL );
+ x.poll_task = kthread_run(control_loop, NULL, "g4fand");
}
}
return ret;
else {
if( x.running ) {
x.running = 0;
- wait_for_completion( &x.completion );
+ kthread_stop(x.poll_task);
+ x.poll_task = NULL;
}
if( client == x.thermostat )
x.thermostat = NULL;
*
* Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
* Copyright (C) 2001-2002 Benjamin Herrenschmidt
+ * Copyright (C) 2006-2007 Johannes Berg
*
* THIS DRIVER IS BECOMING A TOTAL MESS !
* - Cleanup atomically disabling reply to PMU events after
* a sleep or a freq. switch
- * - Move sleep code out of here to pmac_pm, merge into new
- * common PM infrastructure
- * - Save/Restore PCI space properly
*
*/
#include <stdarg.h>
#include "via-pmu-event.h"
/* Some compile options */
-#define DEBUG_SLEEP
+#undef DEBUG_SLEEP
/* Misc minor number allocated for /dev/pmu */
#define PMU_MINOR 154
static u8 pmu_intr_mask;
static int pmu_version;
static int drop_interrupts;
-#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32)
+#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
static int option_lid_wakeup = 1;
-#endif /* CONFIG_PM_SLEEP && CONFIG_PPC32 */
-#if (defined(CONFIG_PM_SLEEP)&&defined(CONFIG_PPC32))||defined(CONFIG_PMAC_BACKLIGHT_LEGACY)
-static int sleep_in_progress;
-#endif
+#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
static unsigned long async_req_locks;
static unsigned int pmu_irq_stats[11];
int __fake_sleep;
int asleep;
-BLOCKING_NOTIFIER_HEAD(sleep_notifier_list);
#ifdef CONFIG_ADB
static int adb_dev_map;
static int proc_write_options(struct file *file, const char __user *buffer,
unsigned long count, void *data);
+#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32)
+static void powerbook_sleep_init_3400(void);
+#else
+#define powerbook_sleep_init_3400() do { } while (0)
+#endif
+
#ifdef CONFIG_ADB
struct adb_driver via_pmu_driver = {
"PMU",
#ifdef DEBUG_SLEEP
int pmu_polled_request(struct adb_request *req);
-int pmu_wink(struct adb_request *req);
+void pmu_blink(int n);
#endif
/*
pmu_poll();
} while (pmu_state != idle);
+ /* Do allocations and ioremaps that will be needed for sleep */
+ if (pmu_kind == PMU_OHARE_BASED)
+ powerbook_sleep_init_3400();
+
return 0;
}
{
char *p = page;
-#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32)
+#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
if (pmu_kind == PMU_KEYLARGO_BASED &&
pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
p += sprintf(p, "lid_wakeup=%d\n", option_lid_wakeup);
*(val++) = 0;
while(*val == ' ')
val++;
-#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32)
+#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
if (pmu_kind == PMU_KEYLARGO_BASED &&
pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
if (!strcmp(label, "lid_wakeup"))
return via != 0;
}
-#ifdef CONFIG_PM_SLEEP
-
-static LIST_HEAD(sleep_notifiers);
-
-int
-pmu_register_sleep_notifier(struct pmu_sleep_notifier *n)
-{
- struct list_head *list;
- struct pmu_sleep_notifier *notifier;
-
- for (list = sleep_notifiers.next; list != &sleep_notifiers;
- list = list->next) {
- notifier = list_entry(list, struct pmu_sleep_notifier, list);
- if (n->priority > notifier->priority)
- break;
- }
- __list_add(&n->list, list->prev, list);
- return 0;
-}
-EXPORT_SYMBOL(pmu_register_sleep_notifier);
-
-int
-pmu_unregister_sleep_notifier(struct pmu_sleep_notifier* n)
-{
- if (n->list.next == 0)
- return -ENOENT;
- list_del(&n->list);
- n->list.next = NULL;
- return 0;
-}
-EXPORT_SYMBOL(pmu_unregister_sleep_notifier);
-#endif /* CONFIG_PM_SLEEP */
-
-#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32)
-
-/* Sleep is broadcast last-to-first */
-static void broadcast_sleep(int when)
-{
- struct list_head *list;
- struct pmu_sleep_notifier *notifier;
-
- for (list = sleep_notifiers.prev; list != &sleep_notifiers;
- list = list->prev) {
- notifier = list_entry(list, struct pmu_sleep_notifier, list);
- notifier->notifier_call(notifier, when);
- }
-}
-
-/* Wake is broadcast first-to-last */
-static void broadcast_wake(void)
-{
- struct list_head *list;
- struct pmu_sleep_notifier *notifier;
-
- for (list = sleep_notifiers.next; list != &sleep_notifiers;
- list = list->next) {
- notifier = list_entry(list, struct pmu_sleep_notifier, list);
- notifier->notifier_call(notifier, PBOOK_WAKE);
- }
-}
-
-/*
- * This struct is used to store config register values for
- * PCI devices which may get powered off when we sleep.
- */
-static struct pci_save {
- u16 command;
- u16 cache_lat;
- u16 intr;
- u32 rom_address;
-} *pbook_pci_saves;
-static int pbook_npci_saves;
-
-static void
-pbook_alloc_pci_save(void)
-{
- int npci;
- struct pci_dev *pd = NULL;
-
- npci = 0;
- while ((pd = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) {
- ++npci;
- }
- if (npci == 0)
- return;
- pbook_pci_saves = (struct pci_save *)
- kmalloc(npci * sizeof(struct pci_save), GFP_KERNEL);
- pbook_npci_saves = npci;
-}
-
-static void
-pbook_free_pci_save(void)
-{
- if (pbook_pci_saves == NULL)
- return;
- kfree(pbook_pci_saves);
- pbook_pci_saves = NULL;
- pbook_npci_saves = 0;
-}
-
-static void
-pbook_pci_save(void)
-{
- struct pci_save *ps = pbook_pci_saves;
- struct pci_dev *pd = NULL;
- int npci = pbook_npci_saves;
-
- if (ps == NULL)
- return;
-
- while ((pd = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) {
- if (npci-- == 0) {
- pci_dev_put(pd);
- return;
- }
- pci_read_config_word(pd, PCI_COMMAND, &ps->command);
- pci_read_config_word(pd, PCI_CACHE_LINE_SIZE, &ps->cache_lat);
- pci_read_config_word(pd, PCI_INTERRUPT_LINE, &ps->intr);
- pci_read_config_dword(pd, PCI_ROM_ADDRESS, &ps->rom_address);
- ++ps;
- }
-}
-
-/* For this to work, we must take care of a few things: If gmac was enabled
- * during boot, it will be in the pci dev list. If it's disabled at this point
- * (and it will probably be), then you can't access it's config space.
- */
-static void
-pbook_pci_restore(void)
-{
- u16 cmd;
- struct pci_save *ps = pbook_pci_saves - 1;
- struct pci_dev *pd = NULL;
- int npci = pbook_npci_saves;
- int j;
-
- while ((pd = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) {
- if (npci-- == 0)
- return;
- ps++;
- if (ps->command == 0)
- continue;
- pci_read_config_word(pd, PCI_COMMAND, &cmd);
- if ((ps->command & ~cmd) == 0)
- continue;
- switch (pd->hdr_type) {
- case PCI_HEADER_TYPE_NORMAL:
- for (j = 0; j < 6; ++j)
- pci_write_config_dword(pd,
- PCI_BASE_ADDRESS_0 + j*4,
- pd->resource[j].start);
- pci_write_config_dword(pd, PCI_ROM_ADDRESS,
- ps->rom_address);
- pci_write_config_word(pd, PCI_CACHE_LINE_SIZE,
- ps->cache_lat);
- pci_write_config_word(pd, PCI_INTERRUPT_LINE,
- ps->intr);
- pci_write_config_word(pd, PCI_COMMAND, ps->command);
- break;
- }
- }
-}
-
-#ifdef DEBUG_SLEEP
-/* N.B. This doesn't work on the 3400 */
-void
-pmu_blink(int n)
-{
- struct adb_request req;
-
- memset(&req, 0, sizeof(req));
-
- for (; n > 0; --n) {
- req.nbytes = 4;
- req.done = NULL;
- req.data[0] = 0xee;
- req.data[1] = 4;
- req.data[2] = 0;
- req.data[3] = 1;
- req.reply[0] = ADB_RET_OK;
- req.reply_len = 1;
- req.reply_expected = 0;
- pmu_polled_request(&req);
- mdelay(50);
- req.nbytes = 4;
- req.done = NULL;
- req.data[0] = 0xee;
- req.data[1] = 4;
- req.data[2] = 0;
- req.data[3] = 0;
- req.reply[0] = ADB_RET_OK;
- req.reply_len = 1;
- req.reply_expected = 0;
- pmu_polled_request(&req);
- mdelay(50);
- }
- mdelay(50);
-}
-#endif
-
+#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
/*
* Put the powerbook to sleep.
*/
extern void pmu_backlight_set_sleep(int sleep);
-static int
-pmac_suspend_devices(void)
-{
- int ret;
-
- pm_prepare_console();
-
- /* Notify old-style device drivers */
- broadcast_sleep(PBOOK_SLEEP_REQUEST);
-
- /* Sync the disks. */
- /* XXX It would be nice to have some way to ensure that
- * nobody is dirtying any new buffers while we wait. That
- * could be achieved using the refrigerator for processes
- * that swsusp uses
- */
- sys_sync();
-
- broadcast_sleep(PBOOK_SLEEP_NOW);
-
- /* Send suspend call to devices, hold the device core's dpm_sem */
- ret = device_suspend(PMSG_SUSPEND);
- if (ret) {
- broadcast_wake();
- printk(KERN_ERR "Driver sleep failed\n");
- return -EBUSY;
- }
-
-#ifdef CONFIG_PMAC_BACKLIGHT
- /* Tell backlight code not to muck around with the chip anymore */
- pmu_backlight_set_sleep(1);
-#endif
-
- /* Call platform functions marked "on sleep" */
- pmac_pfunc_i2c_suspend();
- pmac_pfunc_base_suspend();
-
- /* Stop preemption */
- preempt_disable();
-
- /* Make sure the decrementer won't interrupt us */
- asm volatile("mtdec %0" : : "r" (0x7fffffff));
- /* Make sure any pending DEC interrupt occurring while we did
- * the above didn't re-enable the DEC */
- mb();
- asm volatile("mtdec %0" : : "r" (0x7fffffff));
-
- /* We can now disable MSR_EE. This code of course works properly only
- * on UP machines... For SMP, if we ever implement sleep, we'll have to
- * stop the "other" CPUs way before we do all that stuff.
- */
- local_irq_disable();
-
- /* Broadcast power down irq
- * This isn't that useful in most cases (only directly wired devices can
- * use this but still... This will take care of sysdev's as well, so
- * we exit from here with local irqs disabled and PIC off.
- */
- ret = device_power_down(PMSG_SUSPEND);
- if (ret) {
- wakeup_decrementer();
- local_irq_enable();
- preempt_enable();
- device_resume();
- broadcast_wake();
- printk(KERN_ERR "Driver powerdown failed\n");
- return -EBUSY;
- }
-
- /* Wait for completion of async requests */
- while (!batt_req.complete)
- pmu_poll();
-
- /* Giveup the lazy FPU & vec so we don't have to back them
- * up from the low level code
- */
- enable_kernel_fp();
-
-#ifdef CONFIG_ALTIVEC
- if (cpu_has_feature(CPU_FTR_ALTIVEC))
- enable_kernel_altivec();
-#endif /* CONFIG_ALTIVEC */
-
- return 0;
-}
-
-static int
-pmac_wakeup_devices(void)
-{
- mdelay(100);
-
-#ifdef CONFIG_PMAC_BACKLIGHT
- /* Tell backlight code it can use the chip again */
- pmu_backlight_set_sleep(0);
-#endif
-
- /* Power back up system devices (including the PIC) */
- device_power_up();
-
- /* Force a poll of ADB interrupts */
- adb_int_pending = 1;
- via_pmu_interrupt(0, NULL);
-
- /* Restart jiffies & scheduling */
- wakeup_decrementer();
-
- /* Re-enable local CPU interrupts */
- local_irq_enable();
- mdelay(10);
- preempt_enable();
-
- /* Call platform functions marked "on wake" */
- pmac_pfunc_base_resume();
- pmac_pfunc_i2c_resume();
-
- /* Resume devices */
- device_resume();
-
- /* Notify old style drivers */
- broadcast_wake();
-
- pm_restore_console();
-
- return 0;
-}
-
#define GRACKLE_PM (1<<7)
#define GRACKLE_DOZE (1<<5)
#define GRACKLE_NAP (1<<4)
unsigned long save_l2cr;
unsigned short pmcr1;
struct adb_request req;
- int ret;
struct pci_dev *grackle;
grackle = pci_get_bus_and_slot(0, 0);
if (!grackle)
return -ENODEV;
- ret = pmac_suspend_devices();
- if (ret) {
- printk(KERN_ERR "Sleep rejected by devices\n");
- return ret;
- }
-
/* Turn off various things. Darwin does some retry tests here... */
pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
pmu_wait_complete(&req);
PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
pmu_wait_complete(&req);
- pmac_wakeup_devices();
-
return 0;
}
unsigned long save_l2cr;
unsigned long save_l3cr;
struct adb_request req;
- int ret;
if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
printk(KERN_ERR "Sleep mode not supported on this machine\n");
if (num_online_cpus() > 1 || cpu_is_offline(0))
return -EAGAIN;
- ret = pmac_suspend_devices();
- if (ret) {
- printk(KERN_ERR "Sleep rejected by devices\n");
- return ret;
- }
-
/* Stop environment and ADB interrupts */
pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
pmu_wait_complete(&req);
/* Restore LPJ, cpufreq will adjust the cpu frequency */
loops_per_jiffy /= 2;
- pmac_wakeup_devices();
-
return 0;
}
#define PB3400_MEM_CTRL 0xf8000000
#define PB3400_MEM_CTRL_SLEEP 0x70
-static int
-powerbook_sleep_3400(void)
+static void __iomem *pb3400_mem_ctrl;
+
+static void powerbook_sleep_init_3400(void)
+{
+ /* map in the memory controller registers */
+ pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
+ if (pb3400_mem_ctrl == NULL)
+ printk(KERN_WARNING "ioremap failed: sleep won't be possible");
+}
+
+static int powerbook_sleep_3400(void)
{
- int ret, i, x;
+ int i, x;
unsigned int hid0;
- unsigned long p;
+ unsigned long msr;
struct adb_request sleep_req;
- void __iomem *mem_ctrl;
unsigned int __iomem *mem_ctrl_sleep;
- /* first map in the memory controller registers */
- mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
- if (mem_ctrl == NULL) {
- printk("powerbook_sleep_3400: ioremap failed\n");
+ if (pb3400_mem_ctrl == NULL)
return -ENOMEM;
- }
- mem_ctrl_sleep = mem_ctrl + PB3400_MEM_CTRL_SLEEP;
-
- /* Allocate room for PCI save */
- pbook_alloc_pci_save();
-
- ret = pmac_suspend_devices();
- if (ret) {
- pbook_free_pci_save();
- printk(KERN_ERR "Sleep rejected by devices\n");
- return ret;
- }
-
- /* Save the state of PCI config space for some slots */
- pbook_pci_save();
+ mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP;
/* Set the memory controller to keep the memory refreshed
while we're asleep */
/* Ask the PMU to put us to sleep */
pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
- while (!sleep_req.complete)
- mb();
+ pmu_wait_complete(&sleep_req);
+ pmu_unlock();
- pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
+ pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
- /* displacement-flush the L2 cache - necessary? */
- for (p = KERNELBASE; p < KERNELBASE + 0x100000; p += 0x1000)
- i = *(volatile int *)p;
asleep = 1;
/* Put the CPU into sleep mode */
hid0 = mfspr(SPRN_HID0);
hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
mtspr(SPRN_HID0, hid0);
- mtmsr(mfmsr() | MSR_POW | MSR_EE);
- udelay(10);
+ local_irq_enable();
+ msr = mfmsr() | MSR_POW;
+ while (asleep) {
+ mb();
+ mtmsr(msr);
+ isync();
+ }
+ local_irq_disable();
/* OK, we're awake again, start restoring things */
out_be32(mem_ctrl_sleep, 0x3f);
- pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
- pbook_pci_restore();
- pmu_unlock();
-
- /* wait for the PMU interrupt sequence to complete */
- while (asleep)
- mb();
-
- pmac_wakeup_devices();
- pbook_free_pci_save();
- iounmap(mem_ctrl);
+ pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
return 0;
}
-#endif /* CONFIG_PM_SLEEP && CONFIG_PPC32 */
+#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
/*
* Support for /dev/pmu device
return 0;
}
+#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
+/*
+ * overrides the weak arch_suspend_disable_irqs in kernel/power/main.c
+ *
+ * XXX: Once Scott Wood's patch is merged, this needs to use the ppc_md
+ * hooks that patch adds!
+ */
+void arch_suspend_disable_irqs(void)
+{
+#ifdef CONFIG_PMAC_BACKLIGHT
+ /* Tell backlight code not to muck around with the chip anymore */
+ pmu_backlight_set_sleep(1);
+#endif
+
+ /* Call platform functions marked "on sleep" */
+ pmac_pfunc_i2c_suspend();
+ pmac_pfunc_base_suspend();
+
+ /* Stop preemption */
+ preempt_disable();
+
+ /* Make sure the decrementer won't interrupt us */
+ asm volatile("mtdec %0" : : "r" (0x7fffffff));
+ /* Make sure any pending DEC interrupt occurring while we did
+ * the above didn't re-enable the DEC */
+ mb();
+ asm volatile("mtdec %0" : : "r" (0x7fffffff));
+
+ local_irq_disable();
+}
+
+static int powerbook_sleep(suspend_state_t state)
+{
+ int error = 0;
+
+ /* Wait for completion of async requests */
+ while (!batt_req.complete)
+ pmu_poll();
+
+ /* Giveup the lazy FPU & vec so we don't have to back them
+ * up from the low level code
+ */
+ enable_kernel_fp();
+
+#ifdef CONFIG_ALTIVEC
+ if (cpu_has_feature(CPU_FTR_ALTIVEC))
+ enable_kernel_altivec();
+#endif /* CONFIG_ALTIVEC */
+
+ switch (pmu_kind) {
+ case PMU_OHARE_BASED:
+ error = powerbook_sleep_3400();
+ break;
+ case PMU_HEATHROW_BASED:
+ case PMU_PADDINGTON_BASED:
+ error = powerbook_sleep_grackle();
+ break;
+ case PMU_KEYLARGO_BASED:
+ error = powerbook_sleep_Core99();
+ break;
+ default:
+ return -ENOSYS;
+ }
+
+ if (error)
+ return error;
+
+ mdelay(100);
+
+#ifdef CONFIG_PMAC_BACKLIGHT
+ /* Tell backlight code it can use the chip again */
+ pmu_backlight_set_sleep(0);
+#endif
+
+ return 0;
+}
+
+/*
+ * overrides the weak arch_suspend_enable_irqs in kernel/power/main.c
+ *
+ * XXX: Once Scott Wood's patch is merged, this needs to use the ppc_md
+ * hooks that patch adds!
+ */
+void arch_suspend_enable_irqs(void)
+{
+ /* Force a poll of ADB interrupts */
+ adb_int_pending = 1;
+ via_pmu_interrupt(0, NULL);
+
+ /* Restart jiffies & scheduling */
+ wakeup_decrementer();
+
+ /* Re-enable local CPU interrupts */
+ local_irq_enable();
+ mdelay(10);
+ preempt_enable();
+
+ /* Call platform functions marked "on wake" */
+ pmac_pfunc_base_resume();
+ pmac_pfunc_i2c_resume();
+}
+
+static int pmu_sleep_valid(suspend_state_t state)
+{
+ return state == PM_SUSPEND_MEM
+ && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0);
+}
+
+static struct platform_suspend_ops pmu_pm_ops = {
+ .enter = powerbook_sleep,
+ .valid = pmu_sleep_valid,
+};
+
+static int register_pmu_pm_ops(void)
+{
+ suspend_set_ops(&pmu_pm_ops);
+
+ return 0;
+}
+
+device_initcall(register_pmu_pm_ops);
+#endif
+
static int
pmu_ioctl(struct inode * inode, struct file *filp,
u_int cmd, u_long arg)
int error = -EINVAL;
switch (cmd) {
-#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32)
case PMU_IOC_SLEEP:
if (!capable(CAP_SYS_ADMIN))
return -EACCES;
- if (sleep_in_progress)
- return -EBUSY;
- sleep_in_progress = 1;
- switch (pmu_kind) {
- case PMU_OHARE_BASED:
- error = powerbook_sleep_3400();
- break;
- case PMU_HEATHROW_BASED:
- case PMU_PADDINGTON_BASED:
- error = powerbook_sleep_grackle();
- break;
- case PMU_KEYLARGO_BASED:
- error = powerbook_sleep_Core99();
- break;
- default:
- error = -ENOSYS;
- }
- sleep_in_progress = 0;
- break;
+ return pm_suspend(PM_SUSPEND_MEM);
case PMU_IOC_CAN_SLEEP:
- if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0)
+ if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0)
return put_user(0, argp);
else
return put_user(1, argp);
-#endif /* CONFIG_PM_SLEEP && CONFIG_PPC32 */
#ifdef CONFIG_PMAC_BACKLIGHT_LEGACY
/* Compatibility ioctl's for backlight */
{
int brightness;
- if (sleep_in_progress)
- return -EBUSY;
-
brightness = pmac_backlight_get_legacy_brightness();
if (brightness < 0)
return brightness;
{
int brightness;
- if (sleep_in_progress)
- return -EBUSY;
-
error = get_user(brightness, argp);
if (error)
return error;
local_irq_restore(flags);
return 0;
}
-#endif /* DEBUG_SLEEP */
+/* N.B. This doesn't work on the 3400 */
+void pmu_blink(int n)
+{
+ struct adb_request req;
-/* FIXME: This is a temporary set of callbacks to enable us
- * to do suspend-to-disk.
- */
+ memset(&req, 0, sizeof(req));
-#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32)
+ for (; n > 0; --n) {
+ req.nbytes = 4;
+ req.done = NULL;
+ req.data[0] = 0xee;
+ req.data[1] = 4;
+ req.data[2] = 0;
+ req.data[3] = 1;
+ req.reply[0] = ADB_RET_OK;
+ req.reply_len = 1;
+ req.reply_expected = 0;
+ pmu_polled_request(&req);
+ mdelay(50);
+ req.nbytes = 4;
+ req.done = NULL;
+ req.data[0] = 0xee;
+ req.data[1] = 4;
+ req.data[2] = 0;
+ req.data[3] = 0;
+ req.reply[0] = ADB_RET_OK;
+ req.reply_len = 1;
+ req.reply_expected = 0;
+ pmu_polled_request(&req);
+ mdelay(50);
+ }
+ mdelay(50);
+}
+#endif /* DEBUG_SLEEP */
+#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
int pmu_sys_suspended;
static int pmu_sys_suspend(struct sys_device *sysdev, pm_message_t state)
return 0;
}
-#endif /* CONFIG_PM_SLEEP && CONFIG_PPC32 */
+#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
static struct sysdev_class pmu_sysclass = {
set_kset_name("pmu"),
};
static struct sysdev_driver driver_pmu = {
-#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32)
+#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
.suspend = &pmu_sys_suspend,
.resume = &pmu_sys_resume,
-#endif /* CONFIG_PM_SLEEP && CONFIG_PPC32 */
+#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
};
static int __init init_pmu_sysfs(void)
EXPORT_SYMBOL(pmu_suspend);
EXPORT_SYMBOL(pmu_resume);
EXPORT_SYMBOL(pmu_unlock);
-#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32)
+#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
EXPORT_SYMBOL(pmu_enable_irled);
EXPORT_SYMBOL(pmu_battery_count);
EXPORT_SYMBOL(pmu_batteries);
EXPORT_SYMBOL(pmu_power_flags);
-#endif /* CONFIG_PM_SLEEP && CONFIG_PPC32 */
+#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
static inline int fcc_cr_cmd(struct fs_enet_private *fep, u32 op)
{
const struct fs_platform_info *fpi = fep->fpi;
- int i;
-
- W32(cpmp, cp_cpcr, fpi->cp_command | op | CPM_CR_FLG);
- for (i = 0; i < MAX_CR_CMD_LOOPS; i++)
- if ((R32(cpmp, cp_cpcr) & CPM_CR_FLG) == 0)
- return 0;
- printk(KERN_ERR "%s(): Not able to issue CPM command\n",
- __FUNCTION__);
- return 1;
+ return cpm_command(fpi->cp_command, op);
}
static int do_pd_setup(struct fs_enet_private *fep)
* Delay to wait for SCC reset command to complete (in us)
*/
#define SCC_RESET_DELAY 50
-#define MAX_CR_CMD_LOOPS 10000
static inline int scc_cr_cmd(struct fs_enet_private *fep, u32 op)
{
const struct fs_platform_info *fpi = fep->fpi;
- int i;
-
- W16(cpmp, cp_cpcr, fpi->cp_command | CPM_CR_FLG | (op << 8));
- for (i = 0; i < MAX_CR_CMD_LOOPS; i++)
- if ((R16(cpmp, cp_cpcr) & CPM_CR_FLG) == 0)
- return 0;
- printk(KERN_ERR "%s(): Not able to issue CPM command\n",
- __FUNCTION__);
- return 1;
+ return cpm_command(fpi->cp_command, op);
}
static int do_pd_setup(struct fs_enet_private *fep)
int err, ucc_num, max_speed = 0;
const phandle *ph;
const unsigned int *prop;
+ const char *sprop;
const void *mac_addr;
phy_interface_t phy_interface;
static const int enet_to_speed[] = {
ug_info->uf_info.ucc_num = ucc_num;
- prop = of_get_property(np, "rx-clock", NULL);
- ug_info->uf_info.rx_clock = *prop;
- prop = of_get_property(np, "tx-clock", NULL);
- ug_info->uf_info.tx_clock = *prop;
+ sprop = of_get_property(np, "rx-clock-name", NULL);
+ if (sprop) {
+ ug_info->uf_info.rx_clock = qe_clock_source(sprop);
+ if ((ug_info->uf_info.rx_clock < QE_CLK_NONE) ||
+ (ug_info->uf_info.rx_clock > QE_CLK24)) {
+ printk(KERN_ERR
+ "ucc_geth: invalid rx-clock-name property\n");
+ return -EINVAL;
+ }
+ } else {
+ prop = of_get_property(np, "rx-clock", NULL);
+ if (!prop) {
+ /* If both rx-clock-name and rx-clock are missing,
+ we want to tell people to use rx-clock-name. */
+ printk(KERN_ERR
+ "ucc_geth: missing rx-clock-name property\n");
+ return -EINVAL;
+ }
+ if ((*prop < QE_CLK_NONE) || (*prop > QE_CLK24)) {
+ printk(KERN_ERR
+ "ucc_geth: invalid rx-clock propperty\n");
+ return -EINVAL;
+ }
+ ug_info->uf_info.rx_clock = *prop;
+ }
+
+ sprop = of_get_property(np, "tx-clock-name", NULL);
+ if (sprop) {
+ ug_info->uf_info.tx_clock = qe_clock_source(sprop);
+ if ((ug_info->uf_info.tx_clock < QE_CLK_NONE) ||
+ (ug_info->uf_info.tx_clock > QE_CLK24)) {
+ printk(KERN_ERR
+ "ucc_geth: invalid tx-clock-name property\n");
+ return -EINVAL;
+ }
+ } else {
+ prop = of_get_property(np, "rx-clock", NULL);
+ if (!prop) {
+ printk(KERN_ERR
+ "ucc_geth: mising tx-clock-name property\n");
+ return -EINVAL;
+ }
+ if ((*prop < QE_CLK_NONE) || (*prop > QE_CLK24)) {
+ printk(KERN_ERR
+ "ucc_geth: invalid tx-clock property\n");
+ return -EINVAL;
+ }
+ ug_info->uf_info.tx_clock = *prop;
+ }
+
err = of_address_to_resource(np, 0, &res);
if (err)
return -EINVAL;
#ifdef CONFIG_PPC_CPM_NEW_BINDING
void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
{
- u16 __iomem *cpcr = &cpmp->cp_cpcr;
-
- out_be16(cpcr, port->command | (cmd << 8) | CPM_CR_FLG);
- while (in_be16(cpcr) & CPM_CR_FLG)
- ;
+ cpm_command(port->command, cmd);
}
#else
void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
#ifdef CONFIG_PPC_CPM_NEW_BINDING
void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
{
- cpm_cpm2_t __iomem *cp = cpm2_map(im_cpm);
-
- out_be32(&cp->cp_cpcr, port->command | cmd | CPM_CR_FLG);
- while (in_be32(&cp->cp_cpcr) & CPM_CR_FLG)
- ;
-
- cpm2_unmap(cp);
+ cpm_command(port->command, cmd);
}
#else
void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
unsigned long cpm_muram_alloc_fixed(unsigned long offset, unsigned long size);
void __iomem *cpm_muram_addr(unsigned long offset);
dma_addr_t cpm_muram_dma(void __iomem *addr);
+int cpm_command(u32 command, u8 opcode);
#endif
* them.
*
* guts: Pointer to GUTS structure
- * co: The DMA controller (1 or 2)
+ * co: The DMA controller (0 or 1)
* ch: The channel on the DMA controller (0, 1, 2, or 3)
* device: The device to set as the source (CCSR_GUTS_DMACR_DEV_xx)
*/
static inline void guts_set_dmacr(struct ccsr_guts __iomem *guts,
unsigned int co, unsigned int ch, unsigned int device)
{
- unsigned int shift = 16 + (8 * (2 - co) + 2 * (3 - ch));
+ unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch));
clrsetbits_be32(&guts->dmacr, 3 << shift, device << shift);
}
#define CCSR_GUTS_PMUXCR_DMA1_0 0x00000002
#define CCSR_GUTS_PMUXCR_DMA1_3 0x00000001
+/*
+ * Set the DMA external control bits in the GUTS
+ *
+ * The DMA external control bits in the PMUXCR are only meaningful for
+ * channels 0 and 3. Any other channels are ignored.
+ *
+ * guts: Pointer to GUTS structure
+ * co: The DMA controller (0 or 1)
+ * ch: The channel on the DMA controller (0, 1, 2, or 3)
+ * value: the new value for the bit (0 or 1)
+ */
+static inline void guts_set_pmuxcr_dma(struct ccsr_guts __iomem *guts,
+ unsigned int co, unsigned int ch, unsigned int value)
+{
+ if ((ch == 0) || (ch == 3)) {
+ unsigned int shift = 2 * (co + 1) - (ch & 1) - 1;
+
+ clrsetbits_be32(&guts->pmuxcr, 1 << shift, value << shift);
+ }
+}
+
#define CCSR_GUTS_CLKDVDR_PXCKEN 0x80000000
#define CCSR_GUTS_CLKDVDR_SSICKEN 0x20000000
#define CCSR_GUTS_CLKDVDR_PXCKINV 0x10000000
/* Flags when we init the IPIC */
#define IPIC_SPREADMODE_GRP_A 0x00000001
-#define IPIC_SPREADMODE_GRP_D 0x00000002
-#define IPIC_SPREADMODE_MIX_A 0x00000004
-#define IPIC_SPREADMODE_MIX_B 0x00000008
-#define IPIC_DISABLE_MCP_OUT 0x00000010
-#define IPIC_IRQ0_MCP 0x00000020
+#define IPIC_SPREADMODE_GRP_B 0x00000002
+#define IPIC_SPREADMODE_GRP_C 0x00000004
+#define IPIC_SPREADMODE_GRP_D 0x00000008
+#define IPIC_SPREADMODE_MIX_A 0x00000010
+#define IPIC_SPREADMODE_MIX_B 0x00000020
+#define IPIC_DISABLE_MCP_OUT 0x00000040
+#define IPIC_IRQ0_MCP 0x00000080
/* IPIC registers offsets */
#define IPIC_SICFR 0x00 /* System Global Interrupt Configuration Register */
#define MEM_PART_SECONDARY 1
#define MEM_PART_MURAM 2
+/* Clocks and BRGs */
+enum qe_clock {
+ QE_CLK_NONE = 0,
+ QE_BRG1, /* Baud Rate Generator 1 */
+ QE_BRG2, /* Baud Rate Generator 2 */
+ QE_BRG3, /* Baud Rate Generator 3 */
+ QE_BRG4, /* Baud Rate Generator 4 */
+ QE_BRG5, /* Baud Rate Generator 5 */
+ QE_BRG6, /* Baud Rate Generator 6 */
+ QE_BRG7, /* Baud Rate Generator 7 */
+ QE_BRG8, /* Baud Rate Generator 8 */
+ QE_BRG9, /* Baud Rate Generator 9 */
+ QE_BRG10, /* Baud Rate Generator 10 */
+ QE_BRG11, /* Baud Rate Generator 11 */
+ QE_BRG12, /* Baud Rate Generator 12 */
+ QE_BRG13, /* Baud Rate Generator 13 */
+ QE_BRG14, /* Baud Rate Generator 14 */
+ QE_BRG15, /* Baud Rate Generator 15 */
+ QE_BRG16, /* Baud Rate Generator 16 */
+ QE_CLK1, /* Clock 1 */
+ QE_CLK2, /* Clock 2 */
+ QE_CLK3, /* Clock 3 */
+ QE_CLK4, /* Clock 4 */
+ QE_CLK5, /* Clock 5 */
+ QE_CLK6, /* Clock 6 */
+ QE_CLK7, /* Clock 7 */
+ QE_CLK8, /* Clock 8 */
+ QE_CLK9, /* Clock 9 */
+ QE_CLK10, /* Clock 10 */
+ QE_CLK11, /* Clock 11 */
+ QE_CLK12, /* Clock 12 */
+ QE_CLK13, /* Clock 13 */
+ QE_CLK14, /* Clock 14 */
+ QE_CLK15, /* Clock 15 */
+ QE_CLK16, /* Clock 16 */
+ QE_CLK17, /* Clock 17 */
+ QE_CLK18, /* Clock 18 */
+ QE_CLK19, /* Clock 19 */
+ QE_CLK20, /* Clock 20 */
+ QE_CLK21, /* Clock 21 */
+ QE_CLK22, /* Clock 22 */
+ QE_CLK23, /* Clock 23 */
+ QE_CLK24, /* Clock 24 */
+ QE_CLK_DUMMY
+};
+
/* Export QE common operations */
extern void qe_reset(void);
extern int par_io_init(struct device_node *np);
/* QE internal API */
int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, u32 cmd_input);
-void qe_setbrg(unsigned int brg, unsigned int rate, unsigned int multiplier);
+enum qe_clock qe_clock_source(const char *source);
+int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier);
int qe_get_snum(void);
void qe_put_snum(u8 snum);
unsigned long qe_muram_alloc(int size, int align);
COMM_DIR_RX_AND_TX = 3
};
-/* Clocks and BRGs */
-enum qe_clock {
- QE_CLK_NONE = 0,
- QE_BRG1, /* Baud Rate Generator 1 */
- QE_BRG2, /* Baud Rate Generator 2 */
- QE_BRG3, /* Baud Rate Generator 3 */
- QE_BRG4, /* Baud Rate Generator 4 */
- QE_BRG5, /* Baud Rate Generator 5 */
- QE_BRG6, /* Baud Rate Generator 6 */
- QE_BRG7, /* Baud Rate Generator 7 */
- QE_BRG8, /* Baud Rate Generator 8 */
- QE_BRG9, /* Baud Rate Generator 9 */
- QE_BRG10, /* Baud Rate Generator 10 */
- QE_BRG11, /* Baud Rate Generator 11 */
- QE_BRG12, /* Baud Rate Generator 12 */
- QE_BRG13, /* Baud Rate Generator 13 */
- QE_BRG14, /* Baud Rate Generator 14 */
- QE_BRG15, /* Baud Rate Generator 15 */
- QE_BRG16, /* Baud Rate Generator 16 */
- QE_CLK1, /* Clock 1 */
- QE_CLK2, /* Clock 2 */
- QE_CLK3, /* Clock 3 */
- QE_CLK4, /* Clock 4 */
- QE_CLK5, /* Clock 5 */
- QE_CLK6, /* Clock 6 */
- QE_CLK7, /* Clock 7 */
- QE_CLK8, /* Clock 8 */
- QE_CLK9, /* Clock 9 */
- QE_CLK10, /* Clock 10 */
- QE_CLK11, /* Clock 11 */
- QE_CLK12, /* Clock 12 */
- QE_CLK13, /* Clock 13 */
- QE_CLK14, /* Clock 14 */
- QE_CLK15, /* Clock 15 */
- QE_CLK16, /* Clock 16 */
- QE_CLK17, /* Clock 17 */
- QE_CLK18, /* Clock 18 */
- QE_CLK19, /* Clock 19 */
- QE_CLK20, /* Clock 20 */
- QE_CLK21, /* Clock 21 */
- QE_CLK22, /* Clock 22 */
- QE_CLK23, /* Clock 23 */
- QE_CLK24, /* Clock 24 */
- QE_CLK_DUMMY,
-};
-
/* QE CMXUCR Registers.
* There are two UCCs represented in each of the four CMXUCR registers.
* These values are for the UCC in the LSBs
#define SPRN_SPEFSCR 0x200 /* SPE & Embedded FP Status & Control */
#define SPRN_BBEAR 0x201 /* Branch Buffer Entry Address Register */
#define SPRN_BBTAR 0x202 /* Branch Buffer Target Address Register */
+#define SPRN_ATB 0x20E /* Alternate Time Base */
+#define SPRN_ATBL 0x20E /* Alternate Time Base Lower */
+#define SPRN_ATBU 0x20F /* Alternate Time Base Upper */
#define SPRN_IVOR32 0x210 /* Interrupt Vector Offset Register 32 */
#define SPRN_IVOR33 0x211 /* Interrupt Vector Offset Register 33 */
#define SPRN_IVOR34 0x212 /* Interrupt Vector Offset Register 34 */
#define SPRN_IVOR35 0x213 /* Interrupt Vector Offset Register 35 */
+#define SPRN_IVOR36 0x214 /* Interrupt Vector Offset Register 36 */
+#define SPRN_IVOR37 0x215 /* Interrupt Vector Offset Register 37 */
#define SPRN_MCSRR0 0x23A /* Machine Check Save and Restore Register 0 */
#define SPRN_MCSRR1 0x23B /* Machine Check Save and Restore Register 1 */
#define SPRN_MCSR 0x23C /* Machine Check Status Register */
#define SPRN_MCAR 0x23D /* Machine Check Address Register */
#define SPRN_DSRR0 0x23E /* Debug Save and Restore Register 0 */
#define SPRN_DSRR1 0x23F /* Debug Save and Restore Register 1 */
+#define SPRN_SPRG8 0x25C /* Special Purpose Register General 8 */
+#define SPRN_SPRG9 0x25D /* Special Purpose Register General 9 */
#define SPRN_MAS0 0x270 /* MMU Assist Register 0 */
#define SPRN_MAS1 0x271 /* MMU Assist Register 1 */
#define SPRN_MAS2 0x272 /* MMU Assist Register 2 */
#define SPRN_MAS4 0x274 /* MMU Assist Register 4 */
#define SPRN_MAS5 0x275 /* MMU Assist Register 5 */
#define SPRN_MAS6 0x276 /* MMU Assist Register 6 */
-#define SPRN_MAS7 0x3b0 /* MMU Assist Register 7 */
#define SPRN_PID1 0x279 /* Process ID Register 1 */
#define SPRN_PID2 0x27A /* Process ID Register 2 */
#define SPRN_TLB0CFG 0x2B0 /* TLB 0 Config Register */
#define SPRN_TLB1CFG 0x2B1 /* TLB 1 Config Register */
+#define SPRN_EPR 0x2BE /* External Proxy Register */
#define SPRN_CCR1 0x378 /* Core Configuration Register 1 */
#define SPRN_ZPR 0x3B0 /* Zone Protection Register (40x) */
+#define SPRN_MAS7 0x3B0 /* MMU Assist Register 7 */
#define SPRN_MMUCR 0x3B2 /* MMU Control Register */
#define SPRN_CCR0 0x3B3 /* Core Configuration Register 0 */
+#define SPRN_EPLC 0x3B3 /* External Process ID Load Context */
+#define SPRN_EPSC 0x3B4 /* External Process ID Store Context */
#define SPRN_SGR 0x3B9 /* Storage Guarded Register */
#define SPRN_DCWR 0x3BA /* Data Cache Write-thru Register */
#define SPRN_SLER 0x3BB /* Little-endian real mode */
#define SPRN_L1CSR0 0x3F2 /* L1 Cache Control and Status Register 0 */
#define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */
#define SPRN_PIT 0x3DB /* Programmable Interval Timer */
+#define SPRN_BUCSR 0x3F5 /* Branch Unit Control and Status */
#define SPRN_DCCR 0x3FA /* Data Cache Cacheability Register */
#define SPRN_ICCR 0x3FB /* Instruction Cache Cacheability Register */
#define SPRN_SVR 0x3FF /* System Version Register */
extern int pmu_present(void);
extern int pmu_get_model(void);
-#ifdef CONFIG_PM
-/*
- * Stuff for putting the powerbook to sleep and waking it again.
- *
- */
-#include <linux/list.h>
-
-struct pmu_sleep_notifier
-{
- void (*notifier_call)(struct pmu_sleep_notifier *self, int when);
- int priority;
- struct list_head list;
-};
-
-/* Code values for calling sleep/wakeup handlers
- */
-#define PBOOK_SLEEP_REQUEST 1
-#define PBOOK_SLEEP_NOW 2
-#define PBOOK_WAKE 3
-
-/* priority levels in notifiers */
-#define SLEEP_LEVEL_VIDEO 100 /* Video driver (first wake) */
-#define SLEEP_LEVEL_MEDIABAY 90 /* Media bay driver */
-#define SLEEP_LEVEL_BLOCK 80 /* IDE, SCSI */
-#define SLEEP_LEVEL_NET 70 /* bmac, gmac */
-#define SLEEP_LEVEL_MISC 60 /* Anything else */
-#define SLEEP_LEVEL_USERLAND 55 /* Reserved for apm_emu */
-#define SLEEP_LEVEL_ADB 50 /* ADB (async) */
-#define SLEEP_LEVEL_SOUND 40 /* Sound driver (blocking) */
-
-/* special register notifier functions */
-int pmu_register_sleep_notifier(struct pmu_sleep_notifier* notifier);
-int pmu_unregister_sleep_notifier(struct pmu_sleep_notifier* notifier);
-
-#endif /* CONFIG_PM */
-
#define PMU_MAX_BATTERIES 2
/* values for pmu_power_flags */
projects / linux-2.6-omap-h63xx.git / commitdiff