apic = entry->apic;
                pin = entry->pin;
-#ifdef CONFIG_INTR_REMAP
                /*
                 * With interrupt-remapping, destination information comes
                 * from interrupt-remapping table entry.
                 */
                if (!irq_remapped(irq))
                        io_apic_write(apic, 0x11 + pin*2, dest);
-#else
-               io_apic_write(apic, 0x11 + pin*2, dest);
-#endif
                reg = io_apic_read(apic, 0x10 + pin*2);
                reg &= ~IO_APIC_REDIR_VECTOR_MASK;
                reg |= vector;
 }
 
 static struct irq_chip ioapic_chip;
-#ifdef CONFIG_INTR_REMAP
 static struct irq_chip ir_ioapic_chip;
-#endif
+static struct irq_chip msi_ir_chip;
 
 #define IOAPIC_AUTO     -1
 #define IOAPIC_EDGE     0
        else
                desc->status &= ~IRQ_LEVEL;
 
-#ifdef CONFIG_INTR_REMAP
        if (irq_remapped(irq)) {
                desc->status |= IRQ_MOVE_PCNTXT;
                if (trigger)
                                                      handle_edge_irq, "edge");
                return;
        }
-#endif
+
        if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) ||
            trigger == IOAPIC_LEVEL)
                set_irq_chip_and_handler_name(irq, &ioapic_chip,
         */
        memset(entry,0,sizeof(*entry));
 
-#ifdef CONFIG_INTR_REMAP
        if (intr_remapping_enabled) {
                struct intel_iommu *iommu = map_ioapic_to_ir(apic_id);
                struct irte irte;
                 * irq handler will do the explicit EOI to the io-apic.
                 */
                ir_entry->vector = pin;
-       } else
-#endif
-       {
+       } else {
                entry->delivery_mode = apic->irq_delivery_mode;
                entry->dest_mode = apic->irq_dest_mode;
                entry->dest = destination;
 {
        struct IO_APIC_route_entry entry;
 
-#ifdef CONFIG_INTR_REMAP
        if (intr_remapping_enabled)
                return;
-#endif
 
        memset(&entry, 0, sizeof(entry));
 
 
        set_ir_ioapic_affinity_irq_desc(desc, mask);
 }
+#else
+static inline void set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc,
+                                                  const struct cpumask *mask)
+{
+}
 #endif
 
 asmlinkage void smp_irq_move_cleanup_interrupt(void)
         * 8259A.
         */
        if (pin1 == -1) {
-#ifdef CONFIG_INTR_REMAP
                if (intr_remapping_enabled)
                        panic("BIOS bug: timer not connected to IO-APIC");
-#endif
                pin1 = pin2;
                apic1 = apic2;
                no_pin1 = 1;
                                clear_IO_APIC_pin(0, pin1);
                        goto out;
                }
-#ifdef CONFIG_INTR_REMAP
                if (intr_remapping_enabled)
                        panic("timer doesn't work through Interrupt-remapped IO-APIC");
-#endif
                local_irq_disable();
                clear_IO_APIC_pin(apic1, pin1);
                if (!no_pin1)
        if (desc)
                desc->chip_data = cfg;
 
-#ifdef CONFIG_INTR_REMAP
        free_irte(irq);
-#endif
        spin_lock_irqsave(&vector_lock, flags);
        __clear_irq_vector(irq, cfg);
        spin_unlock_irqrestore(&vector_lock, flags);
 
        dest = apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus());
 
-#ifdef CONFIG_INTR_REMAP
        if (irq_remapped(irq)) {
                struct irte irte;
                int ir_index;
                                  MSI_ADDR_IR_SHV |
                                  MSI_ADDR_IR_INDEX1(ir_index) |
                                  MSI_ADDR_IR_INDEX2(ir_index);
-       } else
-#endif
-       {
+       } else {
                if (x2apic_enabled())
                        msg->address_hi = MSI_ADDR_BASE_HI |
                                          MSI_ADDR_EXT_DEST_ID(dest);
 #endif
        .retrigger      = ioapic_retrigger_irq,
 };
+#endif
 
 /*
  * Map the PCI dev to the corresponding remapping hardware unit
        }
        return index;
 }
-#endif
 
 static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, int irq)
 {
        set_irq_msi(irq, msidesc);
        write_msi_msg(irq, &msg);
 
-#ifdef CONFIG_INTR_REMAP
        if (irq_remapped(irq)) {
                struct irq_desc *desc = irq_to_desc(irq);
                /*
                desc->status |= IRQ_MOVE_PCNTXT;
                set_irq_chip_and_handler_name(irq, &msi_ir_chip, handle_edge_irq, "edge");
        } else
-#endif
                set_irq_chip_and_handler_name(irq, &msi_chip, handle_edge_irq, "edge");
 
        dev_printk(KERN_DEBUG, &dev->dev, "irq %d for MSI/MSI-X\n", irq);
        int ret, sub_handle;
        struct msi_desc *msidesc;
        unsigned int irq_want;
-
-#ifdef CONFIG_INTR_REMAP
        struct intel_iommu *iommu = 0;
        int index = 0;
-#endif
 
        irq_want = nr_irqs_gsi;
        sub_handle = 0;
                if (irq == 0)
                        return -1;
                irq_want = irq + 1;
-#ifdef CONFIG_INTR_REMAP
                if (!intr_remapping_enabled)
                        goto no_ir;
 
                        set_irte_irq(irq, iommu, index, sub_handle);
                }
 no_ir:
-#endif
                ret = setup_msi_irq(dev, msidesc, irq);
                if (ret < 0)
                        goto error;
                        else
                                mask = apic->target_cpus();
 
-#ifdef CONFIG_INTR_REMAP
                        if (intr_remapping_enabled)
                                set_ir_ioapic_affinity_irq_desc(desc, mask);
                        else
-#endif
                                set_ioapic_affinity_irq_desc(desc, mask);
                }
 
 
 #include <linux/msi.h>
 #include <linux/irqreturn.h>
 
-#if defined(CONFIG_DMAR) || defined(CONFIG_INTR_REMAP)
 struct intel_iommu;
-
+#if defined(CONFIG_DMAR) || defined(CONFIG_INTR_REMAP)
 struct dmar_drhd_unit {
        struct list_head list;          /* list of drhd units   */
        struct  acpi_dmar_header *hdr;  /* ACPI header          */
 extern void detect_intel_iommu(void);
 extern int enable_drhd_fault_handling(void);
 
-
 extern int parse_ioapics_under_ir(void);
 extern int alloc_iommu(struct dmar_drhd_unit *);
 #else
 {
        return -ENODEV;
 }
+static inline int enable_drhd_fault_handling(void)
+{
+       return -1;
+}
 #endif /* !CONFIG_DMAR && !CONFIG_INTR_REMAP */
 
-#ifdef CONFIG_INTR_REMAP
-extern int intr_remapping_enabled;
-extern int enable_intr_remapping(int);
-
 struct irte {
        union {
                struct {
                __u64 high;
        };
 };
+#ifdef CONFIG_INTR_REMAP
+extern int intr_remapping_enabled;
+extern int enable_intr_remapping(int);
+
 extern int get_irte(int irq, struct irte *entry);
 extern int modify_irte(int irq, struct irte *irte_modified);
 extern int alloc_irte(struct intel_iommu *iommu, int irq, u16 count);
 extern struct intel_iommu *map_dev_to_ir(struct pci_dev *dev);
 extern struct intel_iommu *map_ioapic_to_ir(int apic);
 #else
+static inline int alloc_irte(struct intel_iommu *iommu, int irq, u16 count)
+{
+       return -1;
+}
+static inline int modify_irte(int irq, struct irte *irte_modified)
+{
+       return -1;
+}
+static inline int free_irte(int irq)
+{
+       return -1;
+}
+static inline int map_irq_to_irte_handle(int irq, u16 *sub_handle)
+{
+       return -1;
+}
+static inline int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index,
+                              u16 sub_handle)
+{
+       return -1;
+}
+static inline struct intel_iommu *map_dev_to_ir(struct pci_dev *dev)
+{
+       return NULL;
+}
+static inline struct intel_iommu *map_ioapic_to_ir(int apic)
+{
+       return NULL;
+}
 #define irq_remapped(irq)              (0)
 #define enable_intr_remapping(mode)    (-1)
 #define intr_remapping_enabled         (0)