propagate_rate(clk);
 }
 
-static void omap2_set_osc_ck(int enable)
+static int omap2_enable_osc_ck(struct clk *clk)
 {
        u32 pcc;
 
        pcc = prm_read_reg(OMAP24XX_PRCM_CLKSRC_CTRL);
 
-       if (enable)
-               prm_write_reg(pcc & ~OMAP_AUTOEXTCLKMODE_MASK,
-                             OMAP24XX_PRCM_CLKSRC_CTRL);
-       else
-               prm_write_reg(pcc | OMAP_AUTOEXTCLKMODE_MASK,
-                             OMAP24XX_PRCM_CLKSRC_CTRL);
+       prm_write_reg(pcc & ~OMAP_AUTOEXTCLKMODE_MASK,
+                     OMAP24XX_PRCM_CLKSRC_CTRL);
+
+       return 0;
+}
+
+static void omap2_disable_osc_ck(struct clk *clk)
+{
+       u32 pcc;
+
+       pcc = prm_read_reg(OMAP24XX_PRCM_CLKSRC_CTRL);
+
+       prm_write_reg(pcc | OMAP_AUTOEXTCLKMODE_MASK,
+                     OMAP24XX_PRCM_CLKSRC_CTRL);
 }
 
 /*
        if (clk->flags & (ALWAYS_ENABLED | PARENT_CONTROLS_CLOCK))
                return 0;
 
-       if (unlikely(clk == &osc_ck)) {
-               omap2_set_osc_ck(1);
-               return 0;
-       }
-
        if (clk->enable)
                return clk->enable(clk);
 
                return;
        }
 
-       if (unlikely(clk == &osc_ck)) {
-               omap2_set_osc_ck(0);
-               return;
-       }
-
        if (clk->enable_reg == 0) {
                /*
                 * 'Independent' here refers to a clock which is not
 
 #include "prm_regbits_24xx.h"
 #include "cm_regbits_24xx.h"
 
-static void omap2_sys_clk_recalc(struct clk * clk);
 static void omap2_clksel_recalc(struct clk * clk);
 static void omap2_table_mpu_recalc(struct clk *clk);
 static int omap2_select_table_rate(struct clk * clk, unsigned long rate);
 static long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate);
 static int omap2_clksel_set_rate(struct clk *clk, unsigned long rate);
 static int omap2_reprogram_dpll(struct clk *clk, unsigned long rate);
+static int omap2_enable_osc_ck(struct clk *clk);
+static void omap2_disable_osc_ck(struct clk *clk);
 
 /* Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated.
  * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU,CM_CLKSEL_DSP
        .rate           = 26000000,             /* fixed up in clock init */
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                RATE_FIXED | RATE_PROPAGATES,
+       .enable         = &omap2_enable_osc_ck,
+       .disable        = &omap2_disable_osc_ck,
        .recalc         = &propagate_rate,
 };